From d10086ee71608b912ef10d1bc3548e6fbc9d1f03 Mon Sep 17 00:00:00 2001 From: Robin Mueller Date: Tue, 11 Jun 2024 14:06:14 +0200 Subject: [PATCH 1/8] gen-helper script: bail on failure --- va416xx/gen-helper.sh | 5 +++++ va416xx/svd/va416xx-base.svd | 2 +- 2 files changed, 6 insertions(+), 1 deletion(-) diff --git a/va416xx/gen-helper.sh b/va416xx/gen-helper.sh index 635e214..d40dfff 100755 --- a/va416xx/gen-helper.sh +++ b/va416xx/gen-helper.sh @@ -16,6 +16,11 @@ if [ -x "$(${svd2rust_bin} --version)" ]; then exit fi ${svd2rust_bin} -i svd/va416xx-base.svd +result=$? +if [ $result -ne 0 ]; then + echo "svd2rust failed with code $result" + exit +fi rm -rf src form -i lib.rs -o src/ && rm lib.rs cargo fmt diff --git a/va416xx/svd/va416xx-base.svd b/va416xx/svd/va416xx-base.svd index 889981d..15d895f 100644 --- a/va416xx/svd/va416xx-base.svd +++ b/va416xx/svd/va416xx-base.svd @@ -12871,4 +12871,4 @@ the counter from the value in the WDOGLOAD Register - \ No newline at end of file + From 8028c1023bbc93de838e7b5a8a9bc11c4832affd Mon Sep 17 00:00:00 2001 From: Robin Mueller Date: Tue, 11 Jun 2024 14:07:44 +0200 Subject: [PATCH 2/8] auto-format SVD file --- va416xx/svd/va416xx-base.svd | 3835 +++++++++++++++++----------------- 1 file changed, 1921 insertions(+), 1914 deletions(-) diff --git a/va416xx/svd/va416xx-base.svd b/va416xx/svd/va416xx-base.svd index 15d895f..da85ebf 100644 --- a/va416xx/svd/va416xx-base.svd +++ b/va416xx/svd/va416xx-base.svd @@ -1,15 +1,15 @@ - + VORAGO TECHNOLOGIES SST va416xx M4 1.3 - ARM 32-bit Cortex-M4 Microcontroller based device, CPU clock up to 100MHz @@ -38,13 +38,18 @@ V1.0 - Original release Dec 2015 system_va416xx VOR_ - 8 - 32 + 8 + + 32 + 32 - read-write - 0x00000000 - 0xFFFFFFFF + read-write + + 0x00000000 + + 0xFFFFFFFF + @@ -61,7 +66,7 @@ V1.0 - Original release Dec 2015 LoCLK 45 - + CTRL0 @@ -69,17 +74,17 @@ V1.0 - Original release Dec 2015 0x000 0x00000030 - + SYS_CLK_LOST_DET_EN Enable the circuit that detects loss of SYS_CLK [31:31] - - + + PLL_RESET Writing this bit to 1 puts the PLL into reset [30:30] - - + + CLK_DIV_SEL Selects the PLL out divider to divide by 1/2/4/8 [29:28] @@ -113,12 +118,12 @@ V1.0 - Original release Dec 2015 PLL_BYPASS PLL Symbol; reference-to-output bypass when high [6:6] - + PLL_PWDN PLL Symbol; power down when high [5:5] - + PLL_INTFB PLL Symbol; select internal feedback path when high rather than FCLK @@ -128,89 +133,89 @@ V1.0 - Original release Dec 2015 CLKSEL_SYS Input clock select to PLL [3:2] - + REF_CLK_SEL PLL Reference Clock Select [1:0] - - + + STAT Clock Generation Module Status Register 0x004 - read-only + read-only 0x00000000 SYSCLKLOST Set when SYS_CLK has dropped to less than 1MHz [3:3] - read-only - + read-only + LOCKLOST LOCK high Symbol indicates that RFLSIP or FBSLIP have occurred for 64 consecutive cycles [2:2] - read-only - + read-only + RFSLIP Reference cycle slip output (CLKOUT frequency high) [1:1] - read-only - + read-only + FBSLIP Feedback cycle slip output (CLKOUT frequency low) [0:0] - read-only - - - + read-only + + + CTRL1 Clock Generation Module Control Register 1 0x008 - read-write + read-write 0x00000000 - - + + ADC_CLK_DIV_SEL Clock divider select for ADC - [6:5] + [6:5] XTAL_N_EN Enables XTAL_N output - [4:4] - + [4:4] + XTAL_EN Enables the crystal oscillator - [3:3] - + [3:3] + PLL_LOST_LOCK_DET_EN Enables the PLL lock lost detection circuit - [2:2] - + [2:2] + PLL_LCK_DET_REARM Resets/Rearms the PLL lock detect circuit - [1:1] - + [1:1] + SYS_CLK_LOST_DET_REARM Resets/Rearms the SYS_CLK lost detection feature - [0:0] - - - - - - + [0:0] + + + + + + SYSCONFIG 1.0 @@ -221,18 +226,18 @@ V1.0 - Original release Dec 2015 0x00001000 registers - + LVD 46 - - + + EDAC_MBE 76 - - + + EDAC_SBE 77 - + RST_STAT @@ -270,7 +275,7 @@ V1.0 - Original release Dec 2015 MEMERR Memory Error Reset Status [5:5] - read-only + read-only @@ -291,7 +296,7 @@ V1.0 - Original release Dec 2015 RAM Reset Control 0x00C 0x0000003F - + ROM_PROT ROM Protection Configuration @@ -335,8 +340,8 @@ V1.0 - Original release Dec 2015 RAM1_SCRUB RAM1 Scrub Period Configuration 0x01C - - + + IRQ_ENB Enable EDAC Error Interrupt Register 0x020 @@ -347,7 +352,7 @@ V1.0 - Original release Dec 2015 ROMMBE ROM Multi Bit Interrupt [0:0] - + ROMSBE ROM Single Bit Interrupt @@ -373,7 +378,7 @@ V1.0 - Original release Dec 2015 RAM1 Single Bit Interrupt [5:5] - + IRQ_RAW @@ -408,14 +413,14 @@ V1.0 - Original release Dec 2015 RAM0 EDAC Single Bit Errors [15:0] - + RAM1_SBE Count of RAM1 EDAC Single Bit Errors 0x034 - - + + RAM0_MBE Count of RAM0 EDAC Multi Bit Errors 0x038 @@ -426,8 +431,8 @@ V1.0 - Original release Dec 2015 RAM0 Multi Bit Errors [15:0] - - + + RAM1_MBE Count of RAM1 EDAC Multi Bit Errors @@ -455,58 +460,58 @@ V1.0 - Original release Dec 2015 Count of ROM block Retries [7:0] - - + + REFRESH_CONFIG_H Register Refresh Rate for TMR registers 0x04C 0x00000000 - + DIVCOUNT Upper 8-bits of the Refresh Rate Counter. Registers are refreshed every DIVCOUNT+1 cycles [7:0] - + TESTMODE Special Test Mode Configuration. 00/01=normal. 10=Force refresh off. 11=Force refresh on constantly. [31:30] - - + + TIM_RESET TIM Reset Control 0x050 0xFFFFFFFF - + TIM_RESET Reset of a given TIMER [23:0] - + TIM_CLK_ENABLE TIM Enable Control 0x054 0x00000000 - + TIMERS Clock enable of a given TIMER [23:0] - + PERIPHERAL_RESET Peripheral Reset Control 0x058 - 0x7F7BEFFF - + 0x7F7BEFFF + SPI0 Resetn of SPI0 @@ -516,7 +521,7 @@ V1.0 - Original release Dec 2015 SPI1 Resetn of SPI1 [1:1] - + SPI2 Resetn of SPI2 @@ -526,42 +531,42 @@ V1.0 - Original release Dec 2015 SPI3 Resetn of SPI3 [3:3] - + UART0 Resetn of UART0 [4:4] - + UART1 Resetn of UART1 [5:5] - + UART2 Resetn of UART2 [6:6] - + I2C0 Resetn of I2C0 [7:7] - + I2C1 Resetn of I2C1 [8:8] - + I2C2 Resetn of I2C2 [9:9] - + CAN0 Resetn of CAN0 [10:10] - + CAN1 Resetn of CAN1 @@ -601,7 +606,7 @@ V1.0 - Original release Dec 2015 SPW Resetn of SpaceWire [18:18] - + CLKGEN RESETn of PLL in Clock Generation Module @@ -661,8 +666,8 @@ V1.0 - Original release Dec 2015 PORTG Resetn of PORTG [30:30] - - + + PERIPHERAL_CLK_ENABLE @@ -690,9 +695,9 @@ V1.0 - Original release Dec 2015 REG_WR_KEY Fuse-analog register writes enabled when key = 0xfeed [15:0] - + - + PMU_CTRL PMU Control Register @@ -703,9 +708,9 @@ V1.0 - Original release Dec 2015 LVL_SLCT Select the POK detect level [1:0] - + - + WAKEUP_CNT Wakeup Control @@ -716,13 +721,13 @@ V1.0 - Original release Dec 2015 CNTSTRT Launch SLP mode in analog block [3:3] - + WKUP_CNT Used to set a time to wake up the processor after the device has been put in a low power state [2:0] - - + + EBI_CFG0 @@ -734,12 +739,12 @@ V1.0 - Original release Dec 2015 ADDRLOW0 Lower bound address for CEN0 [7:0] - + ADDRHIGH0 Upper bound address for CEN0 [15:8] - + CFGREADCYCLE Number of cycles for a read - N plus 1 @@ -759,8 +764,8 @@ V1.0 - Original release Dec 2015 CFGSIZE 8 bit (0) or 16 bit (1) port size [25:25] - - + + EBI_CFG1 @@ -780,7 +785,7 @@ V1.0 - Original release Dec 2015 0x078 0x00000000 - + ANALOG_CNTL Analog Control Register 0x07C @@ -790,12 +795,12 @@ V1.0 - Original release Dec 2015 TMOSC Test Mode [0:0] - + TMPOKDIS Test Mode [1:1] - + TM_ADCMUX_N Test Mode @@ -805,7 +810,7 @@ V1.0 - Original release Dec 2015 TM_ADCMUX_P Test Mode [3:3] - + TMRATIO Test Mode @@ -820,237 +825,238 @@ V1.0 - Original release Dec 2015 ADC_STEST Number of clocks for sample time [12:9] - + RCLK_POS_EN Enable normal test clock [14:14] - + RCLK_NEG_EN Enable inverted test clock [15:15] - + APB2CLK_POS_EN Enable normal APB2CLK for test output [16:16] - + APB2CLK_NEG_EN Enable inverted APB2CLK for test output [17:17] - + TM_ANALOG_PD_EN Enables pull down on analog pads [18:18] - + JMP2BOOT Enables a skip of all delay counters and eFuse read [19:19] - + + SKIPBOOT Enables a skip of all delay counters, eFuse read, and boot [20:20] - - + + - + SW_CLKDIV10 Initial SpW Clock Divider Value - 0x080 - read-write + 0x080 + read-write 0x00000009 - + SW_CLKDIV10 Defines the initial value for the SpW clock, defaults to divide by ten [7:0] - - - - + + + + REFRESH_CONFIG_L Register Refresh Rate for TMR registers - 0x084 - read-write + 0x084 + read-write 0x0000000f - + DIVCOUNT Lower 32-bits of the Refresh Rate Counter. Registers are refreshed every DIVCOUNT+1 cycles [31:0] - - - - + + + + DAC0_CAL DAC0 Calibration Register - 0xFD0 - read-only + 0xFD0 + read-only 0x00000000 - + DAC0_CAL DAC0 Calibration bits [4:0] - - + + - + DAC1_CAL DAC1 Calibration Register 0xFD4 - read-only + read-only 0x00000000 - + DAC1_CAL DAC1 Calibration bits [4:0] - - - - + + + + ADC_CAL ADC Calibration Register 0xFD8 - read-only + read-only 0x00000000 - + ADC_CAL ADC Calibration bits [4:0] - - - - + + + + BG_CAL Bandgap Calibration Register - 0xFDC - read-only + 0xFDC + read-only 0x00000000 - + BG_CAL Bandgap Calibration bits [2:0] - - - - + + + + DREG_CAL Digital LDO Regulator Calibration Register - 0xFE0 - read-only + 0xFE0 + read-only 0x00000000 - + DREG_CAL Digital LDO Regulator Calibration bits [8:0] - - - - + + + + AREG_CAL Analog LDO Regulator Calibration Register 0xFE4 - read-only + read-only 0x00000000 - + AREG_CAL Analog LDO Regulator Calibration bits [8:0] - - - + + + HBO_CAL Heart Beat OSC Calibration Register 0xFE8 - read-only + read-only 0x00000000 - + OSC_CAL 1MHz OSC Calibration bit [3:3] - + HBO_CAL Heart Beat OSC Calibration bits [2:0] - - - + + + EF_CONFIG EFuse Config Register 0xFEC read-only 0x0A800C40 - + ROM_SPEED Specifies the speed of ROM_SCK [1:0] - + ROM_SIZE Specifies how much of the full 128K byte address space is loaded from the external SPI memory after a reset [5:2] - + ROM_NOCHECK When set to 1, the ROM check is skipped [6:6] - + BOOT_DELAY Specifies the boot delay from the end of the Power-On-Sequence to the release of Reset [9:7] - + ROM_READ SPI ROM read instruction code [17:10] - + ROM_LATENCY Number of bits of latency from Address until data from the SPI ROM [22:18] - + ROM_ADDRESS ROM Address Mode [24:23] - + ROM_DLYCAP ROM SPI Delayed capture [25:25] - + ROM_STATUS The first data byte from the SPI ROM following an address is taken as a status byte [26:26] - + RM This bit controls the internal RAM read timing and must be maintained at this value [27:27] - + WM This bit controls the internal RAM write timing and must be maintained at this value [28:28] - - + + EF_ID0 @@ -1065,7 +1071,7 @@ V1.0 - Original release Dec 2015 0xFF4 read-only 0x00000000 - + PROCID Processor ID Register @@ -1079,30 +1085,30 @@ V1.0 - Original release Dec 2015 0xFFC read-only 0x028007e9 - + MANUFACTURER_ID MANUFACTURER_ID [11:0] - read-only + read-only PERIPHERAL_ID PERIPHERAL_ID [23:16] - read-only - + read-only + PERIPHERAL_VER PERIPHERAL_VER [31:24] - read-only - - + read-only + + - - + + DMA 1.0 DMA Controller Block @@ -1112,55 +1118,55 @@ V1.0 - Original release Dec 2015 0x00001000 registers - + DMA_ERROR 43 - - + + DMA_ACTIVE0 174 - - + + DMA_ACTIVE1 175 - - + + DMA_ACTIVE2 176 - - + + DMA_ACTIVE3 177 - - + + DMA_DONE0 178 - - + + DMA_DONE1 179 - - + + DMA_DONE2 180 - - + + DMA_DONE3 181 - + STATUS DMA Status 0x000 0x00000000 - read-only + read-only TEST_STATUS Test Status Logic Included [31:28] - read-write + read-write CHNLS_MINUS1 @@ -1177,28 +1183,28 @@ V1.0 - Original release Dec 2015 Enable status of the controller [0:0] - + CFG DMA Configuration 0x004 - write-only + write-only 0x00000000 CHNL_PROT_CTRL HPROT[3:0] [7:5] - + MASTER_ENABLE PLL Symbol; Feedback cycle slip output (CLKOUT frequency low) [0:0] - read-only - - - + read-only + + + CTRL_BASE_PTR Base Pointer for DMA Control Registers @@ -1209,14 +1215,14 @@ V1.0 - Original release Dec 2015 CTRL_BASE_PTR Base Pointer for DMA Control Registers [31:7] - - - + + + ALT_CTRL_BASE_PTR DMA Channel alternate control data base pointer 0x00C - read-write + read-write 0x00000000 @@ -1224,74 +1230,74 @@ V1.0 - Original release Dec 2015 Base Pointer for Alternate DMA Control Register [31:0] - - + + WAITONREQ_STATUS DMA channel wait on request status 0x010 - read-only + read-only 0x00000000 CH3 DMA wait on request [3:3] - read-write - + read-write + CH2 DMA wait on request [2:2] - read-write - + read-write + CH1 DMA wait on request [1:1] - read-write - - + read-write + + CH0 DMA wait on request [0:0] - read-write - - - + read-write + + + CHNL_SW_REQUEST DMA channel software request 0x014 - write-only + write-only 0x00000000 CH3 Channel SW request [3:3] - read-write - + read-write + CH2 Channel SW request [2:2] - read-write - + read-write + CH1 Channel SW request [1:1] - read-write + read-write - + CH0 Channel SW request [0:0] - read-write - - - + read-write + + + CHNL_USEBURST_SET DMA channel useburst set @@ -1302,28 +1308,28 @@ V1.0 - Original release Dec 2015 CH3 Channel use burst set [3:3] - read-write - + read-write + CH2 Channel use burst set [2:2] - read-write - + read-write + CH1 Channel use burst set [1:1] - read-write + read-write - + CH0 Channel use burst set [0:0] - read-write - - - + read-write + + + CHNL_USEBURST_CLR DMA channel useburst clear @@ -1334,124 +1340,124 @@ V1.0 - Original release Dec 2015 CH3 Channel use burst clear [3:3] - read-write - + read-write + CH2 Channel use burst clear [2:2] - read-write - + read-write + CH1 Channel use burst clear [1:1] - read-write + read-write - + CH0 Channel use burst clear [0:0] - read-write - - - + read-write + + + CHNL_REQ_MASK_SET DMA channel request mask set 0x020 0x00000000 - + CH3 Channel Request Mask set [3:3] - read-write - + read-write + CH2 Channel Request Mask set [2:2] - read-write - + read-write + CH1 Channel Request Mask set [1:1] - read-write - - + read-write + + CH0 Channel Request Mask set [0:0] - read-write - - - + read-write + + + CHNL_REQ_MASK_CLR DMA channel request mask clear 0x024 0x00000000 - + CH3 Channel Request Mask clear [3:3] - read-write - + read-write + CH2 Channel Request Mask clear [2:2] - read-write - + read-write + CH1 Channel Request Mask clear [1:1] - read-write - - + read-write + + CH0 Channel Request Mask clear [0:0] - read-write - - - + read-write + + + CHNL_ENABLE_SET DMA channel enable set 0x028 0x00000000 - + CH3 Channel Enable set [3:3] - read-write - + read-write + CH2 Channel Enable set [2:2] - read-write - + read-write + CH1 Channel Enable set [1:1] - read-write + read-write - + CH0 Channel Enable set [0:0] - read-write - - - + read-write + + + CHNL_ENABLE_CLR DMA channel enable clear @@ -1462,28 +1468,28 @@ V1.0 - Original release Dec 2015 CH3 Channel Enable clear [3:3] - read-write - + read-write + CH2 Channel Enable clear [2:2] - read-write - + read-write + CH1 Channel Enable clear [1:1] - read-write - - + read-write + + CH0 Channel Enable clear [0:0] - read-write - - - + read-write + + + CHNL_PRI_ALT_SET DMA channel primary alternate set @@ -1494,28 +1500,28 @@ V1.0 - Original release Dec 2015 CH3 Channel PRI_ALT set [3:3] - read-write - + read-write + CH2 Channel PRI_ALT set [2:2] - read-write - + read-write + CH1 Channel PRI_ALT set [1:1] - read-write + read-write - + CH0 Channel PRI_ALT set [0:0] - read-write - - - + read-write + + + CHNL_PRI_ALT_CLR DMA channel primary alternate clear @@ -1526,94 +1532,94 @@ V1.0 - Original release Dec 2015 CH3 Channel PRI_ALT clear [3:3] - read-write - + read-write + CH2 Channel PRI_ALT clear [2:2] - read-write - + read-write + CH1 Channel PRI_ALT clear [1:1] - read-write - - + read-write + + CH0 Channel PRI_ALT clear [0:0] - read-write - - - + read-write + + + CHNL_PRIORITY_SET DMA channel priority set 0x038 - read-write + read-write 0x00000000 CH3 Channel PRIORITY set [3:3] - read-write - + read-write + CH2 Channel PRIORITY set [2:2] - read-write - + read-write + CH1 Channel PRIORITY set [1:1] - read-write + read-write - + CH0 Channel PRIORITY set [0:0] - read-write - - - + read-write + + + CHNL_PRIORITY_CLR DMA channel priority clear 0x03C - write-only + write-only 0x00000000 CH3 Channel PRIORITY clear [3:3] - write-only - + write-only + CH2 Channel PRIORITY clear [2:2] - write-only - + write-only + CH1 Channel PRIORITY clear [1:1] - write-only - - + write-only + + CH0 Channel PRIORITY clear [0:0] - write-only - - - + write-only + + + ERR_CLR DMA bus error clear @@ -1624,10 +1630,10 @@ V1.0 - Original release Dec 2015 ERR_CLR Error Clear [0:0] - read-write - - - + read-write + + + INTEGRATION_CFG DMA integration configuration @@ -1638,10 +1644,10 @@ V1.0 - Original release Dec 2015 INT_TEST_EN Error Clear [0:0] - read-write - - - + read-write + + + STALL_STATUS DMA stall status @@ -1652,10 +1658,10 @@ V1.0 - Original release Dec 2015 STALL_STATUS DMA is stalled [0:0] - read-only - - - + read-only + + + DMA_REQ_STATUS DMA Configuration @@ -1666,28 +1672,28 @@ V1.0 - Original release Dec 2015 CH3 DMA Request Status for this CH [3:3] - read-write - + read-write + CH2 DMA Request Status for this CH [2:2] - read-write - + read-write + CH1 DMA Request Status for this CH [1:1] - read-write - - + read-write + + CH0 DMA Request Status for this CH [0:0] - read-write - - - + read-write + + + DMA_SREQ_STATUS DMA single request status @@ -1698,28 +1704,28 @@ V1.0 - Original release Dec 2015 CH3 DMA SRequest Status for this CH [3:3] - read-write - + read-write + CH2 DMA SRequest Status for this CH [2:2] - read-write - + read-write + CH1 DMA SRequest Status for this CH [1:1] - read-write + read-write - + CH0 DMA SRequest Status for this CH [0:0] - read-write - - - + read-write + + + DMA_DONE_SET DMA done set @@ -1730,28 +1736,28 @@ V1.0 - Original release Dec 2015 CH3 DMA Done Set for this CH [3:3] - read-write - + read-write + CH2 DMA Done Set for this CH [2:2] - read-write - + read-write + CH1 DMA Done Set for this CH [1:1] - read-write - - + read-write + + CH0 DMA Done Set for this CH [0:0] - read-write - - - + read-write + + + DMA_DONE_CLR DMA done clear @@ -1762,28 +1768,28 @@ V1.0 - Original release Dec 2015 CH3 DMA Done clear for this CH [3:3] - read-write - + read-write + CH2 DMA Done clear for this CH [2:2] - read-write - + read-write + CH1 DMA Done clear for this CH [1:1] - read-write - - + read-write + + CH0 DMA Done clear for this CH [0:0] - read-write - - - + read-write + + + DMA_ACTIVE_SET DMA active set @@ -1794,28 +1800,28 @@ V1.0 - Original release Dec 2015 CH3 DMA Active Set [3:3] - read-write - + read-write + CH2 DMA Active Set [2:2] - read-write - + read-write + CH1 DMA Active Set [1:1] - read-write + read-write - + CH0 DMA Active Set [0:0] - read-write - - - + read-write + + + DMA_ACTIVE_CLR DMA active clear @@ -1826,28 +1832,28 @@ V1.0 - Original release Dec 2015 CH3 DMA Active clear [3:3] - read-write - + read-write + CH2 DMA Active clear [2:2] - read-write - + read-write + CH1 DMA Active clear [1:1] - read-write + read-write - + CH0 DMA Active clear [0:0] - read-write - - - + read-write + + + ERR_SET DMA bus error set @@ -1858,10 +1864,10 @@ V1.0 - Original release Dec 2015 ERR_SET Set Error [0:0] - read-only - - - + read-only + + + PERIPH_ID_4 DMA Peripheral ID 4 @@ -1872,14 +1878,14 @@ V1.0 - Original release Dec 2015 BLOCK_COUNT The Number of 4k Address Blocks Required [7:4] - + JEP106_C_CODE JEP106 [3:0] - - - + + + PERIPH_ID_0 DMA Peripheral ID 0 @@ -1890,28 +1896,28 @@ V1.0 - Original release Dec 2015 PART_NUMBER_0 Part Number [7:0] - - - + + + PERIPH_ID_1 DMA Peripheral ID 1 0xFE4 - read-only + read-only 0x000000B2 JEP106_ID_3_0 Indentity Code [7:4] - + PART_NUMBER_1 Part Number 1 [3:0] - - - + + + PERIPH_ID_2 DMA Peripheral ID 2 @@ -1922,19 +1928,19 @@ V1.0 - Original release Dec 2015 REVISION Revision [7:4] - + JEDEC_USED JEDEC [3:3] - + JEP106_ID_6_4 JEP106 [2:0] - - - + + + PERIPH_ID_3 DMA Peripheral ID 3 @@ -1945,9 +1951,9 @@ V1.0 - Original release Dec 2015 MOD_NUMBER Controller Modifications [3:0] - - - + + + PRIMECELL_ID_0 DMA PrimeCell ID 0 @@ -1958,9 +1964,9 @@ V1.0 - Original release Dec 2015 PRIMECELL_ID_0 PrimeCell Identification [7:0] - - - + + + PRIMECELL_ID_1 DMA PrimeCell ID 1 @@ -1971,10 +1977,10 @@ V1.0 - Original release Dec 2015 PRIMECELL_ID_1 PrimeCell Identification [7:0] - - - - + + + + PRIMECELL_ID_2 DMA PrimeCell ID 2 0xFF8 @@ -1984,10 +1990,10 @@ V1.0 - Original release Dec 2015 PRIMECELL_ID_2 PrimeCell Identification [7:0] - - - - + + + + PRIMECELL_ID_3 DMA PrimeCell ID 3 0xFFC @@ -1997,11 +2003,11 @@ V1.0 - Original release Dec 2015 PRIMECELL_ID_3 PrimeCell Identification [7:0] - - - - - + + + + + IOCONFIG @@ -2122,89 +2128,89 @@ V1.0 - Original release Dec 2015 PORTC Pin Configuration Register 0x0080 0x00000000 - + PORTD[%s] PORTD Pin Configuration Register 0x00C0 0x00000000 - + PORTE[%s] PORTE Pin Configuration Register 0x0100 0x00000000 - + PORTF[%s] PORTF Pin Configuration Register 0x0140 0x00000000 - - + + 8 - 4 - PORTG[%s] + 4 + PORTG[%s] PORTG Pin Configuration Register 0x0180 0x00000000 - + CLKDIV0 Clock divide value. 0 will disable the clock 0x1C0 read-only 0x00000000 - + CLKDIV1 Clock divide value. 0 will disable the clock 0x1C4 read-write 0x00000000 - + CLKDIV2 Clock divide value. 0 will disable the clock 0x1C8 read-write 0x00000000 - + CLKDIV3 Clock divide value. 0 will disable the clock 0x1CC read-write 0x00000000 - + CLKDIV4 Clock divide value. 0 will disable the clock 0x1D0 read-write 0x00000000 - + CLKDIV5 Clock divide value. 0 will disable the clock 0x1D4 read-write 0x00000000 - + CLKDIV6 Clock divide value. 0 will disable the clock 0x1D8 read-write 0x00000000 - + CLKDIV7 Clock divide value. 0 will disable the clock 0x1DC read-write 0x00000000 - + PERID Peripheral ID Register @@ -2231,22 +2237,22 @@ V1.0 - Original release Dec 2015 SYND_DATA Data Register 0x000 - read-write + read-write 0x00000000 SYND_SYND Syndrome Data Register 0x004 - read-write + read-write 0x00000000 - + SYND_SYND Provides bits 11:0 for syndrome, 2x6-bit [11:0] - - + + SYND_ENC_32_44 @@ -2254,17 +2260,17 @@ V1.0 - Original release Dec 2015 0x008 read-write 0x00000000 - + SYND_ENC_31_16 Computed syndrome value for bits 31-16 [11:6] - + SYND_ENC_7_0 Computed syndrome value for bits 15-0 [5:0] - + @@ -2280,23 +2286,23 @@ V1.0 - Original release Dec 2015 0x010 read-only 0x00000000 - + MBE Multiple bit error detect status [15:14] - + SBE Single bit error detect status [13:12] - + SYND_CHECK_32_44_SYND Correct syndrome value [11:0] - - + + ROM_TRAP_ADDRESS @@ -2304,18 +2310,18 @@ V1.0 - Original release Dec 2015 0x014 read-write 0x00000000 - + ENABLE Enable Trap mode [31:31] - + ADDR Address bits for trap match [30:2] - - + + ROM_TRAP_SYND @@ -2323,18 +2329,18 @@ V1.0 - Original release Dec 2015 0x018 read-write 0x00000000 - + R0M_SYND_31_16 6-bit syndrome value for bits 31-16 [11:6] - + ROM_SYND_7_0 6-bit syndrome value for bits 15-0 [5:0] - - + + RAM_TRAP_ADDR0 @@ -2342,18 +2348,18 @@ V1.0 - Original release Dec 2015 0x01c read-write 0x00000000 - + ENABLE Enable Trap mode [31:31] - + ADDR Address bits for trap match [30:2] - - + + RAM_TRAP_SYND0 @@ -2361,18 +2367,18 @@ V1.0 - Original release Dec 2015 0x020 read-write 0x00000000 - + RAM_SYND_31_16 6-bit syndrome value for bits 31-16 [11:6] - + RAM_SYND_7_0 6-bit syndrome value for bits 15-0 [5:0] - - + + RAM_TRAP_ADDR1 @@ -2380,18 +2386,18 @@ V1.0 - Original release Dec 2015 0x024 read-write 0x00000000 - + ENABLE Enable Trap mode [31:31] - + ADDR Address bits for trap match [30:2] - - + + RAM_TRAP_SYND1 @@ -2399,18 +2405,18 @@ V1.0 - Original release Dec 2015 0x028 read-write 0x00000000 - + RAM_SYND_31_16 6-bit syndrome value for bits 31-16 [11:6] - + RAM_SYND_7_0 6-bit syndrome value for bits 15-0 [5:0] - - + + SYND_ENC_32_52 @@ -2418,45 +2424,45 @@ V1.0 - Original release Dec 2015 0x120 read-only 0x00000000 - + SYND_ENC_32_52 Computed syndrome value for bits 15-0 [19:0] - - - + + + SYND_CHECK_32_52_DATA EDAC Decode Data 0x124 read-only 0x00000000 - + SYND_CHECK_32_52_SYND EDAC Decode Syndrome 0x128 read-only 0x00000000 - + MBE Multiple bit error detect status [31:28] - + SBE Single bit error detect status [27:24] - + SYND_CHECK_32_52_SYND Corrected syndrome value [19:0] - - - + + + PERID Peripheral ID Register @@ -2479,390 +2485,390 @@ V1.0 - Original release Dec 2015 0x00000400 registers - + PORTA0 78 - - + + PORTA1 79 - - + + PORTA2 80 - - + + PORTA3 81 - - + + PORTA4 82 - - + + PORTA5 83 - - + + PORTA6 84 - - + + PORTA7 85 - - + + PORTA8 86 - - + + PORTA9 87 - - + + PORTA10 88 - - + + PORTA11 89 - - + + PORTA12 90 - - + + PORTA13 91 - - + + PORTA14 92 - - + + PORTA15 93 - - + + PORTB0 94 - - + + PORTB1 95 - - + + PORTB2 96 - - + + PORTB3 97 - - + + PORTB4 98 - - + + PORTB5 99 - - + + PORTB6 100 - - + + PORTB7 101 - - + + PORTB8 102 - - + + PORTB9 103 - - + + PORTB10 104 - - + + PORTB11 105 - - + + PORTB12 106 - - + + PORTB13 107 - - + + PORTB14 108 - - + + PORTB15 109 - - + + PORTC0 110 - - + + PORTC1 111 - - + + PORTC2 112 - - + + PORTC3 113 - - + + PORTC4 114 - - + + PORTC5 115 - - + + PORTC6 116 - - + + PORTC7 117 - - + + PORTC8 118 - - + + PORTC9 119 - - + + PORTC10 120 - - + + PORTC11 121 - - + + PORTC12 122 - - + + PORTC13 123 - - + + PORTC14 124 - - + + PORTC15 125 - - + + PORTD0 126 - - + + PORTD1 127 - - + + PORTD2 128 - - + + PORTD3 129 - - + + PORTD4 130 - - + + PORTD5 131 - - + + PORTD6 132 - - + + PORTD7 133 - - + + PORTD8 134 - - + + PORTD9 135 - - + + PORTD10 136 - - + + PORTD11 137 - - + + PORTD12 138 - - + + PORTD13 139 - - + + PORTD14 140 - - + + PORTD15 141 - - + + PORTE0 142 - - + + PORTE1 143 - - + + PORTE2 144 - - + + PORTE3 145 - - + + PORTE4 146 - - + + PORTE5 147 - - + + PORTE6 148 - - + + PORTE7 149 - - + + PORTE8 150 - - + + PORTE9 151 - - + + PORTE10 152 - - + + PORTE11 153 - - + + PORTE12 154 - - + + PORTE13 155 - - + + PORTE14 156 - - + + PORTE15 157 - - + + PORTF0 158 - - + + PORTF1 159 - - + + PORTF2 160 - - + + PORTF3 161 - - + + PORTF4 162 - - + + PORTF5 163 - - + + PORTF6 164 - - + + PORTF7 165 - - + + PORTF8 166 - - + + PORTF9 167 - - + + PORTF10 168 - - + + PORTF11 169 - - + + PORTF12 170 - - + + PORTF13 171 - - + + PORTF14 172 - - + + PORTF15 173 - + GPIO @@ -3063,7 +3069,7 @@ V1.0 - Original release Dec 2015 IRQ_EVT - Interrupt Event Register (1:HighLevel/L->H Edge, 0:LowLevel/H->L Edge) + Interrupt Event Register (1:HighLevel/L->H Edge, 0:LowLevel/H->L Edge) 0x03c 0x00000000 @@ -3126,8 +3132,8 @@ V1.0 - Original release Dec 2015 PORTG - 0x40013800 - + 0x40013800 + @@ -3144,99 +3150,99 @@ V1.0 - Original release Dec 2015 TIM0 48 - + TIM1 49 - + TIM2 50 - + TIM3 51 - + TIM4 52 - + TIM5 53 - + TIM6 54 - + TIM7 55 - + TIM8 56 - + TIM9 57 - + TIM10 58 - + TIM11 59 - + TIM12 60 - + TIM13 61 - + TIM14 62 - + TIM15 63 - + TIM16 64 - + TIM17 65 - + TIM18 66 - + TIM19 67 - + TIM20 68 - + TIM21 69 - + TIM22 70 - + TIM23 71 - + TIM @@ -3559,7 +3565,7 @@ V1.0 - Original release Dec 2015 UART0_TX 24 - + UART0_RX 25 @@ -3579,7 +3585,7 @@ V1.0 - Original release Dec 2015 UART2_RX 29 - + UART @@ -3934,7 +3940,7 @@ V1.0 - Original release Dec 2015 UART2 0x40017000 - + @@ -3951,7 +3957,7 @@ V1.0 - Original release Dec 2015 SPI0_TX 16 - + SPI0_RX 17 @@ -3975,11 +3981,11 @@ V1.0 - Original release Dec 2015 SPI3_TX 22 - + SPI3_RX 23 - + SPI @@ -3990,7 +3996,7 @@ V1.0 - Original release Dec 2015 SIZE - Data Size(0x3=>4, 0xf=>16) + Data Size(0x3=>4, 0xf=>16) [3:0] @@ -4229,7 +4235,7 @@ V1.0 - Original release Dec 2015 SPI3 0x40015C00 - + @@ -4243,78 +4249,78 @@ V1.0 - Original release Dec 2015 0x00000400 registers - + I2C0_MS 30 - - + + I2C0_SL 31 - - + + I2C1_MS 32 - - + + I2C1_SL 33 - - + + I2C2_MS 34 - - + + I2C2_SL 35 - - + + I2C0_MS_RX 182 - - + + I2C0_MS_TX 183 - - + + I2C0_SL_RX 184 - - + + I2C0_SL_TX 185 - - + + I2C1_MS_RX 186 - - + + I2C1_MS_TX 187 - - + + I2C1_SL_RX 188 - - + + I2C1_SL_TX 189 - - + + I2C2_MS_RX 190 - - + + I2C2_MS_TX 191 - - + + I2C2_SL_RX 192 - - + + I2C2_SL_TX 193 - + I2C @@ -4422,7 +4428,7 @@ V1.0 - Original release Dec 2015 IDLE I2C controller is Idle [1:1] - + WAITING Controller is Waiting @@ -4682,92 +4688,92 @@ V1.0 - Original release Dec 2015 S0_MAXWORDS Slave MaxWords Register 0x104 - 0x00000000 + 0x00000000 MAXWORD Max Word Count [10:0] - + ENABLE Enables the max word count [31:31] - - + + S0_ADDRESS Slave I2C Address Value 0x108 - 0x00000000 + 0x00000000 A10MODE Enable 10b address mode [15:15] - + ADDRESS Address value [10:1] - + RW Read/Write value [0:0] - - + + S0_ADDRESSMASK Slave I2C Address Mask value 0x10c - 0x00000000 + 0x00000000 MASK Address mask value [10:1] - + RWMASK Read/Write mask [0:0] - - + + S0_DATA Slave Data Input/Output 0x110 - 0x00000000 + 0x00000000 VALUE I2C data value [7:0] - - + + S0_LASTADDRESS Slave I2C Last Address value 0x114 read-only - 0x00000000 + 0x00000000 ADDRESS Address value [10:1] - + DIRECTION Transaction direction 0=master send, 1=master receive [0:0] - - + + S0_STATUS @@ -4874,28 +4880,28 @@ V1.0 - Original release Dec 2015 Slave TX Count Register 0x120 read-only - 0x00000000 - + 0x00000000 + VALUE Count value [10:0] - - + + S0_RXCOUNT Slave RX Count Register 0x124 read-only - 0x00000000 - + 0x00000000 + VALUE Count value [10:0] - - + + S0_IRQ_ENB @@ -5009,27 +5015,27 @@ V1.0 - Original release Dec 2015 S0_RXFIFOIRQTRG Slave Rx FIFO IRQ Trigger Level 0x138 - 0x00000000 - + 0x00000000 + LEVEL Half full level for the Rx FIFO [4:0] - - + + S0_TXFIFOIRQTRG Slave Tx FIFO IRQ Trigger Level 0x13c - 0x00000008 - + 0x00000008 + LEVEL Half full level for the Rx FIFO [4:0] - - + + S0_FIFO_CLR @@ -5053,7 +5059,7 @@ V1.0 - Original release Dec 2015 S0_ADDRESSB Slave I2C Address B Value 0x144 - 0x00000000 + 0x00000000 RW @@ -5069,14 +5075,14 @@ V1.0 - Original release Dec 2015 ADDRESSBEN Enable Address B [15:15] - - + + S0_ADDRESSMASKB Slave I2C Address B Mask value 0x148 - 0x000007FE + 0x000007FE RWMASK @@ -5087,8 +5093,8 @@ V1.0 - Original release Dec 2015 MASK Address mask value [10:1] - - + + PERID @@ -5106,8 +5112,8 @@ V1.0 - Original release Dec 2015 I2C2 0x40016800 - - + + CAN0 @@ -5120,14 +5126,14 @@ V1.0 - Original release Dec 2015 0x00000400 registers - + CAN0 72 - - + + CAN1 74 - + CAN @@ -5170,7 +5176,7 @@ V1.0 - Original release Dec 2015 DATA3_CMB0 CAN Frame Data Word 3 0x008 - 0x00000000 + 0x00000000 BYTE7 @@ -5181,7 +5187,7 @@ V1.0 - Original release Dec 2015 BYTE8 Data Byte 8 [7:0] - + @@ -5200,8 +5206,8 @@ V1.0 - Original release Dec 2015 BYTE6 Data Byte 6 [7:0] - - + + DATA1_CMB0 @@ -5218,8 +5224,8 @@ V1.0 - Original release Dec 2015 BYTE4 Data Byte 4 [7:0] - - + + DATA0_CMB0 @@ -5237,34 +5243,34 @@ V1.0 - Original release Dec 2015 BYTE2 Data Byte 2 [7:0] - - + + ID0_CMB0 CAN Frame Identifier Word 0 0x018 - 0x00000000 + 0x00000000 ID0 Half of CAN Frame ID. Format Varies for Standard or Extended Frames [15:0] - + ID1_CMB0 CAN Frame Identifier Word 1 0x01C - 0x00000000 + 0x00000000 ID1 Half of CAN Frame ID. Format Varies for Standard or Extended Frames [15:0] - + CNSTAT_CMB1 @@ -5306,7 +5312,7 @@ V1.0 - Original release Dec 2015 DATA3_CMB1 CAN Frame Data Word 3 0x028 - 0x00000000 + 0x00000000 BYTE7 @@ -5317,7 +5323,7 @@ V1.0 - Original release Dec 2015 BYTE8 Data Byte 8 [7:0] - + @@ -5336,8 +5342,8 @@ V1.0 - Original release Dec 2015 BYTE6 Data Byte 6 [7:0] - - + + DATA1_CMB1 @@ -5354,8 +5360,8 @@ V1.0 - Original release Dec 2015 BYTE4 Data Byte 4 [7:0] - - + + DATA0_CMB1 @@ -5373,34 +5379,34 @@ V1.0 - Original release Dec 2015 BYTE2 Data Byte 2 [7:0] - - + + ID0_CMB1 CAN Frame Identifier Word 0 0x038 - 0x00000000 + 0x00000000 ID0 Half of CAN Frame ID. Format Varies for Standard or Extended Frames [15:0] - + ID1_CMB1 CAN Frame Identifier Word 1 0x03C - 0x00000000 + 0x00000000 ID1 Half of CAN Frame ID. Format Varies for Standard or Extended Frames [15:0] - + CNSTAT_CMB2 @@ -5442,7 +5448,7 @@ V1.0 - Original release Dec 2015 DATA3_CMB2 CAN Frame Data Word 3 0x048 - 0x00000000 + 0x00000000 BYTE7 @@ -5453,7 +5459,7 @@ V1.0 - Original release Dec 2015 BYTE8 Data Byte 8 [7:0] - + @@ -5472,8 +5478,8 @@ V1.0 - Original release Dec 2015 BYTE6 Data Byte 6 [7:0] - - + + DATA1_CMB2 @@ -5490,8 +5496,8 @@ V1.0 - Original release Dec 2015 BYTE4 Data Byte 4 [7:0] - - + + DATA0_CMB2 @@ -5509,34 +5515,34 @@ V1.0 - Original release Dec 2015 BYTE2 Data Byte 2 [7:0] - - + + ID0_CMB2 CAN Frame Identifier Word 0 0x058 - 0x00000000 + 0x00000000 ID0 Half of CAN Frame ID. Format Varies for Standard or Extended Frames [15:0] - + ID1_CMB2 CAN Frame Identifier Word 1 0x05C - 0x00000000 + 0x00000000 ID1 Half of CAN Frame ID. Format Varies for Standard or Extended Frames [15:0] - + CNSTAT_CMB3 @@ -5567,7 +5573,7 @@ V1.0 - Original release Dec 2015 0x064 0x00000000 - + TIMESTAMP Timestamp [15:0] @@ -5578,7 +5584,7 @@ V1.0 - Original release Dec 2015 DATA3_CMB3 CAN Frame Data Word 3 0x068 - 0x00000000 + 0x00000000 BYTE7 @@ -5589,7 +5595,7 @@ V1.0 - Original release Dec 2015 BYTE8 Data Byte 8 [7:0] - + @@ -5608,8 +5614,8 @@ V1.0 - Original release Dec 2015 BYTE6 Data Byte 6 [7:0] - - + + DATA1_CMB3 @@ -5626,8 +5632,8 @@ V1.0 - Original release Dec 2015 BYTE4 Data Byte 4 [7:0] - - + + DATA0_CMB3 @@ -5645,34 +5651,34 @@ V1.0 - Original release Dec 2015 BYTE2 Data Byte 2 [7:0] - - + + ID0_CMB3 CAN Frame Identifier Word 0 0x078 - 0x00000000 + 0x00000000 ID0 Half of CAN Frame ID. Format Varies for Standard or Extended Frames [15:0] - + ID1_CMB3 CAN Frame Identifier Word 1 0x07C - 0x00000000 + 0x00000000 ID1 Half of CAN Frame ID. Format Varies for Standard or Extended Frames [15:0] - + CNSTAT_CMB4 @@ -5714,7 +5720,7 @@ V1.0 - Original release Dec 2015 DATA3_CMB4 CAN Frame Data Word 3 0x088 - 0x00000000 + 0x00000000 BYTE7 @@ -5725,7 +5731,7 @@ V1.0 - Original release Dec 2015 BYTE8 Data Byte 8 [7:0] - + @@ -5744,8 +5750,8 @@ V1.0 - Original release Dec 2015 BYTE6 Data Byte 6 [7:0] - - + + DATA1_CMB4 @@ -5762,8 +5768,8 @@ V1.0 - Original release Dec 2015 BYTE4 Data Byte 4 [7:0] - - + + DATA0_CMB4 @@ -5781,36 +5787,36 @@ V1.0 - Original release Dec 2015 BYTE2 Data Byte 2 [7:0] - - + + ID0_CMB4 CAN Frame Identifier Word 0 0x098 - 0x00000000 + 0x00000000 ID0 Half of CAN Frame ID. Format Varies for Standard or Extended Frames [15:0] - + ID1_CMB4 CAN Frame Identifier Word 1 0x09C - 0x00000000 + 0x00000000 ID1 Half of CAN Frame ID. Format Varies for Standard or Extended Frames [15:0] - - - + + + CNSTAT_CMB5 Buffer Status / Control Register 0x0A0 @@ -5850,7 +5856,7 @@ V1.0 - Original release Dec 2015 DATA3_CMB5 CAN Frame Data Word 3 0x0A8 - 0x00000000 + 0x00000000 BYTE7 @@ -5861,7 +5867,7 @@ V1.0 - Original release Dec 2015 BYTE8 Data Byte 8 [7:0] - + @@ -5880,8 +5886,8 @@ V1.0 - Original release Dec 2015 BYTE6 Data Byte 6 [7:0] - - + + DATA1_CMB5 @@ -5898,8 +5904,8 @@ V1.0 - Original release Dec 2015 BYTE4 Data Byte 4 [7:0] - - + + DATA0_CMB5 @@ -5917,36 +5923,36 @@ V1.0 - Original release Dec 2015 BYTE2 Data Byte 2 [7:0] - - + + ID0_CMB5 CAN Frame Identifier Word 0 0x0B8 - 0x00000000 + 0x00000000 ID0 Half of CAN Frame ID. Format Varies for Standard or Extended Frames [15:0] - + ID1_CMB5 CAN Frame Identifier Word 1 0x0BC - 0x00000000 + 0x00000000 ID1 Half of CAN Frame ID. Format Varies for Standard or Extended Frames [15:0] - - - + + + CNSTAT_CMB6 Buffer Status / Control Register 0x0C0 @@ -5986,7 +5992,7 @@ V1.0 - Original release Dec 2015 DATA3_CMB6 CAN Frame Data Word 3 0x0C8 - 0x00000000 + 0x00000000 BYTE7 @@ -5997,7 +6003,7 @@ V1.0 - Original release Dec 2015 BYTE8 Data Byte 8 [7:0] - + @@ -6016,8 +6022,8 @@ V1.0 - Original release Dec 2015 BYTE6 Data Byte 6 [7:0] - - + + DATA1_CMB6 @@ -6034,8 +6040,8 @@ V1.0 - Original release Dec 2015 BYTE4 Data Byte 4 [7:0] - - + + DATA0_CMB6 @@ -6053,36 +6059,36 @@ V1.0 - Original release Dec 2015 BYTE2 Data Byte 2 [7:0] - - + + ID0_CMB6 CAN Frame Identifier Word 0 0x0D8 - 0x00000000 + 0x00000000 ID0 Half of CAN Frame ID. Format Varies for Standard or Extended Frames [15:0] - + ID1_CMB6 CAN Frame Identifier Word 1 0x0DC - 0x00000000 + 0x00000000 ID1 Half of CAN Frame ID. Format Varies for Standard or Extended Frames [15:0] - + - + CNSTAT_CMB7 Buffer Status / Control Register 0x0E0 @@ -6122,7 +6128,7 @@ V1.0 - Original release Dec 2015 DATA3_CMB7 CAN Frame Data Word 3 0x0E8 - 0x00000000 + 0x00000000 BYTE7 @@ -6133,7 +6139,7 @@ V1.0 - Original release Dec 2015 BYTE8 Data Byte 8 [7:0] - + @@ -6152,8 +6158,8 @@ V1.0 - Original release Dec 2015 BYTE6 Data Byte 6 [7:0] - - + + DATA1_CMB7 @@ -6170,8 +6176,8 @@ V1.0 - Original release Dec 2015 BYTE4 Data Byte 4 [7:0] - - + + DATA0_CMB7 @@ -6189,36 +6195,36 @@ V1.0 - Original release Dec 2015 BYTE2 Data Byte 2 [7:0] - - + + ID0_CMB7 CAN Frame Identifier Word 0 0x0F8 - 0x00000000 + 0x00000000 ID0 Half of CAN Frame ID. Format Varies for Standard or Extended Frames [15:0] - + ID1_CMB7 CAN Frame Identifier Word 1 0x0FC - 0x00000000 + 0x00000000 ID1 Half of CAN Frame ID. Format Varies for Standard or Extended Frames [15:0] - - - + + + CNSTAT_CMB8 Buffer Status / Control Register 0x100 @@ -6258,7 +6264,7 @@ V1.0 - Original release Dec 2015 DATA3_CMB8 CAN Frame Data Word 3 0x108 - 0x00000000 + 0x00000000 BYTE7 @@ -6269,7 +6275,7 @@ V1.0 - Original release Dec 2015 BYTE8 Data Byte 8 [7:0] - + @@ -6288,8 +6294,8 @@ V1.0 - Original release Dec 2015 BYTE6 Data Byte 6 [7:0] - - + + DATA1_CMB8 @@ -6306,8 +6312,8 @@ V1.0 - Original release Dec 2015 BYTE4 Data Byte 4 [7:0] - - + + DATA0_CMB8 @@ -6325,36 +6331,36 @@ V1.0 - Original release Dec 2015 BYTE2 Data Byte 2 [7:0] - - + + ID0_CMB8 CAN Frame Identifier Word 0 0x118 - 0x00000000 + 0x00000000 ID0 Half of CAN Frame ID. Format Varies for Standard or Extended Frames [15:0] - + ID1_CMB8 CAN Frame Identifier Word 1 0x11C - 0x00000000 + 0x00000000 ID1 Half of CAN Frame ID. Format Varies for Standard or Extended Frames [15:0] - - - + + + CNSTAT_CMB9 Buffer Status / Control Register 0x120 @@ -6394,7 +6400,7 @@ V1.0 - Original release Dec 2015 DATA3_CMB9 CAN Frame Data Word 3 0x128 - 0x00000000 + 0x00000000 BYTE7 @@ -6405,7 +6411,7 @@ V1.0 - Original release Dec 2015 BYTE8 Data Byte 8 [7:0] - + @@ -6424,8 +6430,8 @@ V1.0 - Original release Dec 2015 BYTE6 Data Byte 6 [7:0] - - + + DATA1_CMB9 @@ -6433,7 +6439,6 @@ V1.0 - Original release Dec 2015 0x130 0x00000000 - BYTE3 Data Byte 3 @@ -6443,8 +6448,8 @@ V1.0 - Original release Dec 2015 BYTE4 Data Byte 4 [7:0] - - + + DATA0_CMB9 @@ -6462,36 +6467,36 @@ V1.0 - Original release Dec 2015 BYTE2 Data Byte 2 [7:0] - - + + ID0_CMB9 CAN Frame Identifier Word 0 0x138 - 0x00000000 + 0x00000000 ID0 Half of CAN Frame ID. Format Varies for Standard or Extended Frames [15:0] - + ID1_CMB9 CAN Frame Identifier Word 1 0x13C - 0x00000000 + 0x00000000 ID1 Half of CAN Frame ID. Format Varies for Standard or Extended Frames [15:0] - - - + + + CNSTAT_CMB10 Buffer Status / Control Register 0x140 @@ -6531,7 +6536,7 @@ V1.0 - Original release Dec 2015 DATA3_CMB10 CAN Frame Data Word 3 0x148 - 0x00000000 + 0x00000000 BYTE7 @@ -6542,7 +6547,7 @@ V1.0 - Original release Dec 2015 BYTE8 Data Byte 8 [7:0] - + @@ -6561,8 +6566,8 @@ V1.0 - Original release Dec 2015 BYTE6 Data Byte 6 [7:0] - - + + DATA1_CMB10 @@ -6579,8 +6584,8 @@ V1.0 - Original release Dec 2015 BYTE4 Data Byte 4 [7:0] - - + + DATA0_CMB10 @@ -6598,36 +6603,36 @@ V1.0 - Original release Dec 2015 BYTE2 Data Byte 2 [7:0] - - + + ID0_CMB10 CAN Frame Identifier Word 0 0x158 - 0x00000000 + 0x00000000 ID0 Half of CAN Frame ID. Format Varies for Standard or Extended Frames [15:0] - + ID1_CMB10 CAN Frame Identifier Word 1 0x15C - 0x00000000 + 0x00000000 ID1 Half of CAN Frame ID. Format Varies for Standard or Extended Frames [15:0] - - - + + + CNSTAT_CMB11 Buffer Status / Control Register 0x160 @@ -6638,7 +6643,6 @@ V1.0 - Original release Dec 2015 Data Length Code [15:12] - PRI Transmit Priority Code @@ -6668,7 +6672,7 @@ V1.0 - Original release Dec 2015 DATA3_CMB11 CAN Frame Data Word 3 0x168 - 0x00000000 + 0x00000000 BYTE7 @@ -6679,7 +6683,7 @@ V1.0 - Original release Dec 2015 BYTE8 Data Byte 8 [7:0] - + @@ -6698,8 +6702,8 @@ V1.0 - Original release Dec 2015 BYTE6 Data Byte 6 [7:0] - - + + DATA1_CMB11 @@ -6716,8 +6720,8 @@ V1.0 - Original release Dec 2015 BYTE4 Data Byte 4 [7:0] - - + + DATA0_CMB11 @@ -6735,36 +6739,36 @@ V1.0 - Original release Dec 2015 BYTE2 Data Byte 2 [7:0] - - + + ID0_CMB11 CAN Frame Identifier Word 0 0x178 - 0x00000000 + 0x00000000 ID0 Half of CAN Frame ID. Format Varies for Standard or Extended Frames [15:0] - + ID1_CMB11 CAN Frame Identifier Word 1 0x17C - 0x00000000 + 0x00000000 ID1 Half of CAN Frame ID. Format Varies for Standard or Extended Frames [15:0] - - - + + + CNSTAT_CMB12 Buffer Status / Control Register 0x180 @@ -6804,7 +6808,7 @@ V1.0 - Original release Dec 2015 DATA3_CMB12 CAN Frame Data Word 3 0x188 - 0x00000000 + 0x00000000 BYTE7 @@ -6815,7 +6819,7 @@ V1.0 - Original release Dec 2015 BYTE8 Data Byte 8 [7:0] - + @@ -6834,8 +6838,8 @@ V1.0 - Original release Dec 2015 BYTE6 Data Byte 6 [7:0] - - + + DATA1_CMB12 @@ -6852,8 +6856,8 @@ V1.0 - Original release Dec 2015 BYTE4 Data Byte 4 [7:0] - - + + DATA0_CMB12 @@ -6871,36 +6875,36 @@ V1.0 - Original release Dec 2015 BYTE2 Data Byte 2 [7:0] - - + + ID0_CMB12 CAN Frame Identifier Word 0 0x198 - 0x00000000 + 0x00000000 ID0 Half of CAN Frame ID. Format Varies for Standard or Extended Frames [15:0] - + ID1_CMB12 CAN Frame Identifier Word 1 0x19C - 0x00000000 + 0x00000000 ID1 Half of CAN Frame ID. Format Varies for Standard or Extended Frames [15:0] - - - + + + CNSTAT_CMB13 Buffer Status / Control Register 0x1A0 @@ -6940,7 +6944,7 @@ V1.0 - Original release Dec 2015 DATA3_CMB13 CAN Frame Data Word 3 0x1A8 - 0x00000000 + 0x00000000 BYTE7 @@ -6951,7 +6955,7 @@ V1.0 - Original release Dec 2015 BYTE8 Data Byte 8 [7:0] - + @@ -6970,8 +6974,8 @@ V1.0 - Original release Dec 2015 BYTE6 Data Byte 6 [7:0] - - + + DATA1_CMB13 @@ -6988,8 +6992,8 @@ V1.0 - Original release Dec 2015 BYTE4 Data Byte 4 [7:0] - - + + DATA0_CMB13 @@ -7007,36 +7011,36 @@ V1.0 - Original release Dec 2015 BYTE2 Data Byte 2 [7:0] - - + + ID0_CMB13 CAN Frame Identifier Word 0 0x1B8 - 0x00000000 + 0x00000000 ID0 Half of CAN Frame ID. Format Varies for Standard or Extended Frames [15:0] - + ID1_CMB13 CAN Frame Identifier Word 1 0x1BC - 0x00000000 + 0x00000000 ID1 Half of CAN Frame ID. Format Varies for Standard or Extended Frames [15:0] - - - + + + CNSTAT_CMB14 Buffer Status / Control Register 0x1C0 @@ -7076,7 +7080,7 @@ V1.0 - Original release Dec 2015 DATA3_CMB14 CAN Frame Data Word 3 0x1C8 - 0x00000000 + 0x00000000 BYTE7 @@ -7087,7 +7091,7 @@ V1.0 - Original release Dec 2015 BYTE8 Data Byte 8 [7:0] - + @@ -7106,8 +7110,8 @@ V1.0 - Original release Dec 2015 BYTE6 Data Byte 6 [7:0] - - + + DATA1_CMB14 @@ -7124,8 +7128,8 @@ V1.0 - Original release Dec 2015 BYTE4 Data Byte 4 [7:0] - - + + DATA0_CMB14 @@ -7143,36 +7147,36 @@ V1.0 - Original release Dec 2015 BYTE2 Data Byte 2 [7:0] - - + + ID0_CMB14 CAN Frame Identifier Word 0 0x1D8 - 0x00000000 + 0x00000000 ID0 Half of CAN Frame ID. Format Varies for Standard or Extended Frames [15:0] - + ID1_CMB14 CAN Frame Identifier Word 1 0x1DC - 0x00000000 + 0x00000000 ID1 Half of CAN Frame ID. Format Varies for Standard or Extended Frames [15:0] - - - + + + CNSTAT_HCMB Buffer Status / Control Register 0x1E0 @@ -7212,7 +7216,7 @@ V1.0 - Original release Dec 2015 DATA3_HCMB CAN Frame Data Word 3 0x1E8 - 0x00000000 + 0x00000000 BYTE7 @@ -7223,7 +7227,7 @@ V1.0 - Original release Dec 2015 BYTE8 Data Byte 8 [7:0] - + @@ -7242,8 +7246,8 @@ V1.0 - Original release Dec 2015 BYTE6 Data Byte 6 [7:0] - - + + DATA1_HCMB @@ -7260,8 +7264,8 @@ V1.0 - Original release Dec 2015 BYTE4 Data Byte 4 [7:0] - - + + DATA0_HCMB @@ -7279,40 +7283,40 @@ V1.0 - Original release Dec 2015 BYTE2 Data Byte 2 [7:0] - - + + ID0_HCMB CAN Frame Identifier Word 0 0x1F8 - 0x00000000 + 0x00000000 ID0 Half of CAN Frame ID. Format Varies for Standard or Extended Frames [15:0] - + ID1_HCMB CAN Frame Identifier Word 1 0x1FC - 0x00000000 + 0x00000000 ID1 Half of CAN Frame ID. Format Varies for Standard or Extended Frames [15:0] - - - + + + CGCR CAN Global Configuration Register 0x200 - 0x00000000 + 0x00000000 EIT @@ -7373,14 +7377,14 @@ V1.0 - Original release Dec 2015 CANEN CAN Enable [0:0] - - - - + + + + CTIM CAN Timing Register 0x204 - 0x00000000 + 0x00000000 PSC @@ -7401,106 +7405,106 @@ V1.0 - Original release Dec 2015 TSEG2 Time Segment 2 [2:0] - - - - + + + + GMSKX CAN Global Mask Extension 0x208 - 0x00000000 + 0x00000000 GM GM[14:0] used when an extended frame is received. ID[14:0] in extended, unused standard [15:1] - + XRTR Extended Remote transmission Request Bit [0:0] - - - - + + + + GMSKB CAN Global Mask Base 0x20C - 0x00000000 + 0x00000000 GM1 GM[28:18] - ID[10:0] in standard, ID[28:18] in extended [15:5] - + RTR Remote Transmission Request in Standard, Substitute Remote Request (SRR) in extended [4:4] - + IDE Identifier Extension Bit [3:3] - + GM0 GM[17:15] - Unused in standard, ID[17:15] in extended [2:0] - - - - + + + + BMSKX CAN Basic Mask Extension 0x210 - 0x00000000 + 0x00000000 BM BM[14:0] used when an extended frame is received. ID[14:0] in extended, unused standard [15:1] - + XRTR Extended Remote transmission Request Bit [0:0] - - - - + + + + BMSKB CAN Basic Mask Base 0x214 - 0x00000000 + 0x00000000 BM1 BM[28:18] - ID[10:0] in standard, ID[28:18] in extended [15:5] - + RTR Remote Transmission Request in Standard, Substitute Remote Request (SRR) in extended [4:4] - + IDE Identifier Extension Bit [3:3] - + BM0 BM[17:15] - Unused in standard, ID[17:15] in extended [2:0] - - - - + + + + CIEN CAN Interrupt Enable Register 0x218 - 0x00000000 + 0x00000000 EIEN @@ -7511,14 +7515,14 @@ V1.0 - Original release Dec 2015 IEN Buffer Interrupt Enable[14:0] [14:0] - - - - + + + + CIPND CAN Interrupt Pending Register 0x21C - 0x00000000 + 0x00000000 EIPND @@ -7529,14 +7533,14 @@ V1.0 - Original release Dec 2015 IPND Buffer Interrupt Pending[14:0] [14:0] - - - - + + + + CICLR CAN Interrupt Clear Register 0x220 - 0x00000000 + 0x00000000 EICLR @@ -7547,14 +7551,14 @@ V1.0 - Original release Dec 2015 ICLR Buffer Interrupt Clear[14:0] [14:0] - - - - + + + + CICEN CAN Interrupt Code Enable Register 0x224 - 0x00000000 + 0x00000000 EICEN @@ -7565,14 +7569,14 @@ V1.0 - Original release Dec 2015 ICEN Buffer Interrupt Code Enable[14:0] [14:0] - - - - + + + + CSTPND CAN Status Pending Register 0x228 - 0x00000000 + 0x00000000 NS @@ -7588,14 +7592,14 @@ V1.0 - Original release Dec 2015 IST Interrupt Source portion of Interrupt Code [3:0] - - - - + + + + CANEC CAN Error Counter Register 0x22C - 0x00000000 + 0x00000000 REC @@ -7606,14 +7610,14 @@ V1.0 - Original release Dec 2015 TEC Transmit Error Counter [7:0] - - - - + + + + CEDIAG CAN Error Diagnostic Register 0x230 - 0x00000000 + 0x00000000 DRIVE @@ -7649,32 +7653,32 @@ V1.0 - Original release Dec 2015 EFID Error Field Identifier [3:0] - - - - + + + + CTMR CAN Timer Register 0x234 - 0x00000000 + 0x00000000 CTMR Time Stamp Counter [15:0] - read-only + read-only - - + + - + CAN1 0x40014400 - - - - + + + + ADC 1.0 Analog to Digital Converter Peripheral @@ -7685,10 +7689,10 @@ V1.0 - Original release Dec 2015 0x00001000 registers - + ADC 44 - + ADC @@ -7711,7 +7715,7 @@ V1.0 - Original release Dec 2015 EXT_TRIG_EN Allows the external trigger to start analog acquisition [18:18] - + SWEEP_EN ADC data acquisition for all enabled channel @@ -7726,27 +7730,27 @@ V1.0 - Original release Dec 2015 CHAN_EN Enables the channel for data collection [15:0] - + FIFO_DATA FIFO data 0x004 - read-only - 0x00000000 + read-only + 0x00000000 CHAN_TAG If enabled, this will include the number of the channel corresponding to the measurement [15:12] - read-only + read-only ADC_DATA ADC acquisition data from the FIFO [11:0] - + @@ -7765,8 +7769,8 @@ V1.0 - Original release Dec 2015 FIFO_ENTRY_CNT Indicates the number of entries in the FIFO [5:0] - - + + IRQ_ENB @@ -7783,33 +7787,33 @@ V1.0 - Original release Dec 2015 TRIG_ERROR Enables the interrupt for a trigger error [5:5] - + ADC_DONE Enables the interrupt for an ADC data acquisition completion [4:4] - + FIFO_UFLOW Enables the interrupt for a FIFO underflow [3:3] - + FIFO_OFLOW Enables the interrupt for a FIFO overflow [2:2] - + FIFO_FULL Enables the interrupt for FIFO full [1:1] - + FIFO_EMPTY Enables the interrupt for FIFO empty [0:0] - - + + IRQ_RAW @@ -7827,40 +7831,40 @@ V1.0 - Original release Dec 2015 TRIG_ERROR Indicates a manual or external trigger occurred when the ADC was BUSY doing a conversion [5:5] - + ADC_DONE Indicates that a ADC conversion is done [4:4] - + FIFO_UFLOW Indicates data was unavailable when a new trigger for ADC update is received [3:3] - + FIFO_OFLOW Indicates a FIFO overflow occurred (FIFO was full when new data was written) [2:2] - + FIFO_FULL Indicates the FIFO is full [1:1] - + FIFO_EMPTY Indicates the FIFO is empty [0:0] - - + + IRQ_END Enabled Interrupt Status 0x014 - read-only - 0x00000000 + read-only + 0x00000000 FIFO_DEPTH_TRIG @@ -7871,62 +7875,62 @@ V1.0 - Original release Dec 2015 TRIG_ERROR Indicates a manual or external trigger occurred when the ADC was BUSY doing a conversion and the interrupt is enabled [5:5] - + ADC_DONE Indicates that a ADC conversion is done and the interrupt is enabled [4:4] - + FIFO_UFLOW Indicates a FIFO underflow occurred and the interrupt is enabled [3:3] - + FIFO_OFLOW Indicates a FIFO overflow occurred and the interrupt is enabled [2:2] - + FIFO_FULL Indicates the FIFO is full and the interrupt is enabled [1:1] - + FIFO_EMPTY Indicates the FIFO is empty and the interrupt is enabled [0:0] - - + + IRQ_CLR Clear Interrupt 0x018 - write-only - 0x00000000 + write-only + 0x00000000 TRIG_ERROR Clears the trigger error interrupt status. Always reads 0 [3:3] - + ADC_DONE Clears the ADC done interrupt status. Always reads 0 [2:2] - + FIFO_UFLOW Clears the FIFO underflow interrupt status. Always reads 0 [1:1] - + FIFO_OFLOW Clears the FIFO overflow interrupt status. Always reads 0 [0:0] - - + + RXFIFOIRQTRG @@ -7945,13 +7949,13 @@ V1.0 - Original release Dec 2015 FIFO_CLR FIFO Clear 0x020 - 0x00000000 + 0x00000000 FIFO_CLR Clears the ADC FIFO. Always reads 0 [0:0] - write-only + write-only @@ -7961,12 +7965,12 @@ V1.0 - Original release Dec 2015 0xffc read-only 0x001907e9 - + - - - - + + + + DAC0 1.0 Digital to Analog Converter Peripheral @@ -7977,14 +7981,14 @@ V1.0 - Original release Dec 2015 0x00000800 registers - + DAC0 40 - - + + DAC1 41 - + DAC @@ -8002,7 +8006,7 @@ V1.0 - Original release Dec 2015 EXT_TRIG_EN Enables external trigger [10:10] - + @@ -8020,22 +8024,22 @@ V1.0 - Original release Dec 2015 DAC_SETTLING Sets the the amount of time in microseconds the control FSM waits for the DAC settling time [7:5] - + FIFO_DATA FIFO data 0x008 - read-write - 0x00000000 + read-write + 0x00000000 DATA Data for FIFO write [11:0] - write-only - + write-only + @@ -8054,8 +8058,8 @@ V1.0 - Original release Dec 2015 FIFO_ENTRY_CNT Indicates the number of entries in the FIFO [5:0] - - + + IRQ_ENB @@ -8072,33 +8076,33 @@ V1.0 - Original release Dec 2015 TRIG_ERROR Enables the interrupt for a trigger error [5:5] - + DAC_DONE Enables the interrupt for a DAC data acquisition completion [4:4] - + FIFO_UFLOW Enables the interrupt for a FIFO underflow [3:3] - + FIFO_OFLOW Enables the interrupt for a FIFO overflow [2:2] - + FIFO_FULL Enables the interrupt for FIFO full [1:1] - + FIFO_EMPTY Enables the interrupt for FIFO empty [0:0] - - + + IRQ_RAW @@ -8116,40 +8120,40 @@ V1.0 - Original release Dec 2015 TRIG_ERROR Indicates a manual or external trigger occurred when the DAC was BUSY doing a conversion [5:5] - + DAC_DONE Indicates that a DAC conversion is done [4:4] - + FIFO_UFLOW Indicates data was unavailable when a new trigger for DAC update is received [3:3] - + FIFO_OFLOW Indicates a FIFO overflow occurred (FIFO was full when new data was written) [2:2] - + FIFO_FULL Indicates the FIFO is full [1:1] - + FIFO_EMPTY Indicates the FIFO is empty [0:0] - - + + IRQ_END Enabled Interrupt Status 0x018 - read-only - 0x00000000 + read-only + 0x00000000 FIFO_DEPTH_TRIG @@ -8160,62 +8164,62 @@ V1.0 - Original release Dec 2015 TRIG_ERROR Indicates a manual or external trigger occurred when the DAC was BUSY doing a conversion and the interrupt is enabled [5:5] - + DAC_DONE Indicates that a DAC conversion is done and the interrupt is enabled [4:4] - + FIFO_UFLOW Indicates a FIFO underflow occurred and the interrupt is enabled [3:3] - + FIFO_OFLOW Indicates a FIFO overflow occurred and the interrupt is enabled [2:2] - + FIFO_FULL Indicates the FIFO is full and the interrupt is enabled [1:1] - + FIFO_EMPTY Indicates the FIFO is empty and the interrupt is enabled [0:0] - - + + IRQ_CLR Clear Interrupt 0x01C - write-only - 0x00000000 + write-only + 0x00000000 TRIG_ERROR Clears the trigger error interrupt status. Always reads 0 [3:3] - + DAC_DONE Clears the DAC done interrupt status. Always reads 0 [2:2] - + FIFO_UFLOW Clears the FIFO underflow interrupt status. Always reads 0 [1:1] - + FIFO_OFLOW Clears the FIFO overflow interrupt status. Always reads 0 [0:0] - - + + TXFIFOIRQTRG @@ -8234,32 +8238,32 @@ V1.0 - Original release Dec 2015 FIFO_CLR FIFO Clear 0x024 - 0x00000000 + 0x00000000 FIFO_CLR Clears the DAC FIFO. Always reads 0 [0:0] - write-only + write-only - + PERID Peripheral ID Register 0x7fc read-only 0x002007e9 - + - + DAC1 0x40023800 - - - - + + + + SPW 1.0 SpaceWire Peripheral @@ -8273,7 +8277,7 @@ V1.0 - Original release Dec 2015 SpW 38 - + SPW @@ -8286,153 +8290,156 @@ V1.0 - Original release Dec 2015 RA Reads as 1 if the RMAP command handler is available [31:31] - read-only + read-only RX Reads as 1 if unaligned writes are available for the receiver [30:30] - read-only - + read-only + RC Reads as 1 if RMAP CRC is enabled in the core [29:29] - read-only + read-only NCH Number of DMA Channels minus one [28:27] - read-only - + read-only + PO The number of available SpaceWire ports minus one [26:26] - read-only + read-only CC CCSDS/CCITT CRC-16 [25:25] - read-only - + read-only + ID Interrupt distribution available [24:24] - read-only + read-only LE Loop-back Enable [22:22] - read-write - + read-write + PS Selects the active port when the no port force bit is zero [21:21] - read-write - + read-write + NP Disable port force [20:20] - read-write - + read-write + PNPA SpW Plug-and-Play Available [19:18] - read-only - + read-only + RD If set only one RMAP buffer is used [17:17] - read-write - + read-write + RE Enable RMAP command handler [16:16] - read-write - + read-write + PE SpW Plug-and-Play Enable [15:15] - read-write + read-write TL Transmitter Enable Lock Control [13:13] - read-write - + read-write + TF Time-code Flag Filter [12:12] - read-write - + read-write + TR Enable time-code receptions [11:11] - + TT Enable time-code transmissions [10:10] - + LI Generate interrupt when link error occurs [9:9] - + TQ Generate interrupt when a valid time-code is received [8:8] - + + RS Make complete reset of the SpaceWire node. Self-clearing [6:6] - + + PM Enable Promiscuous mode [5:5] - + + TI The host can generate a tick by writing a one to this field [4:4] - + IE If set, an interrupt is generated when one or both of bit 8 to 9 is set and its corresponding event occurs [3:3] - + AS Automatically start the link when a NULL has been received [2:2] - + LS Start the link [1:1] - + LD Disable the SpaceWire CODEC [0:0] - + - + STS Status/Interrupt Source Register 0x004 @@ -8442,12 +8449,12 @@ V1.0 - Original release Dec 2015 NRXD Number of Receive Descriptors [27:26] - + NTXD Number of Transmit Descriptors [25:24] - + LS Link State @@ -8457,12 +8464,12 @@ V1.0 - Original release Dec 2015 AP Active port [9:9] - + EE Set to one when a packet is received with an EOP after the first byte for a non-RMAP packet and after the second byte for a RMAP packet [8:8] - + IA Packet is received with an invalid destination address field @@ -8497,26 +8504,26 @@ V1.0 - Original release Dec 2015 TO A new time count value was received [0:0] - + DEFADDR Node Address Register 0x008 - read-write - 0x000000FE + read-write + 0x000000FE DEFMASK 8-bit default mask used for node identification on the SpaceWire network [15:8] - + DEFADDR 8-bit node address used for node identification on the SpaceWire network [7:0] - + @@ -8535,21 +8542,21 @@ V1.0 - Original release Dec 2015 CLKDIVRUN 8-bit Clock divisor value used for the clock-divider when the link-interface is in the run-state [7:0] - - + + DKEY Destination Key 0x010 0x00000000 - + DESTKEY RMAP destination key [7:0] - - + + TC @@ -8567,15 +8574,15 @@ V1.0 - Original release Dec 2015 TIMECNT The current value of the system time counter [5:0] - - + + - + TDR Timer and Disconnect Register 0x018 - read-only - 0x00000000 + read-only + 0x00000000 DISCONNECT @@ -8586,15 +8593,15 @@ V1.0 - Original release Dec 2015 TIMER64 Used to generate the 6.4 and 12.8 us time periods [11:0] - - + + DMACTRL0 DMA Control Register 0x020 - read-write - 0x00000000 + read-write + 0x00000000 INTNUM @@ -8605,42 +8612,42 @@ V1.0 - Original release Dec 2015 EP EEP Termination [23:23] - + TR Truncated [22:22] - + IE Interrupt code transmit enable on EEP [21:21] - + IT Interrupt code transmit enable on truncation [20:20] - + RP Receive Packet IRQ [19:19] - + TP Transmit Packet IRQ [18:18] - + TL Transmit Enable Lock [17:17] - + LE Disable transmitter when a link error occurs [16:16] - + SP Strip PID @@ -8655,81 +8662,81 @@ V1.0 - Original release Dec 2015 EN Enable Address [13:13] - + NS If cleared, packets will be discarded when a packet is arriving and there are no active descriptors. If set, the GRSPW will wait for a descriptor to be activated [12:12] - + RD Indicates to the GRSPW that there are enabled descriptors in the descriptor table [11:11] - + RX Reception to the DMA channel is currently active [10:10] - read-only - + read-only + AT Abort the currently transmitting packet and disable transmissions [9:9] - read-only - + read-only + RA An error response was detected on the AHB bus - DMA receive [8:8] - + TA An error response was detected on the AHB bus - DMA transmit [7:7] - + PR Set each time a packet has been received [6:6] - + PS Set each time a packet has been sent [5:5] - + AI An interrupt will be generated each time an AHB error occurs when this DMA channel is accessing the bus [4:4] - + RI An interrupt will be generated each time a packet has been received [3:3] - + TI An interrupt will be generated each time a packet is transmitted [2:2] - + RE Packets are allowed to be received to this channel [1:1] - + TE Write a one to this bit each time new descriptors are activated in the table [0:0] - - + + DMAMAXLEN0 DMA RX Maximum Length Register 0x024 - read-write + read-write 0x00000000 @@ -8743,8 +8750,8 @@ V1.0 - Original release Dec 2015 DMATXDESC0 DMA Transmitter Descriptor Table Address Register 0x028 - read-write - 0x00000000 + read-write + 0x00000000 DESCBASEADDR @@ -8755,7 +8762,7 @@ V1.0 - Original release Dec 2015 DESCSEL Offset into the descriptor table [9:4] - + @@ -8775,8 +8782,8 @@ V1.0 - Original release Dec 2015 Offset into the descriptor table [9:3] - - + + DMAADDR0 DMA Receiver Table Address Register @@ -8794,9 +8801,9 @@ V1.0 - Original release Dec 2015 Address [7:0] - - - - - - - + + - + IRQ_ROUTER 1.0 Interrupt Router Peripheral @@ -9369,95 +9376,95 @@ V1.0 - Original release Dec 2015 0x00001000 registers - + U0 0 - - + + U1 1 - - + + U2 2 - - + + U3 3 - - + + U4 4 - - + + U5 5 - - + + U6 6 - - + + U7 7 - - + + U8 8 - - + + U9 9 - - + + U10 10 - - + + U11 11 - - + + U12 12 - - + + U13 13 - - + + U14 14 - - + + U15 15 - - + + U37 37 - - + + U39 39 - - + + U73 73 - - + + U75 75 - - + + FPU 194 - - + + TXEV 195 - - IRQ + + IRQ DMASEL0 @@ -9471,7 +9478,7 @@ V1.0 - Original release Dec 2015 DMA trigger source selection value [6:0] - + DMASEL1 @@ -9485,7 +9492,7 @@ V1.0 - Original release Dec 2015 DMA trigger source selection value [6:0] - + DMASEL2 @@ -9499,7 +9506,7 @@ V1.0 - Original release Dec 2015 DMA trigger source selection value [6:0] - + DMASEL3 @@ -9513,8 +9520,8 @@ V1.0 - Original release Dec 2015 DMA trigger source selection value [6:0] - - + + DMATTSEL Trigger select for the DMA channels @@ -9527,8 +9534,8 @@ V1.0 - Original release Dec 2015 DMA trigger type selection value [3:0] - - + + ADCSEL Interrupt select for ADC @@ -9541,8 +9548,8 @@ V1.0 - Original release Dec 2015 ADC trigger source selection value [4:0] - - + + DACSEL0 Interrupt select for DAC0 @@ -9555,8 +9562,8 @@ V1.0 - Original release Dec 2015 DAC trigger source selection value [4:0] - - + + DACSEL1 Interrupt select for DAC1 @@ -9569,8 +9576,8 @@ V1.0 - Original release Dec 2015 DAC trigger source selection value [4:0] - - + + IRQ_OUT0 DEBUG IRQ_OUT[31:0] @@ -9583,8 +9590,8 @@ V1.0 - Original release Dec 2015 IRQ_OUT[31:0] [31:0] - - + + IRQ_OUT1 DEBUG IRQ_OUT[63:32] @@ -9597,8 +9604,8 @@ V1.0 - Original release Dec 2015 IRQ_OUT[63:32] [31:0] - - + + IRQ_OUT2 DEBUG IRQ_OUT[95:64] @@ -9611,8 +9618,8 @@ V1.0 - Original release Dec 2015 IRQ_OUT[95:64] [31:0] - - + + IRQ_OUT3 DEBUG IRQ_OUT[127:96] @@ -9625,8 +9632,8 @@ V1.0 - Original release Dec 2015 IRQ_OUT[127:96] [31:0] - - + + IRQ_OUT4 DEBUG IRQ_OUT[159:128] @@ -9639,8 +9646,8 @@ V1.0 - Original release Dec 2015 IRQ_OUT[159:128] [31:0] - - + + IRQ_OUT5 DEBUG IRQ_OUT[179:160] @@ -9653,20 +9660,20 @@ V1.0 - Original release Dec 2015 IRQ_OUT[179:160] [19:0] - - + + PERID Peripheral ID Register 0xffc read-only 0x028107e9 - + - - + + - + WATCH_DOG 1.0 Watchdog Block Peripheral @@ -9676,11 +9683,11 @@ V1.0 - Original release Dec 2015 0x00001000 registers - + WATCHDOG 47 - - WDOG + + WDOG WDOGLOAD @@ -9694,8 +9701,8 @@ V1.0 - Original release Dec 2015 Count to load [31:0] - - + + WDOGVALUE Down Counter Value @@ -9708,8 +9715,8 @@ V1.0 - Original release Dec 2015 Actual Count [31:0] - - + + WDOGCONTROL Enable for block reset and interrupt @@ -9726,9 +9733,9 @@ V1.0 - Original release Dec 2015 INTEN Enable watchdog interrupt [0:0] - - - + + + WDOGINTCLR A write of any value clears the WDT module interrupt, and reloads @@ -9742,8 +9749,8 @@ the counter from the value in the WDOGLOAD Register Write any value to clear interrupt [31:0] - - + + WDOGRIS Raw interrupt status @@ -9756,8 +9763,8 @@ the counter from the value in the WDOGLOAD Register Interrupt Status [0:0] - - + + WDOGMIS Interrupt status @@ -9770,8 +9777,8 @@ the counter from the value in the WDOGLOAD Register Masked Interrupt Status [0:0] - - + + WDOGLOCK Lock @@ -9784,8 +9791,8 @@ the counter from the value in the WDOGLOAD Register Register write enable status [31:0] - - + + WDOGITCR Integration test control @@ -9798,8 +9805,8 @@ the counter from the value in the WDOGLOAD Register Enable test mode of WDOGINT and WDOGRES [0:0] - - + + WDOGITOP Integration test output set @@ -9816,9 +9823,9 @@ the counter from the value in the WDOGLOAD Register WDOGRES Set output value [0:0] - - - + + + WDOGPERIPHID0 Peripheral ID @@ -9831,8 +9838,8 @@ the counter from the value in the WDOGLOAD Register Peripheral ID [7:0] - - + + WDOGPERIPHID1 Peripheral ID @@ -9845,8 +9852,8 @@ the counter from the value in the WDOGLOAD Register Peripheral ID [7:0] - - + + WDOGPERIPHID2 Peripheral ID @@ -9859,8 +9866,8 @@ the counter from the value in the WDOGLOAD Register Peripheral ID [7:0] - - + + WDOGPERIPHID3 Peripheral ID @@ -9873,8 +9880,8 @@ the counter from the value in the WDOGLOAD Register Peripheral ID [7:0] - - + + WDOGPCELLID0 PrimeCell ID @@ -9887,8 +9894,8 @@ the counter from the value in the WDOGLOAD Register Prime Cell ID [7:0] - - + + WDOGPCELLID1 PrimeCell ID @@ -9901,8 +9908,8 @@ the counter from the value in the WDOGLOAD Register Prime Cell ID [7:0] - - + + WDOGPCELLID2 PrimeCell ID @@ -9915,8 +9922,8 @@ the counter from the value in the WDOGLOAD Register Prime Cell ID [7:0] - - + + WDOGPCELLID3 PrimeCell ID @@ -9929,13 +9936,13 @@ the counter from the value in the WDOGLOAD Register Prime Cell ID [7:0] - - + + - - + + - + TRNG 1.0 True Random Number Generator @@ -9945,11 +9952,11 @@ the counter from the value in the WDOGLOAD Register 0x00000400 registers - + TRNG 42 - - TRNG + + TRNG IMR @@ -9977,9 +9984,9 @@ the counter from the value in the WDOGLOAD Register EHR_VALID_INT_MASK Mask when the TRNG has collected 192 bits [0:0] - - - + + + ISR Interrupt Status Register @@ -10006,9 +10013,9 @@ the counter from the value in the WDOGLOAD Register EHR_VALID 192 bits have been collected in the TRNG [0:0] - - - + + + ICR Interrupt Clear Register @@ -10035,9 +10042,9 @@ the counter from the value in the WDOGLOAD Register EHR_VALID Set to 1 after the EHR_DATA[0,1,2,3,4,5] registers have been read [0:0] - - - + + + CONFIG Configuration Register @@ -10050,8 +10057,8 @@ the counter from the value in the WDOGLOAD Register Selects the number of inverters (out of four possible selections) in the ring oscillator [1:0] - - + + VALID Valid Register @@ -10064,8 +10071,8 @@ the counter from the value in the WDOGLOAD Register Indicates that the collection of bits in the TRNG is complete [0:0] - - + + EHR_DATA0 Entropy Holding Register Data Register @@ -10078,33 +10085,33 @@ the counter from the value in the WDOGLOAD Register 32 Bits of Entropy Holding Register [31:0] - - + + EHR_DATA1 Entropy Holding Register Data Register 0x0118 - + EHR_DATA2 Entropy Holding Register Data Register 0x011C - + EHR_DATA3 Entropy Holding Register Data Register 0x0120 - + EHR_DATA4 Entropy Holding Register Data Register 0x0124 - + EHR_DATA5 Entropy Holding Register Data Register 0x0128 - + RND_SOURCE_ENABLE Random Source Enable Register @@ -10117,8 +10124,8 @@ the counter from the value in the WDOGLOAD Register The entropy source, ring oscillator, is enabled [0:0] - - + + SAMPLE_CNT1 Section TBD @@ -10131,8 +10138,8 @@ the counter from the value in the WDOGLOAD Register Sets the number of clk cycles between two consecutive ring oscillator samples [31:0] - - + + AUTOCORR_STATISTIC Auto-correlator Statistic Register @@ -10149,9 +10156,9 @@ the counter from the value in the WDOGLOAD Register AUTOCORR_TRYS Count each time an autocorrelation test starts [13:0] - - - + + + DEBUG_CONTROL Section TBD @@ -10173,9 +10180,9 @@ the counter from the value in the WDOGLOAD Register VNC_PYPASS The Von Neumann balancer is bypassed [1:1] - - - + + + SW_RESET Reset Register @@ -10188,8 +10195,8 @@ the counter from the value in the WDOGLOAD Register Writing 1 to this register causes an internal TRNG reset [0:0] - - + + BUSY Busy Register @@ -10202,8 +10209,8 @@ the counter from the value in the WDOGLOAD Register Reflects the status of the rng_busy signal [0:0] - - + + RST_BITS_COUNTER Reset Bits Counter Register @@ -10216,8 +10223,8 @@ the counter from the value in the WDOGLOAD Register Writing any value to this bit resets the bits counter and TRNG valid registers [0:0] - - + + BIST_CNTR0 BIST Counter Register @@ -10230,23 +10237,23 @@ the counter from the value in the WDOGLOAD Register Returns the results of the TRNG BIST counter [21:0] - - - + + + BIST_CNTR1 BIST Counter Register 0x01E4 - - + + BIST_CNTR2 BIST Counter Register 0x01E8 - + - - + + - + ETH 1.1 Ethernet Block @@ -10256,12 +10263,12 @@ the counter from the value in the WDOGLOAD Register 0x00002000 registers - + Ethernet 36 - - ETH - + + ETH + MAC_CONFIG @@ -10274,99 +10281,99 @@ the counter from the value in the WDOGLOAD Register WD Watchdog disable [23:23] - + JD Jabber Disable [22:22] - + BE Frame Burst Enable [21:21] - + JE Jumbo Frame Enable [20:20] - + IFG Inter-Frame Gap [19:17] - + DCRS Disable Carrier Sense During Transmission [16:16] - + PS Port Select [15:15] - + FES Speed [14:14] - + DRO Disable Receive Own [13:13] - + LM Loopback Mode [12:12] - + DM Duplex Mode [11:11] - + IPC Checksum Offload [10:10] - + DR Disable Retry [9:9] - + ACS Automatic Pad, or CRC Stripping [7:7] - + BL Back-Off-Limit [6:5] - + DC Deferral Check [4:4] - + TE Transmitter Enable [3:3] - + RE Receiver Enable [2:2] - + PRELEN Preamble Length for Transmit frames [1:0] - - - + + + MAC_FRAME_FLTR Contains the frame filtering controls @@ -10378,69 +10385,69 @@ the counter from the value in the WDOGLOAD Register RA Receive All [31:31] - + DNTU Drop non TCP/UDP over IP Frames [21:21] - + VFTE VLAN Tag Filter Enable [16:16] - + HDF Hash or Perfect Filter [10:10] - + SAF Source Address Filter Enable [9:9] - + SAIF SA Inverse Filtering [8:8] - + PCF Pass Control Frames [7:6] - + DBF Disable Broadcast Frames [5:5] - + PM Pass All Multicast [4:4] - + DAIF DA Inverse Filtering [3:3] - + HMC Hash Multicast [2:2] - + HUC Hash Unicast [1:1] - + PR Promiscuous Mode [0:0] - - - + + + MAC_GMII_ADDR Controls the management cycles to an external PHY @@ -10452,29 +10459,29 @@ the counter from the value in the WDOGLOAD Register PA Physical Layer Address [15:11] - + GR GMII Register [10:6] - + CR CSR Clock Range [5:2] - + GW GMII Write/Read [1:1] - + GB GMII Busy [0:0] - - - + + + MAC_GMII_DATA Contains the data to be written to or read from the PHY register @@ -10486,9 +10493,9 @@ the counter from the value in the WDOGLOAD Register GD GMII Data [15:0] - - - + + + MAC_FLOW_CTRL Controls the generation of control frames @@ -10500,7 +10507,7 @@ the counter from the value in the WDOGLOAD Register PT Pause time [31:16] - + DZPQ Disable Zero-Quanta Pause @@ -10530,8 +10537,8 @@ the counter from the value in the WDOGLOAD Register FCB_BPA Flow Control Busy or Backpressure Activate [0:0] - - + + MAC_VLAN_TAG @@ -10544,23 +10551,23 @@ the counter from the value in the WDOGLOAD Register ESVL Enable S-VLAN [18:18] - + VTIM VLAN Tag Inverse Match Enable [17:17] - + ETV Enable 12-Bit VLAN Tag Comparison [16:16] - + VL VLAN Tag identifier for Receive Frames [15:0] - - + + MAC_DEBUG @@ -10573,7 +10580,7 @@ the counter from the value in the WDOGLOAD Register TXSTSFSTS MTL TxStatus FIFO Full Status [25:25] - + TXFSTS MTL Tx FIFO Not Empty Status @@ -10628,9 +10635,9 @@ the counter from the value in the WDOGLOAD Register RPESTS MAC GMII or MII Receive Protocol Engine Status [0:0] - - - + + + MAC_INTR_STAT Contains the interrupt status @@ -10663,8 +10670,8 @@ the counter from the value in the WDOGLOAD Register MMC Interrupt Status [4:4] - - + + MAC_INTR_MASK Contains the masks for generating interrupt @@ -10677,8 +10684,8 @@ the counter from the value in the WDOGLOAD Register Timestamp Interrupt Mask [9:9] - - + + MAC_ADDR_H Contains the high 16-bits of the first MAC Address @@ -10690,15 +10697,15 @@ the counter from the value in the WDOGLOAD Register AE Address Enable, This bit is always set to 1 [31:31] - read-only - + read-only + ADDRHI MAC Address0[47:32] [15:0] - read-only - - + read-only + + MAC_ADDR_L @@ -10711,10 +10718,10 @@ the counter from the value in the WDOGLOAD Register ADDRLO MAC Address0[31:0] [31:0] - read-only - - - + read-only + + + MAC_WDOG_TO Controls the watchdog time-out for received frames @@ -10726,15 +10733,15 @@ the counter from the value in the WDOGLOAD Register PWE Programmable Watchdog Enable [16:16] - + WTO Watchdog Timeout [13:0] - - - - + + + + MMC_CNTRL MMC Control Register @@ -10776,9 +10783,9 @@ the counter from the value in the WDOGLOAD Register CNTRST Counters Reset [0:0] - - - + + + MMC_INTR_RX MMC Receive Interrupt Register @@ -10910,14 +10917,14 @@ the counter from the value in the WDOGLOAD Register RXGBOCTIS MMC Receive Good Bad Octet Counter Interrupt Status [1:1] - + RXGBFRMIS MMC Receive Good Bad Frame Counter Interrupt Status [0:0] - - - + + + MMC_INTR_TX MMC Transmit Interrupt Register @@ -11049,14 +11056,14 @@ the counter from the value in the WDOGLOAD Register TXGBFRMIS MMC Transmit Good Bad Frame Counter Interrupt Status [1:1] - + TXGBOCTIS MMC Transmit Good Bad Octet Counter Interrupt Status [0:0] - - + + MMC_INTR_MASK_RX MMC Receive Interrupt Mask Register @@ -11193,9 +11200,9 @@ the counter from the value in the WDOGLOAD Register RXGBFRMIM MMC Receive Good Bad Frame Counter Interrupt Mask [0:0] - - - + + + MMC_INTR_MASK_TX MMC Transmit Interrupt Mask Register @@ -11332,9 +11339,9 @@ the counter from the value in the WDOGLOAD Register TXGBOCTIM MMC Transmit Good Bad Octet Counter Interrupt Mask [0:0] - - - + + + TXOCTETCOUNT_GB MMC Transmit Count @@ -11347,8 +11354,8 @@ the counter from the value in the WDOGLOAD Register Number of bytes [31:0] - - + + TXFRAMECOUNT_GB MMC Frame Count Register @@ -11361,8 +11368,8 @@ the counter from the value in the WDOGLOAD Register Number of frames [31:0] - - + + TXBCASTFRAMES_G MMC Good Broadcast Frames Register @@ -11375,8 +11382,8 @@ the counter from the value in the WDOGLOAD Register Number of frames [31:0] - - + + TXMCASTFRAMES_G MMC Good Multicast Frames Register @@ -11389,8 +11396,8 @@ the counter from the value in the WDOGLOAD Register Number of frames [31:0] - - + + TX64OCT_GB MMC Good and bad Frames transmitted with length 64 @@ -11403,8 +11410,8 @@ the counter from the value in the WDOGLOAD Register Number of frames [31:0] - - + + TX65TO127OCT_GB MMC Good and bad Frames transmitted with length 65 to 127 @@ -11417,9 +11424,9 @@ the counter from the value in the WDOGLOAD Register Number of frames [31:0] - + - + TX128TO255OCT_GB MMC Good and bad Frames transmitted with length 128 to 255 0x012c @@ -11431,7 +11438,7 @@ the counter from the value in the WDOGLOAD Register Number of frames [31:0] - + TX256TO511OCT_GB @@ -11445,8 +11452,8 @@ the counter from the value in the WDOGLOAD Register Number of frames [31:0] - - + + TX512TO1023OCT_GB MMC Good and bad Frames transmitted with length 512 to 1023 @@ -11459,8 +11466,8 @@ the counter from the value in the WDOGLOAD Register Number of frames [31:0] - - + + TX1024MAXOCT_GB MMC Good and bad Frames transmitted with length 1024 to max bytes @@ -11473,8 +11480,8 @@ the counter from the value in the WDOGLOAD Register Number of frames [31:0] - - + + TXUCASTFRAME_GB MMC number of good and bad unicast frames transmitted @@ -11487,8 +11494,8 @@ the counter from the value in the WDOGLOAD Register Number of frames [31:0] - - + + TXMCASTFRAME_GB MMC number of good and bad MULTIcast frames transmitted @@ -11501,8 +11508,8 @@ the counter from the value in the WDOGLOAD Register Number of frames [31:0] - - + + TXBCASTFRAME_GB MMC number of good and bad broadcast frames transmitted @@ -11515,8 +11522,8 @@ the counter from the value in the WDOGLOAD Register Number of frames [31:0] - - + + TXUNDERERR MMC number of frames aborted because of frame underflow error @@ -11529,8 +11536,8 @@ the counter from the value in the WDOGLOAD Register Number of frames [31:0] - - + + TXSINGLECOL_G MMC Number of successfully transmitted frames after a single collision @@ -11543,8 +11550,8 @@ the counter from the value in the WDOGLOAD Register Number of frames [31:0] - - + + TXMULTICOL_G MMC Number of successfully transmitted frames after multiple collisions @@ -11557,8 +11564,8 @@ the counter from the value in the WDOGLOAD Register Number of frames [31:0] - - + + TXDEFERRED MMC Number of successfully transmitted frames after a deferral @@ -11571,8 +11578,8 @@ the counter from the value in the WDOGLOAD Register Number of frames [31:0] - - + + TXLATECOL MMC Number of aborted frames because of late collision error @@ -11585,8 +11592,8 @@ the counter from the value in the WDOGLOAD Register Number of frames [31:0] - - + + TXEXESSCOL MMC Number of aborted frames because of excessive collision errors @@ -11599,8 +11606,8 @@ the counter from the value in the WDOGLOAD Register Number of frames [31:0] - - + + TXCARRIERERROR MMC Number of aborted frames because of carrier sense error @@ -11613,8 +11620,8 @@ the counter from the value in the WDOGLOAD Register Number of frames [31:0] - - + + TXOCTETCOUNT_G MMC Number of bytes transmitted frames only in good frames @@ -11627,8 +11634,8 @@ the counter from the value in the WDOGLOAD Register Number of bytes [31:0] - - + + TXFRAMECOUNT_G MMC Number of good frames transmitted @@ -11641,9 +11648,9 @@ the counter from the value in the WDOGLOAD Register Number of frames [31:0] - - - + + + TXEXCESSDEF MMC Number of frames aborted because of excessive deferral error 0x016c @@ -11655,8 +11662,8 @@ the counter from the value in the WDOGLOAD Register Number of frames [31:0] - - + + TXPAUSEFRAMES MMC Number of good pause frames transmitted @@ -11669,8 +11676,8 @@ the counter from the value in the WDOGLOAD Register Number of frames [31:0] - - + + TXLANFRAMES_G MMC Number of good VLAN frames transmitted @@ -11683,8 +11690,8 @@ the counter from the value in the WDOGLOAD Register Number of frames [31:0] - - + + TXOVERSIZE_G MMC Number of frames transmitted without errors @@ -11697,8 +11704,8 @@ the counter from the value in the WDOGLOAD Register Number of frames [31:0] - - + + RXFRAMECOUNT_GB MMC Number of good and bad frames received @@ -11711,8 +11718,8 @@ the counter from the value in the WDOGLOAD Register Number of frames [31:0] - - + + RXOCTETCOUNT_GB MMC Number of bytes received in good and bad frames @@ -11725,8 +11732,8 @@ the counter from the value in the WDOGLOAD Register Number of bytes [31:0] - - + + RXOCTETCOUNT_G MMC Number of bytes received in good frames only @@ -11739,8 +11746,8 @@ the counter from the value in the WDOGLOAD Register Number of bytes [31:0] - - + + RXBCASTFRAMES_G MMC Number of good broadcast frames received @@ -11753,8 +11760,8 @@ the counter from the value in the WDOGLOAD Register Number of frames [31:0] - - + + RXMCASTFRAMES_G MMC Number of good multicast frames received @@ -11767,8 +11774,8 @@ the counter from the value in the WDOGLOAD Register Number of frames [31:0] - - + + RXCRCERROR MMC Number of frames received with CRC error @@ -11781,8 +11788,8 @@ the counter from the value in the WDOGLOAD Register Number of frames [31:0] - - + + RXALIGNERROR MMC Number of frames received with alignment error @@ -11795,8 +11802,8 @@ the counter from the value in the WDOGLOAD Register Number of frames [31:0] - - + + RXRUNTERROR MMC Number of frames received with runt error @@ -11809,8 +11816,8 @@ the counter from the value in the WDOGLOAD Register Number of frames [31:0] - - + + RXJABBERERROR MMC Number of giant frames received with length greater than 1518 bytes and with CRC error @@ -11823,8 +11830,8 @@ the counter from the value in the WDOGLOAD Register Number of frames [31:0] - - + + RXUNDERSIZE_G MMC Number of frames received with length less than 64 bytes @@ -11837,8 +11844,8 @@ the counter from the value in the WDOGLOAD Register Number of frames [31:0] - - + + RXOVERSIZE_G MMC Number of frames received without errors with length greater than the max size @@ -11851,8 +11858,8 @@ the counter from the value in the WDOGLOAD Register Number of frames [31:0] - - + + RX64OCTETS_GB MMC Number of good and bad frames received with length 64 bytes @@ -11865,8 +11872,8 @@ the counter from the value in the WDOGLOAD Register Number of frames [31:0] - - + + RX65TO127OCT_GB MMC Number of good and bad frames received with length between 65 and 127 bytes @@ -11879,8 +11886,8 @@ the counter from the value in the WDOGLOAD Register Number of frames [31:0] - - + + RX128TO255OCT_GB MMC Number of good and bad frames received with length between 128 and 255 bytes @@ -11893,8 +11900,8 @@ the counter from the value in the WDOGLOAD Register Number of frames [31:0] - - + + RX256TO511OCT_GB MMC Number of good and bad frames received with length between 256 and 511 bytes @@ -11907,8 +11914,8 @@ the counter from the value in the WDOGLOAD Register Number of frames [31:0] - - + + RX512TO1023OCT_GB MMC Number of good and bad frames received with length between 512 and 1023 bytes @@ -11921,8 +11928,8 @@ the counter from the value in the WDOGLOAD Register Number of frames [31:0] - - + + RX1024MAXOCT_GB MMC Number of good and bad frames received with length between 1024 and max size bytes @@ -11935,8 +11942,8 @@ the counter from the value in the WDOGLOAD Register Number of frames [31:0] - - + + RXUCASTFRAMES_G MMC Number of received good unicast frames @@ -11949,8 +11956,8 @@ the counter from the value in the WDOGLOAD Register Number of frames [31:0] - - + + RXLENGTHERROR MMC Number of frames received with length error @@ -11963,9 +11970,9 @@ the counter from the value in the WDOGLOAD Register Number of frames [31:0] - - - + + + RXOUTRANGETYPE MMC Number of frames received with length field not equal to the valid frame size 0x01CC @@ -11977,9 +11984,9 @@ the counter from the value in the WDOGLOAD Register Number of frames [31:0] - + - + RXPAUSEFRAMES MMC Number of good and valid Pause frames received 0x01D0 @@ -11991,9 +11998,9 @@ the counter from the value in the WDOGLOAD Register Number of frames [31:0] - - - + + + RXFIFOOVERFLOW MMC Number of missed received frames because of FIFO overflow 0x01D4 @@ -12005,9 +12012,9 @@ the counter from the value in the WDOGLOAD Register Number of frames [31:0] - - - + + + RXVLANFRAMES_GB MMC Number of good and bad VLAN frames received 0x01D8 @@ -12019,9 +12026,9 @@ the counter from the value in the WDOGLOAD Register Number of frames [31:0] - - - + + + RXWDOGERROR MMC Number of frames received with error because of watchdog timeout error 0x01DC @@ -12033,9 +12040,9 @@ the counter from the value in the WDOGLOAD Register Number of frames [31:0] - - - + + + RXRCVERROR MMC Number of frames received with Receive error or Frame Extension error 0x01E0 @@ -12047,9 +12054,9 @@ the counter from the value in the WDOGLOAD Register Number of frames [31:0] - - - + + + RXCTRLFRAMES_G MMC Number of received good control frames 0x01E4 @@ -12061,8 +12068,8 @@ the counter from the value in the WDOGLOAD Register Number of frames [31:0] - - + + VLAN_INCREPLACE Holds the VLAN Tag for insertion into or replacement in the transmit frames @@ -12074,7 +12081,7 @@ the counter from the value in the WDOGLOAD Register CSVL C-VLAN or S-VLAN [19:19] - + VLP VLAN Priority Control @@ -12089,9 +12096,9 @@ the counter from the value in the WDOGLOAD Register VLT VLAN Tag for Transmit Frames [15:0] - - - + + + VLAN_HASHTABLE Holds the VLAN Hash Table @@ -12103,9 +12110,9 @@ the counter from the value in the WDOGLOAD Register VLHT VLAN Hash Table [15:0] - - - + + + TIMESTAMP_CTRL Controls the IEEE 1588 timestamp generation and update logic @@ -12122,104 +12129,104 @@ the counter from the value in the WDOGLOAD Register ATSEN2 Auxiliary Snapshot 2 Enable [27:27] - + ATSEN1 Auxiliary Snapshot 1 Enable [26:26] - + ATSEN0 Auxiliary Snapshot 0 Enable [25:25] - + ATSFC Auxiliary Snapshot FIFO Clear [24:24] - + TSENMACADDR Enable MAC address for PTP Frame Filtering [18:18] - + SNAPTYPSEL Select PTP packets for Taking Snapshots [17:16] - + TSMSTRENA Enable Snapshot for Messages Relevant to Master [15:15] - + TSEVNTENA Enable Timestamp Snapshot for Event Messages [14:14] - + TSIPV4ENA Enable Processing of PTP Frames Sent over IPv4-UDP [13:13] - + TSIPV6ENA Enable Processing of PTP Frames Sent over IPv6-UDP [12:12] - + TSIPENA Enable Processing of PTP over Ethernet Frames [11:11] - + TSVER2ENA Enable PTP packet Processing for Version 2 Format [10:10] - + TSCTRLSSR Timestamp Digital or Binary Rollover Control [9:9] - + TSENALL Enable Timestamp for All Frames [8:8] - + TSADDRREG Addend Reg Update [5:5] - + TSTRIG Timestamp Interrupt Trigger Enable [4:4] - + TSUPDT Timestamp Update [3:3] - + TSINIT Timestamp Initialize [2:2] - + TSCFUPDT Timestamp Fine or Coarse Update [1:1] - + TSENA Timestamp Enable [0:0] - - - + + + SUBSEC_INC Holds the 8-bit value by which the Sub-Second register is incremented @@ -12231,9 +12238,9 @@ the counter from the value in the WDOGLOAD Register SSINC Sub-Second Increment Valuee [7:0] - - - + + + SYSTIME_SECONDS Holds the lower 32 bits of the second field of the system time @@ -12245,9 +12252,9 @@ the counter from the value in the WDOGLOAD Register TSS Timestamp Second [31:0] - - - + + + SYSTIME_NANOSEC Holds 32 bits of the nano-second field of the system time @@ -12259,9 +12266,9 @@ the counter from the value in the WDOGLOAD Register TSSS Timestamp Sub Seconds [30:0] - - - + + + SYSTIME_SECSUPDAT Holds the lower 32 bits of the second field to be written to, added to, or subtracted from the system time value @@ -12273,9 +12280,9 @@ the counter from the value in the WDOGLOAD Register TSS Timestamp Second [31:0] - - - + + + SYSTIME_NSECUP Holds 32 bits of the nano-second field to be written to, added to, or subtracted from the system time value @@ -12292,9 +12299,9 @@ the counter from the value in the WDOGLOAD Register TSSS Timestamp Sub Seconds [30:0] - - - + + + TIMESTAMPADDEND This register is used by software to re-adjust the clock frequency linearly to match the Master clock frequency @@ -12306,9 +12313,9 @@ the counter from the value in the WDOGLOAD Register TSAR Timestamp Addend Register [31:0] - - - + + + TARGET_TIME_SECS Holds the high 32-bits of time to be compared with the system time @@ -12320,9 +12327,9 @@ the counter from the value in the WDOGLOAD Register TSTR Target Time Seconds Registe [31:0] - - - + + + TARGET_TIME_NSEC Holds the lower 32-bits of time to be compared with the system time @@ -12334,15 +12341,15 @@ the counter from the value in the WDOGLOAD Register TRGTBUSY 32 Bits of Hash Table [31:31] - + TTSLO Target Timestamp Low Register [30:0] - - + + - + DMA_BUS_MODE Controls the DMA Host Interface Mode @@ -12354,74 +12361,74 @@ the counter from the value in the WDOGLOAD Register RIB Rebuild INCRx Burst [31:31] - + PRWG Channel Priority Weights [29:28] - + TXPR Transmit Priority [27:27] - + MB Mixed Burst [26:26] - + AAL Address-Aligned Beats [25:25] - + PBLx8 PBLx8 Mode [24:24] - + USP Use Separate PBL [23:23] - + RPBL Rx DMA PBL [22:17] - + FB Fixed Burste [16:16] - + PR Priority Ratio [15:14] - + PBL Programmable Burst Lengthe [13:8] - + DSL Descriptor Skip Length [6:2] - + DA DMA Arbitration Scheme [1:1] - + SWR Software Reset (Read, Write Set, and Self Clear) [0:0] - - - + + + DMA_TX_POLL_DEMAND Used by the host to instruct the DMA to poll the transmit Descriptor list @@ -12433,9 +12440,9 @@ the counter from the value in the WDOGLOAD Register TPD Transmit Poll Demand (Read Only and Write Trigger) [31:0] - - - + + + DMA_RX_POLL_DEMAND Used by the host to instruct the DMA to poll the Receive Descriptor list @@ -12447,9 +12454,9 @@ the counter from the value in the WDOGLOAD Register RPD Receive Poll Demand (Read Only and Write Trigger) [31:0] - - - + + + DMA_RX_DESC_LIST_ADDR Points the DMA to the start of the Receive Descriptor list @@ -12461,9 +12468,9 @@ the counter from the value in the WDOGLOAD Register RDESLA Start of Receive List [31:0] - - - + + + DMA_TX_DESC_LIST_ADDR Points the DMA to the start of the Transmit Descriptor list @@ -12475,9 +12482,9 @@ the counter from the value in the WDOGLOAD Register TDESLA Start of Transmit List [31:0] - - - + + + DMA_STATUS Used to determine the status of the DMA @@ -12579,14 +12586,14 @@ the counter from the value in the WDOGLOAD Register TPS Transmit Process Stopped [1:1] - + TI Transmit Interrupt [0:0] - - - + + + DMA_OPER_MODE Sets the Receive and Transmit operation mode and command @@ -12598,79 +12605,79 @@ the counter from the value in the WDOGLOAD Register DT Disable Dropping of TCP/IP Checksum Error Frames [26:26] - + RSF Receive Store and Forward [25:25] - + DFF Disable Flushing of Received Frames [24:24] - + TSF Transmit Store and Forward [21:21] - + FTF Flush Transmit FIFO [20:20] - + TTC Transmit Threshold Control [16:14] - + ST Start or Stop Transmission Command [13:13] - + RFD Threshold for Deactivating Flow Control [12:11] - + RFA Threshold for Activating Flow Control [10:9] - + FEF Forward Error Frames [7:7] - + FUF Forward Undersized Good Frames [6:6] - + DGF Drop Giant Frames [5:5] - + RTC Receive Threshold Control [4:3] - + OSF Operate on Second Frame [2:2] - + SR Start or Stop Receive [1:1] - - - + + + DMA_INTR_EN Enables the interrupts reported in the status register @@ -12682,7 +12689,7 @@ the counter from the value in the WDOGLOAD Register NIE Normal Interrupt Summary Enable [16:16] - + AIE Abnormal Interrupt Summary Enable @@ -12752,9 +12759,9 @@ the counter from the value in the WDOGLOAD Register TIE Transmit Interrupt Enable [0:0] - - - + + + DMA_MISS_OVER_COUNTER Contains the counters for discarded frames because no Receive Descriptor is available @@ -12782,8 +12789,8 @@ the counter from the value in the WDOGLOAD Register This field indicates the number of frames missed by the controller because of the Host Receive Buffer being unavailable. [15:0] - - + + DMA_RX_INTR_WDOG_TIMER Watchdog timeout for Receive Interrupt from DMA @@ -12795,9 +12802,9 @@ the counter from the value in the WDOGLOAD Register RIWT These bits indicate the number of system clock cycles x 256 for which the watchdog timer is set. [7:0] - - - + + + DMA_AHB_STATUS Provides the active status of the read and write channels of the AHB master interface @@ -12810,8 +12817,8 @@ the counter from the value in the WDOGLOAD Register When high, indicates that the AHB master interface FSMs are in the non-idle state [0:0] - - + + DMA_CURR_TX_DESC Contains the start address of the current Transmit Descriptor read by the DMA @@ -12823,9 +12830,9 @@ the counter from the value in the WDOGLOAD Register CURTDESAPTR Cleared on Reset. Pointer updated by the DMA during operation. [31:0] - - - + + + DMA_CURR_RX_DESC Contains the start address of the current Receive Descriptor read by the DMA @@ -12837,9 +12844,9 @@ the counter from the value in the WDOGLOAD Register CURRDESAPTR Cleared on Reset. Pointer updated by the DMA during operation. [31:0] - - - + + + DMA_CURR_TX_BUFR_ADDR Contains the start address of the current Receive Descriptor read by the DMA @@ -12851,9 +12858,9 @@ the counter from the value in the WDOGLOAD Register CURTBUFAPTR Cleared on Reset. Pointer updated by the DMA during operation. [31:0] - - - + + + DMA_CURR_RX_BUFR_ADDR Contains the current Receive Buffer address read by the DMA @@ -12865,10 +12872,10 @@ the counter from the value in the WDOGLOAD Register CURTBUFAPTR Cleared on Reset. Pointer updated by the DMA during operation. [31:0] - - - + + + - + From 159bda856b026f7dc78f39075ab4caff80cef82e Mon Sep 17 00:00:00 2001 From: Robin Mueller Date: Tue, 11 Jun 2024 14:32:39 +0200 Subject: [PATCH 3/8] everything works again --- va416xx/build.rs | 1 + va416xx/device.x | 6 +- va416xx/src/adc.rs | 144 +- va416xx/src/adc/ctrl.rs | 385 +--- va416xx/src/adc/fifo_clr.rs | 96 +- va416xx/src/adc/fifo_data.rs | 80 +- va416xx/src/adc/irq_clr.rs | 168 +- va416xx/src/adc/irq_enb.rs | 467 +--- va416xx/src/adc/irq_end.rs | 207 +- va416xx/src/adc/irq_raw.rs | 207 +- va416xx/src/adc/perid.rs | 35 +- va416xx/src/adc/rxfifoirqtrg.rs | 105 +- va416xx/src/adc/status.rs | 80 +- va416xx/src/can0.rs | 1992 +++++++++++----- va416xx/src/can0/bmskb.rs | 297 +-- va416xx/src/can0/bmskx.rs | 167 +- va416xx/src/can0/canec.rs | 153 +- va416xx/src/can0/cediag.rs | 447 +--- va416xx/src/can0/cgcr.rs | 777 ++----- va416xx/src/can0/cicen.rs | 163 +- va416xx/src/can0/ciclr.rs | 163 +- va416xx/src/can0/cien.rs | 163 +- va416xx/src/can0/cipnd.rs | 163 +- va416xx/src/can0/cnstat_cmb0.rs | 193 +- va416xx/src/can0/cnstat_cmb1.rs | 193 +- va416xx/src/can0/cnstat_cmb10.rs | 193 +- va416xx/src/can0/cnstat_cmb11.rs | 193 +- va416xx/src/can0/cnstat_cmb12.rs | 193 +- va416xx/src/can0/cnstat_cmb13.rs | 193 +- va416xx/src/can0/cnstat_cmb14.rs | 193 +- va416xx/src/can0/cnstat_cmb2.rs | 193 +- va416xx/src/can0/cnstat_cmb3.rs | 193 +- va416xx/src/can0/cnstat_cmb4.rs | 193 +- va416xx/src/can0/cnstat_cmb5.rs | 193 +- va416xx/src/can0/cnstat_cmb6.rs | 193 +- va416xx/src/can0/cnstat_cmb7.rs | 193 +- va416xx/src/can0/cnstat_cmb8.rs | 193 +- va416xx/src/can0/cnstat_cmb9.rs | 193 +- va416xx/src/can0/cnstat_hcmb.rs | 193 +- va416xx/src/can0/cstpnd.rs | 203 +- va416xx/src/can0/ctim.rs | 241 +- va416xx/src/can0/ctmr.rs | 91 +- va416xx/src/can0/data0_cmb0.rs | 153 +- va416xx/src/can0/data0_cmb1.rs | 153 +- va416xx/src/can0/data0_cmb10.rs | 153 +- va416xx/src/can0/data0_cmb11.rs | 153 +- va416xx/src/can0/data0_cmb12.rs | 153 +- va416xx/src/can0/data0_cmb13.rs | 153 +- va416xx/src/can0/data0_cmb14.rs | 153 +- va416xx/src/can0/data0_cmb2.rs | 153 +- va416xx/src/can0/data0_cmb3.rs | 153 +- va416xx/src/can0/data0_cmb4.rs | 153 +- va416xx/src/can0/data0_cmb5.rs | 153 +- va416xx/src/can0/data0_cmb6.rs | 153 +- va416xx/src/can0/data0_cmb7.rs | 153 +- va416xx/src/can0/data0_cmb8.rs | 153 +- va416xx/src/can0/data0_cmb9.rs | 153 +- va416xx/src/can0/data0_hcmb.rs | 153 +- va416xx/src/can0/data1_cmb0.rs | 153 +- va416xx/src/can0/data1_cmb1.rs | 153 +- va416xx/src/can0/data1_cmb10.rs | 153 +- va416xx/src/can0/data1_cmb11.rs | 153 +- va416xx/src/can0/data1_cmb12.rs | 153 +- va416xx/src/can0/data1_cmb13.rs | 153 +- va416xx/src/can0/data1_cmb14.rs | 153 +- va416xx/src/can0/data1_cmb2.rs | 153 +- va416xx/src/can0/data1_cmb3.rs | 153 +- va416xx/src/can0/data1_cmb4.rs | 153 +- va416xx/src/can0/data1_cmb5.rs | 153 +- va416xx/src/can0/data1_cmb6.rs | 153 +- va416xx/src/can0/data1_cmb7.rs | 153 +- va416xx/src/can0/data1_cmb8.rs | 153 +- va416xx/src/can0/data1_cmb9.rs | 153 +- va416xx/src/can0/data1_hcmb.rs | 153 +- va416xx/src/can0/data2_cmb0.rs | 153 +- va416xx/src/can0/data2_cmb1.rs | 153 +- va416xx/src/can0/data2_cmb10.rs | 153 +- va416xx/src/can0/data2_cmb11.rs | 153 +- va416xx/src/can0/data2_cmb12.rs | 153 +- va416xx/src/can0/data2_cmb13.rs | 153 +- va416xx/src/can0/data2_cmb14.rs | 153 +- va416xx/src/can0/data2_cmb2.rs | 153 +- va416xx/src/can0/data2_cmb3.rs | 153 +- va416xx/src/can0/data2_cmb4.rs | 153 +- va416xx/src/can0/data2_cmb5.rs | 153 +- va416xx/src/can0/data2_cmb6.rs | 153 +- va416xx/src/can0/data2_cmb7.rs | 153 +- va416xx/src/can0/data2_cmb8.rs | 153 +- va416xx/src/can0/data2_cmb9.rs | 153 +- va416xx/src/can0/data2_hcmb.rs | 153 +- va416xx/src/can0/data3_cmb0.rs | 153 +- va416xx/src/can0/data3_cmb1.rs | 153 +- va416xx/src/can0/data3_cmb10.rs | 153 +- va416xx/src/can0/data3_cmb11.rs | 153 +- va416xx/src/can0/data3_cmb12.rs | 153 +- va416xx/src/can0/data3_cmb13.rs | 153 +- va416xx/src/can0/data3_cmb14.rs | 153 +- va416xx/src/can0/data3_cmb2.rs | 153 +- va416xx/src/can0/data3_cmb3.rs | 153 +- va416xx/src/can0/data3_cmb4.rs | 153 +- va416xx/src/can0/data3_cmb5.rs | 153 +- va416xx/src/can0/data3_cmb6.rs | 153 +- va416xx/src/can0/data3_cmb7.rs | 153 +- va416xx/src/can0/data3_cmb8.rs | 153 +- va416xx/src/can0/data3_cmb9.rs | 153 +- va416xx/src/can0/data3_hcmb.rs | 153 +- va416xx/src/can0/gmskb.rs | 297 +-- va416xx/src/can0/gmskx.rs | 167 +- va416xx/src/can0/id0_cmb0.rs | 105 +- va416xx/src/can0/id0_cmb1.rs | 105 +- va416xx/src/can0/id0_cmb10.rs | 105 +- va416xx/src/can0/id0_cmb11.rs | 105 +- va416xx/src/can0/id0_cmb12.rs | 105 +- va416xx/src/can0/id0_cmb13.rs | 105 +- va416xx/src/can0/id0_cmb14.rs | 105 +- va416xx/src/can0/id0_cmb2.rs | 105 +- va416xx/src/can0/id0_cmb3.rs | 105 +- va416xx/src/can0/id0_cmb4.rs | 105 +- va416xx/src/can0/id0_cmb5.rs | 105 +- va416xx/src/can0/id0_cmb6.rs | 105 +- va416xx/src/can0/id0_cmb7.rs | 105 +- va416xx/src/can0/id0_cmb8.rs | 105 +- va416xx/src/can0/id0_cmb9.rs | 105 +- va416xx/src/can0/id0_hcmb.rs | 105 +- va416xx/src/can0/id1_cmb0.rs | 105 +- va416xx/src/can0/id1_cmb1.rs | 105 +- va416xx/src/can0/id1_cmb10.rs | 105 +- va416xx/src/can0/id1_cmb11.rs | 105 +- va416xx/src/can0/id1_cmb12.rs | 105 +- va416xx/src/can0/id1_cmb13.rs | 105 +- va416xx/src/can0/id1_cmb14.rs | 105 +- va416xx/src/can0/id1_cmb2.rs | 105 +- va416xx/src/can0/id1_cmb3.rs | 105 +- va416xx/src/can0/id1_cmb4.rs | 105 +- va416xx/src/can0/id1_cmb5.rs | 105 +- va416xx/src/can0/id1_cmb6.rs | 105 +- va416xx/src/can0/id1_cmb7.rs | 105 +- va416xx/src/can0/id1_cmb8.rs | 105 +- va416xx/src/can0/id1_cmb9.rs | 105 +- va416xx/src/can0/id1_hcmb.rs | 105 +- va416xx/src/can0/tstp_cmb0.rs | 105 +- va416xx/src/can0/tstp_cmb1.rs | 105 +- va416xx/src/can0/tstp_cmb10.rs | 105 +- va416xx/src/can0/tstp_cmb11.rs | 105 +- va416xx/src/can0/tstp_cmb12.rs | 105 +- va416xx/src/can0/tstp_cmb13.rs | 105 +- va416xx/src/can0/tstp_cmb14.rs | 105 +- va416xx/src/can0/tstp_cmb2.rs | 105 +- va416xx/src/can0/tstp_cmb3.rs | 105 +- va416xx/src/can0/tstp_cmb4.rs | 105 +- va416xx/src/can0/tstp_cmb5.rs | 105 +- va416xx/src/can0/tstp_cmb6.rs | 105 +- va416xx/src/can0/tstp_cmb7.rs | 105 +- va416xx/src/can0/tstp_cmb8.rs | 105 +- va416xx/src/can0/tstp_cmb9.rs | 105 +- va416xx/src/can0/tstp_hcmb.rs | 105 +- va416xx/src/clkgen.rs | 46 +- va416xx/src/clkgen/ctrl0.rs | 769 ++----- va416xx/src/clkgen/ctrl1.rs | 395 +--- va416xx/src/clkgen/stat.rs | 126 +- va416xx/src/dac0.rs | 158 +- va416xx/src/dac0/ctrl0.rs | 173 +- va416xx/src/dac0/ctrl1.rs | 163 +- va416xx/src/dac0/fifo_clr.rs | 96 +- va416xx/src/dac0/fifo_data.rs | 86 +- va416xx/src/dac0/irq_clr.rs | 168 +- va416xx/src/dac0/irq_enb.rs | 467 +--- va416xx/src/dac0/irq_end.rs | 207 +- va416xx/src/dac0/irq_raw.rs | 207 +- va416xx/src/dac0/perid.rs | 35 +- va416xx/src/dac0/status.rs | 80 +- va416xx/src/dac0/txfifoirqtrg.rs | 105 +- va416xx/src/dma.rs | 493 ++-- va416xx/src/dma/alt_ctrl_base_ptr.rs | 105 +- va416xx/src/dma/cfg.rs | 73 +- va416xx/src/dma/chnl_enable_clr.rs | 281 +-- va416xx/src/dma/chnl_enable_set.rs | 281 +-- va416xx/src/dma/chnl_pri_alt_clr.rs | 281 +-- va416xx/src/dma/chnl_pri_alt_set.rs | 281 +-- va416xx/src/dma/chnl_priority_clr.rs | 168 +- va416xx/src/dma/chnl_priority_set.rs | 281 +-- va416xx/src/dma/chnl_req_mask_clr.rs | 281 +-- va416xx/src/dma/chnl_req_mask_set.rs | 281 +-- va416xx/src/dma/chnl_sw_request.rs | 168 +- va416xx/src/dma/chnl_useburst_clr.rs | 281 +-- va416xx/src/dma/chnl_useburst_set.rs | 281 +-- va416xx/src/dma/ctrl_base_ptr.rs | 105 +- va416xx/src/dma/dma_active_clr.rs | 281 +-- va416xx/src/dma/dma_active_set.rs | 281 +-- va416xx/src/dma/dma_done_clr.rs | 281 +-- va416xx/src/dma/dma_done_set.rs | 281 +-- va416xx/src/dma/dma_req_status.rs | 281 +-- va416xx/src/dma/dma_sreq_status.rs | 281 +-- va416xx/src/dma/err_clr.rs | 115 +- va416xx/src/dma/err_set.rs | 91 +- va416xx/src/dma/integration_cfg.rs | 115 +- va416xx/src/dma/periph_id_0.rs | 105 +- va416xx/src/dma/periph_id_1.rs | 80 +- va416xx/src/dma/periph_id_2.rs | 203 +- va416xx/src/dma/periph_id_3.rs | 105 +- va416xx/src/dma/periph_id_4.rs | 153 +- va416xx/src/dma/primecell_id_0.rs | 105 +- va416xx/src/dma/primecell_id_1.rs | 105 +- va416xx/src/dma/primecell_id_2.rs | 105 +- va416xx/src/dma/primecell_id_3.rs | 105 +- va416xx/src/dma/stall_status.rs | 91 +- va416xx/src/dma/status.rs | 126 +- va416xx/src/dma/waitonreq_status.rs | 126 +- va416xx/src/eth.rs | 1334 ++++++++--- va416xx/src/eth/dma_ahb_status.rs | 115 +- va416xx/src/eth/dma_bus_mode.rs | 851 ++----- va416xx/src/eth/dma_curr_rx_bufr_addr.rs | 105 +- va416xx/src/eth/dma_curr_rx_desc.rs | 105 +- va416xx/src/eth/dma_curr_tx_bufr_addr.rs | 105 +- va416xx/src/eth/dma_curr_tx_desc.rs | 105 +- va416xx/src/eth/dma_intr_en.rs | 963 ++------ va416xx/src/eth/dma_miss_over_counter.rs | 261 +-- va416xx/src/eth/dma_oper_mode.rs | 923 ++------ va416xx/src/eth/dma_rx_desc_list_addr.rs | 105 +- va416xx/src/eth/dma_rx_intr_wdog_timer.rs | 105 +- va416xx/src/eth/dma_rx_poll_demand.rs | 105 +- va416xx/src/eth/dma_status.rs | 558 ++--- va416xx/src/eth/dma_tx_desc_list_addr.rs | 105 +- va416xx/src/eth/dma_tx_poll_demand.rs | 105 +- va416xx/src/eth/mac_addr_h.rs | 114 +- va416xx/src/eth/mac_addr_l.rs | 91 +- va416xx/src/eth/mac_config.rs | 1181 +++------- va416xx/src/eth/mac_debug.rs | 342 +-- va416xx/src/eth/mac_flow_ctrl.rs | 447 +--- va416xx/src/eth/mac_frame_fltr.rs | 829 ++----- va416xx/src/eth/mac_gmii_addr.rs | 313 +-- va416xx/src/eth/mac_gmii_data.rs | 105 +- va416xx/src/eth/mac_intr_mask.rs | 115 +- va416xx/src/eth/mac_intr_stat.rs | 153 +- va416xx/src/eth/mac_vlan_tag.rs | 271 +-- va416xx/src/eth/mac_wdog_to.rs | 163 +- va416xx/src/eth/mmc_cntrl.rs | 467 +--- va416xx/src/eth/mmc_intr_mask_rx.rs | 1645 ++++--------- va416xx/src/eth/mmc_intr_mask_tx.rs | 1645 ++++--------- va416xx/src/eth/mmc_intr_rx.rs | 1645 ++++--------- va416xx/src/eth/mmc_intr_tx.rs | 1645 ++++--------- va416xx/src/eth/rx1024maxoct_gb.rs | 53 +- va416xx/src/eth/rx128to255oct_gb.rs | 53 +- va416xx/src/eth/rx256to511oct_gb.rs | 53 +- va416xx/src/eth/rx512to1023oct_gb.rs | 53 +- va416xx/src/eth/rx64octets_gb.rs | 53 +- va416xx/src/eth/rx65to127oct_gb.rs | 53 +- va416xx/src/eth/rxalignerror.rs | 53 +- va416xx/src/eth/rxbcastframes_g.rs | 53 +- va416xx/src/eth/rxcrcerror.rs | 53 +- va416xx/src/eth/rxctrlframes_g.rs | 53 +- va416xx/src/eth/rxfifooverflow.rs | 53 +- va416xx/src/eth/rxframecount_gb.rs | 53 +- va416xx/src/eth/rxjabbererror.rs | 53 +- va416xx/src/eth/rxlengtherror.rs | 53 +- va416xx/src/eth/rxmcastframes_g.rs | 53 +- va416xx/src/eth/rxoctetcount_g.rs | 53 +- va416xx/src/eth/rxoctetcount_gb.rs | 53 +- va416xx/src/eth/rxoutrangetype.rs | 53 +- va416xx/src/eth/rxoversize_g.rs | 53 +- va416xx/src/eth/rxpauseframes.rs | 53 +- va416xx/src/eth/rxrcverror.rs | 53 +- va416xx/src/eth/rxrunterror.rs | 53 +- va416xx/src/eth/rxucastframes_g.rs | 53 +- va416xx/src/eth/rxundersize_g.rs | 53 +- va416xx/src/eth/rxvlanframes_gb.rs | 53 +- va416xx/src/eth/rxwdogerror.rs | 53 +- va416xx/src/eth/subsec_inc.rs | 105 +- va416xx/src/eth/systime_nanosec.rs | 53 +- va416xx/src/eth/systime_nsecup.rs | 163 +- va416xx/src/eth/systime_seconds.rs | 53 +- va416xx/src/eth/systime_secsupdat.rs | 105 +- va416xx/src/eth/target_time_nsec.rs | 163 +- va416xx/src/eth/target_time_secs.rs | 105 +- va416xx/src/eth/timestamp_ctrl.rs | 1325 +++-------- va416xx/src/eth/timestampaddend.rs | 105 +- va416xx/src/eth/tx1024maxoct_gb.rs | 53 +- va416xx/src/eth/tx128to255oct_gb.rs | 53 +- va416xx/src/eth/tx256to511oct_gb.rs | 53 +- va416xx/src/eth/tx512to1023oct_gb.rs | 53 +- va416xx/src/eth/tx64oct_gb.rs | 53 +- va416xx/src/eth/tx65to127oct_gb.rs | 53 +- va416xx/src/eth/txbcastframe_gb.rs | 53 +- va416xx/src/eth/txbcastframes_g.rs | 53 +- va416xx/src/eth/txcarriererror.rs | 53 +- va416xx/src/eth/txdeferred.rs | 53 +- va416xx/src/eth/txexcessdef.rs | 53 +- va416xx/src/eth/txexesscol.rs | 53 +- va416xx/src/eth/txframecount_g.rs | 53 +- va416xx/src/eth/txframecount_gb.rs | 53 +- va416xx/src/eth/txlanframes_g.rs | 53 +- va416xx/src/eth/txlatecol.rs | 53 +- va416xx/src/eth/txmcastframe_gb.rs | 53 +- va416xx/src/eth/txmcastframes_g.rs | 53 +- va416xx/src/eth/txmulticol_g.rs | 53 +- va416xx/src/eth/txoctetcount_g.rs | 53 +- va416xx/src/eth/txoctetcount_gb.rs | 53 +- va416xx/src/eth/txoversize_g.rs | 53 +- va416xx/src/eth/txpauseframes.rs | 53 +- va416xx/src/eth/txsinglecol_g.rs | 53 +- va416xx/src/eth/txucastframe_gb.rs | 53 +- va416xx/src/eth/txundererr.rs | 53 +- va416xx/src/eth/vlan_hashtable.rs | 105 +- va416xx/src/eth/vlan_increplace.rs | 261 +-- va416xx/src/generic.rs | 498 +++- va416xx/src/generic/raw.rs | 93 + va416xx/src/i2c0.rs | 550 +++-- va416xx/src/i2c0/address.rs | 73 +- va416xx/src/i2c0/clkscale.rs | 151 +- va416xx/src/i2c0/clktolimit.rs | 73 +- va416xx/src/i2c0/cmd.rs | 73 +- va416xx/src/i2c0/ctrl.rs | 483 +--- va416xx/src/i2c0/data.rs | 73 +- va416xx/src/i2c0/fifo_clr.rs | 102 +- va416xx/src/i2c0/irq_clr.rs | 423 ---- va416xx/src/i2c0/irq_enb.rs | 713 +----- va416xx/src/i2c0/irq_end.rs | 313 --- va416xx/src/i2c0/irq_raw.rs | 313 --- va416xx/src/i2c0/perid.rs | 35 +- va416xx/src/i2c0/rxcount.rs | 35 +- va416xx/src/i2c0/rxfifoirqtrg.rs | 73 +- va416xx/src/i2c0/s0_address.rs | 213 +- va416xx/src/i2c0/s0_addressb.rs | 197 +- va416xx/src/i2c0/s0_addressmask.rs | 163 +- va416xx/src/i2c0/s0_addressmaskb.rs | 151 +- va416xx/src/i2c0/s0_ctrl.rs | 299 +-- va416xx/src/i2c0/s0_data.rs | 105 +- va416xx/src/i2c0/s0_fifo_clr.rs | 102 +- va416xx/src/i2c0/s0_irq_clr.rs | 477 ---- va416xx/src/i2c0/s0_irq_enb.rs | 805 +------ va416xx/src/i2c0/s0_irq_end.rs | 353 --- va416xx/src/i2c0/s0_irq_raw.rs | 353 --- va416xx/src/i2c0/s0_lastaddress.rs | 80 +- va416xx/src/i2c0/s0_maxwords.rs | 151 +- va416xx/src/i2c0/s0_rxcount.rs | 53 +- va416xx/src/i2c0/s0_rxfifoirqtrg.rs | 105 +- va416xx/src/i2c0/s0_state.rs | 35 +- va416xx/src/i2c0/s0_status.rs | 357 +-- va416xx/src/i2c0/s0_txcount.rs | 53 +- va416xx/src/i2c0/s0_txfifoirqtrg.rs | 105 +- va416xx/src/i2c0/state.rs | 35 +- va416xx/src/i2c0/status.rs | 759 +----- va416xx/src/i2c0/tmconfig.rs | 73 +- va416xx/src/i2c0/txcount.rs | 35 +- va416xx/src/i2c0/txfifoirqtrg.rs | 73 +- va416xx/src/i2c0/words.rs | 73 +- va416xx/src/ioconfig.rs | 270 ++- va416xx/src/ioconfig/clkdiv0.rs | 35 +- va416xx/src/ioconfig/clkdiv1.rs | 73 +- va416xx/src/ioconfig/clkdiv2.rs | 73 +- va416xx/src/ioconfig/clkdiv3.rs | 73 +- va416xx/src/ioconfig/clkdiv4.rs | 73 +- va416xx/src/ioconfig/clkdiv5.rs | 73 +- va416xx/src/ioconfig/clkdiv6.rs | 73 +- va416xx/src/ioconfig/clkdiv7.rs | 73 +- va416xx/src/ioconfig/perid.rs | 35 +- va416xx/src/ioconfig/porta.rs | 678 ++---- va416xx/src/ioconfig/portb.rs | 655 ------ va416xx/src/ioconfig/portc.rs | 655 ------ va416xx/src/ioconfig/portd.rs | 655 ------ va416xx/src/ioconfig/porte.rs | 655 ------ va416xx/src/ioconfig/portf.rs | 655 ------ va416xx/src/ioconfig/portg.rs | 655 ------ va416xx/src/irq_router.rs | 214 +- va416xx/src/irq_router/adcsel.rs | 105 +- va416xx/src/irq_router/dacsel0.rs | 105 +- va416xx/src/irq_router/dacsel1.rs | 105 +- va416xx/src/irq_router/dmasel0.rs | 105 +- va416xx/src/irq_router/dmasel1.rs | 105 +- va416xx/src/irq_router/dmasel2.rs | 105 +- va416xx/src/irq_router/dmasel3.rs | 105 +- va416xx/src/irq_router/dmattsel.rs | 105 +- va416xx/src/irq_router/irq_out0.rs | 53 +- va416xx/src/irq_router/irq_out1.rs | 53 +- va416xx/src/irq_router/irq_out2.rs | 53 +- va416xx/src/irq_router/irq_out3.rs | 53 +- va416xx/src/irq_router/irq_out4.rs | 53 +- va416xx/src/irq_router/irq_out5.rs | 53 +- va416xx/src/irq_router/perid.rs | 35 +- va416xx/src/lib.rs | 2042 ++++++++++++----- va416xx/src/porta.rs | 569 +++-- va416xx/src/porta/clrout.rs | 45 - va416xx/src/porta/clroutbyte.rs | 46 - va416xx/src/porta/datain.rs | 35 +- va416xx/src/porta/datainbyte.rs | 35 +- va416xx/src/porta/datainraw.rs | 31 - va416xx/src/porta/datainrawbyte.rs | 32 - va416xx/src/porta/datamask.rs | 73 +- va416xx/src/porta/datamaskbyte.rs | 73 +- va416xx/src/porta/dataout.rs | 52 +- va416xx/src/porta/dataoutbyte.rs | 52 +- va416xx/src/porta/dataoutraw.rs | 45 - va416xx/src/porta/dataoutrawbyte.rs | 46 - va416xx/src/porta/delay1.rs | 64 - va416xx/src/porta/delay1byte.rs | 65 - va416xx/src/porta/delay2.rs | 64 - va416xx/src/porta/delay2byte.rs | 65 - va416xx/src/porta/dir.rs | 64 - va416xx/src/porta/dirbyte.rs | 65 - va416xx/src/porta/edge_status.rs | 73 +- va416xx/src/porta/irq_edge.rs | 73 +- va416xx/src/porta/irq_enb.rs | 73 +- va416xx/src/porta/irq_end.rs | 35 +- va416xx/src/porta/irq_evt.rs | 73 +- va416xx/src/porta/irq_raw.rs | 35 +- va416xx/src/porta/irq_sen.rs | 73 +- va416xx/src/porta/perid.rs | 35 +- va416xx/src/porta/pulse.rs | 64 - va416xx/src/porta/pulsebase.rs | 64 - va416xx/src/porta/pulsebasebyte.rs | 65 - va416xx/src/porta/pulsebyte.rs | 65 - va416xx/src/porta/setout.rs | 45 - va416xx/src/porta/setoutbyte.rs | 46 - va416xx/src/porta/togout.rs | 45 - va416xx/src/porta/togoutbyte.rs | 46 - va416xx/src/spi0.rs | 200 +- va416xx/src/spi0/clkprescale.rs | 73 +- va416xx/src/spi0/ctrl0.rs | 233 +- va416xx/src/spi0/ctrl1.rs | 519 +---- va416xx/src/spi0/data.rs | 73 +- va416xx/src/spi0/fifo_clr.rs | 102 +- va416xx/src/spi0/irq_clr.rs | 153 -- va416xx/src/spi0/irq_enb.rs | 253 +- va416xx/src/spi0/irq_end.rs | 113 - va416xx/src/spi0/irq_raw.rs | 113 - va416xx/src/spi0/perid.rs | 35 +- va416xx/src/spi0/rxfifoirqtrg.rs | 73 +- va416xx/src/spi0/state.rs | 35 +- va416xx/src/spi0/status.rs | 186 +- va416xx/src/spi0/txfifoirqtrg.rs | 73 +- va416xx/src/spw.rs | 172 +- va416xx/src/spw/clkdiv.rs | 153 +- va416xx/src/spw/ctrl.rs | 1357 +++-------- va416xx/src/spw/defaddr.rs | 153 +- va416xx/src/spw/dkey.rs | 105 +- va416xx/src/spw/dmaaddr0.rs | 153 +- va416xx/src/spw/dmactrl0.rs | 1445 +++--------- va416xx/src/spw/dmamaxlen0.rs | 105 +- va416xx/src/spw/dmarxdesc0.rs | 153 +- va416xx/src/spw/dmatxdesc0.rs | 153 +- va416xx/src/spw/sts.rs | 747 ++---- va416xx/src/spw/tc.rs | 153 +- va416xx/src/spw/tdr.rs | 80 +- va416xx/src/sysconfig.rs | 648 ++++-- va416xx/src/sysconfig/adc_cal.rs | 53 +- va416xx/src/sysconfig/analog_cntl.rs | 693 +----- va416xx/src/sysconfig/areg_cal.rs | 53 +- va416xx/src/sysconfig/bg_cal.rs | 53 +- va416xx/src/sysconfig/dac0_cal.rs | 53 +- va416xx/src/sysconfig/dac1_cal.rs | 53 +- va416xx/src/sysconfig/dreg_cal.rs | 53 +- va416xx/src/sysconfig/ebi_cfg0.rs | 295 +-- va416xx/src/sysconfig/ebi_cfg1.rs | 298 --- va416xx/src/sysconfig/ebi_cfg2.rs | 298 --- va416xx/src/sysconfig/ebi_cfg3.rs | 298 --- va416xx/src/sysconfig/ef_config.rs | 243 +- va416xx/src/sysconfig/ef_id0.rs | 35 +- va416xx/src/sysconfig/ef_id1.rs | 35 +- va416xx/src/sysconfig/hbo_cal.rs | 80 +- va416xx/src/sysconfig/irq_clr.rs | 207 -- va416xx/src/sysconfig/irq_enb.rs | 345 +-- va416xx/src/sysconfig/irq_end.rs | 153 -- va416xx/src/sysconfig/irq_raw.rs | 153 -- va416xx/src/sysconfig/perid.rs | 91 +- .../src/sysconfig/peripheral_clk_enable.rs | 1523 ------------ va416xx/src/sysconfig/peripheral_reset.rs | 1495 ++---------- va416xx/src/sysconfig/pmu_ctrl.rs | 105 +- va416xx/src/sysconfig/procid.rs | 35 +- va416xx/src/sysconfig/ram0_mbe.rs | 105 +- va416xx/src/sysconfig/ram0_sbe.rs | 105 +- va416xx/src/sysconfig/ram0_scrub.rs | 130 -- va416xx/src/sysconfig/ram1_mbe.rs | 103 - va416xx/src/sysconfig/ram1_sbe.rs | 103 - va416xx/src/sysconfig/ram1_scrub.rs | 130 -- va416xx/src/sysconfig/refresh_config_h.rs | 141 +- va416xx/src/sysconfig/refresh_config_l.rs | 105 +- va416xx/src/sysconfig/rom_mbe.rs | 103 - va416xx/src/sysconfig/rom_prot.rs | 115 +- va416xx/src/sysconfig/rom_retries.rs | 53 +- va416xx/src/sysconfig/rom_sbe.rs | 103 - va416xx/src/sysconfig/rom_scrub.rs | 132 +- va416xx/src/sysconfig/rst_cntl_ram0.rs | 321 --- va416xx/src/sysconfig/rst_cntl_ram1.rs | 321 --- va416xx/src/sysconfig/rst_cntl_rom.rs | 321 --- va416xx/src/sysconfig/rst_stat.rs | 318 +-- va416xx/src/sysconfig/spw_m4_ctrl.rs | 213 +- va416xx/src/sysconfig/sw_clkdiv10.rs | 105 +- va416xx/src/sysconfig/tim_clk_enable.rs | 105 +- va416xx/src/sysconfig/tim_reset.rs | 105 +- va416xx/src/sysconfig/wakeup_cnt.rs | 163 +- va416xx/src/tim0.rs | 168 +- va416xx/src/tim0/cascade0.rs | 105 +- va416xx/src/tim0/cascade1.rs | 103 - va416xx/src/tim0/cascade2.rs | 103 - va416xx/src/tim0/cnt_value.rs | 73 +- va416xx/src/tim0/csd_ctrl.rs | 529 +---- va416xx/src/tim0/ctrl.rs | 559 ++--- va416xx/src/tim0/enable.rs | 115 +- va416xx/src/tim0/perid.rs | 35 +- va416xx/src/tim0/pwm_value.rs | 73 +- va416xx/src/tim0/pwma_value.rs | 73 +- va416xx/src/tim0/pwmb_value.rs | 73 +- va416xx/src/tim0/rst_value.rs | 73 +- va416xx/src/trng.rs | 298 ++- va416xx/src/trng/autocorr_statistic.rs | 153 +- va416xx/src/trng/bist_cntr0.rs | 53 +- va416xx/src/trng/bist_cntr1.rs | 53 - va416xx/src/trng/bist_cntr2.rs | 53 - va416xx/src/trng/busy.rs | 53 +- va416xx/src/trng/config.rs | 105 +- va416xx/src/trng/debug_control.rs | 223 +- va416xx/src/trng/ehr_data0.rs | 53 +- va416xx/src/trng/ehr_data1.rs | 53 - va416xx/src/trng/ehr_data2.rs | 53 - va416xx/src/trng/ehr_data3.rs | 53 - va416xx/src/trng/ehr_data4.rs | 53 - va416xx/src/trng/ehr_data5.rs | 53 - va416xx/src/trng/icr.rs | 297 +-- va416xx/src/trng/imr.rs | 281 +-- va416xx/src/trng/isr.rs | 126 +- va416xx/src/trng/rnd_source_enable.rs | 115 +- va416xx/src/trng/rst_bits_counter.rs | 115 +- va416xx/src/trng/sample_cnt1.rs | 105 +- va416xx/src/trng/sw_reset.rs | 115 +- va416xx/src/trng/valid.rs | 53 +- va416xx/src/uart0.rs | 270 ++- va416xx/src/uart0/addr9.rs | 73 +- va416xx/src/uart0/addr9mask.rs | 73 +- va416xx/src/uart0/clkscale.rs | 168 +- va416xx/src/uart0/ctrl.rs | 565 +---- va416xx/src/uart0/data.rs | 73 +- va416xx/src/uart0/enable.rs | 161 +- va416xx/src/uart0/fifo_clr.rs | 102 +- va416xx/src/uart0/irq_clr.rs | 234 -- va416xx/src/uart0/irq_enb.rs | 391 +--- va416xx/src/uart0/irq_end.rs | 173 -- va416xx/src/uart0/irq_raw.rs | 173 -- va416xx/src/uart0/perid.rs | 35 +- va416xx/src/uart0/rxfifoirqtrg.rs | 73 +- va416xx/src/uart0/rxfifortstrg.rs | 73 +- va416xx/src/uart0/rxstatus.rs | 243 +- va416xx/src/uart0/state.rs | 35 +- va416xx/src/uart0/txbreak.rs | 52 +- va416xx/src/uart0/txfifoirqtrg.rs | 73 +- va416xx/src/uart0/txstatus.rs | 129 +- va416xx/src/utility.rs | 214 +- va416xx/src/utility/perid.rs | 35 +- va416xx/src/utility/ram_trap_addr0.rs | 163 +- va416xx/src/utility/ram_trap_addr1.rs | 163 +- va416xx/src/utility/ram_trap_synd0.rs | 153 +- va416xx/src/utility/ram_trap_synd1.rs | 153 +- va416xx/src/utility/rom_trap_address.rs | 163 +- va416xx/src/utility/rom_trap_synd.rs | 153 +- va416xx/src/utility/synd_check_32_44_data.rs | 35 +- va416xx/src/utility/synd_check_32_44_synd.rs | 99 +- va416xx/src/utility/synd_check_32_52_data.rs | 35 +- va416xx/src/utility/synd_check_32_52_synd.rs | 99 +- va416xx/src/utility/synd_data.rs | 73 +- va416xx/src/utility/synd_enc_32_44.rs | 153 +- va416xx/src/utility/synd_enc_32_52.rs | 53 +- va416xx/src/utility/synd_synd.rs | 105 +- va416xx/src/watch_dog.rs | 242 +- va416xx/src/watch_dog/wdogcontrol.rs | 173 +- va416xx/src/watch_dog/wdogintclr.rs | 105 +- va416xx/src/watch_dog/wdogitcr.rs | 115 +- va416xx/src/watch_dog/wdogitop.rs | 173 +- va416xx/src/watch_dog/wdogload.rs | 105 +- va416xx/src/watch_dog/wdoglock.rs | 105 +- va416xx/src/watch_dog/wdogmis.rs | 53 +- va416xx/src/watch_dog/wdogpcellid0.rs | 53 +- va416xx/src/watch_dog/wdogpcellid1.rs | 53 +- va416xx/src/watch_dog/wdogpcellid2.rs | 53 +- va416xx/src/watch_dog/wdogpcellid3.rs | 53 +- va416xx/src/watch_dog/wdogperiphid0.rs | 53 +- va416xx/src/watch_dog/wdogperiphid1.rs | 53 +- va416xx/src/watch_dog/wdogperiphid2.rs | 53 +- va416xx/src/watch_dog/wdogperiphid3.rs | 53 +- va416xx/src/watch_dog/wdogris.rs | 53 +- va416xx/src/watch_dog/wdogvalue.rs | 53 +- va416xx/svd/va416xx-base.svd | 1 - 580 files changed, 25461 insertions(+), 82429 deletions(-) create mode 100644 va416xx/src/generic/raw.rs delete mode 100644 va416xx/src/i2c0/irq_clr.rs delete mode 100644 va416xx/src/i2c0/irq_end.rs delete mode 100644 va416xx/src/i2c0/irq_raw.rs delete mode 100644 va416xx/src/i2c0/s0_irq_clr.rs delete mode 100644 va416xx/src/i2c0/s0_irq_end.rs delete mode 100644 va416xx/src/i2c0/s0_irq_raw.rs delete mode 100644 va416xx/src/ioconfig/portb.rs delete mode 100644 va416xx/src/ioconfig/portc.rs delete mode 100644 va416xx/src/ioconfig/portd.rs delete mode 100644 va416xx/src/ioconfig/porte.rs delete mode 100644 va416xx/src/ioconfig/portf.rs delete mode 100644 va416xx/src/ioconfig/portg.rs delete mode 100644 va416xx/src/porta/clrout.rs delete mode 100644 va416xx/src/porta/clroutbyte.rs delete mode 100644 va416xx/src/porta/datainraw.rs delete mode 100644 va416xx/src/porta/datainrawbyte.rs delete mode 100644 va416xx/src/porta/dataoutraw.rs delete mode 100644 va416xx/src/porta/dataoutrawbyte.rs delete mode 100644 va416xx/src/porta/delay1.rs delete mode 100644 va416xx/src/porta/delay1byte.rs delete mode 100644 va416xx/src/porta/delay2.rs delete mode 100644 va416xx/src/porta/delay2byte.rs delete mode 100644 va416xx/src/porta/dir.rs delete mode 100644 va416xx/src/porta/dirbyte.rs delete mode 100644 va416xx/src/porta/pulse.rs delete mode 100644 va416xx/src/porta/pulsebase.rs delete mode 100644 va416xx/src/porta/pulsebasebyte.rs delete mode 100644 va416xx/src/porta/pulsebyte.rs delete mode 100644 va416xx/src/porta/setout.rs delete mode 100644 va416xx/src/porta/setoutbyte.rs delete mode 100644 va416xx/src/porta/togout.rs delete mode 100644 va416xx/src/porta/togoutbyte.rs delete mode 100644 va416xx/src/spi0/irq_clr.rs delete mode 100644 va416xx/src/spi0/irq_end.rs delete mode 100644 va416xx/src/spi0/irq_raw.rs delete mode 100644 va416xx/src/sysconfig/ebi_cfg1.rs delete mode 100644 va416xx/src/sysconfig/ebi_cfg2.rs delete mode 100644 va416xx/src/sysconfig/ebi_cfg3.rs delete mode 100644 va416xx/src/sysconfig/irq_clr.rs delete mode 100644 va416xx/src/sysconfig/irq_end.rs delete mode 100644 va416xx/src/sysconfig/irq_raw.rs delete mode 100644 va416xx/src/sysconfig/peripheral_clk_enable.rs delete mode 100644 va416xx/src/sysconfig/ram0_scrub.rs delete mode 100644 va416xx/src/sysconfig/ram1_mbe.rs delete mode 100644 va416xx/src/sysconfig/ram1_sbe.rs delete mode 100644 va416xx/src/sysconfig/ram1_scrub.rs delete mode 100644 va416xx/src/sysconfig/rom_mbe.rs delete mode 100644 va416xx/src/sysconfig/rom_sbe.rs delete mode 100644 va416xx/src/sysconfig/rst_cntl_ram0.rs delete mode 100644 va416xx/src/sysconfig/rst_cntl_ram1.rs delete mode 100644 va416xx/src/sysconfig/rst_cntl_rom.rs delete mode 100644 va416xx/src/tim0/cascade1.rs delete mode 100644 va416xx/src/tim0/cascade2.rs delete mode 100644 va416xx/src/trng/bist_cntr1.rs delete mode 100644 va416xx/src/trng/bist_cntr2.rs delete mode 100644 va416xx/src/trng/ehr_data1.rs delete mode 100644 va416xx/src/trng/ehr_data2.rs delete mode 100644 va416xx/src/trng/ehr_data3.rs delete mode 100644 va416xx/src/trng/ehr_data4.rs delete mode 100644 va416xx/src/trng/ehr_data5.rs delete mode 100644 va416xx/src/uart0/irq_clr.rs delete mode 100644 va416xx/src/uart0/irq_end.rs delete mode 100644 va416xx/src/uart0/irq_raw.rs diff --git a/va416xx/build.rs b/va416xx/build.rs index 597923f..d0781ac 100644 --- a/va416xx/build.rs +++ b/va416xx/build.rs @@ -1,3 +1,4 @@ +#![doc = r" Builder file for Peripheral access crate generated by svd2rust tool"] use std::env; use std::fs::File; use std::io::Write; diff --git a/va416xx/device.x b/va416xx/device.x index b62a5a9..983fc7c 100644 --- a/va416xx/device.x +++ b/va416xx/device.x @@ -34,16 +34,16 @@ PROVIDE(I2C1_MS = DefaultHandler); PROVIDE(I2C1_SL = DefaultHandler); PROVIDE(I2C2_MS = DefaultHandler); PROVIDE(I2C2_SL = DefaultHandler); -PROVIDE(ETHERNET = DefaultHandler); +PROVIDE(Ethernet = DefaultHandler); PROVIDE(U37 = DefaultHandler); -PROVIDE(SPW = DefaultHandler); +PROVIDE(SpW = DefaultHandler); PROVIDE(U39 = DefaultHandler); PROVIDE(DAC0 = DefaultHandler); PROVIDE(DAC1 = DefaultHandler); PROVIDE(TRNG = DefaultHandler); PROVIDE(DMA_ERROR = DefaultHandler); PROVIDE(ADC = DefaultHandler); -PROVIDE(LOCLK = DefaultHandler); +PROVIDE(LoCLK = DefaultHandler); PROVIDE(LVD = DefaultHandler); PROVIDE(WATCHDOG = DefaultHandler); PROVIDE(TIM0 = DefaultHandler); diff --git a/va416xx/src/adc.rs b/va416xx/src/adc.rs index 3d2d2cc..b5d9d91 100644 --- a/va416xx/src/adc.rs +++ b/va416xx/src/adc.rs @@ -1,65 +1,127 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - #[doc = "0x00 - Control Register"] - pub ctrl: crate::Reg, - #[doc = "0x04 - FIFO data"] - pub fifo_data: crate::Reg, - #[doc = "0x08 - Status"] - pub status: crate::Reg, - #[doc = "0x0c - Interrupt Enable"] - pub irq_enb: crate::Reg, - #[doc = "0x10 - Raw Interrupt Status"] - pub irq_raw: crate::Reg, - #[doc = "0x14 - Enabled Interrupt Status"] - pub irq_end: crate::Reg, - #[doc = "0x18 - Clear Interrupt"] - pub irq_clr: crate::Reg, - #[doc = "0x1c - Receive FIFO Interrupt Trigger Value"] - pub rxfifoirqtrg: crate::Reg, - #[doc = "0x20 - FIFO Clear"] - pub fifo_clr: crate::Reg, + ctrl: Ctrl, + fifo_data: FifoData, + status: Status, + irq_enb: IrqEnb, + irq_raw: IrqRaw, + irq_end: IrqEnd, + irq_clr: IrqClr, + rxfifoirqtrg: Rxfifoirqtrg, + fifo_clr: FifoClr, _reserved9: [u8; 0x0fd8], - #[doc = "0xffc - Peripheral ID Register"] - pub perid: crate::Reg, + perid: Perid, } -#[doc = "CTRL register accessor: an alias for `Reg`"] -pub type CTRL = crate::Reg; +impl RegisterBlock { + #[doc = "0x00 - Control Register"] + #[inline(always)] + pub const fn ctrl(&self) -> &Ctrl { + &self.ctrl + } + #[doc = "0x04 - FIFO data"] + #[inline(always)] + pub const fn fifo_data(&self) -> &FifoData { + &self.fifo_data + } + #[doc = "0x08 - Status"] + #[inline(always)] + pub const fn status(&self) -> &Status { + &self.status + } + #[doc = "0x0c - Interrupt Enable"] + #[inline(always)] + pub const fn irq_enb(&self) -> &IrqEnb { + &self.irq_enb + } + #[doc = "0x10 - Raw Interrupt Status"] + #[inline(always)] + pub const fn irq_raw(&self) -> &IrqRaw { + &self.irq_raw + } + #[doc = "0x14 - Enabled Interrupt Status"] + #[inline(always)] + pub const fn irq_end(&self) -> &IrqEnd { + &self.irq_end + } + #[doc = "0x18 - Clear Interrupt"] + #[inline(always)] + pub const fn irq_clr(&self) -> &IrqClr { + &self.irq_clr + } + #[doc = "0x1c - Receive FIFO Interrupt Trigger Value"] + #[inline(always)] + pub const fn rxfifoirqtrg(&self) -> &Rxfifoirqtrg { + &self.rxfifoirqtrg + } + #[doc = "0x20 - FIFO Clear"] + #[inline(always)] + pub const fn fifo_clr(&self) -> &FifoClr { + &self.fifo_clr + } + #[doc = "0xffc - Peripheral ID Register"] + #[inline(always)] + pub const fn perid(&self) -> &Perid { + &self.perid + } +} +#[doc = "CTRL (rw) register accessor: Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`] +module"] +#[doc(alias = "CTRL")] +pub type Ctrl = crate::Reg; #[doc = "Control Register"] pub mod ctrl; -#[doc = "FIFO_DATA register accessor: an alias for `Reg`"] -pub type FIFO_DATA = crate::Reg; +#[doc = "FIFO_DATA (r) register accessor: FIFO data\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fifo_data::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fifo_data`] +module"] +#[doc(alias = "FIFO_DATA")] +pub type FifoData = crate::Reg; #[doc = "FIFO data"] pub mod fifo_data; -#[doc = "STATUS register accessor: an alias for `Reg`"] -pub type STATUS = crate::Reg; +#[doc = "STATUS (r) register accessor: Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] +module"] +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "Status"] pub mod status; -#[doc = "IRQ_ENB register accessor: an alias for `Reg`"] -pub type IRQ_ENB = crate::Reg; +#[doc = "IRQ_ENB (rw) register accessor: Interrupt Enable\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_enb::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`irq_enb::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_enb`] +module"] +#[doc(alias = "IRQ_ENB")] +pub type IrqEnb = crate::Reg; #[doc = "Interrupt Enable"] pub mod irq_enb; -#[doc = "IRQ_RAW register accessor: an alias for `Reg`"] -pub type IRQ_RAW = crate::Reg; +#[doc = "IRQ_RAW (r) register accessor: Raw Interrupt Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_raw::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_raw`] +module"] +#[doc(alias = "IRQ_RAW")] +pub type IrqRaw = crate::Reg; #[doc = "Raw Interrupt Status"] pub mod irq_raw; -#[doc = "IRQ_END register accessor: an alias for `Reg`"] -pub type IRQ_END = crate::Reg; +#[doc = "IRQ_END (r) register accessor: Enabled Interrupt Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_end::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_end`] +module"] +#[doc(alias = "IRQ_END")] +pub type IrqEnd = crate::Reg; #[doc = "Enabled Interrupt Status"] pub mod irq_end; -#[doc = "IRQ_CLR register accessor: an alias for `Reg`"] -pub type IRQ_CLR = crate::Reg; +#[doc = "IRQ_CLR (w) register accessor: Clear Interrupt\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`irq_clr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_clr`] +module"] +#[doc(alias = "IRQ_CLR")] +pub type IrqClr = crate::Reg; #[doc = "Clear Interrupt"] pub mod irq_clr; -#[doc = "RXFIFOIRQTRG register accessor: an alias for `Reg`"] -pub type RXFIFOIRQTRG = crate::Reg; +#[doc = "RXFIFOIRQTRG (rw) register accessor: Receive FIFO Interrupt Trigger Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxfifoirqtrg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rxfifoirqtrg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxfifoirqtrg`] +module"] +#[doc(alias = "RXFIFOIRQTRG")] +pub type Rxfifoirqtrg = crate::Reg; #[doc = "Receive FIFO Interrupt Trigger Value"] pub mod rxfifoirqtrg; -#[doc = "FIFO_CLR register accessor: an alias for `Reg`"] -pub type FIFO_CLR = crate::Reg; +#[doc = "FIFO_CLR (rw) register accessor: FIFO Clear\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fifo_clr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fifo_clr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fifo_clr`] +module"] +#[doc(alias = "FIFO_CLR")] +pub type FifoClr = crate::Reg; #[doc = "FIFO Clear"] pub mod fifo_clr; -#[doc = "PERID register accessor: an alias for `Reg`"] -pub type PERID = crate::Reg; +#[doc = "PERID (r) register accessor: Peripheral ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`perid::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@perid`] +module"] +#[doc(alias = "PERID")] +pub type Perid = crate::Reg; #[doc = "Peripheral ID Register"] pub mod perid; diff --git a/va416xx/src/adc/ctrl.rs b/va416xx/src/adc/ctrl.rs index 358a959..4fce290 100644 --- a/va416xx/src/adc/ctrl.rs +++ b/va416xx/src/adc/ctrl.rs @@ -1,328 +1,115 @@ #[doc = "Register `CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `CONV_CNT` reader - Conversion count describes the number of conversions to be applied for triggers/sweeps. (N+1 conversions)"] -pub struct CONV_CNT_R(crate::FieldReader); -impl CONV_CNT_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - CONV_CNT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CONV_CNT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CONV_CNT` writer - Conversion count describes the number of conversions to be applied for triggers/sweeps. (N+1 conversions)"] -pub struct CONV_CNT_W<'a> { - w: &'a mut W, -} -impl<'a> CONV_CNT_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x0f << 20)) | ((value as u32 & 0x0f) << 20); - self.w - } -} -#[doc = "Field `MANUAL_TRIG` reader - Starts analog acquisition"] -pub struct MANUAL_TRIG_R(crate::FieldReader); -impl MANUAL_TRIG_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - MANUAL_TRIG_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for MANUAL_TRIG_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `MANUAL_TRIG` writer - Starts analog acquisition"] -pub struct MANUAL_TRIG_W<'a> { - w: &'a mut W, -} -impl<'a> MANUAL_TRIG_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 19)) | ((value as u32 & 0x01) << 19); - self.w - } -} -#[doc = "Field `EXT_TRIG_EN` reader - Allows the external trigger to start analog acquisition"] -pub struct EXT_TRIG_EN_R(crate::FieldReader); -impl EXT_TRIG_EN_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - EXT_TRIG_EN_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for EXT_TRIG_EN_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `EXT_TRIG_EN` writer - Allows the external trigger to start analog acquisition"] -pub struct EXT_TRIG_EN_W<'a> { - w: &'a mut W, -} -impl<'a> EXT_TRIG_EN_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 18)) | ((value as u32 & 0x01) << 18); - self.w - } -} -#[doc = "Field `SWEEP_EN` reader - ADC data acquisition for all enabled channel"] -pub struct SWEEP_EN_R(crate::FieldReader); -impl SWEEP_EN_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - SWEEP_EN_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for SWEEP_EN_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `SWEEP_EN` writer - ADC data acquisition for all enabled channel"] -pub struct SWEEP_EN_W<'a> { - w: &'a mut W, -} -impl<'a> SWEEP_EN_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 17)) | ((value as u32 & 0x01) << 17); - self.w - } -} -#[doc = "Field `CHAN_TAG_EN` reader - Enables the channel tag to be saved with the ADC data"] -pub struct CHAN_TAG_EN_R(crate::FieldReader); -impl CHAN_TAG_EN_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CHAN_TAG_EN_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CHAN_TAG_EN_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CHAN_TAG_EN` writer - Enables the channel tag to be saved with the ADC data"] -pub struct CHAN_TAG_EN_W<'a> { - w: &'a mut W, -} -impl<'a> CHAN_TAG_EN_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16); - self.w - } -} +pub type W = crate::W; #[doc = "Field `CHAN_EN` reader - Enables the channel for data collection"] -pub struct CHAN_EN_R(crate::FieldReader); -impl CHAN_EN_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - CHAN_EN_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CHAN_EN_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type ChanEnR = crate::FieldReader; #[doc = "Field `CHAN_EN` writer - Enables the channel for data collection"] -pub struct CHAN_EN_W<'a> { - w: &'a mut W, -} -impl<'a> CHAN_EN_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); - self.w - } -} +pub type ChanEnW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +#[doc = "Field `CHAN_TAG_EN` reader - Enables the channel tag to be saved with the ADC data"] +pub type ChanTagEnR = crate::BitReader; +#[doc = "Field `CHAN_TAG_EN` writer - Enables the channel tag to be saved with the ADC data"] +pub type ChanTagEnW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `SWEEP_EN` reader - ADC data acquisition for all enabled channel"] +pub type SweepEnR = crate::BitReader; +#[doc = "Field `SWEEP_EN` writer - ADC data acquisition for all enabled channel"] +pub type SweepEnW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `EXT_TRIG_EN` reader - Allows the external trigger to start analog acquisition"] +pub type ExtTrigEnR = crate::BitReader; +#[doc = "Field `EXT_TRIG_EN` writer - Allows the external trigger to start analog acquisition"] +pub type ExtTrigEnW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `MANUAL_TRIG` reader - Starts analog acquisition"] +pub type ManualTrigR = crate::BitReader; +#[doc = "Field `MANUAL_TRIG` writer - Starts analog acquisition"] +pub type ManualTrigW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `CONV_CNT` reader - Conversion count describes the number of conversions to be applied for triggers/sweeps. (N+1 conversions)"] +pub type ConvCntR = crate::FieldReader; +#[doc = "Field `CONV_CNT` writer - Conversion count describes the number of conversions to be applied for triggers/sweeps. (N+1 conversions)"] +pub type ConvCntW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { - #[doc = "Bits 20:23 - Conversion count describes the number of conversions to be applied for triggers/sweeps. (N+1 conversions)"] + #[doc = "Bits 0:15 - Enables the channel for data collection"] #[inline(always)] - pub fn conv_cnt(&self) -> CONV_CNT_R { - CONV_CNT_R::new(((self.bits >> 20) & 0x0f) as u8) - } - #[doc = "Bit 19 - Starts analog acquisition"] - #[inline(always)] - pub fn manual_trig(&self) -> MANUAL_TRIG_R { - MANUAL_TRIG_R::new(((self.bits >> 19) & 0x01) != 0) - } - #[doc = "Bit 18 - Allows the external trigger to start analog acquisition"] - #[inline(always)] - pub fn ext_trig_en(&self) -> EXT_TRIG_EN_R { - EXT_TRIG_EN_R::new(((self.bits >> 18) & 0x01) != 0) - } - #[doc = "Bit 17 - ADC data acquisition for all enabled channel"] - #[inline(always)] - pub fn sweep_en(&self) -> SWEEP_EN_R { - SWEEP_EN_R::new(((self.bits >> 17) & 0x01) != 0) + pub fn chan_en(&self) -> ChanEnR { + ChanEnR::new((self.bits & 0xffff) as u16) } #[doc = "Bit 16 - Enables the channel tag to be saved with the ADC data"] #[inline(always)] - pub fn chan_tag_en(&self) -> CHAN_TAG_EN_R { - CHAN_TAG_EN_R::new(((self.bits >> 16) & 0x01) != 0) + pub fn chan_tag_en(&self) -> ChanTagEnR { + ChanTagEnR::new(((self.bits >> 16) & 1) != 0) } - #[doc = "Bits 0:15 - Enables the channel for data collection"] + #[doc = "Bit 17 - ADC data acquisition for all enabled channel"] #[inline(always)] - pub fn chan_en(&self) -> CHAN_EN_R { - CHAN_EN_R::new((self.bits & 0xffff) as u16) + pub fn sweep_en(&self) -> SweepEnR { + SweepEnR::new(((self.bits >> 17) & 1) != 0) + } + #[doc = "Bit 18 - Allows the external trigger to start analog acquisition"] + #[inline(always)] + pub fn ext_trig_en(&self) -> ExtTrigEnR { + ExtTrigEnR::new(((self.bits >> 18) & 1) != 0) + } + #[doc = "Bit 19 - Starts analog acquisition"] + #[inline(always)] + pub fn manual_trig(&self) -> ManualTrigR { + ManualTrigR::new(((self.bits >> 19) & 1) != 0) + } + #[doc = "Bits 20:23 - Conversion count describes the number of conversions to be applied for triggers/sweeps. (N+1 conversions)"] + #[inline(always)] + pub fn conv_cnt(&self) -> ConvCntR { + ConvCntR::new(((self.bits >> 20) & 0x0f) as u8) } } impl W { - #[doc = "Bits 20:23 - Conversion count describes the number of conversions to be applied for triggers/sweeps. (N+1 conversions)"] + #[doc = "Bits 0:15 - Enables the channel for data collection"] #[inline(always)] - pub fn conv_cnt(&mut self) -> CONV_CNT_W { - CONV_CNT_W { w: self } - } - #[doc = "Bit 19 - Starts analog acquisition"] - #[inline(always)] - pub fn manual_trig(&mut self) -> MANUAL_TRIG_W { - MANUAL_TRIG_W { w: self } - } - #[doc = "Bit 18 - Allows the external trigger to start analog acquisition"] - #[inline(always)] - pub fn ext_trig_en(&mut self) -> EXT_TRIG_EN_W { - EXT_TRIG_EN_W { w: self } - } - #[doc = "Bit 17 - ADC data acquisition for all enabled channel"] - #[inline(always)] - pub fn sweep_en(&mut self) -> SWEEP_EN_W { - SWEEP_EN_W { w: self } + #[must_use] + pub fn chan_en(&mut self) -> ChanEnW { + ChanEnW::new(self, 0) } #[doc = "Bit 16 - Enables the channel tag to be saved with the ADC data"] #[inline(always)] - pub fn chan_tag_en(&mut self) -> CHAN_TAG_EN_W { - CHAN_TAG_EN_W { w: self } + #[must_use] + pub fn chan_tag_en(&mut self) -> ChanTagEnW { + ChanTagEnW::new(self, 16) } - #[doc = "Bits 0:15 - Enables the channel for data collection"] + #[doc = "Bit 17 - ADC data acquisition for all enabled channel"] #[inline(always)] - pub fn chan_en(&mut self) -> CHAN_EN_W { - CHAN_EN_W { w: self } + #[must_use] + pub fn sweep_en(&mut self) -> SweepEnW { + SweepEnW::new(self, 17) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bit 18 - Allows the external trigger to start analog acquisition"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn ext_trig_en(&mut self) -> ExtTrigEnW { + ExtTrigEnW::new(self, 18) + } + #[doc = "Bit 19 - Starts analog acquisition"] + #[inline(always)] + #[must_use] + pub fn manual_trig(&mut self) -> ManualTrigW { + ManualTrigW::new(self, 19) + } + #[doc = "Bits 20:23 - Conversion count describes the number of conversions to be applied for triggers/sweeps. (N+1 conversions)"] + #[inline(always)] + #[must_use] + pub fn conv_cnt(&mut self) -> ConvCntW { + ConvCntW::new(self, 20) } } -#[doc = "Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](index.html) module"] -pub struct CTRL_SPEC; -impl crate::RegisterSpec for CTRL_SPEC { +#[doc = "Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctrl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctrl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CtrlSpec; +impl crate::RegisterSpec for CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [ctrl::R](R) reader structure"] -impl crate::Readable for CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ctrl::W](W) writer structure"] -impl crate::Writable for CTRL_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`ctrl::R`](R) reader structure"] +impl crate::Readable for CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`ctrl::W`](W) writer structure"] +impl crate::Writable for CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTRL to value 0"] -impl crate::Resettable for CTRL_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/adc/fifo_clr.rs b/va416xx/src/adc/fifo_clr.rs index aa6bdff..d3f8ab8 100644 --- a/va416xx/src/adc/fifo_clr.rs +++ b/va416xx/src/adc/fifo_clr.rs @@ -1,91 +1,31 @@ #[doc = "Register `FIFO_CLR` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `FIFO_CLR` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `FIFO_CLR` writer - Clears the ADC FIFO. Always reads 0"] -pub struct FIFO_CLR_W<'a> { - w: &'a mut W, -} -impl<'a> FIFO_CLR_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} +pub type FifoClrW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Clears the ADC FIFO. Always reads 0"] #[inline(always)] - pub fn fifo_clr(&mut self) -> FIFO_CLR_W { - FIFO_CLR_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn fifo_clr(&mut self) -> FifoClrW { + FifoClrW::new(self, 0) } } -#[doc = "FIFO Clear\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [fifo_clr](index.html) module"] -pub struct FIFO_CLR_SPEC; -impl crate::RegisterSpec for FIFO_CLR_SPEC { +#[doc = "FIFO Clear\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fifo_clr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fifo_clr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct FifoClrSpec; +impl crate::RegisterSpec for FifoClrSpec { type Ux = u32; } -#[doc = "`read()` method returns [fifo_clr::R](R) reader structure"] -impl crate::Readable for FIFO_CLR_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [fifo_clr::W](W) writer structure"] -impl crate::Writable for FIFO_CLR_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`fifo_clr::R`](R) reader structure"] +impl crate::Readable for FifoClrSpec {} +#[doc = "`write(|w| ..)` method takes [`fifo_clr::W`](W) writer structure"] +impl crate::Writable for FifoClrSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets FIFO_CLR to value 0"] -impl crate::Resettable for FIFO_CLR_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for FifoClrSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/adc/fifo_data.rs b/va416xx/src/adc/fifo_data.rs index dd00713..b4722b4 100644 --- a/va416xx/src/adc/fifo_data.rs +++ b/va416xx/src/adc/fifo_data.rs @@ -1,73 +1,29 @@ #[doc = "Register `FIFO_DATA` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Field `CHAN_TAG` reader - If enabled, this will include the number of the channel corresponding to the measurement"] -pub struct CHAN_TAG_R(crate::FieldReader); -impl CHAN_TAG_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - CHAN_TAG_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CHAN_TAG_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type R = crate::R; #[doc = "Field `ADC_DATA` reader - ADC acquisition data from the FIFO"] -pub struct ADC_DATA_R(crate::FieldReader); -impl ADC_DATA_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - ADC_DATA_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ADC_DATA_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type AdcDataR = crate::FieldReader; +#[doc = "Field `CHAN_TAG` reader - If enabled, this will include the number of the channel corresponding to the measurement"] +pub type ChanTagR = crate::FieldReader; impl R { - #[doc = "Bits 12:15 - If enabled, this will include the number of the channel corresponding to the measurement"] - #[inline(always)] - pub fn chan_tag(&self) -> CHAN_TAG_R { - CHAN_TAG_R::new(((self.bits >> 12) & 0x0f) as u8) - } #[doc = "Bits 0:11 - ADC acquisition data from the FIFO"] #[inline(always)] - pub fn adc_data(&self) -> ADC_DATA_R { - ADC_DATA_R::new((self.bits & 0x0fff) as u16) + pub fn adc_data(&self) -> AdcDataR { + AdcDataR::new((self.bits & 0x0fff) as u16) + } + #[doc = "Bits 12:15 - If enabled, this will include the number of the channel corresponding to the measurement"] + #[inline(always)] + pub fn chan_tag(&self) -> ChanTagR { + ChanTagR::new(((self.bits >> 12) & 0x0f) as u8) } } -#[doc = "FIFO data\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [fifo_data](index.html) module"] -pub struct FIFO_DATA_SPEC; -impl crate::RegisterSpec for FIFO_DATA_SPEC { +#[doc = "FIFO data\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fifo_data::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct FifoDataSpec; +impl crate::RegisterSpec for FifoDataSpec { type Ux = u32; } -#[doc = "`read()` method returns [fifo_data::R](R) reader structure"] -impl crate::Readable for FIFO_DATA_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`fifo_data::R`](R) reader structure"] +impl crate::Readable for FifoDataSpec {} #[doc = "`reset()` method sets FIFO_DATA to value 0"] -impl crate::Resettable for FIFO_DATA_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for FifoDataSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/adc/irq_clr.rs b/va416xx/src/adc/irq_clr.rs index 1594779..5efb9b7 100644 --- a/va416xx/src/adc/irq_clr.rs +++ b/va416xx/src/adc/irq_clr.rs @@ -1,153 +1,51 @@ #[doc = "Register `IRQ_CLR` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `TRIG_ERROR` writer - Clears the trigger error interrupt status. Always reads 0"] -pub struct TRIG_ERROR_W<'a> { - w: &'a mut W, -} -impl<'a> TRIG_ERROR_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); - self.w - } -} -#[doc = "Field `ADC_DONE` writer - Clears the ADC done interrupt status. Always reads 0"] -pub struct ADC_DONE_W<'a> { - w: &'a mut W, -} -impl<'a> ADC_DONE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); - self.w - } -} -#[doc = "Field `FIFO_UFLOW` writer - Clears the FIFO underflow interrupt status. Always reads 0"] -pub struct FIFO_UFLOW_W<'a> { - w: &'a mut W, -} -impl<'a> FIFO_UFLOW_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); - self.w - } -} +pub type W = crate::W; #[doc = "Field `FIFO_OFLOW` writer - Clears the FIFO overflow interrupt status. Always reads 0"] -pub struct FIFO_OFLOW_W<'a> { - w: &'a mut W, -} -impl<'a> FIFO_OFLOW_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} +pub type FifoOflowW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `FIFO_UFLOW` writer - Clears the FIFO underflow interrupt status. Always reads 0"] +pub type FifoUflowW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `ADC_DONE` writer - Clears the ADC done interrupt status. Always reads 0"] +pub type AdcDoneW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TRIG_ERROR` writer - Clears the trigger error interrupt status. Always reads 0"] +pub type TrigErrorW<'a, REG> = crate::BitWriter<'a, REG>; impl W { - #[doc = "Bit 3 - Clears the trigger error interrupt status. Always reads 0"] + #[doc = "Bit 0 - Clears the FIFO overflow interrupt status. Always reads 0"] #[inline(always)] - pub fn trig_error(&mut self) -> TRIG_ERROR_W { - TRIG_ERROR_W { w: self } - } - #[doc = "Bit 2 - Clears the ADC done interrupt status. Always reads 0"] - #[inline(always)] - pub fn adc_done(&mut self) -> ADC_DONE_W { - ADC_DONE_W { w: self } + #[must_use] + pub fn fifo_oflow(&mut self) -> FifoOflowW { + FifoOflowW::new(self, 0) } #[doc = "Bit 1 - Clears the FIFO underflow interrupt status. Always reads 0"] #[inline(always)] - pub fn fifo_uflow(&mut self) -> FIFO_UFLOW_W { - FIFO_UFLOW_W { w: self } + #[must_use] + pub fn fifo_uflow(&mut self) -> FifoUflowW { + FifoUflowW::new(self, 1) } - #[doc = "Bit 0 - Clears the FIFO overflow interrupt status. Always reads 0"] + #[doc = "Bit 2 - Clears the ADC done interrupt status. Always reads 0"] #[inline(always)] - pub fn fifo_oflow(&mut self) -> FIFO_OFLOW_W { - FIFO_OFLOW_W { w: self } + #[must_use] + pub fn adc_done(&mut self) -> AdcDoneW { + AdcDoneW::new(self, 2) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bit 3 - Clears the trigger error interrupt status. Always reads 0"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn trig_error(&mut self) -> TrigErrorW { + TrigErrorW::new(self, 3) } } -#[doc = "Clear Interrupt\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [irq_clr](index.html) module"] -pub struct IRQ_CLR_SPEC; -impl crate::RegisterSpec for IRQ_CLR_SPEC { +#[doc = "Clear Interrupt\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`irq_clr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IrqClrSpec; +impl crate::RegisterSpec for IrqClrSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [irq_clr::W](W) writer structure"] -impl crate::Writable for IRQ_CLR_SPEC { - type Writer = W; +#[doc = "`write(|w| ..)` method takes [`irq_clr::W`](W) writer structure"] +impl crate::Writable for IrqClrSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IRQ_CLR to value 0"] -impl crate::Resettable for IRQ_CLR_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for IrqClrSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/adc/irq_enb.rs b/va416xx/src/adc/irq_enb.rs index 7130c8c..2f5221e 100644 --- a/va416xx/src/adc/irq_enb.rs +++ b/va416xx/src/adc/irq_enb.rs @@ -1,395 +1,130 @@ #[doc = "Register `IRQ_ENB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IRQ_ENB` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `FIFO_DEPTH_TRIG` reader - Enables the interrupt for the FIFO entry count meets or exceeds the trigger level"] -pub struct FIFO_DEPTH_TRIG_R(crate::FieldReader); -impl FIFO_DEPTH_TRIG_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - FIFO_DEPTH_TRIG_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for FIFO_DEPTH_TRIG_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `FIFO_DEPTH_TRIG` writer - Enables the interrupt for the FIFO entry count meets or exceeds the trigger level"] -pub struct FIFO_DEPTH_TRIG_W<'a> { - w: &'a mut W, -} -impl<'a> FIFO_DEPTH_TRIG_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); - self.w - } -} -#[doc = "Field `TRIG_ERROR` reader - Enables the interrupt for a trigger error"] -pub struct TRIG_ERROR_R(crate::FieldReader); -impl TRIG_ERROR_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TRIG_ERROR_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TRIG_ERROR_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TRIG_ERROR` writer - Enables the interrupt for a trigger error"] -pub struct TRIG_ERROR_W<'a> { - w: &'a mut W, -} -impl<'a> TRIG_ERROR_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); - self.w - } -} -#[doc = "Field `ADC_DONE` reader - Enables the interrupt for an ADC data acquisition completion"] -pub struct ADC_DONE_R(crate::FieldReader); -impl ADC_DONE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - ADC_DONE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ADC_DONE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `ADC_DONE` writer - Enables the interrupt for an ADC data acquisition completion"] -pub struct ADC_DONE_W<'a> { - w: &'a mut W, -} -impl<'a> ADC_DONE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); - self.w - } -} -#[doc = "Field `FIFO_UFLOW` reader - Enables the interrupt for a FIFO underflow"] -pub struct FIFO_UFLOW_R(crate::FieldReader); -impl FIFO_UFLOW_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - FIFO_UFLOW_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for FIFO_UFLOW_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `FIFO_UFLOW` writer - Enables the interrupt for a FIFO underflow"] -pub struct FIFO_UFLOW_W<'a> { - w: &'a mut W, -} -impl<'a> FIFO_UFLOW_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); - self.w - } -} -#[doc = "Field `FIFO_OFLOW` reader - Enables the interrupt for a FIFO overflow"] -pub struct FIFO_OFLOW_R(crate::FieldReader); -impl FIFO_OFLOW_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - FIFO_OFLOW_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for FIFO_OFLOW_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `FIFO_OFLOW` writer - Enables the interrupt for a FIFO overflow"] -pub struct FIFO_OFLOW_W<'a> { - w: &'a mut W, -} -impl<'a> FIFO_OFLOW_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); - self.w - } -} -#[doc = "Field `FIFO_FULL` reader - Enables the interrupt for FIFO full"] -pub struct FIFO_FULL_R(crate::FieldReader); -impl FIFO_FULL_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - FIFO_FULL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for FIFO_FULL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `FIFO_FULL` writer - Enables the interrupt for FIFO full"] -pub struct FIFO_FULL_W<'a> { - w: &'a mut W, -} -impl<'a> FIFO_FULL_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); - self.w - } -} +pub type W = crate::W; #[doc = "Field `FIFO_EMPTY` reader - Enables the interrupt for FIFO empty"] -pub struct FIFO_EMPTY_R(crate::FieldReader); -impl FIFO_EMPTY_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - FIFO_EMPTY_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for FIFO_EMPTY_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type FifoEmptyR = crate::BitReader; #[doc = "Field `FIFO_EMPTY` writer - Enables the interrupt for FIFO empty"] -pub struct FIFO_EMPTY_W<'a> { - w: &'a mut W, -} -impl<'a> FIFO_EMPTY_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} +pub type FifoEmptyW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `FIFO_FULL` reader - Enables the interrupt for FIFO full"] +pub type FifoFullR = crate::BitReader; +#[doc = "Field `FIFO_FULL` writer - Enables the interrupt for FIFO full"] +pub type FifoFullW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `FIFO_OFLOW` reader - Enables the interrupt for a FIFO overflow"] +pub type FifoOflowR = crate::BitReader; +#[doc = "Field `FIFO_OFLOW` writer - Enables the interrupt for a FIFO overflow"] +pub type FifoOflowW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `FIFO_UFLOW` reader - Enables the interrupt for a FIFO underflow"] +pub type FifoUflowR = crate::BitReader; +#[doc = "Field `FIFO_UFLOW` writer - Enables the interrupt for a FIFO underflow"] +pub type FifoUflowW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `ADC_DONE` reader - Enables the interrupt for an ADC data acquisition completion"] +pub type AdcDoneR = crate::BitReader; +#[doc = "Field `ADC_DONE` writer - Enables the interrupt for an ADC data acquisition completion"] +pub type AdcDoneW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TRIG_ERROR` reader - Enables the interrupt for a trigger error"] +pub type TrigErrorR = crate::BitReader; +#[doc = "Field `TRIG_ERROR` writer - Enables the interrupt for a trigger error"] +pub type TrigErrorW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `FIFO_DEPTH_TRIG` reader - Enables the interrupt for the FIFO entry count meets or exceeds the trigger level"] +pub type FifoDepthTrigR = crate::BitReader; +#[doc = "Field `FIFO_DEPTH_TRIG` writer - Enables the interrupt for the FIFO entry count meets or exceeds the trigger level"] +pub type FifoDepthTrigW<'a, REG> = crate::BitWriter<'a, REG>; impl R { - #[doc = "Bit 6 - Enables the interrupt for the FIFO entry count meets or exceeds the trigger level"] + #[doc = "Bit 0 - Enables the interrupt for FIFO empty"] #[inline(always)] - pub fn fifo_depth_trig(&self) -> FIFO_DEPTH_TRIG_R { - FIFO_DEPTH_TRIG_R::new(((self.bits >> 6) & 0x01) != 0) - } - #[doc = "Bit 5 - Enables the interrupt for a trigger error"] - #[inline(always)] - pub fn trig_error(&self) -> TRIG_ERROR_R { - TRIG_ERROR_R::new(((self.bits >> 5) & 0x01) != 0) - } - #[doc = "Bit 4 - Enables the interrupt for an ADC data acquisition completion"] - #[inline(always)] - pub fn adc_done(&self) -> ADC_DONE_R { - ADC_DONE_R::new(((self.bits >> 4) & 0x01) != 0) - } - #[doc = "Bit 3 - Enables the interrupt for a FIFO underflow"] - #[inline(always)] - pub fn fifo_uflow(&self) -> FIFO_UFLOW_R { - FIFO_UFLOW_R::new(((self.bits >> 3) & 0x01) != 0) - } - #[doc = "Bit 2 - Enables the interrupt for a FIFO overflow"] - #[inline(always)] - pub fn fifo_oflow(&self) -> FIFO_OFLOW_R { - FIFO_OFLOW_R::new(((self.bits >> 2) & 0x01) != 0) + pub fn fifo_empty(&self) -> FifoEmptyR { + FifoEmptyR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Enables the interrupt for FIFO full"] #[inline(always)] - pub fn fifo_full(&self) -> FIFO_FULL_R { - FIFO_FULL_R::new(((self.bits >> 1) & 0x01) != 0) + pub fn fifo_full(&self) -> FifoFullR { + FifoFullR::new(((self.bits >> 1) & 1) != 0) } - #[doc = "Bit 0 - Enables the interrupt for FIFO empty"] + #[doc = "Bit 2 - Enables the interrupt for a FIFO overflow"] #[inline(always)] - pub fn fifo_empty(&self) -> FIFO_EMPTY_R { - FIFO_EMPTY_R::new((self.bits & 0x01) != 0) + pub fn fifo_oflow(&self) -> FifoOflowR { + FifoOflowR::new(((self.bits >> 2) & 1) != 0) + } + #[doc = "Bit 3 - Enables the interrupt for a FIFO underflow"] + #[inline(always)] + pub fn fifo_uflow(&self) -> FifoUflowR { + FifoUflowR::new(((self.bits >> 3) & 1) != 0) + } + #[doc = "Bit 4 - Enables the interrupt for an ADC data acquisition completion"] + #[inline(always)] + pub fn adc_done(&self) -> AdcDoneR { + AdcDoneR::new(((self.bits >> 4) & 1) != 0) + } + #[doc = "Bit 5 - Enables the interrupt for a trigger error"] + #[inline(always)] + pub fn trig_error(&self) -> TrigErrorR { + TrigErrorR::new(((self.bits >> 5) & 1) != 0) + } + #[doc = "Bit 6 - Enables the interrupt for the FIFO entry count meets or exceeds the trigger level"] + #[inline(always)] + pub fn fifo_depth_trig(&self) -> FifoDepthTrigR { + FifoDepthTrigR::new(((self.bits >> 6) & 1) != 0) } } impl W { - #[doc = "Bit 6 - Enables the interrupt for the FIFO entry count meets or exceeds the trigger level"] + #[doc = "Bit 0 - Enables the interrupt for FIFO empty"] #[inline(always)] - pub fn fifo_depth_trig(&mut self) -> FIFO_DEPTH_TRIG_W { - FIFO_DEPTH_TRIG_W { w: self } - } - #[doc = "Bit 5 - Enables the interrupt for a trigger error"] - #[inline(always)] - pub fn trig_error(&mut self) -> TRIG_ERROR_W { - TRIG_ERROR_W { w: self } - } - #[doc = "Bit 4 - Enables the interrupt for an ADC data acquisition completion"] - #[inline(always)] - pub fn adc_done(&mut self) -> ADC_DONE_W { - ADC_DONE_W { w: self } - } - #[doc = "Bit 3 - Enables the interrupt for a FIFO underflow"] - #[inline(always)] - pub fn fifo_uflow(&mut self) -> FIFO_UFLOW_W { - FIFO_UFLOW_W { w: self } - } - #[doc = "Bit 2 - Enables the interrupt for a FIFO overflow"] - #[inline(always)] - pub fn fifo_oflow(&mut self) -> FIFO_OFLOW_W { - FIFO_OFLOW_W { w: self } + #[must_use] + pub fn fifo_empty(&mut self) -> FifoEmptyW { + FifoEmptyW::new(self, 0) } #[doc = "Bit 1 - Enables the interrupt for FIFO full"] #[inline(always)] - pub fn fifo_full(&mut self) -> FIFO_FULL_W { - FIFO_FULL_W { w: self } + #[must_use] + pub fn fifo_full(&mut self) -> FifoFullW { + FifoFullW::new(self, 1) } - #[doc = "Bit 0 - Enables the interrupt for FIFO empty"] + #[doc = "Bit 2 - Enables the interrupt for a FIFO overflow"] #[inline(always)] - pub fn fifo_empty(&mut self) -> FIFO_EMPTY_W { - FIFO_EMPTY_W { w: self } + #[must_use] + pub fn fifo_oflow(&mut self) -> FifoOflowW { + FifoOflowW::new(self, 2) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bit 3 - Enables the interrupt for a FIFO underflow"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn fifo_uflow(&mut self) -> FifoUflowW { + FifoUflowW::new(self, 3) + } + #[doc = "Bit 4 - Enables the interrupt for an ADC data acquisition completion"] + #[inline(always)] + #[must_use] + pub fn adc_done(&mut self) -> AdcDoneW { + AdcDoneW::new(self, 4) + } + #[doc = "Bit 5 - Enables the interrupt for a trigger error"] + #[inline(always)] + #[must_use] + pub fn trig_error(&mut self) -> TrigErrorW { + TrigErrorW::new(self, 5) + } + #[doc = "Bit 6 - Enables the interrupt for the FIFO entry count meets or exceeds the trigger level"] + #[inline(always)] + #[must_use] + pub fn fifo_depth_trig(&mut self) -> FifoDepthTrigW { + FifoDepthTrigW::new(self, 6) } } -#[doc = "Interrupt Enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [irq_enb](index.html) module"] -pub struct IRQ_ENB_SPEC; -impl crate::RegisterSpec for IRQ_ENB_SPEC { +#[doc = "Interrupt Enable\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_enb::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`irq_enb::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IrqEnbSpec; +impl crate::RegisterSpec for IrqEnbSpec { type Ux = u32; } -#[doc = "`read()` method returns [irq_enb::R](R) reader structure"] -impl crate::Readable for IRQ_ENB_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [irq_enb::W](W) writer structure"] -impl crate::Writable for IRQ_ENB_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`irq_enb::R`](R) reader structure"] +impl crate::Readable for IrqEnbSpec {} +#[doc = "`write(|w| ..)` method takes [`irq_enb::W`](W) writer structure"] +impl crate::Writable for IrqEnbSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IRQ_ENB to value 0"] -impl crate::Resettable for IRQ_ENB_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for IrqEnbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/adc/irq_end.rs b/va416xx/src/adc/irq_end.rs index 30c7f42..b581ede 100644 --- a/va416xx/src/adc/irq_end.rs +++ b/va416xx/src/adc/irq_end.rs @@ -1,173 +1,64 @@ #[doc = "Register `IRQ_END` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Field `FIFO_DEPTH_TRIG` reader - Indicates the interrupt for the FIFO entry count meets or exceeds the trigger level"] -pub struct FIFO_DEPTH_TRIG_R(crate::FieldReader); -impl FIFO_DEPTH_TRIG_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - FIFO_DEPTH_TRIG_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for FIFO_DEPTH_TRIG_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TRIG_ERROR` reader - Indicates a manual or external trigger occurred when the ADC was BUSY doing a conversion and the interrupt is enabled"] -pub struct TRIG_ERROR_R(crate::FieldReader); -impl TRIG_ERROR_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TRIG_ERROR_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TRIG_ERROR_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `ADC_DONE` reader - Indicates that a ADC conversion is done and the interrupt is enabled"] -pub struct ADC_DONE_R(crate::FieldReader); -impl ADC_DONE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - ADC_DONE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ADC_DONE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `FIFO_UFLOW` reader - Indicates a FIFO underflow occurred and the interrupt is enabled"] -pub struct FIFO_UFLOW_R(crate::FieldReader); -impl FIFO_UFLOW_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - FIFO_UFLOW_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for FIFO_UFLOW_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `FIFO_OFLOW` reader - Indicates a FIFO overflow occurred and the interrupt is enabled"] -pub struct FIFO_OFLOW_R(crate::FieldReader); -impl FIFO_OFLOW_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - FIFO_OFLOW_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for FIFO_OFLOW_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `FIFO_FULL` reader - Indicates the FIFO is full and the interrupt is enabled"] -pub struct FIFO_FULL_R(crate::FieldReader); -impl FIFO_FULL_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - FIFO_FULL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for FIFO_FULL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type R = crate::R; #[doc = "Field `FIFO_EMPTY` reader - Indicates the FIFO is empty and the interrupt is enabled"] -pub struct FIFO_EMPTY_R(crate::FieldReader); -impl FIFO_EMPTY_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - FIFO_EMPTY_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for FIFO_EMPTY_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type FifoEmptyR = crate::BitReader; +#[doc = "Field `FIFO_FULL` reader - Indicates the FIFO is full and the interrupt is enabled"] +pub type FifoFullR = crate::BitReader; +#[doc = "Field `FIFO_OFLOW` reader - Indicates a FIFO overflow occurred and the interrupt is enabled"] +pub type FifoOflowR = crate::BitReader; +#[doc = "Field `FIFO_UFLOW` reader - Indicates a FIFO underflow occurred and the interrupt is enabled"] +pub type FifoUflowR = crate::BitReader; +#[doc = "Field `ADC_DONE` reader - Indicates that a ADC conversion is done and the interrupt is enabled"] +pub type AdcDoneR = crate::BitReader; +#[doc = "Field `TRIG_ERROR` reader - Indicates a manual or external trigger occurred when the ADC was BUSY doing a conversion and the interrupt is enabled"] +pub type TrigErrorR = crate::BitReader; +#[doc = "Field `FIFO_DEPTH_TRIG` reader - Indicates the interrupt for the FIFO entry count meets or exceeds the trigger level"] +pub type FifoDepthTrigR = crate::BitReader; impl R { - #[doc = "Bit 6 - Indicates the interrupt for the FIFO entry count meets or exceeds the trigger level"] + #[doc = "Bit 0 - Indicates the FIFO is empty and the interrupt is enabled"] #[inline(always)] - pub fn fifo_depth_trig(&self) -> FIFO_DEPTH_TRIG_R { - FIFO_DEPTH_TRIG_R::new(((self.bits >> 6) & 0x01) != 0) - } - #[doc = "Bit 5 - Indicates a manual or external trigger occurred when the ADC was BUSY doing a conversion and the interrupt is enabled"] - #[inline(always)] - pub fn trig_error(&self) -> TRIG_ERROR_R { - TRIG_ERROR_R::new(((self.bits >> 5) & 0x01) != 0) - } - #[doc = "Bit 4 - Indicates that a ADC conversion is done and the interrupt is enabled"] - #[inline(always)] - pub fn adc_done(&self) -> ADC_DONE_R { - ADC_DONE_R::new(((self.bits >> 4) & 0x01) != 0) - } - #[doc = "Bit 3 - Indicates a FIFO underflow occurred and the interrupt is enabled"] - #[inline(always)] - pub fn fifo_uflow(&self) -> FIFO_UFLOW_R { - FIFO_UFLOW_R::new(((self.bits >> 3) & 0x01) != 0) - } - #[doc = "Bit 2 - Indicates a FIFO overflow occurred and the interrupt is enabled"] - #[inline(always)] - pub fn fifo_oflow(&self) -> FIFO_OFLOW_R { - FIFO_OFLOW_R::new(((self.bits >> 2) & 0x01) != 0) + pub fn fifo_empty(&self) -> FifoEmptyR { + FifoEmptyR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Indicates the FIFO is full and the interrupt is enabled"] #[inline(always)] - pub fn fifo_full(&self) -> FIFO_FULL_R { - FIFO_FULL_R::new(((self.bits >> 1) & 0x01) != 0) + pub fn fifo_full(&self) -> FifoFullR { + FifoFullR::new(((self.bits >> 1) & 1) != 0) } - #[doc = "Bit 0 - Indicates the FIFO is empty and the interrupt is enabled"] + #[doc = "Bit 2 - Indicates a FIFO overflow occurred and the interrupt is enabled"] #[inline(always)] - pub fn fifo_empty(&self) -> FIFO_EMPTY_R { - FIFO_EMPTY_R::new((self.bits & 0x01) != 0) + pub fn fifo_oflow(&self) -> FifoOflowR { + FifoOflowR::new(((self.bits >> 2) & 1) != 0) + } + #[doc = "Bit 3 - Indicates a FIFO underflow occurred and the interrupt is enabled"] + #[inline(always)] + pub fn fifo_uflow(&self) -> FifoUflowR { + FifoUflowR::new(((self.bits >> 3) & 1) != 0) + } + #[doc = "Bit 4 - Indicates that a ADC conversion is done and the interrupt is enabled"] + #[inline(always)] + pub fn adc_done(&self) -> AdcDoneR { + AdcDoneR::new(((self.bits >> 4) & 1) != 0) + } + #[doc = "Bit 5 - Indicates a manual or external trigger occurred when the ADC was BUSY doing a conversion and the interrupt is enabled"] + #[inline(always)] + pub fn trig_error(&self) -> TrigErrorR { + TrigErrorR::new(((self.bits >> 5) & 1) != 0) + } + #[doc = "Bit 6 - Indicates the interrupt for the FIFO entry count meets or exceeds the trigger level"] + #[inline(always)] + pub fn fifo_depth_trig(&self) -> FifoDepthTrigR { + FifoDepthTrigR::new(((self.bits >> 6) & 1) != 0) } } -#[doc = "Enabled Interrupt Status\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [irq_end](index.html) module"] -pub struct IRQ_END_SPEC; -impl crate::RegisterSpec for IRQ_END_SPEC { +#[doc = "Enabled Interrupt Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_end::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IrqEndSpec; +impl crate::RegisterSpec for IrqEndSpec { type Ux = u32; } -#[doc = "`read()` method returns [irq_end::R](R) reader structure"] -impl crate::Readable for IRQ_END_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`irq_end::R`](R) reader structure"] +impl crate::Readable for IrqEndSpec {} #[doc = "`reset()` method sets IRQ_END to value 0"] -impl crate::Resettable for IRQ_END_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for IrqEndSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/adc/irq_raw.rs b/va416xx/src/adc/irq_raw.rs index 877b658..04ce1a3 100644 --- a/va416xx/src/adc/irq_raw.rs +++ b/va416xx/src/adc/irq_raw.rs @@ -1,173 +1,64 @@ #[doc = "Register `IRQ_RAW` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Field `FIFO_DEPTH_TRIG` reader - Indicates the interrupt for the FIFO entry count meets or exceeds the trigger level"] -pub struct FIFO_DEPTH_TRIG_R(crate::FieldReader); -impl FIFO_DEPTH_TRIG_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - FIFO_DEPTH_TRIG_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for FIFO_DEPTH_TRIG_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TRIG_ERROR` reader - Indicates a manual or external trigger occurred when the ADC was BUSY doing a conversion"] -pub struct TRIG_ERROR_R(crate::FieldReader); -impl TRIG_ERROR_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TRIG_ERROR_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TRIG_ERROR_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `ADC_DONE` reader - Indicates that a ADC conversion is done"] -pub struct ADC_DONE_R(crate::FieldReader); -impl ADC_DONE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - ADC_DONE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ADC_DONE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `FIFO_UFLOW` reader - Indicates data was unavailable when a new trigger for ADC update is received"] -pub struct FIFO_UFLOW_R(crate::FieldReader); -impl FIFO_UFLOW_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - FIFO_UFLOW_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for FIFO_UFLOW_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `FIFO_OFLOW` reader - Indicates a FIFO overflow occurred (FIFO was full when new data was written)"] -pub struct FIFO_OFLOW_R(crate::FieldReader); -impl FIFO_OFLOW_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - FIFO_OFLOW_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for FIFO_OFLOW_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `FIFO_FULL` reader - Indicates the FIFO is full"] -pub struct FIFO_FULL_R(crate::FieldReader); -impl FIFO_FULL_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - FIFO_FULL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for FIFO_FULL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type R = crate::R; #[doc = "Field `FIFO_EMPTY` reader - Indicates the FIFO is empty"] -pub struct FIFO_EMPTY_R(crate::FieldReader); -impl FIFO_EMPTY_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - FIFO_EMPTY_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for FIFO_EMPTY_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type FifoEmptyR = crate::BitReader; +#[doc = "Field `FIFO_FULL` reader - Indicates the FIFO is full"] +pub type FifoFullR = crate::BitReader; +#[doc = "Field `FIFO_OFLOW` reader - Indicates a FIFO overflow occurred (FIFO was full when new data was written)"] +pub type FifoOflowR = crate::BitReader; +#[doc = "Field `FIFO_UFLOW` reader - Indicates data was unavailable when a new trigger for ADC update is received"] +pub type FifoUflowR = crate::BitReader; +#[doc = "Field `ADC_DONE` reader - Indicates that a ADC conversion is done"] +pub type AdcDoneR = crate::BitReader; +#[doc = "Field `TRIG_ERROR` reader - Indicates a manual or external trigger occurred when the ADC was BUSY doing a conversion"] +pub type TrigErrorR = crate::BitReader; +#[doc = "Field `FIFO_DEPTH_TRIG` reader - Indicates the interrupt for the FIFO entry count meets or exceeds the trigger level"] +pub type FifoDepthTrigR = crate::BitReader; impl R { - #[doc = "Bit 6 - Indicates the interrupt for the FIFO entry count meets or exceeds the trigger level"] + #[doc = "Bit 0 - Indicates the FIFO is empty"] #[inline(always)] - pub fn fifo_depth_trig(&self) -> FIFO_DEPTH_TRIG_R { - FIFO_DEPTH_TRIG_R::new(((self.bits >> 6) & 0x01) != 0) - } - #[doc = "Bit 5 - Indicates a manual or external trigger occurred when the ADC was BUSY doing a conversion"] - #[inline(always)] - pub fn trig_error(&self) -> TRIG_ERROR_R { - TRIG_ERROR_R::new(((self.bits >> 5) & 0x01) != 0) - } - #[doc = "Bit 4 - Indicates that a ADC conversion is done"] - #[inline(always)] - pub fn adc_done(&self) -> ADC_DONE_R { - ADC_DONE_R::new(((self.bits >> 4) & 0x01) != 0) - } - #[doc = "Bit 3 - Indicates data was unavailable when a new trigger for ADC update is received"] - #[inline(always)] - pub fn fifo_uflow(&self) -> FIFO_UFLOW_R { - FIFO_UFLOW_R::new(((self.bits >> 3) & 0x01) != 0) - } - #[doc = "Bit 2 - Indicates a FIFO overflow occurred (FIFO was full when new data was written)"] - #[inline(always)] - pub fn fifo_oflow(&self) -> FIFO_OFLOW_R { - FIFO_OFLOW_R::new(((self.bits >> 2) & 0x01) != 0) + pub fn fifo_empty(&self) -> FifoEmptyR { + FifoEmptyR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Indicates the FIFO is full"] #[inline(always)] - pub fn fifo_full(&self) -> FIFO_FULL_R { - FIFO_FULL_R::new(((self.bits >> 1) & 0x01) != 0) + pub fn fifo_full(&self) -> FifoFullR { + FifoFullR::new(((self.bits >> 1) & 1) != 0) } - #[doc = "Bit 0 - Indicates the FIFO is empty"] + #[doc = "Bit 2 - Indicates a FIFO overflow occurred (FIFO was full when new data was written)"] #[inline(always)] - pub fn fifo_empty(&self) -> FIFO_EMPTY_R { - FIFO_EMPTY_R::new((self.bits & 0x01) != 0) + pub fn fifo_oflow(&self) -> FifoOflowR { + FifoOflowR::new(((self.bits >> 2) & 1) != 0) + } + #[doc = "Bit 3 - Indicates data was unavailable when a new trigger for ADC update is received"] + #[inline(always)] + pub fn fifo_uflow(&self) -> FifoUflowR { + FifoUflowR::new(((self.bits >> 3) & 1) != 0) + } + #[doc = "Bit 4 - Indicates that a ADC conversion is done"] + #[inline(always)] + pub fn adc_done(&self) -> AdcDoneR { + AdcDoneR::new(((self.bits >> 4) & 1) != 0) + } + #[doc = "Bit 5 - Indicates a manual or external trigger occurred when the ADC was BUSY doing a conversion"] + #[inline(always)] + pub fn trig_error(&self) -> TrigErrorR { + TrigErrorR::new(((self.bits >> 5) & 1) != 0) + } + #[doc = "Bit 6 - Indicates the interrupt for the FIFO entry count meets or exceeds the trigger level"] + #[inline(always)] + pub fn fifo_depth_trig(&self) -> FifoDepthTrigR { + FifoDepthTrigR::new(((self.bits >> 6) & 1) != 0) } } -#[doc = "Raw Interrupt Status\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [irq_raw](index.html) module"] -pub struct IRQ_RAW_SPEC; -impl crate::RegisterSpec for IRQ_RAW_SPEC { +#[doc = "Raw Interrupt Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_raw::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IrqRawSpec; +impl crate::RegisterSpec for IrqRawSpec { type Ux = u32; } -#[doc = "`read()` method returns [irq_raw::R](R) reader structure"] -impl crate::Readable for IRQ_RAW_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`irq_raw::R`](R) reader structure"] +impl crate::Readable for IrqRawSpec {} #[doc = "`reset()` method sets IRQ_RAW to value 0x01"] -impl crate::Resettable for IRQ_RAW_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0x01 - } +impl crate::Resettable for IrqRawSpec { + const RESET_VALUE: u32 = 0x01; } diff --git a/va416xx/src/adc/perid.rs b/va416xx/src/adc/perid.rs index a7f3c64..d1a0f97 100644 --- a/va416xx/src/adc/perid.rs +++ b/va416xx/src/adc/perid.rs @@ -1,31 +1,18 @@ #[doc = "Register `PERID` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 +pub type R = crate::R; +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) } } -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Peripheral ID Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [perid](index.html) module"] -pub struct PERID_SPEC; -impl crate::RegisterSpec for PERID_SPEC { +#[doc = "Peripheral ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`perid::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PeridSpec; +impl crate::RegisterSpec for PeridSpec { type Ux = u32; } -#[doc = "`read()` method returns [perid::R](R) reader structure"] -impl crate::Readable for PERID_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`perid::R`](R) reader structure"] +impl crate::Readable for PeridSpec {} #[doc = "`reset()` method sets PERID to value 0x0019_07e9"] -impl crate::Resettable for PERID_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0x0019_07e9 - } +impl crate::Resettable for PeridSpec { + const RESET_VALUE: u32 = 0x0019_07e9; } diff --git a/va416xx/src/adc/rxfifoirqtrg.rs b/va416xx/src/adc/rxfifoirqtrg.rs index f428ea9..aa189b8 100644 --- a/va416xx/src/adc/rxfifoirqtrg.rs +++ b/va416xx/src/adc/rxfifoirqtrg.rs @@ -1,103 +1,40 @@ #[doc = "Register `RXFIFOIRQTRG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RXFIFOIRQTRG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `LEVEL` reader - Sets the FIFO_ENTRY_CNT value that asserts the FIFO_DEPTH_TRIG interrupt"] -pub struct LEVEL_R(crate::FieldReader); -impl LEVEL_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - LEVEL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for LEVEL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type LevelR = crate::FieldReader; #[doc = "Field `LEVEL` writer - Sets the FIFO_ENTRY_CNT value that asserts the FIFO_DEPTH_TRIG interrupt"] -pub struct LEVEL_W<'a> { - w: &'a mut W, -} -impl<'a> LEVEL_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0x1f) | (value as u32 & 0x1f); - self.w - } -} +pub type LevelW<'a, REG> = crate::FieldWriter<'a, REG, 5>; impl R { #[doc = "Bits 0:4 - Sets the FIFO_ENTRY_CNT value that asserts the FIFO_DEPTH_TRIG interrupt"] #[inline(always)] - pub fn level(&self) -> LEVEL_R { - LEVEL_R::new((self.bits & 0x1f) as u8) + pub fn level(&self) -> LevelR { + LevelR::new((self.bits & 0x1f) as u8) } } impl W { #[doc = "Bits 0:4 - Sets the FIFO_ENTRY_CNT value that asserts the FIFO_DEPTH_TRIG interrupt"] #[inline(always)] - pub fn level(&mut self) -> LEVEL_W { - LEVEL_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn level(&mut self) -> LevelW { + LevelW::new(self, 0) } } -#[doc = "Receive FIFO Interrupt Trigger Value\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxfifoirqtrg](index.html) module"] -pub struct RXFIFOIRQTRG_SPEC; -impl crate::RegisterSpec for RXFIFOIRQTRG_SPEC { +#[doc = "Receive FIFO Interrupt Trigger Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxfifoirqtrg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rxfifoirqtrg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RxfifoirqtrgSpec; +impl crate::RegisterSpec for RxfifoirqtrgSpec { type Ux = u32; } -#[doc = "`read()` method returns [rxfifoirqtrg::R](R) reader structure"] -impl crate::Readable for RXFIFOIRQTRG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [rxfifoirqtrg::W](W) writer structure"] -impl crate::Writable for RXFIFOIRQTRG_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`rxfifoirqtrg::R`](R) reader structure"] +impl crate::Readable for RxfifoirqtrgSpec {} +#[doc = "`write(|w| ..)` method takes [`rxfifoirqtrg::W`](W) writer structure"] +impl crate::Writable for RxfifoirqtrgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RXFIFOIRQTRG to value 0x10"] -impl crate::Resettable for RXFIFOIRQTRG_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0x10 - } +impl crate::Resettable for RxfifoirqtrgSpec { + const RESET_VALUE: u32 = 0x10; } diff --git a/va416xx/src/adc/status.rs b/va416xx/src/adc/status.rs index 7347c13..bda6875 100644 --- a/va416xx/src/adc/status.rs +++ b/va416xx/src/adc/status.rs @@ -1,73 +1,29 @@ #[doc = "Register `STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Field `ADC_BUSY` reader - Indicates an ADC data acquisition is in process"] -pub struct ADC_BUSY_R(crate::FieldReader); -impl ADC_BUSY_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - ADC_BUSY_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ADC_BUSY_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type R = crate::R; #[doc = "Field `FIFO_ENTRY_CNT` reader - Indicates the number of entries in the FIFO"] -pub struct FIFO_ENTRY_CNT_R(crate::FieldReader); -impl FIFO_ENTRY_CNT_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - FIFO_ENTRY_CNT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for FIFO_ENTRY_CNT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type FifoEntryCntR = crate::FieldReader; +#[doc = "Field `ADC_BUSY` reader - Indicates an ADC data acquisition is in process"] +pub type AdcBusyR = crate::BitReader; impl R { - #[doc = "Bit 7 - Indicates an ADC data acquisition is in process"] - #[inline(always)] - pub fn adc_busy(&self) -> ADC_BUSY_R { - ADC_BUSY_R::new(((self.bits >> 7) & 0x01) != 0) - } #[doc = "Bits 0:5 - Indicates the number of entries in the FIFO"] #[inline(always)] - pub fn fifo_entry_cnt(&self) -> FIFO_ENTRY_CNT_R { - FIFO_ENTRY_CNT_R::new((self.bits & 0x3f) as u8) + pub fn fifo_entry_cnt(&self) -> FifoEntryCntR { + FifoEntryCntR::new((self.bits & 0x3f) as u8) + } + #[doc = "Bit 7 - Indicates an ADC data acquisition is in process"] + #[inline(always)] + pub fn adc_busy(&self) -> AdcBusyR { + AdcBusyR::new(((self.bits >> 7) & 1) != 0) } } -#[doc = "Status\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +#[doc = "Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [status::R](R) reader structure"] -impl crate::Readable for STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`status::R`](R) reader structure"] +impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0"] -impl crate::Resettable for STATUS_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for StatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0.rs b/va416xx/src/can0.rs index 62ec834..894adbb 100644 --- a/va416xx/src/can0.rs +++ b/va416xx/src/can0.rs @@ -1,856 +1,1710 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - #[doc = "0x00 - Buffer Status / Control Register"] - pub cnstat_cmb0: crate::Reg, - #[doc = "0x04 - CAN Frame Timestamp"] - pub tstp_cmb0: crate::Reg, - #[doc = "0x08 - CAN Frame Data Word 3"] - pub data3_cmb0: crate::Reg, - #[doc = "0x0c - CAN Frame Data Word 2"] - pub data2_cmb0: crate::Reg, - #[doc = "0x10 - CAN Frame Data Word 1"] - pub data1_cmb0: crate::Reg, - #[doc = "0x14 - CAN Frame Data Word 0"] - pub data0_cmb0: crate::Reg, - #[doc = "0x18 - CAN Frame Identifier Word 0"] - pub id0_cmb0: crate::Reg, - #[doc = "0x1c - CAN Frame Identifier Word 1"] - pub id1_cmb0: crate::Reg, - #[doc = "0x20 - Buffer Status / Control Register"] - pub cnstat_cmb1: crate::Reg, - #[doc = "0x24 - CAN Frame Timestamp"] - pub tstp_cmb1: crate::Reg, - #[doc = "0x28 - CAN Frame Data Word 3"] - pub data3_cmb1: crate::Reg, - #[doc = "0x2c - CAN Frame Data Word 2"] - pub data2_cmb1: crate::Reg, - #[doc = "0x30 - CAN Frame Data Word 2"] - pub data1_cmb1: crate::Reg, - #[doc = "0x34 - CAN Frame Data Word 0"] - pub data0_cmb1: crate::Reg, - #[doc = "0x38 - CAN Frame Identifier Word 0"] - pub id0_cmb1: crate::Reg, - #[doc = "0x3c - CAN Frame Identifier Word 1"] - pub id1_cmb1: crate::Reg, - #[doc = "0x40 - Buffer Status / Control Register"] - pub cnstat_cmb2: crate::Reg, - #[doc = "0x44 - CAN Frame Timestamp"] - pub tstp_cmb2: crate::Reg, - #[doc = "0x48 - CAN Frame Data Word 3"] - pub data3_cmb2: crate::Reg, - #[doc = "0x4c - CAN Frame Data Word 2"] - pub data2_cmb2: crate::Reg, - #[doc = "0x50 - CAN Frame Data Word 2"] - pub data1_cmb2: crate::Reg, - #[doc = "0x54 - CAN Frame Data Word 0"] - pub data0_cmb2: crate::Reg, - #[doc = "0x58 - CAN Frame Identifier Word 0"] - pub id0_cmb2: crate::Reg, - #[doc = "0x5c - CAN Frame Identifier Word 1"] - pub id1_cmb2: crate::Reg, - #[doc = "0x60 - Buffer Status / Control Register"] - pub cnstat_cmb3: crate::Reg, - #[doc = "0x64 - CAN Frame Timestamp"] - pub tstp_cmb3: crate::Reg, - #[doc = "0x68 - CAN Frame Data Word 3"] - pub data3_cmb3: crate::Reg, - #[doc = "0x6c - CAN Frame Data Word 2"] - pub data2_cmb3: crate::Reg, - #[doc = "0x70 - CAN Frame Data Word 2"] - pub data1_cmb3: crate::Reg, - #[doc = "0x74 - CAN Frame Data Word 0"] - pub data0_cmb3: crate::Reg, - #[doc = "0x78 - CAN Frame Identifier Word 0"] - pub id0_cmb3: crate::Reg, - #[doc = "0x7c - CAN Frame Identifier Word 1"] - pub id1_cmb3: crate::Reg, - #[doc = "0x80 - Buffer Status / Control Register"] - pub cnstat_cmb4: crate::Reg, - #[doc = "0x84 - CAN Frame Timestamp"] - pub tstp_cmb4: crate::Reg, - #[doc = "0x88 - CAN Frame Data Word 3"] - pub data3_cmb4: crate::Reg, - #[doc = "0x8c - CAN Frame Data Word 2"] - pub data2_cmb4: crate::Reg, - #[doc = "0x90 - CAN Frame Data Word 2"] - pub data1_cmb4: crate::Reg, - #[doc = "0x94 - CAN Frame Data Word 0"] - pub data0_cmb4: crate::Reg, - #[doc = "0x98 - CAN Frame Identifier Word 0"] - pub id0_cmb4: crate::Reg, - #[doc = "0x9c - CAN Frame Identifier Word 1"] - pub id1_cmb4: crate::Reg, - #[doc = "0xa0 - Buffer Status / Control Register"] - pub cnstat_cmb5: crate::Reg, - #[doc = "0xa4 - CAN Frame Timestamp"] - pub tstp_cmb5: crate::Reg, - #[doc = "0xa8 - CAN Frame Data Word 3"] - pub data3_cmb5: crate::Reg, - #[doc = "0xac - CAN Frame Data Word 2"] - pub data2_cmb5: crate::Reg, - #[doc = "0xb0 - CAN Frame Data Word 2"] - pub data1_cmb5: crate::Reg, - #[doc = "0xb4 - CAN Frame Data Word 0"] - pub data0_cmb5: crate::Reg, - #[doc = "0xb8 - CAN Frame Identifier Word 0"] - pub id0_cmb5: crate::Reg, - #[doc = "0xbc - CAN Frame Identifier Word 1"] - pub id1_cmb5: crate::Reg, - #[doc = "0xc0 - Buffer Status / Control Register"] - pub cnstat_cmb6: crate::Reg, - #[doc = "0xc4 - CAN Frame Timestamp"] - pub tstp_cmb6: crate::Reg, - #[doc = "0xc8 - CAN Frame Data Word 3"] - pub data3_cmb6: crate::Reg, - #[doc = "0xcc - CAN Frame Data Word 2"] - pub data2_cmb6: crate::Reg, - #[doc = "0xd0 - CAN Frame Data Word 2"] - pub data1_cmb6: crate::Reg, - #[doc = "0xd4 - CAN Frame Data Word 0"] - pub data0_cmb6: crate::Reg, - #[doc = "0xd8 - CAN Frame Identifier Word 0"] - pub id0_cmb6: crate::Reg, - #[doc = "0xdc - CAN Frame Identifier Word 1"] - pub id1_cmb6: crate::Reg, - #[doc = "0xe0 - Buffer Status / Control Register"] - pub cnstat_cmb7: crate::Reg, - #[doc = "0xe4 - CAN Frame Timestamp"] - pub tstp_cmb7: crate::Reg, - #[doc = "0xe8 - CAN Frame Data Word 3"] - pub data3_cmb7: crate::Reg, - #[doc = "0xec - CAN Frame Data Word 2"] - pub data2_cmb7: crate::Reg, - #[doc = "0xf0 - CAN Frame Data Word 2"] - pub data1_cmb7: crate::Reg, - #[doc = "0xf4 - CAN Frame Data Word 0"] - pub data0_cmb7: crate::Reg, - #[doc = "0xf8 - CAN Frame Identifier Word 0"] - pub id0_cmb7: crate::Reg, - #[doc = "0xfc - CAN Frame Identifier Word 1"] - pub id1_cmb7: crate::Reg, - #[doc = "0x100 - Buffer Status / Control Register"] - pub cnstat_cmb8: crate::Reg, - #[doc = "0x104 - CAN Frame Timestamp"] - pub tstp_cmb8: crate::Reg, - #[doc = "0x108 - CAN Frame Data Word 3"] - pub data3_cmb8: crate::Reg, - #[doc = "0x10c - CAN Frame Data Word 2"] - pub data2_cmb8: crate::Reg, - #[doc = "0x110 - CAN Frame Data Word 2"] - pub data1_cmb8: crate::Reg, - #[doc = "0x114 - CAN Frame Data Word 0"] - pub data0_cmb8: crate::Reg, - #[doc = "0x118 - CAN Frame Identifier Word 0"] - pub id0_cmb8: crate::Reg, - #[doc = "0x11c - CAN Frame Identifier Word 1"] - pub id1_cmb8: crate::Reg, - #[doc = "0x120 - Buffer Status / Control Register"] - pub cnstat_cmb9: crate::Reg, - #[doc = "0x124 - CAN Frame Timestamp"] - pub tstp_cmb9: crate::Reg, - #[doc = "0x128 - CAN Frame Data Word 3"] - pub data3_cmb9: crate::Reg, - #[doc = "0x12c - CAN Frame Data Word 2"] - pub data2_cmb9: crate::Reg, - #[doc = "0x130 - CAN Frame Data Word 2"] - pub data1_cmb9: crate::Reg, - #[doc = "0x134 - CAN Frame Data Word 0"] - pub data0_cmb9: crate::Reg, - #[doc = "0x138 - CAN Frame Identifier Word 0"] - pub id0_cmb9: crate::Reg, - #[doc = "0x13c - CAN Frame Identifier Word 1"] - pub id1_cmb9: crate::Reg, - #[doc = "0x140 - Buffer Status / Control Register"] - pub cnstat_cmb10: crate::Reg, - #[doc = "0x144 - CAN Frame Timestamp"] - pub tstp_cmb10: crate::Reg, - #[doc = "0x148 - CAN Frame Data Word 3"] - pub data3_cmb10: crate::Reg, - #[doc = "0x14c - CAN Frame Data Word 2"] - pub data2_cmb10: crate::Reg, - #[doc = "0x150 - CAN Frame Data Word 2"] - pub data1_cmb10: crate::Reg, - #[doc = "0x154 - CAN Frame Data Word 0"] - pub data0_cmb10: crate::Reg, - #[doc = "0x158 - CAN Frame Identifier Word 0"] - pub id0_cmb10: crate::Reg, - #[doc = "0x15c - CAN Frame Identifier Word 1"] - pub id1_cmb10: crate::Reg, - #[doc = "0x160 - Buffer Status / Control Register"] - pub cnstat_cmb11: crate::Reg, - #[doc = "0x164 - CAN Frame Timestamp"] - pub tstp_cmb11: crate::Reg, - #[doc = "0x168 - CAN Frame Data Word 3"] - pub data3_cmb11: crate::Reg, - #[doc = "0x16c - CAN Frame Data Word 2"] - pub data2_cmb11: crate::Reg, - #[doc = "0x170 - CAN Frame Data Word 2"] - pub data1_cmb11: crate::Reg, - #[doc = "0x174 - CAN Frame Data Word 0"] - pub data0_cmb11: crate::Reg, - #[doc = "0x178 - CAN Frame Identifier Word 0"] - pub id0_cmb11: crate::Reg, - #[doc = "0x17c - CAN Frame Identifier Word 1"] - pub id1_cmb11: crate::Reg, - #[doc = "0x180 - Buffer Status / Control Register"] - pub cnstat_cmb12: crate::Reg, - #[doc = "0x184 - CAN Frame Timestamp"] - pub tstp_cmb12: crate::Reg, - #[doc = "0x188 - CAN Frame Data Word 3"] - pub data3_cmb12: crate::Reg, - #[doc = "0x18c - CAN Frame Data Word 2"] - pub data2_cmb12: crate::Reg, - #[doc = "0x190 - CAN Frame Data Word 2"] - pub data1_cmb12: crate::Reg, - #[doc = "0x194 - CAN Frame Data Word 0"] - pub data0_cmb12: crate::Reg, - #[doc = "0x198 - CAN Frame Identifier Word 0"] - pub id0_cmb12: crate::Reg, - #[doc = "0x19c - CAN Frame Identifier Word 1"] - pub id1_cmb12: crate::Reg, - #[doc = "0x1a0 - Buffer Status / Control Register"] - pub cnstat_cmb13: crate::Reg, - #[doc = "0x1a4 - CAN Frame Timestamp"] - pub tstp_cmb13: crate::Reg, - #[doc = "0x1a8 - CAN Frame Data Word 3"] - pub data3_cmb13: crate::Reg, - #[doc = "0x1ac - CAN Frame Data Word 2"] - pub data2_cmb13: crate::Reg, - #[doc = "0x1b0 - CAN Frame Data Word 2"] - pub data1_cmb13: crate::Reg, - #[doc = "0x1b4 - CAN Frame Data Word 0"] - pub data0_cmb13: crate::Reg, - #[doc = "0x1b8 - CAN Frame Identifier Word 0"] - pub id0_cmb13: crate::Reg, - #[doc = "0x1bc - CAN Frame Identifier Word 1"] - pub id1_cmb13: crate::Reg, - #[doc = "0x1c0 - Buffer Status / Control Register"] - pub cnstat_cmb14: crate::Reg, - #[doc = "0x1c4 - CAN Frame Timestamp"] - pub tstp_cmb14: crate::Reg, - #[doc = "0x1c8 - CAN Frame Data Word 3"] - pub data3_cmb14: crate::Reg, - #[doc = "0x1cc - CAN Frame Data Word 2"] - pub data2_cmb14: crate::Reg, - #[doc = "0x1d0 - CAN Frame Data Word 2"] - pub data1_cmb14: crate::Reg, - #[doc = "0x1d4 - CAN Frame Data Word 0"] - pub data0_cmb14: crate::Reg, - #[doc = "0x1d8 - CAN Frame Identifier Word 0"] - pub id0_cmb14: crate::Reg, - #[doc = "0x1dc - CAN Frame Identifier Word 1"] - pub id1_cmb14: crate::Reg, - #[doc = "0x1e0 - Buffer Status / Control Register"] - pub cnstat_hcmb: crate::Reg, - #[doc = "0x1e4 - CAN Frame Timestamp"] - pub tstp_hcmb: crate::Reg, - #[doc = "0x1e8 - CAN Frame Data Word 3"] - pub data3_hcmb: crate::Reg, - #[doc = "0x1ec - CAN Frame Data Word 2"] - pub data2_hcmb: crate::Reg, - #[doc = "0x1f0 - CAN Frame Data Word 2"] - pub data1_hcmb: crate::Reg, - #[doc = "0x1f4 - CAN Frame Data Word 0"] - pub data0_hcmb: crate::Reg, - #[doc = "0x1f8 - CAN Frame Identifier Word 0"] - pub id0_hcmb: crate::Reg, - #[doc = "0x1fc - CAN Frame Identifier Word 1"] - pub id1_hcmb: crate::Reg, - #[doc = "0x200 - CAN Global Configuration Register"] - pub cgcr: crate::Reg, - #[doc = "0x204 - CAN Timing Register"] - pub ctim: crate::Reg, - #[doc = "0x208 - CAN Global Mask Extension"] - pub gmskx: crate::Reg, - #[doc = "0x20c - CAN Global Mask Base"] - pub gmskb: crate::Reg, - #[doc = "0x210 - CAN Basic Mask Extension"] - pub bmskx: crate::Reg, - #[doc = "0x214 - CAN Basic Mask Base"] - pub bmskb: crate::Reg, - #[doc = "0x218 - CAN Interrupt Enable Register"] - pub cien: crate::Reg, - #[doc = "0x21c - CAN Interrupt Pending Register"] - pub cipnd: crate::Reg, - #[doc = "0x220 - CAN Interrupt Clear Register"] - pub ciclr: crate::Reg, - #[doc = "0x224 - CAN Interrupt Code Enable Register"] - pub cicen: crate::Reg, - #[doc = "0x228 - CAN Status Pending Register"] - pub cstpnd: crate::Reg, - #[doc = "0x22c - CAN Error Counter Register"] - pub canec: crate::Reg, - #[doc = "0x230 - CAN Error Diagnostic Register"] - pub cediag: crate::Reg, - #[doc = "0x234 - CAN Timer Register"] - pub ctmr: crate::Reg, + cnstat_cmb0: CnstatCmb0, + tstp_cmb0: TstpCmb0, + data3_cmb0: Data3Cmb0, + data2_cmb0: Data2Cmb0, + data1_cmb0: Data1Cmb0, + data0_cmb0: Data0Cmb0, + id0_cmb0: Id0Cmb0, + id1_cmb0: Id1Cmb0, + cnstat_cmb1: CnstatCmb1, + tstp_cmb1: TstpCmb1, + data3_cmb1: Data3Cmb1, + data2_cmb1: Data2Cmb1, + data1_cmb1: Data1Cmb1, + data0_cmb1: Data0Cmb1, + id0_cmb1: Id0Cmb1, + id1_cmb1: Id1Cmb1, + cnstat_cmb2: CnstatCmb2, + tstp_cmb2: TstpCmb2, + data3_cmb2: Data3Cmb2, + data2_cmb2: Data2Cmb2, + data1_cmb2: Data1Cmb2, + data0_cmb2: Data0Cmb2, + id0_cmb2: Id0Cmb2, + id1_cmb2: Id1Cmb2, + cnstat_cmb3: CnstatCmb3, + tstp_cmb3: TstpCmb3, + data3_cmb3: Data3Cmb3, + data2_cmb3: Data2Cmb3, + data1_cmb3: Data1Cmb3, + data0_cmb3: Data0Cmb3, + id0_cmb3: Id0Cmb3, + id1_cmb3: Id1Cmb3, + cnstat_cmb4: CnstatCmb4, + tstp_cmb4: TstpCmb4, + data3_cmb4: Data3Cmb4, + data2_cmb4: Data2Cmb4, + data1_cmb4: Data1Cmb4, + data0_cmb4: Data0Cmb4, + id0_cmb4: Id0Cmb4, + id1_cmb4: Id1Cmb4, + cnstat_cmb5: CnstatCmb5, + tstp_cmb5: TstpCmb5, + data3_cmb5: Data3Cmb5, + data2_cmb5: Data2Cmb5, + data1_cmb5: Data1Cmb5, + data0_cmb5: Data0Cmb5, + id0_cmb5: Id0Cmb5, + id1_cmb5: Id1Cmb5, + cnstat_cmb6: CnstatCmb6, + tstp_cmb6: TstpCmb6, + data3_cmb6: Data3Cmb6, + data2_cmb6: Data2Cmb6, + data1_cmb6: Data1Cmb6, + data0_cmb6: Data0Cmb6, + id0_cmb6: Id0Cmb6, + id1_cmb6: Id1Cmb6, + cnstat_cmb7: CnstatCmb7, + tstp_cmb7: TstpCmb7, + data3_cmb7: Data3Cmb7, + data2_cmb7: Data2Cmb7, + data1_cmb7: Data1Cmb7, + data0_cmb7: Data0Cmb7, + id0_cmb7: Id0Cmb7, + id1_cmb7: Id1Cmb7, + cnstat_cmb8: CnstatCmb8, + tstp_cmb8: TstpCmb8, + data3_cmb8: Data3Cmb8, + data2_cmb8: Data2Cmb8, + data1_cmb8: Data1Cmb8, + data0_cmb8: Data0Cmb8, + id0_cmb8: Id0Cmb8, + id1_cmb8: Id1Cmb8, + cnstat_cmb9: CnstatCmb9, + tstp_cmb9: TstpCmb9, + data3_cmb9: Data3Cmb9, + data2_cmb9: Data2Cmb9, + data1_cmb9: Data1Cmb9, + data0_cmb9: Data0Cmb9, + id0_cmb9: Id0Cmb9, + id1_cmb9: Id1Cmb9, + cnstat_cmb10: CnstatCmb10, + tstp_cmb10: TstpCmb10, + data3_cmb10: Data3Cmb10, + data2_cmb10: Data2Cmb10, + data1_cmb10: Data1Cmb10, + data0_cmb10: Data0Cmb10, + id0_cmb10: Id0Cmb10, + id1_cmb10: Id1Cmb10, + cnstat_cmb11: CnstatCmb11, + tstp_cmb11: TstpCmb11, + data3_cmb11: Data3Cmb11, + data2_cmb11: Data2Cmb11, + data1_cmb11: Data1Cmb11, + data0_cmb11: Data0Cmb11, + id0_cmb11: Id0Cmb11, + id1_cmb11: Id1Cmb11, + cnstat_cmb12: CnstatCmb12, + tstp_cmb12: TstpCmb12, + data3_cmb12: Data3Cmb12, + data2_cmb12: Data2Cmb12, + data1_cmb12: Data1Cmb12, + data0_cmb12: Data0Cmb12, + id0_cmb12: Id0Cmb12, + id1_cmb12: Id1Cmb12, + cnstat_cmb13: CnstatCmb13, + tstp_cmb13: TstpCmb13, + data3_cmb13: Data3Cmb13, + data2_cmb13: Data2Cmb13, + data1_cmb13: Data1Cmb13, + data0_cmb13: Data0Cmb13, + id0_cmb13: Id0Cmb13, + id1_cmb13: Id1Cmb13, + cnstat_cmb14: CnstatCmb14, + tstp_cmb14: TstpCmb14, + data3_cmb14: Data3Cmb14, + data2_cmb14: Data2Cmb14, + data1_cmb14: Data1Cmb14, + data0_cmb14: Data0Cmb14, + id0_cmb14: Id0Cmb14, + id1_cmb14: Id1Cmb14, + cnstat_hcmb: CnstatHcmb, + tstp_hcmb: TstpHcmb, + data3_hcmb: Data3Hcmb, + data2_hcmb: Data2Hcmb, + data1_hcmb: Data1Hcmb, + data0_hcmb: Data0Hcmb, + id0_hcmb: Id0Hcmb, + id1_hcmb: Id1Hcmb, + cgcr: Cgcr, + ctim: Ctim, + gmskx: Gmskx, + gmskb: Gmskb, + bmskx: Bmskx, + bmskb: Bmskb, + cien: Cien, + cipnd: Cipnd, + ciclr: Ciclr, + cicen: Cicen, + cstpnd: Cstpnd, + canec: Canec, + cediag: Cediag, + ctmr: Ctmr, } -#[doc = "CNSTAT_CMB0 register accessor: an alias for `Reg`"] -pub type CNSTAT_CMB0 = crate::Reg; +impl RegisterBlock { + #[doc = "0x00 - Buffer Status / Control Register"] + #[inline(always)] + pub const fn cnstat_cmb0(&self) -> &CnstatCmb0 { + &self.cnstat_cmb0 + } + #[doc = "0x04 - CAN Frame Timestamp"] + #[inline(always)] + pub const fn tstp_cmb0(&self) -> &TstpCmb0 { + &self.tstp_cmb0 + } + #[doc = "0x08 - CAN Frame Data Word 3"] + #[inline(always)] + pub const fn data3_cmb0(&self) -> &Data3Cmb0 { + &self.data3_cmb0 + } + #[doc = "0x0c - CAN Frame Data Word 2"] + #[inline(always)] + pub const fn data2_cmb0(&self) -> &Data2Cmb0 { + &self.data2_cmb0 + } + #[doc = "0x10 - CAN Frame Data Word 1"] + #[inline(always)] + pub const fn data1_cmb0(&self) -> &Data1Cmb0 { + &self.data1_cmb0 + } + #[doc = "0x14 - CAN Frame Data Word 0"] + #[inline(always)] + pub const fn data0_cmb0(&self) -> &Data0Cmb0 { + &self.data0_cmb0 + } + #[doc = "0x18 - CAN Frame Identifier Word 0"] + #[inline(always)] + pub const fn id0_cmb0(&self) -> &Id0Cmb0 { + &self.id0_cmb0 + } + #[doc = "0x1c - CAN Frame Identifier Word 1"] + #[inline(always)] + pub const fn id1_cmb0(&self) -> &Id1Cmb0 { + &self.id1_cmb0 + } + #[doc = "0x20 - Buffer Status / Control Register"] + #[inline(always)] + pub const fn cnstat_cmb1(&self) -> &CnstatCmb1 { + &self.cnstat_cmb1 + } + #[doc = "0x24 - CAN Frame Timestamp"] + #[inline(always)] + pub const fn tstp_cmb1(&self) -> &TstpCmb1 { + &self.tstp_cmb1 + } + #[doc = "0x28 - CAN Frame Data Word 3"] + #[inline(always)] + pub const fn data3_cmb1(&self) -> &Data3Cmb1 { + &self.data3_cmb1 + } + #[doc = "0x2c - CAN Frame Data Word 2"] + #[inline(always)] + pub const fn data2_cmb1(&self) -> &Data2Cmb1 { + &self.data2_cmb1 + } + #[doc = "0x30 - CAN Frame Data Word 2"] + #[inline(always)] + pub const fn data1_cmb1(&self) -> &Data1Cmb1 { + &self.data1_cmb1 + } + #[doc = "0x34 - CAN Frame Data Word 0"] + #[inline(always)] + pub const fn data0_cmb1(&self) -> &Data0Cmb1 { + &self.data0_cmb1 + } + #[doc = "0x38 - CAN Frame Identifier Word 0"] + #[inline(always)] + pub const fn id0_cmb1(&self) -> &Id0Cmb1 { + &self.id0_cmb1 + } + #[doc = "0x3c - CAN Frame Identifier Word 1"] + #[inline(always)] + pub const fn id1_cmb1(&self) -> &Id1Cmb1 { + &self.id1_cmb1 + } + #[doc = "0x40 - Buffer Status / Control Register"] + #[inline(always)] + pub const fn cnstat_cmb2(&self) -> &CnstatCmb2 { + &self.cnstat_cmb2 + } + #[doc = "0x44 - CAN Frame Timestamp"] + #[inline(always)] + pub const fn tstp_cmb2(&self) -> &TstpCmb2 { + &self.tstp_cmb2 + } + #[doc = "0x48 - CAN Frame Data Word 3"] + #[inline(always)] + pub const fn data3_cmb2(&self) -> &Data3Cmb2 { + &self.data3_cmb2 + } + #[doc = "0x4c - CAN Frame Data Word 2"] + #[inline(always)] + pub const fn data2_cmb2(&self) -> &Data2Cmb2 { + &self.data2_cmb2 + } + #[doc = "0x50 - CAN Frame Data Word 2"] + #[inline(always)] + pub const fn data1_cmb2(&self) -> &Data1Cmb2 { + &self.data1_cmb2 + } + #[doc = "0x54 - CAN Frame Data Word 0"] + #[inline(always)] + pub const fn data0_cmb2(&self) -> &Data0Cmb2 { + &self.data0_cmb2 + } + #[doc = "0x58 - CAN Frame Identifier Word 0"] + #[inline(always)] + pub const fn id0_cmb2(&self) -> &Id0Cmb2 { + &self.id0_cmb2 + } + #[doc = "0x5c - CAN Frame Identifier Word 1"] + #[inline(always)] + pub const fn id1_cmb2(&self) -> &Id1Cmb2 { + &self.id1_cmb2 + } + #[doc = "0x60 - Buffer Status / Control Register"] + #[inline(always)] + pub const fn cnstat_cmb3(&self) -> &CnstatCmb3 { + &self.cnstat_cmb3 + } + #[doc = "0x64 - CAN Frame Timestamp"] + #[inline(always)] + pub const fn tstp_cmb3(&self) -> &TstpCmb3 { + &self.tstp_cmb3 + } + #[doc = "0x68 - CAN Frame Data Word 3"] + #[inline(always)] + pub const fn data3_cmb3(&self) -> &Data3Cmb3 { + &self.data3_cmb3 + } + #[doc = "0x6c - CAN Frame Data Word 2"] + #[inline(always)] + pub const fn data2_cmb3(&self) -> &Data2Cmb3 { + &self.data2_cmb3 + } + #[doc = "0x70 - CAN Frame Data Word 2"] + #[inline(always)] + pub const fn data1_cmb3(&self) -> &Data1Cmb3 { + &self.data1_cmb3 + } + #[doc = "0x74 - CAN Frame Data Word 0"] + #[inline(always)] + pub const fn data0_cmb3(&self) -> &Data0Cmb3 { + &self.data0_cmb3 + } + #[doc = "0x78 - CAN Frame Identifier Word 0"] + #[inline(always)] + pub const fn id0_cmb3(&self) -> &Id0Cmb3 { + &self.id0_cmb3 + } + #[doc = "0x7c - CAN Frame Identifier Word 1"] + #[inline(always)] + pub const fn id1_cmb3(&self) -> &Id1Cmb3 { + &self.id1_cmb3 + } + #[doc = "0x80 - Buffer Status / Control Register"] + #[inline(always)] + pub const fn cnstat_cmb4(&self) -> &CnstatCmb4 { + &self.cnstat_cmb4 + } + #[doc = "0x84 - CAN Frame Timestamp"] + #[inline(always)] + pub const fn tstp_cmb4(&self) -> &TstpCmb4 { + &self.tstp_cmb4 + } + #[doc = "0x88 - CAN Frame Data Word 3"] + #[inline(always)] + pub const fn data3_cmb4(&self) -> &Data3Cmb4 { + &self.data3_cmb4 + } + #[doc = "0x8c - CAN Frame Data Word 2"] + #[inline(always)] + pub const fn data2_cmb4(&self) -> &Data2Cmb4 { + &self.data2_cmb4 + } + #[doc = "0x90 - CAN Frame Data Word 2"] + #[inline(always)] + pub const fn data1_cmb4(&self) -> &Data1Cmb4 { + &self.data1_cmb4 + } + #[doc = "0x94 - CAN Frame Data Word 0"] + #[inline(always)] + pub const fn data0_cmb4(&self) -> &Data0Cmb4 { + &self.data0_cmb4 + } + #[doc = "0x98 - CAN Frame Identifier Word 0"] + #[inline(always)] + pub const fn id0_cmb4(&self) -> &Id0Cmb4 { + &self.id0_cmb4 + } + #[doc = "0x9c - CAN Frame Identifier Word 1"] + #[inline(always)] + pub const fn id1_cmb4(&self) -> &Id1Cmb4 { + &self.id1_cmb4 + } + #[doc = "0xa0 - Buffer Status / Control Register"] + #[inline(always)] + pub const fn cnstat_cmb5(&self) -> &CnstatCmb5 { + &self.cnstat_cmb5 + } + #[doc = "0xa4 - CAN Frame Timestamp"] + #[inline(always)] + pub const fn tstp_cmb5(&self) -> &TstpCmb5 { + &self.tstp_cmb5 + } + #[doc = "0xa8 - CAN Frame Data Word 3"] + #[inline(always)] + pub const fn data3_cmb5(&self) -> &Data3Cmb5 { + &self.data3_cmb5 + } + #[doc = "0xac - CAN Frame Data Word 2"] + #[inline(always)] + pub const fn data2_cmb5(&self) -> &Data2Cmb5 { + &self.data2_cmb5 + } + #[doc = "0xb0 - CAN Frame Data Word 2"] + #[inline(always)] + pub const fn data1_cmb5(&self) -> &Data1Cmb5 { + &self.data1_cmb5 + } + #[doc = "0xb4 - CAN Frame Data Word 0"] + #[inline(always)] + pub const fn data0_cmb5(&self) -> &Data0Cmb5 { + &self.data0_cmb5 + } + #[doc = "0xb8 - CAN Frame Identifier Word 0"] + #[inline(always)] + pub const fn id0_cmb5(&self) -> &Id0Cmb5 { + &self.id0_cmb5 + } + #[doc = "0xbc - CAN Frame Identifier Word 1"] + #[inline(always)] + pub const fn id1_cmb5(&self) -> &Id1Cmb5 { + &self.id1_cmb5 + } + #[doc = "0xc0 - Buffer Status / Control Register"] + #[inline(always)] + pub const fn cnstat_cmb6(&self) -> &CnstatCmb6 { + &self.cnstat_cmb6 + } + #[doc = "0xc4 - CAN Frame Timestamp"] + #[inline(always)] + pub const fn tstp_cmb6(&self) -> &TstpCmb6 { + &self.tstp_cmb6 + } + #[doc = "0xc8 - CAN Frame Data Word 3"] + #[inline(always)] + pub const fn data3_cmb6(&self) -> &Data3Cmb6 { + &self.data3_cmb6 + } + #[doc = "0xcc - CAN Frame Data Word 2"] + #[inline(always)] + pub const fn data2_cmb6(&self) -> &Data2Cmb6 { + &self.data2_cmb6 + } + #[doc = "0xd0 - CAN Frame Data Word 2"] + #[inline(always)] + pub const fn data1_cmb6(&self) -> &Data1Cmb6 { + &self.data1_cmb6 + } + #[doc = "0xd4 - CAN Frame Data Word 0"] + #[inline(always)] + pub const fn data0_cmb6(&self) -> &Data0Cmb6 { + &self.data0_cmb6 + } + #[doc = "0xd8 - CAN Frame Identifier Word 0"] + #[inline(always)] + pub const fn id0_cmb6(&self) -> &Id0Cmb6 { + &self.id0_cmb6 + } + #[doc = "0xdc - CAN Frame Identifier Word 1"] + #[inline(always)] + pub const fn id1_cmb6(&self) -> &Id1Cmb6 { + &self.id1_cmb6 + } + #[doc = "0xe0 - Buffer Status / Control Register"] + #[inline(always)] + pub const fn cnstat_cmb7(&self) -> &CnstatCmb7 { + &self.cnstat_cmb7 + } + #[doc = "0xe4 - CAN Frame Timestamp"] + #[inline(always)] + pub const fn tstp_cmb7(&self) -> &TstpCmb7 { + &self.tstp_cmb7 + } + #[doc = "0xe8 - CAN Frame Data Word 3"] + #[inline(always)] + pub const fn data3_cmb7(&self) -> &Data3Cmb7 { + &self.data3_cmb7 + } + #[doc = "0xec - CAN Frame Data Word 2"] + #[inline(always)] + pub const fn data2_cmb7(&self) -> &Data2Cmb7 { + &self.data2_cmb7 + } + #[doc = "0xf0 - CAN Frame Data Word 2"] + #[inline(always)] + pub const fn data1_cmb7(&self) -> &Data1Cmb7 { + &self.data1_cmb7 + } + #[doc = "0xf4 - CAN Frame Data Word 0"] + #[inline(always)] + pub const fn data0_cmb7(&self) -> &Data0Cmb7 { + &self.data0_cmb7 + } + #[doc = "0xf8 - CAN Frame Identifier Word 0"] + #[inline(always)] + pub const fn id0_cmb7(&self) -> &Id0Cmb7 { + &self.id0_cmb7 + } + #[doc = "0xfc - CAN Frame Identifier Word 1"] + #[inline(always)] + pub const fn id1_cmb7(&self) -> &Id1Cmb7 { + &self.id1_cmb7 + } + #[doc = "0x100 - Buffer Status / Control Register"] + #[inline(always)] + pub const fn cnstat_cmb8(&self) -> &CnstatCmb8 { + &self.cnstat_cmb8 + } + #[doc = "0x104 - CAN Frame Timestamp"] + #[inline(always)] + pub const fn tstp_cmb8(&self) -> &TstpCmb8 { + &self.tstp_cmb8 + } + #[doc = "0x108 - CAN Frame Data Word 3"] + #[inline(always)] + pub const fn data3_cmb8(&self) -> &Data3Cmb8 { + &self.data3_cmb8 + } + #[doc = "0x10c - CAN Frame Data Word 2"] + #[inline(always)] + pub const fn data2_cmb8(&self) -> &Data2Cmb8 { + &self.data2_cmb8 + } + #[doc = "0x110 - CAN Frame Data Word 2"] + #[inline(always)] + pub const fn data1_cmb8(&self) -> &Data1Cmb8 { + &self.data1_cmb8 + } + #[doc = "0x114 - CAN Frame Data Word 0"] + #[inline(always)] + pub const fn data0_cmb8(&self) -> &Data0Cmb8 { + &self.data0_cmb8 + } + #[doc = "0x118 - CAN Frame Identifier Word 0"] + #[inline(always)] + pub const fn id0_cmb8(&self) -> &Id0Cmb8 { + &self.id0_cmb8 + } + #[doc = "0x11c - CAN Frame Identifier Word 1"] + #[inline(always)] + pub const fn id1_cmb8(&self) -> &Id1Cmb8 { + &self.id1_cmb8 + } + #[doc = "0x120 - Buffer Status / Control Register"] + #[inline(always)] + pub const fn cnstat_cmb9(&self) -> &CnstatCmb9 { + &self.cnstat_cmb9 + } + #[doc = "0x124 - CAN Frame Timestamp"] + #[inline(always)] + pub const fn tstp_cmb9(&self) -> &TstpCmb9 { + &self.tstp_cmb9 + } + #[doc = "0x128 - CAN Frame Data Word 3"] + #[inline(always)] + pub const fn data3_cmb9(&self) -> &Data3Cmb9 { + &self.data3_cmb9 + } + #[doc = "0x12c - CAN Frame Data Word 2"] + #[inline(always)] + pub const fn data2_cmb9(&self) -> &Data2Cmb9 { + &self.data2_cmb9 + } + #[doc = "0x130 - CAN Frame Data Word 2"] + #[inline(always)] + pub const fn data1_cmb9(&self) -> &Data1Cmb9 { + &self.data1_cmb9 + } + #[doc = "0x134 - CAN Frame Data Word 0"] + #[inline(always)] + pub const fn data0_cmb9(&self) -> &Data0Cmb9 { + &self.data0_cmb9 + } + #[doc = "0x138 - CAN Frame Identifier Word 0"] + #[inline(always)] + pub const fn id0_cmb9(&self) -> &Id0Cmb9 { + &self.id0_cmb9 + } + #[doc = "0x13c - CAN Frame Identifier Word 1"] + #[inline(always)] + pub const fn id1_cmb9(&self) -> &Id1Cmb9 { + &self.id1_cmb9 + } + #[doc = "0x140 - Buffer Status / Control Register"] + #[inline(always)] + pub const fn cnstat_cmb10(&self) -> &CnstatCmb10 { + &self.cnstat_cmb10 + } + #[doc = "0x144 - CAN Frame Timestamp"] + #[inline(always)] + pub const fn tstp_cmb10(&self) -> &TstpCmb10 { + &self.tstp_cmb10 + } + #[doc = "0x148 - CAN Frame Data Word 3"] + #[inline(always)] + pub const fn data3_cmb10(&self) -> &Data3Cmb10 { + &self.data3_cmb10 + } + #[doc = "0x14c - CAN Frame Data Word 2"] + #[inline(always)] + pub const fn data2_cmb10(&self) -> &Data2Cmb10 { + &self.data2_cmb10 + } + #[doc = "0x150 - CAN Frame Data Word 2"] + #[inline(always)] + pub const fn data1_cmb10(&self) -> &Data1Cmb10 { + &self.data1_cmb10 + } + #[doc = "0x154 - CAN Frame Data Word 0"] + #[inline(always)] + pub const fn data0_cmb10(&self) -> &Data0Cmb10 { + &self.data0_cmb10 + } + #[doc = "0x158 - CAN Frame Identifier Word 0"] + #[inline(always)] + pub const fn id0_cmb10(&self) -> &Id0Cmb10 { + &self.id0_cmb10 + } + #[doc = "0x15c - CAN Frame Identifier Word 1"] + #[inline(always)] + pub const fn id1_cmb10(&self) -> &Id1Cmb10 { + &self.id1_cmb10 + } + #[doc = "0x160 - Buffer Status / Control Register"] + #[inline(always)] + pub const fn cnstat_cmb11(&self) -> &CnstatCmb11 { + &self.cnstat_cmb11 + } + #[doc = "0x164 - CAN Frame Timestamp"] + #[inline(always)] + pub const fn tstp_cmb11(&self) -> &TstpCmb11 { + &self.tstp_cmb11 + } + #[doc = "0x168 - CAN Frame Data Word 3"] + #[inline(always)] + pub const fn data3_cmb11(&self) -> &Data3Cmb11 { + &self.data3_cmb11 + } + #[doc = "0x16c - CAN Frame Data Word 2"] + #[inline(always)] + pub const fn data2_cmb11(&self) -> &Data2Cmb11 { + &self.data2_cmb11 + } + #[doc = "0x170 - CAN Frame Data Word 2"] + #[inline(always)] + pub const fn data1_cmb11(&self) -> &Data1Cmb11 { + &self.data1_cmb11 + } + #[doc = "0x174 - CAN Frame Data Word 0"] + #[inline(always)] + pub const fn data0_cmb11(&self) -> &Data0Cmb11 { + &self.data0_cmb11 + } + #[doc = "0x178 - CAN Frame Identifier Word 0"] + #[inline(always)] + pub const fn id0_cmb11(&self) -> &Id0Cmb11 { + &self.id0_cmb11 + } + #[doc = "0x17c - CAN Frame Identifier Word 1"] + #[inline(always)] + pub const fn id1_cmb11(&self) -> &Id1Cmb11 { + &self.id1_cmb11 + } + #[doc = "0x180 - Buffer Status / Control Register"] + #[inline(always)] + pub const fn cnstat_cmb12(&self) -> &CnstatCmb12 { + &self.cnstat_cmb12 + } + #[doc = "0x184 - CAN Frame Timestamp"] + #[inline(always)] + pub const fn tstp_cmb12(&self) -> &TstpCmb12 { + &self.tstp_cmb12 + } + #[doc = "0x188 - CAN Frame Data Word 3"] + #[inline(always)] + pub const fn data3_cmb12(&self) -> &Data3Cmb12 { + &self.data3_cmb12 + } + #[doc = "0x18c - CAN Frame Data Word 2"] + #[inline(always)] + pub const fn data2_cmb12(&self) -> &Data2Cmb12 { + &self.data2_cmb12 + } + #[doc = "0x190 - CAN Frame Data Word 2"] + #[inline(always)] + pub const fn data1_cmb12(&self) -> &Data1Cmb12 { + &self.data1_cmb12 + } + #[doc = "0x194 - CAN Frame Data Word 0"] + #[inline(always)] + pub const fn data0_cmb12(&self) -> &Data0Cmb12 { + &self.data0_cmb12 + } + #[doc = "0x198 - CAN Frame Identifier Word 0"] + #[inline(always)] + pub const fn id0_cmb12(&self) -> &Id0Cmb12 { + &self.id0_cmb12 + } + #[doc = "0x19c - CAN Frame Identifier Word 1"] + #[inline(always)] + pub const fn id1_cmb12(&self) -> &Id1Cmb12 { + &self.id1_cmb12 + } + #[doc = "0x1a0 - Buffer Status / Control Register"] + #[inline(always)] + pub const fn cnstat_cmb13(&self) -> &CnstatCmb13 { + &self.cnstat_cmb13 + } + #[doc = "0x1a4 - CAN Frame Timestamp"] + #[inline(always)] + pub const fn tstp_cmb13(&self) -> &TstpCmb13 { + &self.tstp_cmb13 + } + #[doc = "0x1a8 - CAN Frame Data Word 3"] + #[inline(always)] + pub const fn data3_cmb13(&self) -> &Data3Cmb13 { + &self.data3_cmb13 + } + #[doc = "0x1ac - CAN Frame Data Word 2"] + #[inline(always)] + pub const fn data2_cmb13(&self) -> &Data2Cmb13 { + &self.data2_cmb13 + } + #[doc = "0x1b0 - CAN Frame Data Word 2"] + #[inline(always)] + pub const fn data1_cmb13(&self) -> &Data1Cmb13 { + &self.data1_cmb13 + } + #[doc = "0x1b4 - CAN Frame Data Word 0"] + #[inline(always)] + pub const fn data0_cmb13(&self) -> &Data0Cmb13 { + &self.data0_cmb13 + } + #[doc = "0x1b8 - CAN Frame Identifier Word 0"] + #[inline(always)] + pub const fn id0_cmb13(&self) -> &Id0Cmb13 { + &self.id0_cmb13 + } + #[doc = "0x1bc - CAN Frame Identifier Word 1"] + #[inline(always)] + pub const fn id1_cmb13(&self) -> &Id1Cmb13 { + &self.id1_cmb13 + } + #[doc = "0x1c0 - Buffer Status / Control Register"] + #[inline(always)] + pub const fn cnstat_cmb14(&self) -> &CnstatCmb14 { + &self.cnstat_cmb14 + } + #[doc = "0x1c4 - CAN Frame Timestamp"] + #[inline(always)] + pub const fn tstp_cmb14(&self) -> &TstpCmb14 { + &self.tstp_cmb14 + } + #[doc = "0x1c8 - CAN Frame Data Word 3"] + #[inline(always)] + pub const fn data3_cmb14(&self) -> &Data3Cmb14 { + &self.data3_cmb14 + } + #[doc = "0x1cc - CAN Frame Data Word 2"] + #[inline(always)] + pub const fn data2_cmb14(&self) -> &Data2Cmb14 { + &self.data2_cmb14 + } + #[doc = "0x1d0 - CAN Frame Data Word 2"] + #[inline(always)] + pub const fn data1_cmb14(&self) -> &Data1Cmb14 { + &self.data1_cmb14 + } + #[doc = "0x1d4 - CAN Frame Data Word 0"] + #[inline(always)] + pub const fn data0_cmb14(&self) -> &Data0Cmb14 { + &self.data0_cmb14 + } + #[doc = "0x1d8 - CAN Frame Identifier Word 0"] + #[inline(always)] + pub const fn id0_cmb14(&self) -> &Id0Cmb14 { + &self.id0_cmb14 + } + #[doc = "0x1dc - CAN Frame Identifier Word 1"] + #[inline(always)] + pub const fn id1_cmb14(&self) -> &Id1Cmb14 { + &self.id1_cmb14 + } + #[doc = "0x1e0 - Buffer Status / Control Register"] + #[inline(always)] + pub const fn cnstat_hcmb(&self) -> &CnstatHcmb { + &self.cnstat_hcmb + } + #[doc = "0x1e4 - CAN Frame Timestamp"] + #[inline(always)] + pub const fn tstp_hcmb(&self) -> &TstpHcmb { + &self.tstp_hcmb + } + #[doc = "0x1e8 - CAN Frame Data Word 3"] + #[inline(always)] + pub const fn data3_hcmb(&self) -> &Data3Hcmb { + &self.data3_hcmb + } + #[doc = "0x1ec - CAN Frame Data Word 2"] + #[inline(always)] + pub const fn data2_hcmb(&self) -> &Data2Hcmb { + &self.data2_hcmb + } + #[doc = "0x1f0 - CAN Frame Data Word 2"] + #[inline(always)] + pub const fn data1_hcmb(&self) -> &Data1Hcmb { + &self.data1_hcmb + } + #[doc = "0x1f4 - CAN Frame Data Word 0"] + #[inline(always)] + pub const fn data0_hcmb(&self) -> &Data0Hcmb { + &self.data0_hcmb + } + #[doc = "0x1f8 - CAN Frame Identifier Word 0"] + #[inline(always)] + pub const fn id0_hcmb(&self) -> &Id0Hcmb { + &self.id0_hcmb + } + #[doc = "0x1fc - CAN Frame Identifier Word 1"] + #[inline(always)] + pub const fn id1_hcmb(&self) -> &Id1Hcmb { + &self.id1_hcmb + } + #[doc = "0x200 - CAN Global Configuration Register"] + #[inline(always)] + pub const fn cgcr(&self) -> &Cgcr { + &self.cgcr + } + #[doc = "0x204 - CAN Timing Register"] + #[inline(always)] + pub const fn ctim(&self) -> &Ctim { + &self.ctim + } + #[doc = "0x208 - CAN Global Mask Extension"] + #[inline(always)] + pub const fn gmskx(&self) -> &Gmskx { + &self.gmskx + } + #[doc = "0x20c - CAN Global Mask Base"] + #[inline(always)] + pub const fn gmskb(&self) -> &Gmskb { + &self.gmskb + } + #[doc = "0x210 - CAN Basic Mask Extension"] + #[inline(always)] + pub const fn bmskx(&self) -> &Bmskx { + &self.bmskx + } + #[doc = "0x214 - CAN Basic Mask Base"] + #[inline(always)] + pub const fn bmskb(&self) -> &Bmskb { + &self.bmskb + } + #[doc = "0x218 - CAN Interrupt Enable Register"] + #[inline(always)] + pub const fn cien(&self) -> &Cien { + &self.cien + } + #[doc = "0x21c - CAN Interrupt Pending Register"] + #[inline(always)] + pub const fn cipnd(&self) -> &Cipnd { + &self.cipnd + } + #[doc = "0x220 - CAN Interrupt Clear Register"] + #[inline(always)] + pub const fn ciclr(&self) -> &Ciclr { + &self.ciclr + } + #[doc = "0x224 - CAN Interrupt Code Enable Register"] + #[inline(always)] + pub const fn cicen(&self) -> &Cicen { + &self.cicen + } + #[doc = "0x228 - CAN Status Pending Register"] + #[inline(always)] + pub const fn cstpnd(&self) -> &Cstpnd { + &self.cstpnd + } + #[doc = "0x22c - CAN Error Counter Register"] + #[inline(always)] + pub const fn canec(&self) -> &Canec { + &self.canec + } + #[doc = "0x230 - CAN Error Diagnostic Register"] + #[inline(always)] + pub const fn cediag(&self) -> &Cediag { + &self.cediag + } + #[doc = "0x234 - CAN Timer Register"] + #[inline(always)] + pub const fn ctmr(&self) -> &Ctmr { + &self.ctmr + } +} +#[doc = "CNSTAT_CMB0 (rw) register accessor: Buffer Status / Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cnstat_cmb0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cnstat_cmb0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnstat_cmb0`] +module"] +#[doc(alias = "CNSTAT_CMB0")] +pub type CnstatCmb0 = crate::Reg; #[doc = "Buffer Status / Control Register"] pub mod cnstat_cmb0; -#[doc = "TSTP_CMB0 register accessor: an alias for `Reg`"] -pub type TSTP_CMB0 = crate::Reg; +#[doc = "TSTP_CMB0 (rw) register accessor: CAN Frame Timestamp\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tstp_cmb0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tstp_cmb0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstp_cmb0`] +module"] +#[doc(alias = "TSTP_CMB0")] +pub type TstpCmb0 = crate::Reg; #[doc = "CAN Frame Timestamp"] pub mod tstp_cmb0; -#[doc = "DATA3_CMB0 register accessor: an alias for `Reg`"] -pub type DATA3_CMB0 = crate::Reg; +#[doc = "DATA3_CMB0 (rw) register accessor: CAN Frame Data Word 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data3_cmb0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data3_cmb0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data3_cmb0`] +module"] +#[doc(alias = "DATA3_CMB0")] +pub type Data3Cmb0 = crate::Reg; #[doc = "CAN Frame Data Word 3"] pub mod data3_cmb0; -#[doc = "DATA2_CMB0 register accessor: an alias for `Reg`"] -pub type DATA2_CMB0 = crate::Reg; +#[doc = "DATA2_CMB0 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data2_cmb0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data2_cmb0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data2_cmb0`] +module"] +#[doc(alias = "DATA2_CMB0")] +pub type Data2Cmb0 = crate::Reg; #[doc = "CAN Frame Data Word 2"] pub mod data2_cmb0; -#[doc = "DATA1_CMB0 register accessor: an alias for `Reg`"] -pub type DATA1_CMB0 = crate::Reg; +#[doc = "DATA1_CMB0 (rw) register accessor: CAN Frame Data Word 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data1_cmb0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data1_cmb0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data1_cmb0`] +module"] +#[doc(alias = "DATA1_CMB0")] +pub type Data1Cmb0 = crate::Reg; #[doc = "CAN Frame Data Word 1"] pub mod data1_cmb0; -#[doc = "DATA0_CMB0 register accessor: an alias for `Reg`"] -pub type DATA0_CMB0 = crate::Reg; +#[doc = "DATA0_CMB0 (rw) register accessor: CAN Frame Data Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data0_cmb0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data0_cmb0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data0_cmb0`] +module"] +#[doc(alias = "DATA0_CMB0")] +pub type Data0Cmb0 = crate::Reg; #[doc = "CAN Frame Data Word 0"] pub mod data0_cmb0; -#[doc = "ID0_CMB0 register accessor: an alias for `Reg`"] -pub type ID0_CMB0 = crate::Reg; +#[doc = "ID0_CMB0 (rw) register accessor: CAN Frame Identifier Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id0_cmb0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id0_cmb0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id0_cmb0`] +module"] +#[doc(alias = "ID0_CMB0")] +pub type Id0Cmb0 = crate::Reg; #[doc = "CAN Frame Identifier Word 0"] pub mod id0_cmb0; -#[doc = "ID1_CMB0 register accessor: an alias for `Reg`"] -pub type ID1_CMB0 = crate::Reg; +#[doc = "ID1_CMB0 (rw) register accessor: CAN Frame Identifier Word 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id1_cmb0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id1_cmb0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id1_cmb0`] +module"] +#[doc(alias = "ID1_CMB0")] +pub type Id1Cmb0 = crate::Reg; #[doc = "CAN Frame Identifier Word 1"] pub mod id1_cmb0; -#[doc = "CNSTAT_CMB1 register accessor: an alias for `Reg`"] -pub type CNSTAT_CMB1 = crate::Reg; +#[doc = "CNSTAT_CMB1 (rw) register accessor: Buffer Status / Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cnstat_cmb1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cnstat_cmb1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnstat_cmb1`] +module"] +#[doc(alias = "CNSTAT_CMB1")] +pub type CnstatCmb1 = crate::Reg; #[doc = "Buffer Status / Control Register"] pub mod cnstat_cmb1; -#[doc = "TSTP_CMB1 register accessor: an alias for `Reg`"] -pub type TSTP_CMB1 = crate::Reg; +#[doc = "TSTP_CMB1 (rw) register accessor: CAN Frame Timestamp\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tstp_cmb1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tstp_cmb1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstp_cmb1`] +module"] +#[doc(alias = "TSTP_CMB1")] +pub type TstpCmb1 = crate::Reg; #[doc = "CAN Frame Timestamp"] pub mod tstp_cmb1; -#[doc = "DATA3_CMB1 register accessor: an alias for `Reg`"] -pub type DATA3_CMB1 = crate::Reg; +#[doc = "DATA3_CMB1 (rw) register accessor: CAN Frame Data Word 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data3_cmb1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data3_cmb1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data3_cmb1`] +module"] +#[doc(alias = "DATA3_CMB1")] +pub type Data3Cmb1 = crate::Reg; #[doc = "CAN Frame Data Word 3"] pub mod data3_cmb1; -#[doc = "DATA2_CMB1 register accessor: an alias for `Reg`"] -pub type DATA2_CMB1 = crate::Reg; +#[doc = "DATA2_CMB1 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data2_cmb1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data2_cmb1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data2_cmb1`] +module"] +#[doc(alias = "DATA2_CMB1")] +pub type Data2Cmb1 = crate::Reg; #[doc = "CAN Frame Data Word 2"] pub mod data2_cmb1; -#[doc = "DATA1_CMB1 register accessor: an alias for `Reg`"] -pub type DATA1_CMB1 = crate::Reg; +#[doc = "DATA1_CMB1 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data1_cmb1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data1_cmb1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data1_cmb1`] +module"] +#[doc(alias = "DATA1_CMB1")] +pub type Data1Cmb1 = crate::Reg; #[doc = "CAN Frame Data Word 2"] pub mod data1_cmb1; -#[doc = "DATA0_CMB1 register accessor: an alias for `Reg`"] -pub type DATA0_CMB1 = crate::Reg; +#[doc = "DATA0_CMB1 (rw) register accessor: CAN Frame Data Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data0_cmb1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data0_cmb1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data0_cmb1`] +module"] +#[doc(alias = "DATA0_CMB1")] +pub type Data0Cmb1 = crate::Reg; #[doc = "CAN Frame Data Word 0"] pub mod data0_cmb1; -#[doc = "ID0_CMB1 register accessor: an alias for `Reg`"] -pub type ID0_CMB1 = crate::Reg; +#[doc = "ID0_CMB1 (rw) register accessor: CAN Frame Identifier Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id0_cmb1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id0_cmb1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id0_cmb1`] +module"] +#[doc(alias = "ID0_CMB1")] +pub type Id0Cmb1 = crate::Reg; #[doc = "CAN Frame Identifier Word 0"] pub mod id0_cmb1; -#[doc = "ID1_CMB1 register accessor: an alias for `Reg`"] -pub type ID1_CMB1 = crate::Reg; +#[doc = "ID1_CMB1 (rw) register accessor: CAN Frame Identifier Word 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id1_cmb1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id1_cmb1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id1_cmb1`] +module"] +#[doc(alias = "ID1_CMB1")] +pub type Id1Cmb1 = crate::Reg; #[doc = "CAN Frame Identifier Word 1"] pub mod id1_cmb1; -#[doc = "CNSTAT_CMB2 register accessor: an alias for `Reg`"] -pub type CNSTAT_CMB2 = crate::Reg; +#[doc = "CNSTAT_CMB2 (rw) register accessor: Buffer Status / Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cnstat_cmb2::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cnstat_cmb2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnstat_cmb2`] +module"] +#[doc(alias = "CNSTAT_CMB2")] +pub type CnstatCmb2 = crate::Reg; #[doc = "Buffer Status / Control Register"] pub mod cnstat_cmb2; -#[doc = "TSTP_CMB2 register accessor: an alias for `Reg`"] -pub type TSTP_CMB2 = crate::Reg; +#[doc = "TSTP_CMB2 (rw) register accessor: CAN Frame Timestamp\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tstp_cmb2::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tstp_cmb2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstp_cmb2`] +module"] +#[doc(alias = "TSTP_CMB2")] +pub type TstpCmb2 = crate::Reg; #[doc = "CAN Frame Timestamp"] pub mod tstp_cmb2; -#[doc = "DATA3_CMB2 register accessor: an alias for `Reg`"] -pub type DATA3_CMB2 = crate::Reg; +#[doc = "DATA3_CMB2 (rw) register accessor: CAN Frame Data Word 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data3_cmb2::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data3_cmb2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data3_cmb2`] +module"] +#[doc(alias = "DATA3_CMB2")] +pub type Data3Cmb2 = crate::Reg; #[doc = "CAN Frame Data Word 3"] pub mod data3_cmb2; -#[doc = "DATA2_CMB2 register accessor: an alias for `Reg`"] -pub type DATA2_CMB2 = crate::Reg; +#[doc = "DATA2_CMB2 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data2_cmb2::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data2_cmb2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data2_cmb2`] +module"] +#[doc(alias = "DATA2_CMB2")] +pub type Data2Cmb2 = crate::Reg; #[doc = "CAN Frame Data Word 2"] pub mod data2_cmb2; -#[doc = "DATA1_CMB2 register accessor: an alias for `Reg`"] -pub type DATA1_CMB2 = crate::Reg; +#[doc = "DATA1_CMB2 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data1_cmb2::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data1_cmb2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data1_cmb2`] +module"] +#[doc(alias = "DATA1_CMB2")] +pub type Data1Cmb2 = crate::Reg; #[doc = "CAN Frame Data Word 2"] pub mod data1_cmb2; -#[doc = "DATA0_CMB2 register accessor: an alias for `Reg`"] -pub type DATA0_CMB2 = crate::Reg; +#[doc = "DATA0_CMB2 (rw) register accessor: CAN Frame Data Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data0_cmb2::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data0_cmb2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data0_cmb2`] +module"] +#[doc(alias = "DATA0_CMB2")] +pub type Data0Cmb2 = crate::Reg; #[doc = "CAN Frame Data Word 0"] pub mod data0_cmb2; -#[doc = "ID0_CMB2 register accessor: an alias for `Reg`"] -pub type ID0_CMB2 = crate::Reg; +#[doc = "ID0_CMB2 (rw) register accessor: CAN Frame Identifier Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id0_cmb2::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id0_cmb2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id0_cmb2`] +module"] +#[doc(alias = "ID0_CMB2")] +pub type Id0Cmb2 = crate::Reg; #[doc = "CAN Frame Identifier Word 0"] pub mod id0_cmb2; -#[doc = "ID1_CMB2 register accessor: an alias for `Reg`"] -pub type ID1_CMB2 = crate::Reg; +#[doc = "ID1_CMB2 (rw) register accessor: CAN Frame Identifier Word 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id1_cmb2::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id1_cmb2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id1_cmb2`] +module"] +#[doc(alias = "ID1_CMB2")] +pub type Id1Cmb2 = crate::Reg; #[doc = "CAN Frame Identifier Word 1"] pub mod id1_cmb2; -#[doc = "CNSTAT_CMB3 register accessor: an alias for `Reg`"] -pub type CNSTAT_CMB3 = crate::Reg; +#[doc = "CNSTAT_CMB3 (rw) register accessor: Buffer Status / Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cnstat_cmb3::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cnstat_cmb3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnstat_cmb3`] +module"] +#[doc(alias = "CNSTAT_CMB3")] +pub type CnstatCmb3 = crate::Reg; #[doc = "Buffer Status / Control Register"] pub mod cnstat_cmb3; -#[doc = "TSTP_CMB3 register accessor: an alias for `Reg`"] -pub type TSTP_CMB3 = crate::Reg; +#[doc = "TSTP_CMB3 (rw) register accessor: CAN Frame Timestamp\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tstp_cmb3::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tstp_cmb3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstp_cmb3`] +module"] +#[doc(alias = "TSTP_CMB3")] +pub type TstpCmb3 = crate::Reg; #[doc = "CAN Frame Timestamp"] pub mod tstp_cmb3; -#[doc = "DATA3_CMB3 register accessor: an alias for `Reg`"] -pub type DATA3_CMB3 = crate::Reg; +#[doc = "DATA3_CMB3 (rw) register accessor: CAN Frame Data Word 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data3_cmb3::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data3_cmb3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data3_cmb3`] +module"] +#[doc(alias = "DATA3_CMB3")] +pub type Data3Cmb3 = crate::Reg; #[doc = "CAN Frame Data Word 3"] pub mod data3_cmb3; -#[doc = "DATA2_CMB3 register accessor: an alias for `Reg`"] -pub type DATA2_CMB3 = crate::Reg; +#[doc = "DATA2_CMB3 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data2_cmb3::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data2_cmb3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data2_cmb3`] +module"] +#[doc(alias = "DATA2_CMB3")] +pub type Data2Cmb3 = crate::Reg; #[doc = "CAN Frame Data Word 2"] pub mod data2_cmb3; -#[doc = "DATA1_CMB3 register accessor: an alias for `Reg`"] -pub type DATA1_CMB3 = crate::Reg; +#[doc = "DATA1_CMB3 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data1_cmb3::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data1_cmb3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data1_cmb3`] +module"] +#[doc(alias = "DATA1_CMB3")] +pub type Data1Cmb3 = crate::Reg; #[doc = "CAN Frame Data Word 2"] pub mod data1_cmb3; -#[doc = "DATA0_CMB3 register accessor: an alias for `Reg`"] -pub type DATA0_CMB3 = crate::Reg; +#[doc = "DATA0_CMB3 (rw) register accessor: CAN Frame Data Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data0_cmb3::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data0_cmb3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data0_cmb3`] +module"] +#[doc(alias = "DATA0_CMB3")] +pub type Data0Cmb3 = crate::Reg; #[doc = "CAN Frame Data Word 0"] pub mod data0_cmb3; -#[doc = "ID0_CMB3 register accessor: an alias for `Reg`"] -pub type ID0_CMB3 = crate::Reg; +#[doc = "ID0_CMB3 (rw) register accessor: CAN Frame Identifier Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id0_cmb3::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id0_cmb3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id0_cmb3`] +module"] +#[doc(alias = "ID0_CMB3")] +pub type Id0Cmb3 = crate::Reg; #[doc = "CAN Frame Identifier Word 0"] pub mod id0_cmb3; -#[doc = "ID1_CMB3 register accessor: an alias for `Reg`"] -pub type ID1_CMB3 = crate::Reg; +#[doc = "ID1_CMB3 (rw) register accessor: CAN Frame Identifier Word 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id1_cmb3::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id1_cmb3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id1_cmb3`] +module"] +#[doc(alias = "ID1_CMB3")] +pub type Id1Cmb3 = crate::Reg; #[doc = "CAN Frame Identifier Word 1"] pub mod id1_cmb3; -#[doc = "CNSTAT_CMB4 register accessor: an alias for `Reg`"] -pub type CNSTAT_CMB4 = crate::Reg; +#[doc = "CNSTAT_CMB4 (rw) register accessor: Buffer Status / Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cnstat_cmb4::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cnstat_cmb4::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnstat_cmb4`] +module"] +#[doc(alias = "CNSTAT_CMB4")] +pub type CnstatCmb4 = crate::Reg; #[doc = "Buffer Status / Control Register"] pub mod cnstat_cmb4; -#[doc = "TSTP_CMB4 register accessor: an alias for `Reg`"] -pub type TSTP_CMB4 = crate::Reg; +#[doc = "TSTP_CMB4 (rw) register accessor: CAN Frame Timestamp\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tstp_cmb4::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tstp_cmb4::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstp_cmb4`] +module"] +#[doc(alias = "TSTP_CMB4")] +pub type TstpCmb4 = crate::Reg; #[doc = "CAN Frame Timestamp"] pub mod tstp_cmb4; -#[doc = "DATA3_CMB4 register accessor: an alias for `Reg`"] -pub type DATA3_CMB4 = crate::Reg; +#[doc = "DATA3_CMB4 (rw) register accessor: CAN Frame Data Word 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data3_cmb4::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data3_cmb4::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data3_cmb4`] +module"] +#[doc(alias = "DATA3_CMB4")] +pub type Data3Cmb4 = crate::Reg; #[doc = "CAN Frame Data Word 3"] pub mod data3_cmb4; -#[doc = "DATA2_CMB4 register accessor: an alias for `Reg`"] -pub type DATA2_CMB4 = crate::Reg; +#[doc = "DATA2_CMB4 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data2_cmb4::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data2_cmb4::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data2_cmb4`] +module"] +#[doc(alias = "DATA2_CMB4")] +pub type Data2Cmb4 = crate::Reg; #[doc = "CAN Frame Data Word 2"] pub mod data2_cmb4; -#[doc = "DATA1_CMB4 register accessor: an alias for `Reg`"] -pub type DATA1_CMB4 = crate::Reg; +#[doc = "DATA1_CMB4 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data1_cmb4::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data1_cmb4::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data1_cmb4`] +module"] +#[doc(alias = "DATA1_CMB4")] +pub type Data1Cmb4 = crate::Reg; #[doc = "CAN Frame Data Word 2"] pub mod data1_cmb4; -#[doc = "DATA0_CMB4 register accessor: an alias for `Reg`"] -pub type DATA0_CMB4 = crate::Reg; +#[doc = "DATA0_CMB4 (rw) register accessor: CAN Frame Data Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data0_cmb4::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data0_cmb4::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data0_cmb4`] +module"] +#[doc(alias = "DATA0_CMB4")] +pub type Data0Cmb4 = crate::Reg; #[doc = "CAN Frame Data Word 0"] pub mod data0_cmb4; -#[doc = "ID0_CMB4 register accessor: an alias for `Reg`"] -pub type ID0_CMB4 = crate::Reg; +#[doc = "ID0_CMB4 (rw) register accessor: CAN Frame Identifier Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id0_cmb4::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id0_cmb4::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id0_cmb4`] +module"] +#[doc(alias = "ID0_CMB4")] +pub type Id0Cmb4 = crate::Reg; #[doc = "CAN Frame Identifier Word 0"] pub mod id0_cmb4; -#[doc = "ID1_CMB4 register accessor: an alias for `Reg`"] -pub type ID1_CMB4 = crate::Reg; +#[doc = "ID1_CMB4 (rw) register accessor: CAN Frame Identifier Word 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id1_cmb4::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id1_cmb4::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id1_cmb4`] +module"] +#[doc(alias = "ID1_CMB4")] +pub type Id1Cmb4 = crate::Reg; #[doc = "CAN Frame Identifier Word 1"] pub mod id1_cmb4; -#[doc = "CNSTAT_CMB5 register accessor: an alias for `Reg`"] -pub type CNSTAT_CMB5 = crate::Reg; +#[doc = "CNSTAT_CMB5 (rw) register accessor: Buffer Status / Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cnstat_cmb5::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cnstat_cmb5::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnstat_cmb5`] +module"] +#[doc(alias = "CNSTAT_CMB5")] +pub type CnstatCmb5 = crate::Reg; #[doc = "Buffer Status / Control Register"] pub mod cnstat_cmb5; -#[doc = "TSTP_CMB5 register accessor: an alias for `Reg`"] -pub type TSTP_CMB5 = crate::Reg; +#[doc = "TSTP_CMB5 (rw) register accessor: CAN Frame Timestamp\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tstp_cmb5::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tstp_cmb5::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstp_cmb5`] +module"] +#[doc(alias = "TSTP_CMB5")] +pub type TstpCmb5 = crate::Reg; #[doc = "CAN Frame Timestamp"] pub mod tstp_cmb5; -#[doc = "DATA3_CMB5 register accessor: an alias for `Reg`"] -pub type DATA3_CMB5 = crate::Reg; +#[doc = "DATA3_CMB5 (rw) register accessor: CAN Frame Data Word 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data3_cmb5::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data3_cmb5::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data3_cmb5`] +module"] +#[doc(alias = "DATA3_CMB5")] +pub type Data3Cmb5 = crate::Reg; #[doc = "CAN Frame Data Word 3"] pub mod data3_cmb5; -#[doc = "DATA2_CMB5 register accessor: an alias for `Reg`"] -pub type DATA2_CMB5 = crate::Reg; +#[doc = "DATA2_CMB5 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data2_cmb5::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data2_cmb5::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data2_cmb5`] +module"] +#[doc(alias = "DATA2_CMB5")] +pub type Data2Cmb5 = crate::Reg; #[doc = "CAN Frame Data Word 2"] pub mod data2_cmb5; -#[doc = "DATA1_CMB5 register accessor: an alias for `Reg`"] -pub type DATA1_CMB5 = crate::Reg; +#[doc = "DATA1_CMB5 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data1_cmb5::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data1_cmb5::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data1_cmb5`] +module"] +#[doc(alias = "DATA1_CMB5")] +pub type Data1Cmb5 = crate::Reg; #[doc = "CAN Frame Data Word 2"] pub mod data1_cmb5; -#[doc = "DATA0_CMB5 register accessor: an alias for `Reg`"] -pub type DATA0_CMB5 = crate::Reg; +#[doc = "DATA0_CMB5 (rw) register accessor: CAN Frame Data Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data0_cmb5::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data0_cmb5::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data0_cmb5`] +module"] +#[doc(alias = "DATA0_CMB5")] +pub type Data0Cmb5 = crate::Reg; #[doc = "CAN Frame Data Word 0"] pub mod data0_cmb5; -#[doc = "ID0_CMB5 register accessor: an alias for `Reg`"] -pub type ID0_CMB5 = crate::Reg; +#[doc = "ID0_CMB5 (rw) register accessor: CAN Frame Identifier Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id0_cmb5::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id0_cmb5::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id0_cmb5`] +module"] +#[doc(alias = "ID0_CMB5")] +pub type Id0Cmb5 = crate::Reg; #[doc = "CAN Frame Identifier Word 0"] pub mod id0_cmb5; -#[doc = "ID1_CMB5 register accessor: an alias for `Reg`"] -pub type ID1_CMB5 = crate::Reg; +#[doc = "ID1_CMB5 (rw) register accessor: CAN Frame Identifier Word 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id1_cmb5::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id1_cmb5::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id1_cmb5`] +module"] +#[doc(alias = "ID1_CMB5")] +pub type Id1Cmb5 = crate::Reg; #[doc = "CAN Frame Identifier Word 1"] pub mod id1_cmb5; -#[doc = "CNSTAT_CMB6 register accessor: an alias for `Reg`"] -pub type CNSTAT_CMB6 = crate::Reg; +#[doc = "CNSTAT_CMB6 (rw) register accessor: Buffer Status / Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cnstat_cmb6::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cnstat_cmb6::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnstat_cmb6`] +module"] +#[doc(alias = "CNSTAT_CMB6")] +pub type CnstatCmb6 = crate::Reg; #[doc = "Buffer Status / Control Register"] pub mod cnstat_cmb6; -#[doc = "TSTP_CMB6 register accessor: an alias for `Reg`"] -pub type TSTP_CMB6 = crate::Reg; +#[doc = "TSTP_CMB6 (rw) register accessor: CAN Frame Timestamp\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tstp_cmb6::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tstp_cmb6::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstp_cmb6`] +module"] +#[doc(alias = "TSTP_CMB6")] +pub type TstpCmb6 = crate::Reg; #[doc = "CAN Frame Timestamp"] pub mod tstp_cmb6; -#[doc = "DATA3_CMB6 register accessor: an alias for `Reg`"] -pub type DATA3_CMB6 = crate::Reg; +#[doc = "DATA3_CMB6 (rw) register accessor: CAN Frame Data Word 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data3_cmb6::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data3_cmb6::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data3_cmb6`] +module"] +#[doc(alias = "DATA3_CMB6")] +pub type Data3Cmb6 = crate::Reg; #[doc = "CAN Frame Data Word 3"] pub mod data3_cmb6; -#[doc = "DATA2_CMB6 register accessor: an alias for `Reg`"] -pub type DATA2_CMB6 = crate::Reg; +#[doc = "DATA2_CMB6 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data2_cmb6::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data2_cmb6::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data2_cmb6`] +module"] +#[doc(alias = "DATA2_CMB6")] +pub type Data2Cmb6 = crate::Reg; #[doc = "CAN Frame Data Word 2"] pub mod data2_cmb6; -#[doc = "DATA1_CMB6 register accessor: an alias for `Reg`"] -pub type DATA1_CMB6 = crate::Reg; +#[doc = "DATA1_CMB6 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data1_cmb6::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data1_cmb6::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data1_cmb6`] +module"] +#[doc(alias = "DATA1_CMB6")] +pub type Data1Cmb6 = crate::Reg; #[doc = "CAN Frame Data Word 2"] pub mod data1_cmb6; -#[doc = "DATA0_CMB6 register accessor: an alias for `Reg`"] -pub type DATA0_CMB6 = crate::Reg; +#[doc = "DATA0_CMB6 (rw) register accessor: CAN Frame Data Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data0_cmb6::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data0_cmb6::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data0_cmb6`] +module"] +#[doc(alias = "DATA0_CMB6")] +pub type Data0Cmb6 = crate::Reg; #[doc = "CAN Frame Data Word 0"] pub mod data0_cmb6; -#[doc = "ID0_CMB6 register accessor: an alias for `Reg`"] -pub type ID0_CMB6 = crate::Reg; +#[doc = "ID0_CMB6 (rw) register accessor: CAN Frame Identifier Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id0_cmb6::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id0_cmb6::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id0_cmb6`] +module"] +#[doc(alias = "ID0_CMB6")] +pub type Id0Cmb6 = crate::Reg; #[doc = "CAN Frame Identifier Word 0"] pub mod id0_cmb6; -#[doc = "ID1_CMB6 register accessor: an alias for `Reg`"] -pub type ID1_CMB6 = crate::Reg; +#[doc = "ID1_CMB6 (rw) register accessor: CAN Frame Identifier Word 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id1_cmb6::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id1_cmb6::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id1_cmb6`] +module"] +#[doc(alias = "ID1_CMB6")] +pub type Id1Cmb6 = crate::Reg; #[doc = "CAN Frame Identifier Word 1"] pub mod id1_cmb6; -#[doc = "CNSTAT_CMB7 register accessor: an alias for `Reg`"] -pub type CNSTAT_CMB7 = crate::Reg; +#[doc = "CNSTAT_CMB7 (rw) register accessor: Buffer Status / Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cnstat_cmb7::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cnstat_cmb7::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnstat_cmb7`] +module"] +#[doc(alias = "CNSTAT_CMB7")] +pub type CnstatCmb7 = crate::Reg; #[doc = "Buffer Status / Control Register"] pub mod cnstat_cmb7; -#[doc = "TSTP_CMB7 register accessor: an alias for `Reg`"] -pub type TSTP_CMB7 = crate::Reg; +#[doc = "TSTP_CMB7 (rw) register accessor: CAN Frame Timestamp\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tstp_cmb7::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tstp_cmb7::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstp_cmb7`] +module"] +#[doc(alias = "TSTP_CMB7")] +pub type TstpCmb7 = crate::Reg; #[doc = "CAN Frame Timestamp"] pub mod tstp_cmb7; -#[doc = "DATA3_CMB7 register accessor: an alias for `Reg`"] -pub type DATA3_CMB7 = crate::Reg; +#[doc = "DATA3_CMB7 (rw) register accessor: CAN Frame Data Word 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data3_cmb7::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data3_cmb7::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data3_cmb7`] +module"] +#[doc(alias = "DATA3_CMB7")] +pub type Data3Cmb7 = crate::Reg; #[doc = "CAN Frame Data Word 3"] pub mod data3_cmb7; -#[doc = "DATA2_CMB7 register accessor: an alias for `Reg`"] -pub type DATA2_CMB7 = crate::Reg; +#[doc = "DATA2_CMB7 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data2_cmb7::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data2_cmb7::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data2_cmb7`] +module"] +#[doc(alias = "DATA2_CMB7")] +pub type Data2Cmb7 = crate::Reg; #[doc = "CAN Frame Data Word 2"] pub mod data2_cmb7; -#[doc = "DATA1_CMB7 register accessor: an alias for `Reg`"] -pub type DATA1_CMB7 = crate::Reg; +#[doc = "DATA1_CMB7 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data1_cmb7::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data1_cmb7::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data1_cmb7`] +module"] +#[doc(alias = "DATA1_CMB7")] +pub type Data1Cmb7 = crate::Reg; #[doc = "CAN Frame Data Word 2"] pub mod data1_cmb7; -#[doc = "DATA0_CMB7 register accessor: an alias for `Reg`"] -pub type DATA0_CMB7 = crate::Reg; +#[doc = "DATA0_CMB7 (rw) register accessor: CAN Frame Data Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data0_cmb7::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data0_cmb7::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data0_cmb7`] +module"] +#[doc(alias = "DATA0_CMB7")] +pub type Data0Cmb7 = crate::Reg; #[doc = "CAN Frame Data Word 0"] pub mod data0_cmb7; -#[doc = "ID0_CMB7 register accessor: an alias for `Reg`"] -pub type ID0_CMB7 = crate::Reg; +#[doc = "ID0_CMB7 (rw) register accessor: CAN Frame Identifier Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id0_cmb7::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id0_cmb7::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id0_cmb7`] +module"] +#[doc(alias = "ID0_CMB7")] +pub type Id0Cmb7 = crate::Reg; #[doc = "CAN Frame Identifier Word 0"] pub mod id0_cmb7; -#[doc = "ID1_CMB7 register accessor: an alias for `Reg`"] -pub type ID1_CMB7 = crate::Reg; +#[doc = "ID1_CMB7 (rw) register accessor: CAN Frame Identifier Word 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id1_cmb7::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id1_cmb7::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id1_cmb7`] +module"] +#[doc(alias = "ID1_CMB7")] +pub type Id1Cmb7 = crate::Reg; #[doc = "CAN Frame Identifier Word 1"] pub mod id1_cmb7; -#[doc = "CNSTAT_CMB8 register accessor: an alias for `Reg`"] -pub type CNSTAT_CMB8 = crate::Reg; +#[doc = "CNSTAT_CMB8 (rw) register accessor: Buffer Status / Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cnstat_cmb8::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cnstat_cmb8::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnstat_cmb8`] +module"] +#[doc(alias = "CNSTAT_CMB8")] +pub type CnstatCmb8 = crate::Reg; #[doc = "Buffer Status / Control Register"] pub mod cnstat_cmb8; -#[doc = "TSTP_CMB8 register accessor: an alias for `Reg`"] -pub type TSTP_CMB8 = crate::Reg; +#[doc = "TSTP_CMB8 (rw) register accessor: CAN Frame Timestamp\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tstp_cmb8::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tstp_cmb8::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstp_cmb8`] +module"] +#[doc(alias = "TSTP_CMB8")] +pub type TstpCmb8 = crate::Reg; #[doc = "CAN Frame Timestamp"] pub mod tstp_cmb8; -#[doc = "DATA3_CMB8 register accessor: an alias for `Reg`"] -pub type DATA3_CMB8 = crate::Reg; +#[doc = "DATA3_CMB8 (rw) register accessor: CAN Frame Data Word 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data3_cmb8::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data3_cmb8::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data3_cmb8`] +module"] +#[doc(alias = "DATA3_CMB8")] +pub type Data3Cmb8 = crate::Reg; #[doc = "CAN Frame Data Word 3"] pub mod data3_cmb8; -#[doc = "DATA2_CMB8 register accessor: an alias for `Reg`"] -pub type DATA2_CMB8 = crate::Reg; +#[doc = "DATA2_CMB8 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data2_cmb8::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data2_cmb8::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data2_cmb8`] +module"] +#[doc(alias = "DATA2_CMB8")] +pub type Data2Cmb8 = crate::Reg; #[doc = "CAN Frame Data Word 2"] pub mod data2_cmb8; -#[doc = "DATA1_CMB8 register accessor: an alias for `Reg`"] -pub type DATA1_CMB8 = crate::Reg; +#[doc = "DATA1_CMB8 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data1_cmb8::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data1_cmb8::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data1_cmb8`] +module"] +#[doc(alias = "DATA1_CMB8")] +pub type Data1Cmb8 = crate::Reg; #[doc = "CAN Frame Data Word 2"] pub mod data1_cmb8; -#[doc = "DATA0_CMB8 register accessor: an alias for `Reg`"] -pub type DATA0_CMB8 = crate::Reg; +#[doc = "DATA0_CMB8 (rw) register accessor: CAN Frame Data Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data0_cmb8::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data0_cmb8::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data0_cmb8`] +module"] +#[doc(alias = "DATA0_CMB8")] +pub type Data0Cmb8 = crate::Reg; #[doc = "CAN Frame Data Word 0"] pub mod data0_cmb8; -#[doc = "ID0_CMB8 register accessor: an alias for `Reg`"] -pub type ID0_CMB8 = crate::Reg; +#[doc = "ID0_CMB8 (rw) register accessor: CAN Frame Identifier Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id0_cmb8::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id0_cmb8::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id0_cmb8`] +module"] +#[doc(alias = "ID0_CMB8")] +pub type Id0Cmb8 = crate::Reg; #[doc = "CAN Frame Identifier Word 0"] pub mod id0_cmb8; -#[doc = "ID1_CMB8 register accessor: an alias for `Reg`"] -pub type ID1_CMB8 = crate::Reg; +#[doc = "ID1_CMB8 (rw) register accessor: CAN Frame Identifier Word 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id1_cmb8::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id1_cmb8::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id1_cmb8`] +module"] +#[doc(alias = "ID1_CMB8")] +pub type Id1Cmb8 = crate::Reg; #[doc = "CAN Frame Identifier Word 1"] pub mod id1_cmb8; -#[doc = "CNSTAT_CMB9 register accessor: an alias for `Reg`"] -pub type CNSTAT_CMB9 = crate::Reg; +#[doc = "CNSTAT_CMB9 (rw) register accessor: Buffer Status / Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cnstat_cmb9::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cnstat_cmb9::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnstat_cmb9`] +module"] +#[doc(alias = "CNSTAT_CMB9")] +pub type CnstatCmb9 = crate::Reg; #[doc = "Buffer Status / Control Register"] pub mod cnstat_cmb9; -#[doc = "TSTP_CMB9 register accessor: an alias for `Reg`"] -pub type TSTP_CMB9 = crate::Reg; +#[doc = "TSTP_CMB9 (rw) register accessor: CAN Frame Timestamp\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tstp_cmb9::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tstp_cmb9::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstp_cmb9`] +module"] +#[doc(alias = "TSTP_CMB9")] +pub type TstpCmb9 = crate::Reg; #[doc = "CAN Frame Timestamp"] pub mod tstp_cmb9; -#[doc = "DATA3_CMB9 register accessor: an alias for `Reg`"] -pub type DATA3_CMB9 = crate::Reg; +#[doc = "DATA3_CMB9 (rw) register accessor: CAN Frame Data Word 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data3_cmb9::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data3_cmb9::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data3_cmb9`] +module"] +#[doc(alias = "DATA3_CMB9")] +pub type Data3Cmb9 = crate::Reg; #[doc = "CAN Frame Data Word 3"] pub mod data3_cmb9; -#[doc = "DATA2_CMB9 register accessor: an alias for `Reg`"] -pub type DATA2_CMB9 = crate::Reg; +#[doc = "DATA2_CMB9 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data2_cmb9::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data2_cmb9::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data2_cmb9`] +module"] +#[doc(alias = "DATA2_CMB9")] +pub type Data2Cmb9 = crate::Reg; #[doc = "CAN Frame Data Word 2"] pub mod data2_cmb9; -#[doc = "DATA1_CMB9 register accessor: an alias for `Reg`"] -pub type DATA1_CMB9 = crate::Reg; +#[doc = "DATA1_CMB9 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data1_cmb9::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data1_cmb9::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data1_cmb9`] +module"] +#[doc(alias = "DATA1_CMB9")] +pub type Data1Cmb9 = crate::Reg; #[doc = "CAN Frame Data Word 2"] pub mod data1_cmb9; -#[doc = "DATA0_CMB9 register accessor: an alias for `Reg`"] -pub type DATA0_CMB9 = crate::Reg; +#[doc = "DATA0_CMB9 (rw) register accessor: CAN Frame Data Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data0_cmb9::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data0_cmb9::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data0_cmb9`] +module"] +#[doc(alias = "DATA0_CMB9")] +pub type Data0Cmb9 = crate::Reg; #[doc = "CAN Frame Data Word 0"] pub mod data0_cmb9; -#[doc = "ID0_CMB9 register accessor: an alias for `Reg`"] -pub type ID0_CMB9 = crate::Reg; +#[doc = "ID0_CMB9 (rw) register accessor: CAN Frame Identifier Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id0_cmb9::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id0_cmb9::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id0_cmb9`] +module"] +#[doc(alias = "ID0_CMB9")] +pub type Id0Cmb9 = crate::Reg; #[doc = "CAN Frame Identifier Word 0"] pub mod id0_cmb9; -#[doc = "ID1_CMB9 register accessor: an alias for `Reg`"] -pub type ID1_CMB9 = crate::Reg; +#[doc = "ID1_CMB9 (rw) register accessor: CAN Frame Identifier Word 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id1_cmb9::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id1_cmb9::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id1_cmb9`] +module"] +#[doc(alias = "ID1_CMB9")] +pub type Id1Cmb9 = crate::Reg; #[doc = "CAN Frame Identifier Word 1"] pub mod id1_cmb9; -#[doc = "CNSTAT_CMB10 register accessor: an alias for `Reg`"] -pub type CNSTAT_CMB10 = crate::Reg; +#[doc = "CNSTAT_CMB10 (rw) register accessor: Buffer Status / Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cnstat_cmb10::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cnstat_cmb10::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnstat_cmb10`] +module"] +#[doc(alias = "CNSTAT_CMB10")] +pub type CnstatCmb10 = crate::Reg; #[doc = "Buffer Status / Control Register"] pub mod cnstat_cmb10; -#[doc = "TSTP_CMB10 register accessor: an alias for `Reg`"] -pub type TSTP_CMB10 = crate::Reg; +#[doc = "TSTP_CMB10 (rw) register accessor: CAN Frame Timestamp\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tstp_cmb10::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tstp_cmb10::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstp_cmb10`] +module"] +#[doc(alias = "TSTP_CMB10")] +pub type TstpCmb10 = crate::Reg; #[doc = "CAN Frame Timestamp"] pub mod tstp_cmb10; -#[doc = "DATA3_CMB10 register accessor: an alias for `Reg`"] -pub type DATA3_CMB10 = crate::Reg; +#[doc = "DATA3_CMB10 (rw) register accessor: CAN Frame Data Word 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data3_cmb10::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data3_cmb10::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data3_cmb10`] +module"] +#[doc(alias = "DATA3_CMB10")] +pub type Data3Cmb10 = crate::Reg; #[doc = "CAN Frame Data Word 3"] pub mod data3_cmb10; -#[doc = "DATA2_CMB10 register accessor: an alias for `Reg`"] -pub type DATA2_CMB10 = crate::Reg; +#[doc = "DATA2_CMB10 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data2_cmb10::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data2_cmb10::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data2_cmb10`] +module"] +#[doc(alias = "DATA2_CMB10")] +pub type Data2Cmb10 = crate::Reg; #[doc = "CAN Frame Data Word 2"] pub mod data2_cmb10; -#[doc = "DATA1_CMB10 register accessor: an alias for `Reg`"] -pub type DATA1_CMB10 = crate::Reg; +#[doc = "DATA1_CMB10 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data1_cmb10::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data1_cmb10::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data1_cmb10`] +module"] +#[doc(alias = "DATA1_CMB10")] +pub type Data1Cmb10 = crate::Reg; #[doc = "CAN Frame Data Word 2"] pub mod data1_cmb10; -#[doc = "DATA0_CMB10 register accessor: an alias for `Reg`"] -pub type DATA0_CMB10 = crate::Reg; +#[doc = "DATA0_CMB10 (rw) register accessor: CAN Frame Data Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data0_cmb10::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data0_cmb10::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data0_cmb10`] +module"] +#[doc(alias = "DATA0_CMB10")] +pub type Data0Cmb10 = crate::Reg; #[doc = "CAN Frame Data Word 0"] pub mod data0_cmb10; -#[doc = "ID0_CMB10 register accessor: an alias for `Reg`"] -pub type ID0_CMB10 = crate::Reg; +#[doc = "ID0_CMB10 (rw) register accessor: CAN Frame Identifier Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id0_cmb10::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id0_cmb10::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id0_cmb10`] +module"] +#[doc(alias = "ID0_CMB10")] +pub type Id0Cmb10 = crate::Reg; #[doc = "CAN Frame Identifier Word 0"] pub mod id0_cmb10; -#[doc = "ID1_CMB10 register accessor: an alias for `Reg`"] -pub type ID1_CMB10 = crate::Reg; +#[doc = "ID1_CMB10 (rw) register accessor: CAN Frame Identifier Word 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id1_cmb10::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id1_cmb10::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id1_cmb10`] +module"] +#[doc(alias = "ID1_CMB10")] +pub type Id1Cmb10 = crate::Reg; #[doc = "CAN Frame Identifier Word 1"] pub mod id1_cmb10; -#[doc = "CNSTAT_CMB11 register accessor: an alias for `Reg`"] -pub type CNSTAT_CMB11 = crate::Reg; +#[doc = "CNSTAT_CMB11 (rw) register accessor: Buffer Status / Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cnstat_cmb11::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cnstat_cmb11::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnstat_cmb11`] +module"] +#[doc(alias = "CNSTAT_CMB11")] +pub type CnstatCmb11 = crate::Reg; #[doc = "Buffer Status / Control Register"] pub mod cnstat_cmb11; -#[doc = "TSTP_CMB11 register accessor: an alias for `Reg`"] -pub type TSTP_CMB11 = crate::Reg; +#[doc = "TSTP_CMB11 (rw) register accessor: CAN Frame Timestamp\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tstp_cmb11::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tstp_cmb11::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstp_cmb11`] +module"] +#[doc(alias = "TSTP_CMB11")] +pub type TstpCmb11 = crate::Reg; #[doc = "CAN Frame Timestamp"] pub mod tstp_cmb11; -#[doc = "DATA3_CMB11 register accessor: an alias for `Reg`"] -pub type DATA3_CMB11 = crate::Reg; +#[doc = "DATA3_CMB11 (rw) register accessor: CAN Frame Data Word 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data3_cmb11::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data3_cmb11::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data3_cmb11`] +module"] +#[doc(alias = "DATA3_CMB11")] +pub type Data3Cmb11 = crate::Reg; #[doc = "CAN Frame Data Word 3"] pub mod data3_cmb11; -#[doc = "DATA2_CMB11 register accessor: an alias for `Reg`"] -pub type DATA2_CMB11 = crate::Reg; +#[doc = "DATA2_CMB11 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data2_cmb11::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data2_cmb11::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data2_cmb11`] +module"] +#[doc(alias = "DATA2_CMB11")] +pub type Data2Cmb11 = crate::Reg; #[doc = "CAN Frame Data Word 2"] pub mod data2_cmb11; -#[doc = "DATA1_CMB11 register accessor: an alias for `Reg`"] -pub type DATA1_CMB11 = crate::Reg; +#[doc = "DATA1_CMB11 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data1_cmb11::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data1_cmb11::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data1_cmb11`] +module"] +#[doc(alias = "DATA1_CMB11")] +pub type Data1Cmb11 = crate::Reg; #[doc = "CAN Frame Data Word 2"] pub mod data1_cmb11; -#[doc = "DATA0_CMB11 register accessor: an alias for `Reg`"] -pub type DATA0_CMB11 = crate::Reg; +#[doc = "DATA0_CMB11 (rw) register accessor: CAN Frame Data Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data0_cmb11::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data0_cmb11::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data0_cmb11`] +module"] +#[doc(alias = "DATA0_CMB11")] +pub type Data0Cmb11 = crate::Reg; #[doc = "CAN Frame Data Word 0"] pub mod data0_cmb11; -#[doc = "ID0_CMB11 register accessor: an alias for `Reg`"] -pub type ID0_CMB11 = crate::Reg; +#[doc = "ID0_CMB11 (rw) register accessor: CAN Frame Identifier Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id0_cmb11::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id0_cmb11::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id0_cmb11`] +module"] +#[doc(alias = "ID0_CMB11")] +pub type Id0Cmb11 = crate::Reg; #[doc = "CAN Frame Identifier Word 0"] pub mod id0_cmb11; -#[doc = "ID1_CMB11 register accessor: an alias for `Reg`"] -pub type ID1_CMB11 = crate::Reg; +#[doc = "ID1_CMB11 (rw) register accessor: CAN Frame Identifier Word 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id1_cmb11::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id1_cmb11::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id1_cmb11`] +module"] +#[doc(alias = "ID1_CMB11")] +pub type Id1Cmb11 = crate::Reg; #[doc = "CAN Frame Identifier Word 1"] pub mod id1_cmb11; -#[doc = "CNSTAT_CMB12 register accessor: an alias for `Reg`"] -pub type CNSTAT_CMB12 = crate::Reg; +#[doc = "CNSTAT_CMB12 (rw) register accessor: Buffer Status / Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cnstat_cmb12::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cnstat_cmb12::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnstat_cmb12`] +module"] +#[doc(alias = "CNSTAT_CMB12")] +pub type CnstatCmb12 = crate::Reg; #[doc = "Buffer Status / Control Register"] pub mod cnstat_cmb12; -#[doc = "TSTP_CMB12 register accessor: an alias for `Reg`"] -pub type TSTP_CMB12 = crate::Reg; +#[doc = "TSTP_CMB12 (rw) register accessor: CAN Frame Timestamp\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tstp_cmb12::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tstp_cmb12::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstp_cmb12`] +module"] +#[doc(alias = "TSTP_CMB12")] +pub type TstpCmb12 = crate::Reg; #[doc = "CAN Frame Timestamp"] pub mod tstp_cmb12; -#[doc = "DATA3_CMB12 register accessor: an alias for `Reg`"] -pub type DATA3_CMB12 = crate::Reg; +#[doc = "DATA3_CMB12 (rw) register accessor: CAN Frame Data Word 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data3_cmb12::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data3_cmb12::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data3_cmb12`] +module"] +#[doc(alias = "DATA3_CMB12")] +pub type Data3Cmb12 = crate::Reg; #[doc = "CAN Frame Data Word 3"] pub mod data3_cmb12; -#[doc = "DATA2_CMB12 register accessor: an alias for `Reg`"] -pub type DATA2_CMB12 = crate::Reg; +#[doc = "DATA2_CMB12 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data2_cmb12::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data2_cmb12::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data2_cmb12`] +module"] +#[doc(alias = "DATA2_CMB12")] +pub type Data2Cmb12 = crate::Reg; #[doc = "CAN Frame Data Word 2"] pub mod data2_cmb12; -#[doc = "DATA1_CMB12 register accessor: an alias for `Reg`"] -pub type DATA1_CMB12 = crate::Reg; +#[doc = "DATA1_CMB12 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data1_cmb12::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data1_cmb12::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data1_cmb12`] +module"] +#[doc(alias = "DATA1_CMB12")] +pub type Data1Cmb12 = crate::Reg; #[doc = "CAN Frame Data Word 2"] pub mod data1_cmb12; -#[doc = "DATA0_CMB12 register accessor: an alias for `Reg`"] -pub type DATA0_CMB12 = crate::Reg; +#[doc = "DATA0_CMB12 (rw) register accessor: CAN Frame Data Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data0_cmb12::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data0_cmb12::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data0_cmb12`] +module"] +#[doc(alias = "DATA0_CMB12")] +pub type Data0Cmb12 = crate::Reg; #[doc = "CAN Frame Data Word 0"] pub mod data0_cmb12; -#[doc = "ID0_CMB12 register accessor: an alias for `Reg`"] -pub type ID0_CMB12 = crate::Reg; +#[doc = "ID0_CMB12 (rw) register accessor: CAN Frame Identifier Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id0_cmb12::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id0_cmb12::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id0_cmb12`] +module"] +#[doc(alias = "ID0_CMB12")] +pub type Id0Cmb12 = crate::Reg; #[doc = "CAN Frame Identifier Word 0"] pub mod id0_cmb12; -#[doc = "ID1_CMB12 register accessor: an alias for `Reg`"] -pub type ID1_CMB12 = crate::Reg; +#[doc = "ID1_CMB12 (rw) register accessor: CAN Frame Identifier Word 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id1_cmb12::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id1_cmb12::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id1_cmb12`] +module"] +#[doc(alias = "ID1_CMB12")] +pub type Id1Cmb12 = crate::Reg; #[doc = "CAN Frame Identifier Word 1"] pub mod id1_cmb12; -#[doc = "CNSTAT_CMB13 register accessor: an alias for `Reg`"] -pub type CNSTAT_CMB13 = crate::Reg; +#[doc = "CNSTAT_CMB13 (rw) register accessor: Buffer Status / Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cnstat_cmb13::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cnstat_cmb13::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnstat_cmb13`] +module"] +#[doc(alias = "CNSTAT_CMB13")] +pub type CnstatCmb13 = crate::Reg; #[doc = "Buffer Status / Control Register"] pub mod cnstat_cmb13; -#[doc = "TSTP_CMB13 register accessor: an alias for `Reg`"] -pub type TSTP_CMB13 = crate::Reg; +#[doc = "TSTP_CMB13 (rw) register accessor: CAN Frame Timestamp\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tstp_cmb13::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tstp_cmb13::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstp_cmb13`] +module"] +#[doc(alias = "TSTP_CMB13")] +pub type TstpCmb13 = crate::Reg; #[doc = "CAN Frame Timestamp"] pub mod tstp_cmb13; -#[doc = "DATA3_CMB13 register accessor: an alias for `Reg`"] -pub type DATA3_CMB13 = crate::Reg; +#[doc = "DATA3_CMB13 (rw) register accessor: CAN Frame Data Word 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data3_cmb13::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data3_cmb13::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data3_cmb13`] +module"] +#[doc(alias = "DATA3_CMB13")] +pub type Data3Cmb13 = crate::Reg; #[doc = "CAN Frame Data Word 3"] pub mod data3_cmb13; -#[doc = "DATA2_CMB13 register accessor: an alias for `Reg`"] -pub type DATA2_CMB13 = crate::Reg; +#[doc = "DATA2_CMB13 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data2_cmb13::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data2_cmb13::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data2_cmb13`] +module"] +#[doc(alias = "DATA2_CMB13")] +pub type Data2Cmb13 = crate::Reg; #[doc = "CAN Frame Data Word 2"] pub mod data2_cmb13; -#[doc = "DATA1_CMB13 register accessor: an alias for `Reg`"] -pub type DATA1_CMB13 = crate::Reg; +#[doc = "DATA1_CMB13 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data1_cmb13::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data1_cmb13::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data1_cmb13`] +module"] +#[doc(alias = "DATA1_CMB13")] +pub type Data1Cmb13 = crate::Reg; #[doc = "CAN Frame Data Word 2"] pub mod data1_cmb13; -#[doc = "DATA0_CMB13 register accessor: an alias for `Reg`"] -pub type DATA0_CMB13 = crate::Reg; +#[doc = "DATA0_CMB13 (rw) register accessor: CAN Frame Data Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data0_cmb13::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data0_cmb13::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data0_cmb13`] +module"] +#[doc(alias = "DATA0_CMB13")] +pub type Data0Cmb13 = crate::Reg; #[doc = "CAN Frame Data Word 0"] pub mod data0_cmb13; -#[doc = "ID0_CMB13 register accessor: an alias for `Reg`"] -pub type ID0_CMB13 = crate::Reg; +#[doc = "ID0_CMB13 (rw) register accessor: CAN Frame Identifier Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id0_cmb13::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id0_cmb13::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id0_cmb13`] +module"] +#[doc(alias = "ID0_CMB13")] +pub type Id0Cmb13 = crate::Reg; #[doc = "CAN Frame Identifier Word 0"] pub mod id0_cmb13; -#[doc = "ID1_CMB13 register accessor: an alias for `Reg`"] -pub type ID1_CMB13 = crate::Reg; +#[doc = "ID1_CMB13 (rw) register accessor: CAN Frame Identifier Word 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id1_cmb13::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id1_cmb13::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id1_cmb13`] +module"] +#[doc(alias = "ID1_CMB13")] +pub type Id1Cmb13 = crate::Reg; #[doc = "CAN Frame Identifier Word 1"] pub mod id1_cmb13; -#[doc = "CNSTAT_CMB14 register accessor: an alias for `Reg`"] -pub type CNSTAT_CMB14 = crate::Reg; +#[doc = "CNSTAT_CMB14 (rw) register accessor: Buffer Status / Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cnstat_cmb14::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cnstat_cmb14::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnstat_cmb14`] +module"] +#[doc(alias = "CNSTAT_CMB14")] +pub type CnstatCmb14 = crate::Reg; #[doc = "Buffer Status / Control Register"] pub mod cnstat_cmb14; -#[doc = "TSTP_CMB14 register accessor: an alias for `Reg`"] -pub type TSTP_CMB14 = crate::Reg; +#[doc = "TSTP_CMB14 (rw) register accessor: CAN Frame Timestamp\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tstp_cmb14::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tstp_cmb14::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstp_cmb14`] +module"] +#[doc(alias = "TSTP_CMB14")] +pub type TstpCmb14 = crate::Reg; #[doc = "CAN Frame Timestamp"] pub mod tstp_cmb14; -#[doc = "DATA3_CMB14 register accessor: an alias for `Reg`"] -pub type DATA3_CMB14 = crate::Reg; +#[doc = "DATA3_CMB14 (rw) register accessor: CAN Frame Data Word 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data3_cmb14::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data3_cmb14::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data3_cmb14`] +module"] +#[doc(alias = "DATA3_CMB14")] +pub type Data3Cmb14 = crate::Reg; #[doc = "CAN Frame Data Word 3"] pub mod data3_cmb14; -#[doc = "DATA2_CMB14 register accessor: an alias for `Reg`"] -pub type DATA2_CMB14 = crate::Reg; +#[doc = "DATA2_CMB14 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data2_cmb14::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data2_cmb14::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data2_cmb14`] +module"] +#[doc(alias = "DATA2_CMB14")] +pub type Data2Cmb14 = crate::Reg; #[doc = "CAN Frame Data Word 2"] pub mod data2_cmb14; -#[doc = "DATA1_CMB14 register accessor: an alias for `Reg`"] -pub type DATA1_CMB14 = crate::Reg; +#[doc = "DATA1_CMB14 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data1_cmb14::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data1_cmb14::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data1_cmb14`] +module"] +#[doc(alias = "DATA1_CMB14")] +pub type Data1Cmb14 = crate::Reg; #[doc = "CAN Frame Data Word 2"] pub mod data1_cmb14; -#[doc = "DATA0_CMB14 register accessor: an alias for `Reg`"] -pub type DATA0_CMB14 = crate::Reg; +#[doc = "DATA0_CMB14 (rw) register accessor: CAN Frame Data Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data0_cmb14::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data0_cmb14::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data0_cmb14`] +module"] +#[doc(alias = "DATA0_CMB14")] +pub type Data0Cmb14 = crate::Reg; #[doc = "CAN Frame Data Word 0"] pub mod data0_cmb14; -#[doc = "ID0_CMB14 register accessor: an alias for `Reg`"] -pub type ID0_CMB14 = crate::Reg; +#[doc = "ID0_CMB14 (rw) register accessor: CAN Frame Identifier Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id0_cmb14::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id0_cmb14::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id0_cmb14`] +module"] +#[doc(alias = "ID0_CMB14")] +pub type Id0Cmb14 = crate::Reg; #[doc = "CAN Frame Identifier Word 0"] pub mod id0_cmb14; -#[doc = "ID1_CMB14 register accessor: an alias for `Reg`"] -pub type ID1_CMB14 = crate::Reg; +#[doc = "ID1_CMB14 (rw) register accessor: CAN Frame Identifier Word 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id1_cmb14::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id1_cmb14::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id1_cmb14`] +module"] +#[doc(alias = "ID1_CMB14")] +pub type Id1Cmb14 = crate::Reg; #[doc = "CAN Frame Identifier Word 1"] pub mod id1_cmb14; -#[doc = "CNSTAT_HCMB register accessor: an alias for `Reg`"] -pub type CNSTAT_HCMB = crate::Reg; +#[doc = "CNSTAT_HCMB (rw) register accessor: Buffer Status / Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cnstat_hcmb::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cnstat_hcmb::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnstat_hcmb`] +module"] +#[doc(alias = "CNSTAT_HCMB")] +pub type CnstatHcmb = crate::Reg; #[doc = "Buffer Status / Control Register"] pub mod cnstat_hcmb; -#[doc = "TSTP_HCMB register accessor: an alias for `Reg`"] -pub type TSTP_HCMB = crate::Reg; +#[doc = "TSTP_HCMB (rw) register accessor: CAN Frame Timestamp\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tstp_hcmb::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tstp_hcmb::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstp_hcmb`] +module"] +#[doc(alias = "TSTP_HCMB")] +pub type TstpHcmb = crate::Reg; #[doc = "CAN Frame Timestamp"] pub mod tstp_hcmb; -#[doc = "DATA3_HCMB register accessor: an alias for `Reg`"] -pub type DATA3_HCMB = crate::Reg; +#[doc = "DATA3_HCMB (rw) register accessor: CAN Frame Data Word 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data3_hcmb::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data3_hcmb::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data3_hcmb`] +module"] +#[doc(alias = "DATA3_HCMB")] +pub type Data3Hcmb = crate::Reg; #[doc = "CAN Frame Data Word 3"] pub mod data3_hcmb; -#[doc = "DATA2_HCMB register accessor: an alias for `Reg`"] -pub type DATA2_HCMB = crate::Reg; +#[doc = "DATA2_HCMB (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data2_hcmb::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data2_hcmb::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data2_hcmb`] +module"] +#[doc(alias = "DATA2_HCMB")] +pub type Data2Hcmb = crate::Reg; #[doc = "CAN Frame Data Word 2"] pub mod data2_hcmb; -#[doc = "DATA1_HCMB register accessor: an alias for `Reg`"] -pub type DATA1_HCMB = crate::Reg; +#[doc = "DATA1_HCMB (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data1_hcmb::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data1_hcmb::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data1_hcmb`] +module"] +#[doc(alias = "DATA1_HCMB")] +pub type Data1Hcmb = crate::Reg; #[doc = "CAN Frame Data Word 2"] pub mod data1_hcmb; -#[doc = "DATA0_HCMB register accessor: an alias for `Reg`"] -pub type DATA0_HCMB = crate::Reg; +#[doc = "DATA0_HCMB (rw) register accessor: CAN Frame Data Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data0_hcmb::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data0_hcmb::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data0_hcmb`] +module"] +#[doc(alias = "DATA0_HCMB")] +pub type Data0Hcmb = crate::Reg; #[doc = "CAN Frame Data Word 0"] pub mod data0_hcmb; -#[doc = "ID0_HCMB register accessor: an alias for `Reg`"] -pub type ID0_HCMB = crate::Reg; +#[doc = "ID0_HCMB (rw) register accessor: CAN Frame Identifier Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id0_hcmb::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id0_hcmb::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id0_hcmb`] +module"] +#[doc(alias = "ID0_HCMB")] +pub type Id0Hcmb = crate::Reg; #[doc = "CAN Frame Identifier Word 0"] pub mod id0_hcmb; -#[doc = "ID1_HCMB register accessor: an alias for `Reg`"] -pub type ID1_HCMB = crate::Reg; +#[doc = "ID1_HCMB (rw) register accessor: CAN Frame Identifier Word 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id1_hcmb::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id1_hcmb::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id1_hcmb`] +module"] +#[doc(alias = "ID1_HCMB")] +pub type Id1Hcmb = crate::Reg; #[doc = "CAN Frame Identifier Word 1"] pub mod id1_hcmb; -#[doc = "CGCR register accessor: an alias for `Reg`"] -pub type CGCR = crate::Reg; +#[doc = "CGCR (rw) register accessor: CAN Global Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cgcr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cgcr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cgcr`] +module"] +#[doc(alias = "CGCR")] +pub type Cgcr = crate::Reg; #[doc = "CAN Global Configuration Register"] pub mod cgcr; -#[doc = "CTIM register accessor: an alias for `Reg`"] -pub type CTIM = crate::Reg; +#[doc = "CTIM (rw) register accessor: CAN Timing Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctim::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctim::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctim`] +module"] +#[doc(alias = "CTIM")] +pub type Ctim = crate::Reg; #[doc = "CAN Timing Register"] pub mod ctim; -#[doc = "GMSKX register accessor: an alias for `Reg`"] -pub type GMSKX = crate::Reg; +#[doc = "GMSKX (rw) register accessor: CAN Global Mask Extension\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gmskx::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gmskx::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gmskx`] +module"] +#[doc(alias = "GMSKX")] +pub type Gmskx = crate::Reg; #[doc = "CAN Global Mask Extension"] pub mod gmskx; -#[doc = "GMSKB register accessor: an alias for `Reg`"] -pub type GMSKB = crate::Reg; +#[doc = "GMSKB (rw) register accessor: CAN Global Mask Base\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gmskb::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gmskb::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gmskb`] +module"] +#[doc(alias = "GMSKB")] +pub type Gmskb = crate::Reg; #[doc = "CAN Global Mask Base"] pub mod gmskb; -#[doc = "BMSKX register accessor: an alias for `Reg`"] -pub type BMSKX = crate::Reg; +#[doc = "BMSKX (rw) register accessor: CAN Basic Mask Extension\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`bmskx::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`bmskx::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bmskx`] +module"] +#[doc(alias = "BMSKX")] +pub type Bmskx = crate::Reg; #[doc = "CAN Basic Mask Extension"] pub mod bmskx; -#[doc = "BMSKB register accessor: an alias for `Reg`"] -pub type BMSKB = crate::Reg; +#[doc = "BMSKB (rw) register accessor: CAN Basic Mask Base\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`bmskb::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`bmskb::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bmskb`] +module"] +#[doc(alias = "BMSKB")] +pub type Bmskb = crate::Reg; #[doc = "CAN Basic Mask Base"] pub mod bmskb; -#[doc = "CIEN register accessor: an alias for `Reg`"] -pub type CIEN = crate::Reg; +#[doc = "CIEN (rw) register accessor: CAN Interrupt Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cien::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cien::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cien`] +module"] +#[doc(alias = "CIEN")] +pub type Cien = crate::Reg; #[doc = "CAN Interrupt Enable Register"] pub mod cien; -#[doc = "CIPND register accessor: an alias for `Reg`"] -pub type CIPND = crate::Reg; +#[doc = "CIPND (rw) register accessor: CAN Interrupt Pending Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cipnd::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cipnd::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cipnd`] +module"] +#[doc(alias = "CIPND")] +pub type Cipnd = crate::Reg; #[doc = "CAN Interrupt Pending Register"] pub mod cipnd; -#[doc = "CICLR register accessor: an alias for `Reg`"] -pub type CICLR = crate::Reg; +#[doc = "CICLR (rw) register accessor: CAN Interrupt Clear Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ciclr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ciclr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ciclr`] +module"] +#[doc(alias = "CICLR")] +pub type Ciclr = crate::Reg; #[doc = "CAN Interrupt Clear Register"] pub mod ciclr; -#[doc = "CICEN register accessor: an alias for `Reg`"] -pub type CICEN = crate::Reg; +#[doc = "CICEN (rw) register accessor: CAN Interrupt Code Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cicen::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cicen::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cicen`] +module"] +#[doc(alias = "CICEN")] +pub type Cicen = crate::Reg; #[doc = "CAN Interrupt Code Enable Register"] pub mod cicen; -#[doc = "CSTPND register accessor: an alias for `Reg`"] -pub type CSTPND = crate::Reg; +#[doc = "CSTPND (rw) register accessor: CAN Status Pending Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cstpnd::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cstpnd::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cstpnd`] +module"] +#[doc(alias = "CSTPND")] +pub type Cstpnd = crate::Reg; #[doc = "CAN Status Pending Register"] pub mod cstpnd; -#[doc = "CANEC register accessor: an alias for `Reg`"] -pub type CANEC = crate::Reg; +#[doc = "CANEC (rw) register accessor: CAN Error Counter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`canec::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`canec::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@canec`] +module"] +#[doc(alias = "CANEC")] +pub type Canec = crate::Reg; #[doc = "CAN Error Counter Register"] pub mod canec; -#[doc = "CEDIAG register accessor: an alias for `Reg`"] -pub type CEDIAG = crate::Reg; +#[doc = "CEDIAG (rw) register accessor: CAN Error Diagnostic Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cediag::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cediag::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cediag`] +module"] +#[doc(alias = "CEDIAG")] +pub type Cediag = crate::Reg; #[doc = "CAN Error Diagnostic Register"] pub mod cediag; -#[doc = "CTMR register accessor: an alias for `Reg`"] -pub type CTMR = crate::Reg; +#[doc = "CTMR (rw) register accessor: CAN Timer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctmr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctmr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctmr`] +module"] +#[doc(alias = "CTMR")] +pub type Ctmr = crate::Reg; #[doc = "CAN Timer Register"] pub mod ctmr; diff --git a/va416xx/src/can0/bmskb.rs b/va416xx/src/can0/bmskb.rs index 031a25b..833f22b 100644 --- a/va416xx/src/can0/bmskb.rs +++ b/va416xx/src/can0/bmskb.rs @@ -1,254 +1,105 @@ #[doc = "Register `BMSKB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `BMSKB` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; +#[doc = "Field `BM0` reader - BM\\[17:15\\] +- Unused in standard, ID\\[17:15\\] +in extended"] +pub type Bm0R = crate::FieldReader; +#[doc = "Field `BM0` writer - BM\\[17:15\\] +- Unused in standard, ID\\[17:15\\] +in extended"] +pub type Bm0W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +#[doc = "Field `IDE` reader - Identifier Extension Bit"] +pub type IdeR = crate::BitReader; +#[doc = "Field `IDE` writer - Identifier Extension Bit"] +pub type IdeW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `RTR` reader - Remote Transmission Request in Standard, Substitute Remote Request (SRR) in extended"] +pub type RtrR = crate::BitReader; +#[doc = "Field `RTR` writer - Remote Transmission Request in Standard, Substitute Remote Request (SRR) in extended"] +pub type RtrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BM1` reader - BM\\[28:18\\] - ID\\[10:0\\] in standard, ID\\[28:18\\] in extended"] -pub struct BM1_R(crate::FieldReader); -impl BM1_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - BM1_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BM1_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Bm1R = crate::FieldReader; #[doc = "Field `BM1` writer - BM\\[28:18\\] - ID\\[10:0\\] in standard, ID\\[28:18\\] in extended"] -pub struct BM1_W<'a> { - w: &'a mut W, -} -impl<'a> BM1_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x07ff << 5)) | ((value as u32 & 0x07ff) << 5); - self.w - } -} -#[doc = "Field `RTR` reader - Remote Transmission Request in Standard, Substitute Remote Request (SRR) in extended"] -pub struct RTR_R(crate::FieldReader); -impl RTR_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RTR_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RTR_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RTR` writer - Remote Transmission Request in Standard, Substitute Remote Request (SRR) in extended"] -pub struct RTR_W<'a> { - w: &'a mut W, -} -impl<'a> RTR_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); - self.w - } -} -#[doc = "Field `IDE` reader - Identifier Extension Bit"] -pub struct IDE_R(crate::FieldReader); -impl IDE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - IDE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for IDE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `IDE` writer - Identifier Extension Bit"] -pub struct IDE_W<'a> { - w: &'a mut W, -} -impl<'a> IDE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); - self.w - } -} -#[doc = "Field `BM0` reader - BM\\[17:15\\] -- Unused in standard, ID\\[17:15\\] -in extended"] -pub struct BM0_R(crate::FieldReader); -impl BM0_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BM0_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BM0_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `BM0` writer - BM\\[17:15\\] -- Unused in standard, ID\\[17:15\\] -in extended"] -pub struct BM0_W<'a> { - w: &'a mut W, -} -impl<'a> BM0_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0x07) | (value as u32 & 0x07); - self.w - } -} +pub type Bm1W<'a, REG> = crate::FieldWriter<'a, REG, 11, u16>; impl R { + #[doc = "Bits 0:2 - BM\\[17:15\\] +- Unused in standard, ID\\[17:15\\] +in extended"] + #[inline(always)] + pub fn bm0(&self) -> Bm0R { + Bm0R::new((self.bits & 7) as u8) + } + #[doc = "Bit 3 - Identifier Extension Bit"] + #[inline(always)] + pub fn ide(&self) -> IdeR { + IdeR::new(((self.bits >> 3) & 1) != 0) + } + #[doc = "Bit 4 - Remote Transmission Request in Standard, Substitute Remote Request (SRR) in extended"] + #[inline(always)] + pub fn rtr(&self) -> RtrR { + RtrR::new(((self.bits >> 4) & 1) != 0) + } #[doc = "Bits 5:15 - BM\\[28:18\\] - ID\\[10:0\\] in standard, ID\\[28:18\\] in extended"] #[inline(always)] - pub fn bm1(&self) -> BM1_R { - BM1_R::new(((self.bits >> 5) & 0x07ff) as u16) - } - #[doc = "Bit 4 - Remote Transmission Request in Standard, Substitute Remote Request (SRR) in extended"] - #[inline(always)] - pub fn rtr(&self) -> RTR_R { - RTR_R::new(((self.bits >> 4) & 0x01) != 0) - } - #[doc = "Bit 3 - Identifier Extension Bit"] - #[inline(always)] - pub fn ide(&self) -> IDE_R { - IDE_R::new(((self.bits >> 3) & 0x01) != 0) - } - #[doc = "Bits 0:2 - BM\\[17:15\\] -- Unused in standard, ID\\[17:15\\] -in extended"] - #[inline(always)] - pub fn bm0(&self) -> BM0_R { - BM0_R::new((self.bits & 0x07) as u8) + pub fn bm1(&self) -> Bm1R { + Bm1R::new(((self.bits >> 5) & 0x07ff) as u16) } } impl W { + #[doc = "Bits 0:2 - BM\\[17:15\\] +- Unused in standard, ID\\[17:15\\] +in extended"] + #[inline(always)] + #[must_use] + pub fn bm0(&mut self) -> Bm0W { + Bm0W::new(self, 0) + } + #[doc = "Bit 3 - Identifier Extension Bit"] + #[inline(always)] + #[must_use] + pub fn ide(&mut self) -> IdeW { + IdeW::new(self, 3) + } + #[doc = "Bit 4 - Remote Transmission Request in Standard, Substitute Remote Request (SRR) in extended"] + #[inline(always)] + #[must_use] + pub fn rtr(&mut self) -> RtrW { + RtrW::new(self, 4) + } #[doc = "Bits 5:15 - BM\\[28:18\\] - ID\\[10:0\\] in standard, ID\\[28:18\\] in extended"] #[inline(always)] - pub fn bm1(&mut self) -> BM1_W { - BM1_W { w: self } - } - #[doc = "Bit 4 - Remote Transmission Request in Standard, Substitute Remote Request (SRR) in extended"] - #[inline(always)] - pub fn rtr(&mut self) -> RTR_W { - RTR_W { w: self } - } - #[doc = "Bit 3 - Identifier Extension Bit"] - #[inline(always)] - pub fn ide(&mut self) -> IDE_W { - IDE_W { w: self } - } - #[doc = "Bits 0:2 - BM\\[17:15\\] -- Unused in standard, ID\\[17:15\\] -in extended"] - #[inline(always)] - pub fn bm0(&mut self) -> BM0_W { - BM0_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn bm1(&mut self) -> Bm1W { + Bm1W::new(self, 5) } } -#[doc = "CAN Basic Mask Base\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [bmskb](index.html) module"] -pub struct BMSKB_SPEC; -impl crate::RegisterSpec for BMSKB_SPEC { +#[doc = "CAN Basic Mask Base\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`bmskb::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`bmskb::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct BmskbSpec; +impl crate::RegisterSpec for BmskbSpec { type Ux = u32; } -#[doc = "`read()` method returns [bmskb::R](R) reader structure"] -impl crate::Readable for BMSKB_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [bmskb::W](W) writer structure"] -impl crate::Writable for BMSKB_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`bmskb::R`](R) reader structure"] +impl crate::Readable for BmskbSpec {} +#[doc = "`write(|w| ..)` method takes [`bmskb::W`](W) writer structure"] +impl crate::Writable for BmskbSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets BMSKB to value 0"] -impl crate::Resettable for BMSKB_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for BmskbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/bmskx.rs b/va416xx/src/can0/bmskx.rs index ab598c3..4f42df8 100644 --- a/va416xx/src/can0/bmskx.rs +++ b/va416xx/src/can0/bmskx.rs @@ -1,158 +1,63 @@ #[doc = "Register `BMSKX` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `BMSKX` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; +#[doc = "Field `XRTR` reader - Extended Remote transmission Request Bit"] +pub type XrtrR = crate::BitReader; +#[doc = "Field `XRTR` writer - Extended Remote transmission Request Bit"] +pub type XrtrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BM` reader - BM\\[14:0\\] used when an extended frame is received. ID\\[14:0\\] in extended, unused standard"] -pub struct BM_R(crate::FieldReader); -impl BM_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - BM_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BM_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type BmR = crate::FieldReader; #[doc = "Field `BM` writer - BM\\[14:0\\] used when an extended frame is received. ID\\[14:0\\] in extended, unused standard"] -pub struct BM_W<'a> { - w: &'a mut W, -} -impl<'a> BM_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x7fff << 1)) | ((value as u32 & 0x7fff) << 1); - self.w - } -} -#[doc = "Field `XRTR` reader - Extended Remote transmission Request Bit"] -pub struct XRTR_R(crate::FieldReader); -impl XRTR_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - XRTR_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for XRTR_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `XRTR` writer - Extended Remote transmission Request Bit"] -pub struct XRTR_W<'a> { - w: &'a mut W, -} -impl<'a> XRTR_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} +pub type BmW<'a, REG> = crate::FieldWriter<'a, REG, 15, u16>; impl R { + #[doc = "Bit 0 - Extended Remote transmission Request Bit"] + #[inline(always)] + pub fn xrtr(&self) -> XrtrR { + XrtrR::new((self.bits & 1) != 0) + } #[doc = "Bits 1:15 - BM\\[14:0\\] used when an extended frame is received. ID\\[14:0\\] in extended, unused standard"] #[inline(always)] - pub fn bm(&self) -> BM_R { - BM_R::new(((self.bits >> 1) & 0x7fff) as u16) - } - #[doc = "Bit 0 - Extended Remote transmission Request Bit"] - #[inline(always)] - pub fn xrtr(&self) -> XRTR_R { - XRTR_R::new((self.bits & 0x01) != 0) + pub fn bm(&self) -> BmR { + BmR::new(((self.bits >> 1) & 0x7fff) as u16) } } impl W { + #[doc = "Bit 0 - Extended Remote transmission Request Bit"] + #[inline(always)] + #[must_use] + pub fn xrtr(&mut self) -> XrtrW { + XrtrW::new(self, 0) + } #[doc = "Bits 1:15 - BM\\[14:0\\] used when an extended frame is received. ID\\[14:0\\] in extended, unused standard"] #[inline(always)] - pub fn bm(&mut self) -> BM_W { - BM_W { w: self } - } - #[doc = "Bit 0 - Extended Remote transmission Request Bit"] - #[inline(always)] - pub fn xrtr(&mut self) -> XRTR_W { - XRTR_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn bm(&mut self) -> BmW { + BmW::new(self, 1) } } -#[doc = "CAN Basic Mask Extension\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [bmskx](index.html) module"] -pub struct BMSKX_SPEC; -impl crate::RegisterSpec for BMSKX_SPEC { +#[doc = "CAN Basic Mask Extension\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`bmskx::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`bmskx::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct BmskxSpec; +impl crate::RegisterSpec for BmskxSpec { type Ux = u32; } -#[doc = "`read()` method returns [bmskx::R](R) reader structure"] -impl crate::Readable for BMSKX_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [bmskx::W](W) writer structure"] -impl crate::Writable for BMSKX_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`bmskx::R`](R) reader structure"] +impl crate::Readable for BmskxSpec {} +#[doc = "`write(|w| ..)` method takes [`bmskx::W`](W) writer structure"] +impl crate::Writable for BmskxSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets BMSKX to value 0"] -impl crate::Resettable for BMSKX_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for BmskxSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/canec.rs b/va416xx/src/can0/canec.rs index 5101844..4f945fa 100644 --- a/va416xx/src/can0/canec.rs +++ b/va416xx/src/can0/canec.rs @@ -1,140 +1,55 @@ #[doc = "Register `CANEC` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CANEC` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `REC` reader - Receive Error Counter"] -pub struct REC_R(crate::FieldReader); -impl REC_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - REC_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for REC_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `REC` writer - Receive Error Counter"] -pub struct REC_W<'a> { - w: &'a mut W, -} -impl<'a> REC_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0xff << 8)) | ((value as u32 & 0xff) << 8); - self.w - } -} +pub type W = crate::W; #[doc = "Field `TEC` reader - Transmit Error Counter"] -pub struct TEC_R(crate::FieldReader); -impl TEC_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - TEC_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TEC_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type TecR = crate::FieldReader; #[doc = "Field `TEC` writer - Transmit Error Counter"] -pub struct TEC_W<'a> { - w: &'a mut W, -} -impl<'a> TEC_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type TecW<'a, REG> = crate::FieldWriter<'a, REG, 8>; +#[doc = "Field `REC` reader - Receive Error Counter"] +pub type RecR = crate::FieldReader; +#[doc = "Field `REC` writer - Receive Error Counter"] +pub type RecW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { - #[doc = "Bits 8:15 - Receive Error Counter"] - #[inline(always)] - pub fn rec(&self) -> REC_R { - REC_R::new(((self.bits >> 8) & 0xff) as u8) - } #[doc = "Bits 0:7 - Transmit Error Counter"] #[inline(always)] - pub fn tec(&self) -> TEC_R { - TEC_R::new((self.bits & 0xff) as u8) + pub fn tec(&self) -> TecR { + TecR::new((self.bits & 0xff) as u8) + } + #[doc = "Bits 8:15 - Receive Error Counter"] + #[inline(always)] + pub fn rec(&self) -> RecR { + RecR::new(((self.bits >> 8) & 0xff) as u8) } } impl W { - #[doc = "Bits 8:15 - Receive Error Counter"] - #[inline(always)] - pub fn rec(&mut self) -> REC_W { - REC_W { w: self } - } #[doc = "Bits 0:7 - Transmit Error Counter"] #[inline(always)] - pub fn tec(&mut self) -> TEC_W { - TEC_W { w: self } + #[must_use] + pub fn tec(&mut self) -> TecW { + TecW::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 8:15 - Receive Error Counter"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn rec(&mut self) -> RecW { + RecW::new(self, 8) } } -#[doc = "CAN Error Counter Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [canec](index.html) module"] -pub struct CANEC_SPEC; -impl crate::RegisterSpec for CANEC_SPEC { +#[doc = "CAN Error Counter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`canec::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`canec::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CanecSpec; +impl crate::RegisterSpec for CanecSpec { type Ux = u32; } -#[doc = "`read()` method returns [canec::R](R) reader structure"] -impl crate::Readable for CANEC_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [canec::W](W) writer structure"] -impl crate::Writable for CANEC_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`canec::R`](R) reader structure"] +impl crate::Readable for CanecSpec {} +#[doc = "`write(|w| ..)` method takes [`canec::W`](W) writer structure"] +impl crate::Writable for CanecSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CANEC to value 0"] -impl crate::Resettable for CANEC_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for CanecSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/cediag.rs b/va416xx/src/can0/cediag.rs index 58b275a..b19a68f 100644 --- a/va416xx/src/can0/cediag.rs +++ b/va416xx/src/can0/cediag.rs @@ -1,375 +1,130 @@ #[doc = "Register `CEDIAG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CEDIAG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `DRIVE` reader - Drive"] -pub struct DRIVE_R(crate::FieldReader); -impl DRIVE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - DRIVE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for DRIVE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `DRIVE` writer - Drive"] -pub struct DRIVE_W<'a> { - w: &'a mut W, -} -impl<'a> DRIVE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); - self.w - } -} -#[doc = "Field `MON` reader - Monitor"] -pub struct MON_R(crate::FieldReader); -impl MON_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - MON_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for MON_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `MON` writer - Monitor"] -pub struct MON_W<'a> { - w: &'a mut W, -} -impl<'a> MON_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); - self.w - } -} -#[doc = "Field `CRC` reader - CRC"] -pub struct CRC_R(crate::FieldReader); -impl CRC_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CRC_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CRC_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CRC` writer - CRC"] -pub struct CRC_W<'a> { - w: &'a mut W, -} -impl<'a> CRC_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); - self.w - } -} -#[doc = "Field `STUFF` reader - Stuff Error"] -pub struct STUFF_R(crate::FieldReader); -impl STUFF_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - STUFF_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for STUFF_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `STUFF` writer - Stuff Error"] -pub struct STUFF_W<'a> { - w: &'a mut W, -} -impl<'a> STUFF_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); - self.w - } -} -#[doc = "Field `TXE` reader - Transmit Error"] -pub struct TXE_R(crate::FieldReader); -impl TXE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TXE` writer - Transmit Error"] -pub struct TXE_W<'a> { - w: &'a mut W, -} -impl<'a> TXE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); - self.w - } -} -#[doc = "Field `EBID` reader - Error Bit Identifier"] -pub struct EBID_R(crate::FieldReader); -impl EBID_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - EBID_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for EBID_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `EBID` writer - Error Bit Identifier"] -pub struct EBID_W<'a> { - w: &'a mut W, -} -impl<'a> EBID_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x3f << 4)) | ((value as u32 & 0x3f) << 4); - self.w - } -} +pub type W = crate::W; #[doc = "Field `EFID` reader - Error Field Identifier"] -pub struct EFID_R(crate::FieldReader); -impl EFID_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - EFID_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for EFID_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type EfidR = crate::FieldReader; #[doc = "Field `EFID` writer - Error Field Identifier"] -pub struct EFID_W<'a> { - w: &'a mut W, -} -impl<'a> EFID_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0x0f) | (value as u32 & 0x0f); - self.w - } -} +pub type EfidW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +#[doc = "Field `EBID` reader - Error Bit Identifier"] +pub type EbidR = crate::FieldReader; +#[doc = "Field `EBID` writer - Error Bit Identifier"] +pub type EbidW<'a, REG> = crate::FieldWriter<'a, REG, 6>; +#[doc = "Field `TXE` reader - Transmit Error"] +pub type TxeR = crate::BitReader; +#[doc = "Field `TXE` writer - Transmit Error"] +pub type TxeW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `STUFF` reader - Stuff Error"] +pub type StuffR = crate::BitReader; +#[doc = "Field `STUFF` writer - Stuff Error"] +pub type StuffW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `CRC` reader - CRC"] +pub type CrcR = crate::BitReader; +#[doc = "Field `CRC` writer - CRC"] +pub type CrcW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `MON` reader - Monitor"] +pub type MonR = crate::BitReader; +#[doc = "Field `MON` writer - Monitor"] +pub type MonW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `DRIVE` reader - Drive"] +pub type DriveR = crate::BitReader; +#[doc = "Field `DRIVE` writer - Drive"] +pub type DriveW<'a, REG> = crate::BitWriter<'a, REG>; impl R { - #[doc = "Bit 14 - Drive"] + #[doc = "Bits 0:3 - Error Field Identifier"] #[inline(always)] - pub fn drive(&self) -> DRIVE_R { - DRIVE_R::new(((self.bits >> 14) & 0x01) != 0) - } - #[doc = "Bit 13 - Monitor"] - #[inline(always)] - pub fn mon(&self) -> MON_R { - MON_R::new(((self.bits >> 13) & 0x01) != 0) - } - #[doc = "Bit 12 - CRC"] - #[inline(always)] - pub fn crc(&self) -> CRC_R { - CRC_R::new(((self.bits >> 12) & 0x01) != 0) - } - #[doc = "Bit 11 - Stuff Error"] - #[inline(always)] - pub fn stuff(&self) -> STUFF_R { - STUFF_R::new(((self.bits >> 11) & 0x01) != 0) - } - #[doc = "Bit 10 - Transmit Error"] - #[inline(always)] - pub fn txe(&self) -> TXE_R { - TXE_R::new(((self.bits >> 10) & 0x01) != 0) + pub fn efid(&self) -> EfidR { + EfidR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:9 - Error Bit Identifier"] #[inline(always)] - pub fn ebid(&self) -> EBID_R { - EBID_R::new(((self.bits >> 4) & 0x3f) as u8) + pub fn ebid(&self) -> EbidR { + EbidR::new(((self.bits >> 4) & 0x3f) as u8) } - #[doc = "Bits 0:3 - Error Field Identifier"] + #[doc = "Bit 10 - Transmit Error"] #[inline(always)] - pub fn efid(&self) -> EFID_R { - EFID_R::new((self.bits & 0x0f) as u8) + pub fn txe(&self) -> TxeR { + TxeR::new(((self.bits >> 10) & 1) != 0) + } + #[doc = "Bit 11 - Stuff Error"] + #[inline(always)] + pub fn stuff(&self) -> StuffR { + StuffR::new(((self.bits >> 11) & 1) != 0) + } + #[doc = "Bit 12 - CRC"] + #[inline(always)] + pub fn crc(&self) -> CrcR { + CrcR::new(((self.bits >> 12) & 1) != 0) + } + #[doc = "Bit 13 - Monitor"] + #[inline(always)] + pub fn mon(&self) -> MonR { + MonR::new(((self.bits >> 13) & 1) != 0) + } + #[doc = "Bit 14 - Drive"] + #[inline(always)] + pub fn drive(&self) -> DriveR { + DriveR::new(((self.bits >> 14) & 1) != 0) } } impl W { - #[doc = "Bit 14 - Drive"] + #[doc = "Bits 0:3 - Error Field Identifier"] #[inline(always)] - pub fn drive(&mut self) -> DRIVE_W { - DRIVE_W { w: self } - } - #[doc = "Bit 13 - Monitor"] - #[inline(always)] - pub fn mon(&mut self) -> MON_W { - MON_W { w: self } - } - #[doc = "Bit 12 - CRC"] - #[inline(always)] - pub fn crc(&mut self) -> CRC_W { - CRC_W { w: self } - } - #[doc = "Bit 11 - Stuff Error"] - #[inline(always)] - pub fn stuff(&mut self) -> STUFF_W { - STUFF_W { w: self } - } - #[doc = "Bit 10 - Transmit Error"] - #[inline(always)] - pub fn txe(&mut self) -> TXE_W { - TXE_W { w: self } + #[must_use] + pub fn efid(&mut self) -> EfidW { + EfidW::new(self, 0) } #[doc = "Bits 4:9 - Error Bit Identifier"] #[inline(always)] - pub fn ebid(&mut self) -> EBID_W { - EBID_W { w: self } + #[must_use] + pub fn ebid(&mut self) -> EbidW { + EbidW::new(self, 4) } - #[doc = "Bits 0:3 - Error Field Identifier"] + #[doc = "Bit 10 - Transmit Error"] #[inline(always)] - pub fn efid(&mut self) -> EFID_W { - EFID_W { w: self } + #[must_use] + pub fn txe(&mut self) -> TxeW { + TxeW::new(self, 10) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bit 11 - Stuff Error"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn stuff(&mut self) -> StuffW { + StuffW::new(self, 11) + } + #[doc = "Bit 12 - CRC"] + #[inline(always)] + #[must_use] + pub fn crc(&mut self) -> CrcW { + CrcW::new(self, 12) + } + #[doc = "Bit 13 - Monitor"] + #[inline(always)] + #[must_use] + pub fn mon(&mut self) -> MonW { + MonW::new(self, 13) + } + #[doc = "Bit 14 - Drive"] + #[inline(always)] + #[must_use] + pub fn drive(&mut self) -> DriveW { + DriveW::new(self, 14) } } -#[doc = "CAN Error Diagnostic Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cediag](index.html) module"] -pub struct CEDIAG_SPEC; -impl crate::RegisterSpec for CEDIAG_SPEC { +#[doc = "CAN Error Diagnostic Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cediag::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cediag::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CediagSpec; +impl crate::RegisterSpec for CediagSpec { type Ux = u32; } -#[doc = "`read()` method returns [cediag::R](R) reader structure"] -impl crate::Readable for CEDIAG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cediag::W](W) writer structure"] -impl crate::Writable for CEDIAG_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`cediag::R`](R) reader structure"] +impl crate::Readable for CediagSpec {} +#[doc = "`write(|w| ..)` method takes [`cediag::W`](W) writer structure"] +impl crate::Writable for CediagSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CEDIAG to value 0"] -impl crate::Resettable for CEDIAG_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for CediagSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/cgcr.rs b/va416xx/src/can0/cgcr.rs index 8eb20a5..ef91f01 100644 --- a/va416xx/src/can0/cgcr.rs +++ b/va416xx/src/can0/cgcr.rs @@ -1,630 +1,205 @@ #[doc = "Register `CGCR` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CGCR` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `EIT` reader - Error Interrupt Type"] -pub struct EIT_R(crate::FieldReader); -impl EIT_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - EIT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for EIT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `EIT` writer - Error Interrupt Type"] -pub struct EIT_W<'a> { - w: &'a mut W, -} -impl<'a> EIT_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); - self.w - } -} -#[doc = "Field `DIAGEN` reader - Diagnostic Enable"] -pub struct DIAGEN_R(crate::FieldReader); -impl DIAGEN_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - DIAGEN_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for DIAGEN_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `DIAGEN` writer - Diagnostic Enable"] -pub struct DIAGEN_W<'a> { - w: &'a mut W, -} -impl<'a> DIAGEN_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); - self.w - } -} -#[doc = "Field `INTERNAL` reader - Internal"] -pub struct INTERNAL_R(crate::FieldReader); -impl INTERNAL_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - INTERNAL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for INTERNAL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `INTERNAL` writer - Internal"] -pub struct INTERNAL_W<'a> { - w: &'a mut W, -} -impl<'a> INTERNAL_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); - self.w - } -} -#[doc = "Field `LOOPBACK` reader - Loopback"] -pub struct LOOPBACK_R(crate::FieldReader); -impl LOOPBACK_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - LOOPBACK_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for LOOPBACK_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `LOOPBACK` writer - Loopback"] -pub struct LOOPBACK_W<'a> { - w: &'a mut W, -} -impl<'a> LOOPBACK_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); - self.w - } -} -#[doc = "Field `IGNACK` reader - Ignore Acknowledge"] -pub struct IGNACK_R(crate::FieldReader); -impl IGNACK_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - IGNACK_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for IGNACK_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `IGNACK` writer - Ignore Acknowledge"] -pub struct IGNACK_W<'a> { - w: &'a mut W, -} -impl<'a> IGNACK_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); - self.w - } -} -#[doc = "Field `LO` reader - Listen Only"] -pub struct LO_R(crate::FieldReader); -impl LO_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - LO_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for LO_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `LO` writer - Listen Only"] -pub struct LO_W<'a> { - w: &'a mut W, -} -impl<'a> LO_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); - self.w - } -} -#[doc = "Field `DDIR` reader - Data Direction"] -pub struct DDIR_R(crate::FieldReader); -impl DDIR_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - DDIR_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for DDIR_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `DDIR` writer - Data Direction"] -pub struct DDIR_W<'a> { - w: &'a mut W, -} -impl<'a> DDIR_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); - self.w - } -} -#[doc = "Field `TSTPEN` reader - Time Sync Enable"] -pub struct TSTPEN_R(crate::FieldReader); -impl TSTPEN_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TSTPEN_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TSTPEN_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TSTPEN` writer - Time Sync Enable"] -pub struct TSTPEN_W<'a> { - w: &'a mut W, -} -impl<'a> TSTPEN_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); - self.w - } -} -#[doc = "Field `BUFFLOCK` reader - Buffer Lock"] -pub struct BUFFLOCK_R(crate::FieldReader); -impl BUFFLOCK_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - BUFFLOCK_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BUFFLOCK_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `BUFFLOCK` writer - Buffer Lock"] -pub struct BUFFLOCK_W<'a> { - w: &'a mut W, -} -impl<'a> BUFFLOCK_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); - self.w - } -} -#[doc = "Field `CTX` reader - RW,Control Transmit"] -pub struct CTX_R(crate::FieldReader); -impl CTX_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CTX_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CTX_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CTX` writer - RW,Control Transmit"] -pub struct CTX_W<'a> { - w: &'a mut W, -} -impl<'a> CTX_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); - self.w - } -} -#[doc = "Field `CRX` reader - RW,Control Receive"] -pub struct CRX_R(crate::FieldReader); -impl CRX_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CRX_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CRX_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CRX` writer - RW,Control Receive"] -pub struct CRX_W<'a> { - w: &'a mut W, -} -impl<'a> CRX_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); - self.w - } -} +pub type W = crate::W; #[doc = "Field `CANEN` reader - CAN Enable"] -pub struct CANEN_R(crate::FieldReader); -impl CANEN_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CANEN_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CANEN_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type CanenR = crate::BitReader; #[doc = "Field `CANEN` writer - CAN Enable"] -pub struct CANEN_W<'a> { - w: &'a mut W, -} -impl<'a> CANEN_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} +pub type CanenW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `CRX` reader - RW,Control Receive"] +pub type CrxR = crate::BitReader; +#[doc = "Field `CRX` writer - RW,Control Receive"] +pub type CrxW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `CTX` reader - RW,Control Transmit"] +pub type CtxR = crate::BitReader; +#[doc = "Field `CTX` writer - RW,Control Transmit"] +pub type CtxW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `BUFFLOCK` reader - Buffer Lock"] +pub type BufflockR = crate::BitReader; +#[doc = "Field `BUFFLOCK` writer - Buffer Lock"] +pub type BufflockW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TSTPEN` reader - Time Sync Enable"] +pub type TstpenR = crate::BitReader; +#[doc = "Field `TSTPEN` writer - Time Sync Enable"] +pub type TstpenW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `DDIR` reader - Data Direction"] +pub type DdirR = crate::BitReader; +#[doc = "Field `DDIR` writer - Data Direction"] +pub type DdirW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `LO` reader - Listen Only"] +pub type LoR = crate::BitReader; +#[doc = "Field `LO` writer - Listen Only"] +pub type LoW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `IGNACK` reader - Ignore Acknowledge"] +pub type IgnackR = crate::BitReader; +#[doc = "Field `IGNACK` writer - Ignore Acknowledge"] +pub type IgnackW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `LOOPBACK` reader - Loopback"] +pub type LoopbackR = crate::BitReader; +#[doc = "Field `LOOPBACK` writer - Loopback"] +pub type LoopbackW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `INTERNAL` reader - Internal"] +pub type InternalR = crate::BitReader; +#[doc = "Field `INTERNAL` writer - Internal"] +pub type InternalW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `DIAGEN` reader - Diagnostic Enable"] +pub type DiagenR = crate::BitReader; +#[doc = "Field `DIAGEN` writer - Diagnostic Enable"] +pub type DiagenW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `EIT` reader - Error Interrupt Type"] +pub type EitR = crate::BitReader; +#[doc = "Field `EIT` writer - Error Interrupt Type"] +pub type EitW<'a, REG> = crate::BitWriter<'a, REG>; impl R { - #[doc = "Bit 11 - Error Interrupt Type"] + #[doc = "Bit 0 - CAN Enable"] #[inline(always)] - pub fn eit(&self) -> EIT_R { - EIT_R::new(((self.bits >> 11) & 0x01) != 0) - } - #[doc = "Bit 10 - Diagnostic Enable"] - #[inline(always)] - pub fn diagen(&self) -> DIAGEN_R { - DIAGEN_R::new(((self.bits >> 10) & 0x01) != 0) - } - #[doc = "Bit 9 - Internal"] - #[inline(always)] - pub fn internal(&self) -> INTERNAL_R { - INTERNAL_R::new(((self.bits >> 9) & 0x01) != 0) - } - #[doc = "Bit 8 - Loopback"] - #[inline(always)] - pub fn loopback(&self) -> LOOPBACK_R { - LOOPBACK_R::new(((self.bits >> 8) & 0x01) != 0) - } - #[doc = "Bit 7 - Ignore Acknowledge"] - #[inline(always)] - pub fn ignack(&self) -> IGNACK_R { - IGNACK_R::new(((self.bits >> 7) & 0x01) != 0) - } - #[doc = "Bit 6 - Listen Only"] - #[inline(always)] - pub fn lo(&self) -> LO_R { - LO_R::new(((self.bits >> 6) & 0x01) != 0) - } - #[doc = "Bit 5 - Data Direction"] - #[inline(always)] - pub fn ddir(&self) -> DDIR_R { - DDIR_R::new(((self.bits >> 5) & 0x01) != 0) - } - #[doc = "Bit 4 - Time Sync Enable"] - #[inline(always)] - pub fn tstpen(&self) -> TSTPEN_R { - TSTPEN_R::new(((self.bits >> 4) & 0x01) != 0) - } - #[doc = "Bit 3 - Buffer Lock"] - #[inline(always)] - pub fn bufflock(&self) -> BUFFLOCK_R { - BUFFLOCK_R::new(((self.bits >> 3) & 0x01) != 0) - } - #[doc = "Bit 2 - RW,Control Transmit"] - #[inline(always)] - pub fn ctx(&self) -> CTX_R { - CTX_R::new(((self.bits >> 2) & 0x01) != 0) + pub fn canen(&self) -> CanenR { + CanenR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - RW,Control Receive"] #[inline(always)] - pub fn crx(&self) -> CRX_R { - CRX_R::new(((self.bits >> 1) & 0x01) != 0) + pub fn crx(&self) -> CrxR { + CrxR::new(((self.bits >> 1) & 1) != 0) } - #[doc = "Bit 0 - CAN Enable"] + #[doc = "Bit 2 - RW,Control Transmit"] #[inline(always)] - pub fn canen(&self) -> CANEN_R { - CANEN_R::new((self.bits & 0x01) != 0) + pub fn ctx(&self) -> CtxR { + CtxR::new(((self.bits >> 2) & 1) != 0) + } + #[doc = "Bit 3 - Buffer Lock"] + #[inline(always)] + pub fn bufflock(&self) -> BufflockR { + BufflockR::new(((self.bits >> 3) & 1) != 0) + } + #[doc = "Bit 4 - Time Sync Enable"] + #[inline(always)] + pub fn tstpen(&self) -> TstpenR { + TstpenR::new(((self.bits >> 4) & 1) != 0) + } + #[doc = "Bit 5 - Data Direction"] + #[inline(always)] + pub fn ddir(&self) -> DdirR { + DdirR::new(((self.bits >> 5) & 1) != 0) + } + #[doc = "Bit 6 - Listen Only"] + #[inline(always)] + pub fn lo(&self) -> LoR { + LoR::new(((self.bits >> 6) & 1) != 0) + } + #[doc = "Bit 7 - Ignore Acknowledge"] + #[inline(always)] + pub fn ignack(&self) -> IgnackR { + IgnackR::new(((self.bits >> 7) & 1) != 0) + } + #[doc = "Bit 8 - Loopback"] + #[inline(always)] + pub fn loopback(&self) -> LoopbackR { + LoopbackR::new(((self.bits >> 8) & 1) != 0) + } + #[doc = "Bit 9 - Internal"] + #[inline(always)] + pub fn internal(&self) -> InternalR { + InternalR::new(((self.bits >> 9) & 1) != 0) + } + #[doc = "Bit 10 - Diagnostic Enable"] + #[inline(always)] + pub fn diagen(&self) -> DiagenR { + DiagenR::new(((self.bits >> 10) & 1) != 0) + } + #[doc = "Bit 11 - Error Interrupt Type"] + #[inline(always)] + pub fn eit(&self) -> EitR { + EitR::new(((self.bits >> 11) & 1) != 0) } } impl W { - #[doc = "Bit 11 - Error Interrupt Type"] + #[doc = "Bit 0 - CAN Enable"] #[inline(always)] - pub fn eit(&mut self) -> EIT_W { - EIT_W { w: self } - } - #[doc = "Bit 10 - Diagnostic Enable"] - #[inline(always)] - pub fn diagen(&mut self) -> DIAGEN_W { - DIAGEN_W { w: self } - } - #[doc = "Bit 9 - Internal"] - #[inline(always)] - pub fn internal(&mut self) -> INTERNAL_W { - INTERNAL_W { w: self } - } - #[doc = "Bit 8 - Loopback"] - #[inline(always)] - pub fn loopback(&mut self) -> LOOPBACK_W { - LOOPBACK_W { w: self } - } - #[doc = "Bit 7 - Ignore Acknowledge"] - #[inline(always)] - pub fn ignack(&mut self) -> IGNACK_W { - IGNACK_W { w: self } - } - #[doc = "Bit 6 - Listen Only"] - #[inline(always)] - pub fn lo(&mut self) -> LO_W { - LO_W { w: self } - } - #[doc = "Bit 5 - Data Direction"] - #[inline(always)] - pub fn ddir(&mut self) -> DDIR_W { - DDIR_W { w: self } - } - #[doc = "Bit 4 - Time Sync Enable"] - #[inline(always)] - pub fn tstpen(&mut self) -> TSTPEN_W { - TSTPEN_W { w: self } - } - #[doc = "Bit 3 - Buffer Lock"] - #[inline(always)] - pub fn bufflock(&mut self) -> BUFFLOCK_W { - BUFFLOCK_W { w: self } - } - #[doc = "Bit 2 - RW,Control Transmit"] - #[inline(always)] - pub fn ctx(&mut self) -> CTX_W { - CTX_W { w: self } + #[must_use] + pub fn canen(&mut self) -> CanenW { + CanenW::new(self, 0) } #[doc = "Bit 1 - RW,Control Receive"] #[inline(always)] - pub fn crx(&mut self) -> CRX_W { - CRX_W { w: self } + #[must_use] + pub fn crx(&mut self) -> CrxW { + CrxW::new(self, 1) } - #[doc = "Bit 0 - CAN Enable"] + #[doc = "Bit 2 - RW,Control Transmit"] #[inline(always)] - pub fn canen(&mut self) -> CANEN_W { - CANEN_W { w: self } + #[must_use] + pub fn ctx(&mut self) -> CtxW { + CtxW::new(self, 2) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bit 3 - Buffer Lock"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn bufflock(&mut self) -> BufflockW { + BufflockW::new(self, 3) + } + #[doc = "Bit 4 - Time Sync Enable"] + #[inline(always)] + #[must_use] + pub fn tstpen(&mut self) -> TstpenW { + TstpenW::new(self, 4) + } + #[doc = "Bit 5 - Data Direction"] + #[inline(always)] + #[must_use] + pub fn ddir(&mut self) -> DdirW { + DdirW::new(self, 5) + } + #[doc = "Bit 6 - Listen Only"] + #[inline(always)] + #[must_use] + pub fn lo(&mut self) -> LoW { + LoW::new(self, 6) + } + #[doc = "Bit 7 - Ignore Acknowledge"] + #[inline(always)] + #[must_use] + pub fn ignack(&mut self) -> IgnackW { + IgnackW::new(self, 7) + } + #[doc = "Bit 8 - Loopback"] + #[inline(always)] + #[must_use] + pub fn loopback(&mut self) -> LoopbackW { + LoopbackW::new(self, 8) + } + #[doc = "Bit 9 - Internal"] + #[inline(always)] + #[must_use] + pub fn internal(&mut self) -> InternalW { + InternalW::new(self, 9) + } + #[doc = "Bit 10 - Diagnostic Enable"] + #[inline(always)] + #[must_use] + pub fn diagen(&mut self) -> DiagenW { + DiagenW::new(self, 10) + } + #[doc = "Bit 11 - Error Interrupt Type"] + #[inline(always)] + #[must_use] + pub fn eit(&mut self) -> EitW { + EitW::new(self, 11) } } -#[doc = "CAN Global Configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cgcr](index.html) module"] -pub struct CGCR_SPEC; -impl crate::RegisterSpec for CGCR_SPEC { +#[doc = "CAN Global Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cgcr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cgcr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CgcrSpec; +impl crate::RegisterSpec for CgcrSpec { type Ux = u32; } -#[doc = "`read()` method returns [cgcr::R](R) reader structure"] -impl crate::Readable for CGCR_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cgcr::W](W) writer structure"] -impl crate::Writable for CGCR_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`cgcr::R`](R) reader structure"] +impl crate::Readable for CgcrSpec {} +#[doc = "`write(|w| ..)` method takes [`cgcr::W`](W) writer structure"] +impl crate::Writable for CgcrSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CGCR to value 0"] -impl crate::Resettable for CGCR_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for CgcrSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/cicen.rs b/va416xx/src/can0/cicen.rs index 58724ea..98b87c2 100644 --- a/va416xx/src/can0/cicen.rs +++ b/va416xx/src/can0/cicen.rs @@ -1,150 +1,55 @@ #[doc = "Register `CICEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CICEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `EICEN` reader - Error Interrupt Code Enable"] -pub struct EICEN_R(crate::FieldReader); -impl EICEN_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - EICEN_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for EICEN_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `EICEN` writer - Error Interrupt Code Enable"] -pub struct EICEN_W<'a> { - w: &'a mut W, -} -impl<'a> EICEN_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); - self.w - } -} +pub type W = crate::W; #[doc = "Field `ICEN` reader - Buffer Interrupt Code Enable\\[14:0\\]"] -pub struct ICEN_R(crate::FieldReader); -impl ICEN_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - ICEN_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ICEN_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type IcenR = crate::FieldReader; #[doc = "Field `ICEN` writer - Buffer Interrupt Code Enable\\[14:0\\]"] -pub struct ICEN_W<'a> { - w: &'a mut W, -} -impl<'a> ICEN_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !0x7fff) | (value as u32 & 0x7fff); - self.w - } -} +pub type IcenW<'a, REG> = crate::FieldWriter<'a, REG, 15, u16>; +#[doc = "Field `EICEN` reader - Error Interrupt Code Enable"] +pub type EicenR = crate::BitReader; +#[doc = "Field `EICEN` writer - Error Interrupt Code Enable"] +pub type EicenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { - #[doc = "Bit 15 - Error Interrupt Code Enable"] - #[inline(always)] - pub fn eicen(&self) -> EICEN_R { - EICEN_R::new(((self.bits >> 15) & 0x01) != 0) - } #[doc = "Bits 0:14 - Buffer Interrupt Code Enable\\[14:0\\]"] #[inline(always)] - pub fn icen(&self) -> ICEN_R { - ICEN_R::new((self.bits & 0x7fff) as u16) + pub fn icen(&self) -> IcenR { + IcenR::new((self.bits & 0x7fff) as u16) + } + #[doc = "Bit 15 - Error Interrupt Code Enable"] + #[inline(always)] + pub fn eicen(&self) -> EicenR { + EicenR::new(((self.bits >> 15) & 1) != 0) } } impl W { - #[doc = "Bit 15 - Error Interrupt Code Enable"] - #[inline(always)] - pub fn eicen(&mut self) -> EICEN_W { - EICEN_W { w: self } - } #[doc = "Bits 0:14 - Buffer Interrupt Code Enable\\[14:0\\]"] #[inline(always)] - pub fn icen(&mut self) -> ICEN_W { - ICEN_W { w: self } + #[must_use] + pub fn icen(&mut self) -> IcenW { + IcenW::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bit 15 - Error Interrupt Code Enable"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn eicen(&mut self) -> EicenW { + EicenW::new(self, 15) } } -#[doc = "CAN Interrupt Code Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cicen](index.html) module"] -pub struct CICEN_SPEC; -impl crate::RegisterSpec for CICEN_SPEC { +#[doc = "CAN Interrupt Code Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cicen::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cicen::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CicenSpec; +impl crate::RegisterSpec for CicenSpec { type Ux = u32; } -#[doc = "`read()` method returns [cicen::R](R) reader structure"] -impl crate::Readable for CICEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cicen::W](W) writer structure"] -impl crate::Writable for CICEN_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`cicen::R`](R) reader structure"] +impl crate::Readable for CicenSpec {} +#[doc = "`write(|w| ..)` method takes [`cicen::W`](W) writer structure"] +impl crate::Writable for CicenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CICEN to value 0"] -impl crate::Resettable for CICEN_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for CicenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/ciclr.rs b/va416xx/src/can0/ciclr.rs index f3ec466..75f5c48 100644 --- a/va416xx/src/can0/ciclr.rs +++ b/va416xx/src/can0/ciclr.rs @@ -1,150 +1,55 @@ #[doc = "Register `CICLR` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CICLR` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `EICLR` reader - Error Interrupt Clear"] -pub struct EICLR_R(crate::FieldReader); -impl EICLR_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - EICLR_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for EICLR_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `EICLR` writer - Error Interrupt Clear"] -pub struct EICLR_W<'a> { - w: &'a mut W, -} -impl<'a> EICLR_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); - self.w - } -} +pub type W = crate::W; #[doc = "Field `ICLR` reader - Buffer Interrupt Clear\\[14:0\\]"] -pub struct ICLR_R(crate::FieldReader); -impl ICLR_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - ICLR_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ICLR_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type IclrR = crate::FieldReader; #[doc = "Field `ICLR` writer - Buffer Interrupt Clear\\[14:0\\]"] -pub struct ICLR_W<'a> { - w: &'a mut W, -} -impl<'a> ICLR_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !0x7fff) | (value as u32 & 0x7fff); - self.w - } -} +pub type IclrW<'a, REG> = crate::FieldWriter<'a, REG, 15, u16>; +#[doc = "Field `EICLR` reader - Error Interrupt Clear"] +pub type EiclrR = crate::BitReader; +#[doc = "Field `EICLR` writer - Error Interrupt Clear"] +pub type EiclrW<'a, REG> = crate::BitWriter<'a, REG>; impl R { - #[doc = "Bit 15 - Error Interrupt Clear"] - #[inline(always)] - pub fn eiclr(&self) -> EICLR_R { - EICLR_R::new(((self.bits >> 15) & 0x01) != 0) - } #[doc = "Bits 0:14 - Buffer Interrupt Clear\\[14:0\\]"] #[inline(always)] - pub fn iclr(&self) -> ICLR_R { - ICLR_R::new((self.bits & 0x7fff) as u16) + pub fn iclr(&self) -> IclrR { + IclrR::new((self.bits & 0x7fff) as u16) + } + #[doc = "Bit 15 - Error Interrupt Clear"] + #[inline(always)] + pub fn eiclr(&self) -> EiclrR { + EiclrR::new(((self.bits >> 15) & 1) != 0) } } impl W { - #[doc = "Bit 15 - Error Interrupt Clear"] - #[inline(always)] - pub fn eiclr(&mut self) -> EICLR_W { - EICLR_W { w: self } - } #[doc = "Bits 0:14 - Buffer Interrupt Clear\\[14:0\\]"] #[inline(always)] - pub fn iclr(&mut self) -> ICLR_W { - ICLR_W { w: self } + #[must_use] + pub fn iclr(&mut self) -> IclrW { + IclrW::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bit 15 - Error Interrupt Clear"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn eiclr(&mut self) -> EiclrW { + EiclrW::new(self, 15) } } -#[doc = "CAN Interrupt Clear Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ciclr](index.html) module"] -pub struct CICLR_SPEC; -impl crate::RegisterSpec for CICLR_SPEC { +#[doc = "CAN Interrupt Clear Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ciclr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ciclr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CiclrSpec; +impl crate::RegisterSpec for CiclrSpec { type Ux = u32; } -#[doc = "`read()` method returns [ciclr::R](R) reader structure"] -impl crate::Readable for CICLR_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ciclr::W](W) writer structure"] -impl crate::Writable for CICLR_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`ciclr::R`](R) reader structure"] +impl crate::Readable for CiclrSpec {} +#[doc = "`write(|w| ..)` method takes [`ciclr::W`](W) writer structure"] +impl crate::Writable for CiclrSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CICLR to value 0"] -impl crate::Resettable for CICLR_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for CiclrSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/cien.rs b/va416xx/src/can0/cien.rs index f2eef9e..65b3550 100644 --- a/va416xx/src/can0/cien.rs +++ b/va416xx/src/can0/cien.rs @@ -1,150 +1,55 @@ #[doc = "Register `CIEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CIEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `EIEN` reader - Error Interrupt Enable"] -pub struct EIEN_R(crate::FieldReader); -impl EIEN_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - EIEN_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for EIEN_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `EIEN` writer - Error Interrupt Enable"] -pub struct EIEN_W<'a> { - w: &'a mut W, -} -impl<'a> EIEN_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); - self.w - } -} +pub type W = crate::W; #[doc = "Field `IEN` reader - Buffer Interrupt Enable\\[14:0\\]"] -pub struct IEN_R(crate::FieldReader); -impl IEN_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - IEN_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for IEN_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type IenR = crate::FieldReader; #[doc = "Field `IEN` writer - Buffer Interrupt Enable\\[14:0\\]"] -pub struct IEN_W<'a> { - w: &'a mut W, -} -impl<'a> IEN_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !0x7fff) | (value as u32 & 0x7fff); - self.w - } -} +pub type IenW<'a, REG> = crate::FieldWriter<'a, REG, 15, u16>; +#[doc = "Field `EIEN` reader - Error Interrupt Enable"] +pub type EienR = crate::BitReader; +#[doc = "Field `EIEN` writer - Error Interrupt Enable"] +pub type EienW<'a, REG> = crate::BitWriter<'a, REG>; impl R { - #[doc = "Bit 15 - Error Interrupt Enable"] - #[inline(always)] - pub fn eien(&self) -> EIEN_R { - EIEN_R::new(((self.bits >> 15) & 0x01) != 0) - } #[doc = "Bits 0:14 - Buffer Interrupt Enable\\[14:0\\]"] #[inline(always)] - pub fn ien(&self) -> IEN_R { - IEN_R::new((self.bits & 0x7fff) as u16) + pub fn ien(&self) -> IenR { + IenR::new((self.bits & 0x7fff) as u16) + } + #[doc = "Bit 15 - Error Interrupt Enable"] + #[inline(always)] + pub fn eien(&self) -> EienR { + EienR::new(((self.bits >> 15) & 1) != 0) } } impl W { - #[doc = "Bit 15 - Error Interrupt Enable"] - #[inline(always)] - pub fn eien(&mut self) -> EIEN_W { - EIEN_W { w: self } - } #[doc = "Bits 0:14 - Buffer Interrupt Enable\\[14:0\\]"] #[inline(always)] - pub fn ien(&mut self) -> IEN_W { - IEN_W { w: self } + #[must_use] + pub fn ien(&mut self) -> IenW { + IenW::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bit 15 - Error Interrupt Enable"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn eien(&mut self) -> EienW { + EienW::new(self, 15) } } -#[doc = "CAN Interrupt Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cien](index.html) module"] -pub struct CIEN_SPEC; -impl crate::RegisterSpec for CIEN_SPEC { +#[doc = "CAN Interrupt Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cien::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cien::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CienSpec; +impl crate::RegisterSpec for CienSpec { type Ux = u32; } -#[doc = "`read()` method returns [cien::R](R) reader structure"] -impl crate::Readable for CIEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cien::W](W) writer structure"] -impl crate::Writable for CIEN_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`cien::R`](R) reader structure"] +impl crate::Readable for CienSpec {} +#[doc = "`write(|w| ..)` method takes [`cien::W`](W) writer structure"] +impl crate::Writable for CienSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CIEN to value 0"] -impl crate::Resettable for CIEN_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for CienSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/cipnd.rs b/va416xx/src/can0/cipnd.rs index 99f7715..75e828f 100644 --- a/va416xx/src/can0/cipnd.rs +++ b/va416xx/src/can0/cipnd.rs @@ -1,150 +1,55 @@ #[doc = "Register `CIPND` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CIPND` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `EIPND` reader - Error Interrupt Pending"] -pub struct EIPND_R(crate::FieldReader); -impl EIPND_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - EIPND_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for EIPND_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `EIPND` writer - Error Interrupt Pending"] -pub struct EIPND_W<'a> { - w: &'a mut W, -} -impl<'a> EIPND_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); - self.w - } -} +pub type W = crate::W; #[doc = "Field `IPND` reader - Buffer Interrupt Pending\\[14:0\\]"] -pub struct IPND_R(crate::FieldReader); -impl IPND_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - IPND_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for IPND_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type IpndR = crate::FieldReader; #[doc = "Field `IPND` writer - Buffer Interrupt Pending\\[14:0\\]"] -pub struct IPND_W<'a> { - w: &'a mut W, -} -impl<'a> IPND_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !0x7fff) | (value as u32 & 0x7fff); - self.w - } -} +pub type IpndW<'a, REG> = crate::FieldWriter<'a, REG, 15, u16>; +#[doc = "Field `EIPND` reader - Error Interrupt Pending"] +pub type EipndR = crate::BitReader; +#[doc = "Field `EIPND` writer - Error Interrupt Pending"] +pub type EipndW<'a, REG> = crate::BitWriter<'a, REG>; impl R { - #[doc = "Bit 15 - Error Interrupt Pending"] - #[inline(always)] - pub fn eipnd(&self) -> EIPND_R { - EIPND_R::new(((self.bits >> 15) & 0x01) != 0) - } #[doc = "Bits 0:14 - Buffer Interrupt Pending\\[14:0\\]"] #[inline(always)] - pub fn ipnd(&self) -> IPND_R { - IPND_R::new((self.bits & 0x7fff) as u16) + pub fn ipnd(&self) -> IpndR { + IpndR::new((self.bits & 0x7fff) as u16) + } + #[doc = "Bit 15 - Error Interrupt Pending"] + #[inline(always)] + pub fn eipnd(&self) -> EipndR { + EipndR::new(((self.bits >> 15) & 1) != 0) } } impl W { - #[doc = "Bit 15 - Error Interrupt Pending"] - #[inline(always)] - pub fn eipnd(&mut self) -> EIPND_W { - EIPND_W { w: self } - } #[doc = "Bits 0:14 - Buffer Interrupt Pending\\[14:0\\]"] #[inline(always)] - pub fn ipnd(&mut self) -> IPND_W { - IPND_W { w: self } + #[must_use] + pub fn ipnd(&mut self) -> IpndW { + IpndW::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bit 15 - Error Interrupt Pending"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn eipnd(&mut self) -> EipndW { + EipndW::new(self, 15) } } -#[doc = "CAN Interrupt Pending Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cipnd](index.html) module"] -pub struct CIPND_SPEC; -impl crate::RegisterSpec for CIPND_SPEC { +#[doc = "CAN Interrupt Pending Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cipnd::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cipnd::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CipndSpec; +impl crate::RegisterSpec for CipndSpec { type Ux = u32; } -#[doc = "`read()` method returns [cipnd::R](R) reader structure"] -impl crate::Readable for CIPND_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cipnd::W](W) writer structure"] -impl crate::Writable for CIPND_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`cipnd::R`](R) reader structure"] +impl crate::Readable for CipndSpec {} +#[doc = "`write(|w| ..)` method takes [`cipnd::W`](W) writer structure"] +impl crate::Writable for CipndSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CIPND to value 0"] -impl crate::Resettable for CIPND_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for CipndSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/cnstat_cmb0.rs b/va416xx/src/can0/cnstat_cmb0.rs index d69b01f..673daa9 100644 --- a/va416xx/src/can0/cnstat_cmb0.rs +++ b/va416xx/src/can0/cnstat_cmb0.rs @@ -1,177 +1,70 @@ #[doc = "Register `CNSTAT_CMB0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CNSTAT_CMB0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `DLC` reader - Data Length Code"] -pub struct DLC_R(crate::FieldReader); -impl DLC_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - DLC_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for DLC_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `DLC` writer - Data Length Code"] -pub struct DLC_W<'a> { - w: &'a mut W, -} -impl<'a> DLC_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x0f << 12)) | ((value as u32 & 0x0f) << 12); - self.w - } -} -#[doc = "Field `PRI` reader - Transmit Priority Code"] -pub struct PRI_R(crate::FieldReader); -impl PRI_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - PRI_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PRI_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `PRI` writer - Transmit Priority Code"] -pub struct PRI_W<'a> { - w: &'a mut W, -} -impl<'a> PRI_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x0f << 4)) | ((value as u32 & 0x0f) << 4); - self.w - } -} +pub type W = crate::W; #[doc = "Field `ST` reader - Buffer Status"] -pub struct ST_R(crate::FieldReader); -impl ST_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - ST_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ST_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type StR = crate::FieldReader; #[doc = "Field `ST` writer - Buffer Status"] -pub struct ST_W<'a> { - w: &'a mut W, -} -impl<'a> ST_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0x0f) | (value as u32 & 0x0f); - self.w - } -} +pub type StW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +#[doc = "Field `PRI` reader - Transmit Priority Code"] +pub type PriR = crate::FieldReader; +#[doc = "Field `PRI` writer - Transmit Priority Code"] +pub type PriW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +#[doc = "Field `DLC` reader - Data Length Code"] +pub type DlcR = crate::FieldReader; +#[doc = "Field `DLC` writer - Data Length Code"] +pub type DlcW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { - #[doc = "Bits 12:15 - Data Length Code"] + #[doc = "Bits 0:3 - Buffer Status"] #[inline(always)] - pub fn dlc(&self) -> DLC_R { - DLC_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn st(&self) -> StR { + StR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - Transmit Priority Code"] #[inline(always)] - pub fn pri(&self) -> PRI_R { - PRI_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn pri(&self) -> PriR { + PriR::new(((self.bits >> 4) & 0x0f) as u8) } - #[doc = "Bits 0:3 - Buffer Status"] + #[doc = "Bits 12:15 - Data Length Code"] #[inline(always)] - pub fn st(&self) -> ST_R { - ST_R::new((self.bits & 0x0f) as u8) + pub fn dlc(&self) -> DlcR { + DlcR::new(((self.bits >> 12) & 0x0f) as u8) } } impl W { - #[doc = "Bits 12:15 - Data Length Code"] + #[doc = "Bits 0:3 - Buffer Status"] #[inline(always)] - pub fn dlc(&mut self) -> DLC_W { - DLC_W { w: self } + #[must_use] + pub fn st(&mut self) -> StW { + StW::new(self, 0) } #[doc = "Bits 4:7 - Transmit Priority Code"] #[inline(always)] - pub fn pri(&mut self) -> PRI_W { - PRI_W { w: self } + #[must_use] + pub fn pri(&mut self) -> PriW { + PriW::new(self, 4) } - #[doc = "Bits 0:3 - Buffer Status"] + #[doc = "Bits 12:15 - Data Length Code"] #[inline(always)] - pub fn st(&mut self) -> ST_W { - ST_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn dlc(&mut self) -> DlcW { + DlcW::new(self, 12) } } -#[doc = "Buffer Status / Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cnstat_cmb0](index.html) module"] -pub struct CNSTAT_CMB0_SPEC; -impl crate::RegisterSpec for CNSTAT_CMB0_SPEC { +#[doc = "Buffer Status / Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cnstat_cmb0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cnstat_cmb0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CnstatCmb0Spec; +impl crate::RegisterSpec for CnstatCmb0Spec { type Ux = u32; } -#[doc = "`read()` method returns [cnstat_cmb0::R](R) reader structure"] -impl crate::Readable for CNSTAT_CMB0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cnstat_cmb0::W](W) writer structure"] -impl crate::Writable for CNSTAT_CMB0_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`cnstat_cmb0::R`](R) reader structure"] +impl crate::Readable for CnstatCmb0Spec {} +#[doc = "`write(|w| ..)` method takes [`cnstat_cmb0::W`](W) writer structure"] +impl crate::Writable for CnstatCmb0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CNSTAT_CMB0 to value 0"] -impl crate::Resettable for CNSTAT_CMB0_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for CnstatCmb0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/cnstat_cmb1.rs b/va416xx/src/can0/cnstat_cmb1.rs index d4d8377..c6a9f1a 100644 --- a/va416xx/src/can0/cnstat_cmb1.rs +++ b/va416xx/src/can0/cnstat_cmb1.rs @@ -1,177 +1,70 @@ #[doc = "Register `CNSTAT_CMB1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CNSTAT_CMB1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `DLC` reader - Data Length Code"] -pub struct DLC_R(crate::FieldReader); -impl DLC_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - DLC_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for DLC_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `DLC` writer - Data Length Code"] -pub struct DLC_W<'a> { - w: &'a mut W, -} -impl<'a> DLC_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x0f << 12)) | ((value as u32 & 0x0f) << 12); - self.w - } -} -#[doc = "Field `PRI` reader - Transmit Priority Code"] -pub struct PRI_R(crate::FieldReader); -impl PRI_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - PRI_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PRI_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `PRI` writer - Transmit Priority Code"] -pub struct PRI_W<'a> { - w: &'a mut W, -} -impl<'a> PRI_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x0f << 4)) | ((value as u32 & 0x0f) << 4); - self.w - } -} +pub type W = crate::W; #[doc = "Field `ST` reader - Buffer Status"] -pub struct ST_R(crate::FieldReader); -impl ST_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - ST_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ST_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type StR = crate::FieldReader; #[doc = "Field `ST` writer - Buffer Status"] -pub struct ST_W<'a> { - w: &'a mut W, -} -impl<'a> ST_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0x0f) | (value as u32 & 0x0f); - self.w - } -} +pub type StW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +#[doc = "Field `PRI` reader - Transmit Priority Code"] +pub type PriR = crate::FieldReader; +#[doc = "Field `PRI` writer - Transmit Priority Code"] +pub type PriW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +#[doc = "Field `DLC` reader - Data Length Code"] +pub type DlcR = crate::FieldReader; +#[doc = "Field `DLC` writer - Data Length Code"] +pub type DlcW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { - #[doc = "Bits 12:15 - Data Length Code"] + #[doc = "Bits 0:3 - Buffer Status"] #[inline(always)] - pub fn dlc(&self) -> DLC_R { - DLC_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn st(&self) -> StR { + StR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - Transmit Priority Code"] #[inline(always)] - pub fn pri(&self) -> PRI_R { - PRI_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn pri(&self) -> PriR { + PriR::new(((self.bits >> 4) & 0x0f) as u8) } - #[doc = "Bits 0:3 - Buffer Status"] + #[doc = "Bits 12:15 - Data Length Code"] #[inline(always)] - pub fn st(&self) -> ST_R { - ST_R::new((self.bits & 0x0f) as u8) + pub fn dlc(&self) -> DlcR { + DlcR::new(((self.bits >> 12) & 0x0f) as u8) } } impl W { - #[doc = "Bits 12:15 - Data Length Code"] + #[doc = "Bits 0:3 - Buffer Status"] #[inline(always)] - pub fn dlc(&mut self) -> DLC_W { - DLC_W { w: self } + #[must_use] + pub fn st(&mut self) -> StW { + StW::new(self, 0) } #[doc = "Bits 4:7 - Transmit Priority Code"] #[inline(always)] - pub fn pri(&mut self) -> PRI_W { - PRI_W { w: self } + #[must_use] + pub fn pri(&mut self) -> PriW { + PriW::new(self, 4) } - #[doc = "Bits 0:3 - Buffer Status"] + #[doc = "Bits 12:15 - Data Length Code"] #[inline(always)] - pub fn st(&mut self) -> ST_W { - ST_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn dlc(&mut self) -> DlcW { + DlcW::new(self, 12) } } -#[doc = "Buffer Status / Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cnstat_cmb1](index.html) module"] -pub struct CNSTAT_CMB1_SPEC; -impl crate::RegisterSpec for CNSTAT_CMB1_SPEC { +#[doc = "Buffer Status / Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cnstat_cmb1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cnstat_cmb1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CnstatCmb1Spec; +impl crate::RegisterSpec for CnstatCmb1Spec { type Ux = u32; } -#[doc = "`read()` method returns [cnstat_cmb1::R](R) reader structure"] -impl crate::Readable for CNSTAT_CMB1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cnstat_cmb1::W](W) writer structure"] -impl crate::Writable for CNSTAT_CMB1_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`cnstat_cmb1::R`](R) reader structure"] +impl crate::Readable for CnstatCmb1Spec {} +#[doc = "`write(|w| ..)` method takes [`cnstat_cmb1::W`](W) writer structure"] +impl crate::Writable for CnstatCmb1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CNSTAT_CMB1 to value 0"] -impl crate::Resettable for CNSTAT_CMB1_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for CnstatCmb1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/cnstat_cmb10.rs b/va416xx/src/can0/cnstat_cmb10.rs index 815d4a3..76466e7 100644 --- a/va416xx/src/can0/cnstat_cmb10.rs +++ b/va416xx/src/can0/cnstat_cmb10.rs @@ -1,177 +1,70 @@ #[doc = "Register `CNSTAT_CMB10` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CNSTAT_CMB10` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `DLC` reader - Data Length Code"] -pub struct DLC_R(crate::FieldReader); -impl DLC_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - DLC_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for DLC_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `DLC` writer - Data Length Code"] -pub struct DLC_W<'a> { - w: &'a mut W, -} -impl<'a> DLC_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x0f << 12)) | ((value as u32 & 0x0f) << 12); - self.w - } -} -#[doc = "Field `PRI` reader - Transmit Priority Code"] -pub struct PRI_R(crate::FieldReader); -impl PRI_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - PRI_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PRI_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `PRI` writer - Transmit Priority Code"] -pub struct PRI_W<'a> { - w: &'a mut W, -} -impl<'a> PRI_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x0f << 4)) | ((value as u32 & 0x0f) << 4); - self.w - } -} +pub type W = crate::W; #[doc = "Field `ST` reader - Buffer Status"] -pub struct ST_R(crate::FieldReader); -impl ST_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - ST_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ST_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type StR = crate::FieldReader; #[doc = "Field `ST` writer - Buffer Status"] -pub struct ST_W<'a> { - w: &'a mut W, -} -impl<'a> ST_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0x0f) | (value as u32 & 0x0f); - self.w - } -} +pub type StW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +#[doc = "Field `PRI` reader - Transmit Priority Code"] +pub type PriR = crate::FieldReader; +#[doc = "Field `PRI` writer - Transmit Priority Code"] +pub type PriW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +#[doc = "Field `DLC` reader - Data Length Code"] +pub type DlcR = crate::FieldReader; +#[doc = "Field `DLC` writer - Data Length Code"] +pub type DlcW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { - #[doc = "Bits 12:15 - Data Length Code"] + #[doc = "Bits 0:3 - Buffer Status"] #[inline(always)] - pub fn dlc(&self) -> DLC_R { - DLC_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn st(&self) -> StR { + StR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - Transmit Priority Code"] #[inline(always)] - pub fn pri(&self) -> PRI_R { - PRI_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn pri(&self) -> PriR { + PriR::new(((self.bits >> 4) & 0x0f) as u8) } - #[doc = "Bits 0:3 - Buffer Status"] + #[doc = "Bits 12:15 - Data Length Code"] #[inline(always)] - pub fn st(&self) -> ST_R { - ST_R::new((self.bits & 0x0f) as u8) + pub fn dlc(&self) -> DlcR { + DlcR::new(((self.bits >> 12) & 0x0f) as u8) } } impl W { - #[doc = "Bits 12:15 - Data Length Code"] + #[doc = "Bits 0:3 - Buffer Status"] #[inline(always)] - pub fn dlc(&mut self) -> DLC_W { - DLC_W { w: self } + #[must_use] + pub fn st(&mut self) -> StW { + StW::new(self, 0) } #[doc = "Bits 4:7 - Transmit Priority Code"] #[inline(always)] - pub fn pri(&mut self) -> PRI_W { - PRI_W { w: self } + #[must_use] + pub fn pri(&mut self) -> PriW { + PriW::new(self, 4) } - #[doc = "Bits 0:3 - Buffer Status"] + #[doc = "Bits 12:15 - Data Length Code"] #[inline(always)] - pub fn st(&mut self) -> ST_W { - ST_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn dlc(&mut self) -> DlcW { + DlcW::new(self, 12) } } -#[doc = "Buffer Status / Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cnstat_cmb10](index.html) module"] -pub struct CNSTAT_CMB10_SPEC; -impl crate::RegisterSpec for CNSTAT_CMB10_SPEC { +#[doc = "Buffer Status / Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cnstat_cmb10::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cnstat_cmb10::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CnstatCmb10Spec; +impl crate::RegisterSpec for CnstatCmb10Spec { type Ux = u32; } -#[doc = "`read()` method returns [cnstat_cmb10::R](R) reader structure"] -impl crate::Readable for CNSTAT_CMB10_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cnstat_cmb10::W](W) writer structure"] -impl crate::Writable for CNSTAT_CMB10_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`cnstat_cmb10::R`](R) reader structure"] +impl crate::Readable for CnstatCmb10Spec {} +#[doc = "`write(|w| ..)` method takes [`cnstat_cmb10::W`](W) writer structure"] +impl crate::Writable for CnstatCmb10Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CNSTAT_CMB10 to value 0"] -impl crate::Resettable for CNSTAT_CMB10_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for CnstatCmb10Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/cnstat_cmb11.rs b/va416xx/src/can0/cnstat_cmb11.rs index 1eefb36..88cde7a 100644 --- a/va416xx/src/can0/cnstat_cmb11.rs +++ b/va416xx/src/can0/cnstat_cmb11.rs @@ -1,177 +1,70 @@ #[doc = "Register `CNSTAT_CMB11` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CNSTAT_CMB11` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `DLC` reader - Data Length Code"] -pub struct DLC_R(crate::FieldReader); -impl DLC_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - DLC_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for DLC_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `DLC` writer - Data Length Code"] -pub struct DLC_W<'a> { - w: &'a mut W, -} -impl<'a> DLC_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x0f << 12)) | ((value as u32 & 0x0f) << 12); - self.w - } -} -#[doc = "Field `PRI` reader - Transmit Priority Code"] -pub struct PRI_R(crate::FieldReader); -impl PRI_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - PRI_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PRI_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `PRI` writer - Transmit Priority Code"] -pub struct PRI_W<'a> { - w: &'a mut W, -} -impl<'a> PRI_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x0f << 4)) | ((value as u32 & 0x0f) << 4); - self.w - } -} +pub type W = crate::W; #[doc = "Field `ST` reader - Buffer Status"] -pub struct ST_R(crate::FieldReader); -impl ST_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - ST_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ST_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type StR = crate::FieldReader; #[doc = "Field `ST` writer - Buffer Status"] -pub struct ST_W<'a> { - w: &'a mut W, -} -impl<'a> ST_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0x0f) | (value as u32 & 0x0f); - self.w - } -} +pub type StW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +#[doc = "Field `PRI` reader - Transmit Priority Code"] +pub type PriR = crate::FieldReader; +#[doc = "Field `PRI` writer - Transmit Priority Code"] +pub type PriW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +#[doc = "Field `DLC` reader - Data Length Code"] +pub type DlcR = crate::FieldReader; +#[doc = "Field `DLC` writer - Data Length Code"] +pub type DlcW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { - #[doc = "Bits 12:15 - Data Length Code"] + #[doc = "Bits 0:3 - Buffer Status"] #[inline(always)] - pub fn dlc(&self) -> DLC_R { - DLC_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn st(&self) -> StR { + StR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - Transmit Priority Code"] #[inline(always)] - pub fn pri(&self) -> PRI_R { - PRI_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn pri(&self) -> PriR { + PriR::new(((self.bits >> 4) & 0x0f) as u8) } - #[doc = "Bits 0:3 - Buffer Status"] + #[doc = "Bits 12:15 - Data Length Code"] #[inline(always)] - pub fn st(&self) -> ST_R { - ST_R::new((self.bits & 0x0f) as u8) + pub fn dlc(&self) -> DlcR { + DlcR::new(((self.bits >> 12) & 0x0f) as u8) } } impl W { - #[doc = "Bits 12:15 - Data Length Code"] + #[doc = "Bits 0:3 - Buffer Status"] #[inline(always)] - pub fn dlc(&mut self) -> DLC_W { - DLC_W { w: self } + #[must_use] + pub fn st(&mut self) -> StW { + StW::new(self, 0) } #[doc = "Bits 4:7 - Transmit Priority Code"] #[inline(always)] - pub fn pri(&mut self) -> PRI_W { - PRI_W { w: self } + #[must_use] + pub fn pri(&mut self) -> PriW { + PriW::new(self, 4) } - #[doc = "Bits 0:3 - Buffer Status"] + #[doc = "Bits 12:15 - Data Length Code"] #[inline(always)] - pub fn st(&mut self) -> ST_W { - ST_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn dlc(&mut self) -> DlcW { + DlcW::new(self, 12) } } -#[doc = "Buffer Status / Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cnstat_cmb11](index.html) module"] -pub struct CNSTAT_CMB11_SPEC; -impl crate::RegisterSpec for CNSTAT_CMB11_SPEC { +#[doc = "Buffer Status / Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cnstat_cmb11::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cnstat_cmb11::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CnstatCmb11Spec; +impl crate::RegisterSpec for CnstatCmb11Spec { type Ux = u32; } -#[doc = "`read()` method returns [cnstat_cmb11::R](R) reader structure"] -impl crate::Readable for CNSTAT_CMB11_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cnstat_cmb11::W](W) writer structure"] -impl crate::Writable for CNSTAT_CMB11_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`cnstat_cmb11::R`](R) reader structure"] +impl crate::Readable for CnstatCmb11Spec {} +#[doc = "`write(|w| ..)` method takes [`cnstat_cmb11::W`](W) writer structure"] +impl crate::Writable for CnstatCmb11Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CNSTAT_CMB11 to value 0"] -impl crate::Resettable for CNSTAT_CMB11_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for CnstatCmb11Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/cnstat_cmb12.rs b/va416xx/src/can0/cnstat_cmb12.rs index f9e9132..54087e8 100644 --- a/va416xx/src/can0/cnstat_cmb12.rs +++ b/va416xx/src/can0/cnstat_cmb12.rs @@ -1,177 +1,70 @@ #[doc = "Register `CNSTAT_CMB12` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CNSTAT_CMB12` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `DLC` reader - Data Length Code"] -pub struct DLC_R(crate::FieldReader); -impl DLC_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - DLC_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for DLC_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `DLC` writer - Data Length Code"] -pub struct DLC_W<'a> { - w: &'a mut W, -} -impl<'a> DLC_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x0f << 12)) | ((value as u32 & 0x0f) << 12); - self.w - } -} -#[doc = "Field `PRI` reader - Transmit Priority Code"] -pub struct PRI_R(crate::FieldReader); -impl PRI_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - PRI_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PRI_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `PRI` writer - Transmit Priority Code"] -pub struct PRI_W<'a> { - w: &'a mut W, -} -impl<'a> PRI_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x0f << 4)) | ((value as u32 & 0x0f) << 4); - self.w - } -} +pub type W = crate::W; #[doc = "Field `ST` reader - Buffer Status"] -pub struct ST_R(crate::FieldReader); -impl ST_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - ST_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ST_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type StR = crate::FieldReader; #[doc = "Field `ST` writer - Buffer Status"] -pub struct ST_W<'a> { - w: &'a mut W, -} -impl<'a> ST_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0x0f) | (value as u32 & 0x0f); - self.w - } -} +pub type StW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +#[doc = "Field `PRI` reader - Transmit Priority Code"] +pub type PriR = crate::FieldReader; +#[doc = "Field `PRI` writer - Transmit Priority Code"] +pub type PriW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +#[doc = "Field `DLC` reader - Data Length Code"] +pub type DlcR = crate::FieldReader; +#[doc = "Field `DLC` writer - Data Length Code"] +pub type DlcW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { - #[doc = "Bits 12:15 - Data Length Code"] + #[doc = "Bits 0:3 - Buffer Status"] #[inline(always)] - pub fn dlc(&self) -> DLC_R { - DLC_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn st(&self) -> StR { + StR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - Transmit Priority Code"] #[inline(always)] - pub fn pri(&self) -> PRI_R { - PRI_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn pri(&self) -> PriR { + PriR::new(((self.bits >> 4) & 0x0f) as u8) } - #[doc = "Bits 0:3 - Buffer Status"] + #[doc = "Bits 12:15 - Data Length Code"] #[inline(always)] - pub fn st(&self) -> ST_R { - ST_R::new((self.bits & 0x0f) as u8) + pub fn dlc(&self) -> DlcR { + DlcR::new(((self.bits >> 12) & 0x0f) as u8) } } impl W { - #[doc = "Bits 12:15 - Data Length Code"] + #[doc = "Bits 0:3 - Buffer Status"] #[inline(always)] - pub fn dlc(&mut self) -> DLC_W { - DLC_W { w: self } + #[must_use] + pub fn st(&mut self) -> StW { + StW::new(self, 0) } #[doc = "Bits 4:7 - Transmit Priority Code"] #[inline(always)] - pub fn pri(&mut self) -> PRI_W { - PRI_W { w: self } + #[must_use] + pub fn pri(&mut self) -> PriW { + PriW::new(self, 4) } - #[doc = "Bits 0:3 - Buffer Status"] + #[doc = "Bits 12:15 - Data Length Code"] #[inline(always)] - pub fn st(&mut self) -> ST_W { - ST_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn dlc(&mut self) -> DlcW { + DlcW::new(self, 12) } } -#[doc = "Buffer Status / Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cnstat_cmb12](index.html) module"] -pub struct CNSTAT_CMB12_SPEC; -impl crate::RegisterSpec for CNSTAT_CMB12_SPEC { +#[doc = "Buffer Status / Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cnstat_cmb12::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cnstat_cmb12::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CnstatCmb12Spec; +impl crate::RegisterSpec for CnstatCmb12Spec { type Ux = u32; } -#[doc = "`read()` method returns [cnstat_cmb12::R](R) reader structure"] -impl crate::Readable for CNSTAT_CMB12_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cnstat_cmb12::W](W) writer structure"] -impl crate::Writable for CNSTAT_CMB12_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`cnstat_cmb12::R`](R) reader structure"] +impl crate::Readable for CnstatCmb12Spec {} +#[doc = "`write(|w| ..)` method takes [`cnstat_cmb12::W`](W) writer structure"] +impl crate::Writable for CnstatCmb12Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CNSTAT_CMB12 to value 0"] -impl crate::Resettable for CNSTAT_CMB12_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for CnstatCmb12Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/cnstat_cmb13.rs b/va416xx/src/can0/cnstat_cmb13.rs index c0562e0..32073ce 100644 --- a/va416xx/src/can0/cnstat_cmb13.rs +++ b/va416xx/src/can0/cnstat_cmb13.rs @@ -1,177 +1,70 @@ #[doc = "Register `CNSTAT_CMB13` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CNSTAT_CMB13` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `DLC` reader - Data Length Code"] -pub struct DLC_R(crate::FieldReader); -impl DLC_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - DLC_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for DLC_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `DLC` writer - Data Length Code"] -pub struct DLC_W<'a> { - w: &'a mut W, -} -impl<'a> DLC_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x0f << 12)) | ((value as u32 & 0x0f) << 12); - self.w - } -} -#[doc = "Field `PRI` reader - Transmit Priority Code"] -pub struct PRI_R(crate::FieldReader); -impl PRI_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - PRI_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PRI_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `PRI` writer - Transmit Priority Code"] -pub struct PRI_W<'a> { - w: &'a mut W, -} -impl<'a> PRI_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x0f << 4)) | ((value as u32 & 0x0f) << 4); - self.w - } -} +pub type W = crate::W; #[doc = "Field `ST` reader - Buffer Status"] -pub struct ST_R(crate::FieldReader); -impl ST_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - ST_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ST_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type StR = crate::FieldReader; #[doc = "Field `ST` writer - Buffer Status"] -pub struct ST_W<'a> { - w: &'a mut W, -} -impl<'a> ST_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0x0f) | (value as u32 & 0x0f); - self.w - } -} +pub type StW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +#[doc = "Field `PRI` reader - Transmit Priority Code"] +pub type PriR = crate::FieldReader; +#[doc = "Field `PRI` writer - Transmit Priority Code"] +pub type PriW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +#[doc = "Field `DLC` reader - Data Length Code"] +pub type DlcR = crate::FieldReader; +#[doc = "Field `DLC` writer - Data Length Code"] +pub type DlcW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { - #[doc = "Bits 12:15 - Data Length Code"] + #[doc = "Bits 0:3 - Buffer Status"] #[inline(always)] - pub fn dlc(&self) -> DLC_R { - DLC_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn st(&self) -> StR { + StR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - Transmit Priority Code"] #[inline(always)] - pub fn pri(&self) -> PRI_R { - PRI_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn pri(&self) -> PriR { + PriR::new(((self.bits >> 4) & 0x0f) as u8) } - #[doc = "Bits 0:3 - Buffer Status"] + #[doc = "Bits 12:15 - Data Length Code"] #[inline(always)] - pub fn st(&self) -> ST_R { - ST_R::new((self.bits & 0x0f) as u8) + pub fn dlc(&self) -> DlcR { + DlcR::new(((self.bits >> 12) & 0x0f) as u8) } } impl W { - #[doc = "Bits 12:15 - Data Length Code"] + #[doc = "Bits 0:3 - Buffer Status"] #[inline(always)] - pub fn dlc(&mut self) -> DLC_W { - DLC_W { w: self } + #[must_use] + pub fn st(&mut self) -> StW { + StW::new(self, 0) } #[doc = "Bits 4:7 - Transmit Priority Code"] #[inline(always)] - pub fn pri(&mut self) -> PRI_W { - PRI_W { w: self } + #[must_use] + pub fn pri(&mut self) -> PriW { + PriW::new(self, 4) } - #[doc = "Bits 0:3 - Buffer Status"] + #[doc = "Bits 12:15 - Data Length Code"] #[inline(always)] - pub fn st(&mut self) -> ST_W { - ST_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn dlc(&mut self) -> DlcW { + DlcW::new(self, 12) } } -#[doc = "Buffer Status / Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cnstat_cmb13](index.html) module"] -pub struct CNSTAT_CMB13_SPEC; -impl crate::RegisterSpec for CNSTAT_CMB13_SPEC { +#[doc = "Buffer Status / Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cnstat_cmb13::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cnstat_cmb13::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CnstatCmb13Spec; +impl crate::RegisterSpec for CnstatCmb13Spec { type Ux = u32; } -#[doc = "`read()` method returns [cnstat_cmb13::R](R) reader structure"] -impl crate::Readable for CNSTAT_CMB13_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cnstat_cmb13::W](W) writer structure"] -impl crate::Writable for CNSTAT_CMB13_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`cnstat_cmb13::R`](R) reader structure"] +impl crate::Readable for CnstatCmb13Spec {} +#[doc = "`write(|w| ..)` method takes [`cnstat_cmb13::W`](W) writer structure"] +impl crate::Writable for CnstatCmb13Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CNSTAT_CMB13 to value 0"] -impl crate::Resettable for CNSTAT_CMB13_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for CnstatCmb13Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/cnstat_cmb14.rs b/va416xx/src/can0/cnstat_cmb14.rs index bbf5adb..7d20dea 100644 --- a/va416xx/src/can0/cnstat_cmb14.rs +++ b/va416xx/src/can0/cnstat_cmb14.rs @@ -1,177 +1,70 @@ #[doc = "Register `CNSTAT_CMB14` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CNSTAT_CMB14` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `DLC` reader - Data Length Code"] -pub struct DLC_R(crate::FieldReader); -impl DLC_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - DLC_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for DLC_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `DLC` writer - Data Length Code"] -pub struct DLC_W<'a> { - w: &'a mut W, -} -impl<'a> DLC_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x0f << 12)) | ((value as u32 & 0x0f) << 12); - self.w - } -} -#[doc = "Field `PRI` reader - Transmit Priority Code"] -pub struct PRI_R(crate::FieldReader); -impl PRI_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - PRI_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PRI_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `PRI` writer - Transmit Priority Code"] -pub struct PRI_W<'a> { - w: &'a mut W, -} -impl<'a> PRI_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x0f << 4)) | ((value as u32 & 0x0f) << 4); - self.w - } -} +pub type W = crate::W; #[doc = "Field `ST` reader - Buffer Status"] -pub struct ST_R(crate::FieldReader); -impl ST_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - ST_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ST_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type StR = crate::FieldReader; #[doc = "Field `ST` writer - Buffer Status"] -pub struct ST_W<'a> { - w: &'a mut W, -} -impl<'a> ST_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0x0f) | (value as u32 & 0x0f); - self.w - } -} +pub type StW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +#[doc = "Field `PRI` reader - Transmit Priority Code"] +pub type PriR = crate::FieldReader; +#[doc = "Field `PRI` writer - Transmit Priority Code"] +pub type PriW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +#[doc = "Field `DLC` reader - Data Length Code"] +pub type DlcR = crate::FieldReader; +#[doc = "Field `DLC` writer - Data Length Code"] +pub type DlcW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { - #[doc = "Bits 12:15 - Data Length Code"] + #[doc = "Bits 0:3 - Buffer Status"] #[inline(always)] - pub fn dlc(&self) -> DLC_R { - DLC_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn st(&self) -> StR { + StR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - Transmit Priority Code"] #[inline(always)] - pub fn pri(&self) -> PRI_R { - PRI_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn pri(&self) -> PriR { + PriR::new(((self.bits >> 4) & 0x0f) as u8) } - #[doc = "Bits 0:3 - Buffer Status"] + #[doc = "Bits 12:15 - Data Length Code"] #[inline(always)] - pub fn st(&self) -> ST_R { - ST_R::new((self.bits & 0x0f) as u8) + pub fn dlc(&self) -> DlcR { + DlcR::new(((self.bits >> 12) & 0x0f) as u8) } } impl W { - #[doc = "Bits 12:15 - Data Length Code"] + #[doc = "Bits 0:3 - Buffer Status"] #[inline(always)] - pub fn dlc(&mut self) -> DLC_W { - DLC_W { w: self } + #[must_use] + pub fn st(&mut self) -> StW { + StW::new(self, 0) } #[doc = "Bits 4:7 - Transmit Priority Code"] #[inline(always)] - pub fn pri(&mut self) -> PRI_W { - PRI_W { w: self } + #[must_use] + pub fn pri(&mut self) -> PriW { + PriW::new(self, 4) } - #[doc = "Bits 0:3 - Buffer Status"] + #[doc = "Bits 12:15 - Data Length Code"] #[inline(always)] - pub fn st(&mut self) -> ST_W { - ST_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn dlc(&mut self) -> DlcW { + DlcW::new(self, 12) } } -#[doc = "Buffer Status / Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cnstat_cmb14](index.html) module"] -pub struct CNSTAT_CMB14_SPEC; -impl crate::RegisterSpec for CNSTAT_CMB14_SPEC { +#[doc = "Buffer Status / Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cnstat_cmb14::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cnstat_cmb14::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CnstatCmb14Spec; +impl crate::RegisterSpec for CnstatCmb14Spec { type Ux = u32; } -#[doc = "`read()` method returns [cnstat_cmb14::R](R) reader structure"] -impl crate::Readable for CNSTAT_CMB14_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cnstat_cmb14::W](W) writer structure"] -impl crate::Writable for CNSTAT_CMB14_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`cnstat_cmb14::R`](R) reader structure"] +impl crate::Readable for CnstatCmb14Spec {} +#[doc = "`write(|w| ..)` method takes [`cnstat_cmb14::W`](W) writer structure"] +impl crate::Writable for CnstatCmb14Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CNSTAT_CMB14 to value 0"] -impl crate::Resettable for CNSTAT_CMB14_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for CnstatCmb14Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/cnstat_cmb2.rs b/va416xx/src/can0/cnstat_cmb2.rs index 68e4d04..09fe0d6 100644 --- a/va416xx/src/can0/cnstat_cmb2.rs +++ b/va416xx/src/can0/cnstat_cmb2.rs @@ -1,177 +1,70 @@ #[doc = "Register `CNSTAT_CMB2` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CNSTAT_CMB2` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `DLC` reader - Data Length Code"] -pub struct DLC_R(crate::FieldReader); -impl DLC_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - DLC_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for DLC_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `DLC` writer - Data Length Code"] -pub struct DLC_W<'a> { - w: &'a mut W, -} -impl<'a> DLC_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x0f << 12)) | ((value as u32 & 0x0f) << 12); - self.w - } -} -#[doc = "Field `PRI` reader - Transmit Priority Code"] -pub struct PRI_R(crate::FieldReader); -impl PRI_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - PRI_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PRI_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `PRI` writer - Transmit Priority Code"] -pub struct PRI_W<'a> { - w: &'a mut W, -} -impl<'a> PRI_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x0f << 4)) | ((value as u32 & 0x0f) << 4); - self.w - } -} +pub type W = crate::W; #[doc = "Field `ST` reader - Buffer Status"] -pub struct ST_R(crate::FieldReader); -impl ST_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - ST_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ST_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type StR = crate::FieldReader; #[doc = "Field `ST` writer - Buffer Status"] -pub struct ST_W<'a> { - w: &'a mut W, -} -impl<'a> ST_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0x0f) | (value as u32 & 0x0f); - self.w - } -} +pub type StW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +#[doc = "Field `PRI` reader - Transmit Priority Code"] +pub type PriR = crate::FieldReader; +#[doc = "Field `PRI` writer - Transmit Priority Code"] +pub type PriW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +#[doc = "Field `DLC` reader - Data Length Code"] +pub type DlcR = crate::FieldReader; +#[doc = "Field `DLC` writer - Data Length Code"] +pub type DlcW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { - #[doc = "Bits 12:15 - Data Length Code"] + #[doc = "Bits 0:3 - Buffer Status"] #[inline(always)] - pub fn dlc(&self) -> DLC_R { - DLC_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn st(&self) -> StR { + StR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - Transmit Priority Code"] #[inline(always)] - pub fn pri(&self) -> PRI_R { - PRI_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn pri(&self) -> PriR { + PriR::new(((self.bits >> 4) & 0x0f) as u8) } - #[doc = "Bits 0:3 - Buffer Status"] + #[doc = "Bits 12:15 - Data Length Code"] #[inline(always)] - pub fn st(&self) -> ST_R { - ST_R::new((self.bits & 0x0f) as u8) + pub fn dlc(&self) -> DlcR { + DlcR::new(((self.bits >> 12) & 0x0f) as u8) } } impl W { - #[doc = "Bits 12:15 - Data Length Code"] + #[doc = "Bits 0:3 - Buffer Status"] #[inline(always)] - pub fn dlc(&mut self) -> DLC_W { - DLC_W { w: self } + #[must_use] + pub fn st(&mut self) -> StW { + StW::new(self, 0) } #[doc = "Bits 4:7 - Transmit Priority Code"] #[inline(always)] - pub fn pri(&mut self) -> PRI_W { - PRI_W { w: self } + #[must_use] + pub fn pri(&mut self) -> PriW { + PriW::new(self, 4) } - #[doc = "Bits 0:3 - Buffer Status"] + #[doc = "Bits 12:15 - Data Length Code"] #[inline(always)] - pub fn st(&mut self) -> ST_W { - ST_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn dlc(&mut self) -> DlcW { + DlcW::new(self, 12) } } -#[doc = "Buffer Status / Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cnstat_cmb2](index.html) module"] -pub struct CNSTAT_CMB2_SPEC; -impl crate::RegisterSpec for CNSTAT_CMB2_SPEC { +#[doc = "Buffer Status / Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cnstat_cmb2::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cnstat_cmb2::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CnstatCmb2Spec; +impl crate::RegisterSpec for CnstatCmb2Spec { type Ux = u32; } -#[doc = "`read()` method returns [cnstat_cmb2::R](R) reader structure"] -impl crate::Readable for CNSTAT_CMB2_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cnstat_cmb2::W](W) writer structure"] -impl crate::Writable for CNSTAT_CMB2_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`cnstat_cmb2::R`](R) reader structure"] +impl crate::Readable for CnstatCmb2Spec {} +#[doc = "`write(|w| ..)` method takes [`cnstat_cmb2::W`](W) writer structure"] +impl crate::Writable for CnstatCmb2Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CNSTAT_CMB2 to value 0"] -impl crate::Resettable for CNSTAT_CMB2_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for CnstatCmb2Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/cnstat_cmb3.rs b/va416xx/src/can0/cnstat_cmb3.rs index f0b91d5..47e5a1d 100644 --- a/va416xx/src/can0/cnstat_cmb3.rs +++ b/va416xx/src/can0/cnstat_cmb3.rs @@ -1,177 +1,70 @@ #[doc = "Register `CNSTAT_CMB3` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CNSTAT_CMB3` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `DLC` reader - Data Length Code"] -pub struct DLC_R(crate::FieldReader); -impl DLC_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - DLC_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for DLC_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `DLC` writer - Data Length Code"] -pub struct DLC_W<'a> { - w: &'a mut W, -} -impl<'a> DLC_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x0f << 12)) | ((value as u32 & 0x0f) << 12); - self.w - } -} -#[doc = "Field `PRI` reader - Transmit Priority Code"] -pub struct PRI_R(crate::FieldReader); -impl PRI_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - PRI_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PRI_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `PRI` writer - Transmit Priority Code"] -pub struct PRI_W<'a> { - w: &'a mut W, -} -impl<'a> PRI_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x0f << 4)) | ((value as u32 & 0x0f) << 4); - self.w - } -} +pub type W = crate::W; #[doc = "Field `ST` reader - Buffer Status"] -pub struct ST_R(crate::FieldReader); -impl ST_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - ST_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ST_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type StR = crate::FieldReader; #[doc = "Field `ST` writer - Buffer Status"] -pub struct ST_W<'a> { - w: &'a mut W, -} -impl<'a> ST_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0x0f) | (value as u32 & 0x0f); - self.w - } -} +pub type StW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +#[doc = "Field `PRI` reader - Transmit Priority Code"] +pub type PriR = crate::FieldReader; +#[doc = "Field `PRI` writer - Transmit Priority Code"] +pub type PriW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +#[doc = "Field `DLC` reader - Data Length Code"] +pub type DlcR = crate::FieldReader; +#[doc = "Field `DLC` writer - Data Length Code"] +pub type DlcW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { - #[doc = "Bits 12:15 - Data Length Code"] + #[doc = "Bits 0:3 - Buffer Status"] #[inline(always)] - pub fn dlc(&self) -> DLC_R { - DLC_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn st(&self) -> StR { + StR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - Transmit Priority Code"] #[inline(always)] - pub fn pri(&self) -> PRI_R { - PRI_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn pri(&self) -> PriR { + PriR::new(((self.bits >> 4) & 0x0f) as u8) } - #[doc = "Bits 0:3 - Buffer Status"] + #[doc = "Bits 12:15 - Data Length Code"] #[inline(always)] - pub fn st(&self) -> ST_R { - ST_R::new((self.bits & 0x0f) as u8) + pub fn dlc(&self) -> DlcR { + DlcR::new(((self.bits >> 12) & 0x0f) as u8) } } impl W { - #[doc = "Bits 12:15 - Data Length Code"] + #[doc = "Bits 0:3 - Buffer Status"] #[inline(always)] - pub fn dlc(&mut self) -> DLC_W { - DLC_W { w: self } + #[must_use] + pub fn st(&mut self) -> StW { + StW::new(self, 0) } #[doc = "Bits 4:7 - Transmit Priority Code"] #[inline(always)] - pub fn pri(&mut self) -> PRI_W { - PRI_W { w: self } + #[must_use] + pub fn pri(&mut self) -> PriW { + PriW::new(self, 4) } - #[doc = "Bits 0:3 - Buffer Status"] + #[doc = "Bits 12:15 - Data Length Code"] #[inline(always)] - pub fn st(&mut self) -> ST_W { - ST_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn dlc(&mut self) -> DlcW { + DlcW::new(self, 12) } } -#[doc = "Buffer Status / Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cnstat_cmb3](index.html) module"] -pub struct CNSTAT_CMB3_SPEC; -impl crate::RegisterSpec for CNSTAT_CMB3_SPEC { +#[doc = "Buffer Status / Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cnstat_cmb3::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cnstat_cmb3::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CnstatCmb3Spec; +impl crate::RegisterSpec for CnstatCmb3Spec { type Ux = u32; } -#[doc = "`read()` method returns [cnstat_cmb3::R](R) reader structure"] -impl crate::Readable for CNSTAT_CMB3_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cnstat_cmb3::W](W) writer structure"] -impl crate::Writable for CNSTAT_CMB3_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`cnstat_cmb3::R`](R) reader structure"] +impl crate::Readable for CnstatCmb3Spec {} +#[doc = "`write(|w| ..)` method takes [`cnstat_cmb3::W`](W) writer structure"] +impl crate::Writable for CnstatCmb3Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CNSTAT_CMB3 to value 0"] -impl crate::Resettable for CNSTAT_CMB3_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for CnstatCmb3Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/cnstat_cmb4.rs b/va416xx/src/can0/cnstat_cmb4.rs index edced8d..303896d 100644 --- a/va416xx/src/can0/cnstat_cmb4.rs +++ b/va416xx/src/can0/cnstat_cmb4.rs @@ -1,177 +1,70 @@ #[doc = "Register `CNSTAT_CMB4` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CNSTAT_CMB4` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `DLC` reader - Data Length Code"] -pub struct DLC_R(crate::FieldReader); -impl DLC_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - DLC_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for DLC_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `DLC` writer - Data Length Code"] -pub struct DLC_W<'a> { - w: &'a mut W, -} -impl<'a> DLC_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x0f << 12)) | ((value as u32 & 0x0f) << 12); - self.w - } -} -#[doc = "Field `PRI` reader - Transmit Priority Code"] -pub struct PRI_R(crate::FieldReader); -impl PRI_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - PRI_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PRI_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `PRI` writer - Transmit Priority Code"] -pub struct PRI_W<'a> { - w: &'a mut W, -} -impl<'a> PRI_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x0f << 4)) | ((value as u32 & 0x0f) << 4); - self.w - } -} +pub type W = crate::W; #[doc = "Field `ST` reader - Buffer Status"] -pub struct ST_R(crate::FieldReader); -impl ST_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - ST_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ST_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type StR = crate::FieldReader; #[doc = "Field `ST` writer - Buffer Status"] -pub struct ST_W<'a> { - w: &'a mut W, -} -impl<'a> ST_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0x0f) | (value as u32 & 0x0f); - self.w - } -} +pub type StW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +#[doc = "Field `PRI` reader - Transmit Priority Code"] +pub type PriR = crate::FieldReader; +#[doc = "Field `PRI` writer - Transmit Priority Code"] +pub type PriW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +#[doc = "Field `DLC` reader - Data Length Code"] +pub type DlcR = crate::FieldReader; +#[doc = "Field `DLC` writer - Data Length Code"] +pub type DlcW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { - #[doc = "Bits 12:15 - Data Length Code"] + #[doc = "Bits 0:3 - Buffer Status"] #[inline(always)] - pub fn dlc(&self) -> DLC_R { - DLC_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn st(&self) -> StR { + StR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - Transmit Priority Code"] #[inline(always)] - pub fn pri(&self) -> PRI_R { - PRI_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn pri(&self) -> PriR { + PriR::new(((self.bits >> 4) & 0x0f) as u8) } - #[doc = "Bits 0:3 - Buffer Status"] + #[doc = "Bits 12:15 - Data Length Code"] #[inline(always)] - pub fn st(&self) -> ST_R { - ST_R::new((self.bits & 0x0f) as u8) + pub fn dlc(&self) -> DlcR { + DlcR::new(((self.bits >> 12) & 0x0f) as u8) } } impl W { - #[doc = "Bits 12:15 - Data Length Code"] + #[doc = "Bits 0:3 - Buffer Status"] #[inline(always)] - pub fn dlc(&mut self) -> DLC_W { - DLC_W { w: self } + #[must_use] + pub fn st(&mut self) -> StW { + StW::new(self, 0) } #[doc = "Bits 4:7 - Transmit Priority Code"] #[inline(always)] - pub fn pri(&mut self) -> PRI_W { - PRI_W { w: self } + #[must_use] + pub fn pri(&mut self) -> PriW { + PriW::new(self, 4) } - #[doc = "Bits 0:3 - Buffer Status"] + #[doc = "Bits 12:15 - Data Length Code"] #[inline(always)] - pub fn st(&mut self) -> ST_W { - ST_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn dlc(&mut self) -> DlcW { + DlcW::new(self, 12) } } -#[doc = "Buffer Status / Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cnstat_cmb4](index.html) module"] -pub struct CNSTAT_CMB4_SPEC; -impl crate::RegisterSpec for CNSTAT_CMB4_SPEC { +#[doc = "Buffer Status / Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cnstat_cmb4::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cnstat_cmb4::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CnstatCmb4Spec; +impl crate::RegisterSpec for CnstatCmb4Spec { type Ux = u32; } -#[doc = "`read()` method returns [cnstat_cmb4::R](R) reader structure"] -impl crate::Readable for CNSTAT_CMB4_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cnstat_cmb4::W](W) writer structure"] -impl crate::Writable for CNSTAT_CMB4_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`cnstat_cmb4::R`](R) reader structure"] +impl crate::Readable for CnstatCmb4Spec {} +#[doc = "`write(|w| ..)` method takes [`cnstat_cmb4::W`](W) writer structure"] +impl crate::Writable for CnstatCmb4Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CNSTAT_CMB4 to value 0"] -impl crate::Resettable for CNSTAT_CMB4_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for CnstatCmb4Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/cnstat_cmb5.rs b/va416xx/src/can0/cnstat_cmb5.rs index 2f68875..062e973 100644 --- a/va416xx/src/can0/cnstat_cmb5.rs +++ b/va416xx/src/can0/cnstat_cmb5.rs @@ -1,177 +1,70 @@ #[doc = "Register `CNSTAT_CMB5` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CNSTAT_CMB5` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `DLC` reader - Data Length Code"] -pub struct DLC_R(crate::FieldReader); -impl DLC_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - DLC_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for DLC_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `DLC` writer - Data Length Code"] -pub struct DLC_W<'a> { - w: &'a mut W, -} -impl<'a> DLC_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x0f << 12)) | ((value as u32 & 0x0f) << 12); - self.w - } -} -#[doc = "Field `PRI` reader - Transmit Priority Code"] -pub struct PRI_R(crate::FieldReader); -impl PRI_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - PRI_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PRI_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `PRI` writer - Transmit Priority Code"] -pub struct PRI_W<'a> { - w: &'a mut W, -} -impl<'a> PRI_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x0f << 4)) | ((value as u32 & 0x0f) << 4); - self.w - } -} +pub type W = crate::W; #[doc = "Field `ST` reader - Buffer Status"] -pub struct ST_R(crate::FieldReader); -impl ST_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - ST_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ST_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type StR = crate::FieldReader; #[doc = "Field `ST` writer - Buffer Status"] -pub struct ST_W<'a> { - w: &'a mut W, -} -impl<'a> ST_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0x0f) | (value as u32 & 0x0f); - self.w - } -} +pub type StW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +#[doc = "Field `PRI` reader - Transmit Priority Code"] +pub type PriR = crate::FieldReader; +#[doc = "Field `PRI` writer - Transmit Priority Code"] +pub type PriW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +#[doc = "Field `DLC` reader - Data Length Code"] +pub type DlcR = crate::FieldReader; +#[doc = "Field `DLC` writer - Data Length Code"] +pub type DlcW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { - #[doc = "Bits 12:15 - Data Length Code"] + #[doc = "Bits 0:3 - Buffer Status"] #[inline(always)] - pub fn dlc(&self) -> DLC_R { - DLC_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn st(&self) -> StR { + StR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - Transmit Priority Code"] #[inline(always)] - pub fn pri(&self) -> PRI_R { - PRI_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn pri(&self) -> PriR { + PriR::new(((self.bits >> 4) & 0x0f) as u8) } - #[doc = "Bits 0:3 - Buffer Status"] + #[doc = "Bits 12:15 - Data Length Code"] #[inline(always)] - pub fn st(&self) -> ST_R { - ST_R::new((self.bits & 0x0f) as u8) + pub fn dlc(&self) -> DlcR { + DlcR::new(((self.bits >> 12) & 0x0f) as u8) } } impl W { - #[doc = "Bits 12:15 - Data Length Code"] + #[doc = "Bits 0:3 - Buffer Status"] #[inline(always)] - pub fn dlc(&mut self) -> DLC_W { - DLC_W { w: self } + #[must_use] + pub fn st(&mut self) -> StW { + StW::new(self, 0) } #[doc = "Bits 4:7 - Transmit Priority Code"] #[inline(always)] - pub fn pri(&mut self) -> PRI_W { - PRI_W { w: self } + #[must_use] + pub fn pri(&mut self) -> PriW { + PriW::new(self, 4) } - #[doc = "Bits 0:3 - Buffer Status"] + #[doc = "Bits 12:15 - Data Length Code"] #[inline(always)] - pub fn st(&mut self) -> ST_W { - ST_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn dlc(&mut self) -> DlcW { + DlcW::new(self, 12) } } -#[doc = "Buffer Status / Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cnstat_cmb5](index.html) module"] -pub struct CNSTAT_CMB5_SPEC; -impl crate::RegisterSpec for CNSTAT_CMB5_SPEC { +#[doc = "Buffer Status / Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cnstat_cmb5::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cnstat_cmb5::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CnstatCmb5Spec; +impl crate::RegisterSpec for CnstatCmb5Spec { type Ux = u32; } -#[doc = "`read()` method returns [cnstat_cmb5::R](R) reader structure"] -impl crate::Readable for CNSTAT_CMB5_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cnstat_cmb5::W](W) writer structure"] -impl crate::Writable for CNSTAT_CMB5_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`cnstat_cmb5::R`](R) reader structure"] +impl crate::Readable for CnstatCmb5Spec {} +#[doc = "`write(|w| ..)` method takes [`cnstat_cmb5::W`](W) writer structure"] +impl crate::Writable for CnstatCmb5Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CNSTAT_CMB5 to value 0"] -impl crate::Resettable for CNSTAT_CMB5_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for CnstatCmb5Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/cnstat_cmb6.rs b/va416xx/src/can0/cnstat_cmb6.rs index dfa33da..02e2117 100644 --- a/va416xx/src/can0/cnstat_cmb6.rs +++ b/va416xx/src/can0/cnstat_cmb6.rs @@ -1,177 +1,70 @@ #[doc = "Register `CNSTAT_CMB6` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CNSTAT_CMB6` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `DLC` reader - Data Length Code"] -pub struct DLC_R(crate::FieldReader); -impl DLC_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - DLC_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for DLC_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `DLC` writer - Data Length Code"] -pub struct DLC_W<'a> { - w: &'a mut W, -} -impl<'a> DLC_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x0f << 12)) | ((value as u32 & 0x0f) << 12); - self.w - } -} -#[doc = "Field `PRI` reader - Transmit Priority Code"] -pub struct PRI_R(crate::FieldReader); -impl PRI_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - PRI_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PRI_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `PRI` writer - Transmit Priority Code"] -pub struct PRI_W<'a> { - w: &'a mut W, -} -impl<'a> PRI_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x0f << 4)) | ((value as u32 & 0x0f) << 4); - self.w - } -} +pub type W = crate::W; #[doc = "Field `ST` reader - Buffer Status"] -pub struct ST_R(crate::FieldReader); -impl ST_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - ST_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ST_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type StR = crate::FieldReader; #[doc = "Field `ST` writer - Buffer Status"] -pub struct ST_W<'a> { - w: &'a mut W, -} -impl<'a> ST_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0x0f) | (value as u32 & 0x0f); - self.w - } -} +pub type StW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +#[doc = "Field `PRI` reader - Transmit Priority Code"] +pub type PriR = crate::FieldReader; +#[doc = "Field `PRI` writer - Transmit Priority Code"] +pub type PriW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +#[doc = "Field `DLC` reader - Data Length Code"] +pub type DlcR = crate::FieldReader; +#[doc = "Field `DLC` writer - Data Length Code"] +pub type DlcW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { - #[doc = "Bits 12:15 - Data Length Code"] + #[doc = "Bits 0:3 - Buffer Status"] #[inline(always)] - pub fn dlc(&self) -> DLC_R { - DLC_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn st(&self) -> StR { + StR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - Transmit Priority Code"] #[inline(always)] - pub fn pri(&self) -> PRI_R { - PRI_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn pri(&self) -> PriR { + PriR::new(((self.bits >> 4) & 0x0f) as u8) } - #[doc = "Bits 0:3 - Buffer Status"] + #[doc = "Bits 12:15 - Data Length Code"] #[inline(always)] - pub fn st(&self) -> ST_R { - ST_R::new((self.bits & 0x0f) as u8) + pub fn dlc(&self) -> DlcR { + DlcR::new(((self.bits >> 12) & 0x0f) as u8) } } impl W { - #[doc = "Bits 12:15 - Data Length Code"] + #[doc = "Bits 0:3 - Buffer Status"] #[inline(always)] - pub fn dlc(&mut self) -> DLC_W { - DLC_W { w: self } + #[must_use] + pub fn st(&mut self) -> StW { + StW::new(self, 0) } #[doc = "Bits 4:7 - Transmit Priority Code"] #[inline(always)] - pub fn pri(&mut self) -> PRI_W { - PRI_W { w: self } + #[must_use] + pub fn pri(&mut self) -> PriW { + PriW::new(self, 4) } - #[doc = "Bits 0:3 - Buffer Status"] + #[doc = "Bits 12:15 - Data Length Code"] #[inline(always)] - pub fn st(&mut self) -> ST_W { - ST_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn dlc(&mut self) -> DlcW { + DlcW::new(self, 12) } } -#[doc = "Buffer Status / Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cnstat_cmb6](index.html) module"] -pub struct CNSTAT_CMB6_SPEC; -impl crate::RegisterSpec for CNSTAT_CMB6_SPEC { +#[doc = "Buffer Status / Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cnstat_cmb6::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cnstat_cmb6::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CnstatCmb6Spec; +impl crate::RegisterSpec for CnstatCmb6Spec { type Ux = u32; } -#[doc = "`read()` method returns [cnstat_cmb6::R](R) reader structure"] -impl crate::Readable for CNSTAT_CMB6_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cnstat_cmb6::W](W) writer structure"] -impl crate::Writable for CNSTAT_CMB6_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`cnstat_cmb6::R`](R) reader structure"] +impl crate::Readable for CnstatCmb6Spec {} +#[doc = "`write(|w| ..)` method takes [`cnstat_cmb6::W`](W) writer structure"] +impl crate::Writable for CnstatCmb6Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CNSTAT_CMB6 to value 0"] -impl crate::Resettable for CNSTAT_CMB6_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for CnstatCmb6Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/cnstat_cmb7.rs b/va416xx/src/can0/cnstat_cmb7.rs index 5ce5387..d092f65 100644 --- a/va416xx/src/can0/cnstat_cmb7.rs +++ b/va416xx/src/can0/cnstat_cmb7.rs @@ -1,177 +1,70 @@ #[doc = "Register `CNSTAT_CMB7` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CNSTAT_CMB7` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `DLC` reader - Data Length Code"] -pub struct DLC_R(crate::FieldReader); -impl DLC_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - DLC_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for DLC_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `DLC` writer - Data Length Code"] -pub struct DLC_W<'a> { - w: &'a mut W, -} -impl<'a> DLC_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x0f << 12)) | ((value as u32 & 0x0f) << 12); - self.w - } -} -#[doc = "Field `PRI` reader - Transmit Priority Code"] -pub struct PRI_R(crate::FieldReader); -impl PRI_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - PRI_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PRI_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `PRI` writer - Transmit Priority Code"] -pub struct PRI_W<'a> { - w: &'a mut W, -} -impl<'a> PRI_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x0f << 4)) | ((value as u32 & 0x0f) << 4); - self.w - } -} +pub type W = crate::W; #[doc = "Field `ST` reader - Buffer Status"] -pub struct ST_R(crate::FieldReader); -impl ST_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - ST_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ST_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type StR = crate::FieldReader; #[doc = "Field `ST` writer - Buffer Status"] -pub struct ST_W<'a> { - w: &'a mut W, -} -impl<'a> ST_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0x0f) | (value as u32 & 0x0f); - self.w - } -} +pub type StW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +#[doc = "Field `PRI` reader - Transmit Priority Code"] +pub type PriR = crate::FieldReader; +#[doc = "Field `PRI` writer - Transmit Priority Code"] +pub type PriW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +#[doc = "Field `DLC` reader - Data Length Code"] +pub type DlcR = crate::FieldReader; +#[doc = "Field `DLC` writer - Data Length Code"] +pub type DlcW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { - #[doc = "Bits 12:15 - Data Length Code"] + #[doc = "Bits 0:3 - Buffer Status"] #[inline(always)] - pub fn dlc(&self) -> DLC_R { - DLC_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn st(&self) -> StR { + StR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - Transmit Priority Code"] #[inline(always)] - pub fn pri(&self) -> PRI_R { - PRI_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn pri(&self) -> PriR { + PriR::new(((self.bits >> 4) & 0x0f) as u8) } - #[doc = "Bits 0:3 - Buffer Status"] + #[doc = "Bits 12:15 - Data Length Code"] #[inline(always)] - pub fn st(&self) -> ST_R { - ST_R::new((self.bits & 0x0f) as u8) + pub fn dlc(&self) -> DlcR { + DlcR::new(((self.bits >> 12) & 0x0f) as u8) } } impl W { - #[doc = "Bits 12:15 - Data Length Code"] + #[doc = "Bits 0:3 - Buffer Status"] #[inline(always)] - pub fn dlc(&mut self) -> DLC_W { - DLC_W { w: self } + #[must_use] + pub fn st(&mut self) -> StW { + StW::new(self, 0) } #[doc = "Bits 4:7 - Transmit Priority Code"] #[inline(always)] - pub fn pri(&mut self) -> PRI_W { - PRI_W { w: self } + #[must_use] + pub fn pri(&mut self) -> PriW { + PriW::new(self, 4) } - #[doc = "Bits 0:3 - Buffer Status"] + #[doc = "Bits 12:15 - Data Length Code"] #[inline(always)] - pub fn st(&mut self) -> ST_W { - ST_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn dlc(&mut self) -> DlcW { + DlcW::new(self, 12) } } -#[doc = "Buffer Status / Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cnstat_cmb7](index.html) module"] -pub struct CNSTAT_CMB7_SPEC; -impl crate::RegisterSpec for CNSTAT_CMB7_SPEC { +#[doc = "Buffer Status / Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cnstat_cmb7::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cnstat_cmb7::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CnstatCmb7Spec; +impl crate::RegisterSpec for CnstatCmb7Spec { type Ux = u32; } -#[doc = "`read()` method returns [cnstat_cmb7::R](R) reader structure"] -impl crate::Readable for CNSTAT_CMB7_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cnstat_cmb7::W](W) writer structure"] -impl crate::Writable for CNSTAT_CMB7_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`cnstat_cmb7::R`](R) reader structure"] +impl crate::Readable for CnstatCmb7Spec {} +#[doc = "`write(|w| ..)` method takes [`cnstat_cmb7::W`](W) writer structure"] +impl crate::Writable for CnstatCmb7Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CNSTAT_CMB7 to value 0"] -impl crate::Resettable for CNSTAT_CMB7_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for CnstatCmb7Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/cnstat_cmb8.rs b/va416xx/src/can0/cnstat_cmb8.rs index 130f332..20d4336 100644 --- a/va416xx/src/can0/cnstat_cmb8.rs +++ b/va416xx/src/can0/cnstat_cmb8.rs @@ -1,177 +1,70 @@ #[doc = "Register `CNSTAT_CMB8` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CNSTAT_CMB8` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `DLC` reader - Data Length Code"] -pub struct DLC_R(crate::FieldReader); -impl DLC_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - DLC_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for DLC_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `DLC` writer - Data Length Code"] -pub struct DLC_W<'a> { - w: &'a mut W, -} -impl<'a> DLC_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x0f << 12)) | ((value as u32 & 0x0f) << 12); - self.w - } -} -#[doc = "Field `PRI` reader - Transmit Priority Code"] -pub struct PRI_R(crate::FieldReader); -impl PRI_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - PRI_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PRI_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `PRI` writer - Transmit Priority Code"] -pub struct PRI_W<'a> { - w: &'a mut W, -} -impl<'a> PRI_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x0f << 4)) | ((value as u32 & 0x0f) << 4); - self.w - } -} +pub type W = crate::W; #[doc = "Field `ST` reader - Buffer Status"] -pub struct ST_R(crate::FieldReader); -impl ST_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - ST_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ST_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type StR = crate::FieldReader; #[doc = "Field `ST` writer - Buffer Status"] -pub struct ST_W<'a> { - w: &'a mut W, -} -impl<'a> ST_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0x0f) | (value as u32 & 0x0f); - self.w - } -} +pub type StW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +#[doc = "Field `PRI` reader - Transmit Priority Code"] +pub type PriR = crate::FieldReader; +#[doc = "Field `PRI` writer - Transmit Priority Code"] +pub type PriW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +#[doc = "Field `DLC` reader - Data Length Code"] +pub type DlcR = crate::FieldReader; +#[doc = "Field `DLC` writer - Data Length Code"] +pub type DlcW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { - #[doc = "Bits 12:15 - Data Length Code"] + #[doc = "Bits 0:3 - Buffer Status"] #[inline(always)] - pub fn dlc(&self) -> DLC_R { - DLC_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn st(&self) -> StR { + StR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - Transmit Priority Code"] #[inline(always)] - pub fn pri(&self) -> PRI_R { - PRI_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn pri(&self) -> PriR { + PriR::new(((self.bits >> 4) & 0x0f) as u8) } - #[doc = "Bits 0:3 - Buffer Status"] + #[doc = "Bits 12:15 - Data Length Code"] #[inline(always)] - pub fn st(&self) -> ST_R { - ST_R::new((self.bits & 0x0f) as u8) + pub fn dlc(&self) -> DlcR { + DlcR::new(((self.bits >> 12) & 0x0f) as u8) } } impl W { - #[doc = "Bits 12:15 - Data Length Code"] + #[doc = "Bits 0:3 - Buffer Status"] #[inline(always)] - pub fn dlc(&mut self) -> DLC_W { - DLC_W { w: self } + #[must_use] + pub fn st(&mut self) -> StW { + StW::new(self, 0) } #[doc = "Bits 4:7 - Transmit Priority Code"] #[inline(always)] - pub fn pri(&mut self) -> PRI_W { - PRI_W { w: self } + #[must_use] + pub fn pri(&mut self) -> PriW { + PriW::new(self, 4) } - #[doc = "Bits 0:3 - Buffer Status"] + #[doc = "Bits 12:15 - Data Length Code"] #[inline(always)] - pub fn st(&mut self) -> ST_W { - ST_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn dlc(&mut self) -> DlcW { + DlcW::new(self, 12) } } -#[doc = "Buffer Status / Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cnstat_cmb8](index.html) module"] -pub struct CNSTAT_CMB8_SPEC; -impl crate::RegisterSpec for CNSTAT_CMB8_SPEC { +#[doc = "Buffer Status / Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cnstat_cmb8::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cnstat_cmb8::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CnstatCmb8Spec; +impl crate::RegisterSpec for CnstatCmb8Spec { type Ux = u32; } -#[doc = "`read()` method returns [cnstat_cmb8::R](R) reader structure"] -impl crate::Readable for CNSTAT_CMB8_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cnstat_cmb8::W](W) writer structure"] -impl crate::Writable for CNSTAT_CMB8_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`cnstat_cmb8::R`](R) reader structure"] +impl crate::Readable for CnstatCmb8Spec {} +#[doc = "`write(|w| ..)` method takes [`cnstat_cmb8::W`](W) writer structure"] +impl crate::Writable for CnstatCmb8Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CNSTAT_CMB8 to value 0"] -impl crate::Resettable for CNSTAT_CMB8_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for CnstatCmb8Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/cnstat_cmb9.rs b/va416xx/src/can0/cnstat_cmb9.rs index ed021fa..32dc7bb 100644 --- a/va416xx/src/can0/cnstat_cmb9.rs +++ b/va416xx/src/can0/cnstat_cmb9.rs @@ -1,177 +1,70 @@ #[doc = "Register `CNSTAT_CMB9` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CNSTAT_CMB9` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `DLC` reader - Data Length Code"] -pub struct DLC_R(crate::FieldReader); -impl DLC_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - DLC_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for DLC_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `DLC` writer - Data Length Code"] -pub struct DLC_W<'a> { - w: &'a mut W, -} -impl<'a> DLC_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x0f << 12)) | ((value as u32 & 0x0f) << 12); - self.w - } -} -#[doc = "Field `PRI` reader - Transmit Priority Code"] -pub struct PRI_R(crate::FieldReader); -impl PRI_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - PRI_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PRI_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `PRI` writer - Transmit Priority Code"] -pub struct PRI_W<'a> { - w: &'a mut W, -} -impl<'a> PRI_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x0f << 4)) | ((value as u32 & 0x0f) << 4); - self.w - } -} +pub type W = crate::W; #[doc = "Field `ST` reader - Buffer Status"] -pub struct ST_R(crate::FieldReader); -impl ST_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - ST_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ST_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type StR = crate::FieldReader; #[doc = "Field `ST` writer - Buffer Status"] -pub struct ST_W<'a> { - w: &'a mut W, -} -impl<'a> ST_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0x0f) | (value as u32 & 0x0f); - self.w - } -} +pub type StW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +#[doc = "Field `PRI` reader - Transmit Priority Code"] +pub type PriR = crate::FieldReader; +#[doc = "Field `PRI` writer - Transmit Priority Code"] +pub type PriW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +#[doc = "Field `DLC` reader - Data Length Code"] +pub type DlcR = crate::FieldReader; +#[doc = "Field `DLC` writer - Data Length Code"] +pub type DlcW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { - #[doc = "Bits 12:15 - Data Length Code"] + #[doc = "Bits 0:3 - Buffer Status"] #[inline(always)] - pub fn dlc(&self) -> DLC_R { - DLC_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn st(&self) -> StR { + StR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - Transmit Priority Code"] #[inline(always)] - pub fn pri(&self) -> PRI_R { - PRI_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn pri(&self) -> PriR { + PriR::new(((self.bits >> 4) & 0x0f) as u8) } - #[doc = "Bits 0:3 - Buffer Status"] + #[doc = "Bits 12:15 - Data Length Code"] #[inline(always)] - pub fn st(&self) -> ST_R { - ST_R::new((self.bits & 0x0f) as u8) + pub fn dlc(&self) -> DlcR { + DlcR::new(((self.bits >> 12) & 0x0f) as u8) } } impl W { - #[doc = "Bits 12:15 - Data Length Code"] + #[doc = "Bits 0:3 - Buffer Status"] #[inline(always)] - pub fn dlc(&mut self) -> DLC_W { - DLC_W { w: self } + #[must_use] + pub fn st(&mut self) -> StW { + StW::new(self, 0) } #[doc = "Bits 4:7 - Transmit Priority Code"] #[inline(always)] - pub fn pri(&mut self) -> PRI_W { - PRI_W { w: self } + #[must_use] + pub fn pri(&mut self) -> PriW { + PriW::new(self, 4) } - #[doc = "Bits 0:3 - Buffer Status"] + #[doc = "Bits 12:15 - Data Length Code"] #[inline(always)] - pub fn st(&mut self) -> ST_W { - ST_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn dlc(&mut self) -> DlcW { + DlcW::new(self, 12) } } -#[doc = "Buffer Status / Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cnstat_cmb9](index.html) module"] -pub struct CNSTAT_CMB9_SPEC; -impl crate::RegisterSpec for CNSTAT_CMB9_SPEC { +#[doc = "Buffer Status / Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cnstat_cmb9::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cnstat_cmb9::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CnstatCmb9Spec; +impl crate::RegisterSpec for CnstatCmb9Spec { type Ux = u32; } -#[doc = "`read()` method returns [cnstat_cmb9::R](R) reader structure"] -impl crate::Readable for CNSTAT_CMB9_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cnstat_cmb9::W](W) writer structure"] -impl crate::Writable for CNSTAT_CMB9_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`cnstat_cmb9::R`](R) reader structure"] +impl crate::Readable for CnstatCmb9Spec {} +#[doc = "`write(|w| ..)` method takes [`cnstat_cmb9::W`](W) writer structure"] +impl crate::Writable for CnstatCmb9Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CNSTAT_CMB9 to value 0"] -impl crate::Resettable for CNSTAT_CMB9_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for CnstatCmb9Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/cnstat_hcmb.rs b/va416xx/src/can0/cnstat_hcmb.rs index a7bdd05..1b6bd9f 100644 --- a/va416xx/src/can0/cnstat_hcmb.rs +++ b/va416xx/src/can0/cnstat_hcmb.rs @@ -1,177 +1,70 @@ #[doc = "Register `CNSTAT_HCMB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CNSTAT_HCMB` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `DLC` reader - Data Length Code"] -pub struct DLC_R(crate::FieldReader); -impl DLC_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - DLC_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for DLC_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `DLC` writer - Data Length Code"] -pub struct DLC_W<'a> { - w: &'a mut W, -} -impl<'a> DLC_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x0f << 12)) | ((value as u32 & 0x0f) << 12); - self.w - } -} -#[doc = "Field `PRI` reader - Transmit Priority Code"] -pub struct PRI_R(crate::FieldReader); -impl PRI_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - PRI_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PRI_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `PRI` writer - Transmit Priority Code"] -pub struct PRI_W<'a> { - w: &'a mut W, -} -impl<'a> PRI_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x0f << 4)) | ((value as u32 & 0x0f) << 4); - self.w - } -} +pub type W = crate::W; #[doc = "Field `ST` reader - Buffer Status"] -pub struct ST_R(crate::FieldReader); -impl ST_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - ST_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ST_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type StR = crate::FieldReader; #[doc = "Field `ST` writer - Buffer Status"] -pub struct ST_W<'a> { - w: &'a mut W, -} -impl<'a> ST_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0x0f) | (value as u32 & 0x0f); - self.w - } -} +pub type StW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +#[doc = "Field `PRI` reader - Transmit Priority Code"] +pub type PriR = crate::FieldReader; +#[doc = "Field `PRI` writer - Transmit Priority Code"] +pub type PriW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +#[doc = "Field `DLC` reader - Data Length Code"] +pub type DlcR = crate::FieldReader; +#[doc = "Field `DLC` writer - Data Length Code"] +pub type DlcW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { - #[doc = "Bits 12:15 - Data Length Code"] + #[doc = "Bits 0:3 - Buffer Status"] #[inline(always)] - pub fn dlc(&self) -> DLC_R { - DLC_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn st(&self) -> StR { + StR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - Transmit Priority Code"] #[inline(always)] - pub fn pri(&self) -> PRI_R { - PRI_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn pri(&self) -> PriR { + PriR::new(((self.bits >> 4) & 0x0f) as u8) } - #[doc = "Bits 0:3 - Buffer Status"] + #[doc = "Bits 12:15 - Data Length Code"] #[inline(always)] - pub fn st(&self) -> ST_R { - ST_R::new((self.bits & 0x0f) as u8) + pub fn dlc(&self) -> DlcR { + DlcR::new(((self.bits >> 12) & 0x0f) as u8) } } impl W { - #[doc = "Bits 12:15 - Data Length Code"] + #[doc = "Bits 0:3 - Buffer Status"] #[inline(always)] - pub fn dlc(&mut self) -> DLC_W { - DLC_W { w: self } + #[must_use] + pub fn st(&mut self) -> StW { + StW::new(self, 0) } #[doc = "Bits 4:7 - Transmit Priority Code"] #[inline(always)] - pub fn pri(&mut self) -> PRI_W { - PRI_W { w: self } + #[must_use] + pub fn pri(&mut self) -> PriW { + PriW::new(self, 4) } - #[doc = "Bits 0:3 - Buffer Status"] + #[doc = "Bits 12:15 - Data Length Code"] #[inline(always)] - pub fn st(&mut self) -> ST_W { - ST_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn dlc(&mut self) -> DlcW { + DlcW::new(self, 12) } } -#[doc = "Buffer Status / Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cnstat_hcmb](index.html) module"] -pub struct CNSTAT_HCMB_SPEC; -impl crate::RegisterSpec for CNSTAT_HCMB_SPEC { +#[doc = "Buffer Status / Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cnstat_hcmb::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cnstat_hcmb::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CnstatHcmbSpec; +impl crate::RegisterSpec for CnstatHcmbSpec { type Ux = u32; } -#[doc = "`read()` method returns [cnstat_hcmb::R](R) reader structure"] -impl crate::Readable for CNSTAT_HCMB_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cnstat_hcmb::W](W) writer structure"] -impl crate::Writable for CNSTAT_HCMB_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`cnstat_hcmb::R`](R) reader structure"] +impl crate::Readable for CnstatHcmbSpec {} +#[doc = "`write(|w| ..)` method takes [`cnstat_hcmb::W`](W) writer structure"] +impl crate::Writable for CnstatHcmbSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CNSTAT_HCMB to value 0"] -impl crate::Resettable for CNSTAT_HCMB_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for CnstatHcmbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/cstpnd.rs b/va416xx/src/can0/cstpnd.rs index 1d6581e..a2c908a 100644 --- a/va416xx/src/can0/cstpnd.rs +++ b/va416xx/src/can0/cstpnd.rs @@ -1,187 +1,70 @@ #[doc = "Register `CSTPND` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CSTPND` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `NS` reader - CAN Node Status"] -pub struct NS_R(crate::FieldReader); -impl NS_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - NS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for NS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `NS` writer - CAN Node Status"] -pub struct NS_W<'a> { - w: &'a mut W, -} -impl<'a> NS_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x07 << 5)) | ((value as u32 & 0x07) << 5); - self.w - } -} -#[doc = "Field `IRQ` reader - Interrupt Request portion of Interrupt Code"] -pub struct IRQ_R(crate::FieldReader); -impl IRQ_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - IRQ_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for IRQ_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `IRQ` writer - Interrupt Request portion of Interrupt Code"] -pub struct IRQ_W<'a> { - w: &'a mut W, -} -impl<'a> IRQ_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); - self.w - } -} +pub type W = crate::W; #[doc = "Field `IST` reader - Interrupt Source portion of Interrupt Code"] -pub struct IST_R(crate::FieldReader); -impl IST_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - IST_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for IST_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type IstR = crate::FieldReader; #[doc = "Field `IST` writer - Interrupt Source portion of Interrupt Code"] -pub struct IST_W<'a> { - w: &'a mut W, -} -impl<'a> IST_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0x0f) | (value as u32 & 0x0f); - self.w - } -} +pub type IstW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +#[doc = "Field `IRQ` reader - Interrupt Request portion of Interrupt Code"] +pub type IrqR = crate::BitReader; +#[doc = "Field `IRQ` writer - Interrupt Request portion of Interrupt Code"] +pub type IrqW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `NS` reader - CAN Node Status"] +pub type NsR = crate::FieldReader; +#[doc = "Field `NS` writer - CAN Node Status"] +pub type NsW<'a, REG> = crate::FieldWriter<'a, REG, 3>; impl R { - #[doc = "Bits 5:7 - CAN Node Status"] + #[doc = "Bits 0:3 - Interrupt Source portion of Interrupt Code"] #[inline(always)] - pub fn ns(&self) -> NS_R { - NS_R::new(((self.bits >> 5) & 0x07) as u8) + pub fn ist(&self) -> IstR { + IstR::new((self.bits & 0x0f) as u8) } #[doc = "Bit 4 - Interrupt Request portion of Interrupt Code"] #[inline(always)] - pub fn irq(&self) -> IRQ_R { - IRQ_R::new(((self.bits >> 4) & 0x01) != 0) + pub fn irq(&self) -> IrqR { + IrqR::new(((self.bits >> 4) & 1) != 0) } - #[doc = "Bits 0:3 - Interrupt Source portion of Interrupt Code"] + #[doc = "Bits 5:7 - CAN Node Status"] #[inline(always)] - pub fn ist(&self) -> IST_R { - IST_R::new((self.bits & 0x0f) as u8) + pub fn ns(&self) -> NsR { + NsR::new(((self.bits >> 5) & 7) as u8) } } impl W { - #[doc = "Bits 5:7 - CAN Node Status"] + #[doc = "Bits 0:3 - Interrupt Source portion of Interrupt Code"] #[inline(always)] - pub fn ns(&mut self) -> NS_W { - NS_W { w: self } + #[must_use] + pub fn ist(&mut self) -> IstW { + IstW::new(self, 0) } #[doc = "Bit 4 - Interrupt Request portion of Interrupt Code"] #[inline(always)] - pub fn irq(&mut self) -> IRQ_W { - IRQ_W { w: self } + #[must_use] + pub fn irq(&mut self) -> IrqW { + IrqW::new(self, 4) } - #[doc = "Bits 0:3 - Interrupt Source portion of Interrupt Code"] + #[doc = "Bits 5:7 - CAN Node Status"] #[inline(always)] - pub fn ist(&mut self) -> IST_W { - IST_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn ns(&mut self) -> NsW { + NsW::new(self, 5) } } -#[doc = "CAN Status Pending Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cstpnd](index.html) module"] -pub struct CSTPND_SPEC; -impl crate::RegisterSpec for CSTPND_SPEC { +#[doc = "CAN Status Pending Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cstpnd::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cstpnd::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CstpndSpec; +impl crate::RegisterSpec for CstpndSpec { type Ux = u32; } -#[doc = "`read()` method returns [cstpnd::R](R) reader structure"] -impl crate::Readable for CSTPND_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cstpnd::W](W) writer structure"] -impl crate::Writable for CSTPND_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`cstpnd::R`](R) reader structure"] +impl crate::Readable for CstpndSpec {} +#[doc = "`write(|w| ..)` method takes [`cstpnd::W`](W) writer structure"] +impl crate::Writable for CstpndSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CSTPND to value 0"] -impl crate::Resettable for CSTPND_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for CstpndSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/ctim.rs b/va416xx/src/can0/ctim.rs index 7e77def..872f295 100644 --- a/va416xx/src/can0/ctim.rs +++ b/va416xx/src/can0/ctim.rs @@ -1,214 +1,85 @@ #[doc = "Register `CTIM` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CTIM` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `PSC` reader - Prescaler Configuration"] -pub struct PSC_R(crate::FieldReader); -impl PSC_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - PSC_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PSC_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `PSC` writer - Prescaler Configuration"] -pub struct PSC_W<'a> { - w: &'a mut W, -} -impl<'a> PSC_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x7f << 9)) | ((value as u32 & 0x7f) << 9); - self.w - } -} -#[doc = "Field `SJW` reader - Synchronization Jump Width"] -pub struct SJW_R(crate::FieldReader); -impl SJW_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - SJW_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for SJW_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `SJW` writer - Synchronization Jump Width"] -pub struct SJW_W<'a> { - w: &'a mut W, -} -impl<'a> SJW_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x03 << 7)) | ((value as u32 & 0x03) << 7); - self.w - } -} -#[doc = "Field `TSEG1` reader - Time Segment 1"] -pub struct TSEG1_R(crate::FieldReader); -impl TSEG1_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - TSEG1_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TSEG1_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TSEG1` writer - Time Segment 1"] -pub struct TSEG1_W<'a> { - w: &'a mut W, -} -impl<'a> TSEG1_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x0f << 3)) | ((value as u32 & 0x0f) << 3); - self.w - } -} +pub type W = crate::W; #[doc = "Field `TSEG2` reader - Time Segment 2"] -pub struct TSEG2_R(crate::FieldReader); -impl TSEG2_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - TSEG2_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TSEG2_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Tseg2R = crate::FieldReader; #[doc = "Field `TSEG2` writer - Time Segment 2"] -pub struct TSEG2_W<'a> { - w: &'a mut W, -} -impl<'a> TSEG2_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0x07) | (value as u32 & 0x07); - self.w - } -} +pub type Tseg2W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +#[doc = "Field `TSEG1` reader - Time Segment 1"] +pub type Tseg1R = crate::FieldReader; +#[doc = "Field `TSEG1` writer - Time Segment 1"] +pub type Tseg1W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +#[doc = "Field `SJW` reader - Synchronization Jump Width"] +pub type SjwR = crate::FieldReader; +#[doc = "Field `SJW` writer - Synchronization Jump Width"] +pub type SjwW<'a, REG> = crate::FieldWriter<'a, REG, 2>; +#[doc = "Field `PSC` reader - Prescaler Configuration"] +pub type PscR = crate::FieldReader; +#[doc = "Field `PSC` writer - Prescaler Configuration"] +pub type PscW<'a, REG> = crate::FieldWriter<'a, REG, 7>; impl R { - #[doc = "Bits 9:15 - Prescaler Configuration"] + #[doc = "Bits 0:2 - Time Segment 2"] #[inline(always)] - pub fn psc(&self) -> PSC_R { - PSC_R::new(((self.bits >> 9) & 0x7f) as u8) - } - #[doc = "Bits 7:8 - Synchronization Jump Width"] - #[inline(always)] - pub fn sjw(&self) -> SJW_R { - SJW_R::new(((self.bits >> 7) & 0x03) as u8) + pub fn tseg2(&self) -> Tseg2R { + Tseg2R::new((self.bits & 7) as u8) } #[doc = "Bits 3:6 - Time Segment 1"] #[inline(always)] - pub fn tseg1(&self) -> TSEG1_R { - TSEG1_R::new(((self.bits >> 3) & 0x0f) as u8) + pub fn tseg1(&self) -> Tseg1R { + Tseg1R::new(((self.bits >> 3) & 0x0f) as u8) } - #[doc = "Bits 0:2 - Time Segment 2"] + #[doc = "Bits 7:8 - Synchronization Jump Width"] #[inline(always)] - pub fn tseg2(&self) -> TSEG2_R { - TSEG2_R::new((self.bits & 0x07) as u8) + pub fn sjw(&self) -> SjwR { + SjwR::new(((self.bits >> 7) & 3) as u8) + } + #[doc = "Bits 9:15 - Prescaler Configuration"] + #[inline(always)] + pub fn psc(&self) -> PscR { + PscR::new(((self.bits >> 9) & 0x7f) as u8) } } impl W { - #[doc = "Bits 9:15 - Prescaler Configuration"] + #[doc = "Bits 0:2 - Time Segment 2"] #[inline(always)] - pub fn psc(&mut self) -> PSC_W { - PSC_W { w: self } - } - #[doc = "Bits 7:8 - Synchronization Jump Width"] - #[inline(always)] - pub fn sjw(&mut self) -> SJW_W { - SJW_W { w: self } + #[must_use] + pub fn tseg2(&mut self) -> Tseg2W { + Tseg2W::new(self, 0) } #[doc = "Bits 3:6 - Time Segment 1"] #[inline(always)] - pub fn tseg1(&mut self) -> TSEG1_W { - TSEG1_W { w: self } + #[must_use] + pub fn tseg1(&mut self) -> Tseg1W { + Tseg1W::new(self, 3) } - #[doc = "Bits 0:2 - Time Segment 2"] + #[doc = "Bits 7:8 - Synchronization Jump Width"] #[inline(always)] - pub fn tseg2(&mut self) -> TSEG2_W { - TSEG2_W { w: self } + #[must_use] + pub fn sjw(&mut self) -> SjwW { + SjwW::new(self, 7) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 9:15 - Prescaler Configuration"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn psc(&mut self) -> PscW { + PscW::new(self, 9) } } -#[doc = "CAN Timing Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctim](index.html) module"] -pub struct CTIM_SPEC; -impl crate::RegisterSpec for CTIM_SPEC { +#[doc = "CAN Timing Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctim::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctim::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CtimSpec; +impl crate::RegisterSpec for CtimSpec { type Ux = u32; } -#[doc = "`read()` method returns [ctim::R](R) reader structure"] -impl crate::Readable for CTIM_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ctim::W](W) writer structure"] -impl crate::Writable for CTIM_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`ctim::R`](R) reader structure"] +impl crate::Readable for CtimSpec {} +#[doc = "`write(|w| ..)` method takes [`ctim::W`](W) writer structure"] +impl crate::Writable for CtimSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTIM to value 0"] -impl crate::Resettable for CTIM_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for CtimSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/ctmr.rs b/va416xx/src/can0/ctmr.rs index cd5aa5d..25cf22e 100644 --- a/va416xx/src/can0/ctmr.rs +++ b/va416xx/src/can0/ctmr.rs @@ -1,86 +1,31 @@ #[doc = "Register `CTMR` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CTMR` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CTMR` reader - Time Stamp Counter"] -pub struct CTMR_R(crate::FieldReader); -impl CTMR_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - CTMR_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CTMR_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type CtmrR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Time Stamp Counter"] #[inline(always)] - pub fn ctmr(&self) -> CTMR_R { - CTMR_R::new((self.bits & 0xffff) as u16) + pub fn ctmr(&self) -> CtmrR { + CtmrR::new((self.bits & 0xffff) as u16) } } -impl W { - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "CAN Timer Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctmr](index.html) module"] -pub struct CTMR_SPEC; -impl crate::RegisterSpec for CTMR_SPEC { +impl W {} +#[doc = "CAN Timer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctmr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctmr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CtmrSpec; +impl crate::RegisterSpec for CtmrSpec { type Ux = u32; } -#[doc = "`read()` method returns [ctmr::R](R) reader structure"] -impl crate::Readable for CTMR_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ctmr::W](W) writer structure"] -impl crate::Writable for CTMR_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`ctmr::R`](R) reader structure"] +impl crate::Readable for CtmrSpec {} +#[doc = "`write(|w| ..)` method takes [`ctmr::W`](W) writer structure"] +impl crate::Writable for CtmrSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTMR to value 0"] -impl crate::Resettable for CTMR_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for CtmrSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/data0_cmb0.rs b/va416xx/src/can0/data0_cmb0.rs index 87a6731..29e0103 100644 --- a/va416xx/src/can0/data0_cmb0.rs +++ b/va416xx/src/can0/data0_cmb0.rs @@ -1,140 +1,55 @@ #[doc = "Register `DATA0_CMB0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DATA0_CMB0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `BYTE1` reader - Data Byte 1"] -pub struct BYTE1_R(crate::FieldReader); -impl BYTE1_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE1_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE1_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `BYTE1` writer - Data Byte 1"] -pub struct BYTE1_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE1_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0xff << 8)) | ((value as u32 & 0xff) << 8); - self.w - } -} +pub type W = crate::W; #[doc = "Field `BYTE2` reader - Data Byte 2"] -pub struct BYTE2_R(crate::FieldReader); -impl BYTE2_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE2_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE2_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Byte2R = crate::FieldReader; #[doc = "Field `BYTE2` writer - Data Byte 2"] -pub struct BYTE2_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE2_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type Byte2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +#[doc = "Field `BYTE1` reader - Data Byte 1"] +pub type Byte1R = crate::FieldReader; +#[doc = "Field `BYTE1` writer - Data Byte 1"] +pub type Byte1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { - #[doc = "Bits 8:15 - Data Byte 1"] - #[inline(always)] - pub fn byte1(&self) -> BYTE1_R { - BYTE1_R::new(((self.bits >> 8) & 0xff) as u8) - } #[doc = "Bits 0:7 - Data Byte 2"] #[inline(always)] - pub fn byte2(&self) -> BYTE2_R { - BYTE2_R::new((self.bits & 0xff) as u8) + pub fn byte2(&self) -> Byte2R { + Byte2R::new((self.bits & 0xff) as u8) + } + #[doc = "Bits 8:15 - Data Byte 1"] + #[inline(always)] + pub fn byte1(&self) -> Byte1R { + Byte1R::new(((self.bits >> 8) & 0xff) as u8) } } impl W { - #[doc = "Bits 8:15 - Data Byte 1"] - #[inline(always)] - pub fn byte1(&mut self) -> BYTE1_W { - BYTE1_W { w: self } - } #[doc = "Bits 0:7 - Data Byte 2"] #[inline(always)] - pub fn byte2(&mut self) -> BYTE2_W { - BYTE2_W { w: self } + #[must_use] + pub fn byte2(&mut self) -> Byte2W { + Byte2W::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 8:15 - Data Byte 1"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn byte1(&mut self) -> Byte1W { + Byte1W::new(self, 8) } } -#[doc = "CAN Frame Data Word 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data0_cmb0](index.html) module"] -pub struct DATA0_CMB0_SPEC; -impl crate::RegisterSpec for DATA0_CMB0_SPEC { +#[doc = "CAN Frame Data Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data0_cmb0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data0_cmb0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Data0Cmb0Spec; +impl crate::RegisterSpec for Data0Cmb0Spec { type Ux = u32; } -#[doc = "`read()` method returns [data0_cmb0::R](R) reader structure"] -impl crate::Readable for DATA0_CMB0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [data0_cmb0::W](W) writer structure"] -impl crate::Writable for DATA0_CMB0_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`data0_cmb0::R`](R) reader structure"] +impl crate::Readable for Data0Cmb0Spec {} +#[doc = "`write(|w| ..)` method takes [`data0_cmb0::W`](W) writer structure"] +impl crate::Writable for Data0Cmb0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA0_CMB0 to value 0"] -impl crate::Resettable for DATA0_CMB0_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Data0Cmb0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/data0_cmb1.rs b/va416xx/src/can0/data0_cmb1.rs index 5f0bdb0..2cb965f 100644 --- a/va416xx/src/can0/data0_cmb1.rs +++ b/va416xx/src/can0/data0_cmb1.rs @@ -1,140 +1,55 @@ #[doc = "Register `DATA0_CMB1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DATA0_CMB1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `BYTE1` reader - Data Byte 1"] -pub struct BYTE1_R(crate::FieldReader); -impl BYTE1_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE1_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE1_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `BYTE1` writer - Data Byte 1"] -pub struct BYTE1_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE1_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0xff << 8)) | ((value as u32 & 0xff) << 8); - self.w - } -} +pub type W = crate::W; #[doc = "Field `BYTE2` reader - Data Byte 2"] -pub struct BYTE2_R(crate::FieldReader); -impl BYTE2_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE2_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE2_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Byte2R = crate::FieldReader; #[doc = "Field `BYTE2` writer - Data Byte 2"] -pub struct BYTE2_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE2_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type Byte2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +#[doc = "Field `BYTE1` reader - Data Byte 1"] +pub type Byte1R = crate::FieldReader; +#[doc = "Field `BYTE1` writer - Data Byte 1"] +pub type Byte1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { - #[doc = "Bits 8:15 - Data Byte 1"] - #[inline(always)] - pub fn byte1(&self) -> BYTE1_R { - BYTE1_R::new(((self.bits >> 8) & 0xff) as u8) - } #[doc = "Bits 0:7 - Data Byte 2"] #[inline(always)] - pub fn byte2(&self) -> BYTE2_R { - BYTE2_R::new((self.bits & 0xff) as u8) + pub fn byte2(&self) -> Byte2R { + Byte2R::new((self.bits & 0xff) as u8) + } + #[doc = "Bits 8:15 - Data Byte 1"] + #[inline(always)] + pub fn byte1(&self) -> Byte1R { + Byte1R::new(((self.bits >> 8) & 0xff) as u8) } } impl W { - #[doc = "Bits 8:15 - Data Byte 1"] - #[inline(always)] - pub fn byte1(&mut self) -> BYTE1_W { - BYTE1_W { w: self } - } #[doc = "Bits 0:7 - Data Byte 2"] #[inline(always)] - pub fn byte2(&mut self) -> BYTE2_W { - BYTE2_W { w: self } + #[must_use] + pub fn byte2(&mut self) -> Byte2W { + Byte2W::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 8:15 - Data Byte 1"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn byte1(&mut self) -> Byte1W { + Byte1W::new(self, 8) } } -#[doc = "CAN Frame Data Word 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data0_cmb1](index.html) module"] -pub struct DATA0_CMB1_SPEC; -impl crate::RegisterSpec for DATA0_CMB1_SPEC { +#[doc = "CAN Frame Data Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data0_cmb1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data0_cmb1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Data0Cmb1Spec; +impl crate::RegisterSpec for Data0Cmb1Spec { type Ux = u32; } -#[doc = "`read()` method returns [data0_cmb1::R](R) reader structure"] -impl crate::Readable for DATA0_CMB1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [data0_cmb1::W](W) writer structure"] -impl crate::Writable for DATA0_CMB1_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`data0_cmb1::R`](R) reader structure"] +impl crate::Readable for Data0Cmb1Spec {} +#[doc = "`write(|w| ..)` method takes [`data0_cmb1::W`](W) writer structure"] +impl crate::Writable for Data0Cmb1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA0_CMB1 to value 0"] -impl crate::Resettable for DATA0_CMB1_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Data0Cmb1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/data0_cmb10.rs b/va416xx/src/can0/data0_cmb10.rs index 0190436..5c600d6 100644 --- a/va416xx/src/can0/data0_cmb10.rs +++ b/va416xx/src/can0/data0_cmb10.rs @@ -1,140 +1,55 @@ #[doc = "Register `DATA0_CMB10` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DATA0_CMB10` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `BYTE1` reader - Data Byte 1"] -pub struct BYTE1_R(crate::FieldReader); -impl BYTE1_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE1_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE1_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `BYTE1` writer - Data Byte 1"] -pub struct BYTE1_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE1_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0xff << 8)) | ((value as u32 & 0xff) << 8); - self.w - } -} +pub type W = crate::W; #[doc = "Field `BYTE2` reader - Data Byte 2"] -pub struct BYTE2_R(crate::FieldReader); -impl BYTE2_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE2_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE2_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Byte2R = crate::FieldReader; #[doc = "Field `BYTE2` writer - Data Byte 2"] -pub struct BYTE2_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE2_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type Byte2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +#[doc = "Field `BYTE1` reader - Data Byte 1"] +pub type Byte1R = crate::FieldReader; +#[doc = "Field `BYTE1` writer - Data Byte 1"] +pub type Byte1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { - #[doc = "Bits 8:15 - Data Byte 1"] - #[inline(always)] - pub fn byte1(&self) -> BYTE1_R { - BYTE1_R::new(((self.bits >> 8) & 0xff) as u8) - } #[doc = "Bits 0:7 - Data Byte 2"] #[inline(always)] - pub fn byte2(&self) -> BYTE2_R { - BYTE2_R::new((self.bits & 0xff) as u8) + pub fn byte2(&self) -> Byte2R { + Byte2R::new((self.bits & 0xff) as u8) + } + #[doc = "Bits 8:15 - Data Byte 1"] + #[inline(always)] + pub fn byte1(&self) -> Byte1R { + Byte1R::new(((self.bits >> 8) & 0xff) as u8) } } impl W { - #[doc = "Bits 8:15 - Data Byte 1"] - #[inline(always)] - pub fn byte1(&mut self) -> BYTE1_W { - BYTE1_W { w: self } - } #[doc = "Bits 0:7 - Data Byte 2"] #[inline(always)] - pub fn byte2(&mut self) -> BYTE2_W { - BYTE2_W { w: self } + #[must_use] + pub fn byte2(&mut self) -> Byte2W { + Byte2W::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 8:15 - Data Byte 1"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn byte1(&mut self) -> Byte1W { + Byte1W::new(self, 8) } } -#[doc = "CAN Frame Data Word 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data0_cmb10](index.html) module"] -pub struct DATA0_CMB10_SPEC; -impl crate::RegisterSpec for DATA0_CMB10_SPEC { +#[doc = "CAN Frame Data Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data0_cmb10::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data0_cmb10::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Data0Cmb10Spec; +impl crate::RegisterSpec for Data0Cmb10Spec { type Ux = u32; } -#[doc = "`read()` method returns [data0_cmb10::R](R) reader structure"] -impl crate::Readable for DATA0_CMB10_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [data0_cmb10::W](W) writer structure"] -impl crate::Writable for DATA0_CMB10_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`data0_cmb10::R`](R) reader structure"] +impl crate::Readable for Data0Cmb10Spec {} +#[doc = "`write(|w| ..)` method takes [`data0_cmb10::W`](W) writer structure"] +impl crate::Writable for Data0Cmb10Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA0_CMB10 to value 0"] -impl crate::Resettable for DATA0_CMB10_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Data0Cmb10Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/data0_cmb11.rs b/va416xx/src/can0/data0_cmb11.rs index e2fee80..307de43 100644 --- a/va416xx/src/can0/data0_cmb11.rs +++ b/va416xx/src/can0/data0_cmb11.rs @@ -1,140 +1,55 @@ #[doc = "Register `DATA0_CMB11` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DATA0_CMB11` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `BYTE1` reader - Data Byte 1"] -pub struct BYTE1_R(crate::FieldReader); -impl BYTE1_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE1_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE1_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `BYTE1` writer - Data Byte 1"] -pub struct BYTE1_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE1_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0xff << 8)) | ((value as u32 & 0xff) << 8); - self.w - } -} +pub type W = crate::W; #[doc = "Field `BYTE2` reader - Data Byte 2"] -pub struct BYTE2_R(crate::FieldReader); -impl BYTE2_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE2_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE2_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Byte2R = crate::FieldReader; #[doc = "Field `BYTE2` writer - Data Byte 2"] -pub struct BYTE2_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE2_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type Byte2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +#[doc = "Field `BYTE1` reader - Data Byte 1"] +pub type Byte1R = crate::FieldReader; +#[doc = "Field `BYTE1` writer - Data Byte 1"] +pub type Byte1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { - #[doc = "Bits 8:15 - Data Byte 1"] - #[inline(always)] - pub fn byte1(&self) -> BYTE1_R { - BYTE1_R::new(((self.bits >> 8) & 0xff) as u8) - } #[doc = "Bits 0:7 - Data Byte 2"] #[inline(always)] - pub fn byte2(&self) -> BYTE2_R { - BYTE2_R::new((self.bits & 0xff) as u8) + pub fn byte2(&self) -> Byte2R { + Byte2R::new((self.bits & 0xff) as u8) + } + #[doc = "Bits 8:15 - Data Byte 1"] + #[inline(always)] + pub fn byte1(&self) -> Byte1R { + Byte1R::new(((self.bits >> 8) & 0xff) as u8) } } impl W { - #[doc = "Bits 8:15 - Data Byte 1"] - #[inline(always)] - pub fn byte1(&mut self) -> BYTE1_W { - BYTE1_W { w: self } - } #[doc = "Bits 0:7 - Data Byte 2"] #[inline(always)] - pub fn byte2(&mut self) -> BYTE2_W { - BYTE2_W { w: self } + #[must_use] + pub fn byte2(&mut self) -> Byte2W { + Byte2W::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 8:15 - Data Byte 1"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn byte1(&mut self) -> Byte1W { + Byte1W::new(self, 8) } } -#[doc = "CAN Frame Data Word 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data0_cmb11](index.html) module"] -pub struct DATA0_CMB11_SPEC; -impl crate::RegisterSpec for DATA0_CMB11_SPEC { +#[doc = "CAN Frame Data Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data0_cmb11::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data0_cmb11::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Data0Cmb11Spec; +impl crate::RegisterSpec for Data0Cmb11Spec { type Ux = u32; } -#[doc = "`read()` method returns [data0_cmb11::R](R) reader structure"] -impl crate::Readable for DATA0_CMB11_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [data0_cmb11::W](W) writer structure"] -impl crate::Writable for DATA0_CMB11_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`data0_cmb11::R`](R) reader structure"] +impl crate::Readable for Data0Cmb11Spec {} +#[doc = "`write(|w| ..)` method takes [`data0_cmb11::W`](W) writer structure"] +impl crate::Writable for Data0Cmb11Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA0_CMB11 to value 0"] -impl crate::Resettable for DATA0_CMB11_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Data0Cmb11Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/data0_cmb12.rs b/va416xx/src/can0/data0_cmb12.rs index 5e2bbe5..05292d6 100644 --- a/va416xx/src/can0/data0_cmb12.rs +++ b/va416xx/src/can0/data0_cmb12.rs @@ -1,140 +1,55 @@ #[doc = "Register `DATA0_CMB12` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DATA0_CMB12` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `BYTE1` reader - Data Byte 1"] -pub struct BYTE1_R(crate::FieldReader); -impl BYTE1_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE1_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE1_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `BYTE1` writer - Data Byte 1"] -pub struct BYTE1_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE1_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0xff << 8)) | ((value as u32 & 0xff) << 8); - self.w - } -} +pub type W = crate::W; #[doc = "Field `BYTE2` reader - Data Byte 2"] -pub struct BYTE2_R(crate::FieldReader); -impl BYTE2_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE2_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE2_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Byte2R = crate::FieldReader; #[doc = "Field `BYTE2` writer - Data Byte 2"] -pub struct BYTE2_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE2_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type Byte2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +#[doc = "Field `BYTE1` reader - Data Byte 1"] +pub type Byte1R = crate::FieldReader; +#[doc = "Field `BYTE1` writer - Data Byte 1"] +pub type Byte1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { - #[doc = "Bits 8:15 - Data Byte 1"] - #[inline(always)] - pub fn byte1(&self) -> BYTE1_R { - BYTE1_R::new(((self.bits >> 8) & 0xff) as u8) - } #[doc = "Bits 0:7 - Data Byte 2"] #[inline(always)] - pub fn byte2(&self) -> BYTE2_R { - BYTE2_R::new((self.bits & 0xff) as u8) + pub fn byte2(&self) -> Byte2R { + Byte2R::new((self.bits & 0xff) as u8) + } + #[doc = "Bits 8:15 - Data Byte 1"] + #[inline(always)] + pub fn byte1(&self) -> Byte1R { + Byte1R::new(((self.bits >> 8) & 0xff) as u8) } } impl W { - #[doc = "Bits 8:15 - Data Byte 1"] - #[inline(always)] - pub fn byte1(&mut self) -> BYTE1_W { - BYTE1_W { w: self } - } #[doc = "Bits 0:7 - Data Byte 2"] #[inline(always)] - pub fn byte2(&mut self) -> BYTE2_W { - BYTE2_W { w: self } + #[must_use] + pub fn byte2(&mut self) -> Byte2W { + Byte2W::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 8:15 - Data Byte 1"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn byte1(&mut self) -> Byte1W { + Byte1W::new(self, 8) } } -#[doc = "CAN Frame Data Word 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data0_cmb12](index.html) module"] -pub struct DATA0_CMB12_SPEC; -impl crate::RegisterSpec for DATA0_CMB12_SPEC { +#[doc = "CAN Frame Data Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data0_cmb12::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data0_cmb12::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Data0Cmb12Spec; +impl crate::RegisterSpec for Data0Cmb12Spec { type Ux = u32; } -#[doc = "`read()` method returns [data0_cmb12::R](R) reader structure"] -impl crate::Readable for DATA0_CMB12_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [data0_cmb12::W](W) writer structure"] -impl crate::Writable for DATA0_CMB12_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`data0_cmb12::R`](R) reader structure"] +impl crate::Readable for Data0Cmb12Spec {} +#[doc = "`write(|w| ..)` method takes [`data0_cmb12::W`](W) writer structure"] +impl crate::Writable for Data0Cmb12Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA0_CMB12 to value 0"] -impl crate::Resettable for DATA0_CMB12_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Data0Cmb12Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/data0_cmb13.rs b/va416xx/src/can0/data0_cmb13.rs index b8938cc..22c6992 100644 --- a/va416xx/src/can0/data0_cmb13.rs +++ b/va416xx/src/can0/data0_cmb13.rs @@ -1,140 +1,55 @@ #[doc = "Register `DATA0_CMB13` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DATA0_CMB13` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `BYTE1` reader - Data Byte 1"] -pub struct BYTE1_R(crate::FieldReader); -impl BYTE1_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE1_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE1_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `BYTE1` writer - Data Byte 1"] -pub struct BYTE1_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE1_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0xff << 8)) | ((value as u32 & 0xff) << 8); - self.w - } -} +pub type W = crate::W; #[doc = "Field `BYTE2` reader - Data Byte 2"] -pub struct BYTE2_R(crate::FieldReader); -impl BYTE2_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE2_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE2_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Byte2R = crate::FieldReader; #[doc = "Field `BYTE2` writer - Data Byte 2"] -pub struct BYTE2_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE2_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type Byte2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +#[doc = "Field `BYTE1` reader - Data Byte 1"] +pub type Byte1R = crate::FieldReader; +#[doc = "Field `BYTE1` writer - Data Byte 1"] +pub type Byte1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { - #[doc = "Bits 8:15 - Data Byte 1"] - #[inline(always)] - pub fn byte1(&self) -> BYTE1_R { - BYTE1_R::new(((self.bits >> 8) & 0xff) as u8) - } #[doc = "Bits 0:7 - Data Byte 2"] #[inline(always)] - pub fn byte2(&self) -> BYTE2_R { - BYTE2_R::new((self.bits & 0xff) as u8) + pub fn byte2(&self) -> Byte2R { + Byte2R::new((self.bits & 0xff) as u8) + } + #[doc = "Bits 8:15 - Data Byte 1"] + #[inline(always)] + pub fn byte1(&self) -> Byte1R { + Byte1R::new(((self.bits >> 8) & 0xff) as u8) } } impl W { - #[doc = "Bits 8:15 - Data Byte 1"] - #[inline(always)] - pub fn byte1(&mut self) -> BYTE1_W { - BYTE1_W { w: self } - } #[doc = "Bits 0:7 - Data Byte 2"] #[inline(always)] - pub fn byte2(&mut self) -> BYTE2_W { - BYTE2_W { w: self } + #[must_use] + pub fn byte2(&mut self) -> Byte2W { + Byte2W::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 8:15 - Data Byte 1"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn byte1(&mut self) -> Byte1W { + Byte1W::new(self, 8) } } -#[doc = "CAN Frame Data Word 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data0_cmb13](index.html) module"] -pub struct DATA0_CMB13_SPEC; -impl crate::RegisterSpec for DATA0_CMB13_SPEC { +#[doc = "CAN Frame Data Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data0_cmb13::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data0_cmb13::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Data0Cmb13Spec; +impl crate::RegisterSpec for Data0Cmb13Spec { type Ux = u32; } -#[doc = "`read()` method returns [data0_cmb13::R](R) reader structure"] -impl crate::Readable for DATA0_CMB13_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [data0_cmb13::W](W) writer structure"] -impl crate::Writable for DATA0_CMB13_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`data0_cmb13::R`](R) reader structure"] +impl crate::Readable for Data0Cmb13Spec {} +#[doc = "`write(|w| ..)` method takes [`data0_cmb13::W`](W) writer structure"] +impl crate::Writable for Data0Cmb13Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA0_CMB13 to value 0"] -impl crate::Resettable for DATA0_CMB13_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Data0Cmb13Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/data0_cmb14.rs b/va416xx/src/can0/data0_cmb14.rs index 94001e0..72026d5 100644 --- a/va416xx/src/can0/data0_cmb14.rs +++ b/va416xx/src/can0/data0_cmb14.rs @@ -1,140 +1,55 @@ #[doc = "Register `DATA0_CMB14` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DATA0_CMB14` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `BYTE1` reader - Data Byte 1"] -pub struct BYTE1_R(crate::FieldReader); -impl BYTE1_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE1_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE1_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `BYTE1` writer - Data Byte 1"] -pub struct BYTE1_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE1_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0xff << 8)) | ((value as u32 & 0xff) << 8); - self.w - } -} +pub type W = crate::W; #[doc = "Field `BYTE2` reader - Data Byte 2"] -pub struct BYTE2_R(crate::FieldReader); -impl BYTE2_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE2_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE2_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Byte2R = crate::FieldReader; #[doc = "Field `BYTE2` writer - Data Byte 2"] -pub struct BYTE2_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE2_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type Byte2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +#[doc = "Field `BYTE1` reader - Data Byte 1"] +pub type Byte1R = crate::FieldReader; +#[doc = "Field `BYTE1` writer - Data Byte 1"] +pub type Byte1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { - #[doc = "Bits 8:15 - Data Byte 1"] - #[inline(always)] - pub fn byte1(&self) -> BYTE1_R { - BYTE1_R::new(((self.bits >> 8) & 0xff) as u8) - } #[doc = "Bits 0:7 - Data Byte 2"] #[inline(always)] - pub fn byte2(&self) -> BYTE2_R { - BYTE2_R::new((self.bits & 0xff) as u8) + pub fn byte2(&self) -> Byte2R { + Byte2R::new((self.bits & 0xff) as u8) + } + #[doc = "Bits 8:15 - Data Byte 1"] + #[inline(always)] + pub fn byte1(&self) -> Byte1R { + Byte1R::new(((self.bits >> 8) & 0xff) as u8) } } impl W { - #[doc = "Bits 8:15 - Data Byte 1"] - #[inline(always)] - pub fn byte1(&mut self) -> BYTE1_W { - BYTE1_W { w: self } - } #[doc = "Bits 0:7 - Data Byte 2"] #[inline(always)] - pub fn byte2(&mut self) -> BYTE2_W { - BYTE2_W { w: self } + #[must_use] + pub fn byte2(&mut self) -> Byte2W { + Byte2W::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 8:15 - Data Byte 1"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn byte1(&mut self) -> Byte1W { + Byte1W::new(self, 8) } } -#[doc = "CAN Frame Data Word 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data0_cmb14](index.html) module"] -pub struct DATA0_CMB14_SPEC; -impl crate::RegisterSpec for DATA0_CMB14_SPEC { +#[doc = "CAN Frame Data Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data0_cmb14::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data0_cmb14::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Data0Cmb14Spec; +impl crate::RegisterSpec for Data0Cmb14Spec { type Ux = u32; } -#[doc = "`read()` method returns [data0_cmb14::R](R) reader structure"] -impl crate::Readable for DATA0_CMB14_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [data0_cmb14::W](W) writer structure"] -impl crate::Writable for DATA0_CMB14_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`data0_cmb14::R`](R) reader structure"] +impl crate::Readable for Data0Cmb14Spec {} +#[doc = "`write(|w| ..)` method takes [`data0_cmb14::W`](W) writer structure"] +impl crate::Writable for Data0Cmb14Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA0_CMB14 to value 0"] -impl crate::Resettable for DATA0_CMB14_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Data0Cmb14Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/data0_cmb2.rs b/va416xx/src/can0/data0_cmb2.rs index 1392dd7..b9823de 100644 --- a/va416xx/src/can0/data0_cmb2.rs +++ b/va416xx/src/can0/data0_cmb2.rs @@ -1,140 +1,55 @@ #[doc = "Register `DATA0_CMB2` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DATA0_CMB2` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `BYTE1` reader - Data Byte 1"] -pub struct BYTE1_R(crate::FieldReader); -impl BYTE1_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE1_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE1_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `BYTE1` writer - Data Byte 1"] -pub struct BYTE1_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE1_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0xff << 8)) | ((value as u32 & 0xff) << 8); - self.w - } -} +pub type W = crate::W; #[doc = "Field `BYTE2` reader - Data Byte 2"] -pub struct BYTE2_R(crate::FieldReader); -impl BYTE2_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE2_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE2_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Byte2R = crate::FieldReader; #[doc = "Field `BYTE2` writer - Data Byte 2"] -pub struct BYTE2_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE2_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type Byte2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +#[doc = "Field `BYTE1` reader - Data Byte 1"] +pub type Byte1R = crate::FieldReader; +#[doc = "Field `BYTE1` writer - Data Byte 1"] +pub type Byte1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { - #[doc = "Bits 8:15 - Data Byte 1"] - #[inline(always)] - pub fn byte1(&self) -> BYTE1_R { - BYTE1_R::new(((self.bits >> 8) & 0xff) as u8) - } #[doc = "Bits 0:7 - Data Byte 2"] #[inline(always)] - pub fn byte2(&self) -> BYTE2_R { - BYTE2_R::new((self.bits & 0xff) as u8) + pub fn byte2(&self) -> Byte2R { + Byte2R::new((self.bits & 0xff) as u8) + } + #[doc = "Bits 8:15 - Data Byte 1"] + #[inline(always)] + pub fn byte1(&self) -> Byte1R { + Byte1R::new(((self.bits >> 8) & 0xff) as u8) } } impl W { - #[doc = "Bits 8:15 - Data Byte 1"] - #[inline(always)] - pub fn byte1(&mut self) -> BYTE1_W { - BYTE1_W { w: self } - } #[doc = "Bits 0:7 - Data Byte 2"] #[inline(always)] - pub fn byte2(&mut self) -> BYTE2_W { - BYTE2_W { w: self } + #[must_use] + pub fn byte2(&mut self) -> Byte2W { + Byte2W::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 8:15 - Data Byte 1"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn byte1(&mut self) -> Byte1W { + Byte1W::new(self, 8) } } -#[doc = "CAN Frame Data Word 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data0_cmb2](index.html) module"] -pub struct DATA0_CMB2_SPEC; -impl crate::RegisterSpec for DATA0_CMB2_SPEC { +#[doc = "CAN Frame Data Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data0_cmb2::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data0_cmb2::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Data0Cmb2Spec; +impl crate::RegisterSpec for Data0Cmb2Spec { type Ux = u32; } -#[doc = "`read()` method returns [data0_cmb2::R](R) reader structure"] -impl crate::Readable for DATA0_CMB2_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [data0_cmb2::W](W) writer structure"] -impl crate::Writable for DATA0_CMB2_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`data0_cmb2::R`](R) reader structure"] +impl crate::Readable for Data0Cmb2Spec {} +#[doc = "`write(|w| ..)` method takes [`data0_cmb2::W`](W) writer structure"] +impl crate::Writable for Data0Cmb2Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA0_CMB2 to value 0"] -impl crate::Resettable for DATA0_CMB2_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Data0Cmb2Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/data0_cmb3.rs b/va416xx/src/can0/data0_cmb3.rs index aff06b5..488e04b 100644 --- a/va416xx/src/can0/data0_cmb3.rs +++ b/va416xx/src/can0/data0_cmb3.rs @@ -1,140 +1,55 @@ #[doc = "Register `DATA0_CMB3` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DATA0_CMB3` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `BYTE1` reader - Data Byte 1"] -pub struct BYTE1_R(crate::FieldReader); -impl BYTE1_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE1_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE1_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `BYTE1` writer - Data Byte 1"] -pub struct BYTE1_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE1_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0xff << 8)) | ((value as u32 & 0xff) << 8); - self.w - } -} +pub type W = crate::W; #[doc = "Field `BYTE2` reader - Data Byte 2"] -pub struct BYTE2_R(crate::FieldReader); -impl BYTE2_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE2_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE2_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Byte2R = crate::FieldReader; #[doc = "Field `BYTE2` writer - Data Byte 2"] -pub struct BYTE2_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE2_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type Byte2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +#[doc = "Field `BYTE1` reader - Data Byte 1"] +pub type Byte1R = crate::FieldReader; +#[doc = "Field `BYTE1` writer - Data Byte 1"] +pub type Byte1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { - #[doc = "Bits 8:15 - Data Byte 1"] - #[inline(always)] - pub fn byte1(&self) -> BYTE1_R { - BYTE1_R::new(((self.bits >> 8) & 0xff) as u8) - } #[doc = "Bits 0:7 - Data Byte 2"] #[inline(always)] - pub fn byte2(&self) -> BYTE2_R { - BYTE2_R::new((self.bits & 0xff) as u8) + pub fn byte2(&self) -> Byte2R { + Byte2R::new((self.bits & 0xff) as u8) + } + #[doc = "Bits 8:15 - Data Byte 1"] + #[inline(always)] + pub fn byte1(&self) -> Byte1R { + Byte1R::new(((self.bits >> 8) & 0xff) as u8) } } impl W { - #[doc = "Bits 8:15 - Data Byte 1"] - #[inline(always)] - pub fn byte1(&mut self) -> BYTE1_W { - BYTE1_W { w: self } - } #[doc = "Bits 0:7 - Data Byte 2"] #[inline(always)] - pub fn byte2(&mut self) -> BYTE2_W { - BYTE2_W { w: self } + #[must_use] + pub fn byte2(&mut self) -> Byte2W { + Byte2W::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 8:15 - Data Byte 1"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn byte1(&mut self) -> Byte1W { + Byte1W::new(self, 8) } } -#[doc = "CAN Frame Data Word 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data0_cmb3](index.html) module"] -pub struct DATA0_CMB3_SPEC; -impl crate::RegisterSpec for DATA0_CMB3_SPEC { +#[doc = "CAN Frame Data Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data0_cmb3::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data0_cmb3::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Data0Cmb3Spec; +impl crate::RegisterSpec for Data0Cmb3Spec { type Ux = u32; } -#[doc = "`read()` method returns [data0_cmb3::R](R) reader structure"] -impl crate::Readable for DATA0_CMB3_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [data0_cmb3::W](W) writer structure"] -impl crate::Writable for DATA0_CMB3_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`data0_cmb3::R`](R) reader structure"] +impl crate::Readable for Data0Cmb3Spec {} +#[doc = "`write(|w| ..)` method takes [`data0_cmb3::W`](W) writer structure"] +impl crate::Writable for Data0Cmb3Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA0_CMB3 to value 0"] -impl crate::Resettable for DATA0_CMB3_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Data0Cmb3Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/data0_cmb4.rs b/va416xx/src/can0/data0_cmb4.rs index bf3f2ef..8134f20 100644 --- a/va416xx/src/can0/data0_cmb4.rs +++ b/va416xx/src/can0/data0_cmb4.rs @@ -1,140 +1,55 @@ #[doc = "Register `DATA0_CMB4` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DATA0_CMB4` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `BYTE1` reader - Data Byte 1"] -pub struct BYTE1_R(crate::FieldReader); -impl BYTE1_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE1_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE1_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `BYTE1` writer - Data Byte 1"] -pub struct BYTE1_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE1_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0xff << 8)) | ((value as u32 & 0xff) << 8); - self.w - } -} +pub type W = crate::W; #[doc = "Field `BYTE2` reader - Data Byte 2"] -pub struct BYTE2_R(crate::FieldReader); -impl BYTE2_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE2_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE2_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Byte2R = crate::FieldReader; #[doc = "Field `BYTE2` writer - Data Byte 2"] -pub struct BYTE2_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE2_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type Byte2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +#[doc = "Field `BYTE1` reader - Data Byte 1"] +pub type Byte1R = crate::FieldReader; +#[doc = "Field `BYTE1` writer - Data Byte 1"] +pub type Byte1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { - #[doc = "Bits 8:15 - Data Byte 1"] - #[inline(always)] - pub fn byte1(&self) -> BYTE1_R { - BYTE1_R::new(((self.bits >> 8) & 0xff) as u8) - } #[doc = "Bits 0:7 - Data Byte 2"] #[inline(always)] - pub fn byte2(&self) -> BYTE2_R { - BYTE2_R::new((self.bits & 0xff) as u8) + pub fn byte2(&self) -> Byte2R { + Byte2R::new((self.bits & 0xff) as u8) + } + #[doc = "Bits 8:15 - Data Byte 1"] + #[inline(always)] + pub fn byte1(&self) -> Byte1R { + Byte1R::new(((self.bits >> 8) & 0xff) as u8) } } impl W { - #[doc = "Bits 8:15 - Data Byte 1"] - #[inline(always)] - pub fn byte1(&mut self) -> BYTE1_W { - BYTE1_W { w: self } - } #[doc = "Bits 0:7 - Data Byte 2"] #[inline(always)] - pub fn byte2(&mut self) -> BYTE2_W { - BYTE2_W { w: self } + #[must_use] + pub fn byte2(&mut self) -> Byte2W { + Byte2W::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 8:15 - Data Byte 1"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn byte1(&mut self) -> Byte1W { + Byte1W::new(self, 8) } } -#[doc = "CAN Frame Data Word 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data0_cmb4](index.html) module"] -pub struct DATA0_CMB4_SPEC; -impl crate::RegisterSpec for DATA0_CMB4_SPEC { +#[doc = "CAN Frame Data Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data0_cmb4::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data0_cmb4::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Data0Cmb4Spec; +impl crate::RegisterSpec for Data0Cmb4Spec { type Ux = u32; } -#[doc = "`read()` method returns [data0_cmb4::R](R) reader structure"] -impl crate::Readable for DATA0_CMB4_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [data0_cmb4::W](W) writer structure"] -impl crate::Writable for DATA0_CMB4_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`data0_cmb4::R`](R) reader structure"] +impl crate::Readable for Data0Cmb4Spec {} +#[doc = "`write(|w| ..)` method takes [`data0_cmb4::W`](W) writer structure"] +impl crate::Writable for Data0Cmb4Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA0_CMB4 to value 0"] -impl crate::Resettable for DATA0_CMB4_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Data0Cmb4Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/data0_cmb5.rs b/va416xx/src/can0/data0_cmb5.rs index a45b5b0..a0033fc 100644 --- a/va416xx/src/can0/data0_cmb5.rs +++ b/va416xx/src/can0/data0_cmb5.rs @@ -1,140 +1,55 @@ #[doc = "Register `DATA0_CMB5` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DATA0_CMB5` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `BYTE1` reader - Data Byte 1"] -pub struct BYTE1_R(crate::FieldReader); -impl BYTE1_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE1_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE1_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `BYTE1` writer - Data Byte 1"] -pub struct BYTE1_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE1_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0xff << 8)) | ((value as u32 & 0xff) << 8); - self.w - } -} +pub type W = crate::W; #[doc = "Field `BYTE2` reader - Data Byte 2"] -pub struct BYTE2_R(crate::FieldReader); -impl BYTE2_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE2_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE2_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Byte2R = crate::FieldReader; #[doc = "Field `BYTE2` writer - Data Byte 2"] -pub struct BYTE2_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE2_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type Byte2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +#[doc = "Field `BYTE1` reader - Data Byte 1"] +pub type Byte1R = crate::FieldReader; +#[doc = "Field `BYTE1` writer - Data Byte 1"] +pub type Byte1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { - #[doc = "Bits 8:15 - Data Byte 1"] - #[inline(always)] - pub fn byte1(&self) -> BYTE1_R { - BYTE1_R::new(((self.bits >> 8) & 0xff) as u8) - } #[doc = "Bits 0:7 - Data Byte 2"] #[inline(always)] - pub fn byte2(&self) -> BYTE2_R { - BYTE2_R::new((self.bits & 0xff) as u8) + pub fn byte2(&self) -> Byte2R { + Byte2R::new((self.bits & 0xff) as u8) + } + #[doc = "Bits 8:15 - Data Byte 1"] + #[inline(always)] + pub fn byte1(&self) -> Byte1R { + Byte1R::new(((self.bits >> 8) & 0xff) as u8) } } impl W { - #[doc = "Bits 8:15 - Data Byte 1"] - #[inline(always)] - pub fn byte1(&mut self) -> BYTE1_W { - BYTE1_W { w: self } - } #[doc = "Bits 0:7 - Data Byte 2"] #[inline(always)] - pub fn byte2(&mut self) -> BYTE2_W { - BYTE2_W { w: self } + #[must_use] + pub fn byte2(&mut self) -> Byte2W { + Byte2W::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 8:15 - Data Byte 1"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn byte1(&mut self) -> Byte1W { + Byte1W::new(self, 8) } } -#[doc = "CAN Frame Data Word 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data0_cmb5](index.html) module"] -pub struct DATA0_CMB5_SPEC; -impl crate::RegisterSpec for DATA0_CMB5_SPEC { +#[doc = "CAN Frame Data Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data0_cmb5::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data0_cmb5::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Data0Cmb5Spec; +impl crate::RegisterSpec for Data0Cmb5Spec { type Ux = u32; } -#[doc = "`read()` method returns [data0_cmb5::R](R) reader structure"] -impl crate::Readable for DATA0_CMB5_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [data0_cmb5::W](W) writer structure"] -impl crate::Writable for DATA0_CMB5_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`data0_cmb5::R`](R) reader structure"] +impl crate::Readable for Data0Cmb5Spec {} +#[doc = "`write(|w| ..)` method takes [`data0_cmb5::W`](W) writer structure"] +impl crate::Writable for Data0Cmb5Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA0_CMB5 to value 0"] -impl crate::Resettable for DATA0_CMB5_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Data0Cmb5Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/data0_cmb6.rs b/va416xx/src/can0/data0_cmb6.rs index 2ba1514..2f8de4e 100644 --- a/va416xx/src/can0/data0_cmb6.rs +++ b/va416xx/src/can0/data0_cmb6.rs @@ -1,140 +1,55 @@ #[doc = "Register `DATA0_CMB6` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DATA0_CMB6` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `BYTE1` reader - Data Byte 1"] -pub struct BYTE1_R(crate::FieldReader); -impl BYTE1_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE1_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE1_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `BYTE1` writer - Data Byte 1"] -pub struct BYTE1_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE1_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0xff << 8)) | ((value as u32 & 0xff) << 8); - self.w - } -} +pub type W = crate::W; #[doc = "Field `BYTE2` reader - Data Byte 2"] -pub struct BYTE2_R(crate::FieldReader); -impl BYTE2_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE2_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE2_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Byte2R = crate::FieldReader; #[doc = "Field `BYTE2` writer - Data Byte 2"] -pub struct BYTE2_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE2_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type Byte2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +#[doc = "Field `BYTE1` reader - Data Byte 1"] +pub type Byte1R = crate::FieldReader; +#[doc = "Field `BYTE1` writer - Data Byte 1"] +pub type Byte1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { - #[doc = "Bits 8:15 - Data Byte 1"] - #[inline(always)] - pub fn byte1(&self) -> BYTE1_R { - BYTE1_R::new(((self.bits >> 8) & 0xff) as u8) - } #[doc = "Bits 0:7 - Data Byte 2"] #[inline(always)] - pub fn byte2(&self) -> BYTE2_R { - BYTE2_R::new((self.bits & 0xff) as u8) + pub fn byte2(&self) -> Byte2R { + Byte2R::new((self.bits & 0xff) as u8) + } + #[doc = "Bits 8:15 - Data Byte 1"] + #[inline(always)] + pub fn byte1(&self) -> Byte1R { + Byte1R::new(((self.bits >> 8) & 0xff) as u8) } } impl W { - #[doc = "Bits 8:15 - Data Byte 1"] - #[inline(always)] - pub fn byte1(&mut self) -> BYTE1_W { - BYTE1_W { w: self } - } #[doc = "Bits 0:7 - Data Byte 2"] #[inline(always)] - pub fn byte2(&mut self) -> BYTE2_W { - BYTE2_W { w: self } + #[must_use] + pub fn byte2(&mut self) -> Byte2W { + Byte2W::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 8:15 - Data Byte 1"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn byte1(&mut self) -> Byte1W { + Byte1W::new(self, 8) } } -#[doc = "CAN Frame Data Word 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data0_cmb6](index.html) module"] -pub struct DATA0_CMB6_SPEC; -impl crate::RegisterSpec for DATA0_CMB6_SPEC { +#[doc = "CAN Frame Data Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data0_cmb6::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data0_cmb6::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Data0Cmb6Spec; +impl crate::RegisterSpec for Data0Cmb6Spec { type Ux = u32; } -#[doc = "`read()` method returns [data0_cmb6::R](R) reader structure"] -impl crate::Readable for DATA0_CMB6_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [data0_cmb6::W](W) writer structure"] -impl crate::Writable for DATA0_CMB6_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`data0_cmb6::R`](R) reader structure"] +impl crate::Readable for Data0Cmb6Spec {} +#[doc = "`write(|w| ..)` method takes [`data0_cmb6::W`](W) writer structure"] +impl crate::Writable for Data0Cmb6Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA0_CMB6 to value 0"] -impl crate::Resettable for DATA0_CMB6_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Data0Cmb6Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/data0_cmb7.rs b/va416xx/src/can0/data0_cmb7.rs index 2634861..4734c91 100644 --- a/va416xx/src/can0/data0_cmb7.rs +++ b/va416xx/src/can0/data0_cmb7.rs @@ -1,140 +1,55 @@ #[doc = "Register `DATA0_CMB7` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DATA0_CMB7` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `BYTE1` reader - Data Byte 1"] -pub struct BYTE1_R(crate::FieldReader); -impl BYTE1_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE1_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE1_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `BYTE1` writer - Data Byte 1"] -pub struct BYTE1_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE1_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0xff << 8)) | ((value as u32 & 0xff) << 8); - self.w - } -} +pub type W = crate::W; #[doc = "Field `BYTE2` reader - Data Byte 2"] -pub struct BYTE2_R(crate::FieldReader); -impl BYTE2_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE2_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE2_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Byte2R = crate::FieldReader; #[doc = "Field `BYTE2` writer - Data Byte 2"] -pub struct BYTE2_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE2_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type Byte2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +#[doc = "Field `BYTE1` reader - Data Byte 1"] +pub type Byte1R = crate::FieldReader; +#[doc = "Field `BYTE1` writer - Data Byte 1"] +pub type Byte1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { - #[doc = "Bits 8:15 - Data Byte 1"] - #[inline(always)] - pub fn byte1(&self) -> BYTE1_R { - BYTE1_R::new(((self.bits >> 8) & 0xff) as u8) - } #[doc = "Bits 0:7 - Data Byte 2"] #[inline(always)] - pub fn byte2(&self) -> BYTE2_R { - BYTE2_R::new((self.bits & 0xff) as u8) + pub fn byte2(&self) -> Byte2R { + Byte2R::new((self.bits & 0xff) as u8) + } + #[doc = "Bits 8:15 - Data Byte 1"] + #[inline(always)] + pub fn byte1(&self) -> Byte1R { + Byte1R::new(((self.bits >> 8) & 0xff) as u8) } } impl W { - #[doc = "Bits 8:15 - Data Byte 1"] - #[inline(always)] - pub fn byte1(&mut self) -> BYTE1_W { - BYTE1_W { w: self } - } #[doc = "Bits 0:7 - Data Byte 2"] #[inline(always)] - pub fn byte2(&mut self) -> BYTE2_W { - BYTE2_W { w: self } + #[must_use] + pub fn byte2(&mut self) -> Byte2W { + Byte2W::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 8:15 - Data Byte 1"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn byte1(&mut self) -> Byte1W { + Byte1W::new(self, 8) } } -#[doc = "CAN Frame Data Word 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data0_cmb7](index.html) module"] -pub struct DATA0_CMB7_SPEC; -impl crate::RegisterSpec for DATA0_CMB7_SPEC { +#[doc = "CAN Frame Data Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data0_cmb7::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data0_cmb7::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Data0Cmb7Spec; +impl crate::RegisterSpec for Data0Cmb7Spec { type Ux = u32; } -#[doc = "`read()` method returns [data0_cmb7::R](R) reader structure"] -impl crate::Readable for DATA0_CMB7_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [data0_cmb7::W](W) writer structure"] -impl crate::Writable for DATA0_CMB7_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`data0_cmb7::R`](R) reader structure"] +impl crate::Readable for Data0Cmb7Spec {} +#[doc = "`write(|w| ..)` method takes [`data0_cmb7::W`](W) writer structure"] +impl crate::Writable for Data0Cmb7Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA0_CMB7 to value 0"] -impl crate::Resettable for DATA0_CMB7_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Data0Cmb7Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/data0_cmb8.rs b/va416xx/src/can0/data0_cmb8.rs index c074139..e1e2316 100644 --- a/va416xx/src/can0/data0_cmb8.rs +++ b/va416xx/src/can0/data0_cmb8.rs @@ -1,140 +1,55 @@ #[doc = "Register `DATA0_CMB8` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DATA0_CMB8` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `BYTE1` reader - Data Byte 1"] -pub struct BYTE1_R(crate::FieldReader); -impl BYTE1_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE1_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE1_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `BYTE1` writer - Data Byte 1"] -pub struct BYTE1_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE1_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0xff << 8)) | ((value as u32 & 0xff) << 8); - self.w - } -} +pub type W = crate::W; #[doc = "Field `BYTE2` reader - Data Byte 2"] -pub struct BYTE2_R(crate::FieldReader); -impl BYTE2_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE2_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE2_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Byte2R = crate::FieldReader; #[doc = "Field `BYTE2` writer - Data Byte 2"] -pub struct BYTE2_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE2_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type Byte2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +#[doc = "Field `BYTE1` reader - Data Byte 1"] +pub type Byte1R = crate::FieldReader; +#[doc = "Field `BYTE1` writer - Data Byte 1"] +pub type Byte1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { - #[doc = "Bits 8:15 - Data Byte 1"] - #[inline(always)] - pub fn byte1(&self) -> BYTE1_R { - BYTE1_R::new(((self.bits >> 8) & 0xff) as u8) - } #[doc = "Bits 0:7 - Data Byte 2"] #[inline(always)] - pub fn byte2(&self) -> BYTE2_R { - BYTE2_R::new((self.bits & 0xff) as u8) + pub fn byte2(&self) -> Byte2R { + Byte2R::new((self.bits & 0xff) as u8) + } + #[doc = "Bits 8:15 - Data Byte 1"] + #[inline(always)] + pub fn byte1(&self) -> Byte1R { + Byte1R::new(((self.bits >> 8) & 0xff) as u8) } } impl W { - #[doc = "Bits 8:15 - Data Byte 1"] - #[inline(always)] - pub fn byte1(&mut self) -> BYTE1_W { - BYTE1_W { w: self } - } #[doc = "Bits 0:7 - Data Byte 2"] #[inline(always)] - pub fn byte2(&mut self) -> BYTE2_W { - BYTE2_W { w: self } + #[must_use] + pub fn byte2(&mut self) -> Byte2W { + Byte2W::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 8:15 - Data Byte 1"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn byte1(&mut self) -> Byte1W { + Byte1W::new(self, 8) } } -#[doc = "CAN Frame Data Word 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data0_cmb8](index.html) module"] -pub struct DATA0_CMB8_SPEC; -impl crate::RegisterSpec for DATA0_CMB8_SPEC { +#[doc = "CAN Frame Data Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data0_cmb8::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data0_cmb8::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Data0Cmb8Spec; +impl crate::RegisterSpec for Data0Cmb8Spec { type Ux = u32; } -#[doc = "`read()` method returns [data0_cmb8::R](R) reader structure"] -impl crate::Readable for DATA0_CMB8_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [data0_cmb8::W](W) writer structure"] -impl crate::Writable for DATA0_CMB8_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`data0_cmb8::R`](R) reader structure"] +impl crate::Readable for Data0Cmb8Spec {} +#[doc = "`write(|w| ..)` method takes [`data0_cmb8::W`](W) writer structure"] +impl crate::Writable for Data0Cmb8Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA0_CMB8 to value 0"] -impl crate::Resettable for DATA0_CMB8_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Data0Cmb8Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/data0_cmb9.rs b/va416xx/src/can0/data0_cmb9.rs index 873bd2b..2d708bd 100644 --- a/va416xx/src/can0/data0_cmb9.rs +++ b/va416xx/src/can0/data0_cmb9.rs @@ -1,140 +1,55 @@ #[doc = "Register `DATA0_CMB9` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DATA0_CMB9` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `BYTE1` reader - Data Byte 1"] -pub struct BYTE1_R(crate::FieldReader); -impl BYTE1_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE1_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE1_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `BYTE1` writer - Data Byte 1"] -pub struct BYTE1_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE1_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0xff << 8)) | ((value as u32 & 0xff) << 8); - self.w - } -} +pub type W = crate::W; #[doc = "Field `BYTE2` reader - Data Byte 2"] -pub struct BYTE2_R(crate::FieldReader); -impl BYTE2_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE2_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE2_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Byte2R = crate::FieldReader; #[doc = "Field `BYTE2` writer - Data Byte 2"] -pub struct BYTE2_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE2_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type Byte2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +#[doc = "Field `BYTE1` reader - Data Byte 1"] +pub type Byte1R = crate::FieldReader; +#[doc = "Field `BYTE1` writer - Data Byte 1"] +pub type Byte1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { - #[doc = "Bits 8:15 - Data Byte 1"] - #[inline(always)] - pub fn byte1(&self) -> BYTE1_R { - BYTE1_R::new(((self.bits >> 8) & 0xff) as u8) - } #[doc = "Bits 0:7 - Data Byte 2"] #[inline(always)] - pub fn byte2(&self) -> BYTE2_R { - BYTE2_R::new((self.bits & 0xff) as u8) + pub fn byte2(&self) -> Byte2R { + Byte2R::new((self.bits & 0xff) as u8) + } + #[doc = "Bits 8:15 - Data Byte 1"] + #[inline(always)] + pub fn byte1(&self) -> Byte1R { + Byte1R::new(((self.bits >> 8) & 0xff) as u8) } } impl W { - #[doc = "Bits 8:15 - Data Byte 1"] - #[inline(always)] - pub fn byte1(&mut self) -> BYTE1_W { - BYTE1_W { w: self } - } #[doc = "Bits 0:7 - Data Byte 2"] #[inline(always)] - pub fn byte2(&mut self) -> BYTE2_W { - BYTE2_W { w: self } + #[must_use] + pub fn byte2(&mut self) -> Byte2W { + Byte2W::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 8:15 - Data Byte 1"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn byte1(&mut self) -> Byte1W { + Byte1W::new(self, 8) } } -#[doc = "CAN Frame Data Word 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data0_cmb9](index.html) module"] -pub struct DATA0_CMB9_SPEC; -impl crate::RegisterSpec for DATA0_CMB9_SPEC { +#[doc = "CAN Frame Data Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data0_cmb9::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data0_cmb9::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Data0Cmb9Spec; +impl crate::RegisterSpec for Data0Cmb9Spec { type Ux = u32; } -#[doc = "`read()` method returns [data0_cmb9::R](R) reader structure"] -impl crate::Readable for DATA0_CMB9_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [data0_cmb9::W](W) writer structure"] -impl crate::Writable for DATA0_CMB9_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`data0_cmb9::R`](R) reader structure"] +impl crate::Readable for Data0Cmb9Spec {} +#[doc = "`write(|w| ..)` method takes [`data0_cmb9::W`](W) writer structure"] +impl crate::Writable for Data0Cmb9Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA0_CMB9 to value 0"] -impl crate::Resettable for DATA0_CMB9_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Data0Cmb9Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/data0_hcmb.rs b/va416xx/src/can0/data0_hcmb.rs index 4166962..4f96c9e 100644 --- a/va416xx/src/can0/data0_hcmb.rs +++ b/va416xx/src/can0/data0_hcmb.rs @@ -1,140 +1,55 @@ #[doc = "Register `DATA0_HCMB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DATA0_HCMB` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `BYTE1` reader - Data Byte 1"] -pub struct BYTE1_R(crate::FieldReader); -impl BYTE1_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE1_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE1_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `BYTE1` writer - Data Byte 1"] -pub struct BYTE1_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE1_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0xff << 8)) | ((value as u32 & 0xff) << 8); - self.w - } -} +pub type W = crate::W; #[doc = "Field `BYTE2` reader - Data Byte 2"] -pub struct BYTE2_R(crate::FieldReader); -impl BYTE2_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE2_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE2_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Byte2R = crate::FieldReader; #[doc = "Field `BYTE2` writer - Data Byte 2"] -pub struct BYTE2_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE2_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type Byte2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +#[doc = "Field `BYTE1` reader - Data Byte 1"] +pub type Byte1R = crate::FieldReader; +#[doc = "Field `BYTE1` writer - Data Byte 1"] +pub type Byte1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { - #[doc = "Bits 8:15 - Data Byte 1"] - #[inline(always)] - pub fn byte1(&self) -> BYTE1_R { - BYTE1_R::new(((self.bits >> 8) & 0xff) as u8) - } #[doc = "Bits 0:7 - Data Byte 2"] #[inline(always)] - pub fn byte2(&self) -> BYTE2_R { - BYTE2_R::new((self.bits & 0xff) as u8) + pub fn byte2(&self) -> Byte2R { + Byte2R::new((self.bits & 0xff) as u8) + } + #[doc = "Bits 8:15 - Data Byte 1"] + #[inline(always)] + pub fn byte1(&self) -> Byte1R { + Byte1R::new(((self.bits >> 8) & 0xff) as u8) } } impl W { - #[doc = "Bits 8:15 - Data Byte 1"] - #[inline(always)] - pub fn byte1(&mut self) -> BYTE1_W { - BYTE1_W { w: self } - } #[doc = "Bits 0:7 - Data Byte 2"] #[inline(always)] - pub fn byte2(&mut self) -> BYTE2_W { - BYTE2_W { w: self } + #[must_use] + pub fn byte2(&mut self) -> Byte2W { + Byte2W::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 8:15 - Data Byte 1"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn byte1(&mut self) -> Byte1W { + Byte1W::new(self, 8) } } -#[doc = "CAN Frame Data Word 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data0_hcmb](index.html) module"] -pub struct DATA0_HCMB_SPEC; -impl crate::RegisterSpec for DATA0_HCMB_SPEC { +#[doc = "CAN Frame Data Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data0_hcmb::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data0_hcmb::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Data0HcmbSpec; +impl crate::RegisterSpec for Data0HcmbSpec { type Ux = u32; } -#[doc = "`read()` method returns [data0_hcmb::R](R) reader structure"] -impl crate::Readable for DATA0_HCMB_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [data0_hcmb::W](W) writer structure"] -impl crate::Writable for DATA0_HCMB_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`data0_hcmb::R`](R) reader structure"] +impl crate::Readable for Data0HcmbSpec {} +#[doc = "`write(|w| ..)` method takes [`data0_hcmb::W`](W) writer structure"] +impl crate::Writable for Data0HcmbSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA0_HCMB to value 0"] -impl crate::Resettable for DATA0_HCMB_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Data0HcmbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/data1_cmb0.rs b/va416xx/src/can0/data1_cmb0.rs index 2ac48f8..7fb354d 100644 --- a/va416xx/src/can0/data1_cmb0.rs +++ b/va416xx/src/can0/data1_cmb0.rs @@ -1,140 +1,55 @@ #[doc = "Register `DATA1_CMB0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DATA1_CMB0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `BYTE3` reader - Data Byte 3"] -pub struct BYTE3_R(crate::FieldReader); -impl BYTE3_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE3_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE3_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `BYTE3` writer - Data Byte 3"] -pub struct BYTE3_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE3_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0xff << 8)) | ((value as u32 & 0xff) << 8); - self.w - } -} +pub type W = crate::W; #[doc = "Field `BYTE4` reader - Data Byte 4"] -pub struct BYTE4_R(crate::FieldReader); -impl BYTE4_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE4_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE4_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Byte4R = crate::FieldReader; #[doc = "Field `BYTE4` writer - Data Byte 4"] -pub struct BYTE4_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE4_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type Byte4W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +#[doc = "Field `BYTE3` reader - Data Byte 3"] +pub type Byte3R = crate::FieldReader; +#[doc = "Field `BYTE3` writer - Data Byte 3"] +pub type Byte3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { - #[doc = "Bits 8:15 - Data Byte 3"] - #[inline(always)] - pub fn byte3(&self) -> BYTE3_R { - BYTE3_R::new(((self.bits >> 8) & 0xff) as u8) - } #[doc = "Bits 0:7 - Data Byte 4"] #[inline(always)] - pub fn byte4(&self) -> BYTE4_R { - BYTE4_R::new((self.bits & 0xff) as u8) + pub fn byte4(&self) -> Byte4R { + Byte4R::new((self.bits & 0xff) as u8) + } + #[doc = "Bits 8:15 - Data Byte 3"] + #[inline(always)] + pub fn byte3(&self) -> Byte3R { + Byte3R::new(((self.bits >> 8) & 0xff) as u8) } } impl W { - #[doc = "Bits 8:15 - Data Byte 3"] - #[inline(always)] - pub fn byte3(&mut self) -> BYTE3_W { - BYTE3_W { w: self } - } #[doc = "Bits 0:7 - Data Byte 4"] #[inline(always)] - pub fn byte4(&mut self) -> BYTE4_W { - BYTE4_W { w: self } + #[must_use] + pub fn byte4(&mut self) -> Byte4W { + Byte4W::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 8:15 - Data Byte 3"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn byte3(&mut self) -> Byte3W { + Byte3W::new(self, 8) } } -#[doc = "CAN Frame Data Word 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data1_cmb0](index.html) module"] -pub struct DATA1_CMB0_SPEC; -impl crate::RegisterSpec for DATA1_CMB0_SPEC { +#[doc = "CAN Frame Data Word 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data1_cmb0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data1_cmb0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Data1Cmb0Spec; +impl crate::RegisterSpec for Data1Cmb0Spec { type Ux = u32; } -#[doc = "`read()` method returns [data1_cmb0::R](R) reader structure"] -impl crate::Readable for DATA1_CMB0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [data1_cmb0::W](W) writer structure"] -impl crate::Writable for DATA1_CMB0_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`data1_cmb0::R`](R) reader structure"] +impl crate::Readable for Data1Cmb0Spec {} +#[doc = "`write(|w| ..)` method takes [`data1_cmb0::W`](W) writer structure"] +impl crate::Writable for Data1Cmb0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA1_CMB0 to value 0"] -impl crate::Resettable for DATA1_CMB0_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Data1Cmb0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/data1_cmb1.rs b/va416xx/src/can0/data1_cmb1.rs index 52952b7..a3f1842 100644 --- a/va416xx/src/can0/data1_cmb1.rs +++ b/va416xx/src/can0/data1_cmb1.rs @@ -1,140 +1,55 @@ #[doc = "Register `DATA1_CMB1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DATA1_CMB1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `BYTE3` reader - Data Byte 3"] -pub struct BYTE3_R(crate::FieldReader); -impl BYTE3_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE3_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE3_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `BYTE3` writer - Data Byte 3"] -pub struct BYTE3_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE3_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0xff << 8)) | ((value as u32 & 0xff) << 8); - self.w - } -} +pub type W = crate::W; #[doc = "Field `BYTE4` reader - Data Byte 4"] -pub struct BYTE4_R(crate::FieldReader); -impl BYTE4_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE4_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE4_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Byte4R = crate::FieldReader; #[doc = "Field `BYTE4` writer - Data Byte 4"] -pub struct BYTE4_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE4_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type Byte4W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +#[doc = "Field `BYTE3` reader - Data Byte 3"] +pub type Byte3R = crate::FieldReader; +#[doc = "Field `BYTE3` writer - Data Byte 3"] +pub type Byte3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { - #[doc = "Bits 8:15 - Data Byte 3"] - #[inline(always)] - pub fn byte3(&self) -> BYTE3_R { - BYTE3_R::new(((self.bits >> 8) & 0xff) as u8) - } #[doc = "Bits 0:7 - Data Byte 4"] #[inline(always)] - pub fn byte4(&self) -> BYTE4_R { - BYTE4_R::new((self.bits & 0xff) as u8) + pub fn byte4(&self) -> Byte4R { + Byte4R::new((self.bits & 0xff) as u8) + } + #[doc = "Bits 8:15 - Data Byte 3"] + #[inline(always)] + pub fn byte3(&self) -> Byte3R { + Byte3R::new(((self.bits >> 8) & 0xff) as u8) } } impl W { - #[doc = "Bits 8:15 - Data Byte 3"] - #[inline(always)] - pub fn byte3(&mut self) -> BYTE3_W { - BYTE3_W { w: self } - } #[doc = "Bits 0:7 - Data Byte 4"] #[inline(always)] - pub fn byte4(&mut self) -> BYTE4_W { - BYTE4_W { w: self } + #[must_use] + pub fn byte4(&mut self) -> Byte4W { + Byte4W::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 8:15 - Data Byte 3"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn byte3(&mut self) -> Byte3W { + Byte3W::new(self, 8) } } -#[doc = "CAN Frame Data Word 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data1_cmb1](index.html) module"] -pub struct DATA1_CMB1_SPEC; -impl crate::RegisterSpec for DATA1_CMB1_SPEC { +#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data1_cmb1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data1_cmb1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Data1Cmb1Spec; +impl crate::RegisterSpec for Data1Cmb1Spec { type Ux = u32; } -#[doc = "`read()` method returns [data1_cmb1::R](R) reader structure"] -impl crate::Readable for DATA1_CMB1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [data1_cmb1::W](W) writer structure"] -impl crate::Writable for DATA1_CMB1_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`data1_cmb1::R`](R) reader structure"] +impl crate::Readable for Data1Cmb1Spec {} +#[doc = "`write(|w| ..)` method takes [`data1_cmb1::W`](W) writer structure"] +impl crate::Writable for Data1Cmb1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA1_CMB1 to value 0"] -impl crate::Resettable for DATA1_CMB1_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Data1Cmb1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/data1_cmb10.rs b/va416xx/src/can0/data1_cmb10.rs index f82a89f..25fca4d 100644 --- a/va416xx/src/can0/data1_cmb10.rs +++ b/va416xx/src/can0/data1_cmb10.rs @@ -1,140 +1,55 @@ #[doc = "Register `DATA1_CMB10` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DATA1_CMB10` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `BYTE3` reader - Data Byte 3"] -pub struct BYTE3_R(crate::FieldReader); -impl BYTE3_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE3_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE3_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `BYTE3` writer - Data Byte 3"] -pub struct BYTE3_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE3_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0xff << 8)) | ((value as u32 & 0xff) << 8); - self.w - } -} +pub type W = crate::W; #[doc = "Field `BYTE4` reader - Data Byte 4"] -pub struct BYTE4_R(crate::FieldReader); -impl BYTE4_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE4_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE4_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Byte4R = crate::FieldReader; #[doc = "Field `BYTE4` writer - Data Byte 4"] -pub struct BYTE4_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE4_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type Byte4W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +#[doc = "Field `BYTE3` reader - Data Byte 3"] +pub type Byte3R = crate::FieldReader; +#[doc = "Field `BYTE3` writer - Data Byte 3"] +pub type Byte3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { - #[doc = "Bits 8:15 - Data Byte 3"] - #[inline(always)] - pub fn byte3(&self) -> BYTE3_R { - BYTE3_R::new(((self.bits >> 8) & 0xff) as u8) - } #[doc = "Bits 0:7 - Data Byte 4"] #[inline(always)] - pub fn byte4(&self) -> BYTE4_R { - BYTE4_R::new((self.bits & 0xff) as u8) + pub fn byte4(&self) -> Byte4R { + Byte4R::new((self.bits & 0xff) as u8) + } + #[doc = "Bits 8:15 - Data Byte 3"] + #[inline(always)] + pub fn byte3(&self) -> Byte3R { + Byte3R::new(((self.bits >> 8) & 0xff) as u8) } } impl W { - #[doc = "Bits 8:15 - Data Byte 3"] - #[inline(always)] - pub fn byte3(&mut self) -> BYTE3_W { - BYTE3_W { w: self } - } #[doc = "Bits 0:7 - Data Byte 4"] #[inline(always)] - pub fn byte4(&mut self) -> BYTE4_W { - BYTE4_W { w: self } + #[must_use] + pub fn byte4(&mut self) -> Byte4W { + Byte4W::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 8:15 - Data Byte 3"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn byte3(&mut self) -> Byte3W { + Byte3W::new(self, 8) } } -#[doc = "CAN Frame Data Word 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data1_cmb10](index.html) module"] -pub struct DATA1_CMB10_SPEC; -impl crate::RegisterSpec for DATA1_CMB10_SPEC { +#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data1_cmb10::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data1_cmb10::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Data1Cmb10Spec; +impl crate::RegisterSpec for Data1Cmb10Spec { type Ux = u32; } -#[doc = "`read()` method returns [data1_cmb10::R](R) reader structure"] -impl crate::Readable for DATA1_CMB10_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [data1_cmb10::W](W) writer structure"] -impl crate::Writable for DATA1_CMB10_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`data1_cmb10::R`](R) reader structure"] +impl crate::Readable for Data1Cmb10Spec {} +#[doc = "`write(|w| ..)` method takes [`data1_cmb10::W`](W) writer structure"] +impl crate::Writable for Data1Cmb10Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA1_CMB10 to value 0"] -impl crate::Resettable for DATA1_CMB10_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Data1Cmb10Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/data1_cmb11.rs b/va416xx/src/can0/data1_cmb11.rs index ce22304..62ef6af 100644 --- a/va416xx/src/can0/data1_cmb11.rs +++ b/va416xx/src/can0/data1_cmb11.rs @@ -1,140 +1,55 @@ #[doc = "Register `DATA1_CMB11` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DATA1_CMB11` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `BYTE3` reader - Data Byte 3"] -pub struct BYTE3_R(crate::FieldReader); -impl BYTE3_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE3_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE3_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `BYTE3` writer - Data Byte 3"] -pub struct BYTE3_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE3_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0xff << 8)) | ((value as u32 & 0xff) << 8); - self.w - } -} +pub type W = crate::W; #[doc = "Field `BYTE4` reader - Data Byte 4"] -pub struct BYTE4_R(crate::FieldReader); -impl BYTE4_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE4_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE4_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Byte4R = crate::FieldReader; #[doc = "Field `BYTE4` writer - Data Byte 4"] -pub struct BYTE4_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE4_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type Byte4W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +#[doc = "Field `BYTE3` reader - Data Byte 3"] +pub type Byte3R = crate::FieldReader; +#[doc = "Field `BYTE3` writer - Data Byte 3"] +pub type Byte3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { - #[doc = "Bits 8:15 - Data Byte 3"] - #[inline(always)] - pub fn byte3(&self) -> BYTE3_R { - BYTE3_R::new(((self.bits >> 8) & 0xff) as u8) - } #[doc = "Bits 0:7 - Data Byte 4"] #[inline(always)] - pub fn byte4(&self) -> BYTE4_R { - BYTE4_R::new((self.bits & 0xff) as u8) + pub fn byte4(&self) -> Byte4R { + Byte4R::new((self.bits & 0xff) as u8) + } + #[doc = "Bits 8:15 - Data Byte 3"] + #[inline(always)] + pub fn byte3(&self) -> Byte3R { + Byte3R::new(((self.bits >> 8) & 0xff) as u8) } } impl W { - #[doc = "Bits 8:15 - Data Byte 3"] - #[inline(always)] - pub fn byte3(&mut self) -> BYTE3_W { - BYTE3_W { w: self } - } #[doc = "Bits 0:7 - Data Byte 4"] #[inline(always)] - pub fn byte4(&mut self) -> BYTE4_W { - BYTE4_W { w: self } + #[must_use] + pub fn byte4(&mut self) -> Byte4W { + Byte4W::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 8:15 - Data Byte 3"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn byte3(&mut self) -> Byte3W { + Byte3W::new(self, 8) } } -#[doc = "CAN Frame Data Word 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data1_cmb11](index.html) module"] -pub struct DATA1_CMB11_SPEC; -impl crate::RegisterSpec for DATA1_CMB11_SPEC { +#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data1_cmb11::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data1_cmb11::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Data1Cmb11Spec; +impl crate::RegisterSpec for Data1Cmb11Spec { type Ux = u32; } -#[doc = "`read()` method returns [data1_cmb11::R](R) reader structure"] -impl crate::Readable for DATA1_CMB11_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [data1_cmb11::W](W) writer structure"] -impl crate::Writable for DATA1_CMB11_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`data1_cmb11::R`](R) reader structure"] +impl crate::Readable for Data1Cmb11Spec {} +#[doc = "`write(|w| ..)` method takes [`data1_cmb11::W`](W) writer structure"] +impl crate::Writable for Data1Cmb11Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA1_CMB11 to value 0"] -impl crate::Resettable for DATA1_CMB11_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Data1Cmb11Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/data1_cmb12.rs b/va416xx/src/can0/data1_cmb12.rs index 8c861e7..248930f 100644 --- a/va416xx/src/can0/data1_cmb12.rs +++ b/va416xx/src/can0/data1_cmb12.rs @@ -1,140 +1,55 @@ #[doc = "Register `DATA1_CMB12` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DATA1_CMB12` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `BYTE3` reader - Data Byte 3"] -pub struct BYTE3_R(crate::FieldReader); -impl BYTE3_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE3_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE3_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `BYTE3` writer - Data Byte 3"] -pub struct BYTE3_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE3_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0xff << 8)) | ((value as u32 & 0xff) << 8); - self.w - } -} +pub type W = crate::W; #[doc = "Field `BYTE4` reader - Data Byte 4"] -pub struct BYTE4_R(crate::FieldReader); -impl BYTE4_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE4_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE4_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Byte4R = crate::FieldReader; #[doc = "Field `BYTE4` writer - Data Byte 4"] -pub struct BYTE4_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE4_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type Byte4W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +#[doc = "Field `BYTE3` reader - Data Byte 3"] +pub type Byte3R = crate::FieldReader; +#[doc = "Field `BYTE3` writer - Data Byte 3"] +pub type Byte3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { - #[doc = "Bits 8:15 - Data Byte 3"] - #[inline(always)] - pub fn byte3(&self) -> BYTE3_R { - BYTE3_R::new(((self.bits >> 8) & 0xff) as u8) - } #[doc = "Bits 0:7 - Data Byte 4"] #[inline(always)] - pub fn byte4(&self) -> BYTE4_R { - BYTE4_R::new((self.bits & 0xff) as u8) + pub fn byte4(&self) -> Byte4R { + Byte4R::new((self.bits & 0xff) as u8) + } + #[doc = "Bits 8:15 - Data Byte 3"] + #[inline(always)] + pub fn byte3(&self) -> Byte3R { + Byte3R::new(((self.bits >> 8) & 0xff) as u8) } } impl W { - #[doc = "Bits 8:15 - Data Byte 3"] - #[inline(always)] - pub fn byte3(&mut self) -> BYTE3_W { - BYTE3_W { w: self } - } #[doc = "Bits 0:7 - Data Byte 4"] #[inline(always)] - pub fn byte4(&mut self) -> BYTE4_W { - BYTE4_W { w: self } + #[must_use] + pub fn byte4(&mut self) -> Byte4W { + Byte4W::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 8:15 - Data Byte 3"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn byte3(&mut self) -> Byte3W { + Byte3W::new(self, 8) } } -#[doc = "CAN Frame Data Word 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data1_cmb12](index.html) module"] -pub struct DATA1_CMB12_SPEC; -impl crate::RegisterSpec for DATA1_CMB12_SPEC { +#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data1_cmb12::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data1_cmb12::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Data1Cmb12Spec; +impl crate::RegisterSpec for Data1Cmb12Spec { type Ux = u32; } -#[doc = "`read()` method returns [data1_cmb12::R](R) reader structure"] -impl crate::Readable for DATA1_CMB12_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [data1_cmb12::W](W) writer structure"] -impl crate::Writable for DATA1_CMB12_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`data1_cmb12::R`](R) reader structure"] +impl crate::Readable for Data1Cmb12Spec {} +#[doc = "`write(|w| ..)` method takes [`data1_cmb12::W`](W) writer structure"] +impl crate::Writable for Data1Cmb12Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA1_CMB12 to value 0"] -impl crate::Resettable for DATA1_CMB12_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Data1Cmb12Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/data1_cmb13.rs b/va416xx/src/can0/data1_cmb13.rs index 1db6b66..da85ae6 100644 --- a/va416xx/src/can0/data1_cmb13.rs +++ b/va416xx/src/can0/data1_cmb13.rs @@ -1,140 +1,55 @@ #[doc = "Register `DATA1_CMB13` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DATA1_CMB13` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `BYTE3` reader - Data Byte 3"] -pub struct BYTE3_R(crate::FieldReader); -impl BYTE3_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE3_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE3_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `BYTE3` writer - Data Byte 3"] -pub struct BYTE3_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE3_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0xff << 8)) | ((value as u32 & 0xff) << 8); - self.w - } -} +pub type W = crate::W; #[doc = "Field `BYTE4` reader - Data Byte 4"] -pub struct BYTE4_R(crate::FieldReader); -impl BYTE4_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE4_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE4_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Byte4R = crate::FieldReader; #[doc = "Field `BYTE4` writer - Data Byte 4"] -pub struct BYTE4_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE4_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type Byte4W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +#[doc = "Field `BYTE3` reader - Data Byte 3"] +pub type Byte3R = crate::FieldReader; +#[doc = "Field `BYTE3` writer - Data Byte 3"] +pub type Byte3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { - #[doc = "Bits 8:15 - Data Byte 3"] - #[inline(always)] - pub fn byte3(&self) -> BYTE3_R { - BYTE3_R::new(((self.bits >> 8) & 0xff) as u8) - } #[doc = "Bits 0:7 - Data Byte 4"] #[inline(always)] - pub fn byte4(&self) -> BYTE4_R { - BYTE4_R::new((self.bits & 0xff) as u8) + pub fn byte4(&self) -> Byte4R { + Byte4R::new((self.bits & 0xff) as u8) + } + #[doc = "Bits 8:15 - Data Byte 3"] + #[inline(always)] + pub fn byte3(&self) -> Byte3R { + Byte3R::new(((self.bits >> 8) & 0xff) as u8) } } impl W { - #[doc = "Bits 8:15 - Data Byte 3"] - #[inline(always)] - pub fn byte3(&mut self) -> BYTE3_W { - BYTE3_W { w: self } - } #[doc = "Bits 0:7 - Data Byte 4"] #[inline(always)] - pub fn byte4(&mut self) -> BYTE4_W { - BYTE4_W { w: self } + #[must_use] + pub fn byte4(&mut self) -> Byte4W { + Byte4W::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 8:15 - Data Byte 3"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn byte3(&mut self) -> Byte3W { + Byte3W::new(self, 8) } } -#[doc = "CAN Frame Data Word 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data1_cmb13](index.html) module"] -pub struct DATA1_CMB13_SPEC; -impl crate::RegisterSpec for DATA1_CMB13_SPEC { +#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data1_cmb13::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data1_cmb13::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Data1Cmb13Spec; +impl crate::RegisterSpec for Data1Cmb13Spec { type Ux = u32; } -#[doc = "`read()` method returns [data1_cmb13::R](R) reader structure"] -impl crate::Readable for DATA1_CMB13_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [data1_cmb13::W](W) writer structure"] -impl crate::Writable for DATA1_CMB13_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`data1_cmb13::R`](R) reader structure"] +impl crate::Readable for Data1Cmb13Spec {} +#[doc = "`write(|w| ..)` method takes [`data1_cmb13::W`](W) writer structure"] +impl crate::Writable for Data1Cmb13Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA1_CMB13 to value 0"] -impl crate::Resettable for DATA1_CMB13_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Data1Cmb13Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/data1_cmb14.rs b/va416xx/src/can0/data1_cmb14.rs index b4ac3bd..67b0621 100644 --- a/va416xx/src/can0/data1_cmb14.rs +++ b/va416xx/src/can0/data1_cmb14.rs @@ -1,140 +1,55 @@ #[doc = "Register `DATA1_CMB14` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DATA1_CMB14` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `BYTE3` reader - Data Byte 3"] -pub struct BYTE3_R(crate::FieldReader); -impl BYTE3_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE3_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE3_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `BYTE3` writer - Data Byte 3"] -pub struct BYTE3_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE3_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0xff << 8)) | ((value as u32 & 0xff) << 8); - self.w - } -} +pub type W = crate::W; #[doc = "Field `BYTE4` reader - Data Byte 4"] -pub struct BYTE4_R(crate::FieldReader); -impl BYTE4_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE4_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE4_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Byte4R = crate::FieldReader; #[doc = "Field `BYTE4` writer - Data Byte 4"] -pub struct BYTE4_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE4_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type Byte4W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +#[doc = "Field `BYTE3` reader - Data Byte 3"] +pub type Byte3R = crate::FieldReader; +#[doc = "Field `BYTE3` writer - Data Byte 3"] +pub type Byte3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { - #[doc = "Bits 8:15 - Data Byte 3"] - #[inline(always)] - pub fn byte3(&self) -> BYTE3_R { - BYTE3_R::new(((self.bits >> 8) & 0xff) as u8) - } #[doc = "Bits 0:7 - Data Byte 4"] #[inline(always)] - pub fn byte4(&self) -> BYTE4_R { - BYTE4_R::new((self.bits & 0xff) as u8) + pub fn byte4(&self) -> Byte4R { + Byte4R::new((self.bits & 0xff) as u8) + } + #[doc = "Bits 8:15 - Data Byte 3"] + #[inline(always)] + pub fn byte3(&self) -> Byte3R { + Byte3R::new(((self.bits >> 8) & 0xff) as u8) } } impl W { - #[doc = "Bits 8:15 - Data Byte 3"] - #[inline(always)] - pub fn byte3(&mut self) -> BYTE3_W { - BYTE3_W { w: self } - } #[doc = "Bits 0:7 - Data Byte 4"] #[inline(always)] - pub fn byte4(&mut self) -> BYTE4_W { - BYTE4_W { w: self } + #[must_use] + pub fn byte4(&mut self) -> Byte4W { + Byte4W::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 8:15 - Data Byte 3"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn byte3(&mut self) -> Byte3W { + Byte3W::new(self, 8) } } -#[doc = "CAN Frame Data Word 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data1_cmb14](index.html) module"] -pub struct DATA1_CMB14_SPEC; -impl crate::RegisterSpec for DATA1_CMB14_SPEC { +#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data1_cmb14::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data1_cmb14::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Data1Cmb14Spec; +impl crate::RegisterSpec for Data1Cmb14Spec { type Ux = u32; } -#[doc = "`read()` method returns [data1_cmb14::R](R) reader structure"] -impl crate::Readable for DATA1_CMB14_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [data1_cmb14::W](W) writer structure"] -impl crate::Writable for DATA1_CMB14_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`data1_cmb14::R`](R) reader structure"] +impl crate::Readable for Data1Cmb14Spec {} +#[doc = "`write(|w| ..)` method takes [`data1_cmb14::W`](W) writer structure"] +impl crate::Writable for Data1Cmb14Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA1_CMB14 to value 0"] -impl crate::Resettable for DATA1_CMB14_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Data1Cmb14Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/data1_cmb2.rs b/va416xx/src/can0/data1_cmb2.rs index 2106284..9c0f91e 100644 --- a/va416xx/src/can0/data1_cmb2.rs +++ b/va416xx/src/can0/data1_cmb2.rs @@ -1,140 +1,55 @@ #[doc = "Register `DATA1_CMB2` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DATA1_CMB2` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `BYTE3` reader - Data Byte 3"] -pub struct BYTE3_R(crate::FieldReader); -impl BYTE3_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE3_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE3_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `BYTE3` writer - Data Byte 3"] -pub struct BYTE3_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE3_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0xff << 8)) | ((value as u32 & 0xff) << 8); - self.w - } -} +pub type W = crate::W; #[doc = "Field `BYTE4` reader - Data Byte 4"] -pub struct BYTE4_R(crate::FieldReader); -impl BYTE4_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE4_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE4_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Byte4R = crate::FieldReader; #[doc = "Field `BYTE4` writer - Data Byte 4"] -pub struct BYTE4_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE4_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type Byte4W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +#[doc = "Field `BYTE3` reader - Data Byte 3"] +pub type Byte3R = crate::FieldReader; +#[doc = "Field `BYTE3` writer - Data Byte 3"] +pub type Byte3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { - #[doc = "Bits 8:15 - Data Byte 3"] - #[inline(always)] - pub fn byte3(&self) -> BYTE3_R { - BYTE3_R::new(((self.bits >> 8) & 0xff) as u8) - } #[doc = "Bits 0:7 - Data Byte 4"] #[inline(always)] - pub fn byte4(&self) -> BYTE4_R { - BYTE4_R::new((self.bits & 0xff) as u8) + pub fn byte4(&self) -> Byte4R { + Byte4R::new((self.bits & 0xff) as u8) + } + #[doc = "Bits 8:15 - Data Byte 3"] + #[inline(always)] + pub fn byte3(&self) -> Byte3R { + Byte3R::new(((self.bits >> 8) & 0xff) as u8) } } impl W { - #[doc = "Bits 8:15 - Data Byte 3"] - #[inline(always)] - pub fn byte3(&mut self) -> BYTE3_W { - BYTE3_W { w: self } - } #[doc = "Bits 0:7 - Data Byte 4"] #[inline(always)] - pub fn byte4(&mut self) -> BYTE4_W { - BYTE4_W { w: self } + #[must_use] + pub fn byte4(&mut self) -> Byte4W { + Byte4W::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 8:15 - Data Byte 3"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn byte3(&mut self) -> Byte3W { + Byte3W::new(self, 8) } } -#[doc = "CAN Frame Data Word 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data1_cmb2](index.html) module"] -pub struct DATA1_CMB2_SPEC; -impl crate::RegisterSpec for DATA1_CMB2_SPEC { +#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data1_cmb2::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data1_cmb2::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Data1Cmb2Spec; +impl crate::RegisterSpec for Data1Cmb2Spec { type Ux = u32; } -#[doc = "`read()` method returns [data1_cmb2::R](R) reader structure"] -impl crate::Readable for DATA1_CMB2_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [data1_cmb2::W](W) writer structure"] -impl crate::Writable for DATA1_CMB2_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`data1_cmb2::R`](R) reader structure"] +impl crate::Readable for Data1Cmb2Spec {} +#[doc = "`write(|w| ..)` method takes [`data1_cmb2::W`](W) writer structure"] +impl crate::Writable for Data1Cmb2Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA1_CMB2 to value 0"] -impl crate::Resettable for DATA1_CMB2_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Data1Cmb2Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/data1_cmb3.rs b/va416xx/src/can0/data1_cmb3.rs index e2ac3aa..eb07213 100644 --- a/va416xx/src/can0/data1_cmb3.rs +++ b/va416xx/src/can0/data1_cmb3.rs @@ -1,140 +1,55 @@ #[doc = "Register `DATA1_CMB3` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DATA1_CMB3` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `BYTE3` reader - Data Byte 3"] -pub struct BYTE3_R(crate::FieldReader); -impl BYTE3_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE3_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE3_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `BYTE3` writer - Data Byte 3"] -pub struct BYTE3_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE3_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0xff << 8)) | ((value as u32 & 0xff) << 8); - self.w - } -} +pub type W = crate::W; #[doc = "Field `BYTE4` reader - Data Byte 4"] -pub struct BYTE4_R(crate::FieldReader); -impl BYTE4_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE4_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE4_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Byte4R = crate::FieldReader; #[doc = "Field `BYTE4` writer - Data Byte 4"] -pub struct BYTE4_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE4_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type Byte4W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +#[doc = "Field `BYTE3` reader - Data Byte 3"] +pub type Byte3R = crate::FieldReader; +#[doc = "Field `BYTE3` writer - Data Byte 3"] +pub type Byte3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { - #[doc = "Bits 8:15 - Data Byte 3"] - #[inline(always)] - pub fn byte3(&self) -> BYTE3_R { - BYTE3_R::new(((self.bits >> 8) & 0xff) as u8) - } #[doc = "Bits 0:7 - Data Byte 4"] #[inline(always)] - pub fn byte4(&self) -> BYTE4_R { - BYTE4_R::new((self.bits & 0xff) as u8) + pub fn byte4(&self) -> Byte4R { + Byte4R::new((self.bits & 0xff) as u8) + } + #[doc = "Bits 8:15 - Data Byte 3"] + #[inline(always)] + pub fn byte3(&self) -> Byte3R { + Byte3R::new(((self.bits >> 8) & 0xff) as u8) } } impl W { - #[doc = "Bits 8:15 - Data Byte 3"] - #[inline(always)] - pub fn byte3(&mut self) -> BYTE3_W { - BYTE3_W { w: self } - } #[doc = "Bits 0:7 - Data Byte 4"] #[inline(always)] - pub fn byte4(&mut self) -> BYTE4_W { - BYTE4_W { w: self } + #[must_use] + pub fn byte4(&mut self) -> Byte4W { + Byte4W::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 8:15 - Data Byte 3"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn byte3(&mut self) -> Byte3W { + Byte3W::new(self, 8) } } -#[doc = "CAN Frame Data Word 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data1_cmb3](index.html) module"] -pub struct DATA1_CMB3_SPEC; -impl crate::RegisterSpec for DATA1_CMB3_SPEC { +#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data1_cmb3::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data1_cmb3::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Data1Cmb3Spec; +impl crate::RegisterSpec for Data1Cmb3Spec { type Ux = u32; } -#[doc = "`read()` method returns [data1_cmb3::R](R) reader structure"] -impl crate::Readable for DATA1_CMB3_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [data1_cmb3::W](W) writer structure"] -impl crate::Writable for DATA1_CMB3_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`data1_cmb3::R`](R) reader structure"] +impl crate::Readable for Data1Cmb3Spec {} +#[doc = "`write(|w| ..)` method takes [`data1_cmb3::W`](W) writer structure"] +impl crate::Writable for Data1Cmb3Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA1_CMB3 to value 0"] -impl crate::Resettable for DATA1_CMB3_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Data1Cmb3Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/data1_cmb4.rs b/va416xx/src/can0/data1_cmb4.rs index 83aea2b..1ed478d 100644 --- a/va416xx/src/can0/data1_cmb4.rs +++ b/va416xx/src/can0/data1_cmb4.rs @@ -1,140 +1,55 @@ #[doc = "Register `DATA1_CMB4` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DATA1_CMB4` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `BYTE3` reader - Data Byte 3"] -pub struct BYTE3_R(crate::FieldReader); -impl BYTE3_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE3_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE3_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `BYTE3` writer - Data Byte 3"] -pub struct BYTE3_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE3_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0xff << 8)) | ((value as u32 & 0xff) << 8); - self.w - } -} +pub type W = crate::W; #[doc = "Field `BYTE4` reader - Data Byte 4"] -pub struct BYTE4_R(crate::FieldReader); -impl BYTE4_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE4_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE4_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Byte4R = crate::FieldReader; #[doc = "Field `BYTE4` writer - Data Byte 4"] -pub struct BYTE4_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE4_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type Byte4W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +#[doc = "Field `BYTE3` reader - Data Byte 3"] +pub type Byte3R = crate::FieldReader; +#[doc = "Field `BYTE3` writer - Data Byte 3"] +pub type Byte3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { - #[doc = "Bits 8:15 - Data Byte 3"] - #[inline(always)] - pub fn byte3(&self) -> BYTE3_R { - BYTE3_R::new(((self.bits >> 8) & 0xff) as u8) - } #[doc = "Bits 0:7 - Data Byte 4"] #[inline(always)] - pub fn byte4(&self) -> BYTE4_R { - BYTE4_R::new((self.bits & 0xff) as u8) + pub fn byte4(&self) -> Byte4R { + Byte4R::new((self.bits & 0xff) as u8) + } + #[doc = "Bits 8:15 - Data Byte 3"] + #[inline(always)] + pub fn byte3(&self) -> Byte3R { + Byte3R::new(((self.bits >> 8) & 0xff) as u8) } } impl W { - #[doc = "Bits 8:15 - Data Byte 3"] - #[inline(always)] - pub fn byte3(&mut self) -> BYTE3_W { - BYTE3_W { w: self } - } #[doc = "Bits 0:7 - Data Byte 4"] #[inline(always)] - pub fn byte4(&mut self) -> BYTE4_W { - BYTE4_W { w: self } + #[must_use] + pub fn byte4(&mut self) -> Byte4W { + Byte4W::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 8:15 - Data Byte 3"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn byte3(&mut self) -> Byte3W { + Byte3W::new(self, 8) } } -#[doc = "CAN Frame Data Word 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data1_cmb4](index.html) module"] -pub struct DATA1_CMB4_SPEC; -impl crate::RegisterSpec for DATA1_CMB4_SPEC { +#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data1_cmb4::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data1_cmb4::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Data1Cmb4Spec; +impl crate::RegisterSpec for Data1Cmb4Spec { type Ux = u32; } -#[doc = "`read()` method returns [data1_cmb4::R](R) reader structure"] -impl crate::Readable for DATA1_CMB4_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [data1_cmb4::W](W) writer structure"] -impl crate::Writable for DATA1_CMB4_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`data1_cmb4::R`](R) reader structure"] +impl crate::Readable for Data1Cmb4Spec {} +#[doc = "`write(|w| ..)` method takes [`data1_cmb4::W`](W) writer structure"] +impl crate::Writable for Data1Cmb4Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA1_CMB4 to value 0"] -impl crate::Resettable for DATA1_CMB4_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Data1Cmb4Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/data1_cmb5.rs b/va416xx/src/can0/data1_cmb5.rs index d92877d..4673b81 100644 --- a/va416xx/src/can0/data1_cmb5.rs +++ b/va416xx/src/can0/data1_cmb5.rs @@ -1,140 +1,55 @@ #[doc = "Register `DATA1_CMB5` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DATA1_CMB5` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `BYTE3` reader - Data Byte 3"] -pub struct BYTE3_R(crate::FieldReader); -impl BYTE3_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE3_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE3_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `BYTE3` writer - Data Byte 3"] -pub struct BYTE3_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE3_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0xff << 8)) | ((value as u32 & 0xff) << 8); - self.w - } -} +pub type W = crate::W; #[doc = "Field `BYTE4` reader - Data Byte 4"] -pub struct BYTE4_R(crate::FieldReader); -impl BYTE4_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE4_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE4_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Byte4R = crate::FieldReader; #[doc = "Field `BYTE4` writer - Data Byte 4"] -pub struct BYTE4_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE4_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type Byte4W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +#[doc = "Field `BYTE3` reader - Data Byte 3"] +pub type Byte3R = crate::FieldReader; +#[doc = "Field `BYTE3` writer - Data Byte 3"] +pub type Byte3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { - #[doc = "Bits 8:15 - Data Byte 3"] - #[inline(always)] - pub fn byte3(&self) -> BYTE3_R { - BYTE3_R::new(((self.bits >> 8) & 0xff) as u8) - } #[doc = "Bits 0:7 - Data Byte 4"] #[inline(always)] - pub fn byte4(&self) -> BYTE4_R { - BYTE4_R::new((self.bits & 0xff) as u8) + pub fn byte4(&self) -> Byte4R { + Byte4R::new((self.bits & 0xff) as u8) + } + #[doc = "Bits 8:15 - Data Byte 3"] + #[inline(always)] + pub fn byte3(&self) -> Byte3R { + Byte3R::new(((self.bits >> 8) & 0xff) as u8) } } impl W { - #[doc = "Bits 8:15 - Data Byte 3"] - #[inline(always)] - pub fn byte3(&mut self) -> BYTE3_W { - BYTE3_W { w: self } - } #[doc = "Bits 0:7 - Data Byte 4"] #[inline(always)] - pub fn byte4(&mut self) -> BYTE4_W { - BYTE4_W { w: self } + #[must_use] + pub fn byte4(&mut self) -> Byte4W { + Byte4W::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 8:15 - Data Byte 3"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn byte3(&mut self) -> Byte3W { + Byte3W::new(self, 8) } } -#[doc = "CAN Frame Data Word 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data1_cmb5](index.html) module"] -pub struct DATA1_CMB5_SPEC; -impl crate::RegisterSpec for DATA1_CMB5_SPEC { +#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data1_cmb5::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data1_cmb5::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Data1Cmb5Spec; +impl crate::RegisterSpec for Data1Cmb5Spec { type Ux = u32; } -#[doc = "`read()` method returns [data1_cmb5::R](R) reader structure"] -impl crate::Readable for DATA1_CMB5_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [data1_cmb5::W](W) writer structure"] -impl crate::Writable for DATA1_CMB5_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`data1_cmb5::R`](R) reader structure"] +impl crate::Readable for Data1Cmb5Spec {} +#[doc = "`write(|w| ..)` method takes [`data1_cmb5::W`](W) writer structure"] +impl crate::Writable for Data1Cmb5Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA1_CMB5 to value 0"] -impl crate::Resettable for DATA1_CMB5_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Data1Cmb5Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/data1_cmb6.rs b/va416xx/src/can0/data1_cmb6.rs index 18fa007..860282a 100644 --- a/va416xx/src/can0/data1_cmb6.rs +++ b/va416xx/src/can0/data1_cmb6.rs @@ -1,140 +1,55 @@ #[doc = "Register `DATA1_CMB6` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DATA1_CMB6` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `BYTE3` reader - Data Byte 3"] -pub struct BYTE3_R(crate::FieldReader); -impl BYTE3_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE3_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE3_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `BYTE3` writer - Data Byte 3"] -pub struct BYTE3_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE3_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0xff << 8)) | ((value as u32 & 0xff) << 8); - self.w - } -} +pub type W = crate::W; #[doc = "Field `BYTE4` reader - Data Byte 4"] -pub struct BYTE4_R(crate::FieldReader); -impl BYTE4_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE4_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE4_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Byte4R = crate::FieldReader; #[doc = "Field `BYTE4` writer - Data Byte 4"] -pub struct BYTE4_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE4_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type Byte4W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +#[doc = "Field `BYTE3` reader - Data Byte 3"] +pub type Byte3R = crate::FieldReader; +#[doc = "Field `BYTE3` writer - Data Byte 3"] +pub type Byte3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { - #[doc = "Bits 8:15 - Data Byte 3"] - #[inline(always)] - pub fn byte3(&self) -> BYTE3_R { - BYTE3_R::new(((self.bits >> 8) & 0xff) as u8) - } #[doc = "Bits 0:7 - Data Byte 4"] #[inline(always)] - pub fn byte4(&self) -> BYTE4_R { - BYTE4_R::new((self.bits & 0xff) as u8) + pub fn byte4(&self) -> Byte4R { + Byte4R::new((self.bits & 0xff) as u8) + } + #[doc = "Bits 8:15 - Data Byte 3"] + #[inline(always)] + pub fn byte3(&self) -> Byte3R { + Byte3R::new(((self.bits >> 8) & 0xff) as u8) } } impl W { - #[doc = "Bits 8:15 - Data Byte 3"] - #[inline(always)] - pub fn byte3(&mut self) -> BYTE3_W { - BYTE3_W { w: self } - } #[doc = "Bits 0:7 - Data Byte 4"] #[inline(always)] - pub fn byte4(&mut self) -> BYTE4_W { - BYTE4_W { w: self } + #[must_use] + pub fn byte4(&mut self) -> Byte4W { + Byte4W::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 8:15 - Data Byte 3"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn byte3(&mut self) -> Byte3W { + Byte3W::new(self, 8) } } -#[doc = "CAN Frame Data Word 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data1_cmb6](index.html) module"] -pub struct DATA1_CMB6_SPEC; -impl crate::RegisterSpec for DATA1_CMB6_SPEC { +#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data1_cmb6::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data1_cmb6::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Data1Cmb6Spec; +impl crate::RegisterSpec for Data1Cmb6Spec { type Ux = u32; } -#[doc = "`read()` method returns [data1_cmb6::R](R) reader structure"] -impl crate::Readable for DATA1_CMB6_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [data1_cmb6::W](W) writer structure"] -impl crate::Writable for DATA1_CMB6_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`data1_cmb6::R`](R) reader structure"] +impl crate::Readable for Data1Cmb6Spec {} +#[doc = "`write(|w| ..)` method takes [`data1_cmb6::W`](W) writer structure"] +impl crate::Writable for Data1Cmb6Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA1_CMB6 to value 0"] -impl crate::Resettable for DATA1_CMB6_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Data1Cmb6Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/data1_cmb7.rs b/va416xx/src/can0/data1_cmb7.rs index 827f38f..e45c47c 100644 --- a/va416xx/src/can0/data1_cmb7.rs +++ b/va416xx/src/can0/data1_cmb7.rs @@ -1,140 +1,55 @@ #[doc = "Register `DATA1_CMB7` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DATA1_CMB7` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `BYTE3` reader - Data Byte 3"] -pub struct BYTE3_R(crate::FieldReader); -impl BYTE3_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE3_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE3_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `BYTE3` writer - Data Byte 3"] -pub struct BYTE3_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE3_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0xff << 8)) | ((value as u32 & 0xff) << 8); - self.w - } -} +pub type W = crate::W; #[doc = "Field `BYTE4` reader - Data Byte 4"] -pub struct BYTE4_R(crate::FieldReader); -impl BYTE4_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE4_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE4_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Byte4R = crate::FieldReader; #[doc = "Field `BYTE4` writer - Data Byte 4"] -pub struct BYTE4_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE4_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type Byte4W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +#[doc = "Field `BYTE3` reader - Data Byte 3"] +pub type Byte3R = crate::FieldReader; +#[doc = "Field `BYTE3` writer - Data Byte 3"] +pub type Byte3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { - #[doc = "Bits 8:15 - Data Byte 3"] - #[inline(always)] - pub fn byte3(&self) -> BYTE3_R { - BYTE3_R::new(((self.bits >> 8) & 0xff) as u8) - } #[doc = "Bits 0:7 - Data Byte 4"] #[inline(always)] - pub fn byte4(&self) -> BYTE4_R { - BYTE4_R::new((self.bits & 0xff) as u8) + pub fn byte4(&self) -> Byte4R { + Byte4R::new((self.bits & 0xff) as u8) + } + #[doc = "Bits 8:15 - Data Byte 3"] + #[inline(always)] + pub fn byte3(&self) -> Byte3R { + Byte3R::new(((self.bits >> 8) & 0xff) as u8) } } impl W { - #[doc = "Bits 8:15 - Data Byte 3"] - #[inline(always)] - pub fn byte3(&mut self) -> BYTE3_W { - BYTE3_W { w: self } - } #[doc = "Bits 0:7 - Data Byte 4"] #[inline(always)] - pub fn byte4(&mut self) -> BYTE4_W { - BYTE4_W { w: self } + #[must_use] + pub fn byte4(&mut self) -> Byte4W { + Byte4W::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 8:15 - Data Byte 3"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn byte3(&mut self) -> Byte3W { + Byte3W::new(self, 8) } } -#[doc = "CAN Frame Data Word 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data1_cmb7](index.html) module"] -pub struct DATA1_CMB7_SPEC; -impl crate::RegisterSpec for DATA1_CMB7_SPEC { +#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data1_cmb7::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data1_cmb7::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Data1Cmb7Spec; +impl crate::RegisterSpec for Data1Cmb7Spec { type Ux = u32; } -#[doc = "`read()` method returns [data1_cmb7::R](R) reader structure"] -impl crate::Readable for DATA1_CMB7_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [data1_cmb7::W](W) writer structure"] -impl crate::Writable for DATA1_CMB7_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`data1_cmb7::R`](R) reader structure"] +impl crate::Readable for Data1Cmb7Spec {} +#[doc = "`write(|w| ..)` method takes [`data1_cmb7::W`](W) writer structure"] +impl crate::Writable for Data1Cmb7Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA1_CMB7 to value 0"] -impl crate::Resettable for DATA1_CMB7_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Data1Cmb7Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/data1_cmb8.rs b/va416xx/src/can0/data1_cmb8.rs index 105989f..d3dc3cf 100644 --- a/va416xx/src/can0/data1_cmb8.rs +++ b/va416xx/src/can0/data1_cmb8.rs @@ -1,140 +1,55 @@ #[doc = "Register `DATA1_CMB8` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DATA1_CMB8` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `BYTE3` reader - Data Byte 3"] -pub struct BYTE3_R(crate::FieldReader); -impl BYTE3_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE3_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE3_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `BYTE3` writer - Data Byte 3"] -pub struct BYTE3_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE3_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0xff << 8)) | ((value as u32 & 0xff) << 8); - self.w - } -} +pub type W = crate::W; #[doc = "Field `BYTE4` reader - Data Byte 4"] -pub struct BYTE4_R(crate::FieldReader); -impl BYTE4_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE4_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE4_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Byte4R = crate::FieldReader; #[doc = "Field `BYTE4` writer - Data Byte 4"] -pub struct BYTE4_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE4_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type Byte4W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +#[doc = "Field `BYTE3` reader - Data Byte 3"] +pub type Byte3R = crate::FieldReader; +#[doc = "Field `BYTE3` writer - Data Byte 3"] +pub type Byte3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { - #[doc = "Bits 8:15 - Data Byte 3"] - #[inline(always)] - pub fn byte3(&self) -> BYTE3_R { - BYTE3_R::new(((self.bits >> 8) & 0xff) as u8) - } #[doc = "Bits 0:7 - Data Byte 4"] #[inline(always)] - pub fn byte4(&self) -> BYTE4_R { - BYTE4_R::new((self.bits & 0xff) as u8) + pub fn byte4(&self) -> Byte4R { + Byte4R::new((self.bits & 0xff) as u8) + } + #[doc = "Bits 8:15 - Data Byte 3"] + #[inline(always)] + pub fn byte3(&self) -> Byte3R { + Byte3R::new(((self.bits >> 8) & 0xff) as u8) } } impl W { - #[doc = "Bits 8:15 - Data Byte 3"] - #[inline(always)] - pub fn byte3(&mut self) -> BYTE3_W { - BYTE3_W { w: self } - } #[doc = "Bits 0:7 - Data Byte 4"] #[inline(always)] - pub fn byte4(&mut self) -> BYTE4_W { - BYTE4_W { w: self } + #[must_use] + pub fn byte4(&mut self) -> Byte4W { + Byte4W::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 8:15 - Data Byte 3"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn byte3(&mut self) -> Byte3W { + Byte3W::new(self, 8) } } -#[doc = "CAN Frame Data Word 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data1_cmb8](index.html) module"] -pub struct DATA1_CMB8_SPEC; -impl crate::RegisterSpec for DATA1_CMB8_SPEC { +#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data1_cmb8::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data1_cmb8::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Data1Cmb8Spec; +impl crate::RegisterSpec for Data1Cmb8Spec { type Ux = u32; } -#[doc = "`read()` method returns [data1_cmb8::R](R) reader structure"] -impl crate::Readable for DATA1_CMB8_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [data1_cmb8::W](W) writer structure"] -impl crate::Writable for DATA1_CMB8_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`data1_cmb8::R`](R) reader structure"] +impl crate::Readable for Data1Cmb8Spec {} +#[doc = "`write(|w| ..)` method takes [`data1_cmb8::W`](W) writer structure"] +impl crate::Writable for Data1Cmb8Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA1_CMB8 to value 0"] -impl crate::Resettable for DATA1_CMB8_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Data1Cmb8Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/data1_cmb9.rs b/va416xx/src/can0/data1_cmb9.rs index 537630b..ae5ea13 100644 --- a/va416xx/src/can0/data1_cmb9.rs +++ b/va416xx/src/can0/data1_cmb9.rs @@ -1,140 +1,55 @@ #[doc = "Register `DATA1_CMB9` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DATA1_CMB9` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `BYTE3` reader - Data Byte 3"] -pub struct BYTE3_R(crate::FieldReader); -impl BYTE3_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE3_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE3_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `BYTE3` writer - Data Byte 3"] -pub struct BYTE3_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE3_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0xff << 8)) | ((value as u32 & 0xff) << 8); - self.w - } -} +pub type W = crate::W; #[doc = "Field `BYTE4` reader - Data Byte 4"] -pub struct BYTE4_R(crate::FieldReader); -impl BYTE4_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE4_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE4_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Byte4R = crate::FieldReader; #[doc = "Field `BYTE4` writer - Data Byte 4"] -pub struct BYTE4_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE4_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type Byte4W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +#[doc = "Field `BYTE3` reader - Data Byte 3"] +pub type Byte3R = crate::FieldReader; +#[doc = "Field `BYTE3` writer - Data Byte 3"] +pub type Byte3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { - #[doc = "Bits 8:15 - Data Byte 3"] - #[inline(always)] - pub fn byte3(&self) -> BYTE3_R { - BYTE3_R::new(((self.bits >> 8) & 0xff) as u8) - } #[doc = "Bits 0:7 - Data Byte 4"] #[inline(always)] - pub fn byte4(&self) -> BYTE4_R { - BYTE4_R::new((self.bits & 0xff) as u8) + pub fn byte4(&self) -> Byte4R { + Byte4R::new((self.bits & 0xff) as u8) + } + #[doc = "Bits 8:15 - Data Byte 3"] + #[inline(always)] + pub fn byte3(&self) -> Byte3R { + Byte3R::new(((self.bits >> 8) & 0xff) as u8) } } impl W { - #[doc = "Bits 8:15 - Data Byte 3"] - #[inline(always)] - pub fn byte3(&mut self) -> BYTE3_W { - BYTE3_W { w: self } - } #[doc = "Bits 0:7 - Data Byte 4"] #[inline(always)] - pub fn byte4(&mut self) -> BYTE4_W { - BYTE4_W { w: self } + #[must_use] + pub fn byte4(&mut self) -> Byte4W { + Byte4W::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 8:15 - Data Byte 3"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn byte3(&mut self) -> Byte3W { + Byte3W::new(self, 8) } } -#[doc = "CAN Frame Data Word 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data1_cmb9](index.html) module"] -pub struct DATA1_CMB9_SPEC; -impl crate::RegisterSpec for DATA1_CMB9_SPEC { +#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data1_cmb9::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data1_cmb9::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Data1Cmb9Spec; +impl crate::RegisterSpec for Data1Cmb9Spec { type Ux = u32; } -#[doc = "`read()` method returns [data1_cmb9::R](R) reader structure"] -impl crate::Readable for DATA1_CMB9_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [data1_cmb9::W](W) writer structure"] -impl crate::Writable for DATA1_CMB9_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`data1_cmb9::R`](R) reader structure"] +impl crate::Readable for Data1Cmb9Spec {} +#[doc = "`write(|w| ..)` method takes [`data1_cmb9::W`](W) writer structure"] +impl crate::Writable for Data1Cmb9Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA1_CMB9 to value 0"] -impl crate::Resettable for DATA1_CMB9_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Data1Cmb9Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/data1_hcmb.rs b/va416xx/src/can0/data1_hcmb.rs index ed2864e..f8dcded 100644 --- a/va416xx/src/can0/data1_hcmb.rs +++ b/va416xx/src/can0/data1_hcmb.rs @@ -1,140 +1,55 @@ #[doc = "Register `DATA1_HCMB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DATA1_HCMB` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `BYTE3` reader - Data Byte 3"] -pub struct BYTE3_R(crate::FieldReader); -impl BYTE3_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE3_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE3_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `BYTE3` writer - Data Byte 3"] -pub struct BYTE3_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE3_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0xff << 8)) | ((value as u32 & 0xff) << 8); - self.w - } -} +pub type W = crate::W; #[doc = "Field `BYTE4` reader - Data Byte 4"] -pub struct BYTE4_R(crate::FieldReader); -impl BYTE4_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE4_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE4_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Byte4R = crate::FieldReader; #[doc = "Field `BYTE4` writer - Data Byte 4"] -pub struct BYTE4_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE4_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type Byte4W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +#[doc = "Field `BYTE3` reader - Data Byte 3"] +pub type Byte3R = crate::FieldReader; +#[doc = "Field `BYTE3` writer - Data Byte 3"] +pub type Byte3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { - #[doc = "Bits 8:15 - Data Byte 3"] - #[inline(always)] - pub fn byte3(&self) -> BYTE3_R { - BYTE3_R::new(((self.bits >> 8) & 0xff) as u8) - } #[doc = "Bits 0:7 - Data Byte 4"] #[inline(always)] - pub fn byte4(&self) -> BYTE4_R { - BYTE4_R::new((self.bits & 0xff) as u8) + pub fn byte4(&self) -> Byte4R { + Byte4R::new((self.bits & 0xff) as u8) + } + #[doc = "Bits 8:15 - Data Byte 3"] + #[inline(always)] + pub fn byte3(&self) -> Byte3R { + Byte3R::new(((self.bits >> 8) & 0xff) as u8) } } impl W { - #[doc = "Bits 8:15 - Data Byte 3"] - #[inline(always)] - pub fn byte3(&mut self) -> BYTE3_W { - BYTE3_W { w: self } - } #[doc = "Bits 0:7 - Data Byte 4"] #[inline(always)] - pub fn byte4(&mut self) -> BYTE4_W { - BYTE4_W { w: self } + #[must_use] + pub fn byte4(&mut self) -> Byte4W { + Byte4W::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 8:15 - Data Byte 3"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn byte3(&mut self) -> Byte3W { + Byte3W::new(self, 8) } } -#[doc = "CAN Frame Data Word 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data1_hcmb](index.html) module"] -pub struct DATA1_HCMB_SPEC; -impl crate::RegisterSpec for DATA1_HCMB_SPEC { +#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data1_hcmb::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data1_hcmb::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Data1HcmbSpec; +impl crate::RegisterSpec for Data1HcmbSpec { type Ux = u32; } -#[doc = "`read()` method returns [data1_hcmb::R](R) reader structure"] -impl crate::Readable for DATA1_HCMB_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [data1_hcmb::W](W) writer structure"] -impl crate::Writable for DATA1_HCMB_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`data1_hcmb::R`](R) reader structure"] +impl crate::Readable for Data1HcmbSpec {} +#[doc = "`write(|w| ..)` method takes [`data1_hcmb::W`](W) writer structure"] +impl crate::Writable for Data1HcmbSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA1_HCMB to value 0"] -impl crate::Resettable for DATA1_HCMB_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Data1HcmbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/data2_cmb0.rs b/va416xx/src/can0/data2_cmb0.rs index 8a12713..80d924d 100644 --- a/va416xx/src/can0/data2_cmb0.rs +++ b/va416xx/src/can0/data2_cmb0.rs @@ -1,140 +1,55 @@ #[doc = "Register `DATA2_CMB0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DATA2_CMB0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `BYTE5` reader - Data Byte 5"] -pub struct BYTE5_R(crate::FieldReader); -impl BYTE5_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE5_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE5_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `BYTE5` writer - Data Byte 5"] -pub struct BYTE5_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE5_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0xff << 8)) | ((value as u32 & 0xff) << 8); - self.w - } -} +pub type W = crate::W; #[doc = "Field `BYTE6` reader - Data Byte 6"] -pub struct BYTE6_R(crate::FieldReader); -impl BYTE6_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE6_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE6_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Byte6R = crate::FieldReader; #[doc = "Field `BYTE6` writer - Data Byte 6"] -pub struct BYTE6_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE6_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type Byte6W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +#[doc = "Field `BYTE5` reader - Data Byte 5"] +pub type Byte5R = crate::FieldReader; +#[doc = "Field `BYTE5` writer - Data Byte 5"] +pub type Byte5W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { - #[doc = "Bits 8:15 - Data Byte 5"] - #[inline(always)] - pub fn byte5(&self) -> BYTE5_R { - BYTE5_R::new(((self.bits >> 8) & 0xff) as u8) - } #[doc = "Bits 0:7 - Data Byte 6"] #[inline(always)] - pub fn byte6(&self) -> BYTE6_R { - BYTE6_R::new((self.bits & 0xff) as u8) + pub fn byte6(&self) -> Byte6R { + Byte6R::new((self.bits & 0xff) as u8) + } + #[doc = "Bits 8:15 - Data Byte 5"] + #[inline(always)] + pub fn byte5(&self) -> Byte5R { + Byte5R::new(((self.bits >> 8) & 0xff) as u8) } } impl W { - #[doc = "Bits 8:15 - Data Byte 5"] - #[inline(always)] - pub fn byte5(&mut self) -> BYTE5_W { - BYTE5_W { w: self } - } #[doc = "Bits 0:7 - Data Byte 6"] #[inline(always)] - pub fn byte6(&mut self) -> BYTE6_W { - BYTE6_W { w: self } + #[must_use] + pub fn byte6(&mut self) -> Byte6W { + Byte6W::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 8:15 - Data Byte 5"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn byte5(&mut self) -> Byte5W { + Byte5W::new(self, 8) } } -#[doc = "CAN Frame Data Word 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data2_cmb0](index.html) module"] -pub struct DATA2_CMB0_SPEC; -impl crate::RegisterSpec for DATA2_CMB0_SPEC { +#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data2_cmb0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data2_cmb0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Data2Cmb0Spec; +impl crate::RegisterSpec for Data2Cmb0Spec { type Ux = u32; } -#[doc = "`read()` method returns [data2_cmb0::R](R) reader structure"] -impl crate::Readable for DATA2_CMB0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [data2_cmb0::W](W) writer structure"] -impl crate::Writable for DATA2_CMB0_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`data2_cmb0::R`](R) reader structure"] +impl crate::Readable for Data2Cmb0Spec {} +#[doc = "`write(|w| ..)` method takes [`data2_cmb0::W`](W) writer structure"] +impl crate::Writable for Data2Cmb0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA2_CMB0 to value 0"] -impl crate::Resettable for DATA2_CMB0_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Data2Cmb0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/data2_cmb1.rs b/va416xx/src/can0/data2_cmb1.rs index f2337d9..404ca8c 100644 --- a/va416xx/src/can0/data2_cmb1.rs +++ b/va416xx/src/can0/data2_cmb1.rs @@ -1,140 +1,55 @@ #[doc = "Register `DATA2_CMB1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DATA2_CMB1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `BYTE5` reader - Data Byte 5"] -pub struct BYTE5_R(crate::FieldReader); -impl BYTE5_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE5_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE5_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `BYTE5` writer - Data Byte 5"] -pub struct BYTE5_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE5_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0xff << 8)) | ((value as u32 & 0xff) << 8); - self.w - } -} +pub type W = crate::W; #[doc = "Field `BYTE6` reader - Data Byte 6"] -pub struct BYTE6_R(crate::FieldReader); -impl BYTE6_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE6_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE6_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Byte6R = crate::FieldReader; #[doc = "Field `BYTE6` writer - Data Byte 6"] -pub struct BYTE6_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE6_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type Byte6W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +#[doc = "Field `BYTE5` reader - Data Byte 5"] +pub type Byte5R = crate::FieldReader; +#[doc = "Field `BYTE5` writer - Data Byte 5"] +pub type Byte5W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { - #[doc = "Bits 8:15 - Data Byte 5"] - #[inline(always)] - pub fn byte5(&self) -> BYTE5_R { - BYTE5_R::new(((self.bits >> 8) & 0xff) as u8) - } #[doc = "Bits 0:7 - Data Byte 6"] #[inline(always)] - pub fn byte6(&self) -> BYTE6_R { - BYTE6_R::new((self.bits & 0xff) as u8) + pub fn byte6(&self) -> Byte6R { + Byte6R::new((self.bits & 0xff) as u8) + } + #[doc = "Bits 8:15 - Data Byte 5"] + #[inline(always)] + pub fn byte5(&self) -> Byte5R { + Byte5R::new(((self.bits >> 8) & 0xff) as u8) } } impl W { - #[doc = "Bits 8:15 - Data Byte 5"] - #[inline(always)] - pub fn byte5(&mut self) -> BYTE5_W { - BYTE5_W { w: self } - } #[doc = "Bits 0:7 - Data Byte 6"] #[inline(always)] - pub fn byte6(&mut self) -> BYTE6_W { - BYTE6_W { w: self } + #[must_use] + pub fn byte6(&mut self) -> Byte6W { + Byte6W::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 8:15 - Data Byte 5"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn byte5(&mut self) -> Byte5W { + Byte5W::new(self, 8) } } -#[doc = "CAN Frame Data Word 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data2_cmb1](index.html) module"] -pub struct DATA2_CMB1_SPEC; -impl crate::RegisterSpec for DATA2_CMB1_SPEC { +#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data2_cmb1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data2_cmb1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Data2Cmb1Spec; +impl crate::RegisterSpec for Data2Cmb1Spec { type Ux = u32; } -#[doc = "`read()` method returns [data2_cmb1::R](R) reader structure"] -impl crate::Readable for DATA2_CMB1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [data2_cmb1::W](W) writer structure"] -impl crate::Writable for DATA2_CMB1_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`data2_cmb1::R`](R) reader structure"] +impl crate::Readable for Data2Cmb1Spec {} +#[doc = "`write(|w| ..)` method takes [`data2_cmb1::W`](W) writer structure"] +impl crate::Writable for Data2Cmb1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA2_CMB1 to value 0"] -impl crate::Resettable for DATA2_CMB1_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Data2Cmb1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/data2_cmb10.rs b/va416xx/src/can0/data2_cmb10.rs index 5f39cdf..2d96d4b 100644 --- a/va416xx/src/can0/data2_cmb10.rs +++ b/va416xx/src/can0/data2_cmb10.rs @@ -1,140 +1,55 @@ #[doc = "Register `DATA2_CMB10` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DATA2_CMB10` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `BYTE5` reader - Data Byte 5"] -pub struct BYTE5_R(crate::FieldReader); -impl BYTE5_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE5_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE5_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `BYTE5` writer - Data Byte 5"] -pub struct BYTE5_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE5_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0xff << 8)) | ((value as u32 & 0xff) << 8); - self.w - } -} +pub type W = crate::W; #[doc = "Field `BYTE6` reader - Data Byte 6"] -pub struct BYTE6_R(crate::FieldReader); -impl BYTE6_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE6_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE6_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Byte6R = crate::FieldReader; #[doc = "Field `BYTE6` writer - Data Byte 6"] -pub struct BYTE6_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE6_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type Byte6W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +#[doc = "Field `BYTE5` reader - Data Byte 5"] +pub type Byte5R = crate::FieldReader; +#[doc = "Field `BYTE5` writer - Data Byte 5"] +pub type Byte5W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { - #[doc = "Bits 8:15 - Data Byte 5"] - #[inline(always)] - pub fn byte5(&self) -> BYTE5_R { - BYTE5_R::new(((self.bits >> 8) & 0xff) as u8) - } #[doc = "Bits 0:7 - Data Byte 6"] #[inline(always)] - pub fn byte6(&self) -> BYTE6_R { - BYTE6_R::new((self.bits & 0xff) as u8) + pub fn byte6(&self) -> Byte6R { + Byte6R::new((self.bits & 0xff) as u8) + } + #[doc = "Bits 8:15 - Data Byte 5"] + #[inline(always)] + pub fn byte5(&self) -> Byte5R { + Byte5R::new(((self.bits >> 8) & 0xff) as u8) } } impl W { - #[doc = "Bits 8:15 - Data Byte 5"] - #[inline(always)] - pub fn byte5(&mut self) -> BYTE5_W { - BYTE5_W { w: self } - } #[doc = "Bits 0:7 - Data Byte 6"] #[inline(always)] - pub fn byte6(&mut self) -> BYTE6_W { - BYTE6_W { w: self } + #[must_use] + pub fn byte6(&mut self) -> Byte6W { + Byte6W::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 8:15 - Data Byte 5"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn byte5(&mut self) -> Byte5W { + Byte5W::new(self, 8) } } -#[doc = "CAN Frame Data Word 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data2_cmb10](index.html) module"] -pub struct DATA2_CMB10_SPEC; -impl crate::RegisterSpec for DATA2_CMB10_SPEC { +#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data2_cmb10::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data2_cmb10::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Data2Cmb10Spec; +impl crate::RegisterSpec for Data2Cmb10Spec { type Ux = u32; } -#[doc = "`read()` method returns [data2_cmb10::R](R) reader structure"] -impl crate::Readable for DATA2_CMB10_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [data2_cmb10::W](W) writer structure"] -impl crate::Writable for DATA2_CMB10_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`data2_cmb10::R`](R) reader structure"] +impl crate::Readable for Data2Cmb10Spec {} +#[doc = "`write(|w| ..)` method takes [`data2_cmb10::W`](W) writer structure"] +impl crate::Writable for Data2Cmb10Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA2_CMB10 to value 0"] -impl crate::Resettable for DATA2_CMB10_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Data2Cmb10Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/data2_cmb11.rs b/va416xx/src/can0/data2_cmb11.rs index b6a7665..338d3e5 100644 --- a/va416xx/src/can0/data2_cmb11.rs +++ b/va416xx/src/can0/data2_cmb11.rs @@ -1,140 +1,55 @@ #[doc = "Register `DATA2_CMB11` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DATA2_CMB11` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `BYTE5` reader - Data Byte 5"] -pub struct BYTE5_R(crate::FieldReader); -impl BYTE5_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE5_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE5_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `BYTE5` writer - Data Byte 5"] -pub struct BYTE5_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE5_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0xff << 8)) | ((value as u32 & 0xff) << 8); - self.w - } -} +pub type W = crate::W; #[doc = "Field `BYTE6` reader - Data Byte 6"] -pub struct BYTE6_R(crate::FieldReader); -impl BYTE6_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE6_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE6_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Byte6R = crate::FieldReader; #[doc = "Field `BYTE6` writer - Data Byte 6"] -pub struct BYTE6_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE6_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type Byte6W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +#[doc = "Field `BYTE5` reader - Data Byte 5"] +pub type Byte5R = crate::FieldReader; +#[doc = "Field `BYTE5` writer - Data Byte 5"] +pub type Byte5W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { - #[doc = "Bits 8:15 - Data Byte 5"] - #[inline(always)] - pub fn byte5(&self) -> BYTE5_R { - BYTE5_R::new(((self.bits >> 8) & 0xff) as u8) - } #[doc = "Bits 0:7 - Data Byte 6"] #[inline(always)] - pub fn byte6(&self) -> BYTE6_R { - BYTE6_R::new((self.bits & 0xff) as u8) + pub fn byte6(&self) -> Byte6R { + Byte6R::new((self.bits & 0xff) as u8) + } + #[doc = "Bits 8:15 - Data Byte 5"] + #[inline(always)] + pub fn byte5(&self) -> Byte5R { + Byte5R::new(((self.bits >> 8) & 0xff) as u8) } } impl W { - #[doc = "Bits 8:15 - Data Byte 5"] - #[inline(always)] - pub fn byte5(&mut self) -> BYTE5_W { - BYTE5_W { w: self } - } #[doc = "Bits 0:7 - Data Byte 6"] #[inline(always)] - pub fn byte6(&mut self) -> BYTE6_W { - BYTE6_W { w: self } + #[must_use] + pub fn byte6(&mut self) -> Byte6W { + Byte6W::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 8:15 - Data Byte 5"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn byte5(&mut self) -> Byte5W { + Byte5W::new(self, 8) } } -#[doc = "CAN Frame Data Word 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data2_cmb11](index.html) module"] -pub struct DATA2_CMB11_SPEC; -impl crate::RegisterSpec for DATA2_CMB11_SPEC { +#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data2_cmb11::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data2_cmb11::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Data2Cmb11Spec; +impl crate::RegisterSpec for Data2Cmb11Spec { type Ux = u32; } -#[doc = "`read()` method returns [data2_cmb11::R](R) reader structure"] -impl crate::Readable for DATA2_CMB11_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [data2_cmb11::W](W) writer structure"] -impl crate::Writable for DATA2_CMB11_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`data2_cmb11::R`](R) reader structure"] +impl crate::Readable for Data2Cmb11Spec {} +#[doc = "`write(|w| ..)` method takes [`data2_cmb11::W`](W) writer structure"] +impl crate::Writable for Data2Cmb11Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA2_CMB11 to value 0"] -impl crate::Resettable for DATA2_CMB11_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Data2Cmb11Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/data2_cmb12.rs b/va416xx/src/can0/data2_cmb12.rs index e6b811c..6fe89e8 100644 --- a/va416xx/src/can0/data2_cmb12.rs +++ b/va416xx/src/can0/data2_cmb12.rs @@ -1,140 +1,55 @@ #[doc = "Register `DATA2_CMB12` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DATA2_CMB12` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `BYTE5` reader - Data Byte 5"] -pub struct BYTE5_R(crate::FieldReader); -impl BYTE5_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE5_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE5_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `BYTE5` writer - Data Byte 5"] -pub struct BYTE5_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE5_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0xff << 8)) | ((value as u32 & 0xff) << 8); - self.w - } -} +pub type W = crate::W; #[doc = "Field `BYTE6` reader - Data Byte 6"] -pub struct BYTE6_R(crate::FieldReader); -impl BYTE6_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE6_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE6_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Byte6R = crate::FieldReader; #[doc = "Field `BYTE6` writer - Data Byte 6"] -pub struct BYTE6_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE6_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type Byte6W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +#[doc = "Field `BYTE5` reader - Data Byte 5"] +pub type Byte5R = crate::FieldReader; +#[doc = "Field `BYTE5` writer - Data Byte 5"] +pub type Byte5W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { - #[doc = "Bits 8:15 - Data Byte 5"] - #[inline(always)] - pub fn byte5(&self) -> BYTE5_R { - BYTE5_R::new(((self.bits >> 8) & 0xff) as u8) - } #[doc = "Bits 0:7 - Data Byte 6"] #[inline(always)] - pub fn byte6(&self) -> BYTE6_R { - BYTE6_R::new((self.bits & 0xff) as u8) + pub fn byte6(&self) -> Byte6R { + Byte6R::new((self.bits & 0xff) as u8) + } + #[doc = "Bits 8:15 - Data Byte 5"] + #[inline(always)] + pub fn byte5(&self) -> Byte5R { + Byte5R::new(((self.bits >> 8) & 0xff) as u8) } } impl W { - #[doc = "Bits 8:15 - Data Byte 5"] - #[inline(always)] - pub fn byte5(&mut self) -> BYTE5_W { - BYTE5_W { w: self } - } #[doc = "Bits 0:7 - Data Byte 6"] #[inline(always)] - pub fn byte6(&mut self) -> BYTE6_W { - BYTE6_W { w: self } + #[must_use] + pub fn byte6(&mut self) -> Byte6W { + Byte6W::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 8:15 - Data Byte 5"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn byte5(&mut self) -> Byte5W { + Byte5W::new(self, 8) } } -#[doc = "CAN Frame Data Word 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data2_cmb12](index.html) module"] -pub struct DATA2_CMB12_SPEC; -impl crate::RegisterSpec for DATA2_CMB12_SPEC { +#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data2_cmb12::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data2_cmb12::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Data2Cmb12Spec; +impl crate::RegisterSpec for Data2Cmb12Spec { type Ux = u32; } -#[doc = "`read()` method returns [data2_cmb12::R](R) reader structure"] -impl crate::Readable for DATA2_CMB12_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [data2_cmb12::W](W) writer structure"] -impl crate::Writable for DATA2_CMB12_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`data2_cmb12::R`](R) reader structure"] +impl crate::Readable for Data2Cmb12Spec {} +#[doc = "`write(|w| ..)` method takes [`data2_cmb12::W`](W) writer structure"] +impl crate::Writable for Data2Cmb12Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA2_CMB12 to value 0"] -impl crate::Resettable for DATA2_CMB12_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Data2Cmb12Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/data2_cmb13.rs b/va416xx/src/can0/data2_cmb13.rs index 1039ff1..2ee2bb7 100644 --- a/va416xx/src/can0/data2_cmb13.rs +++ b/va416xx/src/can0/data2_cmb13.rs @@ -1,140 +1,55 @@ #[doc = "Register `DATA2_CMB13` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DATA2_CMB13` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `BYTE5` reader - Data Byte 5"] -pub struct BYTE5_R(crate::FieldReader); -impl BYTE5_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE5_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE5_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `BYTE5` writer - Data Byte 5"] -pub struct BYTE5_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE5_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0xff << 8)) | ((value as u32 & 0xff) << 8); - self.w - } -} +pub type W = crate::W; #[doc = "Field `BYTE6` reader - Data Byte 6"] -pub struct BYTE6_R(crate::FieldReader); -impl BYTE6_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE6_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE6_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Byte6R = crate::FieldReader; #[doc = "Field `BYTE6` writer - Data Byte 6"] -pub struct BYTE6_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE6_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type Byte6W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +#[doc = "Field `BYTE5` reader - Data Byte 5"] +pub type Byte5R = crate::FieldReader; +#[doc = "Field `BYTE5` writer - Data Byte 5"] +pub type Byte5W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { - #[doc = "Bits 8:15 - Data Byte 5"] - #[inline(always)] - pub fn byte5(&self) -> BYTE5_R { - BYTE5_R::new(((self.bits >> 8) & 0xff) as u8) - } #[doc = "Bits 0:7 - Data Byte 6"] #[inline(always)] - pub fn byte6(&self) -> BYTE6_R { - BYTE6_R::new((self.bits & 0xff) as u8) + pub fn byte6(&self) -> Byte6R { + Byte6R::new((self.bits & 0xff) as u8) + } + #[doc = "Bits 8:15 - Data Byte 5"] + #[inline(always)] + pub fn byte5(&self) -> Byte5R { + Byte5R::new(((self.bits >> 8) & 0xff) as u8) } } impl W { - #[doc = "Bits 8:15 - Data Byte 5"] - #[inline(always)] - pub fn byte5(&mut self) -> BYTE5_W { - BYTE5_W { w: self } - } #[doc = "Bits 0:7 - Data Byte 6"] #[inline(always)] - pub fn byte6(&mut self) -> BYTE6_W { - BYTE6_W { w: self } + #[must_use] + pub fn byte6(&mut self) -> Byte6W { + Byte6W::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 8:15 - Data Byte 5"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn byte5(&mut self) -> Byte5W { + Byte5W::new(self, 8) } } -#[doc = "CAN Frame Data Word 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data2_cmb13](index.html) module"] -pub struct DATA2_CMB13_SPEC; -impl crate::RegisterSpec for DATA2_CMB13_SPEC { +#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data2_cmb13::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data2_cmb13::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Data2Cmb13Spec; +impl crate::RegisterSpec for Data2Cmb13Spec { type Ux = u32; } -#[doc = "`read()` method returns [data2_cmb13::R](R) reader structure"] -impl crate::Readable for DATA2_CMB13_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [data2_cmb13::W](W) writer structure"] -impl crate::Writable for DATA2_CMB13_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`data2_cmb13::R`](R) reader structure"] +impl crate::Readable for Data2Cmb13Spec {} +#[doc = "`write(|w| ..)` method takes [`data2_cmb13::W`](W) writer structure"] +impl crate::Writable for Data2Cmb13Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA2_CMB13 to value 0"] -impl crate::Resettable for DATA2_CMB13_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Data2Cmb13Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/data2_cmb14.rs b/va416xx/src/can0/data2_cmb14.rs index 3dc1c19..ff9ee97 100644 --- a/va416xx/src/can0/data2_cmb14.rs +++ b/va416xx/src/can0/data2_cmb14.rs @@ -1,140 +1,55 @@ #[doc = "Register `DATA2_CMB14` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DATA2_CMB14` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `BYTE5` reader - Data Byte 5"] -pub struct BYTE5_R(crate::FieldReader); -impl BYTE5_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE5_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE5_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `BYTE5` writer - Data Byte 5"] -pub struct BYTE5_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE5_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0xff << 8)) | ((value as u32 & 0xff) << 8); - self.w - } -} +pub type W = crate::W; #[doc = "Field `BYTE6` reader - Data Byte 6"] -pub struct BYTE6_R(crate::FieldReader); -impl BYTE6_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE6_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE6_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Byte6R = crate::FieldReader; #[doc = "Field `BYTE6` writer - Data Byte 6"] -pub struct BYTE6_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE6_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type Byte6W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +#[doc = "Field `BYTE5` reader - Data Byte 5"] +pub type Byte5R = crate::FieldReader; +#[doc = "Field `BYTE5` writer - Data Byte 5"] +pub type Byte5W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { - #[doc = "Bits 8:15 - Data Byte 5"] - #[inline(always)] - pub fn byte5(&self) -> BYTE5_R { - BYTE5_R::new(((self.bits >> 8) & 0xff) as u8) - } #[doc = "Bits 0:7 - Data Byte 6"] #[inline(always)] - pub fn byte6(&self) -> BYTE6_R { - BYTE6_R::new((self.bits & 0xff) as u8) + pub fn byte6(&self) -> Byte6R { + Byte6R::new((self.bits & 0xff) as u8) + } + #[doc = "Bits 8:15 - Data Byte 5"] + #[inline(always)] + pub fn byte5(&self) -> Byte5R { + Byte5R::new(((self.bits >> 8) & 0xff) as u8) } } impl W { - #[doc = "Bits 8:15 - Data Byte 5"] - #[inline(always)] - pub fn byte5(&mut self) -> BYTE5_W { - BYTE5_W { w: self } - } #[doc = "Bits 0:7 - Data Byte 6"] #[inline(always)] - pub fn byte6(&mut self) -> BYTE6_W { - BYTE6_W { w: self } + #[must_use] + pub fn byte6(&mut self) -> Byte6W { + Byte6W::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 8:15 - Data Byte 5"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn byte5(&mut self) -> Byte5W { + Byte5W::new(self, 8) } } -#[doc = "CAN Frame Data Word 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data2_cmb14](index.html) module"] -pub struct DATA2_CMB14_SPEC; -impl crate::RegisterSpec for DATA2_CMB14_SPEC { +#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data2_cmb14::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data2_cmb14::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Data2Cmb14Spec; +impl crate::RegisterSpec for Data2Cmb14Spec { type Ux = u32; } -#[doc = "`read()` method returns [data2_cmb14::R](R) reader structure"] -impl crate::Readable for DATA2_CMB14_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [data2_cmb14::W](W) writer structure"] -impl crate::Writable for DATA2_CMB14_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`data2_cmb14::R`](R) reader structure"] +impl crate::Readable for Data2Cmb14Spec {} +#[doc = "`write(|w| ..)` method takes [`data2_cmb14::W`](W) writer structure"] +impl crate::Writable for Data2Cmb14Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA2_CMB14 to value 0"] -impl crate::Resettable for DATA2_CMB14_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Data2Cmb14Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/data2_cmb2.rs b/va416xx/src/can0/data2_cmb2.rs index 4f018eb..4cd31dd 100644 --- a/va416xx/src/can0/data2_cmb2.rs +++ b/va416xx/src/can0/data2_cmb2.rs @@ -1,140 +1,55 @@ #[doc = "Register `DATA2_CMB2` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DATA2_CMB2` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `BYTE5` reader - Data Byte 5"] -pub struct BYTE5_R(crate::FieldReader); -impl BYTE5_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE5_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE5_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `BYTE5` writer - Data Byte 5"] -pub struct BYTE5_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE5_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0xff << 8)) | ((value as u32 & 0xff) << 8); - self.w - } -} +pub type W = crate::W; #[doc = "Field `BYTE6` reader - Data Byte 6"] -pub struct BYTE6_R(crate::FieldReader); -impl BYTE6_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE6_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE6_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Byte6R = crate::FieldReader; #[doc = "Field `BYTE6` writer - Data Byte 6"] -pub struct BYTE6_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE6_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type Byte6W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +#[doc = "Field `BYTE5` reader - Data Byte 5"] +pub type Byte5R = crate::FieldReader; +#[doc = "Field `BYTE5` writer - Data Byte 5"] +pub type Byte5W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { - #[doc = "Bits 8:15 - Data Byte 5"] - #[inline(always)] - pub fn byte5(&self) -> BYTE5_R { - BYTE5_R::new(((self.bits >> 8) & 0xff) as u8) - } #[doc = "Bits 0:7 - Data Byte 6"] #[inline(always)] - pub fn byte6(&self) -> BYTE6_R { - BYTE6_R::new((self.bits & 0xff) as u8) + pub fn byte6(&self) -> Byte6R { + Byte6R::new((self.bits & 0xff) as u8) + } + #[doc = "Bits 8:15 - Data Byte 5"] + #[inline(always)] + pub fn byte5(&self) -> Byte5R { + Byte5R::new(((self.bits >> 8) & 0xff) as u8) } } impl W { - #[doc = "Bits 8:15 - Data Byte 5"] - #[inline(always)] - pub fn byte5(&mut self) -> BYTE5_W { - BYTE5_W { w: self } - } #[doc = "Bits 0:7 - Data Byte 6"] #[inline(always)] - pub fn byte6(&mut self) -> BYTE6_W { - BYTE6_W { w: self } + #[must_use] + pub fn byte6(&mut self) -> Byte6W { + Byte6W::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 8:15 - Data Byte 5"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn byte5(&mut self) -> Byte5W { + Byte5W::new(self, 8) } } -#[doc = "CAN Frame Data Word 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data2_cmb2](index.html) module"] -pub struct DATA2_CMB2_SPEC; -impl crate::RegisterSpec for DATA2_CMB2_SPEC { +#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data2_cmb2::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data2_cmb2::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Data2Cmb2Spec; +impl crate::RegisterSpec for Data2Cmb2Spec { type Ux = u32; } -#[doc = "`read()` method returns [data2_cmb2::R](R) reader structure"] -impl crate::Readable for DATA2_CMB2_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [data2_cmb2::W](W) writer structure"] -impl crate::Writable for DATA2_CMB2_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`data2_cmb2::R`](R) reader structure"] +impl crate::Readable for Data2Cmb2Spec {} +#[doc = "`write(|w| ..)` method takes [`data2_cmb2::W`](W) writer structure"] +impl crate::Writable for Data2Cmb2Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA2_CMB2 to value 0"] -impl crate::Resettable for DATA2_CMB2_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Data2Cmb2Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/data2_cmb3.rs b/va416xx/src/can0/data2_cmb3.rs index 9c79da6..2511577 100644 --- a/va416xx/src/can0/data2_cmb3.rs +++ b/va416xx/src/can0/data2_cmb3.rs @@ -1,140 +1,55 @@ #[doc = "Register `DATA2_CMB3` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DATA2_CMB3` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `BYTE5` reader - Data Byte 5"] -pub struct BYTE5_R(crate::FieldReader); -impl BYTE5_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE5_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE5_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `BYTE5` writer - Data Byte 5"] -pub struct BYTE5_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE5_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0xff << 8)) | ((value as u32 & 0xff) << 8); - self.w - } -} +pub type W = crate::W; #[doc = "Field `BYTE6` reader - Data Byte 6"] -pub struct BYTE6_R(crate::FieldReader); -impl BYTE6_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE6_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE6_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Byte6R = crate::FieldReader; #[doc = "Field `BYTE6` writer - Data Byte 6"] -pub struct BYTE6_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE6_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type Byte6W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +#[doc = "Field `BYTE5` reader - Data Byte 5"] +pub type Byte5R = crate::FieldReader; +#[doc = "Field `BYTE5` writer - Data Byte 5"] +pub type Byte5W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { - #[doc = "Bits 8:15 - Data Byte 5"] - #[inline(always)] - pub fn byte5(&self) -> BYTE5_R { - BYTE5_R::new(((self.bits >> 8) & 0xff) as u8) - } #[doc = "Bits 0:7 - Data Byte 6"] #[inline(always)] - pub fn byte6(&self) -> BYTE6_R { - BYTE6_R::new((self.bits & 0xff) as u8) + pub fn byte6(&self) -> Byte6R { + Byte6R::new((self.bits & 0xff) as u8) + } + #[doc = "Bits 8:15 - Data Byte 5"] + #[inline(always)] + pub fn byte5(&self) -> Byte5R { + Byte5R::new(((self.bits >> 8) & 0xff) as u8) } } impl W { - #[doc = "Bits 8:15 - Data Byte 5"] - #[inline(always)] - pub fn byte5(&mut self) -> BYTE5_W { - BYTE5_W { w: self } - } #[doc = "Bits 0:7 - Data Byte 6"] #[inline(always)] - pub fn byte6(&mut self) -> BYTE6_W { - BYTE6_W { w: self } + #[must_use] + pub fn byte6(&mut self) -> Byte6W { + Byte6W::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 8:15 - Data Byte 5"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn byte5(&mut self) -> Byte5W { + Byte5W::new(self, 8) } } -#[doc = "CAN Frame Data Word 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data2_cmb3](index.html) module"] -pub struct DATA2_CMB3_SPEC; -impl crate::RegisterSpec for DATA2_CMB3_SPEC { +#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data2_cmb3::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data2_cmb3::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Data2Cmb3Spec; +impl crate::RegisterSpec for Data2Cmb3Spec { type Ux = u32; } -#[doc = "`read()` method returns [data2_cmb3::R](R) reader structure"] -impl crate::Readable for DATA2_CMB3_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [data2_cmb3::W](W) writer structure"] -impl crate::Writable for DATA2_CMB3_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`data2_cmb3::R`](R) reader structure"] +impl crate::Readable for Data2Cmb3Spec {} +#[doc = "`write(|w| ..)` method takes [`data2_cmb3::W`](W) writer structure"] +impl crate::Writable for Data2Cmb3Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA2_CMB3 to value 0"] -impl crate::Resettable for DATA2_CMB3_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Data2Cmb3Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/data2_cmb4.rs b/va416xx/src/can0/data2_cmb4.rs index 07d76a4..9a2deef 100644 --- a/va416xx/src/can0/data2_cmb4.rs +++ b/va416xx/src/can0/data2_cmb4.rs @@ -1,140 +1,55 @@ #[doc = "Register `DATA2_CMB4` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DATA2_CMB4` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `BYTE5` reader - Data Byte 5"] -pub struct BYTE5_R(crate::FieldReader); -impl BYTE5_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE5_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE5_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `BYTE5` writer - Data Byte 5"] -pub struct BYTE5_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE5_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0xff << 8)) | ((value as u32 & 0xff) << 8); - self.w - } -} +pub type W = crate::W; #[doc = "Field `BYTE6` reader - Data Byte 6"] -pub struct BYTE6_R(crate::FieldReader); -impl BYTE6_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE6_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE6_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Byte6R = crate::FieldReader; #[doc = "Field `BYTE6` writer - Data Byte 6"] -pub struct BYTE6_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE6_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type Byte6W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +#[doc = "Field `BYTE5` reader - Data Byte 5"] +pub type Byte5R = crate::FieldReader; +#[doc = "Field `BYTE5` writer - Data Byte 5"] +pub type Byte5W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { - #[doc = "Bits 8:15 - Data Byte 5"] - #[inline(always)] - pub fn byte5(&self) -> BYTE5_R { - BYTE5_R::new(((self.bits >> 8) & 0xff) as u8) - } #[doc = "Bits 0:7 - Data Byte 6"] #[inline(always)] - pub fn byte6(&self) -> BYTE6_R { - BYTE6_R::new((self.bits & 0xff) as u8) + pub fn byte6(&self) -> Byte6R { + Byte6R::new((self.bits & 0xff) as u8) + } + #[doc = "Bits 8:15 - Data Byte 5"] + #[inline(always)] + pub fn byte5(&self) -> Byte5R { + Byte5R::new(((self.bits >> 8) & 0xff) as u8) } } impl W { - #[doc = "Bits 8:15 - Data Byte 5"] - #[inline(always)] - pub fn byte5(&mut self) -> BYTE5_W { - BYTE5_W { w: self } - } #[doc = "Bits 0:7 - Data Byte 6"] #[inline(always)] - pub fn byte6(&mut self) -> BYTE6_W { - BYTE6_W { w: self } + #[must_use] + pub fn byte6(&mut self) -> Byte6W { + Byte6W::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 8:15 - Data Byte 5"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn byte5(&mut self) -> Byte5W { + Byte5W::new(self, 8) } } -#[doc = "CAN Frame Data Word 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data2_cmb4](index.html) module"] -pub struct DATA2_CMB4_SPEC; -impl crate::RegisterSpec for DATA2_CMB4_SPEC { +#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data2_cmb4::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data2_cmb4::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Data2Cmb4Spec; +impl crate::RegisterSpec for Data2Cmb4Spec { type Ux = u32; } -#[doc = "`read()` method returns [data2_cmb4::R](R) reader structure"] -impl crate::Readable for DATA2_CMB4_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [data2_cmb4::W](W) writer structure"] -impl crate::Writable for DATA2_CMB4_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`data2_cmb4::R`](R) reader structure"] +impl crate::Readable for Data2Cmb4Spec {} +#[doc = "`write(|w| ..)` method takes [`data2_cmb4::W`](W) writer structure"] +impl crate::Writable for Data2Cmb4Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA2_CMB4 to value 0"] -impl crate::Resettable for DATA2_CMB4_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Data2Cmb4Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/data2_cmb5.rs b/va416xx/src/can0/data2_cmb5.rs index 0507ea7..1a94329 100644 --- a/va416xx/src/can0/data2_cmb5.rs +++ b/va416xx/src/can0/data2_cmb5.rs @@ -1,140 +1,55 @@ #[doc = "Register `DATA2_CMB5` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DATA2_CMB5` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `BYTE5` reader - Data Byte 5"] -pub struct BYTE5_R(crate::FieldReader); -impl BYTE5_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE5_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE5_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `BYTE5` writer - Data Byte 5"] -pub struct BYTE5_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE5_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0xff << 8)) | ((value as u32 & 0xff) << 8); - self.w - } -} +pub type W = crate::W; #[doc = "Field `BYTE6` reader - Data Byte 6"] -pub struct BYTE6_R(crate::FieldReader); -impl BYTE6_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE6_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE6_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Byte6R = crate::FieldReader; #[doc = "Field `BYTE6` writer - Data Byte 6"] -pub struct BYTE6_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE6_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type Byte6W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +#[doc = "Field `BYTE5` reader - Data Byte 5"] +pub type Byte5R = crate::FieldReader; +#[doc = "Field `BYTE5` writer - Data Byte 5"] +pub type Byte5W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { - #[doc = "Bits 8:15 - Data Byte 5"] - #[inline(always)] - pub fn byte5(&self) -> BYTE5_R { - BYTE5_R::new(((self.bits >> 8) & 0xff) as u8) - } #[doc = "Bits 0:7 - Data Byte 6"] #[inline(always)] - pub fn byte6(&self) -> BYTE6_R { - BYTE6_R::new((self.bits & 0xff) as u8) + pub fn byte6(&self) -> Byte6R { + Byte6R::new((self.bits & 0xff) as u8) + } + #[doc = "Bits 8:15 - Data Byte 5"] + #[inline(always)] + pub fn byte5(&self) -> Byte5R { + Byte5R::new(((self.bits >> 8) & 0xff) as u8) } } impl W { - #[doc = "Bits 8:15 - Data Byte 5"] - #[inline(always)] - pub fn byte5(&mut self) -> BYTE5_W { - BYTE5_W { w: self } - } #[doc = "Bits 0:7 - Data Byte 6"] #[inline(always)] - pub fn byte6(&mut self) -> BYTE6_W { - BYTE6_W { w: self } + #[must_use] + pub fn byte6(&mut self) -> Byte6W { + Byte6W::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 8:15 - Data Byte 5"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn byte5(&mut self) -> Byte5W { + Byte5W::new(self, 8) } } -#[doc = "CAN Frame Data Word 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data2_cmb5](index.html) module"] -pub struct DATA2_CMB5_SPEC; -impl crate::RegisterSpec for DATA2_CMB5_SPEC { +#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data2_cmb5::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data2_cmb5::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Data2Cmb5Spec; +impl crate::RegisterSpec for Data2Cmb5Spec { type Ux = u32; } -#[doc = "`read()` method returns [data2_cmb5::R](R) reader structure"] -impl crate::Readable for DATA2_CMB5_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [data2_cmb5::W](W) writer structure"] -impl crate::Writable for DATA2_CMB5_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`data2_cmb5::R`](R) reader structure"] +impl crate::Readable for Data2Cmb5Spec {} +#[doc = "`write(|w| ..)` method takes [`data2_cmb5::W`](W) writer structure"] +impl crate::Writable for Data2Cmb5Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA2_CMB5 to value 0"] -impl crate::Resettable for DATA2_CMB5_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Data2Cmb5Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/data2_cmb6.rs b/va416xx/src/can0/data2_cmb6.rs index a6185aa..ea2ed85 100644 --- a/va416xx/src/can0/data2_cmb6.rs +++ b/va416xx/src/can0/data2_cmb6.rs @@ -1,140 +1,55 @@ #[doc = "Register `DATA2_CMB6` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DATA2_CMB6` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `BYTE5` reader - Data Byte 5"] -pub struct BYTE5_R(crate::FieldReader); -impl BYTE5_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE5_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE5_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `BYTE5` writer - Data Byte 5"] -pub struct BYTE5_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE5_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0xff << 8)) | ((value as u32 & 0xff) << 8); - self.w - } -} +pub type W = crate::W; #[doc = "Field `BYTE6` reader - Data Byte 6"] -pub struct BYTE6_R(crate::FieldReader); -impl BYTE6_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE6_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE6_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Byte6R = crate::FieldReader; #[doc = "Field `BYTE6` writer - Data Byte 6"] -pub struct BYTE6_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE6_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type Byte6W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +#[doc = "Field `BYTE5` reader - Data Byte 5"] +pub type Byte5R = crate::FieldReader; +#[doc = "Field `BYTE5` writer - Data Byte 5"] +pub type Byte5W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { - #[doc = "Bits 8:15 - Data Byte 5"] - #[inline(always)] - pub fn byte5(&self) -> BYTE5_R { - BYTE5_R::new(((self.bits >> 8) & 0xff) as u8) - } #[doc = "Bits 0:7 - Data Byte 6"] #[inline(always)] - pub fn byte6(&self) -> BYTE6_R { - BYTE6_R::new((self.bits & 0xff) as u8) + pub fn byte6(&self) -> Byte6R { + Byte6R::new((self.bits & 0xff) as u8) + } + #[doc = "Bits 8:15 - Data Byte 5"] + #[inline(always)] + pub fn byte5(&self) -> Byte5R { + Byte5R::new(((self.bits >> 8) & 0xff) as u8) } } impl W { - #[doc = "Bits 8:15 - Data Byte 5"] - #[inline(always)] - pub fn byte5(&mut self) -> BYTE5_W { - BYTE5_W { w: self } - } #[doc = "Bits 0:7 - Data Byte 6"] #[inline(always)] - pub fn byte6(&mut self) -> BYTE6_W { - BYTE6_W { w: self } + #[must_use] + pub fn byte6(&mut self) -> Byte6W { + Byte6W::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 8:15 - Data Byte 5"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn byte5(&mut self) -> Byte5W { + Byte5W::new(self, 8) } } -#[doc = "CAN Frame Data Word 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data2_cmb6](index.html) module"] -pub struct DATA2_CMB6_SPEC; -impl crate::RegisterSpec for DATA2_CMB6_SPEC { +#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data2_cmb6::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data2_cmb6::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Data2Cmb6Spec; +impl crate::RegisterSpec for Data2Cmb6Spec { type Ux = u32; } -#[doc = "`read()` method returns [data2_cmb6::R](R) reader structure"] -impl crate::Readable for DATA2_CMB6_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [data2_cmb6::W](W) writer structure"] -impl crate::Writable for DATA2_CMB6_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`data2_cmb6::R`](R) reader structure"] +impl crate::Readable for Data2Cmb6Spec {} +#[doc = "`write(|w| ..)` method takes [`data2_cmb6::W`](W) writer structure"] +impl crate::Writable for Data2Cmb6Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA2_CMB6 to value 0"] -impl crate::Resettable for DATA2_CMB6_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Data2Cmb6Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/data2_cmb7.rs b/va416xx/src/can0/data2_cmb7.rs index 761a033..da5cea5 100644 --- a/va416xx/src/can0/data2_cmb7.rs +++ b/va416xx/src/can0/data2_cmb7.rs @@ -1,140 +1,55 @@ #[doc = "Register `DATA2_CMB7` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DATA2_CMB7` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `BYTE5` reader - Data Byte 5"] -pub struct BYTE5_R(crate::FieldReader); -impl BYTE5_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE5_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE5_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `BYTE5` writer - Data Byte 5"] -pub struct BYTE5_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE5_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0xff << 8)) | ((value as u32 & 0xff) << 8); - self.w - } -} +pub type W = crate::W; #[doc = "Field `BYTE6` reader - Data Byte 6"] -pub struct BYTE6_R(crate::FieldReader); -impl BYTE6_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE6_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE6_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Byte6R = crate::FieldReader; #[doc = "Field `BYTE6` writer - Data Byte 6"] -pub struct BYTE6_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE6_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type Byte6W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +#[doc = "Field `BYTE5` reader - Data Byte 5"] +pub type Byte5R = crate::FieldReader; +#[doc = "Field `BYTE5` writer - Data Byte 5"] +pub type Byte5W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { - #[doc = "Bits 8:15 - Data Byte 5"] - #[inline(always)] - pub fn byte5(&self) -> BYTE5_R { - BYTE5_R::new(((self.bits >> 8) & 0xff) as u8) - } #[doc = "Bits 0:7 - Data Byte 6"] #[inline(always)] - pub fn byte6(&self) -> BYTE6_R { - BYTE6_R::new((self.bits & 0xff) as u8) + pub fn byte6(&self) -> Byte6R { + Byte6R::new((self.bits & 0xff) as u8) + } + #[doc = "Bits 8:15 - Data Byte 5"] + #[inline(always)] + pub fn byte5(&self) -> Byte5R { + Byte5R::new(((self.bits >> 8) & 0xff) as u8) } } impl W { - #[doc = "Bits 8:15 - Data Byte 5"] - #[inline(always)] - pub fn byte5(&mut self) -> BYTE5_W { - BYTE5_W { w: self } - } #[doc = "Bits 0:7 - Data Byte 6"] #[inline(always)] - pub fn byte6(&mut self) -> BYTE6_W { - BYTE6_W { w: self } + #[must_use] + pub fn byte6(&mut self) -> Byte6W { + Byte6W::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 8:15 - Data Byte 5"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn byte5(&mut self) -> Byte5W { + Byte5W::new(self, 8) } } -#[doc = "CAN Frame Data Word 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data2_cmb7](index.html) module"] -pub struct DATA2_CMB7_SPEC; -impl crate::RegisterSpec for DATA2_CMB7_SPEC { +#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data2_cmb7::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data2_cmb7::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Data2Cmb7Spec; +impl crate::RegisterSpec for Data2Cmb7Spec { type Ux = u32; } -#[doc = "`read()` method returns [data2_cmb7::R](R) reader structure"] -impl crate::Readable for DATA2_CMB7_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [data2_cmb7::W](W) writer structure"] -impl crate::Writable for DATA2_CMB7_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`data2_cmb7::R`](R) reader structure"] +impl crate::Readable for Data2Cmb7Spec {} +#[doc = "`write(|w| ..)` method takes [`data2_cmb7::W`](W) writer structure"] +impl crate::Writable for Data2Cmb7Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA2_CMB7 to value 0"] -impl crate::Resettable for DATA2_CMB7_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Data2Cmb7Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/data2_cmb8.rs b/va416xx/src/can0/data2_cmb8.rs index 395a922..4c956f6 100644 --- a/va416xx/src/can0/data2_cmb8.rs +++ b/va416xx/src/can0/data2_cmb8.rs @@ -1,140 +1,55 @@ #[doc = "Register `DATA2_CMB8` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DATA2_CMB8` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `BYTE5` reader - Data Byte 5"] -pub struct BYTE5_R(crate::FieldReader); -impl BYTE5_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE5_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE5_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `BYTE5` writer - Data Byte 5"] -pub struct BYTE5_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE5_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0xff << 8)) | ((value as u32 & 0xff) << 8); - self.w - } -} +pub type W = crate::W; #[doc = "Field `BYTE6` reader - Data Byte 6"] -pub struct BYTE6_R(crate::FieldReader); -impl BYTE6_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE6_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE6_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Byte6R = crate::FieldReader; #[doc = "Field `BYTE6` writer - Data Byte 6"] -pub struct BYTE6_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE6_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type Byte6W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +#[doc = "Field `BYTE5` reader - Data Byte 5"] +pub type Byte5R = crate::FieldReader; +#[doc = "Field `BYTE5` writer - Data Byte 5"] +pub type Byte5W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { - #[doc = "Bits 8:15 - Data Byte 5"] - #[inline(always)] - pub fn byte5(&self) -> BYTE5_R { - BYTE5_R::new(((self.bits >> 8) & 0xff) as u8) - } #[doc = "Bits 0:7 - Data Byte 6"] #[inline(always)] - pub fn byte6(&self) -> BYTE6_R { - BYTE6_R::new((self.bits & 0xff) as u8) + pub fn byte6(&self) -> Byte6R { + Byte6R::new((self.bits & 0xff) as u8) + } + #[doc = "Bits 8:15 - Data Byte 5"] + #[inline(always)] + pub fn byte5(&self) -> Byte5R { + Byte5R::new(((self.bits >> 8) & 0xff) as u8) } } impl W { - #[doc = "Bits 8:15 - Data Byte 5"] - #[inline(always)] - pub fn byte5(&mut self) -> BYTE5_W { - BYTE5_W { w: self } - } #[doc = "Bits 0:7 - Data Byte 6"] #[inline(always)] - pub fn byte6(&mut self) -> BYTE6_W { - BYTE6_W { w: self } + #[must_use] + pub fn byte6(&mut self) -> Byte6W { + Byte6W::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 8:15 - Data Byte 5"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn byte5(&mut self) -> Byte5W { + Byte5W::new(self, 8) } } -#[doc = "CAN Frame Data Word 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data2_cmb8](index.html) module"] -pub struct DATA2_CMB8_SPEC; -impl crate::RegisterSpec for DATA2_CMB8_SPEC { +#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data2_cmb8::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data2_cmb8::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Data2Cmb8Spec; +impl crate::RegisterSpec for Data2Cmb8Spec { type Ux = u32; } -#[doc = "`read()` method returns [data2_cmb8::R](R) reader structure"] -impl crate::Readable for DATA2_CMB8_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [data2_cmb8::W](W) writer structure"] -impl crate::Writable for DATA2_CMB8_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`data2_cmb8::R`](R) reader structure"] +impl crate::Readable for Data2Cmb8Spec {} +#[doc = "`write(|w| ..)` method takes [`data2_cmb8::W`](W) writer structure"] +impl crate::Writable for Data2Cmb8Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA2_CMB8 to value 0"] -impl crate::Resettable for DATA2_CMB8_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Data2Cmb8Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/data2_cmb9.rs b/va416xx/src/can0/data2_cmb9.rs index 310fcd6..3076b3e 100644 --- a/va416xx/src/can0/data2_cmb9.rs +++ b/va416xx/src/can0/data2_cmb9.rs @@ -1,140 +1,55 @@ #[doc = "Register `DATA2_CMB9` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DATA2_CMB9` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `BYTE5` reader - Data Byte 5"] -pub struct BYTE5_R(crate::FieldReader); -impl BYTE5_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE5_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE5_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `BYTE5` writer - Data Byte 5"] -pub struct BYTE5_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE5_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0xff << 8)) | ((value as u32 & 0xff) << 8); - self.w - } -} +pub type W = crate::W; #[doc = "Field `BYTE6` reader - Data Byte 6"] -pub struct BYTE6_R(crate::FieldReader); -impl BYTE6_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE6_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE6_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Byte6R = crate::FieldReader; #[doc = "Field `BYTE6` writer - Data Byte 6"] -pub struct BYTE6_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE6_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type Byte6W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +#[doc = "Field `BYTE5` reader - Data Byte 5"] +pub type Byte5R = crate::FieldReader; +#[doc = "Field `BYTE5` writer - Data Byte 5"] +pub type Byte5W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { - #[doc = "Bits 8:15 - Data Byte 5"] - #[inline(always)] - pub fn byte5(&self) -> BYTE5_R { - BYTE5_R::new(((self.bits >> 8) & 0xff) as u8) - } #[doc = "Bits 0:7 - Data Byte 6"] #[inline(always)] - pub fn byte6(&self) -> BYTE6_R { - BYTE6_R::new((self.bits & 0xff) as u8) + pub fn byte6(&self) -> Byte6R { + Byte6R::new((self.bits & 0xff) as u8) + } + #[doc = "Bits 8:15 - Data Byte 5"] + #[inline(always)] + pub fn byte5(&self) -> Byte5R { + Byte5R::new(((self.bits >> 8) & 0xff) as u8) } } impl W { - #[doc = "Bits 8:15 - Data Byte 5"] - #[inline(always)] - pub fn byte5(&mut self) -> BYTE5_W { - BYTE5_W { w: self } - } #[doc = "Bits 0:7 - Data Byte 6"] #[inline(always)] - pub fn byte6(&mut self) -> BYTE6_W { - BYTE6_W { w: self } + #[must_use] + pub fn byte6(&mut self) -> Byte6W { + Byte6W::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 8:15 - Data Byte 5"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn byte5(&mut self) -> Byte5W { + Byte5W::new(self, 8) } } -#[doc = "CAN Frame Data Word 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data2_cmb9](index.html) module"] -pub struct DATA2_CMB9_SPEC; -impl crate::RegisterSpec for DATA2_CMB9_SPEC { +#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data2_cmb9::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data2_cmb9::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Data2Cmb9Spec; +impl crate::RegisterSpec for Data2Cmb9Spec { type Ux = u32; } -#[doc = "`read()` method returns [data2_cmb9::R](R) reader structure"] -impl crate::Readable for DATA2_CMB9_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [data2_cmb9::W](W) writer structure"] -impl crate::Writable for DATA2_CMB9_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`data2_cmb9::R`](R) reader structure"] +impl crate::Readable for Data2Cmb9Spec {} +#[doc = "`write(|w| ..)` method takes [`data2_cmb9::W`](W) writer structure"] +impl crate::Writable for Data2Cmb9Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA2_CMB9 to value 0"] -impl crate::Resettable for DATA2_CMB9_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Data2Cmb9Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/data2_hcmb.rs b/va416xx/src/can0/data2_hcmb.rs index a389749..2d43337 100644 --- a/va416xx/src/can0/data2_hcmb.rs +++ b/va416xx/src/can0/data2_hcmb.rs @@ -1,140 +1,55 @@ #[doc = "Register `DATA2_HCMB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DATA2_HCMB` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `BYTE5` reader - Data Byte 5"] -pub struct BYTE5_R(crate::FieldReader); -impl BYTE5_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE5_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE5_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `BYTE5` writer - Data Byte 5"] -pub struct BYTE5_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE5_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0xff << 8)) | ((value as u32 & 0xff) << 8); - self.w - } -} +pub type W = crate::W; #[doc = "Field `BYTE6` reader - Data Byte 6"] -pub struct BYTE6_R(crate::FieldReader); -impl BYTE6_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE6_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE6_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Byte6R = crate::FieldReader; #[doc = "Field `BYTE6` writer - Data Byte 6"] -pub struct BYTE6_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE6_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type Byte6W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +#[doc = "Field `BYTE5` reader - Data Byte 5"] +pub type Byte5R = crate::FieldReader; +#[doc = "Field `BYTE5` writer - Data Byte 5"] +pub type Byte5W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { - #[doc = "Bits 8:15 - Data Byte 5"] - #[inline(always)] - pub fn byte5(&self) -> BYTE5_R { - BYTE5_R::new(((self.bits >> 8) & 0xff) as u8) - } #[doc = "Bits 0:7 - Data Byte 6"] #[inline(always)] - pub fn byte6(&self) -> BYTE6_R { - BYTE6_R::new((self.bits & 0xff) as u8) + pub fn byte6(&self) -> Byte6R { + Byte6R::new((self.bits & 0xff) as u8) + } + #[doc = "Bits 8:15 - Data Byte 5"] + #[inline(always)] + pub fn byte5(&self) -> Byte5R { + Byte5R::new(((self.bits >> 8) & 0xff) as u8) } } impl W { - #[doc = "Bits 8:15 - Data Byte 5"] - #[inline(always)] - pub fn byte5(&mut self) -> BYTE5_W { - BYTE5_W { w: self } - } #[doc = "Bits 0:7 - Data Byte 6"] #[inline(always)] - pub fn byte6(&mut self) -> BYTE6_W { - BYTE6_W { w: self } + #[must_use] + pub fn byte6(&mut self) -> Byte6W { + Byte6W::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 8:15 - Data Byte 5"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn byte5(&mut self) -> Byte5W { + Byte5W::new(self, 8) } } -#[doc = "CAN Frame Data Word 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data2_hcmb](index.html) module"] -pub struct DATA2_HCMB_SPEC; -impl crate::RegisterSpec for DATA2_HCMB_SPEC { +#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data2_hcmb::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data2_hcmb::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Data2HcmbSpec; +impl crate::RegisterSpec for Data2HcmbSpec { type Ux = u32; } -#[doc = "`read()` method returns [data2_hcmb::R](R) reader structure"] -impl crate::Readable for DATA2_HCMB_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [data2_hcmb::W](W) writer structure"] -impl crate::Writable for DATA2_HCMB_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`data2_hcmb::R`](R) reader structure"] +impl crate::Readable for Data2HcmbSpec {} +#[doc = "`write(|w| ..)` method takes [`data2_hcmb::W`](W) writer structure"] +impl crate::Writable for Data2HcmbSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA2_HCMB to value 0"] -impl crate::Resettable for DATA2_HCMB_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Data2HcmbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/data3_cmb0.rs b/va416xx/src/can0/data3_cmb0.rs index 526d454..5cec7bc 100644 --- a/va416xx/src/can0/data3_cmb0.rs +++ b/va416xx/src/can0/data3_cmb0.rs @@ -1,140 +1,55 @@ #[doc = "Register `DATA3_CMB0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DATA3_CMB0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `BYTE7` reader - Data Byte 7"] -pub struct BYTE7_R(crate::FieldReader); -impl BYTE7_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE7_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE7_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `BYTE7` writer - Data Byte 7"] -pub struct BYTE7_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE7_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0xff << 8)) | ((value as u32 & 0xff) << 8); - self.w - } -} +pub type W = crate::W; #[doc = "Field `BYTE8` reader - Data Byte 8"] -pub struct BYTE8_R(crate::FieldReader); -impl BYTE8_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE8_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE8_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Byte8R = crate::FieldReader; #[doc = "Field `BYTE8` writer - Data Byte 8"] -pub struct BYTE8_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE8_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type Byte8W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +#[doc = "Field `BYTE7` reader - Data Byte 7"] +pub type Byte7R = crate::FieldReader; +#[doc = "Field `BYTE7` writer - Data Byte 7"] +pub type Byte7W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { - #[doc = "Bits 8:15 - Data Byte 7"] - #[inline(always)] - pub fn byte7(&self) -> BYTE7_R { - BYTE7_R::new(((self.bits >> 8) & 0xff) as u8) - } #[doc = "Bits 0:7 - Data Byte 8"] #[inline(always)] - pub fn byte8(&self) -> BYTE8_R { - BYTE8_R::new((self.bits & 0xff) as u8) + pub fn byte8(&self) -> Byte8R { + Byte8R::new((self.bits & 0xff) as u8) + } + #[doc = "Bits 8:15 - Data Byte 7"] + #[inline(always)] + pub fn byte7(&self) -> Byte7R { + Byte7R::new(((self.bits >> 8) & 0xff) as u8) } } impl W { - #[doc = "Bits 8:15 - Data Byte 7"] - #[inline(always)] - pub fn byte7(&mut self) -> BYTE7_W { - BYTE7_W { w: self } - } #[doc = "Bits 0:7 - Data Byte 8"] #[inline(always)] - pub fn byte8(&mut self) -> BYTE8_W { - BYTE8_W { w: self } + #[must_use] + pub fn byte8(&mut self) -> Byte8W { + Byte8W::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 8:15 - Data Byte 7"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn byte7(&mut self) -> Byte7W { + Byte7W::new(self, 8) } } -#[doc = "CAN Frame Data Word 3\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data3_cmb0](index.html) module"] -pub struct DATA3_CMB0_SPEC; -impl crate::RegisterSpec for DATA3_CMB0_SPEC { +#[doc = "CAN Frame Data Word 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data3_cmb0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data3_cmb0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Data3Cmb0Spec; +impl crate::RegisterSpec for Data3Cmb0Spec { type Ux = u32; } -#[doc = "`read()` method returns [data3_cmb0::R](R) reader structure"] -impl crate::Readable for DATA3_CMB0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [data3_cmb0::W](W) writer structure"] -impl crate::Writable for DATA3_CMB0_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`data3_cmb0::R`](R) reader structure"] +impl crate::Readable for Data3Cmb0Spec {} +#[doc = "`write(|w| ..)` method takes [`data3_cmb0::W`](W) writer structure"] +impl crate::Writable for Data3Cmb0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA3_CMB0 to value 0"] -impl crate::Resettable for DATA3_CMB0_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Data3Cmb0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/data3_cmb1.rs b/va416xx/src/can0/data3_cmb1.rs index 29a1630..6240a1c 100644 --- a/va416xx/src/can0/data3_cmb1.rs +++ b/va416xx/src/can0/data3_cmb1.rs @@ -1,140 +1,55 @@ #[doc = "Register `DATA3_CMB1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DATA3_CMB1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `BYTE7` reader - Data Byte 7"] -pub struct BYTE7_R(crate::FieldReader); -impl BYTE7_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE7_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE7_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `BYTE7` writer - Data Byte 7"] -pub struct BYTE7_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE7_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0xff << 8)) | ((value as u32 & 0xff) << 8); - self.w - } -} +pub type W = crate::W; #[doc = "Field `BYTE8` reader - Data Byte 8"] -pub struct BYTE8_R(crate::FieldReader); -impl BYTE8_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE8_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE8_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Byte8R = crate::FieldReader; #[doc = "Field `BYTE8` writer - Data Byte 8"] -pub struct BYTE8_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE8_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type Byte8W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +#[doc = "Field `BYTE7` reader - Data Byte 7"] +pub type Byte7R = crate::FieldReader; +#[doc = "Field `BYTE7` writer - Data Byte 7"] +pub type Byte7W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { - #[doc = "Bits 8:15 - Data Byte 7"] - #[inline(always)] - pub fn byte7(&self) -> BYTE7_R { - BYTE7_R::new(((self.bits >> 8) & 0xff) as u8) - } #[doc = "Bits 0:7 - Data Byte 8"] #[inline(always)] - pub fn byte8(&self) -> BYTE8_R { - BYTE8_R::new((self.bits & 0xff) as u8) + pub fn byte8(&self) -> Byte8R { + Byte8R::new((self.bits & 0xff) as u8) + } + #[doc = "Bits 8:15 - Data Byte 7"] + #[inline(always)] + pub fn byte7(&self) -> Byte7R { + Byte7R::new(((self.bits >> 8) & 0xff) as u8) } } impl W { - #[doc = "Bits 8:15 - Data Byte 7"] - #[inline(always)] - pub fn byte7(&mut self) -> BYTE7_W { - BYTE7_W { w: self } - } #[doc = "Bits 0:7 - Data Byte 8"] #[inline(always)] - pub fn byte8(&mut self) -> BYTE8_W { - BYTE8_W { w: self } + #[must_use] + pub fn byte8(&mut self) -> Byte8W { + Byte8W::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 8:15 - Data Byte 7"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn byte7(&mut self) -> Byte7W { + Byte7W::new(self, 8) } } -#[doc = "CAN Frame Data Word 3\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data3_cmb1](index.html) module"] -pub struct DATA3_CMB1_SPEC; -impl crate::RegisterSpec for DATA3_CMB1_SPEC { +#[doc = "CAN Frame Data Word 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data3_cmb1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data3_cmb1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Data3Cmb1Spec; +impl crate::RegisterSpec for Data3Cmb1Spec { type Ux = u32; } -#[doc = "`read()` method returns [data3_cmb1::R](R) reader structure"] -impl crate::Readable for DATA3_CMB1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [data3_cmb1::W](W) writer structure"] -impl crate::Writable for DATA3_CMB1_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`data3_cmb1::R`](R) reader structure"] +impl crate::Readable for Data3Cmb1Spec {} +#[doc = "`write(|w| ..)` method takes [`data3_cmb1::W`](W) writer structure"] +impl crate::Writable for Data3Cmb1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA3_CMB1 to value 0"] -impl crate::Resettable for DATA3_CMB1_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Data3Cmb1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/data3_cmb10.rs b/va416xx/src/can0/data3_cmb10.rs index 1c24934..bc817b6 100644 --- a/va416xx/src/can0/data3_cmb10.rs +++ b/va416xx/src/can0/data3_cmb10.rs @@ -1,140 +1,55 @@ #[doc = "Register `DATA3_CMB10` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DATA3_CMB10` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `BYTE7` reader - Data Byte 7"] -pub struct BYTE7_R(crate::FieldReader); -impl BYTE7_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE7_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE7_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `BYTE7` writer - Data Byte 7"] -pub struct BYTE7_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE7_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0xff << 8)) | ((value as u32 & 0xff) << 8); - self.w - } -} +pub type W = crate::W; #[doc = "Field `BYTE8` reader - Data Byte 8"] -pub struct BYTE8_R(crate::FieldReader); -impl BYTE8_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE8_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE8_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Byte8R = crate::FieldReader; #[doc = "Field `BYTE8` writer - Data Byte 8"] -pub struct BYTE8_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE8_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type Byte8W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +#[doc = "Field `BYTE7` reader - Data Byte 7"] +pub type Byte7R = crate::FieldReader; +#[doc = "Field `BYTE7` writer - Data Byte 7"] +pub type Byte7W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { - #[doc = "Bits 8:15 - Data Byte 7"] - #[inline(always)] - pub fn byte7(&self) -> BYTE7_R { - BYTE7_R::new(((self.bits >> 8) & 0xff) as u8) - } #[doc = "Bits 0:7 - Data Byte 8"] #[inline(always)] - pub fn byte8(&self) -> BYTE8_R { - BYTE8_R::new((self.bits & 0xff) as u8) + pub fn byte8(&self) -> Byte8R { + Byte8R::new((self.bits & 0xff) as u8) + } + #[doc = "Bits 8:15 - Data Byte 7"] + #[inline(always)] + pub fn byte7(&self) -> Byte7R { + Byte7R::new(((self.bits >> 8) & 0xff) as u8) } } impl W { - #[doc = "Bits 8:15 - Data Byte 7"] - #[inline(always)] - pub fn byte7(&mut self) -> BYTE7_W { - BYTE7_W { w: self } - } #[doc = "Bits 0:7 - Data Byte 8"] #[inline(always)] - pub fn byte8(&mut self) -> BYTE8_W { - BYTE8_W { w: self } + #[must_use] + pub fn byte8(&mut self) -> Byte8W { + Byte8W::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 8:15 - Data Byte 7"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn byte7(&mut self) -> Byte7W { + Byte7W::new(self, 8) } } -#[doc = "CAN Frame Data Word 3\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data3_cmb10](index.html) module"] -pub struct DATA3_CMB10_SPEC; -impl crate::RegisterSpec for DATA3_CMB10_SPEC { +#[doc = "CAN Frame Data Word 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data3_cmb10::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data3_cmb10::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Data3Cmb10Spec; +impl crate::RegisterSpec for Data3Cmb10Spec { type Ux = u32; } -#[doc = "`read()` method returns [data3_cmb10::R](R) reader structure"] -impl crate::Readable for DATA3_CMB10_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [data3_cmb10::W](W) writer structure"] -impl crate::Writable for DATA3_CMB10_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`data3_cmb10::R`](R) reader structure"] +impl crate::Readable for Data3Cmb10Spec {} +#[doc = "`write(|w| ..)` method takes [`data3_cmb10::W`](W) writer structure"] +impl crate::Writable for Data3Cmb10Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA3_CMB10 to value 0"] -impl crate::Resettable for DATA3_CMB10_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Data3Cmb10Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/data3_cmb11.rs b/va416xx/src/can0/data3_cmb11.rs index 3ddb29b..f5722aa 100644 --- a/va416xx/src/can0/data3_cmb11.rs +++ b/va416xx/src/can0/data3_cmb11.rs @@ -1,140 +1,55 @@ #[doc = "Register `DATA3_CMB11` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DATA3_CMB11` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `BYTE7` reader - Data Byte 7"] -pub struct BYTE7_R(crate::FieldReader); -impl BYTE7_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE7_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE7_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `BYTE7` writer - Data Byte 7"] -pub struct BYTE7_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE7_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0xff << 8)) | ((value as u32 & 0xff) << 8); - self.w - } -} +pub type W = crate::W; #[doc = "Field `BYTE8` reader - Data Byte 8"] -pub struct BYTE8_R(crate::FieldReader); -impl BYTE8_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE8_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE8_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Byte8R = crate::FieldReader; #[doc = "Field `BYTE8` writer - Data Byte 8"] -pub struct BYTE8_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE8_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type Byte8W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +#[doc = "Field `BYTE7` reader - Data Byte 7"] +pub type Byte7R = crate::FieldReader; +#[doc = "Field `BYTE7` writer - Data Byte 7"] +pub type Byte7W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { - #[doc = "Bits 8:15 - Data Byte 7"] - #[inline(always)] - pub fn byte7(&self) -> BYTE7_R { - BYTE7_R::new(((self.bits >> 8) & 0xff) as u8) - } #[doc = "Bits 0:7 - Data Byte 8"] #[inline(always)] - pub fn byte8(&self) -> BYTE8_R { - BYTE8_R::new((self.bits & 0xff) as u8) + pub fn byte8(&self) -> Byte8R { + Byte8R::new((self.bits & 0xff) as u8) + } + #[doc = "Bits 8:15 - Data Byte 7"] + #[inline(always)] + pub fn byte7(&self) -> Byte7R { + Byte7R::new(((self.bits >> 8) & 0xff) as u8) } } impl W { - #[doc = "Bits 8:15 - Data Byte 7"] - #[inline(always)] - pub fn byte7(&mut self) -> BYTE7_W { - BYTE7_W { w: self } - } #[doc = "Bits 0:7 - Data Byte 8"] #[inline(always)] - pub fn byte8(&mut self) -> BYTE8_W { - BYTE8_W { w: self } + #[must_use] + pub fn byte8(&mut self) -> Byte8W { + Byte8W::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 8:15 - Data Byte 7"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn byte7(&mut self) -> Byte7W { + Byte7W::new(self, 8) } } -#[doc = "CAN Frame Data Word 3\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data3_cmb11](index.html) module"] -pub struct DATA3_CMB11_SPEC; -impl crate::RegisterSpec for DATA3_CMB11_SPEC { +#[doc = "CAN Frame Data Word 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data3_cmb11::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data3_cmb11::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Data3Cmb11Spec; +impl crate::RegisterSpec for Data3Cmb11Spec { type Ux = u32; } -#[doc = "`read()` method returns [data3_cmb11::R](R) reader structure"] -impl crate::Readable for DATA3_CMB11_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [data3_cmb11::W](W) writer structure"] -impl crate::Writable for DATA3_CMB11_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`data3_cmb11::R`](R) reader structure"] +impl crate::Readable for Data3Cmb11Spec {} +#[doc = "`write(|w| ..)` method takes [`data3_cmb11::W`](W) writer structure"] +impl crate::Writable for Data3Cmb11Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA3_CMB11 to value 0"] -impl crate::Resettable for DATA3_CMB11_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Data3Cmb11Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/data3_cmb12.rs b/va416xx/src/can0/data3_cmb12.rs index 18d9fd5..d830d5f 100644 --- a/va416xx/src/can0/data3_cmb12.rs +++ b/va416xx/src/can0/data3_cmb12.rs @@ -1,140 +1,55 @@ #[doc = "Register `DATA3_CMB12` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DATA3_CMB12` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `BYTE7` reader - Data Byte 7"] -pub struct BYTE7_R(crate::FieldReader); -impl BYTE7_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE7_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE7_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `BYTE7` writer - Data Byte 7"] -pub struct BYTE7_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE7_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0xff << 8)) | ((value as u32 & 0xff) << 8); - self.w - } -} +pub type W = crate::W; #[doc = "Field `BYTE8` reader - Data Byte 8"] -pub struct BYTE8_R(crate::FieldReader); -impl BYTE8_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE8_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE8_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Byte8R = crate::FieldReader; #[doc = "Field `BYTE8` writer - Data Byte 8"] -pub struct BYTE8_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE8_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type Byte8W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +#[doc = "Field `BYTE7` reader - Data Byte 7"] +pub type Byte7R = crate::FieldReader; +#[doc = "Field `BYTE7` writer - Data Byte 7"] +pub type Byte7W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { - #[doc = "Bits 8:15 - Data Byte 7"] - #[inline(always)] - pub fn byte7(&self) -> BYTE7_R { - BYTE7_R::new(((self.bits >> 8) & 0xff) as u8) - } #[doc = "Bits 0:7 - Data Byte 8"] #[inline(always)] - pub fn byte8(&self) -> BYTE8_R { - BYTE8_R::new((self.bits & 0xff) as u8) + pub fn byte8(&self) -> Byte8R { + Byte8R::new((self.bits & 0xff) as u8) + } + #[doc = "Bits 8:15 - Data Byte 7"] + #[inline(always)] + pub fn byte7(&self) -> Byte7R { + Byte7R::new(((self.bits >> 8) & 0xff) as u8) } } impl W { - #[doc = "Bits 8:15 - Data Byte 7"] - #[inline(always)] - pub fn byte7(&mut self) -> BYTE7_W { - BYTE7_W { w: self } - } #[doc = "Bits 0:7 - Data Byte 8"] #[inline(always)] - pub fn byte8(&mut self) -> BYTE8_W { - BYTE8_W { w: self } + #[must_use] + pub fn byte8(&mut self) -> Byte8W { + Byte8W::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 8:15 - Data Byte 7"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn byte7(&mut self) -> Byte7W { + Byte7W::new(self, 8) } } -#[doc = "CAN Frame Data Word 3\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data3_cmb12](index.html) module"] -pub struct DATA3_CMB12_SPEC; -impl crate::RegisterSpec for DATA3_CMB12_SPEC { +#[doc = "CAN Frame Data Word 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data3_cmb12::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data3_cmb12::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Data3Cmb12Spec; +impl crate::RegisterSpec for Data3Cmb12Spec { type Ux = u32; } -#[doc = "`read()` method returns [data3_cmb12::R](R) reader structure"] -impl crate::Readable for DATA3_CMB12_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [data3_cmb12::W](W) writer structure"] -impl crate::Writable for DATA3_CMB12_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`data3_cmb12::R`](R) reader structure"] +impl crate::Readable for Data3Cmb12Spec {} +#[doc = "`write(|w| ..)` method takes [`data3_cmb12::W`](W) writer structure"] +impl crate::Writable for Data3Cmb12Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA3_CMB12 to value 0"] -impl crate::Resettable for DATA3_CMB12_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Data3Cmb12Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/data3_cmb13.rs b/va416xx/src/can0/data3_cmb13.rs index 8e375c4..3d3c30c 100644 --- a/va416xx/src/can0/data3_cmb13.rs +++ b/va416xx/src/can0/data3_cmb13.rs @@ -1,140 +1,55 @@ #[doc = "Register `DATA3_CMB13` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DATA3_CMB13` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `BYTE7` reader - Data Byte 7"] -pub struct BYTE7_R(crate::FieldReader); -impl BYTE7_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE7_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE7_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `BYTE7` writer - Data Byte 7"] -pub struct BYTE7_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE7_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0xff << 8)) | ((value as u32 & 0xff) << 8); - self.w - } -} +pub type W = crate::W; #[doc = "Field `BYTE8` reader - Data Byte 8"] -pub struct BYTE8_R(crate::FieldReader); -impl BYTE8_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE8_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE8_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Byte8R = crate::FieldReader; #[doc = "Field `BYTE8` writer - Data Byte 8"] -pub struct BYTE8_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE8_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type Byte8W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +#[doc = "Field `BYTE7` reader - Data Byte 7"] +pub type Byte7R = crate::FieldReader; +#[doc = "Field `BYTE7` writer - Data Byte 7"] +pub type Byte7W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { - #[doc = "Bits 8:15 - Data Byte 7"] - #[inline(always)] - pub fn byte7(&self) -> BYTE7_R { - BYTE7_R::new(((self.bits >> 8) & 0xff) as u8) - } #[doc = "Bits 0:7 - Data Byte 8"] #[inline(always)] - pub fn byte8(&self) -> BYTE8_R { - BYTE8_R::new((self.bits & 0xff) as u8) + pub fn byte8(&self) -> Byte8R { + Byte8R::new((self.bits & 0xff) as u8) + } + #[doc = "Bits 8:15 - Data Byte 7"] + #[inline(always)] + pub fn byte7(&self) -> Byte7R { + Byte7R::new(((self.bits >> 8) & 0xff) as u8) } } impl W { - #[doc = "Bits 8:15 - Data Byte 7"] - #[inline(always)] - pub fn byte7(&mut self) -> BYTE7_W { - BYTE7_W { w: self } - } #[doc = "Bits 0:7 - Data Byte 8"] #[inline(always)] - pub fn byte8(&mut self) -> BYTE8_W { - BYTE8_W { w: self } + #[must_use] + pub fn byte8(&mut self) -> Byte8W { + Byte8W::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 8:15 - Data Byte 7"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn byte7(&mut self) -> Byte7W { + Byte7W::new(self, 8) } } -#[doc = "CAN Frame Data Word 3\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data3_cmb13](index.html) module"] -pub struct DATA3_CMB13_SPEC; -impl crate::RegisterSpec for DATA3_CMB13_SPEC { +#[doc = "CAN Frame Data Word 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data3_cmb13::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data3_cmb13::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Data3Cmb13Spec; +impl crate::RegisterSpec for Data3Cmb13Spec { type Ux = u32; } -#[doc = "`read()` method returns [data3_cmb13::R](R) reader structure"] -impl crate::Readable for DATA3_CMB13_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [data3_cmb13::W](W) writer structure"] -impl crate::Writable for DATA3_CMB13_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`data3_cmb13::R`](R) reader structure"] +impl crate::Readable for Data3Cmb13Spec {} +#[doc = "`write(|w| ..)` method takes [`data3_cmb13::W`](W) writer structure"] +impl crate::Writable for Data3Cmb13Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA3_CMB13 to value 0"] -impl crate::Resettable for DATA3_CMB13_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Data3Cmb13Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/data3_cmb14.rs b/va416xx/src/can0/data3_cmb14.rs index 5de083f..446f136 100644 --- a/va416xx/src/can0/data3_cmb14.rs +++ b/va416xx/src/can0/data3_cmb14.rs @@ -1,140 +1,55 @@ #[doc = "Register `DATA3_CMB14` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DATA3_CMB14` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `BYTE7` reader - Data Byte 7"] -pub struct BYTE7_R(crate::FieldReader); -impl BYTE7_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE7_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE7_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `BYTE7` writer - Data Byte 7"] -pub struct BYTE7_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE7_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0xff << 8)) | ((value as u32 & 0xff) << 8); - self.w - } -} +pub type W = crate::W; #[doc = "Field `BYTE8` reader - Data Byte 8"] -pub struct BYTE8_R(crate::FieldReader); -impl BYTE8_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE8_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE8_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Byte8R = crate::FieldReader; #[doc = "Field `BYTE8` writer - Data Byte 8"] -pub struct BYTE8_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE8_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type Byte8W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +#[doc = "Field `BYTE7` reader - Data Byte 7"] +pub type Byte7R = crate::FieldReader; +#[doc = "Field `BYTE7` writer - Data Byte 7"] +pub type Byte7W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { - #[doc = "Bits 8:15 - Data Byte 7"] - #[inline(always)] - pub fn byte7(&self) -> BYTE7_R { - BYTE7_R::new(((self.bits >> 8) & 0xff) as u8) - } #[doc = "Bits 0:7 - Data Byte 8"] #[inline(always)] - pub fn byte8(&self) -> BYTE8_R { - BYTE8_R::new((self.bits & 0xff) as u8) + pub fn byte8(&self) -> Byte8R { + Byte8R::new((self.bits & 0xff) as u8) + } + #[doc = "Bits 8:15 - Data Byte 7"] + #[inline(always)] + pub fn byte7(&self) -> Byte7R { + Byte7R::new(((self.bits >> 8) & 0xff) as u8) } } impl W { - #[doc = "Bits 8:15 - Data Byte 7"] - #[inline(always)] - pub fn byte7(&mut self) -> BYTE7_W { - BYTE7_W { w: self } - } #[doc = "Bits 0:7 - Data Byte 8"] #[inline(always)] - pub fn byte8(&mut self) -> BYTE8_W { - BYTE8_W { w: self } + #[must_use] + pub fn byte8(&mut self) -> Byte8W { + Byte8W::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 8:15 - Data Byte 7"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn byte7(&mut self) -> Byte7W { + Byte7W::new(self, 8) } } -#[doc = "CAN Frame Data Word 3\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data3_cmb14](index.html) module"] -pub struct DATA3_CMB14_SPEC; -impl crate::RegisterSpec for DATA3_CMB14_SPEC { +#[doc = "CAN Frame Data Word 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data3_cmb14::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data3_cmb14::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Data3Cmb14Spec; +impl crate::RegisterSpec for Data3Cmb14Spec { type Ux = u32; } -#[doc = "`read()` method returns [data3_cmb14::R](R) reader structure"] -impl crate::Readable for DATA3_CMB14_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [data3_cmb14::W](W) writer structure"] -impl crate::Writable for DATA3_CMB14_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`data3_cmb14::R`](R) reader structure"] +impl crate::Readable for Data3Cmb14Spec {} +#[doc = "`write(|w| ..)` method takes [`data3_cmb14::W`](W) writer structure"] +impl crate::Writable for Data3Cmb14Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA3_CMB14 to value 0"] -impl crate::Resettable for DATA3_CMB14_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Data3Cmb14Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/data3_cmb2.rs b/va416xx/src/can0/data3_cmb2.rs index 0915773..780bd99 100644 --- a/va416xx/src/can0/data3_cmb2.rs +++ b/va416xx/src/can0/data3_cmb2.rs @@ -1,140 +1,55 @@ #[doc = "Register `DATA3_CMB2` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DATA3_CMB2` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `BYTE7` reader - Data Byte 7"] -pub struct BYTE7_R(crate::FieldReader); -impl BYTE7_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE7_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE7_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `BYTE7` writer - Data Byte 7"] -pub struct BYTE7_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE7_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0xff << 8)) | ((value as u32 & 0xff) << 8); - self.w - } -} +pub type W = crate::W; #[doc = "Field `BYTE8` reader - Data Byte 8"] -pub struct BYTE8_R(crate::FieldReader); -impl BYTE8_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE8_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE8_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Byte8R = crate::FieldReader; #[doc = "Field `BYTE8` writer - Data Byte 8"] -pub struct BYTE8_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE8_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type Byte8W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +#[doc = "Field `BYTE7` reader - Data Byte 7"] +pub type Byte7R = crate::FieldReader; +#[doc = "Field `BYTE7` writer - Data Byte 7"] +pub type Byte7W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { - #[doc = "Bits 8:15 - Data Byte 7"] - #[inline(always)] - pub fn byte7(&self) -> BYTE7_R { - BYTE7_R::new(((self.bits >> 8) & 0xff) as u8) - } #[doc = "Bits 0:7 - Data Byte 8"] #[inline(always)] - pub fn byte8(&self) -> BYTE8_R { - BYTE8_R::new((self.bits & 0xff) as u8) + pub fn byte8(&self) -> Byte8R { + Byte8R::new((self.bits & 0xff) as u8) + } + #[doc = "Bits 8:15 - Data Byte 7"] + #[inline(always)] + pub fn byte7(&self) -> Byte7R { + Byte7R::new(((self.bits >> 8) & 0xff) as u8) } } impl W { - #[doc = "Bits 8:15 - Data Byte 7"] - #[inline(always)] - pub fn byte7(&mut self) -> BYTE7_W { - BYTE7_W { w: self } - } #[doc = "Bits 0:7 - Data Byte 8"] #[inline(always)] - pub fn byte8(&mut self) -> BYTE8_W { - BYTE8_W { w: self } + #[must_use] + pub fn byte8(&mut self) -> Byte8W { + Byte8W::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 8:15 - Data Byte 7"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn byte7(&mut self) -> Byte7W { + Byte7W::new(self, 8) } } -#[doc = "CAN Frame Data Word 3\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data3_cmb2](index.html) module"] -pub struct DATA3_CMB2_SPEC; -impl crate::RegisterSpec for DATA3_CMB2_SPEC { +#[doc = "CAN Frame Data Word 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data3_cmb2::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data3_cmb2::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Data3Cmb2Spec; +impl crate::RegisterSpec for Data3Cmb2Spec { type Ux = u32; } -#[doc = "`read()` method returns [data3_cmb2::R](R) reader structure"] -impl crate::Readable for DATA3_CMB2_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [data3_cmb2::W](W) writer structure"] -impl crate::Writable for DATA3_CMB2_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`data3_cmb2::R`](R) reader structure"] +impl crate::Readable for Data3Cmb2Spec {} +#[doc = "`write(|w| ..)` method takes [`data3_cmb2::W`](W) writer structure"] +impl crate::Writable for Data3Cmb2Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA3_CMB2 to value 0"] -impl crate::Resettable for DATA3_CMB2_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Data3Cmb2Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/data3_cmb3.rs b/va416xx/src/can0/data3_cmb3.rs index 5cb0bf0..7d4a05b 100644 --- a/va416xx/src/can0/data3_cmb3.rs +++ b/va416xx/src/can0/data3_cmb3.rs @@ -1,140 +1,55 @@ #[doc = "Register `DATA3_CMB3` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DATA3_CMB3` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `BYTE7` reader - Data Byte 7"] -pub struct BYTE7_R(crate::FieldReader); -impl BYTE7_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE7_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE7_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `BYTE7` writer - Data Byte 7"] -pub struct BYTE7_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE7_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0xff << 8)) | ((value as u32 & 0xff) << 8); - self.w - } -} +pub type W = crate::W; #[doc = "Field `BYTE8` reader - Data Byte 8"] -pub struct BYTE8_R(crate::FieldReader); -impl BYTE8_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE8_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE8_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Byte8R = crate::FieldReader; #[doc = "Field `BYTE8` writer - Data Byte 8"] -pub struct BYTE8_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE8_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type Byte8W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +#[doc = "Field `BYTE7` reader - Data Byte 7"] +pub type Byte7R = crate::FieldReader; +#[doc = "Field `BYTE7` writer - Data Byte 7"] +pub type Byte7W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { - #[doc = "Bits 8:15 - Data Byte 7"] - #[inline(always)] - pub fn byte7(&self) -> BYTE7_R { - BYTE7_R::new(((self.bits >> 8) & 0xff) as u8) - } #[doc = "Bits 0:7 - Data Byte 8"] #[inline(always)] - pub fn byte8(&self) -> BYTE8_R { - BYTE8_R::new((self.bits & 0xff) as u8) + pub fn byte8(&self) -> Byte8R { + Byte8R::new((self.bits & 0xff) as u8) + } + #[doc = "Bits 8:15 - Data Byte 7"] + #[inline(always)] + pub fn byte7(&self) -> Byte7R { + Byte7R::new(((self.bits >> 8) & 0xff) as u8) } } impl W { - #[doc = "Bits 8:15 - Data Byte 7"] - #[inline(always)] - pub fn byte7(&mut self) -> BYTE7_W { - BYTE7_W { w: self } - } #[doc = "Bits 0:7 - Data Byte 8"] #[inline(always)] - pub fn byte8(&mut self) -> BYTE8_W { - BYTE8_W { w: self } + #[must_use] + pub fn byte8(&mut self) -> Byte8W { + Byte8W::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 8:15 - Data Byte 7"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn byte7(&mut self) -> Byte7W { + Byte7W::new(self, 8) } } -#[doc = "CAN Frame Data Word 3\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data3_cmb3](index.html) module"] -pub struct DATA3_CMB3_SPEC; -impl crate::RegisterSpec for DATA3_CMB3_SPEC { +#[doc = "CAN Frame Data Word 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data3_cmb3::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data3_cmb3::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Data3Cmb3Spec; +impl crate::RegisterSpec for Data3Cmb3Spec { type Ux = u32; } -#[doc = "`read()` method returns [data3_cmb3::R](R) reader structure"] -impl crate::Readable for DATA3_CMB3_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [data3_cmb3::W](W) writer structure"] -impl crate::Writable for DATA3_CMB3_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`data3_cmb3::R`](R) reader structure"] +impl crate::Readable for Data3Cmb3Spec {} +#[doc = "`write(|w| ..)` method takes [`data3_cmb3::W`](W) writer structure"] +impl crate::Writable for Data3Cmb3Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA3_CMB3 to value 0"] -impl crate::Resettable for DATA3_CMB3_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Data3Cmb3Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/data3_cmb4.rs b/va416xx/src/can0/data3_cmb4.rs index f741827..8b09d6b 100644 --- a/va416xx/src/can0/data3_cmb4.rs +++ b/va416xx/src/can0/data3_cmb4.rs @@ -1,140 +1,55 @@ #[doc = "Register `DATA3_CMB4` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DATA3_CMB4` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `BYTE7` reader - Data Byte 7"] -pub struct BYTE7_R(crate::FieldReader); -impl BYTE7_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE7_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE7_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `BYTE7` writer - Data Byte 7"] -pub struct BYTE7_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE7_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0xff << 8)) | ((value as u32 & 0xff) << 8); - self.w - } -} +pub type W = crate::W; #[doc = "Field `BYTE8` reader - Data Byte 8"] -pub struct BYTE8_R(crate::FieldReader); -impl BYTE8_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE8_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE8_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Byte8R = crate::FieldReader; #[doc = "Field `BYTE8` writer - Data Byte 8"] -pub struct BYTE8_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE8_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type Byte8W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +#[doc = "Field `BYTE7` reader - Data Byte 7"] +pub type Byte7R = crate::FieldReader; +#[doc = "Field `BYTE7` writer - Data Byte 7"] +pub type Byte7W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { - #[doc = "Bits 8:15 - Data Byte 7"] - #[inline(always)] - pub fn byte7(&self) -> BYTE7_R { - BYTE7_R::new(((self.bits >> 8) & 0xff) as u8) - } #[doc = "Bits 0:7 - Data Byte 8"] #[inline(always)] - pub fn byte8(&self) -> BYTE8_R { - BYTE8_R::new((self.bits & 0xff) as u8) + pub fn byte8(&self) -> Byte8R { + Byte8R::new((self.bits & 0xff) as u8) + } + #[doc = "Bits 8:15 - Data Byte 7"] + #[inline(always)] + pub fn byte7(&self) -> Byte7R { + Byte7R::new(((self.bits >> 8) & 0xff) as u8) } } impl W { - #[doc = "Bits 8:15 - Data Byte 7"] - #[inline(always)] - pub fn byte7(&mut self) -> BYTE7_W { - BYTE7_W { w: self } - } #[doc = "Bits 0:7 - Data Byte 8"] #[inline(always)] - pub fn byte8(&mut self) -> BYTE8_W { - BYTE8_W { w: self } + #[must_use] + pub fn byte8(&mut self) -> Byte8W { + Byte8W::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 8:15 - Data Byte 7"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn byte7(&mut self) -> Byte7W { + Byte7W::new(self, 8) } } -#[doc = "CAN Frame Data Word 3\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data3_cmb4](index.html) module"] -pub struct DATA3_CMB4_SPEC; -impl crate::RegisterSpec for DATA3_CMB4_SPEC { +#[doc = "CAN Frame Data Word 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data3_cmb4::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data3_cmb4::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Data3Cmb4Spec; +impl crate::RegisterSpec for Data3Cmb4Spec { type Ux = u32; } -#[doc = "`read()` method returns [data3_cmb4::R](R) reader structure"] -impl crate::Readable for DATA3_CMB4_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [data3_cmb4::W](W) writer structure"] -impl crate::Writable for DATA3_CMB4_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`data3_cmb4::R`](R) reader structure"] +impl crate::Readable for Data3Cmb4Spec {} +#[doc = "`write(|w| ..)` method takes [`data3_cmb4::W`](W) writer structure"] +impl crate::Writable for Data3Cmb4Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA3_CMB4 to value 0"] -impl crate::Resettable for DATA3_CMB4_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Data3Cmb4Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/data3_cmb5.rs b/va416xx/src/can0/data3_cmb5.rs index aa4470f..b686f5b 100644 --- a/va416xx/src/can0/data3_cmb5.rs +++ b/va416xx/src/can0/data3_cmb5.rs @@ -1,140 +1,55 @@ #[doc = "Register `DATA3_CMB5` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DATA3_CMB5` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `BYTE7` reader - Data Byte 7"] -pub struct BYTE7_R(crate::FieldReader); -impl BYTE7_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE7_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE7_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `BYTE7` writer - Data Byte 7"] -pub struct BYTE7_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE7_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0xff << 8)) | ((value as u32 & 0xff) << 8); - self.w - } -} +pub type W = crate::W; #[doc = "Field `BYTE8` reader - Data Byte 8"] -pub struct BYTE8_R(crate::FieldReader); -impl BYTE8_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE8_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE8_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Byte8R = crate::FieldReader; #[doc = "Field `BYTE8` writer - Data Byte 8"] -pub struct BYTE8_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE8_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type Byte8W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +#[doc = "Field `BYTE7` reader - Data Byte 7"] +pub type Byte7R = crate::FieldReader; +#[doc = "Field `BYTE7` writer - Data Byte 7"] +pub type Byte7W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { - #[doc = "Bits 8:15 - Data Byte 7"] - #[inline(always)] - pub fn byte7(&self) -> BYTE7_R { - BYTE7_R::new(((self.bits >> 8) & 0xff) as u8) - } #[doc = "Bits 0:7 - Data Byte 8"] #[inline(always)] - pub fn byte8(&self) -> BYTE8_R { - BYTE8_R::new((self.bits & 0xff) as u8) + pub fn byte8(&self) -> Byte8R { + Byte8R::new((self.bits & 0xff) as u8) + } + #[doc = "Bits 8:15 - Data Byte 7"] + #[inline(always)] + pub fn byte7(&self) -> Byte7R { + Byte7R::new(((self.bits >> 8) & 0xff) as u8) } } impl W { - #[doc = "Bits 8:15 - Data Byte 7"] - #[inline(always)] - pub fn byte7(&mut self) -> BYTE7_W { - BYTE7_W { w: self } - } #[doc = "Bits 0:7 - Data Byte 8"] #[inline(always)] - pub fn byte8(&mut self) -> BYTE8_W { - BYTE8_W { w: self } + #[must_use] + pub fn byte8(&mut self) -> Byte8W { + Byte8W::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 8:15 - Data Byte 7"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn byte7(&mut self) -> Byte7W { + Byte7W::new(self, 8) } } -#[doc = "CAN Frame Data Word 3\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data3_cmb5](index.html) module"] -pub struct DATA3_CMB5_SPEC; -impl crate::RegisterSpec for DATA3_CMB5_SPEC { +#[doc = "CAN Frame Data Word 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data3_cmb5::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data3_cmb5::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Data3Cmb5Spec; +impl crate::RegisterSpec for Data3Cmb5Spec { type Ux = u32; } -#[doc = "`read()` method returns [data3_cmb5::R](R) reader structure"] -impl crate::Readable for DATA3_CMB5_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [data3_cmb5::W](W) writer structure"] -impl crate::Writable for DATA3_CMB5_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`data3_cmb5::R`](R) reader structure"] +impl crate::Readable for Data3Cmb5Spec {} +#[doc = "`write(|w| ..)` method takes [`data3_cmb5::W`](W) writer structure"] +impl crate::Writable for Data3Cmb5Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA3_CMB5 to value 0"] -impl crate::Resettable for DATA3_CMB5_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Data3Cmb5Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/data3_cmb6.rs b/va416xx/src/can0/data3_cmb6.rs index bb809e9..6cfb1b7 100644 --- a/va416xx/src/can0/data3_cmb6.rs +++ b/va416xx/src/can0/data3_cmb6.rs @@ -1,140 +1,55 @@ #[doc = "Register `DATA3_CMB6` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DATA3_CMB6` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `BYTE7` reader - Data Byte 7"] -pub struct BYTE7_R(crate::FieldReader); -impl BYTE7_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE7_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE7_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `BYTE7` writer - Data Byte 7"] -pub struct BYTE7_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE7_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0xff << 8)) | ((value as u32 & 0xff) << 8); - self.w - } -} +pub type W = crate::W; #[doc = "Field `BYTE8` reader - Data Byte 8"] -pub struct BYTE8_R(crate::FieldReader); -impl BYTE8_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE8_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE8_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Byte8R = crate::FieldReader; #[doc = "Field `BYTE8` writer - Data Byte 8"] -pub struct BYTE8_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE8_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type Byte8W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +#[doc = "Field `BYTE7` reader - Data Byte 7"] +pub type Byte7R = crate::FieldReader; +#[doc = "Field `BYTE7` writer - Data Byte 7"] +pub type Byte7W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { - #[doc = "Bits 8:15 - Data Byte 7"] - #[inline(always)] - pub fn byte7(&self) -> BYTE7_R { - BYTE7_R::new(((self.bits >> 8) & 0xff) as u8) - } #[doc = "Bits 0:7 - Data Byte 8"] #[inline(always)] - pub fn byte8(&self) -> BYTE8_R { - BYTE8_R::new((self.bits & 0xff) as u8) + pub fn byte8(&self) -> Byte8R { + Byte8R::new((self.bits & 0xff) as u8) + } + #[doc = "Bits 8:15 - Data Byte 7"] + #[inline(always)] + pub fn byte7(&self) -> Byte7R { + Byte7R::new(((self.bits >> 8) & 0xff) as u8) } } impl W { - #[doc = "Bits 8:15 - Data Byte 7"] - #[inline(always)] - pub fn byte7(&mut self) -> BYTE7_W { - BYTE7_W { w: self } - } #[doc = "Bits 0:7 - Data Byte 8"] #[inline(always)] - pub fn byte8(&mut self) -> BYTE8_W { - BYTE8_W { w: self } + #[must_use] + pub fn byte8(&mut self) -> Byte8W { + Byte8W::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 8:15 - Data Byte 7"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn byte7(&mut self) -> Byte7W { + Byte7W::new(self, 8) } } -#[doc = "CAN Frame Data Word 3\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data3_cmb6](index.html) module"] -pub struct DATA3_CMB6_SPEC; -impl crate::RegisterSpec for DATA3_CMB6_SPEC { +#[doc = "CAN Frame Data Word 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data3_cmb6::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data3_cmb6::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Data3Cmb6Spec; +impl crate::RegisterSpec for Data3Cmb6Spec { type Ux = u32; } -#[doc = "`read()` method returns [data3_cmb6::R](R) reader structure"] -impl crate::Readable for DATA3_CMB6_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [data3_cmb6::W](W) writer structure"] -impl crate::Writable for DATA3_CMB6_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`data3_cmb6::R`](R) reader structure"] +impl crate::Readable for Data3Cmb6Spec {} +#[doc = "`write(|w| ..)` method takes [`data3_cmb6::W`](W) writer structure"] +impl crate::Writable for Data3Cmb6Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA3_CMB6 to value 0"] -impl crate::Resettable for DATA3_CMB6_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Data3Cmb6Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/data3_cmb7.rs b/va416xx/src/can0/data3_cmb7.rs index 60ae85a..2b594bf 100644 --- a/va416xx/src/can0/data3_cmb7.rs +++ b/va416xx/src/can0/data3_cmb7.rs @@ -1,140 +1,55 @@ #[doc = "Register `DATA3_CMB7` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DATA3_CMB7` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `BYTE7` reader - Data Byte 7"] -pub struct BYTE7_R(crate::FieldReader); -impl BYTE7_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE7_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE7_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `BYTE7` writer - Data Byte 7"] -pub struct BYTE7_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE7_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0xff << 8)) | ((value as u32 & 0xff) << 8); - self.w - } -} +pub type W = crate::W; #[doc = "Field `BYTE8` reader - Data Byte 8"] -pub struct BYTE8_R(crate::FieldReader); -impl BYTE8_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE8_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE8_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Byte8R = crate::FieldReader; #[doc = "Field `BYTE8` writer - Data Byte 8"] -pub struct BYTE8_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE8_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type Byte8W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +#[doc = "Field `BYTE7` reader - Data Byte 7"] +pub type Byte7R = crate::FieldReader; +#[doc = "Field `BYTE7` writer - Data Byte 7"] +pub type Byte7W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { - #[doc = "Bits 8:15 - Data Byte 7"] - #[inline(always)] - pub fn byte7(&self) -> BYTE7_R { - BYTE7_R::new(((self.bits >> 8) & 0xff) as u8) - } #[doc = "Bits 0:7 - Data Byte 8"] #[inline(always)] - pub fn byte8(&self) -> BYTE8_R { - BYTE8_R::new((self.bits & 0xff) as u8) + pub fn byte8(&self) -> Byte8R { + Byte8R::new((self.bits & 0xff) as u8) + } + #[doc = "Bits 8:15 - Data Byte 7"] + #[inline(always)] + pub fn byte7(&self) -> Byte7R { + Byte7R::new(((self.bits >> 8) & 0xff) as u8) } } impl W { - #[doc = "Bits 8:15 - Data Byte 7"] - #[inline(always)] - pub fn byte7(&mut self) -> BYTE7_W { - BYTE7_W { w: self } - } #[doc = "Bits 0:7 - Data Byte 8"] #[inline(always)] - pub fn byte8(&mut self) -> BYTE8_W { - BYTE8_W { w: self } + #[must_use] + pub fn byte8(&mut self) -> Byte8W { + Byte8W::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 8:15 - Data Byte 7"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn byte7(&mut self) -> Byte7W { + Byte7W::new(self, 8) } } -#[doc = "CAN Frame Data Word 3\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data3_cmb7](index.html) module"] -pub struct DATA3_CMB7_SPEC; -impl crate::RegisterSpec for DATA3_CMB7_SPEC { +#[doc = "CAN Frame Data Word 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data3_cmb7::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data3_cmb7::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Data3Cmb7Spec; +impl crate::RegisterSpec for Data3Cmb7Spec { type Ux = u32; } -#[doc = "`read()` method returns [data3_cmb7::R](R) reader structure"] -impl crate::Readable for DATA3_CMB7_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [data3_cmb7::W](W) writer structure"] -impl crate::Writable for DATA3_CMB7_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`data3_cmb7::R`](R) reader structure"] +impl crate::Readable for Data3Cmb7Spec {} +#[doc = "`write(|w| ..)` method takes [`data3_cmb7::W`](W) writer structure"] +impl crate::Writable for Data3Cmb7Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA3_CMB7 to value 0"] -impl crate::Resettable for DATA3_CMB7_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Data3Cmb7Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/data3_cmb8.rs b/va416xx/src/can0/data3_cmb8.rs index 7fa6220..c2e0ecc 100644 --- a/va416xx/src/can0/data3_cmb8.rs +++ b/va416xx/src/can0/data3_cmb8.rs @@ -1,140 +1,55 @@ #[doc = "Register `DATA3_CMB8` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DATA3_CMB8` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `BYTE7` reader - Data Byte 7"] -pub struct BYTE7_R(crate::FieldReader); -impl BYTE7_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE7_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE7_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `BYTE7` writer - Data Byte 7"] -pub struct BYTE7_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE7_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0xff << 8)) | ((value as u32 & 0xff) << 8); - self.w - } -} +pub type W = crate::W; #[doc = "Field `BYTE8` reader - Data Byte 8"] -pub struct BYTE8_R(crate::FieldReader); -impl BYTE8_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE8_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE8_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Byte8R = crate::FieldReader; #[doc = "Field `BYTE8` writer - Data Byte 8"] -pub struct BYTE8_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE8_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type Byte8W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +#[doc = "Field `BYTE7` reader - Data Byte 7"] +pub type Byte7R = crate::FieldReader; +#[doc = "Field `BYTE7` writer - Data Byte 7"] +pub type Byte7W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { - #[doc = "Bits 8:15 - Data Byte 7"] - #[inline(always)] - pub fn byte7(&self) -> BYTE7_R { - BYTE7_R::new(((self.bits >> 8) & 0xff) as u8) - } #[doc = "Bits 0:7 - Data Byte 8"] #[inline(always)] - pub fn byte8(&self) -> BYTE8_R { - BYTE8_R::new((self.bits & 0xff) as u8) + pub fn byte8(&self) -> Byte8R { + Byte8R::new((self.bits & 0xff) as u8) + } + #[doc = "Bits 8:15 - Data Byte 7"] + #[inline(always)] + pub fn byte7(&self) -> Byte7R { + Byte7R::new(((self.bits >> 8) & 0xff) as u8) } } impl W { - #[doc = "Bits 8:15 - Data Byte 7"] - #[inline(always)] - pub fn byte7(&mut self) -> BYTE7_W { - BYTE7_W { w: self } - } #[doc = "Bits 0:7 - Data Byte 8"] #[inline(always)] - pub fn byte8(&mut self) -> BYTE8_W { - BYTE8_W { w: self } + #[must_use] + pub fn byte8(&mut self) -> Byte8W { + Byte8W::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 8:15 - Data Byte 7"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn byte7(&mut self) -> Byte7W { + Byte7W::new(self, 8) } } -#[doc = "CAN Frame Data Word 3\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data3_cmb8](index.html) module"] -pub struct DATA3_CMB8_SPEC; -impl crate::RegisterSpec for DATA3_CMB8_SPEC { +#[doc = "CAN Frame Data Word 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data3_cmb8::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data3_cmb8::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Data3Cmb8Spec; +impl crate::RegisterSpec for Data3Cmb8Spec { type Ux = u32; } -#[doc = "`read()` method returns [data3_cmb8::R](R) reader structure"] -impl crate::Readable for DATA3_CMB8_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [data3_cmb8::W](W) writer structure"] -impl crate::Writable for DATA3_CMB8_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`data3_cmb8::R`](R) reader structure"] +impl crate::Readable for Data3Cmb8Spec {} +#[doc = "`write(|w| ..)` method takes [`data3_cmb8::W`](W) writer structure"] +impl crate::Writable for Data3Cmb8Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA3_CMB8 to value 0"] -impl crate::Resettable for DATA3_CMB8_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Data3Cmb8Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/data3_cmb9.rs b/va416xx/src/can0/data3_cmb9.rs index 27605b6..716ae39 100644 --- a/va416xx/src/can0/data3_cmb9.rs +++ b/va416xx/src/can0/data3_cmb9.rs @@ -1,140 +1,55 @@ #[doc = "Register `DATA3_CMB9` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DATA3_CMB9` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `BYTE7` reader - Data Byte 7"] -pub struct BYTE7_R(crate::FieldReader); -impl BYTE7_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE7_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE7_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `BYTE7` writer - Data Byte 7"] -pub struct BYTE7_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE7_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0xff << 8)) | ((value as u32 & 0xff) << 8); - self.w - } -} +pub type W = crate::W; #[doc = "Field `BYTE8` reader - Data Byte 8"] -pub struct BYTE8_R(crate::FieldReader); -impl BYTE8_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE8_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE8_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Byte8R = crate::FieldReader; #[doc = "Field `BYTE8` writer - Data Byte 8"] -pub struct BYTE8_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE8_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type Byte8W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +#[doc = "Field `BYTE7` reader - Data Byte 7"] +pub type Byte7R = crate::FieldReader; +#[doc = "Field `BYTE7` writer - Data Byte 7"] +pub type Byte7W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { - #[doc = "Bits 8:15 - Data Byte 7"] - #[inline(always)] - pub fn byte7(&self) -> BYTE7_R { - BYTE7_R::new(((self.bits >> 8) & 0xff) as u8) - } #[doc = "Bits 0:7 - Data Byte 8"] #[inline(always)] - pub fn byte8(&self) -> BYTE8_R { - BYTE8_R::new((self.bits & 0xff) as u8) + pub fn byte8(&self) -> Byte8R { + Byte8R::new((self.bits & 0xff) as u8) + } + #[doc = "Bits 8:15 - Data Byte 7"] + #[inline(always)] + pub fn byte7(&self) -> Byte7R { + Byte7R::new(((self.bits >> 8) & 0xff) as u8) } } impl W { - #[doc = "Bits 8:15 - Data Byte 7"] - #[inline(always)] - pub fn byte7(&mut self) -> BYTE7_W { - BYTE7_W { w: self } - } #[doc = "Bits 0:7 - Data Byte 8"] #[inline(always)] - pub fn byte8(&mut self) -> BYTE8_W { - BYTE8_W { w: self } + #[must_use] + pub fn byte8(&mut self) -> Byte8W { + Byte8W::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 8:15 - Data Byte 7"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn byte7(&mut self) -> Byte7W { + Byte7W::new(self, 8) } } -#[doc = "CAN Frame Data Word 3\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data3_cmb9](index.html) module"] -pub struct DATA3_CMB9_SPEC; -impl crate::RegisterSpec for DATA3_CMB9_SPEC { +#[doc = "CAN Frame Data Word 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data3_cmb9::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data3_cmb9::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Data3Cmb9Spec; +impl crate::RegisterSpec for Data3Cmb9Spec { type Ux = u32; } -#[doc = "`read()` method returns [data3_cmb9::R](R) reader structure"] -impl crate::Readable for DATA3_CMB9_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [data3_cmb9::W](W) writer structure"] -impl crate::Writable for DATA3_CMB9_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`data3_cmb9::R`](R) reader structure"] +impl crate::Readable for Data3Cmb9Spec {} +#[doc = "`write(|w| ..)` method takes [`data3_cmb9::W`](W) writer structure"] +impl crate::Writable for Data3Cmb9Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA3_CMB9 to value 0"] -impl crate::Resettable for DATA3_CMB9_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Data3Cmb9Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/data3_hcmb.rs b/va416xx/src/can0/data3_hcmb.rs index 34f5f5c..856e651 100644 --- a/va416xx/src/can0/data3_hcmb.rs +++ b/va416xx/src/can0/data3_hcmb.rs @@ -1,140 +1,55 @@ #[doc = "Register `DATA3_HCMB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DATA3_HCMB` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `BYTE7` reader - Data Byte 7"] -pub struct BYTE7_R(crate::FieldReader); -impl BYTE7_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE7_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE7_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `BYTE7` writer - Data Byte 7"] -pub struct BYTE7_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE7_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0xff << 8)) | ((value as u32 & 0xff) << 8); - self.w - } -} +pub type W = crate::W; #[doc = "Field `BYTE8` reader - Data Byte 8"] -pub struct BYTE8_R(crate::FieldReader); -impl BYTE8_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BYTE8_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BYTE8_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Byte8R = crate::FieldReader; #[doc = "Field `BYTE8` writer - Data Byte 8"] -pub struct BYTE8_W<'a> { - w: &'a mut W, -} -impl<'a> BYTE8_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type Byte8W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +#[doc = "Field `BYTE7` reader - Data Byte 7"] +pub type Byte7R = crate::FieldReader; +#[doc = "Field `BYTE7` writer - Data Byte 7"] +pub type Byte7W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { - #[doc = "Bits 8:15 - Data Byte 7"] - #[inline(always)] - pub fn byte7(&self) -> BYTE7_R { - BYTE7_R::new(((self.bits >> 8) & 0xff) as u8) - } #[doc = "Bits 0:7 - Data Byte 8"] #[inline(always)] - pub fn byte8(&self) -> BYTE8_R { - BYTE8_R::new((self.bits & 0xff) as u8) + pub fn byte8(&self) -> Byte8R { + Byte8R::new((self.bits & 0xff) as u8) + } + #[doc = "Bits 8:15 - Data Byte 7"] + #[inline(always)] + pub fn byte7(&self) -> Byte7R { + Byte7R::new(((self.bits >> 8) & 0xff) as u8) } } impl W { - #[doc = "Bits 8:15 - Data Byte 7"] - #[inline(always)] - pub fn byte7(&mut self) -> BYTE7_W { - BYTE7_W { w: self } - } #[doc = "Bits 0:7 - Data Byte 8"] #[inline(always)] - pub fn byte8(&mut self) -> BYTE8_W { - BYTE8_W { w: self } + #[must_use] + pub fn byte8(&mut self) -> Byte8W { + Byte8W::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 8:15 - Data Byte 7"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn byte7(&mut self) -> Byte7W { + Byte7W::new(self, 8) } } -#[doc = "CAN Frame Data Word 3\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data3_hcmb](index.html) module"] -pub struct DATA3_HCMB_SPEC; -impl crate::RegisterSpec for DATA3_HCMB_SPEC { +#[doc = "CAN Frame Data Word 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data3_hcmb::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data3_hcmb::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Data3HcmbSpec; +impl crate::RegisterSpec for Data3HcmbSpec { type Ux = u32; } -#[doc = "`read()` method returns [data3_hcmb::R](R) reader structure"] -impl crate::Readable for DATA3_HCMB_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [data3_hcmb::W](W) writer structure"] -impl crate::Writable for DATA3_HCMB_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`data3_hcmb::R`](R) reader structure"] +impl crate::Readable for Data3HcmbSpec {} +#[doc = "`write(|w| ..)` method takes [`data3_hcmb::W`](W) writer structure"] +impl crate::Writable for Data3HcmbSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA3_HCMB to value 0"] -impl crate::Resettable for DATA3_HCMB_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Data3HcmbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/gmskb.rs b/va416xx/src/can0/gmskb.rs index f1b4b3b..aa511c5 100644 --- a/va416xx/src/can0/gmskb.rs +++ b/va416xx/src/can0/gmskb.rs @@ -1,254 +1,105 @@ #[doc = "Register `GMSKB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `GMSKB` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; +#[doc = "Field `GM0` reader - GM\\[17:15\\] +- Unused in standard, ID\\[17:15\\] +in extended"] +pub type Gm0R = crate::FieldReader; +#[doc = "Field `GM0` writer - GM\\[17:15\\] +- Unused in standard, ID\\[17:15\\] +in extended"] +pub type Gm0W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +#[doc = "Field `IDE` reader - Identifier Extension Bit"] +pub type IdeR = crate::BitReader; +#[doc = "Field `IDE` writer - Identifier Extension Bit"] +pub type IdeW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `RTR` reader - Remote Transmission Request in Standard, Substitute Remote Request (SRR) in extended"] +pub type RtrR = crate::BitReader; +#[doc = "Field `RTR` writer - Remote Transmission Request in Standard, Substitute Remote Request (SRR) in extended"] +pub type RtrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `GM1` reader - GM\\[28:18\\] - ID\\[10:0\\] in standard, ID\\[28:18\\] in extended"] -pub struct GM1_R(crate::FieldReader); -impl GM1_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - GM1_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for GM1_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Gm1R = crate::FieldReader; #[doc = "Field `GM1` writer - GM\\[28:18\\] - ID\\[10:0\\] in standard, ID\\[28:18\\] in extended"] -pub struct GM1_W<'a> { - w: &'a mut W, -} -impl<'a> GM1_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x07ff << 5)) | ((value as u32 & 0x07ff) << 5); - self.w - } -} -#[doc = "Field `RTR` reader - Remote Transmission Request in Standard, Substitute Remote Request (SRR) in extended"] -pub struct RTR_R(crate::FieldReader); -impl RTR_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RTR_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RTR_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RTR` writer - Remote Transmission Request in Standard, Substitute Remote Request (SRR) in extended"] -pub struct RTR_W<'a> { - w: &'a mut W, -} -impl<'a> RTR_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); - self.w - } -} -#[doc = "Field `IDE` reader - Identifier Extension Bit"] -pub struct IDE_R(crate::FieldReader); -impl IDE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - IDE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for IDE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `IDE` writer - Identifier Extension Bit"] -pub struct IDE_W<'a> { - w: &'a mut W, -} -impl<'a> IDE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); - self.w - } -} -#[doc = "Field `GM0` reader - GM\\[17:15\\] -- Unused in standard, ID\\[17:15\\] -in extended"] -pub struct GM0_R(crate::FieldReader); -impl GM0_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - GM0_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for GM0_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `GM0` writer - GM\\[17:15\\] -- Unused in standard, ID\\[17:15\\] -in extended"] -pub struct GM0_W<'a> { - w: &'a mut W, -} -impl<'a> GM0_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0x07) | (value as u32 & 0x07); - self.w - } -} +pub type Gm1W<'a, REG> = crate::FieldWriter<'a, REG, 11, u16>; impl R { + #[doc = "Bits 0:2 - GM\\[17:15\\] +- Unused in standard, ID\\[17:15\\] +in extended"] + #[inline(always)] + pub fn gm0(&self) -> Gm0R { + Gm0R::new((self.bits & 7) as u8) + } + #[doc = "Bit 3 - Identifier Extension Bit"] + #[inline(always)] + pub fn ide(&self) -> IdeR { + IdeR::new(((self.bits >> 3) & 1) != 0) + } + #[doc = "Bit 4 - Remote Transmission Request in Standard, Substitute Remote Request (SRR) in extended"] + #[inline(always)] + pub fn rtr(&self) -> RtrR { + RtrR::new(((self.bits >> 4) & 1) != 0) + } #[doc = "Bits 5:15 - GM\\[28:18\\] - ID\\[10:0\\] in standard, ID\\[28:18\\] in extended"] #[inline(always)] - pub fn gm1(&self) -> GM1_R { - GM1_R::new(((self.bits >> 5) & 0x07ff) as u16) - } - #[doc = "Bit 4 - Remote Transmission Request in Standard, Substitute Remote Request (SRR) in extended"] - #[inline(always)] - pub fn rtr(&self) -> RTR_R { - RTR_R::new(((self.bits >> 4) & 0x01) != 0) - } - #[doc = "Bit 3 - Identifier Extension Bit"] - #[inline(always)] - pub fn ide(&self) -> IDE_R { - IDE_R::new(((self.bits >> 3) & 0x01) != 0) - } - #[doc = "Bits 0:2 - GM\\[17:15\\] -- Unused in standard, ID\\[17:15\\] -in extended"] - #[inline(always)] - pub fn gm0(&self) -> GM0_R { - GM0_R::new((self.bits & 0x07) as u8) + pub fn gm1(&self) -> Gm1R { + Gm1R::new(((self.bits >> 5) & 0x07ff) as u16) } } impl W { + #[doc = "Bits 0:2 - GM\\[17:15\\] +- Unused in standard, ID\\[17:15\\] +in extended"] + #[inline(always)] + #[must_use] + pub fn gm0(&mut self) -> Gm0W { + Gm0W::new(self, 0) + } + #[doc = "Bit 3 - Identifier Extension Bit"] + #[inline(always)] + #[must_use] + pub fn ide(&mut self) -> IdeW { + IdeW::new(self, 3) + } + #[doc = "Bit 4 - Remote Transmission Request in Standard, Substitute Remote Request (SRR) in extended"] + #[inline(always)] + #[must_use] + pub fn rtr(&mut self) -> RtrW { + RtrW::new(self, 4) + } #[doc = "Bits 5:15 - GM\\[28:18\\] - ID\\[10:0\\] in standard, ID\\[28:18\\] in extended"] #[inline(always)] - pub fn gm1(&mut self) -> GM1_W { - GM1_W { w: self } - } - #[doc = "Bit 4 - Remote Transmission Request in Standard, Substitute Remote Request (SRR) in extended"] - #[inline(always)] - pub fn rtr(&mut self) -> RTR_W { - RTR_W { w: self } - } - #[doc = "Bit 3 - Identifier Extension Bit"] - #[inline(always)] - pub fn ide(&mut self) -> IDE_W { - IDE_W { w: self } - } - #[doc = "Bits 0:2 - GM\\[17:15\\] -- Unused in standard, ID\\[17:15\\] -in extended"] - #[inline(always)] - pub fn gm0(&mut self) -> GM0_W { - GM0_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn gm1(&mut self) -> Gm1W { + Gm1W::new(self, 5) } } -#[doc = "CAN Global Mask Base\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [gmskb](index.html) module"] -pub struct GMSKB_SPEC; -impl crate::RegisterSpec for GMSKB_SPEC { +#[doc = "CAN Global Mask Base\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gmskb::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gmskb::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct GmskbSpec; +impl crate::RegisterSpec for GmskbSpec { type Ux = u32; } -#[doc = "`read()` method returns [gmskb::R](R) reader structure"] -impl crate::Readable for GMSKB_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [gmskb::W](W) writer structure"] -impl crate::Writable for GMSKB_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`gmskb::R`](R) reader structure"] +impl crate::Readable for GmskbSpec {} +#[doc = "`write(|w| ..)` method takes [`gmskb::W`](W) writer structure"] +impl crate::Writable for GmskbSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GMSKB to value 0"] -impl crate::Resettable for GMSKB_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for GmskbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/gmskx.rs b/va416xx/src/can0/gmskx.rs index e3934dd..073346a 100644 --- a/va416xx/src/can0/gmskx.rs +++ b/va416xx/src/can0/gmskx.rs @@ -1,158 +1,63 @@ #[doc = "Register `GMSKX` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `GMSKX` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; +#[doc = "Field `XRTR` reader - Extended Remote transmission Request Bit"] +pub type XrtrR = crate::BitReader; +#[doc = "Field `XRTR` writer - Extended Remote transmission Request Bit"] +pub type XrtrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `GM` reader - GM\\[14:0\\] used when an extended frame is received. ID\\[14:0\\] in extended, unused standard"] -pub struct GM_R(crate::FieldReader); -impl GM_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - GM_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for GM_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type GmR = crate::FieldReader; #[doc = "Field `GM` writer - GM\\[14:0\\] used when an extended frame is received. ID\\[14:0\\] in extended, unused standard"] -pub struct GM_W<'a> { - w: &'a mut W, -} -impl<'a> GM_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x7fff << 1)) | ((value as u32 & 0x7fff) << 1); - self.w - } -} -#[doc = "Field `XRTR` reader - Extended Remote transmission Request Bit"] -pub struct XRTR_R(crate::FieldReader); -impl XRTR_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - XRTR_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for XRTR_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `XRTR` writer - Extended Remote transmission Request Bit"] -pub struct XRTR_W<'a> { - w: &'a mut W, -} -impl<'a> XRTR_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} +pub type GmW<'a, REG> = crate::FieldWriter<'a, REG, 15, u16>; impl R { + #[doc = "Bit 0 - Extended Remote transmission Request Bit"] + #[inline(always)] + pub fn xrtr(&self) -> XrtrR { + XrtrR::new((self.bits & 1) != 0) + } #[doc = "Bits 1:15 - GM\\[14:0\\] used when an extended frame is received. ID\\[14:0\\] in extended, unused standard"] #[inline(always)] - pub fn gm(&self) -> GM_R { - GM_R::new(((self.bits >> 1) & 0x7fff) as u16) - } - #[doc = "Bit 0 - Extended Remote transmission Request Bit"] - #[inline(always)] - pub fn xrtr(&self) -> XRTR_R { - XRTR_R::new((self.bits & 0x01) != 0) + pub fn gm(&self) -> GmR { + GmR::new(((self.bits >> 1) & 0x7fff) as u16) } } impl W { + #[doc = "Bit 0 - Extended Remote transmission Request Bit"] + #[inline(always)] + #[must_use] + pub fn xrtr(&mut self) -> XrtrW { + XrtrW::new(self, 0) + } #[doc = "Bits 1:15 - GM\\[14:0\\] used when an extended frame is received. ID\\[14:0\\] in extended, unused standard"] #[inline(always)] - pub fn gm(&mut self) -> GM_W { - GM_W { w: self } - } - #[doc = "Bit 0 - Extended Remote transmission Request Bit"] - #[inline(always)] - pub fn xrtr(&mut self) -> XRTR_W { - XRTR_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn gm(&mut self) -> GmW { + GmW::new(self, 1) } } -#[doc = "CAN Global Mask Extension\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [gmskx](index.html) module"] -pub struct GMSKX_SPEC; -impl crate::RegisterSpec for GMSKX_SPEC { +#[doc = "CAN Global Mask Extension\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gmskx::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gmskx::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct GmskxSpec; +impl crate::RegisterSpec for GmskxSpec { type Ux = u32; } -#[doc = "`read()` method returns [gmskx::R](R) reader structure"] -impl crate::Readable for GMSKX_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [gmskx::W](W) writer structure"] -impl crate::Writable for GMSKX_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`gmskx::R`](R) reader structure"] +impl crate::Readable for GmskxSpec {} +#[doc = "`write(|w| ..)` method takes [`gmskx::W`](W) writer structure"] +impl crate::Writable for GmskxSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GMSKX to value 0"] -impl crate::Resettable for GMSKX_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for GmskxSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/id0_cmb0.rs b/va416xx/src/can0/id0_cmb0.rs index bb437fa..23d87ab 100644 --- a/va416xx/src/can0/id0_cmb0.rs +++ b/va416xx/src/can0/id0_cmb0.rs @@ -1,103 +1,40 @@ #[doc = "Register `ID0_CMB0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ID0_CMB0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `ID0` reader - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] -pub struct ID0_R(crate::FieldReader); -impl ID0_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - ID0_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ID0_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Id0R = crate::FieldReader; #[doc = "Field `ID0` writer - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] -pub struct ID0_W<'a> { - w: &'a mut W, -} -impl<'a> ID0_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); - self.w - } -} +pub type Id0W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id0(&self) -> ID0_R { - ID0_R::new((self.bits & 0xffff) as u16) + pub fn id0(&self) -> Id0R { + Id0R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id0(&mut self) -> ID0_W { - ID0_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn id0(&mut self) -> Id0W { + Id0W::new(self, 0) } } -#[doc = "CAN Frame Identifier Word 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [id0_cmb0](index.html) module"] -pub struct ID0_CMB0_SPEC; -impl crate::RegisterSpec for ID0_CMB0_SPEC { +#[doc = "CAN Frame Identifier Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id0_cmb0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id0_cmb0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Id0Cmb0Spec; +impl crate::RegisterSpec for Id0Cmb0Spec { type Ux = u32; } -#[doc = "`read()` method returns [id0_cmb0::R](R) reader structure"] -impl crate::Readable for ID0_CMB0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [id0_cmb0::W](W) writer structure"] -impl crate::Writable for ID0_CMB0_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`id0_cmb0::R`](R) reader structure"] +impl crate::Readable for Id0Cmb0Spec {} +#[doc = "`write(|w| ..)` method takes [`id0_cmb0::W`](W) writer structure"] +impl crate::Writable for Id0Cmb0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ID0_CMB0 to value 0"] -impl crate::Resettable for ID0_CMB0_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Id0Cmb0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/id0_cmb1.rs b/va416xx/src/can0/id0_cmb1.rs index 62d07b6..5cc65f9 100644 --- a/va416xx/src/can0/id0_cmb1.rs +++ b/va416xx/src/can0/id0_cmb1.rs @@ -1,103 +1,40 @@ #[doc = "Register `ID0_CMB1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ID0_CMB1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `ID0` reader - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] -pub struct ID0_R(crate::FieldReader); -impl ID0_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - ID0_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ID0_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Id0R = crate::FieldReader; #[doc = "Field `ID0` writer - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] -pub struct ID0_W<'a> { - w: &'a mut W, -} -impl<'a> ID0_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); - self.w - } -} +pub type Id0W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id0(&self) -> ID0_R { - ID0_R::new((self.bits & 0xffff) as u16) + pub fn id0(&self) -> Id0R { + Id0R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id0(&mut self) -> ID0_W { - ID0_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn id0(&mut self) -> Id0W { + Id0W::new(self, 0) } } -#[doc = "CAN Frame Identifier Word 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [id0_cmb1](index.html) module"] -pub struct ID0_CMB1_SPEC; -impl crate::RegisterSpec for ID0_CMB1_SPEC { +#[doc = "CAN Frame Identifier Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id0_cmb1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id0_cmb1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Id0Cmb1Spec; +impl crate::RegisterSpec for Id0Cmb1Spec { type Ux = u32; } -#[doc = "`read()` method returns [id0_cmb1::R](R) reader structure"] -impl crate::Readable for ID0_CMB1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [id0_cmb1::W](W) writer structure"] -impl crate::Writable for ID0_CMB1_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`id0_cmb1::R`](R) reader structure"] +impl crate::Readable for Id0Cmb1Spec {} +#[doc = "`write(|w| ..)` method takes [`id0_cmb1::W`](W) writer structure"] +impl crate::Writable for Id0Cmb1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ID0_CMB1 to value 0"] -impl crate::Resettable for ID0_CMB1_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Id0Cmb1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/id0_cmb10.rs b/va416xx/src/can0/id0_cmb10.rs index 62d1a50..b62d30a 100644 --- a/va416xx/src/can0/id0_cmb10.rs +++ b/va416xx/src/can0/id0_cmb10.rs @@ -1,103 +1,40 @@ #[doc = "Register `ID0_CMB10` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ID0_CMB10` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `ID0` reader - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] -pub struct ID0_R(crate::FieldReader); -impl ID0_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - ID0_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ID0_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Id0R = crate::FieldReader; #[doc = "Field `ID0` writer - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] -pub struct ID0_W<'a> { - w: &'a mut W, -} -impl<'a> ID0_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); - self.w - } -} +pub type Id0W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id0(&self) -> ID0_R { - ID0_R::new((self.bits & 0xffff) as u16) + pub fn id0(&self) -> Id0R { + Id0R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id0(&mut self) -> ID0_W { - ID0_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn id0(&mut self) -> Id0W { + Id0W::new(self, 0) } } -#[doc = "CAN Frame Identifier Word 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [id0_cmb10](index.html) module"] -pub struct ID0_CMB10_SPEC; -impl crate::RegisterSpec for ID0_CMB10_SPEC { +#[doc = "CAN Frame Identifier Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id0_cmb10::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id0_cmb10::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Id0Cmb10Spec; +impl crate::RegisterSpec for Id0Cmb10Spec { type Ux = u32; } -#[doc = "`read()` method returns [id0_cmb10::R](R) reader structure"] -impl crate::Readable for ID0_CMB10_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [id0_cmb10::W](W) writer structure"] -impl crate::Writable for ID0_CMB10_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`id0_cmb10::R`](R) reader structure"] +impl crate::Readable for Id0Cmb10Spec {} +#[doc = "`write(|w| ..)` method takes [`id0_cmb10::W`](W) writer structure"] +impl crate::Writable for Id0Cmb10Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ID0_CMB10 to value 0"] -impl crate::Resettable for ID0_CMB10_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Id0Cmb10Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/id0_cmb11.rs b/va416xx/src/can0/id0_cmb11.rs index 9f9b2b1..4f27d5a 100644 --- a/va416xx/src/can0/id0_cmb11.rs +++ b/va416xx/src/can0/id0_cmb11.rs @@ -1,103 +1,40 @@ #[doc = "Register `ID0_CMB11` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ID0_CMB11` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `ID0` reader - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] -pub struct ID0_R(crate::FieldReader); -impl ID0_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - ID0_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ID0_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Id0R = crate::FieldReader; #[doc = "Field `ID0` writer - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] -pub struct ID0_W<'a> { - w: &'a mut W, -} -impl<'a> ID0_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); - self.w - } -} +pub type Id0W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id0(&self) -> ID0_R { - ID0_R::new((self.bits & 0xffff) as u16) + pub fn id0(&self) -> Id0R { + Id0R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id0(&mut self) -> ID0_W { - ID0_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn id0(&mut self) -> Id0W { + Id0W::new(self, 0) } } -#[doc = "CAN Frame Identifier Word 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [id0_cmb11](index.html) module"] -pub struct ID0_CMB11_SPEC; -impl crate::RegisterSpec for ID0_CMB11_SPEC { +#[doc = "CAN Frame Identifier Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id0_cmb11::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id0_cmb11::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Id0Cmb11Spec; +impl crate::RegisterSpec for Id0Cmb11Spec { type Ux = u32; } -#[doc = "`read()` method returns [id0_cmb11::R](R) reader structure"] -impl crate::Readable for ID0_CMB11_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [id0_cmb11::W](W) writer structure"] -impl crate::Writable for ID0_CMB11_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`id0_cmb11::R`](R) reader structure"] +impl crate::Readable for Id0Cmb11Spec {} +#[doc = "`write(|w| ..)` method takes [`id0_cmb11::W`](W) writer structure"] +impl crate::Writable for Id0Cmb11Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ID0_CMB11 to value 0"] -impl crate::Resettable for ID0_CMB11_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Id0Cmb11Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/id0_cmb12.rs b/va416xx/src/can0/id0_cmb12.rs index b99fde3..af7eeee 100644 --- a/va416xx/src/can0/id0_cmb12.rs +++ b/va416xx/src/can0/id0_cmb12.rs @@ -1,103 +1,40 @@ #[doc = "Register `ID0_CMB12` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ID0_CMB12` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `ID0` reader - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] -pub struct ID0_R(crate::FieldReader); -impl ID0_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - ID0_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ID0_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Id0R = crate::FieldReader; #[doc = "Field `ID0` writer - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] -pub struct ID0_W<'a> { - w: &'a mut W, -} -impl<'a> ID0_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); - self.w - } -} +pub type Id0W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id0(&self) -> ID0_R { - ID0_R::new((self.bits & 0xffff) as u16) + pub fn id0(&self) -> Id0R { + Id0R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id0(&mut self) -> ID0_W { - ID0_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn id0(&mut self) -> Id0W { + Id0W::new(self, 0) } } -#[doc = "CAN Frame Identifier Word 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [id0_cmb12](index.html) module"] -pub struct ID0_CMB12_SPEC; -impl crate::RegisterSpec for ID0_CMB12_SPEC { +#[doc = "CAN Frame Identifier Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id0_cmb12::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id0_cmb12::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Id0Cmb12Spec; +impl crate::RegisterSpec for Id0Cmb12Spec { type Ux = u32; } -#[doc = "`read()` method returns [id0_cmb12::R](R) reader structure"] -impl crate::Readable for ID0_CMB12_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [id0_cmb12::W](W) writer structure"] -impl crate::Writable for ID0_CMB12_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`id0_cmb12::R`](R) reader structure"] +impl crate::Readable for Id0Cmb12Spec {} +#[doc = "`write(|w| ..)` method takes [`id0_cmb12::W`](W) writer structure"] +impl crate::Writable for Id0Cmb12Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ID0_CMB12 to value 0"] -impl crate::Resettable for ID0_CMB12_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Id0Cmb12Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/id0_cmb13.rs b/va416xx/src/can0/id0_cmb13.rs index 2a6c634..5d01253 100644 --- a/va416xx/src/can0/id0_cmb13.rs +++ b/va416xx/src/can0/id0_cmb13.rs @@ -1,103 +1,40 @@ #[doc = "Register `ID0_CMB13` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ID0_CMB13` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `ID0` reader - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] -pub struct ID0_R(crate::FieldReader); -impl ID0_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - ID0_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ID0_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Id0R = crate::FieldReader; #[doc = "Field `ID0` writer - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] -pub struct ID0_W<'a> { - w: &'a mut W, -} -impl<'a> ID0_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); - self.w - } -} +pub type Id0W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id0(&self) -> ID0_R { - ID0_R::new((self.bits & 0xffff) as u16) + pub fn id0(&self) -> Id0R { + Id0R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id0(&mut self) -> ID0_W { - ID0_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn id0(&mut self) -> Id0W { + Id0W::new(self, 0) } } -#[doc = "CAN Frame Identifier Word 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [id0_cmb13](index.html) module"] -pub struct ID0_CMB13_SPEC; -impl crate::RegisterSpec for ID0_CMB13_SPEC { +#[doc = "CAN Frame Identifier Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id0_cmb13::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id0_cmb13::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Id0Cmb13Spec; +impl crate::RegisterSpec for Id0Cmb13Spec { type Ux = u32; } -#[doc = "`read()` method returns [id0_cmb13::R](R) reader structure"] -impl crate::Readable for ID0_CMB13_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [id0_cmb13::W](W) writer structure"] -impl crate::Writable for ID0_CMB13_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`id0_cmb13::R`](R) reader structure"] +impl crate::Readable for Id0Cmb13Spec {} +#[doc = "`write(|w| ..)` method takes [`id0_cmb13::W`](W) writer structure"] +impl crate::Writable for Id0Cmb13Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ID0_CMB13 to value 0"] -impl crate::Resettable for ID0_CMB13_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Id0Cmb13Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/id0_cmb14.rs b/va416xx/src/can0/id0_cmb14.rs index f89f538..e9a71e1 100644 --- a/va416xx/src/can0/id0_cmb14.rs +++ b/va416xx/src/can0/id0_cmb14.rs @@ -1,103 +1,40 @@ #[doc = "Register `ID0_CMB14` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ID0_CMB14` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `ID0` reader - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] -pub struct ID0_R(crate::FieldReader); -impl ID0_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - ID0_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ID0_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Id0R = crate::FieldReader; #[doc = "Field `ID0` writer - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] -pub struct ID0_W<'a> { - w: &'a mut W, -} -impl<'a> ID0_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); - self.w - } -} +pub type Id0W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id0(&self) -> ID0_R { - ID0_R::new((self.bits & 0xffff) as u16) + pub fn id0(&self) -> Id0R { + Id0R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id0(&mut self) -> ID0_W { - ID0_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn id0(&mut self) -> Id0W { + Id0W::new(self, 0) } } -#[doc = "CAN Frame Identifier Word 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [id0_cmb14](index.html) module"] -pub struct ID0_CMB14_SPEC; -impl crate::RegisterSpec for ID0_CMB14_SPEC { +#[doc = "CAN Frame Identifier Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id0_cmb14::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id0_cmb14::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Id0Cmb14Spec; +impl crate::RegisterSpec for Id0Cmb14Spec { type Ux = u32; } -#[doc = "`read()` method returns [id0_cmb14::R](R) reader structure"] -impl crate::Readable for ID0_CMB14_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [id0_cmb14::W](W) writer structure"] -impl crate::Writable for ID0_CMB14_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`id0_cmb14::R`](R) reader structure"] +impl crate::Readable for Id0Cmb14Spec {} +#[doc = "`write(|w| ..)` method takes [`id0_cmb14::W`](W) writer structure"] +impl crate::Writable for Id0Cmb14Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ID0_CMB14 to value 0"] -impl crate::Resettable for ID0_CMB14_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Id0Cmb14Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/id0_cmb2.rs b/va416xx/src/can0/id0_cmb2.rs index 9099d00..0ed74fe 100644 --- a/va416xx/src/can0/id0_cmb2.rs +++ b/va416xx/src/can0/id0_cmb2.rs @@ -1,103 +1,40 @@ #[doc = "Register `ID0_CMB2` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ID0_CMB2` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `ID0` reader - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] -pub struct ID0_R(crate::FieldReader); -impl ID0_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - ID0_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ID0_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Id0R = crate::FieldReader; #[doc = "Field `ID0` writer - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] -pub struct ID0_W<'a> { - w: &'a mut W, -} -impl<'a> ID0_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); - self.w - } -} +pub type Id0W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id0(&self) -> ID0_R { - ID0_R::new((self.bits & 0xffff) as u16) + pub fn id0(&self) -> Id0R { + Id0R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id0(&mut self) -> ID0_W { - ID0_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn id0(&mut self) -> Id0W { + Id0W::new(self, 0) } } -#[doc = "CAN Frame Identifier Word 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [id0_cmb2](index.html) module"] -pub struct ID0_CMB2_SPEC; -impl crate::RegisterSpec for ID0_CMB2_SPEC { +#[doc = "CAN Frame Identifier Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id0_cmb2::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id0_cmb2::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Id0Cmb2Spec; +impl crate::RegisterSpec for Id0Cmb2Spec { type Ux = u32; } -#[doc = "`read()` method returns [id0_cmb2::R](R) reader structure"] -impl crate::Readable for ID0_CMB2_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [id0_cmb2::W](W) writer structure"] -impl crate::Writable for ID0_CMB2_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`id0_cmb2::R`](R) reader structure"] +impl crate::Readable for Id0Cmb2Spec {} +#[doc = "`write(|w| ..)` method takes [`id0_cmb2::W`](W) writer structure"] +impl crate::Writable for Id0Cmb2Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ID0_CMB2 to value 0"] -impl crate::Resettable for ID0_CMB2_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Id0Cmb2Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/id0_cmb3.rs b/va416xx/src/can0/id0_cmb3.rs index e1996c3..ac8a485 100644 --- a/va416xx/src/can0/id0_cmb3.rs +++ b/va416xx/src/can0/id0_cmb3.rs @@ -1,103 +1,40 @@ #[doc = "Register `ID0_CMB3` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ID0_CMB3` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `ID0` reader - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] -pub struct ID0_R(crate::FieldReader); -impl ID0_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - ID0_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ID0_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Id0R = crate::FieldReader; #[doc = "Field `ID0` writer - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] -pub struct ID0_W<'a> { - w: &'a mut W, -} -impl<'a> ID0_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); - self.w - } -} +pub type Id0W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id0(&self) -> ID0_R { - ID0_R::new((self.bits & 0xffff) as u16) + pub fn id0(&self) -> Id0R { + Id0R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id0(&mut self) -> ID0_W { - ID0_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn id0(&mut self) -> Id0W { + Id0W::new(self, 0) } } -#[doc = "CAN Frame Identifier Word 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [id0_cmb3](index.html) module"] -pub struct ID0_CMB3_SPEC; -impl crate::RegisterSpec for ID0_CMB3_SPEC { +#[doc = "CAN Frame Identifier Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id0_cmb3::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id0_cmb3::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Id0Cmb3Spec; +impl crate::RegisterSpec for Id0Cmb3Spec { type Ux = u32; } -#[doc = "`read()` method returns [id0_cmb3::R](R) reader structure"] -impl crate::Readable for ID0_CMB3_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [id0_cmb3::W](W) writer structure"] -impl crate::Writable for ID0_CMB3_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`id0_cmb3::R`](R) reader structure"] +impl crate::Readable for Id0Cmb3Spec {} +#[doc = "`write(|w| ..)` method takes [`id0_cmb3::W`](W) writer structure"] +impl crate::Writable for Id0Cmb3Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ID0_CMB3 to value 0"] -impl crate::Resettable for ID0_CMB3_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Id0Cmb3Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/id0_cmb4.rs b/va416xx/src/can0/id0_cmb4.rs index 24889c7..2bddfff 100644 --- a/va416xx/src/can0/id0_cmb4.rs +++ b/va416xx/src/can0/id0_cmb4.rs @@ -1,103 +1,40 @@ #[doc = "Register `ID0_CMB4` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ID0_CMB4` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `ID0` reader - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] -pub struct ID0_R(crate::FieldReader); -impl ID0_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - ID0_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ID0_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Id0R = crate::FieldReader; #[doc = "Field `ID0` writer - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] -pub struct ID0_W<'a> { - w: &'a mut W, -} -impl<'a> ID0_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); - self.w - } -} +pub type Id0W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id0(&self) -> ID0_R { - ID0_R::new((self.bits & 0xffff) as u16) + pub fn id0(&self) -> Id0R { + Id0R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id0(&mut self) -> ID0_W { - ID0_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn id0(&mut self) -> Id0W { + Id0W::new(self, 0) } } -#[doc = "CAN Frame Identifier Word 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [id0_cmb4](index.html) module"] -pub struct ID0_CMB4_SPEC; -impl crate::RegisterSpec for ID0_CMB4_SPEC { +#[doc = "CAN Frame Identifier Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id0_cmb4::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id0_cmb4::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Id0Cmb4Spec; +impl crate::RegisterSpec for Id0Cmb4Spec { type Ux = u32; } -#[doc = "`read()` method returns [id0_cmb4::R](R) reader structure"] -impl crate::Readable for ID0_CMB4_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [id0_cmb4::W](W) writer structure"] -impl crate::Writable for ID0_CMB4_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`id0_cmb4::R`](R) reader structure"] +impl crate::Readable for Id0Cmb4Spec {} +#[doc = "`write(|w| ..)` method takes [`id0_cmb4::W`](W) writer structure"] +impl crate::Writable for Id0Cmb4Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ID0_CMB4 to value 0"] -impl crate::Resettable for ID0_CMB4_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Id0Cmb4Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/id0_cmb5.rs b/va416xx/src/can0/id0_cmb5.rs index 11a6b6f..cd231e9 100644 --- a/va416xx/src/can0/id0_cmb5.rs +++ b/va416xx/src/can0/id0_cmb5.rs @@ -1,103 +1,40 @@ #[doc = "Register `ID0_CMB5` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ID0_CMB5` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `ID0` reader - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] -pub struct ID0_R(crate::FieldReader); -impl ID0_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - ID0_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ID0_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Id0R = crate::FieldReader; #[doc = "Field `ID0` writer - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] -pub struct ID0_W<'a> { - w: &'a mut W, -} -impl<'a> ID0_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); - self.w - } -} +pub type Id0W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id0(&self) -> ID0_R { - ID0_R::new((self.bits & 0xffff) as u16) + pub fn id0(&self) -> Id0R { + Id0R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id0(&mut self) -> ID0_W { - ID0_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn id0(&mut self) -> Id0W { + Id0W::new(self, 0) } } -#[doc = "CAN Frame Identifier Word 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [id0_cmb5](index.html) module"] -pub struct ID0_CMB5_SPEC; -impl crate::RegisterSpec for ID0_CMB5_SPEC { +#[doc = "CAN Frame Identifier Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id0_cmb5::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id0_cmb5::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Id0Cmb5Spec; +impl crate::RegisterSpec for Id0Cmb5Spec { type Ux = u32; } -#[doc = "`read()` method returns [id0_cmb5::R](R) reader structure"] -impl crate::Readable for ID0_CMB5_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [id0_cmb5::W](W) writer structure"] -impl crate::Writable for ID0_CMB5_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`id0_cmb5::R`](R) reader structure"] +impl crate::Readable for Id0Cmb5Spec {} +#[doc = "`write(|w| ..)` method takes [`id0_cmb5::W`](W) writer structure"] +impl crate::Writable for Id0Cmb5Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ID0_CMB5 to value 0"] -impl crate::Resettable for ID0_CMB5_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Id0Cmb5Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/id0_cmb6.rs b/va416xx/src/can0/id0_cmb6.rs index a591843..68a4c87 100644 --- a/va416xx/src/can0/id0_cmb6.rs +++ b/va416xx/src/can0/id0_cmb6.rs @@ -1,103 +1,40 @@ #[doc = "Register `ID0_CMB6` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ID0_CMB6` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `ID0` reader - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] -pub struct ID0_R(crate::FieldReader); -impl ID0_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - ID0_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ID0_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Id0R = crate::FieldReader; #[doc = "Field `ID0` writer - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] -pub struct ID0_W<'a> { - w: &'a mut W, -} -impl<'a> ID0_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); - self.w - } -} +pub type Id0W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id0(&self) -> ID0_R { - ID0_R::new((self.bits & 0xffff) as u16) + pub fn id0(&self) -> Id0R { + Id0R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id0(&mut self) -> ID0_W { - ID0_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn id0(&mut self) -> Id0W { + Id0W::new(self, 0) } } -#[doc = "CAN Frame Identifier Word 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [id0_cmb6](index.html) module"] -pub struct ID0_CMB6_SPEC; -impl crate::RegisterSpec for ID0_CMB6_SPEC { +#[doc = "CAN Frame Identifier Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id0_cmb6::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id0_cmb6::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Id0Cmb6Spec; +impl crate::RegisterSpec for Id0Cmb6Spec { type Ux = u32; } -#[doc = "`read()` method returns [id0_cmb6::R](R) reader structure"] -impl crate::Readable for ID0_CMB6_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [id0_cmb6::W](W) writer structure"] -impl crate::Writable for ID0_CMB6_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`id0_cmb6::R`](R) reader structure"] +impl crate::Readable for Id0Cmb6Spec {} +#[doc = "`write(|w| ..)` method takes [`id0_cmb6::W`](W) writer structure"] +impl crate::Writable for Id0Cmb6Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ID0_CMB6 to value 0"] -impl crate::Resettable for ID0_CMB6_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Id0Cmb6Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/id0_cmb7.rs b/va416xx/src/can0/id0_cmb7.rs index 0cc091e..4fe879e 100644 --- a/va416xx/src/can0/id0_cmb7.rs +++ b/va416xx/src/can0/id0_cmb7.rs @@ -1,103 +1,40 @@ #[doc = "Register `ID0_CMB7` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ID0_CMB7` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `ID0` reader - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] -pub struct ID0_R(crate::FieldReader); -impl ID0_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - ID0_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ID0_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Id0R = crate::FieldReader; #[doc = "Field `ID0` writer - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] -pub struct ID0_W<'a> { - w: &'a mut W, -} -impl<'a> ID0_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); - self.w - } -} +pub type Id0W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id0(&self) -> ID0_R { - ID0_R::new((self.bits & 0xffff) as u16) + pub fn id0(&self) -> Id0R { + Id0R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id0(&mut self) -> ID0_W { - ID0_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn id0(&mut self) -> Id0W { + Id0W::new(self, 0) } } -#[doc = "CAN Frame Identifier Word 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [id0_cmb7](index.html) module"] -pub struct ID0_CMB7_SPEC; -impl crate::RegisterSpec for ID0_CMB7_SPEC { +#[doc = "CAN Frame Identifier Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id0_cmb7::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id0_cmb7::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Id0Cmb7Spec; +impl crate::RegisterSpec for Id0Cmb7Spec { type Ux = u32; } -#[doc = "`read()` method returns [id0_cmb7::R](R) reader structure"] -impl crate::Readable for ID0_CMB7_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [id0_cmb7::W](W) writer structure"] -impl crate::Writable for ID0_CMB7_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`id0_cmb7::R`](R) reader structure"] +impl crate::Readable for Id0Cmb7Spec {} +#[doc = "`write(|w| ..)` method takes [`id0_cmb7::W`](W) writer structure"] +impl crate::Writable for Id0Cmb7Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ID0_CMB7 to value 0"] -impl crate::Resettable for ID0_CMB7_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Id0Cmb7Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/id0_cmb8.rs b/va416xx/src/can0/id0_cmb8.rs index 829253b..728ae98 100644 --- a/va416xx/src/can0/id0_cmb8.rs +++ b/va416xx/src/can0/id0_cmb8.rs @@ -1,103 +1,40 @@ #[doc = "Register `ID0_CMB8` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ID0_CMB8` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `ID0` reader - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] -pub struct ID0_R(crate::FieldReader); -impl ID0_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - ID0_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ID0_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Id0R = crate::FieldReader; #[doc = "Field `ID0` writer - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] -pub struct ID0_W<'a> { - w: &'a mut W, -} -impl<'a> ID0_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); - self.w - } -} +pub type Id0W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id0(&self) -> ID0_R { - ID0_R::new((self.bits & 0xffff) as u16) + pub fn id0(&self) -> Id0R { + Id0R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id0(&mut self) -> ID0_W { - ID0_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn id0(&mut self) -> Id0W { + Id0W::new(self, 0) } } -#[doc = "CAN Frame Identifier Word 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [id0_cmb8](index.html) module"] -pub struct ID0_CMB8_SPEC; -impl crate::RegisterSpec for ID0_CMB8_SPEC { +#[doc = "CAN Frame Identifier Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id0_cmb8::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id0_cmb8::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Id0Cmb8Spec; +impl crate::RegisterSpec for Id0Cmb8Spec { type Ux = u32; } -#[doc = "`read()` method returns [id0_cmb8::R](R) reader structure"] -impl crate::Readable for ID0_CMB8_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [id0_cmb8::W](W) writer structure"] -impl crate::Writable for ID0_CMB8_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`id0_cmb8::R`](R) reader structure"] +impl crate::Readable for Id0Cmb8Spec {} +#[doc = "`write(|w| ..)` method takes [`id0_cmb8::W`](W) writer structure"] +impl crate::Writable for Id0Cmb8Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ID0_CMB8 to value 0"] -impl crate::Resettable for ID0_CMB8_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Id0Cmb8Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/id0_cmb9.rs b/va416xx/src/can0/id0_cmb9.rs index b1551d0..cf74967 100644 --- a/va416xx/src/can0/id0_cmb9.rs +++ b/va416xx/src/can0/id0_cmb9.rs @@ -1,103 +1,40 @@ #[doc = "Register `ID0_CMB9` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ID0_CMB9` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `ID0` reader - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] -pub struct ID0_R(crate::FieldReader); -impl ID0_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - ID0_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ID0_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Id0R = crate::FieldReader; #[doc = "Field `ID0` writer - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] -pub struct ID0_W<'a> { - w: &'a mut W, -} -impl<'a> ID0_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); - self.w - } -} +pub type Id0W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id0(&self) -> ID0_R { - ID0_R::new((self.bits & 0xffff) as u16) + pub fn id0(&self) -> Id0R { + Id0R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id0(&mut self) -> ID0_W { - ID0_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn id0(&mut self) -> Id0W { + Id0W::new(self, 0) } } -#[doc = "CAN Frame Identifier Word 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [id0_cmb9](index.html) module"] -pub struct ID0_CMB9_SPEC; -impl crate::RegisterSpec for ID0_CMB9_SPEC { +#[doc = "CAN Frame Identifier Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id0_cmb9::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id0_cmb9::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Id0Cmb9Spec; +impl crate::RegisterSpec for Id0Cmb9Spec { type Ux = u32; } -#[doc = "`read()` method returns [id0_cmb9::R](R) reader structure"] -impl crate::Readable for ID0_CMB9_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [id0_cmb9::W](W) writer structure"] -impl crate::Writable for ID0_CMB9_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`id0_cmb9::R`](R) reader structure"] +impl crate::Readable for Id0Cmb9Spec {} +#[doc = "`write(|w| ..)` method takes [`id0_cmb9::W`](W) writer structure"] +impl crate::Writable for Id0Cmb9Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ID0_CMB9 to value 0"] -impl crate::Resettable for ID0_CMB9_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Id0Cmb9Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/id0_hcmb.rs b/va416xx/src/can0/id0_hcmb.rs index e094114..23cf589 100644 --- a/va416xx/src/can0/id0_hcmb.rs +++ b/va416xx/src/can0/id0_hcmb.rs @@ -1,103 +1,40 @@ #[doc = "Register `ID0_HCMB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ID0_HCMB` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `ID0` reader - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] -pub struct ID0_R(crate::FieldReader); -impl ID0_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - ID0_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ID0_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Id0R = crate::FieldReader; #[doc = "Field `ID0` writer - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] -pub struct ID0_W<'a> { - w: &'a mut W, -} -impl<'a> ID0_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); - self.w - } -} +pub type Id0W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id0(&self) -> ID0_R { - ID0_R::new((self.bits & 0xffff) as u16) + pub fn id0(&self) -> Id0R { + Id0R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id0(&mut self) -> ID0_W { - ID0_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn id0(&mut self) -> Id0W { + Id0W::new(self, 0) } } -#[doc = "CAN Frame Identifier Word 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [id0_hcmb](index.html) module"] -pub struct ID0_HCMB_SPEC; -impl crate::RegisterSpec for ID0_HCMB_SPEC { +#[doc = "CAN Frame Identifier Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id0_hcmb::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id0_hcmb::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Id0HcmbSpec; +impl crate::RegisterSpec for Id0HcmbSpec { type Ux = u32; } -#[doc = "`read()` method returns [id0_hcmb::R](R) reader structure"] -impl crate::Readable for ID0_HCMB_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [id0_hcmb::W](W) writer structure"] -impl crate::Writable for ID0_HCMB_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`id0_hcmb::R`](R) reader structure"] +impl crate::Readable for Id0HcmbSpec {} +#[doc = "`write(|w| ..)` method takes [`id0_hcmb::W`](W) writer structure"] +impl crate::Writable for Id0HcmbSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ID0_HCMB to value 0"] -impl crate::Resettable for ID0_HCMB_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Id0HcmbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/id1_cmb0.rs b/va416xx/src/can0/id1_cmb0.rs index ff48665..ffa77ae 100644 --- a/va416xx/src/can0/id1_cmb0.rs +++ b/va416xx/src/can0/id1_cmb0.rs @@ -1,103 +1,40 @@ #[doc = "Register `ID1_CMB0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ID1_CMB0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `ID1` reader - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] -pub struct ID1_R(crate::FieldReader); -impl ID1_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - ID1_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ID1_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Id1R = crate::FieldReader; #[doc = "Field `ID1` writer - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] -pub struct ID1_W<'a> { - w: &'a mut W, -} -impl<'a> ID1_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); - self.w - } -} +pub type Id1W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id1(&self) -> ID1_R { - ID1_R::new((self.bits & 0xffff) as u16) + pub fn id1(&self) -> Id1R { + Id1R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id1(&mut self) -> ID1_W { - ID1_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn id1(&mut self) -> Id1W { + Id1W::new(self, 0) } } -#[doc = "CAN Frame Identifier Word 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [id1_cmb0](index.html) module"] -pub struct ID1_CMB0_SPEC; -impl crate::RegisterSpec for ID1_CMB0_SPEC { +#[doc = "CAN Frame Identifier Word 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id1_cmb0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id1_cmb0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Id1Cmb0Spec; +impl crate::RegisterSpec for Id1Cmb0Spec { type Ux = u32; } -#[doc = "`read()` method returns [id1_cmb0::R](R) reader structure"] -impl crate::Readable for ID1_CMB0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [id1_cmb0::W](W) writer structure"] -impl crate::Writable for ID1_CMB0_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`id1_cmb0::R`](R) reader structure"] +impl crate::Readable for Id1Cmb0Spec {} +#[doc = "`write(|w| ..)` method takes [`id1_cmb0::W`](W) writer structure"] +impl crate::Writable for Id1Cmb0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ID1_CMB0 to value 0"] -impl crate::Resettable for ID1_CMB0_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Id1Cmb0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/id1_cmb1.rs b/va416xx/src/can0/id1_cmb1.rs index 2b6904e..0e38078 100644 --- a/va416xx/src/can0/id1_cmb1.rs +++ b/va416xx/src/can0/id1_cmb1.rs @@ -1,103 +1,40 @@ #[doc = "Register `ID1_CMB1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ID1_CMB1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `ID1` reader - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] -pub struct ID1_R(crate::FieldReader); -impl ID1_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - ID1_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ID1_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Id1R = crate::FieldReader; #[doc = "Field `ID1` writer - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] -pub struct ID1_W<'a> { - w: &'a mut W, -} -impl<'a> ID1_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); - self.w - } -} +pub type Id1W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id1(&self) -> ID1_R { - ID1_R::new((self.bits & 0xffff) as u16) + pub fn id1(&self) -> Id1R { + Id1R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id1(&mut self) -> ID1_W { - ID1_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn id1(&mut self) -> Id1W { + Id1W::new(self, 0) } } -#[doc = "CAN Frame Identifier Word 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [id1_cmb1](index.html) module"] -pub struct ID1_CMB1_SPEC; -impl crate::RegisterSpec for ID1_CMB1_SPEC { +#[doc = "CAN Frame Identifier Word 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id1_cmb1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id1_cmb1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Id1Cmb1Spec; +impl crate::RegisterSpec for Id1Cmb1Spec { type Ux = u32; } -#[doc = "`read()` method returns [id1_cmb1::R](R) reader structure"] -impl crate::Readable for ID1_CMB1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [id1_cmb1::W](W) writer structure"] -impl crate::Writable for ID1_CMB1_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`id1_cmb1::R`](R) reader structure"] +impl crate::Readable for Id1Cmb1Spec {} +#[doc = "`write(|w| ..)` method takes [`id1_cmb1::W`](W) writer structure"] +impl crate::Writable for Id1Cmb1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ID1_CMB1 to value 0"] -impl crate::Resettable for ID1_CMB1_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Id1Cmb1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/id1_cmb10.rs b/va416xx/src/can0/id1_cmb10.rs index c605904..6818e63 100644 --- a/va416xx/src/can0/id1_cmb10.rs +++ b/va416xx/src/can0/id1_cmb10.rs @@ -1,103 +1,40 @@ #[doc = "Register `ID1_CMB10` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ID1_CMB10` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `ID1` reader - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] -pub struct ID1_R(crate::FieldReader); -impl ID1_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - ID1_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ID1_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Id1R = crate::FieldReader; #[doc = "Field `ID1` writer - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] -pub struct ID1_W<'a> { - w: &'a mut W, -} -impl<'a> ID1_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); - self.w - } -} +pub type Id1W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id1(&self) -> ID1_R { - ID1_R::new((self.bits & 0xffff) as u16) + pub fn id1(&self) -> Id1R { + Id1R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id1(&mut self) -> ID1_W { - ID1_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn id1(&mut self) -> Id1W { + Id1W::new(self, 0) } } -#[doc = "CAN Frame Identifier Word 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [id1_cmb10](index.html) module"] -pub struct ID1_CMB10_SPEC; -impl crate::RegisterSpec for ID1_CMB10_SPEC { +#[doc = "CAN Frame Identifier Word 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id1_cmb10::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id1_cmb10::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Id1Cmb10Spec; +impl crate::RegisterSpec for Id1Cmb10Spec { type Ux = u32; } -#[doc = "`read()` method returns [id1_cmb10::R](R) reader structure"] -impl crate::Readable for ID1_CMB10_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [id1_cmb10::W](W) writer structure"] -impl crate::Writable for ID1_CMB10_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`id1_cmb10::R`](R) reader structure"] +impl crate::Readable for Id1Cmb10Spec {} +#[doc = "`write(|w| ..)` method takes [`id1_cmb10::W`](W) writer structure"] +impl crate::Writable for Id1Cmb10Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ID1_CMB10 to value 0"] -impl crate::Resettable for ID1_CMB10_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Id1Cmb10Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/id1_cmb11.rs b/va416xx/src/can0/id1_cmb11.rs index fdf2759..09163cf 100644 --- a/va416xx/src/can0/id1_cmb11.rs +++ b/va416xx/src/can0/id1_cmb11.rs @@ -1,103 +1,40 @@ #[doc = "Register `ID1_CMB11` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ID1_CMB11` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `ID1` reader - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] -pub struct ID1_R(crate::FieldReader); -impl ID1_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - ID1_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ID1_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Id1R = crate::FieldReader; #[doc = "Field `ID1` writer - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] -pub struct ID1_W<'a> { - w: &'a mut W, -} -impl<'a> ID1_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); - self.w - } -} +pub type Id1W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id1(&self) -> ID1_R { - ID1_R::new((self.bits & 0xffff) as u16) + pub fn id1(&self) -> Id1R { + Id1R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id1(&mut self) -> ID1_W { - ID1_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn id1(&mut self) -> Id1W { + Id1W::new(self, 0) } } -#[doc = "CAN Frame Identifier Word 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [id1_cmb11](index.html) module"] -pub struct ID1_CMB11_SPEC; -impl crate::RegisterSpec for ID1_CMB11_SPEC { +#[doc = "CAN Frame Identifier Word 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id1_cmb11::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id1_cmb11::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Id1Cmb11Spec; +impl crate::RegisterSpec for Id1Cmb11Spec { type Ux = u32; } -#[doc = "`read()` method returns [id1_cmb11::R](R) reader structure"] -impl crate::Readable for ID1_CMB11_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [id1_cmb11::W](W) writer structure"] -impl crate::Writable for ID1_CMB11_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`id1_cmb11::R`](R) reader structure"] +impl crate::Readable for Id1Cmb11Spec {} +#[doc = "`write(|w| ..)` method takes [`id1_cmb11::W`](W) writer structure"] +impl crate::Writable for Id1Cmb11Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ID1_CMB11 to value 0"] -impl crate::Resettable for ID1_CMB11_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Id1Cmb11Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/id1_cmb12.rs b/va416xx/src/can0/id1_cmb12.rs index 6b24042..39a5596 100644 --- a/va416xx/src/can0/id1_cmb12.rs +++ b/va416xx/src/can0/id1_cmb12.rs @@ -1,103 +1,40 @@ #[doc = "Register `ID1_CMB12` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ID1_CMB12` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `ID1` reader - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] -pub struct ID1_R(crate::FieldReader); -impl ID1_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - ID1_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ID1_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Id1R = crate::FieldReader; #[doc = "Field `ID1` writer - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] -pub struct ID1_W<'a> { - w: &'a mut W, -} -impl<'a> ID1_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); - self.w - } -} +pub type Id1W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id1(&self) -> ID1_R { - ID1_R::new((self.bits & 0xffff) as u16) + pub fn id1(&self) -> Id1R { + Id1R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id1(&mut self) -> ID1_W { - ID1_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn id1(&mut self) -> Id1W { + Id1W::new(self, 0) } } -#[doc = "CAN Frame Identifier Word 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [id1_cmb12](index.html) module"] -pub struct ID1_CMB12_SPEC; -impl crate::RegisterSpec for ID1_CMB12_SPEC { +#[doc = "CAN Frame Identifier Word 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id1_cmb12::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id1_cmb12::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Id1Cmb12Spec; +impl crate::RegisterSpec for Id1Cmb12Spec { type Ux = u32; } -#[doc = "`read()` method returns [id1_cmb12::R](R) reader structure"] -impl crate::Readable for ID1_CMB12_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [id1_cmb12::W](W) writer structure"] -impl crate::Writable for ID1_CMB12_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`id1_cmb12::R`](R) reader structure"] +impl crate::Readable for Id1Cmb12Spec {} +#[doc = "`write(|w| ..)` method takes [`id1_cmb12::W`](W) writer structure"] +impl crate::Writable for Id1Cmb12Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ID1_CMB12 to value 0"] -impl crate::Resettable for ID1_CMB12_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Id1Cmb12Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/id1_cmb13.rs b/va416xx/src/can0/id1_cmb13.rs index 121be4d..6bba934 100644 --- a/va416xx/src/can0/id1_cmb13.rs +++ b/va416xx/src/can0/id1_cmb13.rs @@ -1,103 +1,40 @@ #[doc = "Register `ID1_CMB13` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ID1_CMB13` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `ID1` reader - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] -pub struct ID1_R(crate::FieldReader); -impl ID1_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - ID1_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ID1_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Id1R = crate::FieldReader; #[doc = "Field `ID1` writer - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] -pub struct ID1_W<'a> { - w: &'a mut W, -} -impl<'a> ID1_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); - self.w - } -} +pub type Id1W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id1(&self) -> ID1_R { - ID1_R::new((self.bits & 0xffff) as u16) + pub fn id1(&self) -> Id1R { + Id1R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id1(&mut self) -> ID1_W { - ID1_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn id1(&mut self) -> Id1W { + Id1W::new(self, 0) } } -#[doc = "CAN Frame Identifier Word 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [id1_cmb13](index.html) module"] -pub struct ID1_CMB13_SPEC; -impl crate::RegisterSpec for ID1_CMB13_SPEC { +#[doc = "CAN Frame Identifier Word 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id1_cmb13::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id1_cmb13::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Id1Cmb13Spec; +impl crate::RegisterSpec for Id1Cmb13Spec { type Ux = u32; } -#[doc = "`read()` method returns [id1_cmb13::R](R) reader structure"] -impl crate::Readable for ID1_CMB13_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [id1_cmb13::W](W) writer structure"] -impl crate::Writable for ID1_CMB13_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`id1_cmb13::R`](R) reader structure"] +impl crate::Readable for Id1Cmb13Spec {} +#[doc = "`write(|w| ..)` method takes [`id1_cmb13::W`](W) writer structure"] +impl crate::Writable for Id1Cmb13Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ID1_CMB13 to value 0"] -impl crate::Resettable for ID1_CMB13_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Id1Cmb13Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/id1_cmb14.rs b/va416xx/src/can0/id1_cmb14.rs index 7d8e81e..547d7b3 100644 --- a/va416xx/src/can0/id1_cmb14.rs +++ b/va416xx/src/can0/id1_cmb14.rs @@ -1,103 +1,40 @@ #[doc = "Register `ID1_CMB14` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ID1_CMB14` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `ID1` reader - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] -pub struct ID1_R(crate::FieldReader); -impl ID1_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - ID1_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ID1_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Id1R = crate::FieldReader; #[doc = "Field `ID1` writer - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] -pub struct ID1_W<'a> { - w: &'a mut W, -} -impl<'a> ID1_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); - self.w - } -} +pub type Id1W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id1(&self) -> ID1_R { - ID1_R::new((self.bits & 0xffff) as u16) + pub fn id1(&self) -> Id1R { + Id1R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id1(&mut self) -> ID1_W { - ID1_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn id1(&mut self) -> Id1W { + Id1W::new(self, 0) } } -#[doc = "CAN Frame Identifier Word 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [id1_cmb14](index.html) module"] -pub struct ID1_CMB14_SPEC; -impl crate::RegisterSpec for ID1_CMB14_SPEC { +#[doc = "CAN Frame Identifier Word 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id1_cmb14::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id1_cmb14::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Id1Cmb14Spec; +impl crate::RegisterSpec for Id1Cmb14Spec { type Ux = u32; } -#[doc = "`read()` method returns [id1_cmb14::R](R) reader structure"] -impl crate::Readable for ID1_CMB14_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [id1_cmb14::W](W) writer structure"] -impl crate::Writable for ID1_CMB14_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`id1_cmb14::R`](R) reader structure"] +impl crate::Readable for Id1Cmb14Spec {} +#[doc = "`write(|w| ..)` method takes [`id1_cmb14::W`](W) writer structure"] +impl crate::Writable for Id1Cmb14Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ID1_CMB14 to value 0"] -impl crate::Resettable for ID1_CMB14_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Id1Cmb14Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/id1_cmb2.rs b/va416xx/src/can0/id1_cmb2.rs index d231216..502124b 100644 --- a/va416xx/src/can0/id1_cmb2.rs +++ b/va416xx/src/can0/id1_cmb2.rs @@ -1,103 +1,40 @@ #[doc = "Register `ID1_CMB2` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ID1_CMB2` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `ID1` reader - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] -pub struct ID1_R(crate::FieldReader); -impl ID1_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - ID1_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ID1_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Id1R = crate::FieldReader; #[doc = "Field `ID1` writer - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] -pub struct ID1_W<'a> { - w: &'a mut W, -} -impl<'a> ID1_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); - self.w - } -} +pub type Id1W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id1(&self) -> ID1_R { - ID1_R::new((self.bits & 0xffff) as u16) + pub fn id1(&self) -> Id1R { + Id1R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id1(&mut self) -> ID1_W { - ID1_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn id1(&mut self) -> Id1W { + Id1W::new(self, 0) } } -#[doc = "CAN Frame Identifier Word 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [id1_cmb2](index.html) module"] -pub struct ID1_CMB2_SPEC; -impl crate::RegisterSpec for ID1_CMB2_SPEC { +#[doc = "CAN Frame Identifier Word 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id1_cmb2::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id1_cmb2::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Id1Cmb2Spec; +impl crate::RegisterSpec for Id1Cmb2Spec { type Ux = u32; } -#[doc = "`read()` method returns [id1_cmb2::R](R) reader structure"] -impl crate::Readable for ID1_CMB2_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [id1_cmb2::W](W) writer structure"] -impl crate::Writable for ID1_CMB2_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`id1_cmb2::R`](R) reader structure"] +impl crate::Readable for Id1Cmb2Spec {} +#[doc = "`write(|w| ..)` method takes [`id1_cmb2::W`](W) writer structure"] +impl crate::Writable for Id1Cmb2Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ID1_CMB2 to value 0"] -impl crate::Resettable for ID1_CMB2_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Id1Cmb2Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/id1_cmb3.rs b/va416xx/src/can0/id1_cmb3.rs index 5ef31bf..318cf16 100644 --- a/va416xx/src/can0/id1_cmb3.rs +++ b/va416xx/src/can0/id1_cmb3.rs @@ -1,103 +1,40 @@ #[doc = "Register `ID1_CMB3` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ID1_CMB3` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `ID1` reader - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] -pub struct ID1_R(crate::FieldReader); -impl ID1_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - ID1_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ID1_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Id1R = crate::FieldReader; #[doc = "Field `ID1` writer - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] -pub struct ID1_W<'a> { - w: &'a mut W, -} -impl<'a> ID1_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); - self.w - } -} +pub type Id1W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id1(&self) -> ID1_R { - ID1_R::new((self.bits & 0xffff) as u16) + pub fn id1(&self) -> Id1R { + Id1R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id1(&mut self) -> ID1_W { - ID1_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn id1(&mut self) -> Id1W { + Id1W::new(self, 0) } } -#[doc = "CAN Frame Identifier Word 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [id1_cmb3](index.html) module"] -pub struct ID1_CMB3_SPEC; -impl crate::RegisterSpec for ID1_CMB3_SPEC { +#[doc = "CAN Frame Identifier Word 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id1_cmb3::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id1_cmb3::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Id1Cmb3Spec; +impl crate::RegisterSpec for Id1Cmb3Spec { type Ux = u32; } -#[doc = "`read()` method returns [id1_cmb3::R](R) reader structure"] -impl crate::Readable for ID1_CMB3_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [id1_cmb3::W](W) writer structure"] -impl crate::Writable for ID1_CMB3_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`id1_cmb3::R`](R) reader structure"] +impl crate::Readable for Id1Cmb3Spec {} +#[doc = "`write(|w| ..)` method takes [`id1_cmb3::W`](W) writer structure"] +impl crate::Writable for Id1Cmb3Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ID1_CMB3 to value 0"] -impl crate::Resettable for ID1_CMB3_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Id1Cmb3Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/id1_cmb4.rs b/va416xx/src/can0/id1_cmb4.rs index 7a7976b..cc20409 100644 --- a/va416xx/src/can0/id1_cmb4.rs +++ b/va416xx/src/can0/id1_cmb4.rs @@ -1,103 +1,40 @@ #[doc = "Register `ID1_CMB4` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ID1_CMB4` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `ID1` reader - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] -pub struct ID1_R(crate::FieldReader); -impl ID1_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - ID1_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ID1_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Id1R = crate::FieldReader; #[doc = "Field `ID1` writer - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] -pub struct ID1_W<'a> { - w: &'a mut W, -} -impl<'a> ID1_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); - self.w - } -} +pub type Id1W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id1(&self) -> ID1_R { - ID1_R::new((self.bits & 0xffff) as u16) + pub fn id1(&self) -> Id1R { + Id1R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id1(&mut self) -> ID1_W { - ID1_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn id1(&mut self) -> Id1W { + Id1W::new(self, 0) } } -#[doc = "CAN Frame Identifier Word 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [id1_cmb4](index.html) module"] -pub struct ID1_CMB4_SPEC; -impl crate::RegisterSpec for ID1_CMB4_SPEC { +#[doc = "CAN Frame Identifier Word 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id1_cmb4::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id1_cmb4::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Id1Cmb4Spec; +impl crate::RegisterSpec for Id1Cmb4Spec { type Ux = u32; } -#[doc = "`read()` method returns [id1_cmb4::R](R) reader structure"] -impl crate::Readable for ID1_CMB4_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [id1_cmb4::W](W) writer structure"] -impl crate::Writable for ID1_CMB4_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`id1_cmb4::R`](R) reader structure"] +impl crate::Readable for Id1Cmb4Spec {} +#[doc = "`write(|w| ..)` method takes [`id1_cmb4::W`](W) writer structure"] +impl crate::Writable for Id1Cmb4Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ID1_CMB4 to value 0"] -impl crate::Resettable for ID1_CMB4_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Id1Cmb4Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/id1_cmb5.rs b/va416xx/src/can0/id1_cmb5.rs index fd0d892..bc9f997 100644 --- a/va416xx/src/can0/id1_cmb5.rs +++ b/va416xx/src/can0/id1_cmb5.rs @@ -1,103 +1,40 @@ #[doc = "Register `ID1_CMB5` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ID1_CMB5` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `ID1` reader - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] -pub struct ID1_R(crate::FieldReader); -impl ID1_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - ID1_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ID1_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Id1R = crate::FieldReader; #[doc = "Field `ID1` writer - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] -pub struct ID1_W<'a> { - w: &'a mut W, -} -impl<'a> ID1_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); - self.w - } -} +pub type Id1W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id1(&self) -> ID1_R { - ID1_R::new((self.bits & 0xffff) as u16) + pub fn id1(&self) -> Id1R { + Id1R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id1(&mut self) -> ID1_W { - ID1_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn id1(&mut self) -> Id1W { + Id1W::new(self, 0) } } -#[doc = "CAN Frame Identifier Word 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [id1_cmb5](index.html) module"] -pub struct ID1_CMB5_SPEC; -impl crate::RegisterSpec for ID1_CMB5_SPEC { +#[doc = "CAN Frame Identifier Word 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id1_cmb5::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id1_cmb5::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Id1Cmb5Spec; +impl crate::RegisterSpec for Id1Cmb5Spec { type Ux = u32; } -#[doc = "`read()` method returns [id1_cmb5::R](R) reader structure"] -impl crate::Readable for ID1_CMB5_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [id1_cmb5::W](W) writer structure"] -impl crate::Writable for ID1_CMB5_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`id1_cmb5::R`](R) reader structure"] +impl crate::Readable for Id1Cmb5Spec {} +#[doc = "`write(|w| ..)` method takes [`id1_cmb5::W`](W) writer structure"] +impl crate::Writable for Id1Cmb5Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ID1_CMB5 to value 0"] -impl crate::Resettable for ID1_CMB5_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Id1Cmb5Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/id1_cmb6.rs b/va416xx/src/can0/id1_cmb6.rs index 775c81d..4a7f601 100644 --- a/va416xx/src/can0/id1_cmb6.rs +++ b/va416xx/src/can0/id1_cmb6.rs @@ -1,103 +1,40 @@ #[doc = "Register `ID1_CMB6` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ID1_CMB6` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `ID1` reader - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] -pub struct ID1_R(crate::FieldReader); -impl ID1_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - ID1_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ID1_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Id1R = crate::FieldReader; #[doc = "Field `ID1` writer - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] -pub struct ID1_W<'a> { - w: &'a mut W, -} -impl<'a> ID1_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); - self.w - } -} +pub type Id1W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id1(&self) -> ID1_R { - ID1_R::new((self.bits & 0xffff) as u16) + pub fn id1(&self) -> Id1R { + Id1R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id1(&mut self) -> ID1_W { - ID1_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn id1(&mut self) -> Id1W { + Id1W::new(self, 0) } } -#[doc = "CAN Frame Identifier Word 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [id1_cmb6](index.html) module"] -pub struct ID1_CMB6_SPEC; -impl crate::RegisterSpec for ID1_CMB6_SPEC { +#[doc = "CAN Frame Identifier Word 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id1_cmb6::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id1_cmb6::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Id1Cmb6Spec; +impl crate::RegisterSpec for Id1Cmb6Spec { type Ux = u32; } -#[doc = "`read()` method returns [id1_cmb6::R](R) reader structure"] -impl crate::Readable for ID1_CMB6_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [id1_cmb6::W](W) writer structure"] -impl crate::Writable for ID1_CMB6_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`id1_cmb6::R`](R) reader structure"] +impl crate::Readable for Id1Cmb6Spec {} +#[doc = "`write(|w| ..)` method takes [`id1_cmb6::W`](W) writer structure"] +impl crate::Writable for Id1Cmb6Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ID1_CMB6 to value 0"] -impl crate::Resettable for ID1_CMB6_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Id1Cmb6Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/id1_cmb7.rs b/va416xx/src/can0/id1_cmb7.rs index 055c337..0f96f36 100644 --- a/va416xx/src/can0/id1_cmb7.rs +++ b/va416xx/src/can0/id1_cmb7.rs @@ -1,103 +1,40 @@ #[doc = "Register `ID1_CMB7` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ID1_CMB7` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `ID1` reader - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] -pub struct ID1_R(crate::FieldReader); -impl ID1_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - ID1_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ID1_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Id1R = crate::FieldReader; #[doc = "Field `ID1` writer - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] -pub struct ID1_W<'a> { - w: &'a mut W, -} -impl<'a> ID1_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); - self.w - } -} +pub type Id1W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id1(&self) -> ID1_R { - ID1_R::new((self.bits & 0xffff) as u16) + pub fn id1(&self) -> Id1R { + Id1R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id1(&mut self) -> ID1_W { - ID1_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn id1(&mut self) -> Id1W { + Id1W::new(self, 0) } } -#[doc = "CAN Frame Identifier Word 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [id1_cmb7](index.html) module"] -pub struct ID1_CMB7_SPEC; -impl crate::RegisterSpec for ID1_CMB7_SPEC { +#[doc = "CAN Frame Identifier Word 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id1_cmb7::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id1_cmb7::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Id1Cmb7Spec; +impl crate::RegisterSpec for Id1Cmb7Spec { type Ux = u32; } -#[doc = "`read()` method returns [id1_cmb7::R](R) reader structure"] -impl crate::Readable for ID1_CMB7_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [id1_cmb7::W](W) writer structure"] -impl crate::Writable for ID1_CMB7_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`id1_cmb7::R`](R) reader structure"] +impl crate::Readable for Id1Cmb7Spec {} +#[doc = "`write(|w| ..)` method takes [`id1_cmb7::W`](W) writer structure"] +impl crate::Writable for Id1Cmb7Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ID1_CMB7 to value 0"] -impl crate::Resettable for ID1_CMB7_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Id1Cmb7Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/id1_cmb8.rs b/va416xx/src/can0/id1_cmb8.rs index e1bbde4..e6d7ad6 100644 --- a/va416xx/src/can0/id1_cmb8.rs +++ b/va416xx/src/can0/id1_cmb8.rs @@ -1,103 +1,40 @@ #[doc = "Register `ID1_CMB8` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ID1_CMB8` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `ID1` reader - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] -pub struct ID1_R(crate::FieldReader); -impl ID1_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - ID1_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ID1_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Id1R = crate::FieldReader; #[doc = "Field `ID1` writer - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] -pub struct ID1_W<'a> { - w: &'a mut W, -} -impl<'a> ID1_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); - self.w - } -} +pub type Id1W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id1(&self) -> ID1_R { - ID1_R::new((self.bits & 0xffff) as u16) + pub fn id1(&self) -> Id1R { + Id1R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id1(&mut self) -> ID1_W { - ID1_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn id1(&mut self) -> Id1W { + Id1W::new(self, 0) } } -#[doc = "CAN Frame Identifier Word 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [id1_cmb8](index.html) module"] -pub struct ID1_CMB8_SPEC; -impl crate::RegisterSpec for ID1_CMB8_SPEC { +#[doc = "CAN Frame Identifier Word 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id1_cmb8::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id1_cmb8::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Id1Cmb8Spec; +impl crate::RegisterSpec for Id1Cmb8Spec { type Ux = u32; } -#[doc = "`read()` method returns [id1_cmb8::R](R) reader structure"] -impl crate::Readable for ID1_CMB8_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [id1_cmb8::W](W) writer structure"] -impl crate::Writable for ID1_CMB8_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`id1_cmb8::R`](R) reader structure"] +impl crate::Readable for Id1Cmb8Spec {} +#[doc = "`write(|w| ..)` method takes [`id1_cmb8::W`](W) writer structure"] +impl crate::Writable for Id1Cmb8Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ID1_CMB8 to value 0"] -impl crate::Resettable for ID1_CMB8_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Id1Cmb8Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/id1_cmb9.rs b/va416xx/src/can0/id1_cmb9.rs index 04e0a69..2a9a3d4 100644 --- a/va416xx/src/can0/id1_cmb9.rs +++ b/va416xx/src/can0/id1_cmb9.rs @@ -1,103 +1,40 @@ #[doc = "Register `ID1_CMB9` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ID1_CMB9` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `ID1` reader - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] -pub struct ID1_R(crate::FieldReader); -impl ID1_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - ID1_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ID1_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Id1R = crate::FieldReader; #[doc = "Field `ID1` writer - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] -pub struct ID1_W<'a> { - w: &'a mut W, -} -impl<'a> ID1_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); - self.w - } -} +pub type Id1W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id1(&self) -> ID1_R { - ID1_R::new((self.bits & 0xffff) as u16) + pub fn id1(&self) -> Id1R { + Id1R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id1(&mut self) -> ID1_W { - ID1_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn id1(&mut self) -> Id1W { + Id1W::new(self, 0) } } -#[doc = "CAN Frame Identifier Word 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [id1_cmb9](index.html) module"] -pub struct ID1_CMB9_SPEC; -impl crate::RegisterSpec for ID1_CMB9_SPEC { +#[doc = "CAN Frame Identifier Word 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id1_cmb9::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id1_cmb9::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Id1Cmb9Spec; +impl crate::RegisterSpec for Id1Cmb9Spec { type Ux = u32; } -#[doc = "`read()` method returns [id1_cmb9::R](R) reader structure"] -impl crate::Readable for ID1_CMB9_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [id1_cmb9::W](W) writer structure"] -impl crate::Writable for ID1_CMB9_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`id1_cmb9::R`](R) reader structure"] +impl crate::Readable for Id1Cmb9Spec {} +#[doc = "`write(|w| ..)` method takes [`id1_cmb9::W`](W) writer structure"] +impl crate::Writable for Id1Cmb9Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ID1_CMB9 to value 0"] -impl crate::Resettable for ID1_CMB9_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Id1Cmb9Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/id1_hcmb.rs b/va416xx/src/can0/id1_hcmb.rs index 4467078..ba61e23 100644 --- a/va416xx/src/can0/id1_hcmb.rs +++ b/va416xx/src/can0/id1_hcmb.rs @@ -1,103 +1,40 @@ #[doc = "Register `ID1_HCMB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ID1_HCMB` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `ID1` reader - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] -pub struct ID1_R(crate::FieldReader); -impl ID1_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - ID1_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ID1_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Id1R = crate::FieldReader; #[doc = "Field `ID1` writer - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] -pub struct ID1_W<'a> { - w: &'a mut W, -} -impl<'a> ID1_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); - self.w - } -} +pub type Id1W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id1(&self) -> ID1_R { - ID1_R::new((self.bits & 0xffff) as u16) + pub fn id1(&self) -> Id1R { + Id1R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id1(&mut self) -> ID1_W { - ID1_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn id1(&mut self) -> Id1W { + Id1W::new(self, 0) } } -#[doc = "CAN Frame Identifier Word 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [id1_hcmb](index.html) module"] -pub struct ID1_HCMB_SPEC; -impl crate::RegisterSpec for ID1_HCMB_SPEC { +#[doc = "CAN Frame Identifier Word 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id1_hcmb::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id1_hcmb::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Id1HcmbSpec; +impl crate::RegisterSpec for Id1HcmbSpec { type Ux = u32; } -#[doc = "`read()` method returns [id1_hcmb::R](R) reader structure"] -impl crate::Readable for ID1_HCMB_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [id1_hcmb::W](W) writer structure"] -impl crate::Writable for ID1_HCMB_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`id1_hcmb::R`](R) reader structure"] +impl crate::Readable for Id1HcmbSpec {} +#[doc = "`write(|w| ..)` method takes [`id1_hcmb::W`](W) writer structure"] +impl crate::Writable for Id1HcmbSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ID1_HCMB to value 0"] -impl crate::Resettable for ID1_HCMB_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Id1HcmbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/tstp_cmb0.rs b/va416xx/src/can0/tstp_cmb0.rs index 2f694cf..eeccb9a 100644 --- a/va416xx/src/can0/tstp_cmb0.rs +++ b/va416xx/src/can0/tstp_cmb0.rs @@ -1,103 +1,40 @@ #[doc = "Register `TSTP_CMB0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TSTP_CMB0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TIMESTAMP` reader - Timestamp"] -pub struct TIMESTAMP_R(crate::FieldReader); -impl TIMESTAMP_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - TIMESTAMP_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TIMESTAMP_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type TimestampR = crate::FieldReader; #[doc = "Field `TIMESTAMP` writer - Timestamp"] -pub struct TIMESTAMP_W<'a> { - w: &'a mut W, -} -impl<'a> TIMESTAMP_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); - self.w - } -} +pub type TimestampW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Timestamp"] #[inline(always)] - pub fn timestamp(&self) -> TIMESTAMP_R { - TIMESTAMP_R::new((self.bits & 0xffff) as u16) + pub fn timestamp(&self) -> TimestampR { + TimestampR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Timestamp"] #[inline(always)] - pub fn timestamp(&mut self) -> TIMESTAMP_W { - TIMESTAMP_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn timestamp(&mut self) -> TimestampW { + TimestampW::new(self, 0) } } -#[doc = "CAN Frame Timestamp\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tstp_cmb0](index.html) module"] -pub struct TSTP_CMB0_SPEC; -impl crate::RegisterSpec for TSTP_CMB0_SPEC { +#[doc = "CAN Frame Timestamp\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tstp_cmb0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tstp_cmb0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TstpCmb0Spec; +impl crate::RegisterSpec for TstpCmb0Spec { type Ux = u32; } -#[doc = "`read()` method returns [tstp_cmb0::R](R) reader structure"] -impl crate::Readable for TSTP_CMB0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [tstp_cmb0::W](W) writer structure"] -impl crate::Writable for TSTP_CMB0_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`tstp_cmb0::R`](R) reader structure"] +impl crate::Readable for TstpCmb0Spec {} +#[doc = "`write(|w| ..)` method takes [`tstp_cmb0::W`](W) writer structure"] +impl crate::Writable for TstpCmb0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TSTP_CMB0 to value 0"] -impl crate::Resettable for TSTP_CMB0_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for TstpCmb0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/tstp_cmb1.rs b/va416xx/src/can0/tstp_cmb1.rs index a94ce9e..30d5381 100644 --- a/va416xx/src/can0/tstp_cmb1.rs +++ b/va416xx/src/can0/tstp_cmb1.rs @@ -1,103 +1,40 @@ #[doc = "Register `TSTP_CMB1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TSTP_CMB1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TIMESTAMP` reader - Timestamp"] -pub struct TIMESTAMP_R(crate::FieldReader); -impl TIMESTAMP_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - TIMESTAMP_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TIMESTAMP_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type TimestampR = crate::FieldReader; #[doc = "Field `TIMESTAMP` writer - Timestamp"] -pub struct TIMESTAMP_W<'a> { - w: &'a mut W, -} -impl<'a> TIMESTAMP_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); - self.w - } -} +pub type TimestampW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Timestamp"] #[inline(always)] - pub fn timestamp(&self) -> TIMESTAMP_R { - TIMESTAMP_R::new((self.bits & 0xffff) as u16) + pub fn timestamp(&self) -> TimestampR { + TimestampR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Timestamp"] #[inline(always)] - pub fn timestamp(&mut self) -> TIMESTAMP_W { - TIMESTAMP_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn timestamp(&mut self) -> TimestampW { + TimestampW::new(self, 0) } } -#[doc = "CAN Frame Timestamp\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tstp_cmb1](index.html) module"] -pub struct TSTP_CMB1_SPEC; -impl crate::RegisterSpec for TSTP_CMB1_SPEC { +#[doc = "CAN Frame Timestamp\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tstp_cmb1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tstp_cmb1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TstpCmb1Spec; +impl crate::RegisterSpec for TstpCmb1Spec { type Ux = u32; } -#[doc = "`read()` method returns [tstp_cmb1::R](R) reader structure"] -impl crate::Readable for TSTP_CMB1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [tstp_cmb1::W](W) writer structure"] -impl crate::Writable for TSTP_CMB1_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`tstp_cmb1::R`](R) reader structure"] +impl crate::Readable for TstpCmb1Spec {} +#[doc = "`write(|w| ..)` method takes [`tstp_cmb1::W`](W) writer structure"] +impl crate::Writable for TstpCmb1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TSTP_CMB1 to value 0"] -impl crate::Resettable for TSTP_CMB1_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for TstpCmb1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/tstp_cmb10.rs b/va416xx/src/can0/tstp_cmb10.rs index 20389a4..eb337d0 100644 --- a/va416xx/src/can0/tstp_cmb10.rs +++ b/va416xx/src/can0/tstp_cmb10.rs @@ -1,103 +1,40 @@ #[doc = "Register `TSTP_CMB10` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TSTP_CMB10` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TIMESTAMP` reader - Timestamp"] -pub struct TIMESTAMP_R(crate::FieldReader); -impl TIMESTAMP_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - TIMESTAMP_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TIMESTAMP_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type TimestampR = crate::FieldReader; #[doc = "Field `TIMESTAMP` writer - Timestamp"] -pub struct TIMESTAMP_W<'a> { - w: &'a mut W, -} -impl<'a> TIMESTAMP_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); - self.w - } -} +pub type TimestampW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Timestamp"] #[inline(always)] - pub fn timestamp(&self) -> TIMESTAMP_R { - TIMESTAMP_R::new((self.bits & 0xffff) as u16) + pub fn timestamp(&self) -> TimestampR { + TimestampR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Timestamp"] #[inline(always)] - pub fn timestamp(&mut self) -> TIMESTAMP_W { - TIMESTAMP_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn timestamp(&mut self) -> TimestampW { + TimestampW::new(self, 0) } } -#[doc = "CAN Frame Timestamp\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tstp_cmb10](index.html) module"] -pub struct TSTP_CMB10_SPEC; -impl crate::RegisterSpec for TSTP_CMB10_SPEC { +#[doc = "CAN Frame Timestamp\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tstp_cmb10::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tstp_cmb10::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TstpCmb10Spec; +impl crate::RegisterSpec for TstpCmb10Spec { type Ux = u32; } -#[doc = "`read()` method returns [tstp_cmb10::R](R) reader structure"] -impl crate::Readable for TSTP_CMB10_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [tstp_cmb10::W](W) writer structure"] -impl crate::Writable for TSTP_CMB10_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`tstp_cmb10::R`](R) reader structure"] +impl crate::Readable for TstpCmb10Spec {} +#[doc = "`write(|w| ..)` method takes [`tstp_cmb10::W`](W) writer structure"] +impl crate::Writable for TstpCmb10Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TSTP_CMB10 to value 0"] -impl crate::Resettable for TSTP_CMB10_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for TstpCmb10Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/tstp_cmb11.rs b/va416xx/src/can0/tstp_cmb11.rs index 83a1cff..75aee4e 100644 --- a/va416xx/src/can0/tstp_cmb11.rs +++ b/va416xx/src/can0/tstp_cmb11.rs @@ -1,103 +1,40 @@ #[doc = "Register `TSTP_CMB11` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TSTP_CMB11` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TIMESTAMP` reader - Timestamp"] -pub struct TIMESTAMP_R(crate::FieldReader); -impl TIMESTAMP_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - TIMESTAMP_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TIMESTAMP_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type TimestampR = crate::FieldReader; #[doc = "Field `TIMESTAMP` writer - Timestamp"] -pub struct TIMESTAMP_W<'a> { - w: &'a mut W, -} -impl<'a> TIMESTAMP_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); - self.w - } -} +pub type TimestampW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Timestamp"] #[inline(always)] - pub fn timestamp(&self) -> TIMESTAMP_R { - TIMESTAMP_R::new((self.bits & 0xffff) as u16) + pub fn timestamp(&self) -> TimestampR { + TimestampR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Timestamp"] #[inline(always)] - pub fn timestamp(&mut self) -> TIMESTAMP_W { - TIMESTAMP_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn timestamp(&mut self) -> TimestampW { + TimestampW::new(self, 0) } } -#[doc = "CAN Frame Timestamp\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tstp_cmb11](index.html) module"] -pub struct TSTP_CMB11_SPEC; -impl crate::RegisterSpec for TSTP_CMB11_SPEC { +#[doc = "CAN Frame Timestamp\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tstp_cmb11::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tstp_cmb11::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TstpCmb11Spec; +impl crate::RegisterSpec for TstpCmb11Spec { type Ux = u32; } -#[doc = "`read()` method returns [tstp_cmb11::R](R) reader structure"] -impl crate::Readable for TSTP_CMB11_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [tstp_cmb11::W](W) writer structure"] -impl crate::Writable for TSTP_CMB11_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`tstp_cmb11::R`](R) reader structure"] +impl crate::Readable for TstpCmb11Spec {} +#[doc = "`write(|w| ..)` method takes [`tstp_cmb11::W`](W) writer structure"] +impl crate::Writable for TstpCmb11Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TSTP_CMB11 to value 0"] -impl crate::Resettable for TSTP_CMB11_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for TstpCmb11Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/tstp_cmb12.rs b/va416xx/src/can0/tstp_cmb12.rs index 1c24a3c..80091b8 100644 --- a/va416xx/src/can0/tstp_cmb12.rs +++ b/va416xx/src/can0/tstp_cmb12.rs @@ -1,103 +1,40 @@ #[doc = "Register `TSTP_CMB12` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TSTP_CMB12` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TIMESTAMP` reader - Timestamp"] -pub struct TIMESTAMP_R(crate::FieldReader); -impl TIMESTAMP_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - TIMESTAMP_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TIMESTAMP_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type TimestampR = crate::FieldReader; #[doc = "Field `TIMESTAMP` writer - Timestamp"] -pub struct TIMESTAMP_W<'a> { - w: &'a mut W, -} -impl<'a> TIMESTAMP_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); - self.w - } -} +pub type TimestampW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Timestamp"] #[inline(always)] - pub fn timestamp(&self) -> TIMESTAMP_R { - TIMESTAMP_R::new((self.bits & 0xffff) as u16) + pub fn timestamp(&self) -> TimestampR { + TimestampR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Timestamp"] #[inline(always)] - pub fn timestamp(&mut self) -> TIMESTAMP_W { - TIMESTAMP_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn timestamp(&mut self) -> TimestampW { + TimestampW::new(self, 0) } } -#[doc = "CAN Frame Timestamp\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tstp_cmb12](index.html) module"] -pub struct TSTP_CMB12_SPEC; -impl crate::RegisterSpec for TSTP_CMB12_SPEC { +#[doc = "CAN Frame Timestamp\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tstp_cmb12::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tstp_cmb12::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TstpCmb12Spec; +impl crate::RegisterSpec for TstpCmb12Spec { type Ux = u32; } -#[doc = "`read()` method returns [tstp_cmb12::R](R) reader structure"] -impl crate::Readable for TSTP_CMB12_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [tstp_cmb12::W](W) writer structure"] -impl crate::Writable for TSTP_CMB12_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`tstp_cmb12::R`](R) reader structure"] +impl crate::Readable for TstpCmb12Spec {} +#[doc = "`write(|w| ..)` method takes [`tstp_cmb12::W`](W) writer structure"] +impl crate::Writable for TstpCmb12Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TSTP_CMB12 to value 0"] -impl crate::Resettable for TSTP_CMB12_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for TstpCmb12Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/tstp_cmb13.rs b/va416xx/src/can0/tstp_cmb13.rs index 48e5e7e..4974938 100644 --- a/va416xx/src/can0/tstp_cmb13.rs +++ b/va416xx/src/can0/tstp_cmb13.rs @@ -1,103 +1,40 @@ #[doc = "Register `TSTP_CMB13` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TSTP_CMB13` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TIMESTAMP` reader - Timestamp"] -pub struct TIMESTAMP_R(crate::FieldReader); -impl TIMESTAMP_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - TIMESTAMP_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TIMESTAMP_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type TimestampR = crate::FieldReader; #[doc = "Field `TIMESTAMP` writer - Timestamp"] -pub struct TIMESTAMP_W<'a> { - w: &'a mut W, -} -impl<'a> TIMESTAMP_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); - self.w - } -} +pub type TimestampW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Timestamp"] #[inline(always)] - pub fn timestamp(&self) -> TIMESTAMP_R { - TIMESTAMP_R::new((self.bits & 0xffff) as u16) + pub fn timestamp(&self) -> TimestampR { + TimestampR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Timestamp"] #[inline(always)] - pub fn timestamp(&mut self) -> TIMESTAMP_W { - TIMESTAMP_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn timestamp(&mut self) -> TimestampW { + TimestampW::new(self, 0) } } -#[doc = "CAN Frame Timestamp\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tstp_cmb13](index.html) module"] -pub struct TSTP_CMB13_SPEC; -impl crate::RegisterSpec for TSTP_CMB13_SPEC { +#[doc = "CAN Frame Timestamp\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tstp_cmb13::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tstp_cmb13::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TstpCmb13Spec; +impl crate::RegisterSpec for TstpCmb13Spec { type Ux = u32; } -#[doc = "`read()` method returns [tstp_cmb13::R](R) reader structure"] -impl crate::Readable for TSTP_CMB13_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [tstp_cmb13::W](W) writer structure"] -impl crate::Writable for TSTP_CMB13_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`tstp_cmb13::R`](R) reader structure"] +impl crate::Readable for TstpCmb13Spec {} +#[doc = "`write(|w| ..)` method takes [`tstp_cmb13::W`](W) writer structure"] +impl crate::Writable for TstpCmb13Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TSTP_CMB13 to value 0"] -impl crate::Resettable for TSTP_CMB13_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for TstpCmb13Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/tstp_cmb14.rs b/va416xx/src/can0/tstp_cmb14.rs index f495c1e..29617e8 100644 --- a/va416xx/src/can0/tstp_cmb14.rs +++ b/va416xx/src/can0/tstp_cmb14.rs @@ -1,103 +1,40 @@ #[doc = "Register `TSTP_CMB14` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TSTP_CMB14` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TIMESTAMP` reader - Timestamp"] -pub struct TIMESTAMP_R(crate::FieldReader); -impl TIMESTAMP_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - TIMESTAMP_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TIMESTAMP_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type TimestampR = crate::FieldReader; #[doc = "Field `TIMESTAMP` writer - Timestamp"] -pub struct TIMESTAMP_W<'a> { - w: &'a mut W, -} -impl<'a> TIMESTAMP_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); - self.w - } -} +pub type TimestampW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Timestamp"] #[inline(always)] - pub fn timestamp(&self) -> TIMESTAMP_R { - TIMESTAMP_R::new((self.bits & 0xffff) as u16) + pub fn timestamp(&self) -> TimestampR { + TimestampR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Timestamp"] #[inline(always)] - pub fn timestamp(&mut self) -> TIMESTAMP_W { - TIMESTAMP_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn timestamp(&mut self) -> TimestampW { + TimestampW::new(self, 0) } } -#[doc = "CAN Frame Timestamp\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tstp_cmb14](index.html) module"] -pub struct TSTP_CMB14_SPEC; -impl crate::RegisterSpec for TSTP_CMB14_SPEC { +#[doc = "CAN Frame Timestamp\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tstp_cmb14::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tstp_cmb14::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TstpCmb14Spec; +impl crate::RegisterSpec for TstpCmb14Spec { type Ux = u32; } -#[doc = "`read()` method returns [tstp_cmb14::R](R) reader structure"] -impl crate::Readable for TSTP_CMB14_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [tstp_cmb14::W](W) writer structure"] -impl crate::Writable for TSTP_CMB14_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`tstp_cmb14::R`](R) reader structure"] +impl crate::Readable for TstpCmb14Spec {} +#[doc = "`write(|w| ..)` method takes [`tstp_cmb14::W`](W) writer structure"] +impl crate::Writable for TstpCmb14Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TSTP_CMB14 to value 0"] -impl crate::Resettable for TSTP_CMB14_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for TstpCmb14Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/tstp_cmb2.rs b/va416xx/src/can0/tstp_cmb2.rs index c561231..a1693c4 100644 --- a/va416xx/src/can0/tstp_cmb2.rs +++ b/va416xx/src/can0/tstp_cmb2.rs @@ -1,103 +1,40 @@ #[doc = "Register `TSTP_CMB2` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TSTP_CMB2` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TIMESTAMP` reader - Timestamp"] -pub struct TIMESTAMP_R(crate::FieldReader); -impl TIMESTAMP_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - TIMESTAMP_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TIMESTAMP_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type TimestampR = crate::FieldReader; #[doc = "Field `TIMESTAMP` writer - Timestamp"] -pub struct TIMESTAMP_W<'a> { - w: &'a mut W, -} -impl<'a> TIMESTAMP_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); - self.w - } -} +pub type TimestampW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Timestamp"] #[inline(always)] - pub fn timestamp(&self) -> TIMESTAMP_R { - TIMESTAMP_R::new((self.bits & 0xffff) as u16) + pub fn timestamp(&self) -> TimestampR { + TimestampR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Timestamp"] #[inline(always)] - pub fn timestamp(&mut self) -> TIMESTAMP_W { - TIMESTAMP_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn timestamp(&mut self) -> TimestampW { + TimestampW::new(self, 0) } } -#[doc = "CAN Frame Timestamp\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tstp_cmb2](index.html) module"] -pub struct TSTP_CMB2_SPEC; -impl crate::RegisterSpec for TSTP_CMB2_SPEC { +#[doc = "CAN Frame Timestamp\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tstp_cmb2::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tstp_cmb2::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TstpCmb2Spec; +impl crate::RegisterSpec for TstpCmb2Spec { type Ux = u32; } -#[doc = "`read()` method returns [tstp_cmb2::R](R) reader structure"] -impl crate::Readable for TSTP_CMB2_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [tstp_cmb2::W](W) writer structure"] -impl crate::Writable for TSTP_CMB2_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`tstp_cmb2::R`](R) reader structure"] +impl crate::Readable for TstpCmb2Spec {} +#[doc = "`write(|w| ..)` method takes [`tstp_cmb2::W`](W) writer structure"] +impl crate::Writable for TstpCmb2Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TSTP_CMB2 to value 0"] -impl crate::Resettable for TSTP_CMB2_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for TstpCmb2Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/tstp_cmb3.rs b/va416xx/src/can0/tstp_cmb3.rs index b2c9b18..a2be4b0 100644 --- a/va416xx/src/can0/tstp_cmb3.rs +++ b/va416xx/src/can0/tstp_cmb3.rs @@ -1,103 +1,40 @@ #[doc = "Register `TSTP_CMB3` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TSTP_CMB3` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TIMESTAMP` reader - Timestamp"] -pub struct TIMESTAMP_R(crate::FieldReader); -impl TIMESTAMP_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - TIMESTAMP_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TIMESTAMP_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type TimestampR = crate::FieldReader; #[doc = "Field `TIMESTAMP` writer - Timestamp"] -pub struct TIMESTAMP_W<'a> { - w: &'a mut W, -} -impl<'a> TIMESTAMP_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); - self.w - } -} +pub type TimestampW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Timestamp"] #[inline(always)] - pub fn timestamp(&self) -> TIMESTAMP_R { - TIMESTAMP_R::new((self.bits & 0xffff) as u16) + pub fn timestamp(&self) -> TimestampR { + TimestampR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Timestamp"] #[inline(always)] - pub fn timestamp(&mut self) -> TIMESTAMP_W { - TIMESTAMP_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn timestamp(&mut self) -> TimestampW { + TimestampW::new(self, 0) } } -#[doc = "CAN Frame Timestamp\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tstp_cmb3](index.html) module"] -pub struct TSTP_CMB3_SPEC; -impl crate::RegisterSpec for TSTP_CMB3_SPEC { +#[doc = "CAN Frame Timestamp\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tstp_cmb3::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tstp_cmb3::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TstpCmb3Spec; +impl crate::RegisterSpec for TstpCmb3Spec { type Ux = u32; } -#[doc = "`read()` method returns [tstp_cmb3::R](R) reader structure"] -impl crate::Readable for TSTP_CMB3_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [tstp_cmb3::W](W) writer structure"] -impl crate::Writable for TSTP_CMB3_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`tstp_cmb3::R`](R) reader structure"] +impl crate::Readable for TstpCmb3Spec {} +#[doc = "`write(|w| ..)` method takes [`tstp_cmb3::W`](W) writer structure"] +impl crate::Writable for TstpCmb3Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TSTP_CMB3 to value 0"] -impl crate::Resettable for TSTP_CMB3_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for TstpCmb3Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/tstp_cmb4.rs b/va416xx/src/can0/tstp_cmb4.rs index 2e236d8..8ddf61c 100644 --- a/va416xx/src/can0/tstp_cmb4.rs +++ b/va416xx/src/can0/tstp_cmb4.rs @@ -1,103 +1,40 @@ #[doc = "Register `TSTP_CMB4` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TSTP_CMB4` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TIMESTAMP` reader - Timestamp"] -pub struct TIMESTAMP_R(crate::FieldReader); -impl TIMESTAMP_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - TIMESTAMP_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TIMESTAMP_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type TimestampR = crate::FieldReader; #[doc = "Field `TIMESTAMP` writer - Timestamp"] -pub struct TIMESTAMP_W<'a> { - w: &'a mut W, -} -impl<'a> TIMESTAMP_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); - self.w - } -} +pub type TimestampW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Timestamp"] #[inline(always)] - pub fn timestamp(&self) -> TIMESTAMP_R { - TIMESTAMP_R::new((self.bits & 0xffff) as u16) + pub fn timestamp(&self) -> TimestampR { + TimestampR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Timestamp"] #[inline(always)] - pub fn timestamp(&mut self) -> TIMESTAMP_W { - TIMESTAMP_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn timestamp(&mut self) -> TimestampW { + TimestampW::new(self, 0) } } -#[doc = "CAN Frame Timestamp\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tstp_cmb4](index.html) module"] -pub struct TSTP_CMB4_SPEC; -impl crate::RegisterSpec for TSTP_CMB4_SPEC { +#[doc = "CAN Frame Timestamp\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tstp_cmb4::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tstp_cmb4::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TstpCmb4Spec; +impl crate::RegisterSpec for TstpCmb4Spec { type Ux = u32; } -#[doc = "`read()` method returns [tstp_cmb4::R](R) reader structure"] -impl crate::Readable for TSTP_CMB4_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [tstp_cmb4::W](W) writer structure"] -impl crate::Writable for TSTP_CMB4_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`tstp_cmb4::R`](R) reader structure"] +impl crate::Readable for TstpCmb4Spec {} +#[doc = "`write(|w| ..)` method takes [`tstp_cmb4::W`](W) writer structure"] +impl crate::Writable for TstpCmb4Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TSTP_CMB4 to value 0"] -impl crate::Resettable for TSTP_CMB4_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for TstpCmb4Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/tstp_cmb5.rs b/va416xx/src/can0/tstp_cmb5.rs index 2e9d399..5680928 100644 --- a/va416xx/src/can0/tstp_cmb5.rs +++ b/va416xx/src/can0/tstp_cmb5.rs @@ -1,103 +1,40 @@ #[doc = "Register `TSTP_CMB5` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TSTP_CMB5` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TIMESTAMP` reader - Timestamp"] -pub struct TIMESTAMP_R(crate::FieldReader); -impl TIMESTAMP_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - TIMESTAMP_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TIMESTAMP_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type TimestampR = crate::FieldReader; #[doc = "Field `TIMESTAMP` writer - Timestamp"] -pub struct TIMESTAMP_W<'a> { - w: &'a mut W, -} -impl<'a> TIMESTAMP_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); - self.w - } -} +pub type TimestampW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Timestamp"] #[inline(always)] - pub fn timestamp(&self) -> TIMESTAMP_R { - TIMESTAMP_R::new((self.bits & 0xffff) as u16) + pub fn timestamp(&self) -> TimestampR { + TimestampR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Timestamp"] #[inline(always)] - pub fn timestamp(&mut self) -> TIMESTAMP_W { - TIMESTAMP_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn timestamp(&mut self) -> TimestampW { + TimestampW::new(self, 0) } } -#[doc = "CAN Frame Timestamp\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tstp_cmb5](index.html) module"] -pub struct TSTP_CMB5_SPEC; -impl crate::RegisterSpec for TSTP_CMB5_SPEC { +#[doc = "CAN Frame Timestamp\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tstp_cmb5::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tstp_cmb5::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TstpCmb5Spec; +impl crate::RegisterSpec for TstpCmb5Spec { type Ux = u32; } -#[doc = "`read()` method returns [tstp_cmb5::R](R) reader structure"] -impl crate::Readable for TSTP_CMB5_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [tstp_cmb5::W](W) writer structure"] -impl crate::Writable for TSTP_CMB5_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`tstp_cmb5::R`](R) reader structure"] +impl crate::Readable for TstpCmb5Spec {} +#[doc = "`write(|w| ..)` method takes [`tstp_cmb5::W`](W) writer structure"] +impl crate::Writable for TstpCmb5Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TSTP_CMB5 to value 0"] -impl crate::Resettable for TSTP_CMB5_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for TstpCmb5Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/tstp_cmb6.rs b/va416xx/src/can0/tstp_cmb6.rs index edc03d7..3571ef6 100644 --- a/va416xx/src/can0/tstp_cmb6.rs +++ b/va416xx/src/can0/tstp_cmb6.rs @@ -1,103 +1,40 @@ #[doc = "Register `TSTP_CMB6` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TSTP_CMB6` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TIMESTAMP` reader - Timestamp"] -pub struct TIMESTAMP_R(crate::FieldReader); -impl TIMESTAMP_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - TIMESTAMP_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TIMESTAMP_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type TimestampR = crate::FieldReader; #[doc = "Field `TIMESTAMP` writer - Timestamp"] -pub struct TIMESTAMP_W<'a> { - w: &'a mut W, -} -impl<'a> TIMESTAMP_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); - self.w - } -} +pub type TimestampW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Timestamp"] #[inline(always)] - pub fn timestamp(&self) -> TIMESTAMP_R { - TIMESTAMP_R::new((self.bits & 0xffff) as u16) + pub fn timestamp(&self) -> TimestampR { + TimestampR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Timestamp"] #[inline(always)] - pub fn timestamp(&mut self) -> TIMESTAMP_W { - TIMESTAMP_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn timestamp(&mut self) -> TimestampW { + TimestampW::new(self, 0) } } -#[doc = "CAN Frame Timestamp\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tstp_cmb6](index.html) module"] -pub struct TSTP_CMB6_SPEC; -impl crate::RegisterSpec for TSTP_CMB6_SPEC { +#[doc = "CAN Frame Timestamp\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tstp_cmb6::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tstp_cmb6::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TstpCmb6Spec; +impl crate::RegisterSpec for TstpCmb6Spec { type Ux = u32; } -#[doc = "`read()` method returns [tstp_cmb6::R](R) reader structure"] -impl crate::Readable for TSTP_CMB6_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [tstp_cmb6::W](W) writer structure"] -impl crate::Writable for TSTP_CMB6_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`tstp_cmb6::R`](R) reader structure"] +impl crate::Readable for TstpCmb6Spec {} +#[doc = "`write(|w| ..)` method takes [`tstp_cmb6::W`](W) writer structure"] +impl crate::Writable for TstpCmb6Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TSTP_CMB6 to value 0"] -impl crate::Resettable for TSTP_CMB6_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for TstpCmb6Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/tstp_cmb7.rs b/va416xx/src/can0/tstp_cmb7.rs index f39dbbc..ff7a103 100644 --- a/va416xx/src/can0/tstp_cmb7.rs +++ b/va416xx/src/can0/tstp_cmb7.rs @@ -1,103 +1,40 @@ #[doc = "Register `TSTP_CMB7` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TSTP_CMB7` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TIMESTAMP` reader - Timestamp"] -pub struct TIMESTAMP_R(crate::FieldReader); -impl TIMESTAMP_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - TIMESTAMP_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TIMESTAMP_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type TimestampR = crate::FieldReader; #[doc = "Field `TIMESTAMP` writer - Timestamp"] -pub struct TIMESTAMP_W<'a> { - w: &'a mut W, -} -impl<'a> TIMESTAMP_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); - self.w - } -} +pub type TimestampW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Timestamp"] #[inline(always)] - pub fn timestamp(&self) -> TIMESTAMP_R { - TIMESTAMP_R::new((self.bits & 0xffff) as u16) + pub fn timestamp(&self) -> TimestampR { + TimestampR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Timestamp"] #[inline(always)] - pub fn timestamp(&mut self) -> TIMESTAMP_W { - TIMESTAMP_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn timestamp(&mut self) -> TimestampW { + TimestampW::new(self, 0) } } -#[doc = "CAN Frame Timestamp\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tstp_cmb7](index.html) module"] -pub struct TSTP_CMB7_SPEC; -impl crate::RegisterSpec for TSTP_CMB7_SPEC { +#[doc = "CAN Frame Timestamp\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tstp_cmb7::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tstp_cmb7::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TstpCmb7Spec; +impl crate::RegisterSpec for TstpCmb7Spec { type Ux = u32; } -#[doc = "`read()` method returns [tstp_cmb7::R](R) reader structure"] -impl crate::Readable for TSTP_CMB7_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [tstp_cmb7::W](W) writer structure"] -impl crate::Writable for TSTP_CMB7_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`tstp_cmb7::R`](R) reader structure"] +impl crate::Readable for TstpCmb7Spec {} +#[doc = "`write(|w| ..)` method takes [`tstp_cmb7::W`](W) writer structure"] +impl crate::Writable for TstpCmb7Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TSTP_CMB7 to value 0"] -impl crate::Resettable for TSTP_CMB7_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for TstpCmb7Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/tstp_cmb8.rs b/va416xx/src/can0/tstp_cmb8.rs index bc59625..45c0699 100644 --- a/va416xx/src/can0/tstp_cmb8.rs +++ b/va416xx/src/can0/tstp_cmb8.rs @@ -1,103 +1,40 @@ #[doc = "Register `TSTP_CMB8` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TSTP_CMB8` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TIMESTAMP` reader - Timestamp"] -pub struct TIMESTAMP_R(crate::FieldReader); -impl TIMESTAMP_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - TIMESTAMP_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TIMESTAMP_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type TimestampR = crate::FieldReader; #[doc = "Field `TIMESTAMP` writer - Timestamp"] -pub struct TIMESTAMP_W<'a> { - w: &'a mut W, -} -impl<'a> TIMESTAMP_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); - self.w - } -} +pub type TimestampW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Timestamp"] #[inline(always)] - pub fn timestamp(&self) -> TIMESTAMP_R { - TIMESTAMP_R::new((self.bits & 0xffff) as u16) + pub fn timestamp(&self) -> TimestampR { + TimestampR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Timestamp"] #[inline(always)] - pub fn timestamp(&mut self) -> TIMESTAMP_W { - TIMESTAMP_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn timestamp(&mut self) -> TimestampW { + TimestampW::new(self, 0) } } -#[doc = "CAN Frame Timestamp\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tstp_cmb8](index.html) module"] -pub struct TSTP_CMB8_SPEC; -impl crate::RegisterSpec for TSTP_CMB8_SPEC { +#[doc = "CAN Frame Timestamp\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tstp_cmb8::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tstp_cmb8::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TstpCmb8Spec; +impl crate::RegisterSpec for TstpCmb8Spec { type Ux = u32; } -#[doc = "`read()` method returns [tstp_cmb8::R](R) reader structure"] -impl crate::Readable for TSTP_CMB8_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [tstp_cmb8::W](W) writer structure"] -impl crate::Writable for TSTP_CMB8_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`tstp_cmb8::R`](R) reader structure"] +impl crate::Readable for TstpCmb8Spec {} +#[doc = "`write(|w| ..)` method takes [`tstp_cmb8::W`](W) writer structure"] +impl crate::Writable for TstpCmb8Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TSTP_CMB8 to value 0"] -impl crate::Resettable for TSTP_CMB8_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for TstpCmb8Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/tstp_cmb9.rs b/va416xx/src/can0/tstp_cmb9.rs index 0aec1eb..c527458 100644 --- a/va416xx/src/can0/tstp_cmb9.rs +++ b/va416xx/src/can0/tstp_cmb9.rs @@ -1,103 +1,40 @@ #[doc = "Register `TSTP_CMB9` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TSTP_CMB9` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TIMESTAMP` reader - Timestamp"] -pub struct TIMESTAMP_R(crate::FieldReader); -impl TIMESTAMP_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - TIMESTAMP_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TIMESTAMP_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type TimestampR = crate::FieldReader; #[doc = "Field `TIMESTAMP` writer - Timestamp"] -pub struct TIMESTAMP_W<'a> { - w: &'a mut W, -} -impl<'a> TIMESTAMP_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); - self.w - } -} +pub type TimestampW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Timestamp"] #[inline(always)] - pub fn timestamp(&self) -> TIMESTAMP_R { - TIMESTAMP_R::new((self.bits & 0xffff) as u16) + pub fn timestamp(&self) -> TimestampR { + TimestampR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Timestamp"] #[inline(always)] - pub fn timestamp(&mut self) -> TIMESTAMP_W { - TIMESTAMP_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn timestamp(&mut self) -> TimestampW { + TimestampW::new(self, 0) } } -#[doc = "CAN Frame Timestamp\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tstp_cmb9](index.html) module"] -pub struct TSTP_CMB9_SPEC; -impl crate::RegisterSpec for TSTP_CMB9_SPEC { +#[doc = "CAN Frame Timestamp\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tstp_cmb9::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tstp_cmb9::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TstpCmb9Spec; +impl crate::RegisterSpec for TstpCmb9Spec { type Ux = u32; } -#[doc = "`read()` method returns [tstp_cmb9::R](R) reader structure"] -impl crate::Readable for TSTP_CMB9_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [tstp_cmb9::W](W) writer structure"] -impl crate::Writable for TSTP_CMB9_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`tstp_cmb9::R`](R) reader structure"] +impl crate::Readable for TstpCmb9Spec {} +#[doc = "`write(|w| ..)` method takes [`tstp_cmb9::W`](W) writer structure"] +impl crate::Writable for TstpCmb9Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TSTP_CMB9 to value 0"] -impl crate::Resettable for TSTP_CMB9_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for TstpCmb9Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/can0/tstp_hcmb.rs b/va416xx/src/can0/tstp_hcmb.rs index 72fd5e4..1629d2b 100644 --- a/va416xx/src/can0/tstp_hcmb.rs +++ b/va416xx/src/can0/tstp_hcmb.rs @@ -1,103 +1,40 @@ #[doc = "Register `TSTP_HCMB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TSTP_HCMB` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TIMESTAMP` reader - Timestamp"] -pub struct TIMESTAMP_R(crate::FieldReader); -impl TIMESTAMP_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - TIMESTAMP_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TIMESTAMP_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type TimestampR = crate::FieldReader; #[doc = "Field `TIMESTAMP` writer - Timestamp"] -pub struct TIMESTAMP_W<'a> { - w: &'a mut W, -} -impl<'a> TIMESTAMP_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); - self.w - } -} +pub type TimestampW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Timestamp"] #[inline(always)] - pub fn timestamp(&self) -> TIMESTAMP_R { - TIMESTAMP_R::new((self.bits & 0xffff) as u16) + pub fn timestamp(&self) -> TimestampR { + TimestampR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Timestamp"] #[inline(always)] - pub fn timestamp(&mut self) -> TIMESTAMP_W { - TIMESTAMP_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn timestamp(&mut self) -> TimestampW { + TimestampW::new(self, 0) } } -#[doc = "CAN Frame Timestamp\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tstp_hcmb](index.html) module"] -pub struct TSTP_HCMB_SPEC; -impl crate::RegisterSpec for TSTP_HCMB_SPEC { +#[doc = "CAN Frame Timestamp\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tstp_hcmb::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tstp_hcmb::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TstpHcmbSpec; +impl crate::RegisterSpec for TstpHcmbSpec { type Ux = u32; } -#[doc = "`read()` method returns [tstp_hcmb::R](R) reader structure"] -impl crate::Readable for TSTP_HCMB_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [tstp_hcmb::W](W) writer structure"] -impl crate::Writable for TSTP_HCMB_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`tstp_hcmb::R`](R) reader structure"] +impl crate::Readable for TstpHcmbSpec {} +#[doc = "`write(|w| ..)` method takes [`tstp_hcmb::W`](W) writer structure"] +impl crate::Writable for TstpHcmbSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TSTP_HCMB to value 0"] -impl crate::Resettable for TSTP_HCMB_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for TstpHcmbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/clkgen.rs b/va416xx/src/clkgen.rs index c4031a1..1a6e589 100644 --- a/va416xx/src/clkgen.rs +++ b/va416xx/src/clkgen.rs @@ -1,22 +1,42 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - #[doc = "0x00 - Clock Generation Module Control Register 0"] - pub ctrl0: crate::Reg, - #[doc = "0x04 - Clock Generation Module Status Register"] - pub stat: crate::Reg, - #[doc = "0x08 - Clock Generation Module Control Register 1"] - pub ctrl1: crate::Reg, + ctrl0: Ctrl0, + stat: Stat, + ctrl1: Ctrl1, } -#[doc = "CTRL0 register accessor: an alias for `Reg`"] -pub type CTRL0 = crate::Reg; +impl RegisterBlock { + #[doc = "0x00 - Clock Generation Module Control Register 0"] + #[inline(always)] + pub const fn ctrl0(&self) -> &Ctrl0 { + &self.ctrl0 + } + #[doc = "0x04 - Clock Generation Module Status Register"] + #[inline(always)] + pub const fn stat(&self) -> &Stat { + &self.stat + } + #[doc = "0x08 - Clock Generation Module Control Register 1"] + #[inline(always)] + pub const fn ctrl1(&self) -> &Ctrl1 { + &self.ctrl1 + } +} +#[doc = "CTRL0 (rw) register accessor: Clock Generation Module Control Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctrl0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctrl0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl0`] +module"] +#[doc(alias = "CTRL0")] +pub type Ctrl0 = crate::Reg; #[doc = "Clock Generation Module Control Register 0"] pub mod ctrl0; -#[doc = "STAT register accessor: an alias for `Reg`"] -pub type STAT = crate::Reg; +#[doc = "STAT (r) register accessor: Clock Generation Module Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`stat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@stat`] +module"] +#[doc(alias = "STAT")] +pub type Stat = crate::Reg; #[doc = "Clock Generation Module Status Register"] pub mod stat; -#[doc = "CTRL1 register accessor: an alias for `Reg`"] -pub type CTRL1 = crate::Reg; +#[doc = "CTRL1 (rw) register accessor: Clock Generation Module Control Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctrl1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctrl1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl1`] +module"] +#[doc(alias = "CTRL1")] +pub type Ctrl1 = crate::Reg; #[doc = "Clock Generation Module Control Register 1"] pub mod ctrl1; diff --git a/va416xx/src/clkgen/ctrl0.rs b/va416xx/src/clkgen/ctrl0.rs index 97e5dc9..5bb8d9d 100644 --- a/va416xx/src/clkgen/ctrl0.rs +++ b/va416xx/src/clkgen/ctrl0.rs @@ -1,607 +1,220 @@ #[doc = "Register `CTRL0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CTRL0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `SYS_CLK_LOST_DET_EN` reader - Enable the circuit that detects loss of SYS_CLK"] -pub struct SYS_CLK_LOST_DET_EN_R(crate::FieldReader); -impl SYS_CLK_LOST_DET_EN_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - SYS_CLK_LOST_DET_EN_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for SYS_CLK_LOST_DET_EN_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `SYS_CLK_LOST_DET_EN` writer - Enable the circuit that detects loss of SYS_CLK"] -pub struct SYS_CLK_LOST_DET_EN_W<'a> { - w: &'a mut W, -} -impl<'a> SYS_CLK_LOST_DET_EN_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 31)) | ((value as u32 & 0x01) << 31); - self.w - } -} -#[doc = "Field `PLL_RESET` reader - Writing this bit to 1 puts the PLL into reset"] -pub struct PLL_RESET_R(crate::FieldReader); -impl PLL_RESET_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - PLL_RESET_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PLL_RESET_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `PLL_RESET` writer - Writing this bit to 1 puts the PLL into reset"] -pub struct PLL_RESET_W<'a> { - w: &'a mut W, -} -impl<'a> PLL_RESET_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 30)) | ((value as u32 & 0x01) << 30); - self.w - } -} -#[doc = "Field `CLK_DIV_SEL` reader - Selects the PLL out divider to divide by 1/2/4/8"] -pub struct CLK_DIV_SEL_R(crate::FieldReader); -impl CLK_DIV_SEL_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - CLK_DIV_SEL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CLK_DIV_SEL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CLK_DIV_SEL` writer - Selects the PLL out divider to divide by 1/2/4/8"] -pub struct CLK_DIV_SEL_W<'a> { - w: &'a mut W, -} -impl<'a> CLK_DIV_SEL_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x03 << 28)) | ((value as u32 & 0x03) << 28); - self.w - } -} -#[doc = "Field `PLL_CLKR` reader - PLL Symbol; selects the values 1-16 for the reference divider"] -pub struct PLL_CLKR_R(crate::FieldReader); -impl PLL_CLKR_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - PLL_CLKR_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PLL_CLKR_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `PLL_CLKR` writer - PLL Symbol; selects the values 1-16 for the reference divider"] -pub struct PLL_CLKR_W<'a> { - w: &'a mut W, -} -impl<'a> PLL_CLKR_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x0f << 24)) | ((value as u32 & 0x0f) << 24); - self.w - } -} -#[doc = "Field `PLL_CLKF` reader - PLL Symbol; selects the values 1-64 for the multiplication factor"] -pub struct PLL_CLKF_R(crate::FieldReader); -impl PLL_CLKF_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - PLL_CLKF_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PLL_CLKF_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `PLL_CLKF` writer - PLL Symbol; selects the values 1-64 for the multiplication factor"] -pub struct PLL_CLKF_W<'a> { - w: &'a mut W, -} -impl<'a> PLL_CLKF_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x3f << 18)) | ((value as u32 & 0x3f) << 18); - self.w - } -} -#[doc = "Field `PLL_CLKOD` reader - PLL Symbol; selects the values 1-16 for the post VCO divider"] -pub struct PLL_CLKOD_R(crate::FieldReader); -impl PLL_CLKOD_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - PLL_CLKOD_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PLL_CLKOD_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `PLL_CLKOD` writer - PLL Symbol; selects the values 1-16 for the post VCO divider"] -pub struct PLL_CLKOD_W<'a> { - w: &'a mut W, -} -impl<'a> PLL_CLKOD_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x0f << 14)) | ((value as u32 & 0x0f) << 14); - self.w - } -} -#[doc = "Field `PLL_BWADJ` reader - PLL Symbol; selects the values 1-64 for the bandwidth divider"] -pub struct PLL_BWADJ_R(crate::FieldReader); -impl PLL_BWADJ_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - PLL_BWADJ_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PLL_BWADJ_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `PLL_BWADJ` writer - PLL Symbol; selects the values 1-64 for the bandwidth divider"] -pub struct PLL_BWADJ_W<'a> { - w: &'a mut W, -} -impl<'a> PLL_BWADJ_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x3f << 8)) | ((value as u32 & 0x3f) << 8); - self.w - } -} -#[doc = "Field `PLL_TEST` reader - PLL Symbol; Reference-to-counters-to-output bypass when high"] -pub struct PLL_TEST_R(crate::FieldReader); -impl PLL_TEST_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - PLL_TEST_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PLL_TEST_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `PLL_TEST` writer - PLL Symbol; Reference-to-counters-to-output bypass when high"] -pub struct PLL_TEST_W<'a> { - w: &'a mut W, -} -impl<'a> PLL_TEST_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); - self.w - } -} -#[doc = "Field `PLL_BYPASS` reader - PLL Symbol; reference-to-output bypass when high"] -pub struct PLL_BYPASS_R(crate::FieldReader); -impl PLL_BYPASS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - PLL_BYPASS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PLL_BYPASS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `PLL_BYPASS` writer - PLL Symbol; reference-to-output bypass when high"] -pub struct PLL_BYPASS_W<'a> { - w: &'a mut W, -} -impl<'a> PLL_BYPASS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); - self.w - } -} -#[doc = "Field `PLL_PWDN` reader - PLL Symbol; power down when high"] -pub struct PLL_PWDN_R(crate::FieldReader); -impl PLL_PWDN_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - PLL_PWDN_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PLL_PWDN_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `PLL_PWDN` writer - PLL Symbol; power down when high"] -pub struct PLL_PWDN_W<'a> { - w: &'a mut W, -} -impl<'a> PLL_PWDN_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); - self.w - } -} -#[doc = "Field `PLL_INTFB` reader - PLL Symbol; select internal feedback path when high rather than FCLK"] -pub struct PLL_INTFB_R(crate::FieldReader); -impl PLL_INTFB_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - PLL_INTFB_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PLL_INTFB_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `PLL_INTFB` writer - PLL Symbol; select internal feedback path when high rather than FCLK"] -pub struct PLL_INTFB_W<'a> { - w: &'a mut W, -} -impl<'a> PLL_INTFB_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); - self.w - } -} -#[doc = "Field `CLKSEL_SYS` reader - Input clock select to PLL"] -pub struct CLKSEL_SYS_R(crate::FieldReader); -impl CLKSEL_SYS_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - CLKSEL_SYS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CLKSEL_SYS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CLKSEL_SYS` writer - Input clock select to PLL"] -pub struct CLKSEL_SYS_W<'a> { - w: &'a mut W, -} -impl<'a> CLKSEL_SYS_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x03 << 2)) | ((value as u32 & 0x03) << 2); - self.w - } -} +pub type W = crate::W; #[doc = "Field `REF_CLK_SEL` reader - PLL Reference Clock Select"] -pub struct REF_CLK_SEL_R(crate::FieldReader); -impl REF_CLK_SEL_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - REF_CLK_SEL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for REF_CLK_SEL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type RefClkSelR = crate::FieldReader; #[doc = "Field `REF_CLK_SEL` writer - PLL Reference Clock Select"] -pub struct REF_CLK_SEL_W<'a> { - w: &'a mut W, -} -impl<'a> REF_CLK_SEL_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0x03) | (value as u32 & 0x03); - self.w - } -} +pub type RefClkSelW<'a, REG> = crate::FieldWriter<'a, REG, 2>; +#[doc = "Field `CLKSEL_SYS` reader - Input clock select to PLL"] +pub type ClkselSysR = crate::FieldReader; +#[doc = "Field `CLKSEL_SYS` writer - Input clock select to PLL"] +pub type ClkselSysW<'a, REG> = crate::FieldWriter<'a, REG, 2>; +#[doc = "Field `PLL_INTFB` reader - PLL Symbol; select internal feedback path when high rather than FCLK"] +pub type PllIntfbR = crate::BitReader; +#[doc = "Field `PLL_INTFB` writer - PLL Symbol; select internal feedback path when high rather than FCLK"] +pub type PllIntfbW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `PLL_PWDN` reader - PLL Symbol; power down when high"] +pub type PllPwdnR = crate::BitReader; +#[doc = "Field `PLL_PWDN` writer - PLL Symbol; power down when high"] +pub type PllPwdnW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `PLL_BYPASS` reader - PLL Symbol; reference-to-output bypass when high"] +pub type PllBypassR = crate::BitReader; +#[doc = "Field `PLL_BYPASS` writer - PLL Symbol; reference-to-output bypass when high"] +pub type PllBypassW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `PLL_TEST` reader - PLL Symbol; Reference-to-counters-to-output bypass when high"] +pub type PllTestR = crate::BitReader; +#[doc = "Field `PLL_TEST` writer - PLL Symbol; Reference-to-counters-to-output bypass when high"] +pub type PllTestW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `PLL_BWADJ` reader - PLL Symbol; selects the values 1-64 for the bandwidth divider"] +pub type PllBwadjR = crate::FieldReader; +#[doc = "Field `PLL_BWADJ` writer - PLL Symbol; selects the values 1-64 for the bandwidth divider"] +pub type PllBwadjW<'a, REG> = crate::FieldWriter<'a, REG, 6>; +#[doc = "Field `PLL_CLKOD` reader - PLL Symbol; selects the values 1-16 for the post VCO divider"] +pub type PllClkodR = crate::FieldReader; +#[doc = "Field `PLL_CLKOD` writer - PLL Symbol; selects the values 1-16 for the post VCO divider"] +pub type PllClkodW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +#[doc = "Field `PLL_CLKF` reader - PLL Symbol; selects the values 1-64 for the multiplication factor"] +pub type PllClkfR = crate::FieldReader; +#[doc = "Field `PLL_CLKF` writer - PLL Symbol; selects the values 1-64 for the multiplication factor"] +pub type PllClkfW<'a, REG> = crate::FieldWriter<'a, REG, 6>; +#[doc = "Field `PLL_CLKR` reader - PLL Symbol; selects the values 1-16 for the reference divider"] +pub type PllClkrR = crate::FieldReader; +#[doc = "Field `PLL_CLKR` writer - PLL Symbol; selects the values 1-16 for the reference divider"] +pub type PllClkrW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +#[doc = "Field `CLK_DIV_SEL` reader - Selects the PLL out divider to divide by 1/2/4/8"] +pub type ClkDivSelR = crate::FieldReader; +#[doc = "Field `CLK_DIV_SEL` writer - Selects the PLL out divider to divide by 1/2/4/8"] +pub type ClkDivSelW<'a, REG> = crate::FieldWriter<'a, REG, 2>; +#[doc = "Field `PLL_RESET` reader - Writing this bit to 1 puts the PLL into reset"] +pub type PllResetR = crate::BitReader; +#[doc = "Field `PLL_RESET` writer - Writing this bit to 1 puts the PLL into reset"] +pub type PllResetW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `SYS_CLK_LOST_DET_EN` reader - Enable the circuit that detects loss of SYS_CLK"] +pub type SysClkLostDetEnR = crate::BitReader; +#[doc = "Field `SYS_CLK_LOST_DET_EN` writer - Enable the circuit that detects loss of SYS_CLK"] +pub type SysClkLostDetEnW<'a, REG> = crate::BitWriter<'a, REG>; impl R { - #[doc = "Bit 31 - Enable the circuit that detects loss of SYS_CLK"] + #[doc = "Bits 0:1 - PLL Reference Clock Select"] #[inline(always)] - pub fn sys_clk_lost_det_en(&self) -> SYS_CLK_LOST_DET_EN_R { - SYS_CLK_LOST_DET_EN_R::new(((self.bits >> 31) & 0x01) != 0) - } - #[doc = "Bit 30 - Writing this bit to 1 puts the PLL into reset"] - #[inline(always)] - pub fn pll_reset(&self) -> PLL_RESET_R { - PLL_RESET_R::new(((self.bits >> 30) & 0x01) != 0) - } - #[doc = "Bits 28:29 - Selects the PLL out divider to divide by 1/2/4/8"] - #[inline(always)] - pub fn clk_div_sel(&self) -> CLK_DIV_SEL_R { - CLK_DIV_SEL_R::new(((self.bits >> 28) & 0x03) as u8) - } - #[doc = "Bits 24:27 - PLL Symbol; selects the values 1-16 for the reference divider"] - #[inline(always)] - pub fn pll_clkr(&self) -> PLL_CLKR_R { - PLL_CLKR_R::new(((self.bits >> 24) & 0x0f) as u8) - } - #[doc = "Bits 18:23 - PLL Symbol; selects the values 1-64 for the multiplication factor"] - #[inline(always)] - pub fn pll_clkf(&self) -> PLL_CLKF_R { - PLL_CLKF_R::new(((self.bits >> 18) & 0x3f) as u8) - } - #[doc = "Bits 14:17 - PLL Symbol; selects the values 1-16 for the post VCO divider"] - #[inline(always)] - pub fn pll_clkod(&self) -> PLL_CLKOD_R { - PLL_CLKOD_R::new(((self.bits >> 14) & 0x0f) as u8) - } - #[doc = "Bits 8:13 - PLL Symbol; selects the values 1-64 for the bandwidth divider"] - #[inline(always)] - pub fn pll_bwadj(&self) -> PLL_BWADJ_R { - PLL_BWADJ_R::new(((self.bits >> 8) & 0x3f) as u8) - } - #[doc = "Bit 7 - PLL Symbol; Reference-to-counters-to-output bypass when high"] - #[inline(always)] - pub fn pll_test(&self) -> PLL_TEST_R { - PLL_TEST_R::new(((self.bits >> 7) & 0x01) != 0) - } - #[doc = "Bit 6 - PLL Symbol; reference-to-output bypass when high"] - #[inline(always)] - pub fn pll_bypass(&self) -> PLL_BYPASS_R { - PLL_BYPASS_R::new(((self.bits >> 6) & 0x01) != 0) - } - #[doc = "Bit 5 - PLL Symbol; power down when high"] - #[inline(always)] - pub fn pll_pwdn(&self) -> PLL_PWDN_R { - PLL_PWDN_R::new(((self.bits >> 5) & 0x01) != 0) - } - #[doc = "Bit 4 - PLL Symbol; select internal feedback path when high rather than FCLK"] - #[inline(always)] - pub fn pll_intfb(&self) -> PLL_INTFB_R { - PLL_INTFB_R::new(((self.bits >> 4) & 0x01) != 0) + pub fn ref_clk_sel(&self) -> RefClkSelR { + RefClkSelR::new((self.bits & 3) as u8) } #[doc = "Bits 2:3 - Input clock select to PLL"] #[inline(always)] - pub fn clksel_sys(&self) -> CLKSEL_SYS_R { - CLKSEL_SYS_R::new(((self.bits >> 2) & 0x03) as u8) + pub fn clksel_sys(&self) -> ClkselSysR { + ClkselSysR::new(((self.bits >> 2) & 3) as u8) } - #[doc = "Bits 0:1 - PLL Reference Clock Select"] + #[doc = "Bit 4 - PLL Symbol; select internal feedback path when high rather than FCLK"] #[inline(always)] - pub fn ref_clk_sel(&self) -> REF_CLK_SEL_R { - REF_CLK_SEL_R::new((self.bits & 0x03) as u8) + pub fn pll_intfb(&self) -> PllIntfbR { + PllIntfbR::new(((self.bits >> 4) & 1) != 0) + } + #[doc = "Bit 5 - PLL Symbol; power down when high"] + #[inline(always)] + pub fn pll_pwdn(&self) -> PllPwdnR { + PllPwdnR::new(((self.bits >> 5) & 1) != 0) + } + #[doc = "Bit 6 - PLL Symbol; reference-to-output bypass when high"] + #[inline(always)] + pub fn pll_bypass(&self) -> PllBypassR { + PllBypassR::new(((self.bits >> 6) & 1) != 0) + } + #[doc = "Bit 7 - PLL Symbol; Reference-to-counters-to-output bypass when high"] + #[inline(always)] + pub fn pll_test(&self) -> PllTestR { + PllTestR::new(((self.bits >> 7) & 1) != 0) + } + #[doc = "Bits 8:13 - PLL Symbol; selects the values 1-64 for the bandwidth divider"] + #[inline(always)] + pub fn pll_bwadj(&self) -> PllBwadjR { + PllBwadjR::new(((self.bits >> 8) & 0x3f) as u8) + } + #[doc = "Bits 14:17 - PLL Symbol; selects the values 1-16 for the post VCO divider"] + #[inline(always)] + pub fn pll_clkod(&self) -> PllClkodR { + PllClkodR::new(((self.bits >> 14) & 0x0f) as u8) + } + #[doc = "Bits 18:23 - PLL Symbol; selects the values 1-64 for the multiplication factor"] + #[inline(always)] + pub fn pll_clkf(&self) -> PllClkfR { + PllClkfR::new(((self.bits >> 18) & 0x3f) as u8) + } + #[doc = "Bits 24:27 - PLL Symbol; selects the values 1-16 for the reference divider"] + #[inline(always)] + pub fn pll_clkr(&self) -> PllClkrR { + PllClkrR::new(((self.bits >> 24) & 0x0f) as u8) + } + #[doc = "Bits 28:29 - Selects the PLL out divider to divide by 1/2/4/8"] + #[inline(always)] + pub fn clk_div_sel(&self) -> ClkDivSelR { + ClkDivSelR::new(((self.bits >> 28) & 3) as u8) + } + #[doc = "Bit 30 - Writing this bit to 1 puts the PLL into reset"] + #[inline(always)] + pub fn pll_reset(&self) -> PllResetR { + PllResetR::new(((self.bits >> 30) & 1) != 0) + } + #[doc = "Bit 31 - Enable the circuit that detects loss of SYS_CLK"] + #[inline(always)] + pub fn sys_clk_lost_det_en(&self) -> SysClkLostDetEnR { + SysClkLostDetEnR::new(((self.bits >> 31) & 1) != 0) } } impl W { - #[doc = "Bit 31 - Enable the circuit that detects loss of SYS_CLK"] + #[doc = "Bits 0:1 - PLL Reference Clock Select"] #[inline(always)] - pub fn sys_clk_lost_det_en(&mut self) -> SYS_CLK_LOST_DET_EN_W { - SYS_CLK_LOST_DET_EN_W { w: self } - } - #[doc = "Bit 30 - Writing this bit to 1 puts the PLL into reset"] - #[inline(always)] - pub fn pll_reset(&mut self) -> PLL_RESET_W { - PLL_RESET_W { w: self } - } - #[doc = "Bits 28:29 - Selects the PLL out divider to divide by 1/2/4/8"] - #[inline(always)] - pub fn clk_div_sel(&mut self) -> CLK_DIV_SEL_W { - CLK_DIV_SEL_W { w: self } - } - #[doc = "Bits 24:27 - PLL Symbol; selects the values 1-16 for the reference divider"] - #[inline(always)] - pub fn pll_clkr(&mut self) -> PLL_CLKR_W { - PLL_CLKR_W { w: self } - } - #[doc = "Bits 18:23 - PLL Symbol; selects the values 1-64 for the multiplication factor"] - #[inline(always)] - pub fn pll_clkf(&mut self) -> PLL_CLKF_W { - PLL_CLKF_W { w: self } - } - #[doc = "Bits 14:17 - PLL Symbol; selects the values 1-16 for the post VCO divider"] - #[inline(always)] - pub fn pll_clkod(&mut self) -> PLL_CLKOD_W { - PLL_CLKOD_W { w: self } - } - #[doc = "Bits 8:13 - PLL Symbol; selects the values 1-64 for the bandwidth divider"] - #[inline(always)] - pub fn pll_bwadj(&mut self) -> PLL_BWADJ_W { - PLL_BWADJ_W { w: self } - } - #[doc = "Bit 7 - PLL Symbol; Reference-to-counters-to-output bypass when high"] - #[inline(always)] - pub fn pll_test(&mut self) -> PLL_TEST_W { - PLL_TEST_W { w: self } - } - #[doc = "Bit 6 - PLL Symbol; reference-to-output bypass when high"] - #[inline(always)] - pub fn pll_bypass(&mut self) -> PLL_BYPASS_W { - PLL_BYPASS_W { w: self } - } - #[doc = "Bit 5 - PLL Symbol; power down when high"] - #[inline(always)] - pub fn pll_pwdn(&mut self) -> PLL_PWDN_W { - PLL_PWDN_W { w: self } - } - #[doc = "Bit 4 - PLL Symbol; select internal feedback path when high rather than FCLK"] - #[inline(always)] - pub fn pll_intfb(&mut self) -> PLL_INTFB_W { - PLL_INTFB_W { w: self } + #[must_use] + pub fn ref_clk_sel(&mut self) -> RefClkSelW { + RefClkSelW::new(self, 0) } #[doc = "Bits 2:3 - Input clock select to PLL"] #[inline(always)] - pub fn clksel_sys(&mut self) -> CLKSEL_SYS_W { - CLKSEL_SYS_W { w: self } + #[must_use] + pub fn clksel_sys(&mut self) -> ClkselSysW { + ClkselSysW::new(self, 2) } - #[doc = "Bits 0:1 - PLL Reference Clock Select"] + #[doc = "Bit 4 - PLL Symbol; select internal feedback path when high rather than FCLK"] #[inline(always)] - pub fn ref_clk_sel(&mut self) -> REF_CLK_SEL_W { - REF_CLK_SEL_W { w: self } + #[must_use] + pub fn pll_intfb(&mut self) -> PllIntfbW { + PllIntfbW::new(self, 4) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bit 5 - PLL Symbol; power down when high"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn pll_pwdn(&mut self) -> PllPwdnW { + PllPwdnW::new(self, 5) + } + #[doc = "Bit 6 - PLL Symbol; reference-to-output bypass when high"] + #[inline(always)] + #[must_use] + pub fn pll_bypass(&mut self) -> PllBypassW { + PllBypassW::new(self, 6) + } + #[doc = "Bit 7 - PLL Symbol; Reference-to-counters-to-output bypass when high"] + #[inline(always)] + #[must_use] + pub fn pll_test(&mut self) -> PllTestW { + PllTestW::new(self, 7) + } + #[doc = "Bits 8:13 - PLL Symbol; selects the values 1-64 for the bandwidth divider"] + #[inline(always)] + #[must_use] + pub fn pll_bwadj(&mut self) -> PllBwadjW { + PllBwadjW::new(self, 8) + } + #[doc = "Bits 14:17 - PLL Symbol; selects the values 1-16 for the post VCO divider"] + #[inline(always)] + #[must_use] + pub fn pll_clkod(&mut self) -> PllClkodW { + PllClkodW::new(self, 14) + } + #[doc = "Bits 18:23 - PLL Symbol; selects the values 1-64 for the multiplication factor"] + #[inline(always)] + #[must_use] + pub fn pll_clkf(&mut self) -> PllClkfW { + PllClkfW::new(self, 18) + } + #[doc = "Bits 24:27 - PLL Symbol; selects the values 1-16 for the reference divider"] + #[inline(always)] + #[must_use] + pub fn pll_clkr(&mut self) -> PllClkrW { + PllClkrW::new(self, 24) + } + #[doc = "Bits 28:29 - Selects the PLL out divider to divide by 1/2/4/8"] + #[inline(always)] + #[must_use] + pub fn clk_div_sel(&mut self) -> ClkDivSelW { + ClkDivSelW::new(self, 28) + } + #[doc = "Bit 30 - Writing this bit to 1 puts the PLL into reset"] + #[inline(always)] + #[must_use] + pub fn pll_reset(&mut self) -> PllResetW { + PllResetW::new(self, 30) + } + #[doc = "Bit 31 - Enable the circuit that detects loss of SYS_CLK"] + #[inline(always)] + #[must_use] + pub fn sys_clk_lost_det_en(&mut self) -> SysClkLostDetEnW { + SysClkLostDetEnW::new(self, 31) } } -#[doc = "Clock Generation Module Control Register 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl0](index.html) module"] -pub struct CTRL0_SPEC; -impl crate::RegisterSpec for CTRL0_SPEC { +#[doc = "Clock Generation Module Control Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctrl0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctrl0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ctrl0Spec; +impl crate::RegisterSpec for Ctrl0Spec { type Ux = u32; } -#[doc = "`read()` method returns [ctrl0::R](R) reader structure"] -impl crate::Readable for CTRL0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ctrl0::W](W) writer structure"] -impl crate::Writable for CTRL0_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`ctrl0::R`](R) reader structure"] +impl crate::Readable for Ctrl0Spec {} +#[doc = "`write(|w| ..)` method takes [`ctrl0::W`](W) writer structure"] +impl crate::Writable for Ctrl0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTRL0 to value 0x30"] -impl crate::Resettable for CTRL0_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0x30 - } +impl crate::Resettable for Ctrl0Spec { + const RESET_VALUE: u32 = 0x30; } diff --git a/va416xx/src/clkgen/ctrl1.rs b/va416xx/src/clkgen/ctrl1.rs index 02eb12d..a9340d9 100644 --- a/va416xx/src/clkgen/ctrl1.rs +++ b/va416xx/src/clkgen/ctrl1.rs @@ -1,338 +1,115 @@ #[doc = "Register `CTRL1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CTRL1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `ADC_CLK_DIV_SEL` reader - Clock divider select for ADC"] -pub struct ADC_CLK_DIV_SEL_R(crate::FieldReader); -impl ADC_CLK_DIV_SEL_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - ADC_CLK_DIV_SEL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ADC_CLK_DIV_SEL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `ADC_CLK_DIV_SEL` writer - Clock divider select for ADC"] -pub struct ADC_CLK_DIV_SEL_W<'a> { - w: &'a mut W, -} -impl<'a> ADC_CLK_DIV_SEL_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x03 << 5)) | ((value as u32 & 0x03) << 5); - self.w - } -} -#[doc = "Field `XTAL_N_EN` reader - Enables XTAL_N output"] -pub struct XTAL_N_EN_R(crate::FieldReader); -impl XTAL_N_EN_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - XTAL_N_EN_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for XTAL_N_EN_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `XTAL_N_EN` writer - Enables XTAL_N output"] -pub struct XTAL_N_EN_W<'a> { - w: &'a mut W, -} -impl<'a> XTAL_N_EN_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); - self.w - } -} -#[doc = "Field `XTAL_EN` reader - Enables the crystal oscillator"] -pub struct XTAL_EN_R(crate::FieldReader); -impl XTAL_EN_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - XTAL_EN_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for XTAL_EN_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `XTAL_EN` writer - Enables the crystal oscillator"] -pub struct XTAL_EN_W<'a> { - w: &'a mut W, -} -impl<'a> XTAL_EN_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); - self.w - } -} -#[doc = "Field `PLL_LOST_LOCK_DET_EN` reader - Enables the PLL lock lost detection circuit"] -pub struct PLL_LOST_LOCK_DET_EN_R(crate::FieldReader); -impl PLL_LOST_LOCK_DET_EN_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - PLL_LOST_LOCK_DET_EN_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PLL_LOST_LOCK_DET_EN_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `PLL_LOST_LOCK_DET_EN` writer - Enables the PLL lock lost detection circuit"] -pub struct PLL_LOST_LOCK_DET_EN_W<'a> { - w: &'a mut W, -} -impl<'a> PLL_LOST_LOCK_DET_EN_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); - self.w - } -} -#[doc = "Field `PLL_LCK_DET_REARM` reader - Resets/Rearms the PLL lock detect circuit"] -pub struct PLL_LCK_DET_REARM_R(crate::FieldReader); -impl PLL_LCK_DET_REARM_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - PLL_LCK_DET_REARM_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PLL_LCK_DET_REARM_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `PLL_LCK_DET_REARM` writer - Resets/Rearms the PLL lock detect circuit"] -pub struct PLL_LCK_DET_REARM_W<'a> { - w: &'a mut W, -} -impl<'a> PLL_LCK_DET_REARM_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); - self.w - } -} +pub type W = crate::W; #[doc = "Field `SYS_CLK_LOST_DET_REARM` reader - Resets/Rearms the SYS_CLK lost detection feature"] -pub struct SYS_CLK_LOST_DET_REARM_R(crate::FieldReader); -impl SYS_CLK_LOST_DET_REARM_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - SYS_CLK_LOST_DET_REARM_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for SYS_CLK_LOST_DET_REARM_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type SysClkLostDetRearmR = crate::BitReader; #[doc = "Field `SYS_CLK_LOST_DET_REARM` writer - Resets/Rearms the SYS_CLK lost detection feature"] -pub struct SYS_CLK_LOST_DET_REARM_W<'a> { - w: &'a mut W, -} -impl<'a> SYS_CLK_LOST_DET_REARM_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} +pub type SysClkLostDetRearmW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `PLL_LCK_DET_REARM` reader - Resets/Rearms the PLL lock detect circuit"] +pub type PllLckDetRearmR = crate::BitReader; +#[doc = "Field `PLL_LCK_DET_REARM` writer - Resets/Rearms the PLL lock detect circuit"] +pub type PllLckDetRearmW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `PLL_LOST_LOCK_DET_EN` reader - Enables the PLL lock lost detection circuit"] +pub type PllLostLockDetEnR = crate::BitReader; +#[doc = "Field `PLL_LOST_LOCK_DET_EN` writer - Enables the PLL lock lost detection circuit"] +pub type PllLostLockDetEnW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `XTAL_EN` reader - Enables the crystal oscillator"] +pub type XtalEnR = crate::BitReader; +#[doc = "Field `XTAL_EN` writer - Enables the crystal oscillator"] +pub type XtalEnW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `XTAL_N_EN` reader - Enables XTAL_N output"] +pub type XtalNEnR = crate::BitReader; +#[doc = "Field `XTAL_N_EN` writer - Enables XTAL_N output"] +pub type XtalNEnW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `ADC_CLK_DIV_SEL` reader - Clock divider select for ADC"] +pub type AdcClkDivSelR = crate::FieldReader; +#[doc = "Field `ADC_CLK_DIV_SEL` writer - Clock divider select for ADC"] +pub type AdcClkDivSelW<'a, REG> = crate::FieldWriter<'a, REG, 2>; impl R { - #[doc = "Bits 5:6 - Clock divider select for ADC"] + #[doc = "Bit 0 - Resets/Rearms the SYS_CLK lost detection feature"] #[inline(always)] - pub fn adc_clk_div_sel(&self) -> ADC_CLK_DIV_SEL_R { - ADC_CLK_DIV_SEL_R::new(((self.bits >> 5) & 0x03) as u8) - } - #[doc = "Bit 4 - Enables XTAL_N output"] - #[inline(always)] - pub fn xtal_n_en(&self) -> XTAL_N_EN_R { - XTAL_N_EN_R::new(((self.bits >> 4) & 0x01) != 0) - } - #[doc = "Bit 3 - Enables the crystal oscillator"] - #[inline(always)] - pub fn xtal_en(&self) -> XTAL_EN_R { - XTAL_EN_R::new(((self.bits >> 3) & 0x01) != 0) - } - #[doc = "Bit 2 - Enables the PLL lock lost detection circuit"] - #[inline(always)] - pub fn pll_lost_lock_det_en(&self) -> PLL_LOST_LOCK_DET_EN_R { - PLL_LOST_LOCK_DET_EN_R::new(((self.bits >> 2) & 0x01) != 0) + pub fn sys_clk_lost_det_rearm(&self) -> SysClkLostDetRearmR { + SysClkLostDetRearmR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Resets/Rearms the PLL lock detect circuit"] #[inline(always)] - pub fn pll_lck_det_rearm(&self) -> PLL_LCK_DET_REARM_R { - PLL_LCK_DET_REARM_R::new(((self.bits >> 1) & 0x01) != 0) + pub fn pll_lck_det_rearm(&self) -> PllLckDetRearmR { + PllLckDetRearmR::new(((self.bits >> 1) & 1) != 0) } - #[doc = "Bit 0 - Resets/Rearms the SYS_CLK lost detection feature"] + #[doc = "Bit 2 - Enables the PLL lock lost detection circuit"] #[inline(always)] - pub fn sys_clk_lost_det_rearm(&self) -> SYS_CLK_LOST_DET_REARM_R { - SYS_CLK_LOST_DET_REARM_R::new((self.bits & 0x01) != 0) + pub fn pll_lost_lock_det_en(&self) -> PllLostLockDetEnR { + PllLostLockDetEnR::new(((self.bits >> 2) & 1) != 0) + } + #[doc = "Bit 3 - Enables the crystal oscillator"] + #[inline(always)] + pub fn xtal_en(&self) -> XtalEnR { + XtalEnR::new(((self.bits >> 3) & 1) != 0) + } + #[doc = "Bit 4 - Enables XTAL_N output"] + #[inline(always)] + pub fn xtal_n_en(&self) -> XtalNEnR { + XtalNEnR::new(((self.bits >> 4) & 1) != 0) + } + #[doc = "Bits 5:6 - Clock divider select for ADC"] + #[inline(always)] + pub fn adc_clk_div_sel(&self) -> AdcClkDivSelR { + AdcClkDivSelR::new(((self.bits >> 5) & 3) as u8) } } impl W { - #[doc = "Bits 5:6 - Clock divider select for ADC"] + #[doc = "Bit 0 - Resets/Rearms the SYS_CLK lost detection feature"] #[inline(always)] - pub fn adc_clk_div_sel(&mut self) -> ADC_CLK_DIV_SEL_W { - ADC_CLK_DIV_SEL_W { w: self } - } - #[doc = "Bit 4 - Enables XTAL_N output"] - #[inline(always)] - pub fn xtal_n_en(&mut self) -> XTAL_N_EN_W { - XTAL_N_EN_W { w: self } - } - #[doc = "Bit 3 - Enables the crystal oscillator"] - #[inline(always)] - pub fn xtal_en(&mut self) -> XTAL_EN_W { - XTAL_EN_W { w: self } - } - #[doc = "Bit 2 - Enables the PLL lock lost detection circuit"] - #[inline(always)] - pub fn pll_lost_lock_det_en(&mut self) -> PLL_LOST_LOCK_DET_EN_W { - PLL_LOST_LOCK_DET_EN_W { w: self } + #[must_use] + pub fn sys_clk_lost_det_rearm(&mut self) -> SysClkLostDetRearmW { + SysClkLostDetRearmW::new(self, 0) } #[doc = "Bit 1 - Resets/Rearms the PLL lock detect circuit"] #[inline(always)] - pub fn pll_lck_det_rearm(&mut self) -> PLL_LCK_DET_REARM_W { - PLL_LCK_DET_REARM_W { w: self } + #[must_use] + pub fn pll_lck_det_rearm(&mut self) -> PllLckDetRearmW { + PllLckDetRearmW::new(self, 1) } - #[doc = "Bit 0 - Resets/Rearms the SYS_CLK lost detection feature"] + #[doc = "Bit 2 - Enables the PLL lock lost detection circuit"] #[inline(always)] - pub fn sys_clk_lost_det_rearm(&mut self) -> SYS_CLK_LOST_DET_REARM_W { - SYS_CLK_LOST_DET_REARM_W { w: self } + #[must_use] + pub fn pll_lost_lock_det_en(&mut self) -> PllLostLockDetEnW { + PllLostLockDetEnW::new(self, 2) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bit 3 - Enables the crystal oscillator"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn xtal_en(&mut self) -> XtalEnW { + XtalEnW::new(self, 3) + } + #[doc = "Bit 4 - Enables XTAL_N output"] + #[inline(always)] + #[must_use] + pub fn xtal_n_en(&mut self) -> XtalNEnW { + XtalNEnW::new(self, 4) + } + #[doc = "Bits 5:6 - Clock divider select for ADC"] + #[inline(always)] + #[must_use] + pub fn adc_clk_div_sel(&mut self) -> AdcClkDivSelW { + AdcClkDivSelW::new(self, 5) } } -#[doc = "Clock Generation Module Control Register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl1](index.html) module"] -pub struct CTRL1_SPEC; -impl crate::RegisterSpec for CTRL1_SPEC { +#[doc = "Clock Generation Module Control Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctrl1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctrl1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ctrl1Spec; +impl crate::RegisterSpec for Ctrl1Spec { type Ux = u32; } -#[doc = "`read()` method returns [ctrl1::R](R) reader structure"] -impl crate::Readable for CTRL1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ctrl1::W](W) writer structure"] -impl crate::Writable for CTRL1_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`ctrl1::R`](R) reader structure"] +impl crate::Readable for Ctrl1Spec {} +#[doc = "`write(|w| ..)` method takes [`ctrl1::W`](W) writer structure"] +impl crate::Writable for Ctrl1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTRL1 to value 0"] -impl crate::Resettable for CTRL1_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Ctrl1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/clkgen/stat.rs b/va416xx/src/clkgen/stat.rs index 0e083f5..fb89886 100644 --- a/va416xx/src/clkgen/stat.rs +++ b/va416xx/src/clkgen/stat.rs @@ -1,113 +1,43 @@ #[doc = "Register `STAT` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Field `SYSCLKLOST` reader - Set when SYS_CLK has dropped to less than 1MHz"] -pub struct SYSCLKLOST_R(crate::FieldReader); -impl SYSCLKLOST_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - SYSCLKLOST_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for SYSCLKLOST_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `LOCKLOST` reader - LOCK high Symbol indicates that RFLSIP or FBSLIP have occurred for 64 consecutive cycles"] -pub struct LOCKLOST_R(crate::FieldReader); -impl LOCKLOST_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - LOCKLOST_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for LOCKLOST_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RFSLIP` reader - Reference cycle slip output (CLKOUT frequency high)"] -pub struct RFSLIP_R(crate::FieldReader); -impl RFSLIP_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RFSLIP_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RFSLIP_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type R = crate::R; #[doc = "Field `FBSLIP` reader - Feedback cycle slip output (CLKOUT frequency low)"] -pub struct FBSLIP_R(crate::FieldReader); -impl FBSLIP_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - FBSLIP_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for FBSLIP_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type FbslipR = crate::BitReader; +#[doc = "Field `RFSLIP` reader - Reference cycle slip output (CLKOUT frequency high)"] +pub type RfslipR = crate::BitReader; +#[doc = "Field `LOCKLOST` reader - LOCK high Symbol indicates that RFLSIP or FBSLIP have occurred for 64 consecutive cycles"] +pub type LocklostR = crate::BitReader; +#[doc = "Field `SYSCLKLOST` reader - Set when SYS_CLK has dropped to less than 1MHz"] +pub type SysclklostR = crate::BitReader; impl R { - #[doc = "Bit 3 - Set when SYS_CLK has dropped to less than 1MHz"] + #[doc = "Bit 0 - Feedback cycle slip output (CLKOUT frequency low)"] #[inline(always)] - pub fn sysclklost(&self) -> SYSCLKLOST_R { - SYSCLKLOST_R::new(((self.bits >> 3) & 0x01) != 0) - } - #[doc = "Bit 2 - LOCK high Symbol indicates that RFLSIP or FBSLIP have occurred for 64 consecutive cycles"] - #[inline(always)] - pub fn locklost(&self) -> LOCKLOST_R { - LOCKLOST_R::new(((self.bits >> 2) & 0x01) != 0) + pub fn fbslip(&self) -> FbslipR { + FbslipR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Reference cycle slip output (CLKOUT frequency high)"] #[inline(always)] - pub fn rfslip(&self) -> RFSLIP_R { - RFSLIP_R::new(((self.bits >> 1) & 0x01) != 0) + pub fn rfslip(&self) -> RfslipR { + RfslipR::new(((self.bits >> 1) & 1) != 0) } - #[doc = "Bit 0 - Feedback cycle slip output (CLKOUT frequency low)"] + #[doc = "Bit 2 - LOCK high Symbol indicates that RFLSIP or FBSLIP have occurred for 64 consecutive cycles"] #[inline(always)] - pub fn fbslip(&self) -> FBSLIP_R { - FBSLIP_R::new((self.bits & 0x01) != 0) + pub fn locklost(&self) -> LocklostR { + LocklostR::new(((self.bits >> 2) & 1) != 0) + } + #[doc = "Bit 3 - Set when SYS_CLK has dropped to less than 1MHz"] + #[inline(always)] + pub fn sysclklost(&self) -> SysclklostR { + SysclklostR::new(((self.bits >> 3) & 1) != 0) } } -#[doc = "Clock Generation Module Status Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [stat](index.html) module"] -pub struct STAT_SPEC; -impl crate::RegisterSpec for STAT_SPEC { +#[doc = "Clock Generation Module Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`stat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StatSpec; +impl crate::RegisterSpec for StatSpec { type Ux = u32; } -#[doc = "`read()` method returns [stat::R](R) reader structure"] -impl crate::Readable for STAT_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`stat::R`](R) reader structure"] +impl crate::Readable for StatSpec {} #[doc = "`reset()` method sets STAT to value 0"] -impl crate::Resettable for STAT_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for StatSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/dac0.rs b/va416xx/src/dac0.rs index 44be2ab..8ca0bd1 100644 --- a/va416xx/src/dac0.rs +++ b/va416xx/src/dac0.rs @@ -1,71 +1,139 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - #[doc = "0x00 - Control Register 0"] - pub ctrl0: crate::Reg, - #[doc = "0x04 - Control Register 1"] - pub ctrl1: crate::Reg, - #[doc = "0x08 - FIFO data"] - pub fifo_data: crate::Reg, - #[doc = "0x0c - Status"] - pub status: crate::Reg, - #[doc = "0x10 - Interrupt Enable"] - pub irq_enb: crate::Reg, - #[doc = "0x14 - Raw Interrupt Status"] - pub irq_raw: crate::Reg, - #[doc = "0x18 - Enabled Interrupt Status"] - pub irq_end: crate::Reg, - #[doc = "0x1c - Clear Interrupt"] - pub irq_clr: crate::Reg, - #[doc = "0x20 - Receive FIFO Interrupt Trigger Value"] - pub txfifoirqtrg: crate::Reg, - #[doc = "0x24 - FIFO Clear"] - pub fifo_clr: crate::Reg, + ctrl0: Ctrl0, + ctrl1: Ctrl1, + fifo_data: FifoData, + status: Status, + irq_enb: IrqEnb, + irq_raw: IrqRaw, + irq_end: IrqEnd, + irq_clr: IrqClr, + txfifoirqtrg: Txfifoirqtrg, + fifo_clr: FifoClr, _reserved10: [u8; 0x07d4], - #[doc = "0x7fc - Peripheral ID Register"] - pub perid: crate::Reg, + perid: Perid, } -#[doc = "CTRL0 register accessor: an alias for `Reg`"] -pub type CTRL0 = crate::Reg; +impl RegisterBlock { + #[doc = "0x00 - Control Register 0"] + #[inline(always)] + pub const fn ctrl0(&self) -> &Ctrl0 { + &self.ctrl0 + } + #[doc = "0x04 - Control Register 1"] + #[inline(always)] + pub const fn ctrl1(&self) -> &Ctrl1 { + &self.ctrl1 + } + #[doc = "0x08 - FIFO data"] + #[inline(always)] + pub const fn fifo_data(&self) -> &FifoData { + &self.fifo_data + } + #[doc = "0x0c - Status"] + #[inline(always)] + pub const fn status(&self) -> &Status { + &self.status + } + #[doc = "0x10 - Interrupt Enable"] + #[inline(always)] + pub const fn irq_enb(&self) -> &IrqEnb { + &self.irq_enb + } + #[doc = "0x14 - Raw Interrupt Status"] + #[inline(always)] + pub const fn irq_raw(&self) -> &IrqRaw { + &self.irq_raw + } + #[doc = "0x18 - Enabled Interrupt Status"] + #[inline(always)] + pub const fn irq_end(&self) -> &IrqEnd { + &self.irq_end + } + #[doc = "0x1c - Clear Interrupt"] + #[inline(always)] + pub const fn irq_clr(&self) -> &IrqClr { + &self.irq_clr + } + #[doc = "0x20 - Receive FIFO Interrupt Trigger Value"] + #[inline(always)] + pub const fn txfifoirqtrg(&self) -> &Txfifoirqtrg { + &self.txfifoirqtrg + } + #[doc = "0x24 - FIFO Clear"] + #[inline(always)] + pub const fn fifo_clr(&self) -> &FifoClr { + &self.fifo_clr + } + #[doc = "0x7fc - Peripheral ID Register"] + #[inline(always)] + pub const fn perid(&self) -> &Perid { + &self.perid + } +} +#[doc = "CTRL0 (rw) register accessor: Control Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctrl0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctrl0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl0`] +module"] +#[doc(alias = "CTRL0")] +pub type Ctrl0 = crate::Reg; #[doc = "Control Register 0"] pub mod ctrl0; -#[doc = "CTRL1 register accessor: an alias for `Reg`"] -pub type CTRL1 = crate::Reg; +#[doc = "CTRL1 (rw) register accessor: Control Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctrl1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctrl1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl1`] +module"] +#[doc(alias = "CTRL1")] +pub type Ctrl1 = crate::Reg; #[doc = "Control Register 1"] pub mod ctrl1; -#[doc = "FIFO_DATA register accessor: an alias for `Reg`"] -pub type FIFO_DATA = crate::Reg; +#[doc = "FIFO_DATA (rw) register accessor: FIFO data\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fifo_data::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fifo_data::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fifo_data`] +module"] +#[doc(alias = "FIFO_DATA")] +pub type FifoData = crate::Reg; #[doc = "FIFO data"] pub mod fifo_data; -#[doc = "STATUS register accessor: an alias for `Reg`"] -pub type STATUS = crate::Reg; +#[doc = "STATUS (r) register accessor: Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] +module"] +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "Status"] pub mod status; -#[doc = "IRQ_ENB register accessor: an alias for `Reg`"] -pub type IRQ_ENB = crate::Reg; +#[doc = "IRQ_ENB (rw) register accessor: Interrupt Enable\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_enb::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`irq_enb::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_enb`] +module"] +#[doc(alias = "IRQ_ENB")] +pub type IrqEnb = crate::Reg; #[doc = "Interrupt Enable"] pub mod irq_enb; -#[doc = "IRQ_RAW register accessor: an alias for `Reg`"] -pub type IRQ_RAW = crate::Reg; +#[doc = "IRQ_RAW (r) register accessor: Raw Interrupt Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_raw::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_raw`] +module"] +#[doc(alias = "IRQ_RAW")] +pub type IrqRaw = crate::Reg; #[doc = "Raw Interrupt Status"] pub mod irq_raw; -#[doc = "IRQ_END register accessor: an alias for `Reg`"] -pub type IRQ_END = crate::Reg; +#[doc = "IRQ_END (r) register accessor: Enabled Interrupt Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_end::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_end`] +module"] +#[doc(alias = "IRQ_END")] +pub type IrqEnd = crate::Reg; #[doc = "Enabled Interrupt Status"] pub mod irq_end; -#[doc = "IRQ_CLR register accessor: an alias for `Reg`"] -pub type IRQ_CLR = crate::Reg; +#[doc = "IRQ_CLR (w) register accessor: Clear Interrupt\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`irq_clr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_clr`] +module"] +#[doc(alias = "IRQ_CLR")] +pub type IrqClr = crate::Reg; #[doc = "Clear Interrupt"] pub mod irq_clr; -#[doc = "TXFIFOIRQTRG register accessor: an alias for `Reg`"] -pub type TXFIFOIRQTRG = crate::Reg; +#[doc = "TXFIFOIRQTRG (rw) register accessor: Receive FIFO Interrupt Trigger Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txfifoirqtrg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`txfifoirqtrg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txfifoirqtrg`] +module"] +#[doc(alias = "TXFIFOIRQTRG")] +pub type Txfifoirqtrg = crate::Reg; #[doc = "Receive FIFO Interrupt Trigger Value"] pub mod txfifoirqtrg; -#[doc = "FIFO_CLR register accessor: an alias for `Reg`"] -pub type FIFO_CLR = crate::Reg; +#[doc = "FIFO_CLR (rw) register accessor: FIFO Clear\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fifo_clr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fifo_clr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fifo_clr`] +module"] +#[doc(alias = "FIFO_CLR")] +pub type FifoClr = crate::Reg; #[doc = "FIFO Clear"] pub mod fifo_clr; -#[doc = "PERID register accessor: an alias for `Reg`"] -pub type PERID = crate::Reg; +#[doc = "PERID (r) register accessor: Peripheral ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`perid::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@perid`] +module"] +#[doc(alias = "PERID")] +pub type Perid = crate::Reg; #[doc = "Peripheral ID Register"] pub mod perid; diff --git a/va416xx/src/dac0/ctrl0.rs b/va416xx/src/dac0/ctrl0.rs index e3e6b1f..ebf18e2 100644 --- a/va416xx/src/dac0/ctrl0.rs +++ b/va416xx/src/dac0/ctrl0.rs @@ -1,160 +1,55 @@ #[doc = "Register `CTRL0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CTRL0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `MAN_TRIG_EN` reader - Enables manual trigger"] -pub struct MAN_TRIG_EN_R(crate::FieldReader); -impl MAN_TRIG_EN_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - MAN_TRIG_EN_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for MAN_TRIG_EN_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `MAN_TRIG_EN` writer - Enables manual trigger"] -pub struct MAN_TRIG_EN_W<'a> { - w: &'a mut W, -} -impl<'a> MAN_TRIG_EN_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); - self.w - } -} +pub type W = crate::W; #[doc = "Field `EXT_TRIG_EN` reader - Enables external trigger"] -pub struct EXT_TRIG_EN_R(crate::FieldReader); -impl EXT_TRIG_EN_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - EXT_TRIG_EN_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for EXT_TRIG_EN_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type ExtTrigEnR = crate::BitReader; #[doc = "Field `EXT_TRIG_EN` writer - Enables external trigger"] -pub struct EXT_TRIG_EN_W<'a> { - w: &'a mut W, -} -impl<'a> EXT_TRIG_EN_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); - self.w - } -} +pub type ExtTrigEnW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `MAN_TRIG_EN` reader - Enables manual trigger"] +pub type ManTrigEnR = crate::BitReader; +#[doc = "Field `MAN_TRIG_EN` writer - Enables manual trigger"] +pub type ManTrigEnW<'a, REG> = crate::BitWriter<'a, REG>; impl R { - #[doc = "Bit 11 - Enables manual trigger"] - #[inline(always)] - pub fn man_trig_en(&self) -> MAN_TRIG_EN_R { - MAN_TRIG_EN_R::new(((self.bits >> 11) & 0x01) != 0) - } #[doc = "Bit 10 - Enables external trigger"] #[inline(always)] - pub fn ext_trig_en(&self) -> EXT_TRIG_EN_R { - EXT_TRIG_EN_R::new(((self.bits >> 10) & 0x01) != 0) + pub fn ext_trig_en(&self) -> ExtTrigEnR { + ExtTrigEnR::new(((self.bits >> 10) & 1) != 0) + } + #[doc = "Bit 11 - Enables manual trigger"] + #[inline(always)] + pub fn man_trig_en(&self) -> ManTrigEnR { + ManTrigEnR::new(((self.bits >> 11) & 1) != 0) } } impl W { - #[doc = "Bit 11 - Enables manual trigger"] - #[inline(always)] - pub fn man_trig_en(&mut self) -> MAN_TRIG_EN_W { - MAN_TRIG_EN_W { w: self } - } #[doc = "Bit 10 - Enables external trigger"] #[inline(always)] - pub fn ext_trig_en(&mut self) -> EXT_TRIG_EN_W { - EXT_TRIG_EN_W { w: self } + #[must_use] + pub fn ext_trig_en(&mut self) -> ExtTrigEnW { + ExtTrigEnW::new(self, 10) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bit 11 - Enables manual trigger"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn man_trig_en(&mut self) -> ManTrigEnW { + ManTrigEnW::new(self, 11) } } -#[doc = "Control Register 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl0](index.html) module"] -pub struct CTRL0_SPEC; -impl crate::RegisterSpec for CTRL0_SPEC { +#[doc = "Control Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctrl0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctrl0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ctrl0Spec; +impl crate::RegisterSpec for Ctrl0Spec { type Ux = u32; } -#[doc = "`read()` method returns [ctrl0::R](R) reader structure"] -impl crate::Readable for CTRL0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ctrl0::W](W) writer structure"] -impl crate::Writable for CTRL0_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`ctrl0::R`](R) reader structure"] +impl crate::Readable for Ctrl0Spec {} +#[doc = "`write(|w| ..)` method takes [`ctrl0::W`](W) writer structure"] +impl crate::Writable for Ctrl0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTRL0 to value 0"] -impl crate::Resettable for CTRL0_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Ctrl0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/dac0/ctrl1.rs b/va416xx/src/dac0/ctrl1.rs index 8851082..0bc3232 100644 --- a/va416xx/src/dac0/ctrl1.rs +++ b/va416xx/src/dac0/ctrl1.rs @@ -1,150 +1,55 @@ #[doc = "Register `CTRL1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CTRL1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `DAC_EN` reader - Enables the DAC analog block"] -pub struct DAC_EN_R(crate::FieldReader); -impl DAC_EN_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - DAC_EN_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for DAC_EN_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `DAC_EN` writer - Enables the DAC analog block"] -pub struct DAC_EN_W<'a> { - w: &'a mut W, -} -impl<'a> DAC_EN_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); - self.w - } -} +pub type W = crate::W; #[doc = "Field `DAC_SETTLING` reader - Sets the the amount of time in microseconds the control FSM waits for the DAC settling time"] -pub struct DAC_SETTLING_R(crate::FieldReader); -impl DAC_SETTLING_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - DAC_SETTLING_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for DAC_SETTLING_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type DacSettlingR = crate::FieldReader; #[doc = "Field `DAC_SETTLING` writer - Sets the the amount of time in microseconds the control FSM waits for the DAC settling time"] -pub struct DAC_SETTLING_W<'a> { - w: &'a mut W, -} -impl<'a> DAC_SETTLING_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x07 << 5)) | ((value as u32 & 0x07) << 5); - self.w - } -} +pub type DacSettlingW<'a, REG> = crate::FieldWriter<'a, REG, 3>; +#[doc = "Field `DAC_EN` reader - Enables the DAC analog block"] +pub type DacEnR = crate::BitReader; +#[doc = "Field `DAC_EN` writer - Enables the DAC analog block"] +pub type DacEnW<'a, REG> = crate::BitWriter<'a, REG>; impl R { - #[doc = "Bit 8 - Enables the DAC analog block"] - #[inline(always)] - pub fn dac_en(&self) -> DAC_EN_R { - DAC_EN_R::new(((self.bits >> 8) & 0x01) != 0) - } #[doc = "Bits 5:7 - Sets the the amount of time in microseconds the control FSM waits for the DAC settling time"] #[inline(always)] - pub fn dac_settling(&self) -> DAC_SETTLING_R { - DAC_SETTLING_R::new(((self.bits >> 5) & 0x07) as u8) + pub fn dac_settling(&self) -> DacSettlingR { + DacSettlingR::new(((self.bits >> 5) & 7) as u8) + } + #[doc = "Bit 8 - Enables the DAC analog block"] + #[inline(always)] + pub fn dac_en(&self) -> DacEnR { + DacEnR::new(((self.bits >> 8) & 1) != 0) } } impl W { - #[doc = "Bit 8 - Enables the DAC analog block"] - #[inline(always)] - pub fn dac_en(&mut self) -> DAC_EN_W { - DAC_EN_W { w: self } - } #[doc = "Bits 5:7 - Sets the the amount of time in microseconds the control FSM waits for the DAC settling time"] #[inline(always)] - pub fn dac_settling(&mut self) -> DAC_SETTLING_W { - DAC_SETTLING_W { w: self } + #[must_use] + pub fn dac_settling(&mut self) -> DacSettlingW { + DacSettlingW::new(self, 5) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bit 8 - Enables the DAC analog block"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn dac_en(&mut self) -> DacEnW { + DacEnW::new(self, 8) } } -#[doc = "Control Register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl1](index.html) module"] -pub struct CTRL1_SPEC; -impl crate::RegisterSpec for CTRL1_SPEC { +#[doc = "Control Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctrl1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctrl1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ctrl1Spec; +impl crate::RegisterSpec for Ctrl1Spec { type Ux = u32; } -#[doc = "`read()` method returns [ctrl1::R](R) reader structure"] -impl crate::Readable for CTRL1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ctrl1::W](W) writer structure"] -impl crate::Writable for CTRL1_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`ctrl1::R`](R) reader structure"] +impl crate::Readable for Ctrl1Spec {} +#[doc = "`write(|w| ..)` method takes [`ctrl1::W`](W) writer structure"] +impl crate::Writable for Ctrl1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTRL1 to value 0"] -impl crate::Resettable for CTRL1_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Ctrl1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/dac0/fifo_clr.rs b/va416xx/src/dac0/fifo_clr.rs index 43fbad2..96ceabc 100644 --- a/va416xx/src/dac0/fifo_clr.rs +++ b/va416xx/src/dac0/fifo_clr.rs @@ -1,91 +1,31 @@ #[doc = "Register `FIFO_CLR` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `FIFO_CLR` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `FIFO_CLR` writer - Clears the DAC FIFO. Always reads 0"] -pub struct FIFO_CLR_W<'a> { - w: &'a mut W, -} -impl<'a> FIFO_CLR_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} +pub type FifoClrW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Clears the DAC FIFO. Always reads 0"] #[inline(always)] - pub fn fifo_clr(&mut self) -> FIFO_CLR_W { - FIFO_CLR_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn fifo_clr(&mut self) -> FifoClrW { + FifoClrW::new(self, 0) } } -#[doc = "FIFO Clear\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [fifo_clr](index.html) module"] -pub struct FIFO_CLR_SPEC; -impl crate::RegisterSpec for FIFO_CLR_SPEC { +#[doc = "FIFO Clear\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fifo_clr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fifo_clr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct FifoClrSpec; +impl crate::RegisterSpec for FifoClrSpec { type Ux = u32; } -#[doc = "`read()` method returns [fifo_clr::R](R) reader structure"] -impl crate::Readable for FIFO_CLR_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [fifo_clr::W](W) writer structure"] -impl crate::Writable for FIFO_CLR_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`fifo_clr::R`](R) reader structure"] +impl crate::Readable for FifoClrSpec {} +#[doc = "`write(|w| ..)` method takes [`fifo_clr::W`](W) writer structure"] +impl crate::Writable for FifoClrSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets FIFO_CLR to value 0"] -impl crate::Resettable for FIFO_CLR_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for FifoClrSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/dac0/fifo_data.rs b/va416xx/src/dac0/fifo_data.rs index 49a5e2f..63aeaaa 100644 --- a/va416xx/src/dac0/fifo_data.rs +++ b/va416xx/src/dac0/fifo_data.rs @@ -1,81 +1,31 @@ #[doc = "Register `FIFO_DATA` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `FIFO_DATA` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DATA` writer - Data for FIFO write"] -pub struct DATA_W<'a> { - w: &'a mut W, -} -impl<'a> DATA_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !0x0fff) | (value as u32 & 0x0fff); - self.w - } -} +pub type DataW<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; impl W { #[doc = "Bits 0:11 - Data for FIFO write"] #[inline(always)] - pub fn data(&mut self) -> DATA_W { - DATA_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn data(&mut self) -> DataW { + DataW::new(self, 0) } } -#[doc = "FIFO data\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [fifo_data](index.html) module"] -pub struct FIFO_DATA_SPEC; -impl crate::RegisterSpec for FIFO_DATA_SPEC { +#[doc = "FIFO data\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fifo_data::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fifo_data::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct FifoDataSpec; +impl crate::RegisterSpec for FifoDataSpec { type Ux = u32; } -#[doc = "`read()` method returns [fifo_data::R](R) reader structure"] -impl crate::Readable for FIFO_DATA_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [fifo_data::W](W) writer structure"] -impl crate::Writable for FIFO_DATA_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`fifo_data::R`](R) reader structure"] +impl crate::Readable for FifoDataSpec {} +#[doc = "`write(|w| ..)` method takes [`fifo_data::W`](W) writer structure"] +impl crate::Writable for FifoDataSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets FIFO_DATA to value 0"] -impl crate::Resettable for FIFO_DATA_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for FifoDataSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/dac0/irq_clr.rs b/va416xx/src/dac0/irq_clr.rs index 2f91f97..da11188 100644 --- a/va416xx/src/dac0/irq_clr.rs +++ b/va416xx/src/dac0/irq_clr.rs @@ -1,153 +1,51 @@ #[doc = "Register `IRQ_CLR` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `TRIG_ERROR` writer - Clears the trigger error interrupt status. Always reads 0"] -pub struct TRIG_ERROR_W<'a> { - w: &'a mut W, -} -impl<'a> TRIG_ERROR_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); - self.w - } -} -#[doc = "Field `DAC_DONE` writer - Clears the DAC done interrupt status. Always reads 0"] -pub struct DAC_DONE_W<'a> { - w: &'a mut W, -} -impl<'a> DAC_DONE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); - self.w - } -} -#[doc = "Field `FIFO_UFLOW` writer - Clears the FIFO underflow interrupt status. Always reads 0"] -pub struct FIFO_UFLOW_W<'a> { - w: &'a mut W, -} -impl<'a> FIFO_UFLOW_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); - self.w - } -} +pub type W = crate::W; #[doc = "Field `FIFO_OFLOW` writer - Clears the FIFO overflow interrupt status. Always reads 0"] -pub struct FIFO_OFLOW_W<'a> { - w: &'a mut W, -} -impl<'a> FIFO_OFLOW_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} +pub type FifoOflowW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `FIFO_UFLOW` writer - Clears the FIFO underflow interrupt status. Always reads 0"] +pub type FifoUflowW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `DAC_DONE` writer - Clears the DAC done interrupt status. Always reads 0"] +pub type DacDoneW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TRIG_ERROR` writer - Clears the trigger error interrupt status. Always reads 0"] +pub type TrigErrorW<'a, REG> = crate::BitWriter<'a, REG>; impl W { - #[doc = "Bit 3 - Clears the trigger error interrupt status. Always reads 0"] + #[doc = "Bit 0 - Clears the FIFO overflow interrupt status. Always reads 0"] #[inline(always)] - pub fn trig_error(&mut self) -> TRIG_ERROR_W { - TRIG_ERROR_W { w: self } - } - #[doc = "Bit 2 - Clears the DAC done interrupt status. Always reads 0"] - #[inline(always)] - pub fn dac_done(&mut self) -> DAC_DONE_W { - DAC_DONE_W { w: self } + #[must_use] + pub fn fifo_oflow(&mut self) -> FifoOflowW { + FifoOflowW::new(self, 0) } #[doc = "Bit 1 - Clears the FIFO underflow interrupt status. Always reads 0"] #[inline(always)] - pub fn fifo_uflow(&mut self) -> FIFO_UFLOW_W { - FIFO_UFLOW_W { w: self } + #[must_use] + pub fn fifo_uflow(&mut self) -> FifoUflowW { + FifoUflowW::new(self, 1) } - #[doc = "Bit 0 - Clears the FIFO overflow interrupt status. Always reads 0"] + #[doc = "Bit 2 - Clears the DAC done interrupt status. Always reads 0"] #[inline(always)] - pub fn fifo_oflow(&mut self) -> FIFO_OFLOW_W { - FIFO_OFLOW_W { w: self } + #[must_use] + pub fn dac_done(&mut self) -> DacDoneW { + DacDoneW::new(self, 2) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bit 3 - Clears the trigger error interrupt status. Always reads 0"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn trig_error(&mut self) -> TrigErrorW { + TrigErrorW::new(self, 3) } } -#[doc = "Clear Interrupt\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [irq_clr](index.html) module"] -pub struct IRQ_CLR_SPEC; -impl crate::RegisterSpec for IRQ_CLR_SPEC { +#[doc = "Clear Interrupt\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`irq_clr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IrqClrSpec; +impl crate::RegisterSpec for IrqClrSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [irq_clr::W](W) writer structure"] -impl crate::Writable for IRQ_CLR_SPEC { - type Writer = W; +#[doc = "`write(|w| ..)` method takes [`irq_clr::W`](W) writer structure"] +impl crate::Writable for IrqClrSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IRQ_CLR to value 0"] -impl crate::Resettable for IRQ_CLR_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for IrqClrSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/dac0/irq_enb.rs b/va416xx/src/dac0/irq_enb.rs index f40f538..9c0718e 100644 --- a/va416xx/src/dac0/irq_enb.rs +++ b/va416xx/src/dac0/irq_enb.rs @@ -1,395 +1,130 @@ #[doc = "Register `IRQ_ENB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IRQ_ENB` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `FIFO_DEPTH_TRIG` reader - Enables the interrupt for the FIFO entry count is less than or equal to the trigger level"] -pub struct FIFO_DEPTH_TRIG_R(crate::FieldReader); -impl FIFO_DEPTH_TRIG_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - FIFO_DEPTH_TRIG_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for FIFO_DEPTH_TRIG_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `FIFO_DEPTH_TRIG` writer - Enables the interrupt for the FIFO entry count is less than or equal to the trigger level"] -pub struct FIFO_DEPTH_TRIG_W<'a> { - w: &'a mut W, -} -impl<'a> FIFO_DEPTH_TRIG_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); - self.w - } -} -#[doc = "Field `TRIG_ERROR` reader - Enables the interrupt for a trigger error"] -pub struct TRIG_ERROR_R(crate::FieldReader); -impl TRIG_ERROR_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TRIG_ERROR_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TRIG_ERROR_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TRIG_ERROR` writer - Enables the interrupt for a trigger error"] -pub struct TRIG_ERROR_W<'a> { - w: &'a mut W, -} -impl<'a> TRIG_ERROR_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); - self.w - } -} -#[doc = "Field `DAC_DONE` reader - Enables the interrupt for a DAC data acquisition completion"] -pub struct DAC_DONE_R(crate::FieldReader); -impl DAC_DONE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - DAC_DONE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for DAC_DONE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `DAC_DONE` writer - Enables the interrupt for a DAC data acquisition completion"] -pub struct DAC_DONE_W<'a> { - w: &'a mut W, -} -impl<'a> DAC_DONE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); - self.w - } -} -#[doc = "Field `FIFO_UFLOW` reader - Enables the interrupt for a FIFO underflow"] -pub struct FIFO_UFLOW_R(crate::FieldReader); -impl FIFO_UFLOW_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - FIFO_UFLOW_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for FIFO_UFLOW_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `FIFO_UFLOW` writer - Enables the interrupt for a FIFO underflow"] -pub struct FIFO_UFLOW_W<'a> { - w: &'a mut W, -} -impl<'a> FIFO_UFLOW_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); - self.w - } -} -#[doc = "Field `FIFO_OFLOW` reader - Enables the interrupt for a FIFO overflow"] -pub struct FIFO_OFLOW_R(crate::FieldReader); -impl FIFO_OFLOW_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - FIFO_OFLOW_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for FIFO_OFLOW_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `FIFO_OFLOW` writer - Enables the interrupt for a FIFO overflow"] -pub struct FIFO_OFLOW_W<'a> { - w: &'a mut W, -} -impl<'a> FIFO_OFLOW_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); - self.w - } -} -#[doc = "Field `FIFO_FULL` reader - Enables the interrupt for FIFO full"] -pub struct FIFO_FULL_R(crate::FieldReader); -impl FIFO_FULL_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - FIFO_FULL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for FIFO_FULL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `FIFO_FULL` writer - Enables the interrupt for FIFO full"] -pub struct FIFO_FULL_W<'a> { - w: &'a mut W, -} -impl<'a> FIFO_FULL_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); - self.w - } -} +pub type W = crate::W; #[doc = "Field `FIFO_EMPTY` reader - Enables the interrupt for FIFO empty"] -pub struct FIFO_EMPTY_R(crate::FieldReader); -impl FIFO_EMPTY_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - FIFO_EMPTY_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for FIFO_EMPTY_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type FifoEmptyR = crate::BitReader; #[doc = "Field `FIFO_EMPTY` writer - Enables the interrupt for FIFO empty"] -pub struct FIFO_EMPTY_W<'a> { - w: &'a mut W, -} -impl<'a> FIFO_EMPTY_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} +pub type FifoEmptyW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `FIFO_FULL` reader - Enables the interrupt for FIFO full"] +pub type FifoFullR = crate::BitReader; +#[doc = "Field `FIFO_FULL` writer - Enables the interrupt for FIFO full"] +pub type FifoFullW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `FIFO_OFLOW` reader - Enables the interrupt for a FIFO overflow"] +pub type FifoOflowR = crate::BitReader; +#[doc = "Field `FIFO_OFLOW` writer - Enables the interrupt for a FIFO overflow"] +pub type FifoOflowW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `FIFO_UFLOW` reader - Enables the interrupt for a FIFO underflow"] +pub type FifoUflowR = crate::BitReader; +#[doc = "Field `FIFO_UFLOW` writer - Enables the interrupt for a FIFO underflow"] +pub type FifoUflowW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `DAC_DONE` reader - Enables the interrupt for a DAC data acquisition completion"] +pub type DacDoneR = crate::BitReader; +#[doc = "Field `DAC_DONE` writer - Enables the interrupt for a DAC data acquisition completion"] +pub type DacDoneW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TRIG_ERROR` reader - Enables the interrupt for a trigger error"] +pub type TrigErrorR = crate::BitReader; +#[doc = "Field `TRIG_ERROR` writer - Enables the interrupt for a trigger error"] +pub type TrigErrorW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `FIFO_DEPTH_TRIG` reader - Enables the interrupt for the FIFO entry count is less than or equal to the trigger level"] +pub type FifoDepthTrigR = crate::BitReader; +#[doc = "Field `FIFO_DEPTH_TRIG` writer - Enables the interrupt for the FIFO entry count is less than or equal to the trigger level"] +pub type FifoDepthTrigW<'a, REG> = crate::BitWriter<'a, REG>; impl R { - #[doc = "Bit 6 - Enables the interrupt for the FIFO entry count is less than or equal to the trigger level"] + #[doc = "Bit 0 - Enables the interrupt for FIFO empty"] #[inline(always)] - pub fn fifo_depth_trig(&self) -> FIFO_DEPTH_TRIG_R { - FIFO_DEPTH_TRIG_R::new(((self.bits >> 6) & 0x01) != 0) - } - #[doc = "Bit 5 - Enables the interrupt for a trigger error"] - #[inline(always)] - pub fn trig_error(&self) -> TRIG_ERROR_R { - TRIG_ERROR_R::new(((self.bits >> 5) & 0x01) != 0) - } - #[doc = "Bit 4 - Enables the interrupt for a DAC data acquisition completion"] - #[inline(always)] - pub fn dac_done(&self) -> DAC_DONE_R { - DAC_DONE_R::new(((self.bits >> 4) & 0x01) != 0) - } - #[doc = "Bit 3 - Enables the interrupt for a FIFO underflow"] - #[inline(always)] - pub fn fifo_uflow(&self) -> FIFO_UFLOW_R { - FIFO_UFLOW_R::new(((self.bits >> 3) & 0x01) != 0) - } - #[doc = "Bit 2 - Enables the interrupt for a FIFO overflow"] - #[inline(always)] - pub fn fifo_oflow(&self) -> FIFO_OFLOW_R { - FIFO_OFLOW_R::new(((self.bits >> 2) & 0x01) != 0) + pub fn fifo_empty(&self) -> FifoEmptyR { + FifoEmptyR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Enables the interrupt for FIFO full"] #[inline(always)] - pub fn fifo_full(&self) -> FIFO_FULL_R { - FIFO_FULL_R::new(((self.bits >> 1) & 0x01) != 0) + pub fn fifo_full(&self) -> FifoFullR { + FifoFullR::new(((self.bits >> 1) & 1) != 0) } - #[doc = "Bit 0 - Enables the interrupt for FIFO empty"] + #[doc = "Bit 2 - Enables the interrupt for a FIFO overflow"] #[inline(always)] - pub fn fifo_empty(&self) -> FIFO_EMPTY_R { - FIFO_EMPTY_R::new((self.bits & 0x01) != 0) + pub fn fifo_oflow(&self) -> FifoOflowR { + FifoOflowR::new(((self.bits >> 2) & 1) != 0) + } + #[doc = "Bit 3 - Enables the interrupt for a FIFO underflow"] + #[inline(always)] + pub fn fifo_uflow(&self) -> FifoUflowR { + FifoUflowR::new(((self.bits >> 3) & 1) != 0) + } + #[doc = "Bit 4 - Enables the interrupt for a DAC data acquisition completion"] + #[inline(always)] + pub fn dac_done(&self) -> DacDoneR { + DacDoneR::new(((self.bits >> 4) & 1) != 0) + } + #[doc = "Bit 5 - Enables the interrupt for a trigger error"] + #[inline(always)] + pub fn trig_error(&self) -> TrigErrorR { + TrigErrorR::new(((self.bits >> 5) & 1) != 0) + } + #[doc = "Bit 6 - Enables the interrupt for the FIFO entry count is less than or equal to the trigger level"] + #[inline(always)] + pub fn fifo_depth_trig(&self) -> FifoDepthTrigR { + FifoDepthTrigR::new(((self.bits >> 6) & 1) != 0) } } impl W { - #[doc = "Bit 6 - Enables the interrupt for the FIFO entry count is less than or equal to the trigger level"] + #[doc = "Bit 0 - Enables the interrupt for FIFO empty"] #[inline(always)] - pub fn fifo_depth_trig(&mut self) -> FIFO_DEPTH_TRIG_W { - FIFO_DEPTH_TRIG_W { w: self } - } - #[doc = "Bit 5 - Enables the interrupt for a trigger error"] - #[inline(always)] - pub fn trig_error(&mut self) -> TRIG_ERROR_W { - TRIG_ERROR_W { w: self } - } - #[doc = "Bit 4 - Enables the interrupt for a DAC data acquisition completion"] - #[inline(always)] - pub fn dac_done(&mut self) -> DAC_DONE_W { - DAC_DONE_W { w: self } - } - #[doc = "Bit 3 - Enables the interrupt for a FIFO underflow"] - #[inline(always)] - pub fn fifo_uflow(&mut self) -> FIFO_UFLOW_W { - FIFO_UFLOW_W { w: self } - } - #[doc = "Bit 2 - Enables the interrupt for a FIFO overflow"] - #[inline(always)] - pub fn fifo_oflow(&mut self) -> FIFO_OFLOW_W { - FIFO_OFLOW_W { w: self } + #[must_use] + pub fn fifo_empty(&mut self) -> FifoEmptyW { + FifoEmptyW::new(self, 0) } #[doc = "Bit 1 - Enables the interrupt for FIFO full"] #[inline(always)] - pub fn fifo_full(&mut self) -> FIFO_FULL_W { - FIFO_FULL_W { w: self } + #[must_use] + pub fn fifo_full(&mut self) -> FifoFullW { + FifoFullW::new(self, 1) } - #[doc = "Bit 0 - Enables the interrupt for FIFO empty"] + #[doc = "Bit 2 - Enables the interrupt for a FIFO overflow"] #[inline(always)] - pub fn fifo_empty(&mut self) -> FIFO_EMPTY_W { - FIFO_EMPTY_W { w: self } + #[must_use] + pub fn fifo_oflow(&mut self) -> FifoOflowW { + FifoOflowW::new(self, 2) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bit 3 - Enables the interrupt for a FIFO underflow"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn fifo_uflow(&mut self) -> FifoUflowW { + FifoUflowW::new(self, 3) + } + #[doc = "Bit 4 - Enables the interrupt for a DAC data acquisition completion"] + #[inline(always)] + #[must_use] + pub fn dac_done(&mut self) -> DacDoneW { + DacDoneW::new(self, 4) + } + #[doc = "Bit 5 - Enables the interrupt for a trigger error"] + #[inline(always)] + #[must_use] + pub fn trig_error(&mut self) -> TrigErrorW { + TrigErrorW::new(self, 5) + } + #[doc = "Bit 6 - Enables the interrupt for the FIFO entry count is less than or equal to the trigger level"] + #[inline(always)] + #[must_use] + pub fn fifo_depth_trig(&mut self) -> FifoDepthTrigW { + FifoDepthTrigW::new(self, 6) } } -#[doc = "Interrupt Enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [irq_enb](index.html) module"] -pub struct IRQ_ENB_SPEC; -impl crate::RegisterSpec for IRQ_ENB_SPEC { +#[doc = "Interrupt Enable\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_enb::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`irq_enb::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IrqEnbSpec; +impl crate::RegisterSpec for IrqEnbSpec { type Ux = u32; } -#[doc = "`read()` method returns [irq_enb::R](R) reader structure"] -impl crate::Readable for IRQ_ENB_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [irq_enb::W](W) writer structure"] -impl crate::Writable for IRQ_ENB_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`irq_enb::R`](R) reader structure"] +impl crate::Readable for IrqEnbSpec {} +#[doc = "`write(|w| ..)` method takes [`irq_enb::W`](W) writer structure"] +impl crate::Writable for IrqEnbSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IRQ_ENB to value 0"] -impl crate::Resettable for IRQ_ENB_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for IrqEnbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/dac0/irq_end.rs b/va416xx/src/dac0/irq_end.rs index 1fcf31d..2043fc3 100644 --- a/va416xx/src/dac0/irq_end.rs +++ b/va416xx/src/dac0/irq_end.rs @@ -1,173 +1,64 @@ #[doc = "Register `IRQ_END` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Field `FIFO_DEPTH_TRIG` reader - Indicates the FIFO entry count is less than or equal to the trigger level and the interrupt is enabled"] -pub struct FIFO_DEPTH_TRIG_R(crate::FieldReader); -impl FIFO_DEPTH_TRIG_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - FIFO_DEPTH_TRIG_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for FIFO_DEPTH_TRIG_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TRIG_ERROR` reader - Indicates a manual or external trigger occurred when the DAC was BUSY doing a conversion and the interrupt is enabled"] -pub struct TRIG_ERROR_R(crate::FieldReader); -impl TRIG_ERROR_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TRIG_ERROR_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TRIG_ERROR_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `DAC_DONE` reader - Indicates that a DAC conversion is done and the interrupt is enabled"] -pub struct DAC_DONE_R(crate::FieldReader); -impl DAC_DONE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - DAC_DONE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for DAC_DONE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `FIFO_UFLOW` reader - Indicates a FIFO underflow occurred and the interrupt is enabled"] -pub struct FIFO_UFLOW_R(crate::FieldReader); -impl FIFO_UFLOW_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - FIFO_UFLOW_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for FIFO_UFLOW_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `FIFO_OFLOW` reader - Indicates a FIFO overflow occurred and the interrupt is enabled"] -pub struct FIFO_OFLOW_R(crate::FieldReader); -impl FIFO_OFLOW_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - FIFO_OFLOW_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for FIFO_OFLOW_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `FIFO_FULL` reader - Indicates the FIFO is full and the interrupt is enabled"] -pub struct FIFO_FULL_R(crate::FieldReader); -impl FIFO_FULL_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - FIFO_FULL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for FIFO_FULL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type R = crate::R; #[doc = "Field `FIFO_EMPTY` reader - Indicates the FIFO is empty and the interrupt is enabled"] -pub struct FIFO_EMPTY_R(crate::FieldReader); -impl FIFO_EMPTY_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - FIFO_EMPTY_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for FIFO_EMPTY_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type FifoEmptyR = crate::BitReader; +#[doc = "Field `FIFO_FULL` reader - Indicates the FIFO is full and the interrupt is enabled"] +pub type FifoFullR = crate::BitReader; +#[doc = "Field `FIFO_OFLOW` reader - Indicates a FIFO overflow occurred and the interrupt is enabled"] +pub type FifoOflowR = crate::BitReader; +#[doc = "Field `FIFO_UFLOW` reader - Indicates a FIFO underflow occurred and the interrupt is enabled"] +pub type FifoUflowR = crate::BitReader; +#[doc = "Field `DAC_DONE` reader - Indicates that a DAC conversion is done and the interrupt is enabled"] +pub type DacDoneR = crate::BitReader; +#[doc = "Field `TRIG_ERROR` reader - Indicates a manual or external trigger occurred when the DAC was BUSY doing a conversion and the interrupt is enabled"] +pub type TrigErrorR = crate::BitReader; +#[doc = "Field `FIFO_DEPTH_TRIG` reader - Indicates the FIFO entry count is less than or equal to the trigger level and the interrupt is enabled"] +pub type FifoDepthTrigR = crate::BitReader; impl R { - #[doc = "Bit 6 - Indicates the FIFO entry count is less than or equal to the trigger level and the interrupt is enabled"] + #[doc = "Bit 0 - Indicates the FIFO is empty and the interrupt is enabled"] #[inline(always)] - pub fn fifo_depth_trig(&self) -> FIFO_DEPTH_TRIG_R { - FIFO_DEPTH_TRIG_R::new(((self.bits >> 6) & 0x01) != 0) - } - #[doc = "Bit 5 - Indicates a manual or external trigger occurred when the DAC was BUSY doing a conversion and the interrupt is enabled"] - #[inline(always)] - pub fn trig_error(&self) -> TRIG_ERROR_R { - TRIG_ERROR_R::new(((self.bits >> 5) & 0x01) != 0) - } - #[doc = "Bit 4 - Indicates that a DAC conversion is done and the interrupt is enabled"] - #[inline(always)] - pub fn dac_done(&self) -> DAC_DONE_R { - DAC_DONE_R::new(((self.bits >> 4) & 0x01) != 0) - } - #[doc = "Bit 3 - Indicates a FIFO underflow occurred and the interrupt is enabled"] - #[inline(always)] - pub fn fifo_uflow(&self) -> FIFO_UFLOW_R { - FIFO_UFLOW_R::new(((self.bits >> 3) & 0x01) != 0) - } - #[doc = "Bit 2 - Indicates a FIFO overflow occurred and the interrupt is enabled"] - #[inline(always)] - pub fn fifo_oflow(&self) -> FIFO_OFLOW_R { - FIFO_OFLOW_R::new(((self.bits >> 2) & 0x01) != 0) + pub fn fifo_empty(&self) -> FifoEmptyR { + FifoEmptyR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Indicates the FIFO is full and the interrupt is enabled"] #[inline(always)] - pub fn fifo_full(&self) -> FIFO_FULL_R { - FIFO_FULL_R::new(((self.bits >> 1) & 0x01) != 0) + pub fn fifo_full(&self) -> FifoFullR { + FifoFullR::new(((self.bits >> 1) & 1) != 0) } - #[doc = "Bit 0 - Indicates the FIFO is empty and the interrupt is enabled"] + #[doc = "Bit 2 - Indicates a FIFO overflow occurred and the interrupt is enabled"] #[inline(always)] - pub fn fifo_empty(&self) -> FIFO_EMPTY_R { - FIFO_EMPTY_R::new((self.bits & 0x01) != 0) + pub fn fifo_oflow(&self) -> FifoOflowR { + FifoOflowR::new(((self.bits >> 2) & 1) != 0) + } + #[doc = "Bit 3 - Indicates a FIFO underflow occurred and the interrupt is enabled"] + #[inline(always)] + pub fn fifo_uflow(&self) -> FifoUflowR { + FifoUflowR::new(((self.bits >> 3) & 1) != 0) + } + #[doc = "Bit 4 - Indicates that a DAC conversion is done and the interrupt is enabled"] + #[inline(always)] + pub fn dac_done(&self) -> DacDoneR { + DacDoneR::new(((self.bits >> 4) & 1) != 0) + } + #[doc = "Bit 5 - Indicates a manual or external trigger occurred when the DAC was BUSY doing a conversion and the interrupt is enabled"] + #[inline(always)] + pub fn trig_error(&self) -> TrigErrorR { + TrigErrorR::new(((self.bits >> 5) & 1) != 0) + } + #[doc = "Bit 6 - Indicates the FIFO entry count is less than or equal to the trigger level and the interrupt is enabled"] + #[inline(always)] + pub fn fifo_depth_trig(&self) -> FifoDepthTrigR { + FifoDepthTrigR::new(((self.bits >> 6) & 1) != 0) } } -#[doc = "Enabled Interrupt Status\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [irq_end](index.html) module"] -pub struct IRQ_END_SPEC; -impl crate::RegisterSpec for IRQ_END_SPEC { +#[doc = "Enabled Interrupt Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_end::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IrqEndSpec; +impl crate::RegisterSpec for IrqEndSpec { type Ux = u32; } -#[doc = "`read()` method returns [irq_end::R](R) reader structure"] -impl crate::Readable for IRQ_END_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`irq_end::R`](R) reader structure"] +impl crate::Readable for IrqEndSpec {} #[doc = "`reset()` method sets IRQ_END to value 0"] -impl crate::Resettable for IRQ_END_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for IrqEndSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/dac0/irq_raw.rs b/va416xx/src/dac0/irq_raw.rs index 31a0ba2..91a9e68 100644 --- a/va416xx/src/dac0/irq_raw.rs +++ b/va416xx/src/dac0/irq_raw.rs @@ -1,173 +1,64 @@ #[doc = "Register `IRQ_RAW` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Field `FIFO_DEPTH_TRIG` reader - Indicates the FIFO entry count is less than or equal to the trigger level"] -pub struct FIFO_DEPTH_TRIG_R(crate::FieldReader); -impl FIFO_DEPTH_TRIG_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - FIFO_DEPTH_TRIG_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for FIFO_DEPTH_TRIG_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TRIG_ERROR` reader - Indicates a manual or external trigger occurred when the DAC was BUSY doing a conversion"] -pub struct TRIG_ERROR_R(crate::FieldReader); -impl TRIG_ERROR_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TRIG_ERROR_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TRIG_ERROR_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `DAC_DONE` reader - Indicates that a DAC conversion is done"] -pub struct DAC_DONE_R(crate::FieldReader); -impl DAC_DONE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - DAC_DONE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for DAC_DONE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `FIFO_UFLOW` reader - Indicates data was unavailable when a new trigger for DAC update is received"] -pub struct FIFO_UFLOW_R(crate::FieldReader); -impl FIFO_UFLOW_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - FIFO_UFLOW_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for FIFO_UFLOW_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `FIFO_OFLOW` reader - Indicates a FIFO overflow occurred (FIFO was full when new data was written)"] -pub struct FIFO_OFLOW_R(crate::FieldReader); -impl FIFO_OFLOW_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - FIFO_OFLOW_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for FIFO_OFLOW_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `FIFO_FULL` reader - Indicates the FIFO is full"] -pub struct FIFO_FULL_R(crate::FieldReader); -impl FIFO_FULL_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - FIFO_FULL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for FIFO_FULL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type R = crate::R; #[doc = "Field `FIFO_EMPTY` reader - Indicates the FIFO is empty"] -pub struct FIFO_EMPTY_R(crate::FieldReader); -impl FIFO_EMPTY_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - FIFO_EMPTY_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for FIFO_EMPTY_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type FifoEmptyR = crate::BitReader; +#[doc = "Field `FIFO_FULL` reader - Indicates the FIFO is full"] +pub type FifoFullR = crate::BitReader; +#[doc = "Field `FIFO_OFLOW` reader - Indicates a FIFO overflow occurred (FIFO was full when new data was written)"] +pub type FifoOflowR = crate::BitReader; +#[doc = "Field `FIFO_UFLOW` reader - Indicates data was unavailable when a new trigger for DAC update is received"] +pub type FifoUflowR = crate::BitReader; +#[doc = "Field `DAC_DONE` reader - Indicates that a DAC conversion is done"] +pub type DacDoneR = crate::BitReader; +#[doc = "Field `TRIG_ERROR` reader - Indicates a manual or external trigger occurred when the DAC was BUSY doing a conversion"] +pub type TrigErrorR = crate::BitReader; +#[doc = "Field `FIFO_DEPTH_TRIG` reader - Indicates the FIFO entry count is less than or equal to the trigger level"] +pub type FifoDepthTrigR = crate::BitReader; impl R { - #[doc = "Bit 6 - Indicates the FIFO entry count is less than or equal to the trigger level"] + #[doc = "Bit 0 - Indicates the FIFO is empty"] #[inline(always)] - pub fn fifo_depth_trig(&self) -> FIFO_DEPTH_TRIG_R { - FIFO_DEPTH_TRIG_R::new(((self.bits >> 6) & 0x01) != 0) - } - #[doc = "Bit 5 - Indicates a manual or external trigger occurred when the DAC was BUSY doing a conversion"] - #[inline(always)] - pub fn trig_error(&self) -> TRIG_ERROR_R { - TRIG_ERROR_R::new(((self.bits >> 5) & 0x01) != 0) - } - #[doc = "Bit 4 - Indicates that a DAC conversion is done"] - #[inline(always)] - pub fn dac_done(&self) -> DAC_DONE_R { - DAC_DONE_R::new(((self.bits >> 4) & 0x01) != 0) - } - #[doc = "Bit 3 - Indicates data was unavailable when a new trigger for DAC update is received"] - #[inline(always)] - pub fn fifo_uflow(&self) -> FIFO_UFLOW_R { - FIFO_UFLOW_R::new(((self.bits >> 3) & 0x01) != 0) - } - #[doc = "Bit 2 - Indicates a FIFO overflow occurred (FIFO was full when new data was written)"] - #[inline(always)] - pub fn fifo_oflow(&self) -> FIFO_OFLOW_R { - FIFO_OFLOW_R::new(((self.bits >> 2) & 0x01) != 0) + pub fn fifo_empty(&self) -> FifoEmptyR { + FifoEmptyR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Indicates the FIFO is full"] #[inline(always)] - pub fn fifo_full(&self) -> FIFO_FULL_R { - FIFO_FULL_R::new(((self.bits >> 1) & 0x01) != 0) + pub fn fifo_full(&self) -> FifoFullR { + FifoFullR::new(((self.bits >> 1) & 1) != 0) } - #[doc = "Bit 0 - Indicates the FIFO is empty"] + #[doc = "Bit 2 - Indicates a FIFO overflow occurred (FIFO was full when new data was written)"] #[inline(always)] - pub fn fifo_empty(&self) -> FIFO_EMPTY_R { - FIFO_EMPTY_R::new((self.bits & 0x01) != 0) + pub fn fifo_oflow(&self) -> FifoOflowR { + FifoOflowR::new(((self.bits >> 2) & 1) != 0) + } + #[doc = "Bit 3 - Indicates data was unavailable when a new trigger for DAC update is received"] + #[inline(always)] + pub fn fifo_uflow(&self) -> FifoUflowR { + FifoUflowR::new(((self.bits >> 3) & 1) != 0) + } + #[doc = "Bit 4 - Indicates that a DAC conversion is done"] + #[inline(always)] + pub fn dac_done(&self) -> DacDoneR { + DacDoneR::new(((self.bits >> 4) & 1) != 0) + } + #[doc = "Bit 5 - Indicates a manual or external trigger occurred when the DAC was BUSY doing a conversion"] + #[inline(always)] + pub fn trig_error(&self) -> TrigErrorR { + TrigErrorR::new(((self.bits >> 5) & 1) != 0) + } + #[doc = "Bit 6 - Indicates the FIFO entry count is less than or equal to the trigger level"] + #[inline(always)] + pub fn fifo_depth_trig(&self) -> FifoDepthTrigR { + FifoDepthTrigR::new(((self.bits >> 6) & 1) != 0) } } -#[doc = "Raw Interrupt Status\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [irq_raw](index.html) module"] -pub struct IRQ_RAW_SPEC; -impl crate::RegisterSpec for IRQ_RAW_SPEC { +#[doc = "Raw Interrupt Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_raw::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IrqRawSpec; +impl crate::RegisterSpec for IrqRawSpec { type Ux = u32; } -#[doc = "`read()` method returns [irq_raw::R](R) reader structure"] -impl crate::Readable for IRQ_RAW_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`irq_raw::R`](R) reader structure"] +impl crate::Readable for IrqRawSpec {} #[doc = "`reset()` method sets IRQ_RAW to value 0x41"] -impl crate::Resettable for IRQ_RAW_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0x41 - } +impl crate::Resettable for IrqRawSpec { + const RESET_VALUE: u32 = 0x41; } diff --git a/va416xx/src/dac0/perid.rs b/va416xx/src/dac0/perid.rs index cefe79c..a7c25a8 100644 --- a/va416xx/src/dac0/perid.rs +++ b/va416xx/src/dac0/perid.rs @@ -1,31 +1,18 @@ #[doc = "Register `PERID` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 +pub type R = crate::R; +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) } } -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Peripheral ID Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [perid](index.html) module"] -pub struct PERID_SPEC; -impl crate::RegisterSpec for PERID_SPEC { +#[doc = "Peripheral ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`perid::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PeridSpec; +impl crate::RegisterSpec for PeridSpec { type Ux = u32; } -#[doc = "`read()` method returns [perid::R](R) reader structure"] -impl crate::Readable for PERID_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`perid::R`](R) reader structure"] +impl crate::Readable for PeridSpec {} #[doc = "`reset()` method sets PERID to value 0x0020_07e9"] -impl crate::Resettable for PERID_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0x0020_07e9 - } +impl crate::Resettable for PeridSpec { + const RESET_VALUE: u32 = 0x0020_07e9; } diff --git a/va416xx/src/dac0/status.rs b/va416xx/src/dac0/status.rs index f96c544..af7a48d 100644 --- a/va416xx/src/dac0/status.rs +++ b/va416xx/src/dac0/status.rs @@ -1,73 +1,29 @@ #[doc = "Register `STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Field `DAC_BUSY` reader - Indicates a DAC data acquisition is in process"] -pub struct DAC_BUSY_R(crate::FieldReader); -impl DAC_BUSY_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - DAC_BUSY_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for DAC_BUSY_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type R = crate::R; #[doc = "Field `FIFO_ENTRY_CNT` reader - Indicates the number of entries in the FIFO"] -pub struct FIFO_ENTRY_CNT_R(crate::FieldReader); -impl FIFO_ENTRY_CNT_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - FIFO_ENTRY_CNT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for FIFO_ENTRY_CNT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type FifoEntryCntR = crate::FieldReader; +#[doc = "Field `DAC_BUSY` reader - Indicates a DAC data acquisition is in process"] +pub type DacBusyR = crate::BitReader; impl R { - #[doc = "Bit 7 - Indicates a DAC data acquisition is in process"] - #[inline(always)] - pub fn dac_busy(&self) -> DAC_BUSY_R { - DAC_BUSY_R::new(((self.bits >> 7) & 0x01) != 0) - } #[doc = "Bits 0:5 - Indicates the number of entries in the FIFO"] #[inline(always)] - pub fn fifo_entry_cnt(&self) -> FIFO_ENTRY_CNT_R { - FIFO_ENTRY_CNT_R::new((self.bits & 0x3f) as u8) + pub fn fifo_entry_cnt(&self) -> FifoEntryCntR { + FifoEntryCntR::new((self.bits & 0x3f) as u8) + } + #[doc = "Bit 7 - Indicates a DAC data acquisition is in process"] + #[inline(always)] + pub fn dac_busy(&self) -> DacBusyR { + DacBusyR::new(((self.bits >> 7) & 1) != 0) } } -#[doc = "Status\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +#[doc = "Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [status::R](R) reader structure"] -impl crate::Readable for STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`status::R`](R) reader structure"] +impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0"] -impl crate::Resettable for STATUS_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for StatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/dac0/txfifoirqtrg.rs b/va416xx/src/dac0/txfifoirqtrg.rs index 1d2650c..167855c 100644 --- a/va416xx/src/dac0/txfifoirqtrg.rs +++ b/va416xx/src/dac0/txfifoirqtrg.rs @@ -1,103 +1,40 @@ #[doc = "Register `TXFIFOIRQTRG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TXFIFOIRQTRG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `LEVEL` reader - Sets the FIFO_ENTRY_CNT value that asserts the FIFO_DEPTH_TRIG interrupt"] -pub struct LEVEL_R(crate::FieldReader); -impl LEVEL_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - LEVEL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for LEVEL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type LevelR = crate::FieldReader; #[doc = "Field `LEVEL` writer - Sets the FIFO_ENTRY_CNT value that asserts the FIFO_DEPTH_TRIG interrupt"] -pub struct LEVEL_W<'a> { - w: &'a mut W, -} -impl<'a> LEVEL_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0x1f) | (value as u32 & 0x1f); - self.w - } -} +pub type LevelW<'a, REG> = crate::FieldWriter<'a, REG, 5>; impl R { #[doc = "Bits 0:4 - Sets the FIFO_ENTRY_CNT value that asserts the FIFO_DEPTH_TRIG interrupt"] #[inline(always)] - pub fn level(&self) -> LEVEL_R { - LEVEL_R::new((self.bits & 0x1f) as u8) + pub fn level(&self) -> LevelR { + LevelR::new((self.bits & 0x1f) as u8) } } impl W { #[doc = "Bits 0:4 - Sets the FIFO_ENTRY_CNT value that asserts the FIFO_DEPTH_TRIG interrupt"] #[inline(always)] - pub fn level(&mut self) -> LEVEL_W { - LEVEL_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn level(&mut self) -> LevelW { + LevelW::new(self, 0) } } -#[doc = "Receive FIFO Interrupt Trigger Value\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txfifoirqtrg](index.html) module"] -pub struct TXFIFOIRQTRG_SPEC; -impl crate::RegisterSpec for TXFIFOIRQTRG_SPEC { +#[doc = "Receive FIFO Interrupt Trigger Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txfifoirqtrg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`txfifoirqtrg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TxfifoirqtrgSpec; +impl crate::RegisterSpec for TxfifoirqtrgSpec { type Ux = u32; } -#[doc = "`read()` method returns [txfifoirqtrg::R](R) reader structure"] -impl crate::Readable for TXFIFOIRQTRG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [txfifoirqtrg::W](W) writer structure"] -impl crate::Writable for TXFIFOIRQTRG_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`txfifoirqtrg::R`](R) reader structure"] +impl crate::Readable for TxfifoirqtrgSpec {} +#[doc = "`write(|w| ..)` method takes [`txfifoirqtrg::W`](W) writer structure"] +impl crate::Writable for TxfifoirqtrgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TXFIFOIRQTRG to value 0x10"] -impl crate::Resettable for TXFIFOIRQTRG_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0x10 - } +impl crate::Resettable for TxfifoirqtrgSpec { + const RESET_VALUE: u32 = 0x10; } diff --git a/va416xx/src/dma.rs b/va416xx/src/dma.rs index 28845a5..102edef 100644 --- a/va416xx/src/dma.rs +++ b/va416xx/src/dma.rs @@ -1,223 +1,434 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - #[doc = "0x00 - DMA Status"] - pub status: crate::Reg, - #[doc = "0x04 - DMA Configuration"] - pub cfg: crate::Reg, - #[doc = "0x08 - Base Pointer for DMA Control Registers"] - pub ctrl_base_ptr: crate::Reg, - #[doc = "0x0c - DMA Channel alternate control data base pointer"] - pub alt_ctrl_base_ptr: crate::Reg, - #[doc = "0x10 - DMA channel wait on request status"] - pub waitonreq_status: crate::Reg, - #[doc = "0x14 - DMA channel software request"] - pub chnl_sw_request: crate::Reg, - #[doc = "0x18 - DMA channel useburst set"] - pub chnl_useburst_set: crate::Reg, - #[doc = "0x1c - DMA channel useburst clear"] - pub chnl_useburst_clr: crate::Reg, - #[doc = "0x20 - DMA channel request mask set"] - pub chnl_req_mask_set: crate::Reg, - #[doc = "0x24 - DMA channel request mask clear"] - pub chnl_req_mask_clr: crate::Reg, - #[doc = "0x28 - DMA channel enable set"] - pub chnl_enable_set: crate::Reg, - #[doc = "0x2c - DMA channel enable clear"] - pub chnl_enable_clr: crate::Reg, - #[doc = "0x30 - DMA channel primary alternate set"] - pub chnl_pri_alt_set: crate::Reg, - #[doc = "0x34 - DMA channel primary alternate clear"] - pub chnl_pri_alt_clr: crate::Reg, - #[doc = "0x38 - DMA channel priority set"] - pub chnl_priority_set: crate::Reg, - #[doc = "0x3c - DMA channel priority clear"] - pub chnl_priority_clr: crate::Reg, + status: Status, + cfg: Cfg, + ctrl_base_ptr: CtrlBasePtr, + alt_ctrl_base_ptr: AltCtrlBasePtr, + waitonreq_status: WaitonreqStatus, + chnl_sw_request: ChnlSwRequest, + chnl_useburst_set: ChnlUseburstSet, + chnl_useburst_clr: ChnlUseburstClr, + chnl_req_mask_set: ChnlReqMaskSet, + chnl_req_mask_clr: ChnlReqMaskClr, + chnl_enable_set: ChnlEnableSet, + chnl_enable_clr: ChnlEnableClr, + chnl_pri_alt_set: ChnlPriAltSet, + chnl_pri_alt_clr: ChnlPriAltClr, + chnl_priority_set: ChnlPrioritySet, + chnl_priority_clr: ChnlPriorityClr, _reserved16: [u8; 0x0c], - #[doc = "0x4c - DMA bus error clear"] - pub err_clr: crate::Reg, + err_clr: ErrClr, _reserved17: [u8; 0x0db0], - #[doc = "0xe00 - DMA integration configuration"] - pub integration_cfg: crate::Reg, + integration_cfg: IntegrationCfg, _reserved18: [u8; 0x04], - #[doc = "0xe08 - DMA stall status"] - pub stall_status: crate::Reg, + stall_status: StallStatus, _reserved19: [u8; 0x04], - #[doc = "0xe10 - DMA Configuration"] - pub dma_req_status: crate::Reg, + dma_req_status: DmaReqStatus, _reserved20: [u8; 0x04], - #[doc = "0xe18 - DMA single request status"] - pub dma_sreq_status: crate::Reg, + dma_sreq_status: DmaSreqStatus, _reserved21: [u8; 0x04], - #[doc = "0xe20 - DMA done set"] - pub dma_done_set: crate::Reg, - #[doc = "0xe24 - DMA done clear"] - pub dma_done_clr: crate::Reg, - #[doc = "0xe28 - DMA active set"] - pub dma_active_set: crate::Reg, - #[doc = "0xe2c - DMA active clear"] - pub dma_active_clr: crate::Reg, + dma_done_set: DmaDoneSet, + dma_done_clr: DmaDoneClr, + dma_active_set: DmaActiveSet, + dma_active_clr: DmaActiveClr, _reserved25: [u8; 0x18], - #[doc = "0xe48 - DMA bus error set"] - pub err_set: crate::Reg, + err_set: ErrSet, _reserved26: [u8; 0x0184], - #[doc = "0xfd0 - DMA Peripheral ID 4"] - pub periph_id_4: crate::Reg, + periph_id_4: PeriphId4, _reserved27: [u8; 0x0c], - #[doc = "0xfe0 - DMA Peripheral ID 0"] - pub periph_id_0: crate::Reg, - #[doc = "0xfe4 - DMA Peripheral ID 1"] - pub periph_id_1: crate::Reg, - #[doc = "0xfe8 - DMA Peripheral ID 2"] - pub periph_id_2: crate::Reg, - #[doc = "0xfec - DMA Peripheral ID 3"] - pub periph_id_3: crate::Reg, - #[doc = "0xff0 - DMA PrimeCell ID 0"] - pub primecell_id_0: crate::Reg, - #[doc = "0xff4 - DMA PrimeCell ID 1"] - pub primecell_id_1: crate::Reg, - #[doc = "0xff8 - DMA PrimeCell ID 2"] - pub primecell_id_2: crate::Reg, - #[doc = "0xffc - DMA PrimeCell ID 3"] - pub primecell_id_3: crate::Reg, + periph_id_0: PeriphId0, + periph_id_1: PeriphId1, + periph_id_2: PeriphId2, + periph_id_3: PeriphId3, + primecell_id_0: PrimecellId0, + primecell_id_1: PrimecellId1, + primecell_id_2: PrimecellId2, + primecell_id_3: PrimecellId3, } -#[doc = "STATUS register accessor: an alias for `Reg`"] -pub type STATUS = crate::Reg; +impl RegisterBlock { + #[doc = "0x00 - DMA Status"] + #[inline(always)] + pub const fn status(&self) -> &Status { + &self.status + } + #[doc = "0x04 - DMA Configuration"] + #[inline(always)] + pub const fn cfg(&self) -> &Cfg { + &self.cfg + } + #[doc = "0x08 - Base Pointer for DMA Control Registers"] + #[inline(always)] + pub const fn ctrl_base_ptr(&self) -> &CtrlBasePtr { + &self.ctrl_base_ptr + } + #[doc = "0x0c - DMA Channel alternate control data base pointer"] + #[inline(always)] + pub const fn alt_ctrl_base_ptr(&self) -> &AltCtrlBasePtr { + &self.alt_ctrl_base_ptr + } + #[doc = "0x10 - DMA channel wait on request status"] + #[inline(always)] + pub const fn waitonreq_status(&self) -> &WaitonreqStatus { + &self.waitonreq_status + } + #[doc = "0x14 - DMA channel software request"] + #[inline(always)] + pub const fn chnl_sw_request(&self) -> &ChnlSwRequest { + &self.chnl_sw_request + } + #[doc = "0x18 - DMA channel useburst set"] + #[inline(always)] + pub const fn chnl_useburst_set(&self) -> &ChnlUseburstSet { + &self.chnl_useburst_set + } + #[doc = "0x1c - DMA channel useburst clear"] + #[inline(always)] + pub const fn chnl_useburst_clr(&self) -> &ChnlUseburstClr { + &self.chnl_useburst_clr + } + #[doc = "0x20 - DMA channel request mask set"] + #[inline(always)] + pub const fn chnl_req_mask_set(&self) -> &ChnlReqMaskSet { + &self.chnl_req_mask_set + } + #[doc = "0x24 - DMA channel request mask clear"] + #[inline(always)] + pub const fn chnl_req_mask_clr(&self) -> &ChnlReqMaskClr { + &self.chnl_req_mask_clr + } + #[doc = "0x28 - DMA channel enable set"] + #[inline(always)] + pub const fn chnl_enable_set(&self) -> &ChnlEnableSet { + &self.chnl_enable_set + } + #[doc = "0x2c - DMA channel enable clear"] + #[inline(always)] + pub const fn chnl_enable_clr(&self) -> &ChnlEnableClr { + &self.chnl_enable_clr + } + #[doc = "0x30 - DMA channel primary alternate set"] + #[inline(always)] + pub const fn chnl_pri_alt_set(&self) -> &ChnlPriAltSet { + &self.chnl_pri_alt_set + } + #[doc = "0x34 - DMA channel primary alternate clear"] + #[inline(always)] + pub const fn chnl_pri_alt_clr(&self) -> &ChnlPriAltClr { + &self.chnl_pri_alt_clr + } + #[doc = "0x38 - DMA channel priority set"] + #[inline(always)] + pub const fn chnl_priority_set(&self) -> &ChnlPrioritySet { + &self.chnl_priority_set + } + #[doc = "0x3c - DMA channel priority clear"] + #[inline(always)] + pub const fn chnl_priority_clr(&self) -> &ChnlPriorityClr { + &self.chnl_priority_clr + } + #[doc = "0x4c - DMA bus error clear"] + #[inline(always)] + pub const fn err_clr(&self) -> &ErrClr { + &self.err_clr + } + #[doc = "0xe00 - DMA integration configuration"] + #[inline(always)] + pub const fn integration_cfg(&self) -> &IntegrationCfg { + &self.integration_cfg + } + #[doc = "0xe08 - DMA stall status"] + #[inline(always)] + pub const fn stall_status(&self) -> &StallStatus { + &self.stall_status + } + #[doc = "0xe10 - DMA Configuration"] + #[inline(always)] + pub const fn dma_req_status(&self) -> &DmaReqStatus { + &self.dma_req_status + } + #[doc = "0xe18 - DMA single request status"] + #[inline(always)] + pub const fn dma_sreq_status(&self) -> &DmaSreqStatus { + &self.dma_sreq_status + } + #[doc = "0xe20 - DMA done set"] + #[inline(always)] + pub const fn dma_done_set(&self) -> &DmaDoneSet { + &self.dma_done_set + } + #[doc = "0xe24 - DMA done clear"] + #[inline(always)] + pub const fn dma_done_clr(&self) -> &DmaDoneClr { + &self.dma_done_clr + } + #[doc = "0xe28 - DMA active set"] + #[inline(always)] + pub const fn dma_active_set(&self) -> &DmaActiveSet { + &self.dma_active_set + } + #[doc = "0xe2c - DMA active clear"] + #[inline(always)] + pub const fn dma_active_clr(&self) -> &DmaActiveClr { + &self.dma_active_clr + } + #[doc = "0xe48 - DMA bus error set"] + #[inline(always)] + pub const fn err_set(&self) -> &ErrSet { + &self.err_set + } + #[doc = "0xfd0 - DMA Peripheral ID 4"] + #[inline(always)] + pub const fn periph_id_4(&self) -> &PeriphId4 { + &self.periph_id_4 + } + #[doc = "0xfe0 - DMA Peripheral ID 0"] + #[inline(always)] + pub const fn periph_id_0(&self) -> &PeriphId0 { + &self.periph_id_0 + } + #[doc = "0xfe4 - DMA Peripheral ID 1"] + #[inline(always)] + pub const fn periph_id_1(&self) -> &PeriphId1 { + &self.periph_id_1 + } + #[doc = "0xfe8 - DMA Peripheral ID 2"] + #[inline(always)] + pub const fn periph_id_2(&self) -> &PeriphId2 { + &self.periph_id_2 + } + #[doc = "0xfec - DMA Peripheral ID 3"] + #[inline(always)] + pub const fn periph_id_3(&self) -> &PeriphId3 { + &self.periph_id_3 + } + #[doc = "0xff0 - DMA PrimeCell ID 0"] + #[inline(always)] + pub const fn primecell_id_0(&self) -> &PrimecellId0 { + &self.primecell_id_0 + } + #[doc = "0xff4 - DMA PrimeCell ID 1"] + #[inline(always)] + pub const fn primecell_id_1(&self) -> &PrimecellId1 { + &self.primecell_id_1 + } + #[doc = "0xff8 - DMA PrimeCell ID 2"] + #[inline(always)] + pub const fn primecell_id_2(&self) -> &PrimecellId2 { + &self.primecell_id_2 + } + #[doc = "0xffc - DMA PrimeCell ID 3"] + #[inline(always)] + pub const fn primecell_id_3(&self) -> &PrimecellId3 { + &self.primecell_id_3 + } +} +#[doc = "STATUS (r) register accessor: DMA Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] +module"] +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "DMA Status"] pub mod status; -#[doc = "CFG register accessor: an alias for `Reg`"] -pub type CFG = crate::Reg; +#[doc = "CFG (w) register accessor: DMA Configuration\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cfg::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc(alias = "CFG")] +pub type Cfg = crate::Reg; #[doc = "DMA Configuration"] pub mod cfg; -#[doc = "CTRL_BASE_PTR register accessor: an alias for `Reg`"] -pub type CTRL_BASE_PTR = crate::Reg; +#[doc = "CTRL_BASE_PTR (rw) register accessor: Base Pointer for DMA Control Registers\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctrl_base_ptr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctrl_base_ptr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl_base_ptr`] +module"] +#[doc(alias = "CTRL_BASE_PTR")] +pub type CtrlBasePtr = crate::Reg; #[doc = "Base Pointer for DMA Control Registers"] pub mod ctrl_base_ptr; -#[doc = "ALT_CTRL_BASE_PTR register accessor: an alias for `Reg`"] -pub type ALT_CTRL_BASE_PTR = crate::Reg; +#[doc = "ALT_CTRL_BASE_PTR (rw) register accessor: DMA Channel alternate control data base pointer\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`alt_ctrl_base_ptr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`alt_ctrl_base_ptr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@alt_ctrl_base_ptr`] +module"] +#[doc(alias = "ALT_CTRL_BASE_PTR")] +pub type AltCtrlBasePtr = crate::Reg; #[doc = "DMA Channel alternate control data base pointer"] pub mod alt_ctrl_base_ptr; -#[doc = "WAITONREQ_STATUS register accessor: an alias for `Reg`"] -pub type WAITONREQ_STATUS = crate::Reg; +#[doc = "WAITONREQ_STATUS (r) register accessor: DMA channel wait on request status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`waitonreq_status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@waitonreq_status`] +module"] +#[doc(alias = "WAITONREQ_STATUS")] +pub type WaitonreqStatus = crate::Reg; #[doc = "DMA channel wait on request status"] pub mod waitonreq_status; -#[doc = "CHNL_SW_REQUEST register accessor: an alias for `Reg`"] -pub type CHNL_SW_REQUEST = crate::Reg; +#[doc = "CHNL_SW_REQUEST (w) register accessor: DMA channel software request\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`chnl_sw_request::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chnl_sw_request`] +module"] +#[doc(alias = "CHNL_SW_REQUEST")] +pub type ChnlSwRequest = crate::Reg; #[doc = "DMA channel software request"] pub mod chnl_sw_request; -#[doc = "CHNL_USEBURST_SET register accessor: an alias for `Reg`"] -pub type CHNL_USEBURST_SET = crate::Reg; +#[doc = "CHNL_USEBURST_SET (rw) register accessor: DMA channel useburst set\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`chnl_useburst_set::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`chnl_useburst_set::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chnl_useburst_set`] +module"] +#[doc(alias = "CHNL_USEBURST_SET")] +pub type ChnlUseburstSet = crate::Reg; #[doc = "DMA channel useburst set"] pub mod chnl_useburst_set; -#[doc = "CHNL_USEBURST_CLR register accessor: an alias for `Reg`"] -pub type CHNL_USEBURST_CLR = crate::Reg; +#[doc = "CHNL_USEBURST_CLR (rw) register accessor: DMA channel useburst clear\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`chnl_useburst_clr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`chnl_useburst_clr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chnl_useburst_clr`] +module"] +#[doc(alias = "CHNL_USEBURST_CLR")] +pub type ChnlUseburstClr = crate::Reg; #[doc = "DMA channel useburst clear"] pub mod chnl_useburst_clr; -#[doc = "CHNL_REQ_MASK_SET register accessor: an alias for `Reg`"] -pub type CHNL_REQ_MASK_SET = crate::Reg; +#[doc = "CHNL_REQ_MASK_SET (rw) register accessor: DMA channel request mask set\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`chnl_req_mask_set::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`chnl_req_mask_set::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chnl_req_mask_set`] +module"] +#[doc(alias = "CHNL_REQ_MASK_SET")] +pub type ChnlReqMaskSet = crate::Reg; #[doc = "DMA channel request mask set"] pub mod chnl_req_mask_set; -#[doc = "CHNL_REQ_MASK_CLR register accessor: an alias for `Reg`"] -pub type CHNL_REQ_MASK_CLR = crate::Reg; +#[doc = "CHNL_REQ_MASK_CLR (rw) register accessor: DMA channel request mask clear\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`chnl_req_mask_clr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`chnl_req_mask_clr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chnl_req_mask_clr`] +module"] +#[doc(alias = "CHNL_REQ_MASK_CLR")] +pub type ChnlReqMaskClr = crate::Reg; #[doc = "DMA channel request mask clear"] pub mod chnl_req_mask_clr; -#[doc = "CHNL_ENABLE_SET register accessor: an alias for `Reg`"] -pub type CHNL_ENABLE_SET = crate::Reg; +#[doc = "CHNL_ENABLE_SET (rw) register accessor: DMA channel enable set\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`chnl_enable_set::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`chnl_enable_set::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chnl_enable_set`] +module"] +#[doc(alias = "CHNL_ENABLE_SET")] +pub type ChnlEnableSet = crate::Reg; #[doc = "DMA channel enable set"] pub mod chnl_enable_set; -#[doc = "CHNL_ENABLE_CLR register accessor: an alias for `Reg`"] -pub type CHNL_ENABLE_CLR = crate::Reg; +#[doc = "CHNL_ENABLE_CLR (rw) register accessor: DMA channel enable clear\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`chnl_enable_clr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`chnl_enable_clr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chnl_enable_clr`] +module"] +#[doc(alias = "CHNL_ENABLE_CLR")] +pub type ChnlEnableClr = crate::Reg; #[doc = "DMA channel enable clear"] pub mod chnl_enable_clr; -#[doc = "CHNL_PRI_ALT_SET register accessor: an alias for `Reg`"] -pub type CHNL_PRI_ALT_SET = crate::Reg; +#[doc = "CHNL_PRI_ALT_SET (rw) register accessor: DMA channel primary alternate set\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`chnl_pri_alt_set::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`chnl_pri_alt_set::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chnl_pri_alt_set`] +module"] +#[doc(alias = "CHNL_PRI_ALT_SET")] +pub type ChnlPriAltSet = crate::Reg; #[doc = "DMA channel primary alternate set"] pub mod chnl_pri_alt_set; -#[doc = "CHNL_PRI_ALT_CLR register accessor: an alias for `Reg`"] -pub type CHNL_PRI_ALT_CLR = crate::Reg; +#[doc = "CHNL_PRI_ALT_CLR (rw) register accessor: DMA channel primary alternate clear\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`chnl_pri_alt_clr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`chnl_pri_alt_clr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chnl_pri_alt_clr`] +module"] +#[doc(alias = "CHNL_PRI_ALT_CLR")] +pub type ChnlPriAltClr = crate::Reg; #[doc = "DMA channel primary alternate clear"] pub mod chnl_pri_alt_clr; -#[doc = "CHNL_PRIORITY_SET register accessor: an alias for `Reg`"] -pub type CHNL_PRIORITY_SET = crate::Reg; +#[doc = "CHNL_PRIORITY_SET (rw) register accessor: DMA channel priority set\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`chnl_priority_set::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`chnl_priority_set::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chnl_priority_set`] +module"] +#[doc(alias = "CHNL_PRIORITY_SET")] +pub type ChnlPrioritySet = crate::Reg; #[doc = "DMA channel priority set"] pub mod chnl_priority_set; -#[doc = "CHNL_PRIORITY_CLR register accessor: an alias for `Reg`"] -pub type CHNL_PRIORITY_CLR = crate::Reg; +#[doc = "CHNL_PRIORITY_CLR (w) register accessor: DMA channel priority clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`chnl_priority_clr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chnl_priority_clr`] +module"] +#[doc(alias = "CHNL_PRIORITY_CLR")] +pub type ChnlPriorityClr = crate::Reg; #[doc = "DMA channel priority clear"] pub mod chnl_priority_clr; -#[doc = "ERR_CLR register accessor: an alias for `Reg`"] -pub type ERR_CLR = crate::Reg; +#[doc = "ERR_CLR (rw) register accessor: DMA bus error clear\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`err_clr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`err_clr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@err_clr`] +module"] +#[doc(alias = "ERR_CLR")] +pub type ErrClr = crate::Reg; #[doc = "DMA bus error clear"] pub mod err_clr; -#[doc = "INTEGRATION_CFG register accessor: an alias for `Reg`"] -pub type INTEGRATION_CFG = crate::Reg; +#[doc = "INTEGRATION_CFG (rw) register accessor: DMA integration configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`integration_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`integration_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@integration_cfg`] +module"] +#[doc(alias = "INTEGRATION_CFG")] +pub type IntegrationCfg = crate::Reg; #[doc = "DMA integration configuration"] pub mod integration_cfg; -#[doc = "STALL_STATUS register accessor: an alias for `Reg`"] -pub type STALL_STATUS = crate::Reg; +#[doc = "STALL_STATUS (rw) register accessor: DMA stall status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`stall_status::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`stall_status::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@stall_status`] +module"] +#[doc(alias = "STALL_STATUS")] +pub type StallStatus = crate::Reg; #[doc = "DMA stall status"] pub mod stall_status; -#[doc = "DMA_REQ_STATUS register accessor: an alias for `Reg`"] -pub type DMA_REQ_STATUS = crate::Reg; +#[doc = "DMA_REQ_STATUS (rw) register accessor: DMA Configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_req_status::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_req_status::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_req_status`] +module"] +#[doc(alias = "DMA_REQ_STATUS")] +pub type DmaReqStatus = crate::Reg; #[doc = "DMA Configuration"] pub mod dma_req_status; -#[doc = "DMA_SREQ_STATUS register accessor: an alias for `Reg`"] -pub type DMA_SREQ_STATUS = crate::Reg; +#[doc = "DMA_SREQ_STATUS (rw) register accessor: DMA single request status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_sreq_status::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_sreq_status::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_sreq_status`] +module"] +#[doc(alias = "DMA_SREQ_STATUS")] +pub type DmaSreqStatus = crate::Reg; #[doc = "DMA single request status"] pub mod dma_sreq_status; -#[doc = "DMA_DONE_SET register accessor: an alias for `Reg`"] -pub type DMA_DONE_SET = crate::Reg; +#[doc = "DMA_DONE_SET (rw) register accessor: DMA done set\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_done_set::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_done_set::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_done_set`] +module"] +#[doc(alias = "DMA_DONE_SET")] +pub type DmaDoneSet = crate::Reg; #[doc = "DMA done set"] pub mod dma_done_set; -#[doc = "DMA_DONE_CLR register accessor: an alias for `Reg`"] -pub type DMA_DONE_CLR = crate::Reg; +#[doc = "DMA_DONE_CLR (rw) register accessor: DMA done clear\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_done_clr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_done_clr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_done_clr`] +module"] +#[doc(alias = "DMA_DONE_CLR")] +pub type DmaDoneClr = crate::Reg; #[doc = "DMA done clear"] pub mod dma_done_clr; -#[doc = "DMA_ACTIVE_SET register accessor: an alias for `Reg`"] -pub type DMA_ACTIVE_SET = crate::Reg; +#[doc = "DMA_ACTIVE_SET (rw) register accessor: DMA active set\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_active_set::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_active_set::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_active_set`] +module"] +#[doc(alias = "DMA_ACTIVE_SET")] +pub type DmaActiveSet = crate::Reg; #[doc = "DMA active set"] pub mod dma_active_set; -#[doc = "DMA_ACTIVE_CLR register accessor: an alias for `Reg`"] -pub type DMA_ACTIVE_CLR = crate::Reg; +#[doc = "DMA_ACTIVE_CLR (rw) register accessor: DMA active clear\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_active_clr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_active_clr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_active_clr`] +module"] +#[doc(alias = "DMA_ACTIVE_CLR")] +pub type DmaActiveClr = crate::Reg; #[doc = "DMA active clear"] pub mod dma_active_clr; -#[doc = "ERR_SET register accessor: an alias for `Reg`"] -pub type ERR_SET = crate::Reg; +#[doc = "ERR_SET (rw) register accessor: DMA bus error set\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`err_set::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`err_set::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@err_set`] +module"] +#[doc(alias = "ERR_SET")] +pub type ErrSet = crate::Reg; #[doc = "DMA bus error set"] pub mod err_set; -#[doc = "PERIPH_ID_4 register accessor: an alias for `Reg`"] -pub type PERIPH_ID_4 = crate::Reg; +#[doc = "PERIPH_ID_4 (rw) register accessor: DMA Peripheral ID 4\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`periph_id_4::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`periph_id_4::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@periph_id_4`] +module"] +#[doc(alias = "PERIPH_ID_4")] +pub type PeriphId4 = crate::Reg; #[doc = "DMA Peripheral ID 4"] pub mod periph_id_4; -#[doc = "PERIPH_ID_0 register accessor: an alias for `Reg`"] -pub type PERIPH_ID_0 = crate::Reg; +#[doc = "PERIPH_ID_0 (rw) register accessor: DMA Peripheral ID 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`periph_id_0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`periph_id_0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@periph_id_0`] +module"] +#[doc(alias = "PERIPH_ID_0")] +pub type PeriphId0 = crate::Reg; #[doc = "DMA Peripheral ID 0"] pub mod periph_id_0; -#[doc = "PERIPH_ID_1 register accessor: an alias for `Reg`"] -pub type PERIPH_ID_1 = crate::Reg; +#[doc = "PERIPH_ID_1 (r) register accessor: DMA Peripheral ID 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`periph_id_1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@periph_id_1`] +module"] +#[doc(alias = "PERIPH_ID_1")] +pub type PeriphId1 = crate::Reg; #[doc = "DMA Peripheral ID 1"] pub mod periph_id_1; -#[doc = "PERIPH_ID_2 register accessor: an alias for `Reg`"] -pub type PERIPH_ID_2 = crate::Reg; +#[doc = "PERIPH_ID_2 (rw) register accessor: DMA Peripheral ID 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`periph_id_2::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`periph_id_2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@periph_id_2`] +module"] +#[doc(alias = "PERIPH_ID_2")] +pub type PeriphId2 = crate::Reg; #[doc = "DMA Peripheral ID 2"] pub mod periph_id_2; -#[doc = "PERIPH_ID_3 register accessor: an alias for `Reg`"] -pub type PERIPH_ID_3 = crate::Reg; +#[doc = "PERIPH_ID_3 (rw) register accessor: DMA Peripheral ID 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`periph_id_3::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`periph_id_3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@periph_id_3`] +module"] +#[doc(alias = "PERIPH_ID_3")] +pub type PeriphId3 = crate::Reg; #[doc = "DMA Peripheral ID 3"] pub mod periph_id_3; -#[doc = "PRIMECELL_ID_0 register accessor: an alias for `Reg`"] -pub type PRIMECELL_ID_0 = crate::Reg; +#[doc = "PRIMECELL_ID_0 (rw) register accessor: DMA PrimeCell ID 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`primecell_id_0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`primecell_id_0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@primecell_id_0`] +module"] +#[doc(alias = "PRIMECELL_ID_0")] +pub type PrimecellId0 = crate::Reg; #[doc = "DMA PrimeCell ID 0"] pub mod primecell_id_0; -#[doc = "PRIMECELL_ID_1 register accessor: an alias for `Reg`"] -pub type PRIMECELL_ID_1 = crate::Reg; +#[doc = "PRIMECELL_ID_1 (rw) register accessor: DMA PrimeCell ID 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`primecell_id_1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`primecell_id_1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@primecell_id_1`] +module"] +#[doc(alias = "PRIMECELL_ID_1")] +pub type PrimecellId1 = crate::Reg; #[doc = "DMA PrimeCell ID 1"] pub mod primecell_id_1; -#[doc = "PRIMECELL_ID_2 register accessor: an alias for `Reg`"] -pub type PRIMECELL_ID_2 = crate::Reg; +#[doc = "PRIMECELL_ID_2 (rw) register accessor: DMA PrimeCell ID 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`primecell_id_2::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`primecell_id_2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@primecell_id_2`] +module"] +#[doc(alias = "PRIMECELL_ID_2")] +pub type PrimecellId2 = crate::Reg; #[doc = "DMA PrimeCell ID 2"] pub mod primecell_id_2; -#[doc = "PRIMECELL_ID_3 register accessor: an alias for `Reg`"] -pub type PRIMECELL_ID_3 = crate::Reg; +#[doc = "PRIMECELL_ID_3 (rw) register accessor: DMA PrimeCell ID 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`primecell_id_3::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`primecell_id_3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@primecell_id_3`] +module"] +#[doc(alias = "PRIMECELL_ID_3")] +pub type PrimecellId3 = crate::Reg; #[doc = "DMA PrimeCell ID 3"] pub mod primecell_id_3; diff --git a/va416xx/src/dma/alt_ctrl_base_ptr.rs b/va416xx/src/dma/alt_ctrl_base_ptr.rs index 2f50d60..0ae67d4 100644 --- a/va416xx/src/dma/alt_ctrl_base_ptr.rs +++ b/va416xx/src/dma/alt_ctrl_base_ptr.rs @@ -1,103 +1,40 @@ #[doc = "Register `ALT_CTRL_BASE_PTR` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ALT_CTRL_BASE_PTR` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `ALT_CTRL_BASE_PTR` reader - Base Pointer for Alternate DMA Control Register"] -pub struct ALT_CTRL_BASE_PTR_R(crate::FieldReader); -impl ALT_CTRL_BASE_PTR_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - ALT_CTRL_BASE_PTR_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ALT_CTRL_BASE_PTR_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type AltCtrlBasePtrR = crate::FieldReader; #[doc = "Field `ALT_CTRL_BASE_PTR` writer - Base Pointer for Alternate DMA Control Register"] -pub struct ALT_CTRL_BASE_PTR_W<'a> { - w: &'a mut W, -} -impl<'a> ALT_CTRL_BASE_PTR_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - self.w.bits = value as u32; - self.w - } -} +pub type AltCtrlBasePtrW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Base Pointer for Alternate DMA Control Register"] #[inline(always)] - pub fn alt_ctrl_base_ptr(&self) -> ALT_CTRL_BASE_PTR_R { - ALT_CTRL_BASE_PTR_R::new(self.bits as u32) + pub fn alt_ctrl_base_ptr(&self) -> AltCtrlBasePtrR { + AltCtrlBasePtrR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Base Pointer for Alternate DMA Control Register"] #[inline(always)] - pub fn alt_ctrl_base_ptr(&mut self) -> ALT_CTRL_BASE_PTR_W { - ALT_CTRL_BASE_PTR_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn alt_ctrl_base_ptr(&mut self) -> AltCtrlBasePtrW { + AltCtrlBasePtrW::new(self, 0) } } -#[doc = "DMA Channel alternate control data base pointer\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [alt_ctrl_base_ptr](index.html) module"] -pub struct ALT_CTRL_BASE_PTR_SPEC; -impl crate::RegisterSpec for ALT_CTRL_BASE_PTR_SPEC { +#[doc = "DMA Channel alternate control data base pointer\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`alt_ctrl_base_ptr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`alt_ctrl_base_ptr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct AltCtrlBasePtrSpec; +impl crate::RegisterSpec for AltCtrlBasePtrSpec { type Ux = u32; } -#[doc = "`read()` method returns [alt_ctrl_base_ptr::R](R) reader structure"] -impl crate::Readable for ALT_CTRL_BASE_PTR_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [alt_ctrl_base_ptr::W](W) writer structure"] -impl crate::Writable for ALT_CTRL_BASE_PTR_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`alt_ctrl_base_ptr::R`](R) reader structure"] +impl crate::Readable for AltCtrlBasePtrSpec {} +#[doc = "`write(|w| ..)` method takes [`alt_ctrl_base_ptr::W`](W) writer structure"] +impl crate::Writable for AltCtrlBasePtrSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ALT_CTRL_BASE_PTR to value 0"] -impl crate::Resettable for ALT_CTRL_BASE_PTR_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for AltCtrlBasePtrSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/dma/cfg.rs b/va416xx/src/dma/cfg.rs index b1115ae..5e537c3 100644 --- a/va416xx/src/dma/cfg.rs +++ b/va416xx/src/dma/cfg.rs @@ -1,62 +1,35 @@ #[doc = "Register `CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; +#[doc = "Field `MASTER_ENABLE` writer - PLL Symbol; Feedback cycle slip output (CLKOUT frequency low)"] +pub type MasterEnableW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CHNL_PROT_CTRL` writer - HPROT\\[3:0\\]"] -pub struct CHNL_PROT_CTRL_W<'a> { - w: &'a mut W, -} -impl<'a> CHNL_PROT_CTRL_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x07 << 5)) | ((value as u32 & 0x07) << 5); - self.w - } -} +pub type ChnlProtCtrlW<'a, REG> = crate::FieldWriter<'a, REG, 3>; impl W { + #[doc = "Bit 0 - PLL Symbol; Feedback cycle slip output (CLKOUT frequency low)"] + #[inline(always)] + #[must_use] + pub fn master_enable(&mut self) -> MasterEnableW { + MasterEnableW::new(self, 0) + } #[doc = "Bits 5:7 - HPROT\\[3:0\\]"] #[inline(always)] - pub fn chnl_prot_ctrl(&mut self) -> CHNL_PROT_CTRL_W { - CHNL_PROT_CTRL_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn chnl_prot_ctrl(&mut self) -> ChnlProtCtrlW { + ChnlProtCtrlW::new(self, 5) } } -#[doc = "DMA Configuration\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CFG_SPEC; -impl crate::RegisterSpec for CFG_SPEC { +#[doc = "DMA Configuration\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cfg::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CfgSpec; +impl crate::RegisterSpec for CfgSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [cfg::W](W) writer structure"] -impl crate::Writable for CFG_SPEC { - type Writer = W; +#[doc = "`write(|w| ..)` method takes [`cfg::W`](W) writer structure"] +impl crate::Writable for CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CFG to value 0"] -impl crate::Resettable for CFG_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for CfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/dma/chnl_enable_clr.rs b/va416xx/src/dma/chnl_enable_clr.rs index 58a31ae..374fc9e 100644 --- a/va416xx/src/dma/chnl_enable_clr.rs +++ b/va416xx/src/dma/chnl_enable_clr.rs @@ -1,254 +1,85 @@ #[doc = "Register `CHNL_ENABLE_CLR` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CHNL_ENABLE_CLR` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `CH3` reader - Channel Enable clear"] -pub struct CH3_R(crate::FieldReader); -impl CH3_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CH3_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CH3_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CH3` writer - Channel Enable clear"] -pub struct CH3_W<'a> { - w: &'a mut W, -} -impl<'a> CH3_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); - self.w - } -} -#[doc = "Field `CH2` reader - Channel Enable clear"] -pub struct CH2_R(crate::FieldReader); -impl CH2_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CH2_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CH2_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CH2` writer - Channel Enable clear"] -pub struct CH2_W<'a> { - w: &'a mut W, -} -impl<'a> CH2_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); - self.w - } -} -#[doc = "Field `CH1` reader - Channel Enable clear"] -pub struct CH1_R(crate::FieldReader); -impl CH1_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CH1_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CH1_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CH1` writer - Channel Enable clear"] -pub struct CH1_W<'a> { - w: &'a mut W, -} -impl<'a> CH1_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); - self.w - } -} +pub type W = crate::W; #[doc = "Field `CH0` reader - Channel Enable clear"] -pub struct CH0_R(crate::FieldReader); -impl CH0_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CH0_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CH0_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Ch0R = crate::BitReader; #[doc = "Field `CH0` writer - Channel Enable clear"] -pub struct CH0_W<'a> { - w: &'a mut W, -} -impl<'a> CH0_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} +pub type Ch0W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `CH1` reader - Channel Enable clear"] +pub type Ch1R = crate::BitReader; +#[doc = "Field `CH1` writer - Channel Enable clear"] +pub type Ch1W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `CH2` reader - Channel Enable clear"] +pub type Ch2R = crate::BitReader; +#[doc = "Field `CH2` writer - Channel Enable clear"] +pub type Ch2W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `CH3` reader - Channel Enable clear"] +pub type Ch3R = crate::BitReader; +#[doc = "Field `CH3` writer - Channel Enable clear"] +pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG>; impl R { - #[doc = "Bit 3 - Channel Enable clear"] + #[doc = "Bit 0 - Channel Enable clear"] #[inline(always)] - pub fn ch3(&self) -> CH3_R { - CH3_R::new(((self.bits >> 3) & 0x01) != 0) - } - #[doc = "Bit 2 - Channel Enable clear"] - #[inline(always)] - pub fn ch2(&self) -> CH2_R { - CH2_R::new(((self.bits >> 2) & 0x01) != 0) + pub fn ch0(&self) -> Ch0R { + Ch0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Channel Enable clear"] #[inline(always)] - pub fn ch1(&self) -> CH1_R { - CH1_R::new(((self.bits >> 1) & 0x01) != 0) + pub fn ch1(&self) -> Ch1R { + Ch1R::new(((self.bits >> 1) & 1) != 0) } - #[doc = "Bit 0 - Channel Enable clear"] + #[doc = "Bit 2 - Channel Enable clear"] #[inline(always)] - pub fn ch0(&self) -> CH0_R { - CH0_R::new((self.bits & 0x01) != 0) + pub fn ch2(&self) -> Ch2R { + Ch2R::new(((self.bits >> 2) & 1) != 0) + } + #[doc = "Bit 3 - Channel Enable clear"] + #[inline(always)] + pub fn ch3(&self) -> Ch3R { + Ch3R::new(((self.bits >> 3) & 1) != 0) } } impl W { - #[doc = "Bit 3 - Channel Enable clear"] + #[doc = "Bit 0 - Channel Enable clear"] #[inline(always)] - pub fn ch3(&mut self) -> CH3_W { - CH3_W { w: self } - } - #[doc = "Bit 2 - Channel Enable clear"] - #[inline(always)] - pub fn ch2(&mut self) -> CH2_W { - CH2_W { w: self } + #[must_use] + pub fn ch0(&mut self) -> Ch0W { + Ch0W::new(self, 0) } #[doc = "Bit 1 - Channel Enable clear"] #[inline(always)] - pub fn ch1(&mut self) -> CH1_W { - CH1_W { w: self } + #[must_use] + pub fn ch1(&mut self) -> Ch1W { + Ch1W::new(self, 1) } - #[doc = "Bit 0 - Channel Enable clear"] + #[doc = "Bit 2 - Channel Enable clear"] #[inline(always)] - pub fn ch0(&mut self) -> CH0_W { - CH0_W { w: self } + #[must_use] + pub fn ch2(&mut self) -> Ch2W { + Ch2W::new(self, 2) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bit 3 - Channel Enable clear"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn ch3(&mut self) -> Ch3W { + Ch3W::new(self, 3) } } -#[doc = "DMA channel enable clear\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [chnl_enable_clr](index.html) module"] -pub struct CHNL_ENABLE_CLR_SPEC; -impl crate::RegisterSpec for CHNL_ENABLE_CLR_SPEC { +#[doc = "DMA channel enable clear\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`chnl_enable_clr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`chnl_enable_clr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ChnlEnableClrSpec; +impl crate::RegisterSpec for ChnlEnableClrSpec { type Ux = u32; } -#[doc = "`read()` method returns [chnl_enable_clr::R](R) reader structure"] -impl crate::Readable for CHNL_ENABLE_CLR_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [chnl_enable_clr::W](W) writer structure"] -impl crate::Writable for CHNL_ENABLE_CLR_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`chnl_enable_clr::R`](R) reader structure"] +impl crate::Readable for ChnlEnableClrSpec {} +#[doc = "`write(|w| ..)` method takes [`chnl_enable_clr::W`](W) writer structure"] +impl crate::Writable for ChnlEnableClrSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CHNL_ENABLE_CLR to value 0"] -impl crate::Resettable for CHNL_ENABLE_CLR_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for ChnlEnableClrSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/dma/chnl_enable_set.rs b/va416xx/src/dma/chnl_enable_set.rs index 4edfebf..49390d5 100644 --- a/va416xx/src/dma/chnl_enable_set.rs +++ b/va416xx/src/dma/chnl_enable_set.rs @@ -1,254 +1,85 @@ #[doc = "Register `CHNL_ENABLE_SET` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CHNL_ENABLE_SET` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `CH3` reader - Channel Enable set"] -pub struct CH3_R(crate::FieldReader); -impl CH3_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CH3_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CH3_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CH3` writer - Channel Enable set"] -pub struct CH3_W<'a> { - w: &'a mut W, -} -impl<'a> CH3_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); - self.w - } -} -#[doc = "Field `CH2` reader - Channel Enable set"] -pub struct CH2_R(crate::FieldReader); -impl CH2_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CH2_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CH2_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CH2` writer - Channel Enable set"] -pub struct CH2_W<'a> { - w: &'a mut W, -} -impl<'a> CH2_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); - self.w - } -} -#[doc = "Field `CH1` reader - Channel Enable set"] -pub struct CH1_R(crate::FieldReader); -impl CH1_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CH1_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CH1_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CH1` writer - Channel Enable set"] -pub struct CH1_W<'a> { - w: &'a mut W, -} -impl<'a> CH1_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); - self.w - } -} +pub type W = crate::W; #[doc = "Field `CH0` reader - Channel Enable set"] -pub struct CH0_R(crate::FieldReader); -impl CH0_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CH0_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CH0_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Ch0R = crate::BitReader; #[doc = "Field `CH0` writer - Channel Enable set"] -pub struct CH0_W<'a> { - w: &'a mut W, -} -impl<'a> CH0_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} +pub type Ch0W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `CH1` reader - Channel Enable set"] +pub type Ch1R = crate::BitReader; +#[doc = "Field `CH1` writer - Channel Enable set"] +pub type Ch1W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `CH2` reader - Channel Enable set"] +pub type Ch2R = crate::BitReader; +#[doc = "Field `CH2` writer - Channel Enable set"] +pub type Ch2W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `CH3` reader - Channel Enable set"] +pub type Ch3R = crate::BitReader; +#[doc = "Field `CH3` writer - Channel Enable set"] +pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG>; impl R { - #[doc = "Bit 3 - Channel Enable set"] + #[doc = "Bit 0 - Channel Enable set"] #[inline(always)] - pub fn ch3(&self) -> CH3_R { - CH3_R::new(((self.bits >> 3) & 0x01) != 0) - } - #[doc = "Bit 2 - Channel Enable set"] - #[inline(always)] - pub fn ch2(&self) -> CH2_R { - CH2_R::new(((self.bits >> 2) & 0x01) != 0) + pub fn ch0(&self) -> Ch0R { + Ch0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Channel Enable set"] #[inline(always)] - pub fn ch1(&self) -> CH1_R { - CH1_R::new(((self.bits >> 1) & 0x01) != 0) + pub fn ch1(&self) -> Ch1R { + Ch1R::new(((self.bits >> 1) & 1) != 0) } - #[doc = "Bit 0 - Channel Enable set"] + #[doc = "Bit 2 - Channel Enable set"] #[inline(always)] - pub fn ch0(&self) -> CH0_R { - CH0_R::new((self.bits & 0x01) != 0) + pub fn ch2(&self) -> Ch2R { + Ch2R::new(((self.bits >> 2) & 1) != 0) + } + #[doc = "Bit 3 - Channel Enable set"] + #[inline(always)] + pub fn ch3(&self) -> Ch3R { + Ch3R::new(((self.bits >> 3) & 1) != 0) } } impl W { - #[doc = "Bit 3 - Channel Enable set"] + #[doc = "Bit 0 - Channel Enable set"] #[inline(always)] - pub fn ch3(&mut self) -> CH3_W { - CH3_W { w: self } - } - #[doc = "Bit 2 - Channel Enable set"] - #[inline(always)] - pub fn ch2(&mut self) -> CH2_W { - CH2_W { w: self } + #[must_use] + pub fn ch0(&mut self) -> Ch0W { + Ch0W::new(self, 0) } #[doc = "Bit 1 - Channel Enable set"] #[inline(always)] - pub fn ch1(&mut self) -> CH1_W { - CH1_W { w: self } + #[must_use] + pub fn ch1(&mut self) -> Ch1W { + Ch1W::new(self, 1) } - #[doc = "Bit 0 - Channel Enable set"] + #[doc = "Bit 2 - Channel Enable set"] #[inline(always)] - pub fn ch0(&mut self) -> CH0_W { - CH0_W { w: self } + #[must_use] + pub fn ch2(&mut self) -> Ch2W { + Ch2W::new(self, 2) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bit 3 - Channel Enable set"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn ch3(&mut self) -> Ch3W { + Ch3W::new(self, 3) } } -#[doc = "DMA channel enable set\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [chnl_enable_set](index.html) module"] -pub struct CHNL_ENABLE_SET_SPEC; -impl crate::RegisterSpec for CHNL_ENABLE_SET_SPEC { +#[doc = "DMA channel enable set\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`chnl_enable_set::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`chnl_enable_set::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ChnlEnableSetSpec; +impl crate::RegisterSpec for ChnlEnableSetSpec { type Ux = u32; } -#[doc = "`read()` method returns [chnl_enable_set::R](R) reader structure"] -impl crate::Readable for CHNL_ENABLE_SET_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [chnl_enable_set::W](W) writer structure"] -impl crate::Writable for CHNL_ENABLE_SET_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`chnl_enable_set::R`](R) reader structure"] +impl crate::Readable for ChnlEnableSetSpec {} +#[doc = "`write(|w| ..)` method takes [`chnl_enable_set::W`](W) writer structure"] +impl crate::Writable for ChnlEnableSetSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CHNL_ENABLE_SET to value 0"] -impl crate::Resettable for CHNL_ENABLE_SET_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for ChnlEnableSetSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/dma/chnl_pri_alt_clr.rs b/va416xx/src/dma/chnl_pri_alt_clr.rs index 4976775..fbd1c6c 100644 --- a/va416xx/src/dma/chnl_pri_alt_clr.rs +++ b/va416xx/src/dma/chnl_pri_alt_clr.rs @@ -1,254 +1,85 @@ #[doc = "Register `CHNL_PRI_ALT_CLR` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CHNL_PRI_ALT_CLR` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `CH3` reader - Channel PRI_ALT clear"] -pub struct CH3_R(crate::FieldReader); -impl CH3_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CH3_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CH3_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CH3` writer - Channel PRI_ALT clear"] -pub struct CH3_W<'a> { - w: &'a mut W, -} -impl<'a> CH3_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); - self.w - } -} -#[doc = "Field `CH2` reader - Channel PRI_ALT clear"] -pub struct CH2_R(crate::FieldReader); -impl CH2_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CH2_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CH2_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CH2` writer - Channel PRI_ALT clear"] -pub struct CH2_W<'a> { - w: &'a mut W, -} -impl<'a> CH2_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); - self.w - } -} -#[doc = "Field `CH1` reader - Channel PRI_ALT clear"] -pub struct CH1_R(crate::FieldReader); -impl CH1_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CH1_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CH1_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CH1` writer - Channel PRI_ALT clear"] -pub struct CH1_W<'a> { - w: &'a mut W, -} -impl<'a> CH1_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); - self.w - } -} +pub type W = crate::W; #[doc = "Field `CH0` reader - Channel PRI_ALT clear"] -pub struct CH0_R(crate::FieldReader); -impl CH0_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CH0_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CH0_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Ch0R = crate::BitReader; #[doc = "Field `CH0` writer - Channel PRI_ALT clear"] -pub struct CH0_W<'a> { - w: &'a mut W, -} -impl<'a> CH0_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} +pub type Ch0W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `CH1` reader - Channel PRI_ALT clear"] +pub type Ch1R = crate::BitReader; +#[doc = "Field `CH1` writer - Channel PRI_ALT clear"] +pub type Ch1W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `CH2` reader - Channel PRI_ALT clear"] +pub type Ch2R = crate::BitReader; +#[doc = "Field `CH2` writer - Channel PRI_ALT clear"] +pub type Ch2W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `CH3` reader - Channel PRI_ALT clear"] +pub type Ch3R = crate::BitReader; +#[doc = "Field `CH3` writer - Channel PRI_ALT clear"] +pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG>; impl R { - #[doc = "Bit 3 - Channel PRI_ALT clear"] + #[doc = "Bit 0 - Channel PRI_ALT clear"] #[inline(always)] - pub fn ch3(&self) -> CH3_R { - CH3_R::new(((self.bits >> 3) & 0x01) != 0) - } - #[doc = "Bit 2 - Channel PRI_ALT clear"] - #[inline(always)] - pub fn ch2(&self) -> CH2_R { - CH2_R::new(((self.bits >> 2) & 0x01) != 0) + pub fn ch0(&self) -> Ch0R { + Ch0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Channel PRI_ALT clear"] #[inline(always)] - pub fn ch1(&self) -> CH1_R { - CH1_R::new(((self.bits >> 1) & 0x01) != 0) + pub fn ch1(&self) -> Ch1R { + Ch1R::new(((self.bits >> 1) & 1) != 0) } - #[doc = "Bit 0 - Channel PRI_ALT clear"] + #[doc = "Bit 2 - Channel PRI_ALT clear"] #[inline(always)] - pub fn ch0(&self) -> CH0_R { - CH0_R::new((self.bits & 0x01) != 0) + pub fn ch2(&self) -> Ch2R { + Ch2R::new(((self.bits >> 2) & 1) != 0) + } + #[doc = "Bit 3 - Channel PRI_ALT clear"] + #[inline(always)] + pub fn ch3(&self) -> Ch3R { + Ch3R::new(((self.bits >> 3) & 1) != 0) } } impl W { - #[doc = "Bit 3 - Channel PRI_ALT clear"] + #[doc = "Bit 0 - Channel PRI_ALT clear"] #[inline(always)] - pub fn ch3(&mut self) -> CH3_W { - CH3_W { w: self } - } - #[doc = "Bit 2 - Channel PRI_ALT clear"] - #[inline(always)] - pub fn ch2(&mut self) -> CH2_W { - CH2_W { w: self } + #[must_use] + pub fn ch0(&mut self) -> Ch0W { + Ch0W::new(self, 0) } #[doc = "Bit 1 - Channel PRI_ALT clear"] #[inline(always)] - pub fn ch1(&mut self) -> CH1_W { - CH1_W { w: self } + #[must_use] + pub fn ch1(&mut self) -> Ch1W { + Ch1W::new(self, 1) } - #[doc = "Bit 0 - Channel PRI_ALT clear"] + #[doc = "Bit 2 - Channel PRI_ALT clear"] #[inline(always)] - pub fn ch0(&mut self) -> CH0_W { - CH0_W { w: self } + #[must_use] + pub fn ch2(&mut self) -> Ch2W { + Ch2W::new(self, 2) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bit 3 - Channel PRI_ALT clear"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn ch3(&mut self) -> Ch3W { + Ch3W::new(self, 3) } } -#[doc = "DMA channel primary alternate clear\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [chnl_pri_alt_clr](index.html) module"] -pub struct CHNL_PRI_ALT_CLR_SPEC; -impl crate::RegisterSpec for CHNL_PRI_ALT_CLR_SPEC { +#[doc = "DMA channel primary alternate clear\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`chnl_pri_alt_clr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`chnl_pri_alt_clr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ChnlPriAltClrSpec; +impl crate::RegisterSpec for ChnlPriAltClrSpec { type Ux = u32; } -#[doc = "`read()` method returns [chnl_pri_alt_clr::R](R) reader structure"] -impl crate::Readable for CHNL_PRI_ALT_CLR_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [chnl_pri_alt_clr::W](W) writer structure"] -impl crate::Writable for CHNL_PRI_ALT_CLR_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`chnl_pri_alt_clr::R`](R) reader structure"] +impl crate::Readable for ChnlPriAltClrSpec {} +#[doc = "`write(|w| ..)` method takes [`chnl_pri_alt_clr::W`](W) writer structure"] +impl crate::Writable for ChnlPriAltClrSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CHNL_PRI_ALT_CLR to value 0"] -impl crate::Resettable for CHNL_PRI_ALT_CLR_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for ChnlPriAltClrSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/dma/chnl_pri_alt_set.rs b/va416xx/src/dma/chnl_pri_alt_set.rs index 65a8c09..99ca91c 100644 --- a/va416xx/src/dma/chnl_pri_alt_set.rs +++ b/va416xx/src/dma/chnl_pri_alt_set.rs @@ -1,254 +1,85 @@ #[doc = "Register `CHNL_PRI_ALT_SET` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CHNL_PRI_ALT_SET` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `CH3` reader - Channel PRI_ALT set"] -pub struct CH3_R(crate::FieldReader); -impl CH3_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CH3_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CH3_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CH3` writer - Channel PRI_ALT set"] -pub struct CH3_W<'a> { - w: &'a mut W, -} -impl<'a> CH3_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); - self.w - } -} -#[doc = "Field `CH2` reader - Channel PRI_ALT set"] -pub struct CH2_R(crate::FieldReader); -impl CH2_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CH2_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CH2_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CH2` writer - Channel PRI_ALT set"] -pub struct CH2_W<'a> { - w: &'a mut W, -} -impl<'a> CH2_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); - self.w - } -} -#[doc = "Field `CH1` reader - Channel PRI_ALT set"] -pub struct CH1_R(crate::FieldReader); -impl CH1_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CH1_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CH1_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CH1` writer - Channel PRI_ALT set"] -pub struct CH1_W<'a> { - w: &'a mut W, -} -impl<'a> CH1_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); - self.w - } -} +pub type W = crate::W; #[doc = "Field `CH0` reader - Channel PRI_ALT set"] -pub struct CH0_R(crate::FieldReader); -impl CH0_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CH0_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CH0_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Ch0R = crate::BitReader; #[doc = "Field `CH0` writer - Channel PRI_ALT set"] -pub struct CH0_W<'a> { - w: &'a mut W, -} -impl<'a> CH0_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} +pub type Ch0W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `CH1` reader - Channel PRI_ALT set"] +pub type Ch1R = crate::BitReader; +#[doc = "Field `CH1` writer - Channel PRI_ALT set"] +pub type Ch1W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `CH2` reader - Channel PRI_ALT set"] +pub type Ch2R = crate::BitReader; +#[doc = "Field `CH2` writer - Channel PRI_ALT set"] +pub type Ch2W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `CH3` reader - Channel PRI_ALT set"] +pub type Ch3R = crate::BitReader; +#[doc = "Field `CH3` writer - Channel PRI_ALT set"] +pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG>; impl R { - #[doc = "Bit 3 - Channel PRI_ALT set"] + #[doc = "Bit 0 - Channel PRI_ALT set"] #[inline(always)] - pub fn ch3(&self) -> CH3_R { - CH3_R::new(((self.bits >> 3) & 0x01) != 0) - } - #[doc = "Bit 2 - Channel PRI_ALT set"] - #[inline(always)] - pub fn ch2(&self) -> CH2_R { - CH2_R::new(((self.bits >> 2) & 0x01) != 0) + pub fn ch0(&self) -> Ch0R { + Ch0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Channel PRI_ALT set"] #[inline(always)] - pub fn ch1(&self) -> CH1_R { - CH1_R::new(((self.bits >> 1) & 0x01) != 0) + pub fn ch1(&self) -> Ch1R { + Ch1R::new(((self.bits >> 1) & 1) != 0) } - #[doc = "Bit 0 - Channel PRI_ALT set"] + #[doc = "Bit 2 - Channel PRI_ALT set"] #[inline(always)] - pub fn ch0(&self) -> CH0_R { - CH0_R::new((self.bits & 0x01) != 0) + pub fn ch2(&self) -> Ch2R { + Ch2R::new(((self.bits >> 2) & 1) != 0) + } + #[doc = "Bit 3 - Channel PRI_ALT set"] + #[inline(always)] + pub fn ch3(&self) -> Ch3R { + Ch3R::new(((self.bits >> 3) & 1) != 0) } } impl W { - #[doc = "Bit 3 - Channel PRI_ALT set"] + #[doc = "Bit 0 - Channel PRI_ALT set"] #[inline(always)] - pub fn ch3(&mut self) -> CH3_W { - CH3_W { w: self } - } - #[doc = "Bit 2 - Channel PRI_ALT set"] - #[inline(always)] - pub fn ch2(&mut self) -> CH2_W { - CH2_W { w: self } + #[must_use] + pub fn ch0(&mut self) -> Ch0W { + Ch0W::new(self, 0) } #[doc = "Bit 1 - Channel PRI_ALT set"] #[inline(always)] - pub fn ch1(&mut self) -> CH1_W { - CH1_W { w: self } + #[must_use] + pub fn ch1(&mut self) -> Ch1W { + Ch1W::new(self, 1) } - #[doc = "Bit 0 - Channel PRI_ALT set"] + #[doc = "Bit 2 - Channel PRI_ALT set"] #[inline(always)] - pub fn ch0(&mut self) -> CH0_W { - CH0_W { w: self } + #[must_use] + pub fn ch2(&mut self) -> Ch2W { + Ch2W::new(self, 2) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bit 3 - Channel PRI_ALT set"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn ch3(&mut self) -> Ch3W { + Ch3W::new(self, 3) } } -#[doc = "DMA channel primary alternate set\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [chnl_pri_alt_set](index.html) module"] -pub struct CHNL_PRI_ALT_SET_SPEC; -impl crate::RegisterSpec for CHNL_PRI_ALT_SET_SPEC { +#[doc = "DMA channel primary alternate set\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`chnl_pri_alt_set::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`chnl_pri_alt_set::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ChnlPriAltSetSpec; +impl crate::RegisterSpec for ChnlPriAltSetSpec { type Ux = u32; } -#[doc = "`read()` method returns [chnl_pri_alt_set::R](R) reader structure"] -impl crate::Readable for CHNL_PRI_ALT_SET_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [chnl_pri_alt_set::W](W) writer structure"] -impl crate::Writable for CHNL_PRI_ALT_SET_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`chnl_pri_alt_set::R`](R) reader structure"] +impl crate::Readable for ChnlPriAltSetSpec {} +#[doc = "`write(|w| ..)` method takes [`chnl_pri_alt_set::W`](W) writer structure"] +impl crate::Writable for ChnlPriAltSetSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CHNL_PRI_ALT_SET to value 0"] -impl crate::Resettable for CHNL_PRI_ALT_SET_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for ChnlPriAltSetSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/dma/chnl_priority_clr.rs b/va416xx/src/dma/chnl_priority_clr.rs index d6731cb..cd8f54c 100644 --- a/va416xx/src/dma/chnl_priority_clr.rs +++ b/va416xx/src/dma/chnl_priority_clr.rs @@ -1,153 +1,51 @@ #[doc = "Register `CHNL_PRIORITY_CLR` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `CH3` writer - Channel PRIORITY clear"] -pub struct CH3_W<'a> { - w: &'a mut W, -} -impl<'a> CH3_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); - self.w - } -} -#[doc = "Field `CH2` writer - Channel PRIORITY clear"] -pub struct CH2_W<'a> { - w: &'a mut W, -} -impl<'a> CH2_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); - self.w - } -} -#[doc = "Field `CH1` writer - Channel PRIORITY clear"] -pub struct CH1_W<'a> { - w: &'a mut W, -} -impl<'a> CH1_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); - self.w - } -} +pub type W = crate::W; #[doc = "Field `CH0` writer - Channel PRIORITY clear"] -pub struct CH0_W<'a> { - w: &'a mut W, -} -impl<'a> CH0_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} +pub type Ch0W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `CH1` writer - Channel PRIORITY clear"] +pub type Ch1W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `CH2` writer - Channel PRIORITY clear"] +pub type Ch2W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `CH3` writer - Channel PRIORITY clear"] +pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG>; impl W { - #[doc = "Bit 3 - Channel PRIORITY clear"] + #[doc = "Bit 0 - Channel PRIORITY clear"] #[inline(always)] - pub fn ch3(&mut self) -> CH3_W { - CH3_W { w: self } - } - #[doc = "Bit 2 - Channel PRIORITY clear"] - #[inline(always)] - pub fn ch2(&mut self) -> CH2_W { - CH2_W { w: self } + #[must_use] + pub fn ch0(&mut self) -> Ch0W { + Ch0W::new(self, 0) } #[doc = "Bit 1 - Channel PRIORITY clear"] #[inline(always)] - pub fn ch1(&mut self) -> CH1_W { - CH1_W { w: self } + #[must_use] + pub fn ch1(&mut self) -> Ch1W { + Ch1W::new(self, 1) } - #[doc = "Bit 0 - Channel PRIORITY clear"] + #[doc = "Bit 2 - Channel PRIORITY clear"] #[inline(always)] - pub fn ch0(&mut self) -> CH0_W { - CH0_W { w: self } + #[must_use] + pub fn ch2(&mut self) -> Ch2W { + Ch2W::new(self, 2) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bit 3 - Channel PRIORITY clear"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn ch3(&mut self) -> Ch3W { + Ch3W::new(self, 3) } } -#[doc = "DMA channel priority clear\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [chnl_priority_clr](index.html) module"] -pub struct CHNL_PRIORITY_CLR_SPEC; -impl crate::RegisterSpec for CHNL_PRIORITY_CLR_SPEC { +#[doc = "DMA channel priority clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`chnl_priority_clr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ChnlPriorityClrSpec; +impl crate::RegisterSpec for ChnlPriorityClrSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [chnl_priority_clr::W](W) writer structure"] -impl crate::Writable for CHNL_PRIORITY_CLR_SPEC { - type Writer = W; +#[doc = "`write(|w| ..)` method takes [`chnl_priority_clr::W`](W) writer structure"] +impl crate::Writable for ChnlPriorityClrSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CHNL_PRIORITY_CLR to value 0"] -impl crate::Resettable for CHNL_PRIORITY_CLR_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for ChnlPriorityClrSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/dma/chnl_priority_set.rs b/va416xx/src/dma/chnl_priority_set.rs index e5a3626..a92e2ae 100644 --- a/va416xx/src/dma/chnl_priority_set.rs +++ b/va416xx/src/dma/chnl_priority_set.rs @@ -1,254 +1,85 @@ #[doc = "Register `CHNL_PRIORITY_SET` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CHNL_PRIORITY_SET` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `CH3` reader - Channel PRIORITY set"] -pub struct CH3_R(crate::FieldReader); -impl CH3_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CH3_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CH3_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CH3` writer - Channel PRIORITY set"] -pub struct CH3_W<'a> { - w: &'a mut W, -} -impl<'a> CH3_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); - self.w - } -} -#[doc = "Field `CH2` reader - Channel PRIORITY set"] -pub struct CH2_R(crate::FieldReader); -impl CH2_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CH2_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CH2_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CH2` writer - Channel PRIORITY set"] -pub struct CH2_W<'a> { - w: &'a mut W, -} -impl<'a> CH2_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); - self.w - } -} -#[doc = "Field `CH1` reader - Channel PRIORITY set"] -pub struct CH1_R(crate::FieldReader); -impl CH1_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CH1_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CH1_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CH1` writer - Channel PRIORITY set"] -pub struct CH1_W<'a> { - w: &'a mut W, -} -impl<'a> CH1_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); - self.w - } -} +pub type W = crate::W; #[doc = "Field `CH0` reader - Channel PRIORITY set"] -pub struct CH0_R(crate::FieldReader); -impl CH0_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CH0_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CH0_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Ch0R = crate::BitReader; #[doc = "Field `CH0` writer - Channel PRIORITY set"] -pub struct CH0_W<'a> { - w: &'a mut W, -} -impl<'a> CH0_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} +pub type Ch0W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `CH1` reader - Channel PRIORITY set"] +pub type Ch1R = crate::BitReader; +#[doc = "Field `CH1` writer - Channel PRIORITY set"] +pub type Ch1W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `CH2` reader - Channel PRIORITY set"] +pub type Ch2R = crate::BitReader; +#[doc = "Field `CH2` writer - Channel PRIORITY set"] +pub type Ch2W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `CH3` reader - Channel PRIORITY set"] +pub type Ch3R = crate::BitReader; +#[doc = "Field `CH3` writer - Channel PRIORITY set"] +pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG>; impl R { - #[doc = "Bit 3 - Channel PRIORITY set"] + #[doc = "Bit 0 - Channel PRIORITY set"] #[inline(always)] - pub fn ch3(&self) -> CH3_R { - CH3_R::new(((self.bits >> 3) & 0x01) != 0) - } - #[doc = "Bit 2 - Channel PRIORITY set"] - #[inline(always)] - pub fn ch2(&self) -> CH2_R { - CH2_R::new(((self.bits >> 2) & 0x01) != 0) + pub fn ch0(&self) -> Ch0R { + Ch0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Channel PRIORITY set"] #[inline(always)] - pub fn ch1(&self) -> CH1_R { - CH1_R::new(((self.bits >> 1) & 0x01) != 0) + pub fn ch1(&self) -> Ch1R { + Ch1R::new(((self.bits >> 1) & 1) != 0) } - #[doc = "Bit 0 - Channel PRIORITY set"] + #[doc = "Bit 2 - Channel PRIORITY set"] #[inline(always)] - pub fn ch0(&self) -> CH0_R { - CH0_R::new((self.bits & 0x01) != 0) + pub fn ch2(&self) -> Ch2R { + Ch2R::new(((self.bits >> 2) & 1) != 0) + } + #[doc = "Bit 3 - Channel PRIORITY set"] + #[inline(always)] + pub fn ch3(&self) -> Ch3R { + Ch3R::new(((self.bits >> 3) & 1) != 0) } } impl W { - #[doc = "Bit 3 - Channel PRIORITY set"] + #[doc = "Bit 0 - Channel PRIORITY set"] #[inline(always)] - pub fn ch3(&mut self) -> CH3_W { - CH3_W { w: self } - } - #[doc = "Bit 2 - Channel PRIORITY set"] - #[inline(always)] - pub fn ch2(&mut self) -> CH2_W { - CH2_W { w: self } + #[must_use] + pub fn ch0(&mut self) -> Ch0W { + Ch0W::new(self, 0) } #[doc = "Bit 1 - Channel PRIORITY set"] #[inline(always)] - pub fn ch1(&mut self) -> CH1_W { - CH1_W { w: self } + #[must_use] + pub fn ch1(&mut self) -> Ch1W { + Ch1W::new(self, 1) } - #[doc = "Bit 0 - Channel PRIORITY set"] + #[doc = "Bit 2 - Channel PRIORITY set"] #[inline(always)] - pub fn ch0(&mut self) -> CH0_W { - CH0_W { w: self } + #[must_use] + pub fn ch2(&mut self) -> Ch2W { + Ch2W::new(self, 2) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bit 3 - Channel PRIORITY set"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn ch3(&mut self) -> Ch3W { + Ch3W::new(self, 3) } } -#[doc = "DMA channel priority set\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [chnl_priority_set](index.html) module"] -pub struct CHNL_PRIORITY_SET_SPEC; -impl crate::RegisterSpec for CHNL_PRIORITY_SET_SPEC { +#[doc = "DMA channel priority set\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`chnl_priority_set::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`chnl_priority_set::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ChnlPrioritySetSpec; +impl crate::RegisterSpec for ChnlPrioritySetSpec { type Ux = u32; } -#[doc = "`read()` method returns [chnl_priority_set::R](R) reader structure"] -impl crate::Readable for CHNL_PRIORITY_SET_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [chnl_priority_set::W](W) writer structure"] -impl crate::Writable for CHNL_PRIORITY_SET_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`chnl_priority_set::R`](R) reader structure"] +impl crate::Readable for ChnlPrioritySetSpec {} +#[doc = "`write(|w| ..)` method takes [`chnl_priority_set::W`](W) writer structure"] +impl crate::Writable for ChnlPrioritySetSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CHNL_PRIORITY_SET to value 0"] -impl crate::Resettable for CHNL_PRIORITY_SET_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for ChnlPrioritySetSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/dma/chnl_req_mask_clr.rs b/va416xx/src/dma/chnl_req_mask_clr.rs index 8bd9acd..3074105 100644 --- a/va416xx/src/dma/chnl_req_mask_clr.rs +++ b/va416xx/src/dma/chnl_req_mask_clr.rs @@ -1,254 +1,85 @@ #[doc = "Register `CHNL_REQ_MASK_CLR` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CHNL_REQ_MASK_CLR` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `CH3` reader - Channel Request Mask clear"] -pub struct CH3_R(crate::FieldReader); -impl CH3_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CH3_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CH3_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CH3` writer - Channel Request Mask clear"] -pub struct CH3_W<'a> { - w: &'a mut W, -} -impl<'a> CH3_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); - self.w - } -} -#[doc = "Field `CH2` reader - Channel Request Mask clear"] -pub struct CH2_R(crate::FieldReader); -impl CH2_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CH2_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CH2_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CH2` writer - Channel Request Mask clear"] -pub struct CH2_W<'a> { - w: &'a mut W, -} -impl<'a> CH2_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); - self.w - } -} -#[doc = "Field `CH1` reader - Channel Request Mask clear"] -pub struct CH1_R(crate::FieldReader); -impl CH1_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CH1_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CH1_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CH1` writer - Channel Request Mask clear"] -pub struct CH1_W<'a> { - w: &'a mut W, -} -impl<'a> CH1_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); - self.w - } -} +pub type W = crate::W; #[doc = "Field `CH0` reader - Channel Request Mask clear"] -pub struct CH0_R(crate::FieldReader); -impl CH0_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CH0_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CH0_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Ch0R = crate::BitReader; #[doc = "Field `CH0` writer - Channel Request Mask clear"] -pub struct CH0_W<'a> { - w: &'a mut W, -} -impl<'a> CH0_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} +pub type Ch0W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `CH1` reader - Channel Request Mask clear"] +pub type Ch1R = crate::BitReader; +#[doc = "Field `CH1` writer - Channel Request Mask clear"] +pub type Ch1W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `CH2` reader - Channel Request Mask clear"] +pub type Ch2R = crate::BitReader; +#[doc = "Field `CH2` writer - Channel Request Mask clear"] +pub type Ch2W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `CH3` reader - Channel Request Mask clear"] +pub type Ch3R = crate::BitReader; +#[doc = "Field `CH3` writer - Channel Request Mask clear"] +pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG>; impl R { - #[doc = "Bit 3 - Channel Request Mask clear"] + #[doc = "Bit 0 - Channel Request Mask clear"] #[inline(always)] - pub fn ch3(&self) -> CH3_R { - CH3_R::new(((self.bits >> 3) & 0x01) != 0) - } - #[doc = "Bit 2 - Channel Request Mask clear"] - #[inline(always)] - pub fn ch2(&self) -> CH2_R { - CH2_R::new(((self.bits >> 2) & 0x01) != 0) + pub fn ch0(&self) -> Ch0R { + Ch0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Channel Request Mask clear"] #[inline(always)] - pub fn ch1(&self) -> CH1_R { - CH1_R::new(((self.bits >> 1) & 0x01) != 0) + pub fn ch1(&self) -> Ch1R { + Ch1R::new(((self.bits >> 1) & 1) != 0) } - #[doc = "Bit 0 - Channel Request Mask clear"] + #[doc = "Bit 2 - Channel Request Mask clear"] #[inline(always)] - pub fn ch0(&self) -> CH0_R { - CH0_R::new((self.bits & 0x01) != 0) + pub fn ch2(&self) -> Ch2R { + Ch2R::new(((self.bits >> 2) & 1) != 0) + } + #[doc = "Bit 3 - Channel Request Mask clear"] + #[inline(always)] + pub fn ch3(&self) -> Ch3R { + Ch3R::new(((self.bits >> 3) & 1) != 0) } } impl W { - #[doc = "Bit 3 - Channel Request Mask clear"] + #[doc = "Bit 0 - Channel Request Mask clear"] #[inline(always)] - pub fn ch3(&mut self) -> CH3_W { - CH3_W { w: self } - } - #[doc = "Bit 2 - Channel Request Mask clear"] - #[inline(always)] - pub fn ch2(&mut self) -> CH2_W { - CH2_W { w: self } + #[must_use] + pub fn ch0(&mut self) -> Ch0W { + Ch0W::new(self, 0) } #[doc = "Bit 1 - Channel Request Mask clear"] #[inline(always)] - pub fn ch1(&mut self) -> CH1_W { - CH1_W { w: self } + #[must_use] + pub fn ch1(&mut self) -> Ch1W { + Ch1W::new(self, 1) } - #[doc = "Bit 0 - Channel Request Mask clear"] + #[doc = "Bit 2 - Channel Request Mask clear"] #[inline(always)] - pub fn ch0(&mut self) -> CH0_W { - CH0_W { w: self } + #[must_use] + pub fn ch2(&mut self) -> Ch2W { + Ch2W::new(self, 2) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bit 3 - Channel Request Mask clear"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn ch3(&mut self) -> Ch3W { + Ch3W::new(self, 3) } } -#[doc = "DMA channel request mask clear\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [chnl_req_mask_clr](index.html) module"] -pub struct CHNL_REQ_MASK_CLR_SPEC; -impl crate::RegisterSpec for CHNL_REQ_MASK_CLR_SPEC { +#[doc = "DMA channel request mask clear\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`chnl_req_mask_clr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`chnl_req_mask_clr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ChnlReqMaskClrSpec; +impl crate::RegisterSpec for ChnlReqMaskClrSpec { type Ux = u32; } -#[doc = "`read()` method returns [chnl_req_mask_clr::R](R) reader structure"] -impl crate::Readable for CHNL_REQ_MASK_CLR_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [chnl_req_mask_clr::W](W) writer structure"] -impl crate::Writable for CHNL_REQ_MASK_CLR_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`chnl_req_mask_clr::R`](R) reader structure"] +impl crate::Readable for ChnlReqMaskClrSpec {} +#[doc = "`write(|w| ..)` method takes [`chnl_req_mask_clr::W`](W) writer structure"] +impl crate::Writable for ChnlReqMaskClrSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CHNL_REQ_MASK_CLR to value 0"] -impl crate::Resettable for CHNL_REQ_MASK_CLR_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for ChnlReqMaskClrSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/dma/chnl_req_mask_set.rs b/va416xx/src/dma/chnl_req_mask_set.rs index 9ed07ca..ded1e6a 100644 --- a/va416xx/src/dma/chnl_req_mask_set.rs +++ b/va416xx/src/dma/chnl_req_mask_set.rs @@ -1,254 +1,85 @@ #[doc = "Register `CHNL_REQ_MASK_SET` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CHNL_REQ_MASK_SET` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `CH3` reader - Channel Request Mask set"] -pub struct CH3_R(crate::FieldReader); -impl CH3_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CH3_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CH3_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CH3` writer - Channel Request Mask set"] -pub struct CH3_W<'a> { - w: &'a mut W, -} -impl<'a> CH3_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); - self.w - } -} -#[doc = "Field `CH2` reader - Channel Request Mask set"] -pub struct CH2_R(crate::FieldReader); -impl CH2_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CH2_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CH2_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CH2` writer - Channel Request Mask set"] -pub struct CH2_W<'a> { - w: &'a mut W, -} -impl<'a> CH2_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); - self.w - } -} -#[doc = "Field `CH1` reader - Channel Request Mask set"] -pub struct CH1_R(crate::FieldReader); -impl CH1_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CH1_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CH1_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CH1` writer - Channel Request Mask set"] -pub struct CH1_W<'a> { - w: &'a mut W, -} -impl<'a> CH1_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); - self.w - } -} +pub type W = crate::W; #[doc = "Field `CH0` reader - Channel Request Mask set"] -pub struct CH0_R(crate::FieldReader); -impl CH0_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CH0_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CH0_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Ch0R = crate::BitReader; #[doc = "Field `CH0` writer - Channel Request Mask set"] -pub struct CH0_W<'a> { - w: &'a mut W, -} -impl<'a> CH0_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} +pub type Ch0W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `CH1` reader - Channel Request Mask set"] +pub type Ch1R = crate::BitReader; +#[doc = "Field `CH1` writer - Channel Request Mask set"] +pub type Ch1W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `CH2` reader - Channel Request Mask set"] +pub type Ch2R = crate::BitReader; +#[doc = "Field `CH2` writer - Channel Request Mask set"] +pub type Ch2W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `CH3` reader - Channel Request Mask set"] +pub type Ch3R = crate::BitReader; +#[doc = "Field `CH3` writer - Channel Request Mask set"] +pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG>; impl R { - #[doc = "Bit 3 - Channel Request Mask set"] + #[doc = "Bit 0 - Channel Request Mask set"] #[inline(always)] - pub fn ch3(&self) -> CH3_R { - CH3_R::new(((self.bits >> 3) & 0x01) != 0) - } - #[doc = "Bit 2 - Channel Request Mask set"] - #[inline(always)] - pub fn ch2(&self) -> CH2_R { - CH2_R::new(((self.bits >> 2) & 0x01) != 0) + pub fn ch0(&self) -> Ch0R { + Ch0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Channel Request Mask set"] #[inline(always)] - pub fn ch1(&self) -> CH1_R { - CH1_R::new(((self.bits >> 1) & 0x01) != 0) + pub fn ch1(&self) -> Ch1R { + Ch1R::new(((self.bits >> 1) & 1) != 0) } - #[doc = "Bit 0 - Channel Request Mask set"] + #[doc = "Bit 2 - Channel Request Mask set"] #[inline(always)] - pub fn ch0(&self) -> CH0_R { - CH0_R::new((self.bits & 0x01) != 0) + pub fn ch2(&self) -> Ch2R { + Ch2R::new(((self.bits >> 2) & 1) != 0) + } + #[doc = "Bit 3 - Channel Request Mask set"] + #[inline(always)] + pub fn ch3(&self) -> Ch3R { + Ch3R::new(((self.bits >> 3) & 1) != 0) } } impl W { - #[doc = "Bit 3 - Channel Request Mask set"] + #[doc = "Bit 0 - Channel Request Mask set"] #[inline(always)] - pub fn ch3(&mut self) -> CH3_W { - CH3_W { w: self } - } - #[doc = "Bit 2 - Channel Request Mask set"] - #[inline(always)] - pub fn ch2(&mut self) -> CH2_W { - CH2_W { w: self } + #[must_use] + pub fn ch0(&mut self) -> Ch0W { + Ch0W::new(self, 0) } #[doc = "Bit 1 - Channel Request Mask set"] #[inline(always)] - pub fn ch1(&mut self) -> CH1_W { - CH1_W { w: self } + #[must_use] + pub fn ch1(&mut self) -> Ch1W { + Ch1W::new(self, 1) } - #[doc = "Bit 0 - Channel Request Mask set"] + #[doc = "Bit 2 - Channel Request Mask set"] #[inline(always)] - pub fn ch0(&mut self) -> CH0_W { - CH0_W { w: self } + #[must_use] + pub fn ch2(&mut self) -> Ch2W { + Ch2W::new(self, 2) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bit 3 - Channel Request Mask set"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn ch3(&mut self) -> Ch3W { + Ch3W::new(self, 3) } } -#[doc = "DMA channel request mask set\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [chnl_req_mask_set](index.html) module"] -pub struct CHNL_REQ_MASK_SET_SPEC; -impl crate::RegisterSpec for CHNL_REQ_MASK_SET_SPEC { +#[doc = "DMA channel request mask set\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`chnl_req_mask_set::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`chnl_req_mask_set::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ChnlReqMaskSetSpec; +impl crate::RegisterSpec for ChnlReqMaskSetSpec { type Ux = u32; } -#[doc = "`read()` method returns [chnl_req_mask_set::R](R) reader structure"] -impl crate::Readable for CHNL_REQ_MASK_SET_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [chnl_req_mask_set::W](W) writer structure"] -impl crate::Writable for CHNL_REQ_MASK_SET_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`chnl_req_mask_set::R`](R) reader structure"] +impl crate::Readable for ChnlReqMaskSetSpec {} +#[doc = "`write(|w| ..)` method takes [`chnl_req_mask_set::W`](W) writer structure"] +impl crate::Writable for ChnlReqMaskSetSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CHNL_REQ_MASK_SET to value 0"] -impl crate::Resettable for CHNL_REQ_MASK_SET_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for ChnlReqMaskSetSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/dma/chnl_sw_request.rs b/va416xx/src/dma/chnl_sw_request.rs index 8a75692..4a72688 100644 --- a/va416xx/src/dma/chnl_sw_request.rs +++ b/va416xx/src/dma/chnl_sw_request.rs @@ -1,153 +1,51 @@ #[doc = "Register `CHNL_SW_REQUEST` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `CH3` writer - Channel SW request"] -pub struct CH3_W<'a> { - w: &'a mut W, -} -impl<'a> CH3_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); - self.w - } -} -#[doc = "Field `CH2` writer - Channel SW request"] -pub struct CH2_W<'a> { - w: &'a mut W, -} -impl<'a> CH2_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); - self.w - } -} -#[doc = "Field `CH1` writer - Channel SW request"] -pub struct CH1_W<'a> { - w: &'a mut W, -} -impl<'a> CH1_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); - self.w - } -} +pub type W = crate::W; #[doc = "Field `CH0` writer - Channel SW request"] -pub struct CH0_W<'a> { - w: &'a mut W, -} -impl<'a> CH0_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} +pub type Ch0W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `CH1` writer - Channel SW request"] +pub type Ch1W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `CH2` writer - Channel SW request"] +pub type Ch2W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `CH3` writer - Channel SW request"] +pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG>; impl W { - #[doc = "Bit 3 - Channel SW request"] + #[doc = "Bit 0 - Channel SW request"] #[inline(always)] - pub fn ch3(&mut self) -> CH3_W { - CH3_W { w: self } - } - #[doc = "Bit 2 - Channel SW request"] - #[inline(always)] - pub fn ch2(&mut self) -> CH2_W { - CH2_W { w: self } + #[must_use] + pub fn ch0(&mut self) -> Ch0W { + Ch0W::new(self, 0) } #[doc = "Bit 1 - Channel SW request"] #[inline(always)] - pub fn ch1(&mut self) -> CH1_W { - CH1_W { w: self } + #[must_use] + pub fn ch1(&mut self) -> Ch1W { + Ch1W::new(self, 1) } - #[doc = "Bit 0 - Channel SW request"] + #[doc = "Bit 2 - Channel SW request"] #[inline(always)] - pub fn ch0(&mut self) -> CH0_W { - CH0_W { w: self } + #[must_use] + pub fn ch2(&mut self) -> Ch2W { + Ch2W::new(self, 2) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bit 3 - Channel SW request"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn ch3(&mut self) -> Ch3W { + Ch3W::new(self, 3) } } -#[doc = "DMA channel software request\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [chnl_sw_request](index.html) module"] -pub struct CHNL_SW_REQUEST_SPEC; -impl crate::RegisterSpec for CHNL_SW_REQUEST_SPEC { +#[doc = "DMA channel software request\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`chnl_sw_request::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ChnlSwRequestSpec; +impl crate::RegisterSpec for ChnlSwRequestSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [chnl_sw_request::W](W) writer structure"] -impl crate::Writable for CHNL_SW_REQUEST_SPEC { - type Writer = W; +#[doc = "`write(|w| ..)` method takes [`chnl_sw_request::W`](W) writer structure"] +impl crate::Writable for ChnlSwRequestSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CHNL_SW_REQUEST to value 0"] -impl crate::Resettable for CHNL_SW_REQUEST_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for ChnlSwRequestSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/dma/chnl_useburst_clr.rs b/va416xx/src/dma/chnl_useburst_clr.rs index c7fa011..622218d 100644 --- a/va416xx/src/dma/chnl_useburst_clr.rs +++ b/va416xx/src/dma/chnl_useburst_clr.rs @@ -1,254 +1,85 @@ #[doc = "Register `CHNL_USEBURST_CLR` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CHNL_USEBURST_CLR` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `CH3` reader - Channel use burst clear"] -pub struct CH3_R(crate::FieldReader); -impl CH3_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CH3_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CH3_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CH3` writer - Channel use burst clear"] -pub struct CH3_W<'a> { - w: &'a mut W, -} -impl<'a> CH3_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); - self.w - } -} -#[doc = "Field `CH2` reader - Channel use burst clear"] -pub struct CH2_R(crate::FieldReader); -impl CH2_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CH2_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CH2_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CH2` writer - Channel use burst clear"] -pub struct CH2_W<'a> { - w: &'a mut W, -} -impl<'a> CH2_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); - self.w - } -} -#[doc = "Field `CH1` reader - Channel use burst clear"] -pub struct CH1_R(crate::FieldReader); -impl CH1_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CH1_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CH1_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CH1` writer - Channel use burst clear"] -pub struct CH1_W<'a> { - w: &'a mut W, -} -impl<'a> CH1_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); - self.w - } -} +pub type W = crate::W; #[doc = "Field `CH0` reader - Channel use burst clear"] -pub struct CH0_R(crate::FieldReader); -impl CH0_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CH0_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CH0_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Ch0R = crate::BitReader; #[doc = "Field `CH0` writer - Channel use burst clear"] -pub struct CH0_W<'a> { - w: &'a mut W, -} -impl<'a> CH0_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} +pub type Ch0W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `CH1` reader - Channel use burst clear"] +pub type Ch1R = crate::BitReader; +#[doc = "Field `CH1` writer - Channel use burst clear"] +pub type Ch1W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `CH2` reader - Channel use burst clear"] +pub type Ch2R = crate::BitReader; +#[doc = "Field `CH2` writer - Channel use burst clear"] +pub type Ch2W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `CH3` reader - Channel use burst clear"] +pub type Ch3R = crate::BitReader; +#[doc = "Field `CH3` writer - Channel use burst clear"] +pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG>; impl R { - #[doc = "Bit 3 - Channel use burst clear"] + #[doc = "Bit 0 - Channel use burst clear"] #[inline(always)] - pub fn ch3(&self) -> CH3_R { - CH3_R::new(((self.bits >> 3) & 0x01) != 0) - } - #[doc = "Bit 2 - Channel use burst clear"] - #[inline(always)] - pub fn ch2(&self) -> CH2_R { - CH2_R::new(((self.bits >> 2) & 0x01) != 0) + pub fn ch0(&self) -> Ch0R { + Ch0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Channel use burst clear"] #[inline(always)] - pub fn ch1(&self) -> CH1_R { - CH1_R::new(((self.bits >> 1) & 0x01) != 0) + pub fn ch1(&self) -> Ch1R { + Ch1R::new(((self.bits >> 1) & 1) != 0) } - #[doc = "Bit 0 - Channel use burst clear"] + #[doc = "Bit 2 - Channel use burst clear"] #[inline(always)] - pub fn ch0(&self) -> CH0_R { - CH0_R::new((self.bits & 0x01) != 0) + pub fn ch2(&self) -> Ch2R { + Ch2R::new(((self.bits >> 2) & 1) != 0) + } + #[doc = "Bit 3 - Channel use burst clear"] + #[inline(always)] + pub fn ch3(&self) -> Ch3R { + Ch3R::new(((self.bits >> 3) & 1) != 0) } } impl W { - #[doc = "Bit 3 - Channel use burst clear"] + #[doc = "Bit 0 - Channel use burst clear"] #[inline(always)] - pub fn ch3(&mut self) -> CH3_W { - CH3_W { w: self } - } - #[doc = "Bit 2 - Channel use burst clear"] - #[inline(always)] - pub fn ch2(&mut self) -> CH2_W { - CH2_W { w: self } + #[must_use] + pub fn ch0(&mut self) -> Ch0W { + Ch0W::new(self, 0) } #[doc = "Bit 1 - Channel use burst clear"] #[inline(always)] - pub fn ch1(&mut self) -> CH1_W { - CH1_W { w: self } + #[must_use] + pub fn ch1(&mut self) -> Ch1W { + Ch1W::new(self, 1) } - #[doc = "Bit 0 - Channel use burst clear"] + #[doc = "Bit 2 - Channel use burst clear"] #[inline(always)] - pub fn ch0(&mut self) -> CH0_W { - CH0_W { w: self } + #[must_use] + pub fn ch2(&mut self) -> Ch2W { + Ch2W::new(self, 2) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bit 3 - Channel use burst clear"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn ch3(&mut self) -> Ch3W { + Ch3W::new(self, 3) } } -#[doc = "DMA channel useburst clear\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [chnl_useburst_clr](index.html) module"] -pub struct CHNL_USEBURST_CLR_SPEC; -impl crate::RegisterSpec for CHNL_USEBURST_CLR_SPEC { +#[doc = "DMA channel useburst clear\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`chnl_useburst_clr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`chnl_useburst_clr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ChnlUseburstClrSpec; +impl crate::RegisterSpec for ChnlUseburstClrSpec { type Ux = u32; } -#[doc = "`read()` method returns [chnl_useburst_clr::R](R) reader structure"] -impl crate::Readable for CHNL_USEBURST_CLR_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [chnl_useburst_clr::W](W) writer structure"] -impl crate::Writable for CHNL_USEBURST_CLR_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`chnl_useburst_clr::R`](R) reader structure"] +impl crate::Readable for ChnlUseburstClrSpec {} +#[doc = "`write(|w| ..)` method takes [`chnl_useburst_clr::W`](W) writer structure"] +impl crate::Writable for ChnlUseburstClrSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CHNL_USEBURST_CLR to value 0"] -impl crate::Resettable for CHNL_USEBURST_CLR_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for ChnlUseburstClrSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/dma/chnl_useburst_set.rs b/va416xx/src/dma/chnl_useburst_set.rs index a2055d2..432d463 100644 --- a/va416xx/src/dma/chnl_useburst_set.rs +++ b/va416xx/src/dma/chnl_useburst_set.rs @@ -1,254 +1,85 @@ #[doc = "Register `CHNL_USEBURST_SET` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CHNL_USEBURST_SET` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `CH3` reader - Channel use burst set"] -pub struct CH3_R(crate::FieldReader); -impl CH3_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CH3_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CH3_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CH3` writer - Channel use burst set"] -pub struct CH3_W<'a> { - w: &'a mut W, -} -impl<'a> CH3_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); - self.w - } -} -#[doc = "Field `CH2` reader - Channel use burst set"] -pub struct CH2_R(crate::FieldReader); -impl CH2_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CH2_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CH2_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CH2` writer - Channel use burst set"] -pub struct CH2_W<'a> { - w: &'a mut W, -} -impl<'a> CH2_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); - self.w - } -} -#[doc = "Field `CH1` reader - Channel use burst set"] -pub struct CH1_R(crate::FieldReader); -impl CH1_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CH1_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CH1_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CH1` writer - Channel use burst set"] -pub struct CH1_W<'a> { - w: &'a mut W, -} -impl<'a> CH1_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); - self.w - } -} +pub type W = crate::W; #[doc = "Field `CH0` reader - Channel use burst set"] -pub struct CH0_R(crate::FieldReader); -impl CH0_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CH0_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CH0_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Ch0R = crate::BitReader; #[doc = "Field `CH0` writer - Channel use burst set"] -pub struct CH0_W<'a> { - w: &'a mut W, -} -impl<'a> CH0_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} +pub type Ch0W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `CH1` reader - Channel use burst set"] +pub type Ch1R = crate::BitReader; +#[doc = "Field `CH1` writer - Channel use burst set"] +pub type Ch1W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `CH2` reader - Channel use burst set"] +pub type Ch2R = crate::BitReader; +#[doc = "Field `CH2` writer - Channel use burst set"] +pub type Ch2W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `CH3` reader - Channel use burst set"] +pub type Ch3R = crate::BitReader; +#[doc = "Field `CH3` writer - Channel use burst set"] +pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG>; impl R { - #[doc = "Bit 3 - Channel use burst set"] + #[doc = "Bit 0 - Channel use burst set"] #[inline(always)] - pub fn ch3(&self) -> CH3_R { - CH3_R::new(((self.bits >> 3) & 0x01) != 0) - } - #[doc = "Bit 2 - Channel use burst set"] - #[inline(always)] - pub fn ch2(&self) -> CH2_R { - CH2_R::new(((self.bits >> 2) & 0x01) != 0) + pub fn ch0(&self) -> Ch0R { + Ch0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Channel use burst set"] #[inline(always)] - pub fn ch1(&self) -> CH1_R { - CH1_R::new(((self.bits >> 1) & 0x01) != 0) + pub fn ch1(&self) -> Ch1R { + Ch1R::new(((self.bits >> 1) & 1) != 0) } - #[doc = "Bit 0 - Channel use burst set"] + #[doc = "Bit 2 - Channel use burst set"] #[inline(always)] - pub fn ch0(&self) -> CH0_R { - CH0_R::new((self.bits & 0x01) != 0) + pub fn ch2(&self) -> Ch2R { + Ch2R::new(((self.bits >> 2) & 1) != 0) + } + #[doc = "Bit 3 - Channel use burst set"] + #[inline(always)] + pub fn ch3(&self) -> Ch3R { + Ch3R::new(((self.bits >> 3) & 1) != 0) } } impl W { - #[doc = "Bit 3 - Channel use burst set"] + #[doc = "Bit 0 - Channel use burst set"] #[inline(always)] - pub fn ch3(&mut self) -> CH3_W { - CH3_W { w: self } - } - #[doc = "Bit 2 - Channel use burst set"] - #[inline(always)] - pub fn ch2(&mut self) -> CH2_W { - CH2_W { w: self } + #[must_use] + pub fn ch0(&mut self) -> Ch0W { + Ch0W::new(self, 0) } #[doc = "Bit 1 - Channel use burst set"] #[inline(always)] - pub fn ch1(&mut self) -> CH1_W { - CH1_W { w: self } + #[must_use] + pub fn ch1(&mut self) -> Ch1W { + Ch1W::new(self, 1) } - #[doc = "Bit 0 - Channel use burst set"] + #[doc = "Bit 2 - Channel use burst set"] #[inline(always)] - pub fn ch0(&mut self) -> CH0_W { - CH0_W { w: self } + #[must_use] + pub fn ch2(&mut self) -> Ch2W { + Ch2W::new(self, 2) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bit 3 - Channel use burst set"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn ch3(&mut self) -> Ch3W { + Ch3W::new(self, 3) } } -#[doc = "DMA channel useburst set\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [chnl_useburst_set](index.html) module"] -pub struct CHNL_USEBURST_SET_SPEC; -impl crate::RegisterSpec for CHNL_USEBURST_SET_SPEC { +#[doc = "DMA channel useburst set\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`chnl_useburst_set::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`chnl_useburst_set::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ChnlUseburstSetSpec; +impl crate::RegisterSpec for ChnlUseburstSetSpec { type Ux = u32; } -#[doc = "`read()` method returns [chnl_useburst_set::R](R) reader structure"] -impl crate::Readable for CHNL_USEBURST_SET_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [chnl_useburst_set::W](W) writer structure"] -impl crate::Writable for CHNL_USEBURST_SET_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`chnl_useburst_set::R`](R) reader structure"] +impl crate::Readable for ChnlUseburstSetSpec {} +#[doc = "`write(|w| ..)` method takes [`chnl_useburst_set::W`](W) writer structure"] +impl crate::Writable for ChnlUseburstSetSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CHNL_USEBURST_SET to value 0"] -impl crate::Resettable for CHNL_USEBURST_SET_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for ChnlUseburstSetSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/dma/ctrl_base_ptr.rs b/va416xx/src/dma/ctrl_base_ptr.rs index 8471c0f..810ddc6 100644 --- a/va416xx/src/dma/ctrl_base_ptr.rs +++ b/va416xx/src/dma/ctrl_base_ptr.rs @@ -1,103 +1,40 @@ #[doc = "Register `CTRL_BASE_PTR` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CTRL_BASE_PTR` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CTRL_BASE_PTR` reader - Base Pointer for DMA Control Registers"] -pub struct CTRL_BASE_PTR_R(crate::FieldReader); -impl CTRL_BASE_PTR_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - CTRL_BASE_PTR_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CTRL_BASE_PTR_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type CtrlBasePtrR = crate::FieldReader; #[doc = "Field `CTRL_BASE_PTR` writer - Base Pointer for DMA Control Registers"] -pub struct CTRL_BASE_PTR_W<'a> { - w: &'a mut W, -} -impl<'a> CTRL_BASE_PTR_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01ff_ffff << 7)) | ((value as u32 & 0x01ff_ffff) << 7); - self.w - } -} +pub type CtrlBasePtrW<'a, REG> = crate::FieldWriter<'a, REG, 25, u32>; impl R { #[doc = "Bits 7:31 - Base Pointer for DMA Control Registers"] #[inline(always)] - pub fn ctrl_base_ptr(&self) -> CTRL_BASE_PTR_R { - CTRL_BASE_PTR_R::new(((self.bits >> 7) & 0x01ff_ffff) as u32) + pub fn ctrl_base_ptr(&self) -> CtrlBasePtrR { + CtrlBasePtrR::new((self.bits >> 7) & 0x01ff_ffff) } } impl W { #[doc = "Bits 7:31 - Base Pointer for DMA Control Registers"] #[inline(always)] - pub fn ctrl_base_ptr(&mut self) -> CTRL_BASE_PTR_W { - CTRL_BASE_PTR_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn ctrl_base_ptr(&mut self) -> CtrlBasePtrW { + CtrlBasePtrW::new(self, 7) } } -#[doc = "Base Pointer for DMA Control Registers\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl_base_ptr](index.html) module"] -pub struct CTRL_BASE_PTR_SPEC; -impl crate::RegisterSpec for CTRL_BASE_PTR_SPEC { +#[doc = "Base Pointer for DMA Control Registers\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctrl_base_ptr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctrl_base_ptr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CtrlBasePtrSpec; +impl crate::RegisterSpec for CtrlBasePtrSpec { type Ux = u32; } -#[doc = "`read()` method returns [ctrl_base_ptr::R](R) reader structure"] -impl crate::Readable for CTRL_BASE_PTR_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ctrl_base_ptr::W](W) writer structure"] -impl crate::Writable for CTRL_BASE_PTR_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`ctrl_base_ptr::R`](R) reader structure"] +impl crate::Readable for CtrlBasePtrSpec {} +#[doc = "`write(|w| ..)` method takes [`ctrl_base_ptr::W`](W) writer structure"] +impl crate::Writable for CtrlBasePtrSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTRL_BASE_PTR to value 0"] -impl crate::Resettable for CTRL_BASE_PTR_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for CtrlBasePtrSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/dma/dma_active_clr.rs b/va416xx/src/dma/dma_active_clr.rs index 930411c..0c962e3 100644 --- a/va416xx/src/dma/dma_active_clr.rs +++ b/va416xx/src/dma/dma_active_clr.rs @@ -1,254 +1,85 @@ #[doc = "Register `DMA_ACTIVE_CLR` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DMA_ACTIVE_CLR` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `CH3` reader - DMA Active clear"] -pub struct CH3_R(crate::FieldReader); -impl CH3_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CH3_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CH3_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CH3` writer - DMA Active clear"] -pub struct CH3_W<'a> { - w: &'a mut W, -} -impl<'a> CH3_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); - self.w - } -} -#[doc = "Field `CH2` reader - DMA Active clear"] -pub struct CH2_R(crate::FieldReader); -impl CH2_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CH2_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CH2_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CH2` writer - DMA Active clear"] -pub struct CH2_W<'a> { - w: &'a mut W, -} -impl<'a> CH2_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); - self.w - } -} -#[doc = "Field `CH1` reader - DMA Active clear"] -pub struct CH1_R(crate::FieldReader); -impl CH1_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CH1_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CH1_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CH1` writer - DMA Active clear"] -pub struct CH1_W<'a> { - w: &'a mut W, -} -impl<'a> CH1_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); - self.w - } -} +pub type W = crate::W; #[doc = "Field `CH0` reader - DMA Active clear"] -pub struct CH0_R(crate::FieldReader); -impl CH0_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CH0_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CH0_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Ch0R = crate::BitReader; #[doc = "Field `CH0` writer - DMA Active clear"] -pub struct CH0_W<'a> { - w: &'a mut W, -} -impl<'a> CH0_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} +pub type Ch0W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `CH1` reader - DMA Active clear"] +pub type Ch1R = crate::BitReader; +#[doc = "Field `CH1` writer - DMA Active clear"] +pub type Ch1W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `CH2` reader - DMA Active clear"] +pub type Ch2R = crate::BitReader; +#[doc = "Field `CH2` writer - DMA Active clear"] +pub type Ch2W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `CH3` reader - DMA Active clear"] +pub type Ch3R = crate::BitReader; +#[doc = "Field `CH3` writer - DMA Active clear"] +pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG>; impl R { - #[doc = "Bit 3 - DMA Active clear"] + #[doc = "Bit 0 - DMA Active clear"] #[inline(always)] - pub fn ch3(&self) -> CH3_R { - CH3_R::new(((self.bits >> 3) & 0x01) != 0) - } - #[doc = "Bit 2 - DMA Active clear"] - #[inline(always)] - pub fn ch2(&self) -> CH2_R { - CH2_R::new(((self.bits >> 2) & 0x01) != 0) + pub fn ch0(&self) -> Ch0R { + Ch0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - DMA Active clear"] #[inline(always)] - pub fn ch1(&self) -> CH1_R { - CH1_R::new(((self.bits >> 1) & 0x01) != 0) + pub fn ch1(&self) -> Ch1R { + Ch1R::new(((self.bits >> 1) & 1) != 0) } - #[doc = "Bit 0 - DMA Active clear"] + #[doc = "Bit 2 - DMA Active clear"] #[inline(always)] - pub fn ch0(&self) -> CH0_R { - CH0_R::new((self.bits & 0x01) != 0) + pub fn ch2(&self) -> Ch2R { + Ch2R::new(((self.bits >> 2) & 1) != 0) + } + #[doc = "Bit 3 - DMA Active clear"] + #[inline(always)] + pub fn ch3(&self) -> Ch3R { + Ch3R::new(((self.bits >> 3) & 1) != 0) } } impl W { - #[doc = "Bit 3 - DMA Active clear"] + #[doc = "Bit 0 - DMA Active clear"] #[inline(always)] - pub fn ch3(&mut self) -> CH3_W { - CH3_W { w: self } - } - #[doc = "Bit 2 - DMA Active clear"] - #[inline(always)] - pub fn ch2(&mut self) -> CH2_W { - CH2_W { w: self } + #[must_use] + pub fn ch0(&mut self) -> Ch0W { + Ch0W::new(self, 0) } #[doc = "Bit 1 - DMA Active clear"] #[inline(always)] - pub fn ch1(&mut self) -> CH1_W { - CH1_W { w: self } + #[must_use] + pub fn ch1(&mut self) -> Ch1W { + Ch1W::new(self, 1) } - #[doc = "Bit 0 - DMA Active clear"] + #[doc = "Bit 2 - DMA Active clear"] #[inline(always)] - pub fn ch0(&mut self) -> CH0_W { - CH0_W { w: self } + #[must_use] + pub fn ch2(&mut self) -> Ch2W { + Ch2W::new(self, 2) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bit 3 - DMA Active clear"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn ch3(&mut self) -> Ch3W { + Ch3W::new(self, 3) } } -#[doc = "DMA active clear\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dma_active_clr](index.html) module"] -pub struct DMA_ACTIVE_CLR_SPEC; -impl crate::RegisterSpec for DMA_ACTIVE_CLR_SPEC { +#[doc = "DMA active clear\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_active_clr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_active_clr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DmaActiveClrSpec; +impl crate::RegisterSpec for DmaActiveClrSpec { type Ux = u32; } -#[doc = "`read()` method returns [dma_active_clr::R](R) reader structure"] -impl crate::Readable for DMA_ACTIVE_CLR_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dma_active_clr::W](W) writer structure"] -impl crate::Writable for DMA_ACTIVE_CLR_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`dma_active_clr::R`](R) reader structure"] +impl crate::Readable for DmaActiveClrSpec {} +#[doc = "`write(|w| ..)` method takes [`dma_active_clr::W`](W) writer structure"] +impl crate::Writable for DmaActiveClrSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DMA_ACTIVE_CLR to value 0"] -impl crate::Resettable for DMA_ACTIVE_CLR_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for DmaActiveClrSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/dma/dma_active_set.rs b/va416xx/src/dma/dma_active_set.rs index 6a792b3..55f9f8e 100644 --- a/va416xx/src/dma/dma_active_set.rs +++ b/va416xx/src/dma/dma_active_set.rs @@ -1,254 +1,85 @@ #[doc = "Register `DMA_ACTIVE_SET` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DMA_ACTIVE_SET` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `CH3` reader - DMA Active Set"] -pub struct CH3_R(crate::FieldReader); -impl CH3_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CH3_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CH3_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CH3` writer - DMA Active Set"] -pub struct CH3_W<'a> { - w: &'a mut W, -} -impl<'a> CH3_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); - self.w - } -} -#[doc = "Field `CH2` reader - DMA Active Set"] -pub struct CH2_R(crate::FieldReader); -impl CH2_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CH2_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CH2_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CH2` writer - DMA Active Set"] -pub struct CH2_W<'a> { - w: &'a mut W, -} -impl<'a> CH2_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); - self.w - } -} -#[doc = "Field `CH1` reader - DMA Active Set"] -pub struct CH1_R(crate::FieldReader); -impl CH1_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CH1_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CH1_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CH1` writer - DMA Active Set"] -pub struct CH1_W<'a> { - w: &'a mut W, -} -impl<'a> CH1_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); - self.w - } -} +pub type W = crate::W; #[doc = "Field `CH0` reader - DMA Active Set"] -pub struct CH0_R(crate::FieldReader); -impl CH0_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CH0_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CH0_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Ch0R = crate::BitReader; #[doc = "Field `CH0` writer - DMA Active Set"] -pub struct CH0_W<'a> { - w: &'a mut W, -} -impl<'a> CH0_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} +pub type Ch0W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `CH1` reader - DMA Active Set"] +pub type Ch1R = crate::BitReader; +#[doc = "Field `CH1` writer - DMA Active Set"] +pub type Ch1W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `CH2` reader - DMA Active Set"] +pub type Ch2R = crate::BitReader; +#[doc = "Field `CH2` writer - DMA Active Set"] +pub type Ch2W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `CH3` reader - DMA Active Set"] +pub type Ch3R = crate::BitReader; +#[doc = "Field `CH3` writer - DMA Active Set"] +pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG>; impl R { - #[doc = "Bit 3 - DMA Active Set"] + #[doc = "Bit 0 - DMA Active Set"] #[inline(always)] - pub fn ch3(&self) -> CH3_R { - CH3_R::new(((self.bits >> 3) & 0x01) != 0) - } - #[doc = "Bit 2 - DMA Active Set"] - #[inline(always)] - pub fn ch2(&self) -> CH2_R { - CH2_R::new(((self.bits >> 2) & 0x01) != 0) + pub fn ch0(&self) -> Ch0R { + Ch0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - DMA Active Set"] #[inline(always)] - pub fn ch1(&self) -> CH1_R { - CH1_R::new(((self.bits >> 1) & 0x01) != 0) + pub fn ch1(&self) -> Ch1R { + Ch1R::new(((self.bits >> 1) & 1) != 0) } - #[doc = "Bit 0 - DMA Active Set"] + #[doc = "Bit 2 - DMA Active Set"] #[inline(always)] - pub fn ch0(&self) -> CH0_R { - CH0_R::new((self.bits & 0x01) != 0) + pub fn ch2(&self) -> Ch2R { + Ch2R::new(((self.bits >> 2) & 1) != 0) + } + #[doc = "Bit 3 - DMA Active Set"] + #[inline(always)] + pub fn ch3(&self) -> Ch3R { + Ch3R::new(((self.bits >> 3) & 1) != 0) } } impl W { - #[doc = "Bit 3 - DMA Active Set"] + #[doc = "Bit 0 - DMA Active Set"] #[inline(always)] - pub fn ch3(&mut self) -> CH3_W { - CH3_W { w: self } - } - #[doc = "Bit 2 - DMA Active Set"] - #[inline(always)] - pub fn ch2(&mut self) -> CH2_W { - CH2_W { w: self } + #[must_use] + pub fn ch0(&mut self) -> Ch0W { + Ch0W::new(self, 0) } #[doc = "Bit 1 - DMA Active Set"] #[inline(always)] - pub fn ch1(&mut self) -> CH1_W { - CH1_W { w: self } + #[must_use] + pub fn ch1(&mut self) -> Ch1W { + Ch1W::new(self, 1) } - #[doc = "Bit 0 - DMA Active Set"] + #[doc = "Bit 2 - DMA Active Set"] #[inline(always)] - pub fn ch0(&mut self) -> CH0_W { - CH0_W { w: self } + #[must_use] + pub fn ch2(&mut self) -> Ch2W { + Ch2W::new(self, 2) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bit 3 - DMA Active Set"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn ch3(&mut self) -> Ch3W { + Ch3W::new(self, 3) } } -#[doc = "DMA active set\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dma_active_set](index.html) module"] -pub struct DMA_ACTIVE_SET_SPEC; -impl crate::RegisterSpec for DMA_ACTIVE_SET_SPEC { +#[doc = "DMA active set\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_active_set::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_active_set::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DmaActiveSetSpec; +impl crate::RegisterSpec for DmaActiveSetSpec { type Ux = u32; } -#[doc = "`read()` method returns [dma_active_set::R](R) reader structure"] -impl crate::Readable for DMA_ACTIVE_SET_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dma_active_set::W](W) writer structure"] -impl crate::Writable for DMA_ACTIVE_SET_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`dma_active_set::R`](R) reader structure"] +impl crate::Readable for DmaActiveSetSpec {} +#[doc = "`write(|w| ..)` method takes [`dma_active_set::W`](W) writer structure"] +impl crate::Writable for DmaActiveSetSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DMA_ACTIVE_SET to value 0"] -impl crate::Resettable for DMA_ACTIVE_SET_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for DmaActiveSetSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/dma/dma_done_clr.rs b/va416xx/src/dma/dma_done_clr.rs index 121bb53..2a1091d 100644 --- a/va416xx/src/dma/dma_done_clr.rs +++ b/va416xx/src/dma/dma_done_clr.rs @@ -1,254 +1,85 @@ #[doc = "Register `DMA_DONE_CLR` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DMA_DONE_CLR` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `CH3` reader - DMA Done clear for this CH"] -pub struct CH3_R(crate::FieldReader); -impl CH3_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CH3_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CH3_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CH3` writer - DMA Done clear for this CH"] -pub struct CH3_W<'a> { - w: &'a mut W, -} -impl<'a> CH3_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); - self.w - } -} -#[doc = "Field `CH2` reader - DMA Done clear for this CH"] -pub struct CH2_R(crate::FieldReader); -impl CH2_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CH2_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CH2_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CH2` writer - DMA Done clear for this CH"] -pub struct CH2_W<'a> { - w: &'a mut W, -} -impl<'a> CH2_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); - self.w - } -} -#[doc = "Field `CH1` reader - DMA Done clear for this CH"] -pub struct CH1_R(crate::FieldReader); -impl CH1_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CH1_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CH1_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CH1` writer - DMA Done clear for this CH"] -pub struct CH1_W<'a> { - w: &'a mut W, -} -impl<'a> CH1_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); - self.w - } -} +pub type W = crate::W; #[doc = "Field `CH0` reader - DMA Done clear for this CH"] -pub struct CH0_R(crate::FieldReader); -impl CH0_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CH0_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CH0_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Ch0R = crate::BitReader; #[doc = "Field `CH0` writer - DMA Done clear for this CH"] -pub struct CH0_W<'a> { - w: &'a mut W, -} -impl<'a> CH0_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} +pub type Ch0W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `CH1` reader - DMA Done clear for this CH"] +pub type Ch1R = crate::BitReader; +#[doc = "Field `CH1` writer - DMA Done clear for this CH"] +pub type Ch1W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `CH2` reader - DMA Done clear for this CH"] +pub type Ch2R = crate::BitReader; +#[doc = "Field `CH2` writer - DMA Done clear for this CH"] +pub type Ch2W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `CH3` reader - DMA Done clear for this CH"] +pub type Ch3R = crate::BitReader; +#[doc = "Field `CH3` writer - DMA Done clear for this CH"] +pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG>; impl R { - #[doc = "Bit 3 - DMA Done clear for this CH"] + #[doc = "Bit 0 - DMA Done clear for this CH"] #[inline(always)] - pub fn ch3(&self) -> CH3_R { - CH3_R::new(((self.bits >> 3) & 0x01) != 0) - } - #[doc = "Bit 2 - DMA Done clear for this CH"] - #[inline(always)] - pub fn ch2(&self) -> CH2_R { - CH2_R::new(((self.bits >> 2) & 0x01) != 0) + pub fn ch0(&self) -> Ch0R { + Ch0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - DMA Done clear for this CH"] #[inline(always)] - pub fn ch1(&self) -> CH1_R { - CH1_R::new(((self.bits >> 1) & 0x01) != 0) + pub fn ch1(&self) -> Ch1R { + Ch1R::new(((self.bits >> 1) & 1) != 0) } - #[doc = "Bit 0 - DMA Done clear for this CH"] + #[doc = "Bit 2 - DMA Done clear for this CH"] #[inline(always)] - pub fn ch0(&self) -> CH0_R { - CH0_R::new((self.bits & 0x01) != 0) + pub fn ch2(&self) -> Ch2R { + Ch2R::new(((self.bits >> 2) & 1) != 0) + } + #[doc = "Bit 3 - DMA Done clear for this CH"] + #[inline(always)] + pub fn ch3(&self) -> Ch3R { + Ch3R::new(((self.bits >> 3) & 1) != 0) } } impl W { - #[doc = "Bit 3 - DMA Done clear for this CH"] + #[doc = "Bit 0 - DMA Done clear for this CH"] #[inline(always)] - pub fn ch3(&mut self) -> CH3_W { - CH3_W { w: self } - } - #[doc = "Bit 2 - DMA Done clear for this CH"] - #[inline(always)] - pub fn ch2(&mut self) -> CH2_W { - CH2_W { w: self } + #[must_use] + pub fn ch0(&mut self) -> Ch0W { + Ch0W::new(self, 0) } #[doc = "Bit 1 - DMA Done clear for this CH"] #[inline(always)] - pub fn ch1(&mut self) -> CH1_W { - CH1_W { w: self } + #[must_use] + pub fn ch1(&mut self) -> Ch1W { + Ch1W::new(self, 1) } - #[doc = "Bit 0 - DMA Done clear for this CH"] + #[doc = "Bit 2 - DMA Done clear for this CH"] #[inline(always)] - pub fn ch0(&mut self) -> CH0_W { - CH0_W { w: self } + #[must_use] + pub fn ch2(&mut self) -> Ch2W { + Ch2W::new(self, 2) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bit 3 - DMA Done clear for this CH"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn ch3(&mut self) -> Ch3W { + Ch3W::new(self, 3) } } -#[doc = "DMA done clear\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dma_done_clr](index.html) module"] -pub struct DMA_DONE_CLR_SPEC; -impl crate::RegisterSpec for DMA_DONE_CLR_SPEC { +#[doc = "DMA done clear\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_done_clr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_done_clr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DmaDoneClrSpec; +impl crate::RegisterSpec for DmaDoneClrSpec { type Ux = u32; } -#[doc = "`read()` method returns [dma_done_clr::R](R) reader structure"] -impl crate::Readable for DMA_DONE_CLR_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dma_done_clr::W](W) writer structure"] -impl crate::Writable for DMA_DONE_CLR_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`dma_done_clr::R`](R) reader structure"] +impl crate::Readable for DmaDoneClrSpec {} +#[doc = "`write(|w| ..)` method takes [`dma_done_clr::W`](W) writer structure"] +impl crate::Writable for DmaDoneClrSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DMA_DONE_CLR to value 0"] -impl crate::Resettable for DMA_DONE_CLR_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for DmaDoneClrSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/dma/dma_done_set.rs b/va416xx/src/dma/dma_done_set.rs index 47e598a..632ac90 100644 --- a/va416xx/src/dma/dma_done_set.rs +++ b/va416xx/src/dma/dma_done_set.rs @@ -1,254 +1,85 @@ #[doc = "Register `DMA_DONE_SET` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DMA_DONE_SET` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `CH3` reader - DMA Done Set for this CH"] -pub struct CH3_R(crate::FieldReader); -impl CH3_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CH3_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CH3_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CH3` writer - DMA Done Set for this CH"] -pub struct CH3_W<'a> { - w: &'a mut W, -} -impl<'a> CH3_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); - self.w - } -} -#[doc = "Field `CH2` reader - DMA Done Set for this CH"] -pub struct CH2_R(crate::FieldReader); -impl CH2_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CH2_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CH2_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CH2` writer - DMA Done Set for this CH"] -pub struct CH2_W<'a> { - w: &'a mut W, -} -impl<'a> CH2_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); - self.w - } -} -#[doc = "Field `CH1` reader - DMA Done Set for this CH"] -pub struct CH1_R(crate::FieldReader); -impl CH1_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CH1_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CH1_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CH1` writer - DMA Done Set for this CH"] -pub struct CH1_W<'a> { - w: &'a mut W, -} -impl<'a> CH1_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); - self.w - } -} +pub type W = crate::W; #[doc = "Field `CH0` reader - DMA Done Set for this CH"] -pub struct CH0_R(crate::FieldReader); -impl CH0_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CH0_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CH0_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Ch0R = crate::BitReader; #[doc = "Field `CH0` writer - DMA Done Set for this CH"] -pub struct CH0_W<'a> { - w: &'a mut W, -} -impl<'a> CH0_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} +pub type Ch0W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `CH1` reader - DMA Done Set for this CH"] +pub type Ch1R = crate::BitReader; +#[doc = "Field `CH1` writer - DMA Done Set for this CH"] +pub type Ch1W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `CH2` reader - DMA Done Set for this CH"] +pub type Ch2R = crate::BitReader; +#[doc = "Field `CH2` writer - DMA Done Set for this CH"] +pub type Ch2W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `CH3` reader - DMA Done Set for this CH"] +pub type Ch3R = crate::BitReader; +#[doc = "Field `CH3` writer - DMA Done Set for this CH"] +pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG>; impl R { - #[doc = "Bit 3 - DMA Done Set for this CH"] + #[doc = "Bit 0 - DMA Done Set for this CH"] #[inline(always)] - pub fn ch3(&self) -> CH3_R { - CH3_R::new(((self.bits >> 3) & 0x01) != 0) - } - #[doc = "Bit 2 - DMA Done Set for this CH"] - #[inline(always)] - pub fn ch2(&self) -> CH2_R { - CH2_R::new(((self.bits >> 2) & 0x01) != 0) + pub fn ch0(&self) -> Ch0R { + Ch0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - DMA Done Set for this CH"] #[inline(always)] - pub fn ch1(&self) -> CH1_R { - CH1_R::new(((self.bits >> 1) & 0x01) != 0) + pub fn ch1(&self) -> Ch1R { + Ch1R::new(((self.bits >> 1) & 1) != 0) } - #[doc = "Bit 0 - DMA Done Set for this CH"] + #[doc = "Bit 2 - DMA Done Set for this CH"] #[inline(always)] - pub fn ch0(&self) -> CH0_R { - CH0_R::new((self.bits & 0x01) != 0) + pub fn ch2(&self) -> Ch2R { + Ch2R::new(((self.bits >> 2) & 1) != 0) + } + #[doc = "Bit 3 - DMA Done Set for this CH"] + #[inline(always)] + pub fn ch3(&self) -> Ch3R { + Ch3R::new(((self.bits >> 3) & 1) != 0) } } impl W { - #[doc = "Bit 3 - DMA Done Set for this CH"] + #[doc = "Bit 0 - DMA Done Set for this CH"] #[inline(always)] - pub fn ch3(&mut self) -> CH3_W { - CH3_W { w: self } - } - #[doc = "Bit 2 - DMA Done Set for this CH"] - #[inline(always)] - pub fn ch2(&mut self) -> CH2_W { - CH2_W { w: self } + #[must_use] + pub fn ch0(&mut self) -> Ch0W { + Ch0W::new(self, 0) } #[doc = "Bit 1 - DMA Done Set for this CH"] #[inline(always)] - pub fn ch1(&mut self) -> CH1_W { - CH1_W { w: self } + #[must_use] + pub fn ch1(&mut self) -> Ch1W { + Ch1W::new(self, 1) } - #[doc = "Bit 0 - DMA Done Set for this CH"] + #[doc = "Bit 2 - DMA Done Set for this CH"] #[inline(always)] - pub fn ch0(&mut self) -> CH0_W { - CH0_W { w: self } + #[must_use] + pub fn ch2(&mut self) -> Ch2W { + Ch2W::new(self, 2) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bit 3 - DMA Done Set for this CH"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn ch3(&mut self) -> Ch3W { + Ch3W::new(self, 3) } } -#[doc = "DMA done set\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dma_done_set](index.html) module"] -pub struct DMA_DONE_SET_SPEC; -impl crate::RegisterSpec for DMA_DONE_SET_SPEC { +#[doc = "DMA done set\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_done_set::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_done_set::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DmaDoneSetSpec; +impl crate::RegisterSpec for DmaDoneSetSpec { type Ux = u32; } -#[doc = "`read()` method returns [dma_done_set::R](R) reader structure"] -impl crate::Readable for DMA_DONE_SET_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dma_done_set::W](W) writer structure"] -impl crate::Writable for DMA_DONE_SET_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`dma_done_set::R`](R) reader structure"] +impl crate::Readable for DmaDoneSetSpec {} +#[doc = "`write(|w| ..)` method takes [`dma_done_set::W`](W) writer structure"] +impl crate::Writable for DmaDoneSetSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DMA_DONE_SET to value 0"] -impl crate::Resettable for DMA_DONE_SET_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for DmaDoneSetSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/dma/dma_req_status.rs b/va416xx/src/dma/dma_req_status.rs index 7c745e2..b93aeeb 100644 --- a/va416xx/src/dma/dma_req_status.rs +++ b/va416xx/src/dma/dma_req_status.rs @@ -1,254 +1,85 @@ #[doc = "Register `DMA_REQ_STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DMA_REQ_STATUS` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `CH3` reader - DMA Request Status for this CH"] -pub struct CH3_R(crate::FieldReader); -impl CH3_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CH3_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CH3_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CH3` writer - DMA Request Status for this CH"] -pub struct CH3_W<'a> { - w: &'a mut W, -} -impl<'a> CH3_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); - self.w - } -} -#[doc = "Field `CH2` reader - DMA Request Status for this CH"] -pub struct CH2_R(crate::FieldReader); -impl CH2_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CH2_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CH2_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CH2` writer - DMA Request Status for this CH"] -pub struct CH2_W<'a> { - w: &'a mut W, -} -impl<'a> CH2_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); - self.w - } -} -#[doc = "Field `CH1` reader - DMA Request Status for this CH"] -pub struct CH1_R(crate::FieldReader); -impl CH1_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CH1_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CH1_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CH1` writer - DMA Request Status for this CH"] -pub struct CH1_W<'a> { - w: &'a mut W, -} -impl<'a> CH1_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); - self.w - } -} +pub type W = crate::W; #[doc = "Field `CH0` reader - DMA Request Status for this CH"] -pub struct CH0_R(crate::FieldReader); -impl CH0_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CH0_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CH0_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Ch0R = crate::BitReader; #[doc = "Field `CH0` writer - DMA Request Status for this CH"] -pub struct CH0_W<'a> { - w: &'a mut W, -} -impl<'a> CH0_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} +pub type Ch0W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `CH1` reader - DMA Request Status for this CH"] +pub type Ch1R = crate::BitReader; +#[doc = "Field `CH1` writer - DMA Request Status for this CH"] +pub type Ch1W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `CH2` reader - DMA Request Status for this CH"] +pub type Ch2R = crate::BitReader; +#[doc = "Field `CH2` writer - DMA Request Status for this CH"] +pub type Ch2W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `CH3` reader - DMA Request Status for this CH"] +pub type Ch3R = crate::BitReader; +#[doc = "Field `CH3` writer - DMA Request Status for this CH"] +pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG>; impl R { - #[doc = "Bit 3 - DMA Request Status for this CH"] + #[doc = "Bit 0 - DMA Request Status for this CH"] #[inline(always)] - pub fn ch3(&self) -> CH3_R { - CH3_R::new(((self.bits >> 3) & 0x01) != 0) - } - #[doc = "Bit 2 - DMA Request Status for this CH"] - #[inline(always)] - pub fn ch2(&self) -> CH2_R { - CH2_R::new(((self.bits >> 2) & 0x01) != 0) + pub fn ch0(&self) -> Ch0R { + Ch0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - DMA Request Status for this CH"] #[inline(always)] - pub fn ch1(&self) -> CH1_R { - CH1_R::new(((self.bits >> 1) & 0x01) != 0) + pub fn ch1(&self) -> Ch1R { + Ch1R::new(((self.bits >> 1) & 1) != 0) } - #[doc = "Bit 0 - DMA Request Status for this CH"] + #[doc = "Bit 2 - DMA Request Status for this CH"] #[inline(always)] - pub fn ch0(&self) -> CH0_R { - CH0_R::new((self.bits & 0x01) != 0) + pub fn ch2(&self) -> Ch2R { + Ch2R::new(((self.bits >> 2) & 1) != 0) + } + #[doc = "Bit 3 - DMA Request Status for this CH"] + #[inline(always)] + pub fn ch3(&self) -> Ch3R { + Ch3R::new(((self.bits >> 3) & 1) != 0) } } impl W { - #[doc = "Bit 3 - DMA Request Status for this CH"] + #[doc = "Bit 0 - DMA Request Status for this CH"] #[inline(always)] - pub fn ch3(&mut self) -> CH3_W { - CH3_W { w: self } - } - #[doc = "Bit 2 - DMA Request Status for this CH"] - #[inline(always)] - pub fn ch2(&mut self) -> CH2_W { - CH2_W { w: self } + #[must_use] + pub fn ch0(&mut self) -> Ch0W { + Ch0W::new(self, 0) } #[doc = "Bit 1 - DMA Request Status for this CH"] #[inline(always)] - pub fn ch1(&mut self) -> CH1_W { - CH1_W { w: self } + #[must_use] + pub fn ch1(&mut self) -> Ch1W { + Ch1W::new(self, 1) } - #[doc = "Bit 0 - DMA Request Status for this CH"] + #[doc = "Bit 2 - DMA Request Status for this CH"] #[inline(always)] - pub fn ch0(&mut self) -> CH0_W { - CH0_W { w: self } + #[must_use] + pub fn ch2(&mut self) -> Ch2W { + Ch2W::new(self, 2) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bit 3 - DMA Request Status for this CH"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn ch3(&mut self) -> Ch3W { + Ch3W::new(self, 3) } } -#[doc = "DMA Configuration\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dma_req_status](index.html) module"] -pub struct DMA_REQ_STATUS_SPEC; -impl crate::RegisterSpec for DMA_REQ_STATUS_SPEC { +#[doc = "DMA Configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_req_status::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_req_status::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DmaReqStatusSpec; +impl crate::RegisterSpec for DmaReqStatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [dma_req_status::R](R) reader structure"] -impl crate::Readable for DMA_REQ_STATUS_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dma_req_status::W](W) writer structure"] -impl crate::Writable for DMA_REQ_STATUS_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`dma_req_status::R`](R) reader structure"] +impl crate::Readable for DmaReqStatusSpec {} +#[doc = "`write(|w| ..)` method takes [`dma_req_status::W`](W) writer structure"] +impl crate::Writable for DmaReqStatusSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DMA_REQ_STATUS to value 0"] -impl crate::Resettable for DMA_REQ_STATUS_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for DmaReqStatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/dma/dma_sreq_status.rs b/va416xx/src/dma/dma_sreq_status.rs index b553d44..a091bfb 100644 --- a/va416xx/src/dma/dma_sreq_status.rs +++ b/va416xx/src/dma/dma_sreq_status.rs @@ -1,254 +1,85 @@ #[doc = "Register `DMA_SREQ_STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DMA_SREQ_STATUS` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `CH3` reader - DMA SRequest Status for this CH"] -pub struct CH3_R(crate::FieldReader); -impl CH3_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CH3_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CH3_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CH3` writer - DMA SRequest Status for this CH"] -pub struct CH3_W<'a> { - w: &'a mut W, -} -impl<'a> CH3_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); - self.w - } -} -#[doc = "Field `CH2` reader - DMA SRequest Status for this CH"] -pub struct CH2_R(crate::FieldReader); -impl CH2_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CH2_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CH2_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CH2` writer - DMA SRequest Status for this CH"] -pub struct CH2_W<'a> { - w: &'a mut W, -} -impl<'a> CH2_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); - self.w - } -} -#[doc = "Field `CH1` reader - DMA SRequest Status for this CH"] -pub struct CH1_R(crate::FieldReader); -impl CH1_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CH1_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CH1_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CH1` writer - DMA SRequest Status for this CH"] -pub struct CH1_W<'a> { - w: &'a mut W, -} -impl<'a> CH1_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); - self.w - } -} +pub type W = crate::W; #[doc = "Field `CH0` reader - DMA SRequest Status for this CH"] -pub struct CH0_R(crate::FieldReader); -impl CH0_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CH0_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CH0_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Ch0R = crate::BitReader; #[doc = "Field `CH0` writer - DMA SRequest Status for this CH"] -pub struct CH0_W<'a> { - w: &'a mut W, -} -impl<'a> CH0_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} +pub type Ch0W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `CH1` reader - DMA SRequest Status for this CH"] +pub type Ch1R = crate::BitReader; +#[doc = "Field `CH1` writer - DMA SRequest Status for this CH"] +pub type Ch1W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `CH2` reader - DMA SRequest Status for this CH"] +pub type Ch2R = crate::BitReader; +#[doc = "Field `CH2` writer - DMA SRequest Status for this CH"] +pub type Ch2W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `CH3` reader - DMA SRequest Status for this CH"] +pub type Ch3R = crate::BitReader; +#[doc = "Field `CH3` writer - DMA SRequest Status for this CH"] +pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG>; impl R { - #[doc = "Bit 3 - DMA SRequest Status for this CH"] + #[doc = "Bit 0 - DMA SRequest Status for this CH"] #[inline(always)] - pub fn ch3(&self) -> CH3_R { - CH3_R::new(((self.bits >> 3) & 0x01) != 0) - } - #[doc = "Bit 2 - DMA SRequest Status for this CH"] - #[inline(always)] - pub fn ch2(&self) -> CH2_R { - CH2_R::new(((self.bits >> 2) & 0x01) != 0) + pub fn ch0(&self) -> Ch0R { + Ch0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - DMA SRequest Status for this CH"] #[inline(always)] - pub fn ch1(&self) -> CH1_R { - CH1_R::new(((self.bits >> 1) & 0x01) != 0) + pub fn ch1(&self) -> Ch1R { + Ch1R::new(((self.bits >> 1) & 1) != 0) } - #[doc = "Bit 0 - DMA SRequest Status for this CH"] + #[doc = "Bit 2 - DMA SRequest Status for this CH"] #[inline(always)] - pub fn ch0(&self) -> CH0_R { - CH0_R::new((self.bits & 0x01) != 0) + pub fn ch2(&self) -> Ch2R { + Ch2R::new(((self.bits >> 2) & 1) != 0) + } + #[doc = "Bit 3 - DMA SRequest Status for this CH"] + #[inline(always)] + pub fn ch3(&self) -> Ch3R { + Ch3R::new(((self.bits >> 3) & 1) != 0) } } impl W { - #[doc = "Bit 3 - DMA SRequest Status for this CH"] + #[doc = "Bit 0 - DMA SRequest Status for this CH"] #[inline(always)] - pub fn ch3(&mut self) -> CH3_W { - CH3_W { w: self } - } - #[doc = "Bit 2 - DMA SRequest Status for this CH"] - #[inline(always)] - pub fn ch2(&mut self) -> CH2_W { - CH2_W { w: self } + #[must_use] + pub fn ch0(&mut self) -> Ch0W { + Ch0W::new(self, 0) } #[doc = "Bit 1 - DMA SRequest Status for this CH"] #[inline(always)] - pub fn ch1(&mut self) -> CH1_W { - CH1_W { w: self } + #[must_use] + pub fn ch1(&mut self) -> Ch1W { + Ch1W::new(self, 1) } - #[doc = "Bit 0 - DMA SRequest Status for this CH"] + #[doc = "Bit 2 - DMA SRequest Status for this CH"] #[inline(always)] - pub fn ch0(&mut self) -> CH0_W { - CH0_W { w: self } + #[must_use] + pub fn ch2(&mut self) -> Ch2W { + Ch2W::new(self, 2) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bit 3 - DMA SRequest Status for this CH"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn ch3(&mut self) -> Ch3W { + Ch3W::new(self, 3) } } -#[doc = "DMA single request status\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dma_sreq_status](index.html) module"] -pub struct DMA_SREQ_STATUS_SPEC; -impl crate::RegisterSpec for DMA_SREQ_STATUS_SPEC { +#[doc = "DMA single request status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_sreq_status::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_sreq_status::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DmaSreqStatusSpec; +impl crate::RegisterSpec for DmaSreqStatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [dma_sreq_status::R](R) reader structure"] -impl crate::Readable for DMA_SREQ_STATUS_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dma_sreq_status::W](W) writer structure"] -impl crate::Writable for DMA_SREQ_STATUS_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`dma_sreq_status::R`](R) reader structure"] +impl crate::Readable for DmaSreqStatusSpec {} +#[doc = "`write(|w| ..)` method takes [`dma_sreq_status::W`](W) writer structure"] +impl crate::Writable for DmaSreqStatusSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DMA_SREQ_STATUS to value 0"] -impl crate::Resettable for DMA_SREQ_STATUS_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for DmaSreqStatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/dma/err_clr.rs b/va416xx/src/dma/err_clr.rs index 9dbc04f..aecfeea 100644 --- a/va416xx/src/dma/err_clr.rs +++ b/va416xx/src/dma/err_clr.rs @@ -1,113 +1,40 @@ #[doc = "Register `ERR_CLR` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ERR_CLR` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `ERR_CLR` reader - Error Clear"] -pub struct ERR_CLR_R(crate::FieldReader); -impl ERR_CLR_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - ERR_CLR_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ERR_CLR_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type ErrClrR = crate::BitReader; #[doc = "Field `ERR_CLR` writer - Error Clear"] -pub struct ERR_CLR_W<'a> { - w: &'a mut W, -} -impl<'a> ERR_CLR_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} +pub type ErrClrW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Error Clear"] #[inline(always)] - pub fn err_clr(&self) -> ERR_CLR_R { - ERR_CLR_R::new((self.bits & 0x01) != 0) + pub fn err_clr(&self) -> ErrClrR { + ErrClrR::new((self.bits & 1) != 0) } } impl W { #[doc = "Bit 0 - Error Clear"] #[inline(always)] - pub fn err_clr(&mut self) -> ERR_CLR_W { - ERR_CLR_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn err_clr(&mut self) -> ErrClrW { + ErrClrW::new(self, 0) } } -#[doc = "DMA bus error clear\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [err_clr](index.html) module"] -pub struct ERR_CLR_SPEC; -impl crate::RegisterSpec for ERR_CLR_SPEC { +#[doc = "DMA bus error clear\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`err_clr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`err_clr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ErrClrSpec; +impl crate::RegisterSpec for ErrClrSpec { type Ux = u32; } -#[doc = "`read()` method returns [err_clr::R](R) reader structure"] -impl crate::Readable for ERR_CLR_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [err_clr::W](W) writer structure"] -impl crate::Writable for ERR_CLR_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`err_clr::R`](R) reader structure"] +impl crate::Readable for ErrClrSpec {} +#[doc = "`write(|w| ..)` method takes [`err_clr::W`](W) writer structure"] +impl crate::Writable for ErrClrSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ERR_CLR to value 0"] -impl crate::Resettable for ERR_CLR_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for ErrClrSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/dma/err_set.rs b/va416xx/src/dma/err_set.rs index e2b9658..02b3c6b 100644 --- a/va416xx/src/dma/err_set.rs +++ b/va416xx/src/dma/err_set.rs @@ -1,86 +1,31 @@ #[doc = "Register `ERR_SET` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ERR_SET` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `ERR_SET` reader - Set Error"] -pub struct ERR_SET_R(crate::FieldReader); -impl ERR_SET_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - ERR_SET_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ERR_SET_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type ErrSetR = crate::BitReader; impl R { #[doc = "Bit 0 - Set Error"] #[inline(always)] - pub fn err_set(&self) -> ERR_SET_R { - ERR_SET_R::new((self.bits & 0x01) != 0) + pub fn err_set(&self) -> ErrSetR { + ErrSetR::new((self.bits & 1) != 0) } } -impl W { - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "DMA bus error set\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [err_set](index.html) module"] -pub struct ERR_SET_SPEC; -impl crate::RegisterSpec for ERR_SET_SPEC { +impl W {} +#[doc = "DMA bus error set\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`err_set::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`err_set::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ErrSetSpec; +impl crate::RegisterSpec for ErrSetSpec { type Ux = u32; } -#[doc = "`read()` method returns [err_set::R](R) reader structure"] -impl crate::Readable for ERR_SET_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [err_set::W](W) writer structure"] -impl crate::Writable for ERR_SET_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`err_set::R`](R) reader structure"] +impl crate::Readable for ErrSetSpec {} +#[doc = "`write(|w| ..)` method takes [`err_set::W`](W) writer structure"] +impl crate::Writable for ErrSetSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ERR_SET to value 0"] -impl crate::Resettable for ERR_SET_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for ErrSetSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/dma/integration_cfg.rs b/va416xx/src/dma/integration_cfg.rs index ee457c5..cc131c1 100644 --- a/va416xx/src/dma/integration_cfg.rs +++ b/va416xx/src/dma/integration_cfg.rs @@ -1,113 +1,40 @@ #[doc = "Register `INTEGRATION_CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `INTEGRATION_CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `INT_TEST_EN` reader - Error Clear"] -pub struct INT_TEST_EN_R(crate::FieldReader); -impl INT_TEST_EN_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - INT_TEST_EN_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for INT_TEST_EN_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type IntTestEnR = crate::BitReader; #[doc = "Field `INT_TEST_EN` writer - Error Clear"] -pub struct INT_TEST_EN_W<'a> { - w: &'a mut W, -} -impl<'a> INT_TEST_EN_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} +pub type IntTestEnW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Error Clear"] #[inline(always)] - pub fn int_test_en(&self) -> INT_TEST_EN_R { - INT_TEST_EN_R::new((self.bits & 0x01) != 0) + pub fn int_test_en(&self) -> IntTestEnR { + IntTestEnR::new((self.bits & 1) != 0) } } impl W { #[doc = "Bit 0 - Error Clear"] #[inline(always)] - pub fn int_test_en(&mut self) -> INT_TEST_EN_W { - INT_TEST_EN_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn int_test_en(&mut self) -> IntTestEnW { + IntTestEnW::new(self, 0) } } -#[doc = "DMA integration configuration\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [integration_cfg](index.html) module"] -pub struct INTEGRATION_CFG_SPEC; -impl crate::RegisterSpec for INTEGRATION_CFG_SPEC { +#[doc = "DMA integration configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`integration_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`integration_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IntegrationCfgSpec; +impl crate::RegisterSpec for IntegrationCfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [integration_cfg::R](R) reader structure"] -impl crate::Readable for INTEGRATION_CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [integration_cfg::W](W) writer structure"] -impl crate::Writable for INTEGRATION_CFG_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`integration_cfg::R`](R) reader structure"] +impl crate::Readable for IntegrationCfgSpec {} +#[doc = "`write(|w| ..)` method takes [`integration_cfg::W`](W) writer structure"] +impl crate::Writable for IntegrationCfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets INTEGRATION_CFG to value 0"] -impl crate::Resettable for INTEGRATION_CFG_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for IntegrationCfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/dma/periph_id_0.rs b/va416xx/src/dma/periph_id_0.rs index df8a4bf..b54baa4 100644 --- a/va416xx/src/dma/periph_id_0.rs +++ b/va416xx/src/dma/periph_id_0.rs @@ -1,103 +1,40 @@ #[doc = "Register `PERIPH_ID_0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PERIPH_ID_0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PART_NUMBER_0` reader - Part Number"] -pub struct PART_NUMBER_0_R(crate::FieldReader); -impl PART_NUMBER_0_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - PART_NUMBER_0_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PART_NUMBER_0_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type PartNumber0R = crate::FieldReader; #[doc = "Field `PART_NUMBER_0` writer - Part Number"] -pub struct PART_NUMBER_0_W<'a> { - w: &'a mut W, -} -impl<'a> PART_NUMBER_0_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type PartNumber0W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Part Number"] #[inline(always)] - pub fn part_number_0(&self) -> PART_NUMBER_0_R { - PART_NUMBER_0_R::new((self.bits & 0xff) as u8) + pub fn part_number_0(&self) -> PartNumber0R { + PartNumber0R::new((self.bits & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Part Number"] #[inline(always)] - pub fn part_number_0(&mut self) -> PART_NUMBER_0_W { - PART_NUMBER_0_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn part_number_0(&mut self) -> PartNumber0W { + PartNumber0W::new(self, 0) } } -#[doc = "DMA Peripheral ID 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [periph_id_0](index.html) module"] -pub struct PERIPH_ID_0_SPEC; -impl crate::RegisterSpec for PERIPH_ID_0_SPEC { +#[doc = "DMA Peripheral ID 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`periph_id_0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`periph_id_0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PeriphId0Spec; +impl crate::RegisterSpec for PeriphId0Spec { type Ux = u32; } -#[doc = "`read()` method returns [periph_id_0::R](R) reader structure"] -impl crate::Readable for PERIPH_ID_0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [periph_id_0::W](W) writer structure"] -impl crate::Writable for PERIPH_ID_0_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`periph_id_0::R`](R) reader structure"] +impl crate::Readable for PeriphId0Spec {} +#[doc = "`write(|w| ..)` method takes [`periph_id_0::W`](W) writer structure"] +impl crate::Writable for PeriphId0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PERIPH_ID_0 to value 0x30"] -impl crate::Resettable for PERIPH_ID_0_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0x30 - } +impl crate::Resettable for PeriphId0Spec { + const RESET_VALUE: u32 = 0x30; } diff --git a/va416xx/src/dma/periph_id_1.rs b/va416xx/src/dma/periph_id_1.rs index e97040e..e8cef83 100644 --- a/va416xx/src/dma/periph_id_1.rs +++ b/va416xx/src/dma/periph_id_1.rs @@ -1,73 +1,29 @@ #[doc = "Register `PERIPH_ID_1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Field `JEP106_ID_3_0` reader - Indentity Code"] -pub struct JEP106_ID_3_0_R(crate::FieldReader); -impl JEP106_ID_3_0_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - JEP106_ID_3_0_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for JEP106_ID_3_0_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type R = crate::R; #[doc = "Field `PART_NUMBER_1` reader - Part Number 1"] -pub struct PART_NUMBER_1_R(crate::FieldReader); -impl PART_NUMBER_1_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - PART_NUMBER_1_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PART_NUMBER_1_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type PartNumber1R = crate::FieldReader; +#[doc = "Field `JEP106_ID_3_0` reader - Indentity Code"] +pub type Jep106Id3_0R = crate::FieldReader; impl R { - #[doc = "Bits 4:7 - Indentity Code"] - #[inline(always)] - pub fn jep106_id_3_0(&self) -> JEP106_ID_3_0_R { - JEP106_ID_3_0_R::new(((self.bits >> 4) & 0x0f) as u8) - } #[doc = "Bits 0:3 - Part Number 1"] #[inline(always)] - pub fn part_number_1(&self) -> PART_NUMBER_1_R { - PART_NUMBER_1_R::new((self.bits & 0x0f) as u8) + pub fn part_number_1(&self) -> PartNumber1R { + PartNumber1R::new((self.bits & 0x0f) as u8) + } + #[doc = "Bits 4:7 - Indentity Code"] + #[inline(always)] + pub fn jep106_id_3_0(&self) -> Jep106Id3_0R { + Jep106Id3_0R::new(((self.bits >> 4) & 0x0f) as u8) } } -#[doc = "DMA Peripheral ID 1\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [periph_id_1](index.html) module"] -pub struct PERIPH_ID_1_SPEC; -impl crate::RegisterSpec for PERIPH_ID_1_SPEC { +#[doc = "DMA Peripheral ID 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`periph_id_1::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PeriphId1Spec; +impl crate::RegisterSpec for PeriphId1Spec { type Ux = u32; } -#[doc = "`read()` method returns [periph_id_1::R](R) reader structure"] -impl crate::Readable for PERIPH_ID_1_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`periph_id_1::R`](R) reader structure"] +impl crate::Readable for PeriphId1Spec {} #[doc = "`reset()` method sets PERIPH_ID_1 to value 0xb2"] -impl crate::Resettable for PERIPH_ID_1_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0xb2 - } +impl crate::Resettable for PeriphId1Spec { + const RESET_VALUE: u32 = 0xb2; } diff --git a/va416xx/src/dma/periph_id_2.rs b/va416xx/src/dma/periph_id_2.rs index d6b5e70..8f7bcf2 100644 --- a/va416xx/src/dma/periph_id_2.rs +++ b/va416xx/src/dma/periph_id_2.rs @@ -1,187 +1,70 @@ #[doc = "Register `PERIPH_ID_2` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PERIPH_ID_2` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `REVISION` reader - Revision"] -pub struct REVISION_R(crate::FieldReader); -impl REVISION_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - REVISION_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for REVISION_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `REVISION` writer - Revision"] -pub struct REVISION_W<'a> { - w: &'a mut W, -} -impl<'a> REVISION_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x0f << 4)) | ((value as u32 & 0x0f) << 4); - self.w - } -} -#[doc = "Field `JEDEC_USED` reader - JEDEC"] -pub struct JEDEC_USED_R(crate::FieldReader); -impl JEDEC_USED_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - JEDEC_USED_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for JEDEC_USED_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `JEDEC_USED` writer - JEDEC"] -pub struct JEDEC_USED_W<'a> { - w: &'a mut W, -} -impl<'a> JEDEC_USED_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); - self.w - } -} +pub type W = crate::W; #[doc = "Field `JEP106_ID_6_4` reader - JEP106"] -pub struct JEP106_ID_6_4_R(crate::FieldReader); -impl JEP106_ID_6_4_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - JEP106_ID_6_4_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for JEP106_ID_6_4_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Jep106Id6_4R = crate::FieldReader; #[doc = "Field `JEP106_ID_6_4` writer - JEP106"] -pub struct JEP106_ID_6_4_W<'a> { - w: &'a mut W, -} -impl<'a> JEP106_ID_6_4_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0x07) | (value as u32 & 0x07); - self.w - } -} +pub type Jep106Id6_4W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +#[doc = "Field `JEDEC_USED` reader - JEDEC"] +pub type JedecUsedR = crate::BitReader; +#[doc = "Field `JEDEC_USED` writer - JEDEC"] +pub type JedecUsedW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `REVISION` reader - Revision"] +pub type RevisionR = crate::FieldReader; +#[doc = "Field `REVISION` writer - Revision"] +pub type RevisionW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { - #[doc = "Bits 4:7 - Revision"] + #[doc = "Bits 0:2 - JEP106"] #[inline(always)] - pub fn revision(&self) -> REVISION_R { - REVISION_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn jep106_id_6_4(&self) -> Jep106Id6_4R { + Jep106Id6_4R::new((self.bits & 7) as u8) } #[doc = "Bit 3 - JEDEC"] #[inline(always)] - pub fn jedec_used(&self) -> JEDEC_USED_R { - JEDEC_USED_R::new(((self.bits >> 3) & 0x01) != 0) + pub fn jedec_used(&self) -> JedecUsedR { + JedecUsedR::new(((self.bits >> 3) & 1) != 0) } - #[doc = "Bits 0:2 - JEP106"] + #[doc = "Bits 4:7 - Revision"] #[inline(always)] - pub fn jep106_id_6_4(&self) -> JEP106_ID_6_4_R { - JEP106_ID_6_4_R::new((self.bits & 0x07) as u8) + pub fn revision(&self) -> RevisionR { + RevisionR::new(((self.bits >> 4) & 0x0f) as u8) } } impl W { - #[doc = "Bits 4:7 - Revision"] + #[doc = "Bits 0:2 - JEP106"] #[inline(always)] - pub fn revision(&mut self) -> REVISION_W { - REVISION_W { w: self } + #[must_use] + pub fn jep106_id_6_4(&mut self) -> Jep106Id6_4W { + Jep106Id6_4W::new(self, 0) } #[doc = "Bit 3 - JEDEC"] #[inline(always)] - pub fn jedec_used(&mut self) -> JEDEC_USED_W { - JEDEC_USED_W { w: self } + #[must_use] + pub fn jedec_used(&mut self) -> JedecUsedW { + JedecUsedW::new(self, 3) } - #[doc = "Bits 0:2 - JEP106"] + #[doc = "Bits 4:7 - Revision"] #[inline(always)] - pub fn jep106_id_6_4(&mut self) -> JEP106_ID_6_4_W { - JEP106_ID_6_4_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn revision(&mut self) -> RevisionW { + RevisionW::new(self, 4) } } -#[doc = "DMA Peripheral ID 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [periph_id_2](index.html) module"] -pub struct PERIPH_ID_2_SPEC; -impl crate::RegisterSpec for PERIPH_ID_2_SPEC { +#[doc = "DMA Peripheral ID 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`periph_id_2::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`periph_id_2::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PeriphId2Spec; +impl crate::RegisterSpec for PeriphId2Spec { type Ux = u32; } -#[doc = "`read()` method returns [periph_id_2::R](R) reader structure"] -impl crate::Readable for PERIPH_ID_2_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [periph_id_2::W](W) writer structure"] -impl crate::Writable for PERIPH_ID_2_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`periph_id_2::R`](R) reader structure"] +impl crate::Readable for PeriphId2Spec {} +#[doc = "`write(|w| ..)` method takes [`periph_id_2::W`](W) writer structure"] +impl crate::Writable for PeriphId2Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PERIPH_ID_2 to value 0xbc"] -impl crate::Resettable for PERIPH_ID_2_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0xbc - } +impl crate::Resettable for PeriphId2Spec { + const RESET_VALUE: u32 = 0xbc; } diff --git a/va416xx/src/dma/periph_id_3.rs b/va416xx/src/dma/periph_id_3.rs index c9c9312..94d92ce 100644 --- a/va416xx/src/dma/periph_id_3.rs +++ b/va416xx/src/dma/periph_id_3.rs @@ -1,103 +1,40 @@ #[doc = "Register `PERIPH_ID_3` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PERIPH_ID_3` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `MOD_NUMBER` reader - Controller Modifications"] -pub struct MOD_NUMBER_R(crate::FieldReader); -impl MOD_NUMBER_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - MOD_NUMBER_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for MOD_NUMBER_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type ModNumberR = crate::FieldReader; #[doc = "Field `MOD_NUMBER` writer - Controller Modifications"] -pub struct MOD_NUMBER_W<'a> { - w: &'a mut W, -} -impl<'a> MOD_NUMBER_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0x0f) | (value as u32 & 0x0f); - self.w - } -} +pub type ModNumberW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - Controller Modifications"] #[inline(always)] - pub fn mod_number(&self) -> MOD_NUMBER_R { - MOD_NUMBER_R::new((self.bits & 0x0f) as u8) + pub fn mod_number(&self) -> ModNumberR { + ModNumberR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - Controller Modifications"] #[inline(always)] - pub fn mod_number(&mut self) -> MOD_NUMBER_W { - MOD_NUMBER_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn mod_number(&mut self) -> ModNumberW { + ModNumberW::new(self, 0) } } -#[doc = "DMA Peripheral ID 3\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [periph_id_3](index.html) module"] -pub struct PERIPH_ID_3_SPEC; -impl crate::RegisterSpec for PERIPH_ID_3_SPEC { +#[doc = "DMA Peripheral ID 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`periph_id_3::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`periph_id_3::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PeriphId3Spec; +impl crate::RegisterSpec for PeriphId3Spec { type Ux = u32; } -#[doc = "`read()` method returns [periph_id_3::R](R) reader structure"] -impl crate::Readable for PERIPH_ID_3_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [periph_id_3::W](W) writer structure"] -impl crate::Writable for PERIPH_ID_3_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`periph_id_3::R`](R) reader structure"] +impl crate::Readable for PeriphId3Spec {} +#[doc = "`write(|w| ..)` method takes [`periph_id_3::W`](W) writer structure"] +impl crate::Writable for PeriphId3Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PERIPH_ID_3 to value 0"] -impl crate::Resettable for PERIPH_ID_3_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for PeriphId3Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/dma/periph_id_4.rs b/va416xx/src/dma/periph_id_4.rs index 6a2a891..215d604 100644 --- a/va416xx/src/dma/periph_id_4.rs +++ b/va416xx/src/dma/periph_id_4.rs @@ -1,140 +1,55 @@ #[doc = "Register `PERIPH_ID_4` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PERIPH_ID_4` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `BLOCK_COUNT` reader - The Number of 4k Address Blocks Required"] -pub struct BLOCK_COUNT_R(crate::FieldReader); -impl BLOCK_COUNT_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BLOCK_COUNT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BLOCK_COUNT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `BLOCK_COUNT` writer - The Number of 4k Address Blocks Required"] -pub struct BLOCK_COUNT_W<'a> { - w: &'a mut W, -} -impl<'a> BLOCK_COUNT_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x0f << 4)) | ((value as u32 & 0x0f) << 4); - self.w - } -} +pub type W = crate::W; #[doc = "Field `JEP106_C_CODE` reader - JEP106"] -pub struct JEP106_C_CODE_R(crate::FieldReader); -impl JEP106_C_CODE_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - JEP106_C_CODE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for JEP106_C_CODE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Jep106CCodeR = crate::FieldReader; #[doc = "Field `JEP106_C_CODE` writer - JEP106"] -pub struct JEP106_C_CODE_W<'a> { - w: &'a mut W, -} -impl<'a> JEP106_C_CODE_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0x0f) | (value as u32 & 0x0f); - self.w - } -} +pub type Jep106CCodeW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +#[doc = "Field `BLOCK_COUNT` reader - The Number of 4k Address Blocks Required"] +pub type BlockCountR = crate::FieldReader; +#[doc = "Field `BLOCK_COUNT` writer - The Number of 4k Address Blocks Required"] +pub type BlockCountW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { - #[doc = "Bits 4:7 - The Number of 4k Address Blocks Required"] - #[inline(always)] - pub fn block_count(&self) -> BLOCK_COUNT_R { - BLOCK_COUNT_R::new(((self.bits >> 4) & 0x0f) as u8) - } #[doc = "Bits 0:3 - JEP106"] #[inline(always)] - pub fn jep106_c_code(&self) -> JEP106_C_CODE_R { - JEP106_C_CODE_R::new((self.bits & 0x0f) as u8) + pub fn jep106_c_code(&self) -> Jep106CCodeR { + Jep106CCodeR::new((self.bits & 0x0f) as u8) + } + #[doc = "Bits 4:7 - The Number of 4k Address Blocks Required"] + #[inline(always)] + pub fn block_count(&self) -> BlockCountR { + BlockCountR::new(((self.bits >> 4) & 0x0f) as u8) } } impl W { - #[doc = "Bits 4:7 - The Number of 4k Address Blocks Required"] - #[inline(always)] - pub fn block_count(&mut self) -> BLOCK_COUNT_W { - BLOCK_COUNT_W { w: self } - } #[doc = "Bits 0:3 - JEP106"] #[inline(always)] - pub fn jep106_c_code(&mut self) -> JEP106_C_CODE_W { - JEP106_C_CODE_W { w: self } + #[must_use] + pub fn jep106_c_code(&mut self) -> Jep106CCodeW { + Jep106CCodeW::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 4:7 - The Number of 4k Address Blocks Required"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn block_count(&mut self) -> BlockCountW { + BlockCountW::new(self, 4) } } -#[doc = "DMA Peripheral ID 4\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [periph_id_4](index.html) module"] -pub struct PERIPH_ID_4_SPEC; -impl crate::RegisterSpec for PERIPH_ID_4_SPEC { +#[doc = "DMA Peripheral ID 4\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`periph_id_4::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`periph_id_4::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PeriphId4Spec; +impl crate::RegisterSpec for PeriphId4Spec { type Ux = u32; } -#[doc = "`read()` method returns [periph_id_4::R](R) reader structure"] -impl crate::Readable for PERIPH_ID_4_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [periph_id_4::W](W) writer structure"] -impl crate::Writable for PERIPH_ID_4_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`periph_id_4::R`](R) reader structure"] +impl crate::Readable for PeriphId4Spec {} +#[doc = "`write(|w| ..)` method takes [`periph_id_4::W`](W) writer structure"] +impl crate::Writable for PeriphId4Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PERIPH_ID_4 to value 0x04"] -impl crate::Resettable for PERIPH_ID_4_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0x04 - } +impl crate::Resettable for PeriphId4Spec { + const RESET_VALUE: u32 = 0x04; } diff --git a/va416xx/src/dma/primecell_id_0.rs b/va416xx/src/dma/primecell_id_0.rs index 7b0aa36..21fa74f 100644 --- a/va416xx/src/dma/primecell_id_0.rs +++ b/va416xx/src/dma/primecell_id_0.rs @@ -1,103 +1,40 @@ #[doc = "Register `PRIMECELL_ID_0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PRIMECELL_ID_0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRIMECELL_ID_0` reader - PrimeCell Identification"] -pub struct PRIMECELL_ID_0_R(crate::FieldReader); -impl PRIMECELL_ID_0_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - PRIMECELL_ID_0_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PRIMECELL_ID_0_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type PrimecellId0R = crate::FieldReader; #[doc = "Field `PRIMECELL_ID_0` writer - PrimeCell Identification"] -pub struct PRIMECELL_ID_0_W<'a> { - w: &'a mut W, -} -impl<'a> PRIMECELL_ID_0_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type PrimecellId0W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - PrimeCell Identification"] #[inline(always)] - pub fn primecell_id_0(&self) -> PRIMECELL_ID_0_R { - PRIMECELL_ID_0_R::new((self.bits & 0xff) as u8) + pub fn primecell_id_0(&self) -> PrimecellId0R { + PrimecellId0R::new((self.bits & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - PrimeCell Identification"] #[inline(always)] - pub fn primecell_id_0(&mut self) -> PRIMECELL_ID_0_W { - PRIMECELL_ID_0_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn primecell_id_0(&mut self) -> PrimecellId0W { + PrimecellId0W::new(self, 0) } } -#[doc = "DMA PrimeCell ID 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [primecell_id_0](index.html) module"] -pub struct PRIMECELL_ID_0_SPEC; -impl crate::RegisterSpec for PRIMECELL_ID_0_SPEC { +#[doc = "DMA PrimeCell ID 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`primecell_id_0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`primecell_id_0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PrimecellId0Spec; +impl crate::RegisterSpec for PrimecellId0Spec { type Ux = u32; } -#[doc = "`read()` method returns [primecell_id_0::R](R) reader structure"] -impl crate::Readable for PRIMECELL_ID_0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [primecell_id_0::W](W) writer structure"] -impl crate::Writable for PRIMECELL_ID_0_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`primecell_id_0::R`](R) reader structure"] +impl crate::Readable for PrimecellId0Spec {} +#[doc = "`write(|w| ..)` method takes [`primecell_id_0::W`](W) writer structure"] +impl crate::Writable for PrimecellId0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PRIMECELL_ID_0 to value 0x0d"] -impl crate::Resettable for PRIMECELL_ID_0_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0x0d - } +impl crate::Resettable for PrimecellId0Spec { + const RESET_VALUE: u32 = 0x0d; } diff --git a/va416xx/src/dma/primecell_id_1.rs b/va416xx/src/dma/primecell_id_1.rs index 5d6413a..7afe1c7 100644 --- a/va416xx/src/dma/primecell_id_1.rs +++ b/va416xx/src/dma/primecell_id_1.rs @@ -1,103 +1,40 @@ #[doc = "Register `PRIMECELL_ID_1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PRIMECELL_ID_1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRIMECELL_ID_1` reader - PrimeCell Identification"] -pub struct PRIMECELL_ID_1_R(crate::FieldReader); -impl PRIMECELL_ID_1_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - PRIMECELL_ID_1_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PRIMECELL_ID_1_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type PrimecellId1R = crate::FieldReader; #[doc = "Field `PRIMECELL_ID_1` writer - PrimeCell Identification"] -pub struct PRIMECELL_ID_1_W<'a> { - w: &'a mut W, -} -impl<'a> PRIMECELL_ID_1_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type PrimecellId1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - PrimeCell Identification"] #[inline(always)] - pub fn primecell_id_1(&self) -> PRIMECELL_ID_1_R { - PRIMECELL_ID_1_R::new((self.bits & 0xff) as u8) + pub fn primecell_id_1(&self) -> PrimecellId1R { + PrimecellId1R::new((self.bits & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - PrimeCell Identification"] #[inline(always)] - pub fn primecell_id_1(&mut self) -> PRIMECELL_ID_1_W { - PRIMECELL_ID_1_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn primecell_id_1(&mut self) -> PrimecellId1W { + PrimecellId1W::new(self, 0) } } -#[doc = "DMA PrimeCell ID 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [primecell_id_1](index.html) module"] -pub struct PRIMECELL_ID_1_SPEC; -impl crate::RegisterSpec for PRIMECELL_ID_1_SPEC { +#[doc = "DMA PrimeCell ID 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`primecell_id_1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`primecell_id_1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PrimecellId1Spec; +impl crate::RegisterSpec for PrimecellId1Spec { type Ux = u32; } -#[doc = "`read()` method returns [primecell_id_1::R](R) reader structure"] -impl crate::Readable for PRIMECELL_ID_1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [primecell_id_1::W](W) writer structure"] -impl crate::Writable for PRIMECELL_ID_1_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`primecell_id_1::R`](R) reader structure"] +impl crate::Readable for PrimecellId1Spec {} +#[doc = "`write(|w| ..)` method takes [`primecell_id_1::W`](W) writer structure"] +impl crate::Writable for PrimecellId1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PRIMECELL_ID_1 to value 0xf0"] -impl crate::Resettable for PRIMECELL_ID_1_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0xf0 - } +impl crate::Resettable for PrimecellId1Spec { + const RESET_VALUE: u32 = 0xf0; } diff --git a/va416xx/src/dma/primecell_id_2.rs b/va416xx/src/dma/primecell_id_2.rs index 45ac294..9f593e2 100644 --- a/va416xx/src/dma/primecell_id_2.rs +++ b/va416xx/src/dma/primecell_id_2.rs @@ -1,103 +1,40 @@ #[doc = "Register `PRIMECELL_ID_2` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PRIMECELL_ID_2` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRIMECELL_ID_2` reader - PrimeCell Identification"] -pub struct PRIMECELL_ID_2_R(crate::FieldReader); -impl PRIMECELL_ID_2_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - PRIMECELL_ID_2_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PRIMECELL_ID_2_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type PrimecellId2R = crate::FieldReader; #[doc = "Field `PRIMECELL_ID_2` writer - PrimeCell Identification"] -pub struct PRIMECELL_ID_2_W<'a> { - w: &'a mut W, -} -impl<'a> PRIMECELL_ID_2_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type PrimecellId2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - PrimeCell Identification"] #[inline(always)] - pub fn primecell_id_2(&self) -> PRIMECELL_ID_2_R { - PRIMECELL_ID_2_R::new((self.bits & 0xff) as u8) + pub fn primecell_id_2(&self) -> PrimecellId2R { + PrimecellId2R::new((self.bits & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - PrimeCell Identification"] #[inline(always)] - pub fn primecell_id_2(&mut self) -> PRIMECELL_ID_2_W { - PRIMECELL_ID_2_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn primecell_id_2(&mut self) -> PrimecellId2W { + PrimecellId2W::new(self, 0) } } -#[doc = "DMA PrimeCell ID 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [primecell_id_2](index.html) module"] -pub struct PRIMECELL_ID_2_SPEC; -impl crate::RegisterSpec for PRIMECELL_ID_2_SPEC { +#[doc = "DMA PrimeCell ID 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`primecell_id_2::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`primecell_id_2::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PrimecellId2Spec; +impl crate::RegisterSpec for PrimecellId2Spec { type Ux = u32; } -#[doc = "`read()` method returns [primecell_id_2::R](R) reader structure"] -impl crate::Readable for PRIMECELL_ID_2_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [primecell_id_2::W](W) writer structure"] -impl crate::Writable for PRIMECELL_ID_2_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`primecell_id_2::R`](R) reader structure"] +impl crate::Readable for PrimecellId2Spec {} +#[doc = "`write(|w| ..)` method takes [`primecell_id_2::W`](W) writer structure"] +impl crate::Writable for PrimecellId2Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PRIMECELL_ID_2 to value 0x05"] -impl crate::Resettable for PRIMECELL_ID_2_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0x05 - } +impl crate::Resettable for PrimecellId2Spec { + const RESET_VALUE: u32 = 0x05; } diff --git a/va416xx/src/dma/primecell_id_3.rs b/va416xx/src/dma/primecell_id_3.rs index edcd9ad..36e5875 100644 --- a/va416xx/src/dma/primecell_id_3.rs +++ b/va416xx/src/dma/primecell_id_3.rs @@ -1,103 +1,40 @@ #[doc = "Register `PRIMECELL_ID_3` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PRIMECELL_ID_3` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRIMECELL_ID_3` reader - PrimeCell Identification"] -pub struct PRIMECELL_ID_3_R(crate::FieldReader); -impl PRIMECELL_ID_3_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - PRIMECELL_ID_3_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PRIMECELL_ID_3_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type PrimecellId3R = crate::FieldReader; #[doc = "Field `PRIMECELL_ID_3` writer - PrimeCell Identification"] -pub struct PRIMECELL_ID_3_W<'a> { - w: &'a mut W, -} -impl<'a> PRIMECELL_ID_3_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type PrimecellId3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - PrimeCell Identification"] #[inline(always)] - pub fn primecell_id_3(&self) -> PRIMECELL_ID_3_R { - PRIMECELL_ID_3_R::new((self.bits & 0xff) as u8) + pub fn primecell_id_3(&self) -> PrimecellId3R { + PrimecellId3R::new((self.bits & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - PrimeCell Identification"] #[inline(always)] - pub fn primecell_id_3(&mut self) -> PRIMECELL_ID_3_W { - PRIMECELL_ID_3_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn primecell_id_3(&mut self) -> PrimecellId3W { + PrimecellId3W::new(self, 0) } } -#[doc = "DMA PrimeCell ID 3\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [primecell_id_3](index.html) module"] -pub struct PRIMECELL_ID_3_SPEC; -impl crate::RegisterSpec for PRIMECELL_ID_3_SPEC { +#[doc = "DMA PrimeCell ID 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`primecell_id_3::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`primecell_id_3::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PrimecellId3Spec; +impl crate::RegisterSpec for PrimecellId3Spec { type Ux = u32; } -#[doc = "`read()` method returns [primecell_id_3::R](R) reader structure"] -impl crate::Readable for PRIMECELL_ID_3_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [primecell_id_3::W](W) writer structure"] -impl crate::Writable for PRIMECELL_ID_3_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`primecell_id_3::R`](R) reader structure"] +impl crate::Readable for PrimecellId3Spec {} +#[doc = "`write(|w| ..)` method takes [`primecell_id_3::W`](W) writer structure"] +impl crate::Writable for PrimecellId3Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PRIMECELL_ID_3 to value 0xb1"] -impl crate::Resettable for PRIMECELL_ID_3_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0xb1 - } +impl crate::Resettable for PrimecellId3Spec { + const RESET_VALUE: u32 = 0xb1; } diff --git a/va416xx/src/dma/stall_status.rs b/va416xx/src/dma/stall_status.rs index 826fd25..067c1ae 100644 --- a/va416xx/src/dma/stall_status.rs +++ b/va416xx/src/dma/stall_status.rs @@ -1,86 +1,31 @@ #[doc = "Register `STALL_STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `STALL_STATUS` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `STALL_STATUS` reader - DMA is stalled"] -pub struct STALL_STATUS_R(crate::FieldReader); -impl STALL_STATUS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - STALL_STATUS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for STALL_STATUS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type StallStatusR = crate::BitReader; impl R { #[doc = "Bit 0 - DMA is stalled"] #[inline(always)] - pub fn stall_status(&self) -> STALL_STATUS_R { - STALL_STATUS_R::new((self.bits & 0x01) != 0) + pub fn stall_status(&self) -> StallStatusR { + StallStatusR::new((self.bits & 1) != 0) } } -impl W { - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "DMA stall status\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [stall_status](index.html) module"] -pub struct STALL_STATUS_SPEC; -impl crate::RegisterSpec for STALL_STATUS_SPEC { +impl W {} +#[doc = "DMA stall status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`stall_status::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`stall_status::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StallStatusSpec; +impl crate::RegisterSpec for StallStatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [stall_status::R](R) reader structure"] -impl crate::Readable for STALL_STATUS_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [stall_status::W](W) writer structure"] -impl crate::Writable for STALL_STATUS_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`stall_status::R`](R) reader structure"] +impl crate::Readable for StallStatusSpec {} +#[doc = "`write(|w| ..)` method takes [`stall_status::W`](W) writer structure"] +impl crate::Writable for StallStatusSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets STALL_STATUS to value 0"] -impl crate::Resettable for STALL_STATUS_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for StallStatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/dma/status.rs b/va416xx/src/dma/status.rs index 950a111..65dfd07 100644 --- a/va416xx/src/dma/status.rs +++ b/va416xx/src/dma/status.rs @@ -1,113 +1,43 @@ #[doc = "Register `STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Field `TEST_STATUS` reader - Test Status Logic Included"] -pub struct TEST_STATUS_R(crate::FieldReader); -impl TEST_STATUS_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - TEST_STATUS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TEST_STATUS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CHNLS_MINUS1` reader - Number of Available Channels Minus 1"] -pub struct CHNLS_MINUS1_R(crate::FieldReader); -impl CHNLS_MINUS1_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - CHNLS_MINUS1_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CHNLS_MINUS1_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `STATE` reader - Current State of the control state machine"] -pub struct STATE_R(crate::FieldReader); -impl STATE_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - STATE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for STATE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type R = crate::R; #[doc = "Field `MASTER_ENABLE` reader - Enable status of the controller"] -pub struct MASTER_ENABLE_R(crate::FieldReader); -impl MASTER_ENABLE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - MASTER_ENABLE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for MASTER_ENABLE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type MasterEnableR = crate::BitReader; +#[doc = "Field `STATE` reader - Current State of the control state machine"] +pub type StateR = crate::FieldReader; +#[doc = "Field `CHNLS_MINUS1` reader - Number of Available Channels Minus 1"] +pub type ChnlsMinus1R = crate::FieldReader; +#[doc = "Field `TEST_STATUS` reader - Test Status Logic Included"] +pub type TestStatusR = crate::FieldReader; impl R { - #[doc = "Bits 28:31 - Test Status Logic Included"] + #[doc = "Bit 0 - Enable status of the controller"] #[inline(always)] - pub fn test_status(&self) -> TEST_STATUS_R { - TEST_STATUS_R::new(((self.bits >> 28) & 0x0f) as u8) - } - #[doc = "Bits 16:20 - Number of Available Channels Minus 1"] - #[inline(always)] - pub fn chnls_minus1(&self) -> CHNLS_MINUS1_R { - CHNLS_MINUS1_R::new(((self.bits >> 16) & 0x1f) as u8) + pub fn master_enable(&self) -> MasterEnableR { + MasterEnableR::new((self.bits & 1) != 0) } #[doc = "Bits 4:7 - Current State of the control state machine"] #[inline(always)] - pub fn state(&self) -> STATE_R { - STATE_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn state(&self) -> StateR { + StateR::new(((self.bits >> 4) & 0x0f) as u8) } - #[doc = "Bit 0 - Enable status of the controller"] + #[doc = "Bits 16:20 - Number of Available Channels Minus 1"] #[inline(always)] - pub fn master_enable(&self) -> MASTER_ENABLE_R { - MASTER_ENABLE_R::new((self.bits & 0x01) != 0) + pub fn chnls_minus1(&self) -> ChnlsMinus1R { + ChnlsMinus1R::new(((self.bits >> 16) & 0x1f) as u8) + } + #[doc = "Bits 28:31 - Test Status Logic Included"] + #[inline(always)] + pub fn test_status(&self) -> TestStatusR { + TestStatusR::new(((self.bits >> 28) & 0x0f) as u8) } } -#[doc = "DMA Status\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +#[doc = "DMA Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [status::R](R) reader structure"] -impl crate::Readable for STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`status::R`](R) reader structure"] +impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0"] -impl crate::Resettable for STATUS_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for StatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/dma/waitonreq_status.rs b/va416xx/src/dma/waitonreq_status.rs index c778f95..a5cdb49 100644 --- a/va416xx/src/dma/waitonreq_status.rs +++ b/va416xx/src/dma/waitonreq_status.rs @@ -1,113 +1,43 @@ #[doc = "Register `WAITONREQ_STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Field `CH3` reader - DMA wait on request"] -pub struct CH3_R(crate::FieldReader); -impl CH3_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CH3_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CH3_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CH2` reader - DMA wait on request"] -pub struct CH2_R(crate::FieldReader); -impl CH2_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CH2_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CH2_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CH1` reader - DMA wait on request"] -pub struct CH1_R(crate::FieldReader); -impl CH1_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CH1_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CH1_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type R = crate::R; #[doc = "Field `CH0` reader - DMA wait on request"] -pub struct CH0_R(crate::FieldReader); -impl CH0_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CH0_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CH0_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Ch0R = crate::BitReader; +#[doc = "Field `CH1` reader - DMA wait on request"] +pub type Ch1R = crate::BitReader; +#[doc = "Field `CH2` reader - DMA wait on request"] +pub type Ch2R = crate::BitReader; +#[doc = "Field `CH3` reader - DMA wait on request"] +pub type Ch3R = crate::BitReader; impl R { - #[doc = "Bit 3 - DMA wait on request"] + #[doc = "Bit 0 - DMA wait on request"] #[inline(always)] - pub fn ch3(&self) -> CH3_R { - CH3_R::new(((self.bits >> 3) & 0x01) != 0) - } - #[doc = "Bit 2 - DMA wait on request"] - #[inline(always)] - pub fn ch2(&self) -> CH2_R { - CH2_R::new(((self.bits >> 2) & 0x01) != 0) + pub fn ch0(&self) -> Ch0R { + Ch0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - DMA wait on request"] #[inline(always)] - pub fn ch1(&self) -> CH1_R { - CH1_R::new(((self.bits >> 1) & 0x01) != 0) + pub fn ch1(&self) -> Ch1R { + Ch1R::new(((self.bits >> 1) & 1) != 0) } - #[doc = "Bit 0 - DMA wait on request"] + #[doc = "Bit 2 - DMA wait on request"] #[inline(always)] - pub fn ch0(&self) -> CH0_R { - CH0_R::new((self.bits & 0x01) != 0) + pub fn ch2(&self) -> Ch2R { + Ch2R::new(((self.bits >> 2) & 1) != 0) + } + #[doc = "Bit 3 - DMA wait on request"] + #[inline(always)] + pub fn ch3(&self) -> Ch3R { + Ch3R::new(((self.bits >> 3) & 1) != 0) } } -#[doc = "DMA channel wait on request status\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [waitonreq_status](index.html) module"] -pub struct WAITONREQ_STATUS_SPEC; -impl crate::RegisterSpec for WAITONREQ_STATUS_SPEC { +#[doc = "DMA channel wait on request status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`waitonreq_status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct WaitonreqStatusSpec; +impl crate::RegisterSpec for WaitonreqStatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [waitonreq_status::R](R) reader structure"] -impl crate::Readable for WAITONREQ_STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`waitonreq_status::R`](R) reader structure"] +impl crate::Readable for WaitonreqStatusSpec {} #[doc = "`reset()` method sets WAITONREQ_STATUS to value 0"] -impl crate::Resettable for WAITONREQ_STATUS_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for WaitonreqStatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth.rs b/va416xx/src/eth.rs index 8f034c1..d547318 100644 --- a/va416xx/src/eth.rs +++ b/va416xx/src/eth.rs @@ -1,585 +1,1157 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - #[doc = "0x00 - Operation mode register for the MAC"] - pub mac_config: crate::Reg, - #[doc = "0x04 - Contains the frame filtering controls"] - pub mac_frame_fltr: crate::Reg, + mac_config: MacConfig, + mac_frame_fltr: MacFrameFltr, _reserved2: [u8; 0x08], - #[doc = "0x10 - Controls the management cycles to an external PHY"] - pub mac_gmii_addr: crate::Reg, - #[doc = "0x14 - Contains the data to be written to or read from the PHY register"] - pub mac_gmii_data: crate::Reg, - #[doc = "0x18 - Controls the generation of control frames"] - pub mac_flow_ctrl: crate::Reg, - #[doc = "0x1c - Identifies IEEE 802.1Q VLAN type frames"] - pub mac_vlan_tag: crate::Reg, + mac_gmii_addr: MacGmiiAddr, + mac_gmii_data: MacGmiiData, + mac_flow_ctrl: MacFlowCtrl, + mac_vlan_tag: MacVlanTag, _reserved6: [u8; 0x04], - #[doc = "0x24 - Gives the status of the various internal blocks for debugging"] - pub mac_debug: crate::Reg, + mac_debug: MacDebug, _reserved7: [u8; 0x10], - #[doc = "0x38 - Contains the interrupt status"] - pub mac_intr_stat: crate::Reg, - #[doc = "0x3c - Contains the masks for generating interrupt"] - pub mac_intr_mask: crate::Reg, - #[doc = "0x40 - Contains the high 16-bits of the first MAC Address"] - pub mac_addr_h: crate::Reg, - #[doc = "0x44 - Contains the Low 32-bits of the first MAC Address"] - pub mac_addr_l: crate::Reg, + mac_intr_stat: MacIntrStat, + mac_intr_mask: MacIntrMask, + mac_addr_h: MacAddrH, + mac_addr_l: MacAddrL, _reserved11: [u8; 0x94], - #[doc = "0xdc - Controls the watchdog time-out for received frames"] - pub mac_wdog_to: crate::Reg, + mac_wdog_to: MacWdogTo, _reserved12: [u8; 0x20], - #[doc = "0x100 - MMC Control Register"] - pub mmc_cntrl: crate::Reg, - #[doc = "0x104 - MMC Receive Interrupt Register"] - pub mmc_intr_rx: crate::Reg, - #[doc = "0x108 - MMC Transmit Interrupt Register"] - pub mmc_intr_tx: crate::Reg, - #[doc = "0x10c - MMC Receive Interrupt Mask Register"] - pub mmc_intr_mask_rx: crate::Reg, - #[doc = "0x110 - MMC Transmit Interrupt Mask Register"] - pub mmc_intr_mask_tx: crate::Reg, - #[doc = "0x114 - MMC Transmit Count"] - pub txoctetcount_gb: crate::Reg, - #[doc = "0x118 - MMC Frame Count Register"] - pub txframecount_gb: crate::Reg, - #[doc = "0x11c - MMC Good Broadcast Frames Register"] - pub txbcastframes_g: crate::Reg, - #[doc = "0x120 - MMC Good Multicast Frames Register"] - pub txmcastframes_g: crate::Reg, - #[doc = "0x124 - MMC Good and bad Frames transmitted with length 64"] - pub tx64oct_gb: crate::Reg, - #[doc = "0x128 - MMC Good and bad Frames transmitted with length 65 to 127"] - pub tx65to127oct_gb: crate::Reg, - #[doc = "0x12c - MMC Good and bad Frames transmitted with length 128 to 255"] - pub tx128to255oct_gb: crate::Reg, - #[doc = "0x130 - MMC Good and bad Frames transmitted with length 256 to 511"] - pub tx256to511oct_gb: crate::Reg, - #[doc = "0x134 - MMC Good and bad Frames transmitted with length 512 to 1023"] - pub tx512to1023oct_gb: crate::Reg, - #[doc = "0x138 - MMC Good and bad Frames transmitted with length 1024 to max bytes"] - pub tx1024maxoct_gb: crate::Reg, - #[doc = "0x13c - MMC number of good and bad unicast frames transmitted"] - pub txucastframe_gb: crate::Reg, - #[doc = "0x140 - MMC number of good and bad MULTIcast frames transmitted"] - pub txmcastframe_gb: crate::Reg, - #[doc = "0x144 - MMC number of good and bad broadcast frames transmitted"] - pub txbcastframe_gb: crate::Reg, - #[doc = "0x148 - MMC number of frames aborted because of frame underflow error"] - pub txundererr: crate::Reg, - #[doc = "0x14c - MMC Number of successfully transmitted frames after a single collision"] - pub txsinglecol_g: crate::Reg, - #[doc = "0x150 - MMC Number of successfully transmitted frames after multiple collisions"] - pub txmulticol_g: crate::Reg, - #[doc = "0x154 - MMC Number of successfully transmitted frames after a deferral"] - pub txdeferred: crate::Reg, - #[doc = "0x158 - MMC Number of aborted frames because of late collision error"] - pub txlatecol: crate::Reg, - #[doc = "0x15c - MMC Number of aborted frames because of excessive collision errors"] - pub txexesscol: crate::Reg, - #[doc = "0x160 - MMC Number of aborted frames because of carrier sense error"] - pub txcarriererror: crate::Reg, - #[doc = "0x164 - MMC Number of bytes transmitted frames only in good frames"] - pub txoctetcount_g: crate::Reg, - #[doc = "0x168 - MMC Number of good frames transmitted"] - pub txframecount_g: crate::Reg, - #[doc = "0x16c - MMC Number of frames aborted because of excessive deferral error"] - pub txexcessdef: crate::Reg, - #[doc = "0x170 - MMC Number of good pause frames transmitted"] - pub txpauseframes: crate::Reg, - #[doc = "0x174 - MMC Number of good VLAN frames transmitted"] - pub txlanframes_g: crate::Reg, - #[doc = "0x178 - MMC Number of frames transmitted without errors"] - pub txoversize_g: crate::Reg, + mmc_cntrl: MmcCntrl, + mmc_intr_rx: MmcIntrRx, + mmc_intr_tx: MmcIntrTx, + mmc_intr_mask_rx: MmcIntrMaskRx, + mmc_intr_mask_tx: MmcIntrMaskTx, + txoctetcount_gb: TxoctetcountGb, + txframecount_gb: TxframecountGb, + txbcastframes_g: TxbcastframesG, + txmcastframes_g: TxmcastframesG, + tx64oct_gb: Tx64octGb, + tx65to127oct_gb: Tx65to127octGb, + tx128to255oct_gb: Tx128to255octGb, + tx256to511oct_gb: Tx256to511octGb, + tx512to1023oct_gb: Tx512to1023octGb, + tx1024maxoct_gb: Tx1024maxoctGb, + txucastframe_gb: TxucastframeGb, + txmcastframe_gb: TxmcastframeGb, + txbcastframe_gb: TxbcastframeGb, + txundererr: Txundererr, + txsinglecol_g: TxsinglecolG, + txmulticol_g: TxmulticolG, + txdeferred: Txdeferred, + txlatecol: Txlatecol, + txexesscol: Txexesscol, + txcarriererror: Txcarriererror, + txoctetcount_g: TxoctetcountG, + txframecount_g: TxframecountG, + txexcessdef: Txexcessdef, + txpauseframes: Txpauseframes, + txlanframes_g: TxlanframesG, + txoversize_g: TxoversizeG, _reserved43: [u8; 0x04], - #[doc = "0x180 - MMC Number of good and bad frames received"] - pub rxframecount_gb: crate::Reg, - #[doc = "0x184 - MMC Number of bytes received in good and bad frames"] - pub rxoctetcount_gb: crate::Reg, - #[doc = "0x188 - MMC Number of bytes received in good frames only"] - pub rxoctetcount_g: crate::Reg, - #[doc = "0x18c - MMC Number of good broadcast frames received"] - pub rxbcastframes_g: crate::Reg, - #[doc = "0x190 - MMC Number of good multicast frames received"] - pub rxmcastframes_g: crate::Reg, - #[doc = "0x194 - MMC Number of frames received with CRC error"] - pub rxcrcerror: crate::Reg, - #[doc = "0x198 - MMC Number of frames received with alignment error"] - pub rxalignerror: crate::Reg, - #[doc = "0x19c - MMC Number of frames received with runt error"] - pub rxrunterror: crate::Reg, - #[doc = "0x1a0 - MMC Number of giant frames received with length greater than 1518 bytes and with CRC error"] - pub rxjabbererror: crate::Reg, - #[doc = "0x1a4 - MMC Number of frames received with length less than 64 bytes"] - pub rxundersize_g: crate::Reg, - #[doc = "0x1a8 - MMC Number of frames received without errors with length greater than the max size"] - pub rxoversize_g: crate::Reg, - #[doc = "0x1ac - MMC Number of good and bad frames received with length 64 bytes"] - pub rx64octets_gb: crate::Reg, - #[doc = "0x1b0 - MMC Number of good and bad frames received with length between 65 and 127 bytes"] - pub rx65to127oct_gb: crate::Reg, - #[doc = "0x1b4 - MMC Number of good and bad frames received with length between 128 and 255 bytes"] - pub rx128to255oct_gb: crate::Reg, - #[doc = "0x1b8 - MMC Number of good and bad frames received with length between 256 and 511 bytes"] - pub rx256to511oct_gb: crate::Reg, - #[doc = "0x1bc - MMC Number of good and bad frames received with length between 512 and 1023 bytes"] - pub rx512to1023oct_gb: crate::Reg, - #[doc = "0x1c0 - MMC Number of good and bad frames received with length between 1024 and max size bytes"] - pub rx1024maxoct_gb: crate::Reg, - #[doc = "0x1c4 - MMC Number of received good unicast frames"] - pub rxucastframes_g: crate::Reg, - #[doc = "0x1c8 - MMC Number of frames received with length error"] - pub rxlengtherror: crate::Reg, - #[doc = "0x1cc - MMC Number of frames received with length field not equal to the valid frame size"] - pub rxoutrangetype: crate::Reg, - #[doc = "0x1d0 - MMC Number of good and valid Pause frames received"] - pub rxpauseframes: crate::Reg, - #[doc = "0x1d4 - MMC Number of missed received frames because of FIFO overflow"] - pub rxfifooverflow: crate::Reg, - #[doc = "0x1d8 - MMC Number of good and bad VLAN frames received"] - pub rxvlanframes_gb: crate::Reg, - #[doc = "0x1dc - MMC Number of frames received with error because of watchdog timeout error"] - pub rxwdogerror: crate::Reg, - #[doc = "0x1e0 - MMC Number of frames received with Receive error or Frame Extension error"] - pub rxrcverror: crate::Reg, - #[doc = "0x1e4 - MMC Number of received good control frames"] - pub rxctrlframes_g: crate::Reg, + rxframecount_gb: RxframecountGb, + rxoctetcount_gb: RxoctetcountGb, + rxoctetcount_g: RxoctetcountG, + rxbcastframes_g: RxbcastframesG, + rxmcastframes_g: RxmcastframesG, + rxcrcerror: Rxcrcerror, + rxalignerror: Rxalignerror, + rxrunterror: Rxrunterror, + rxjabbererror: Rxjabbererror, + rxundersize_g: RxundersizeG, + rxoversize_g: RxoversizeG, + rx64octets_gb: Rx64octetsGb, + rx65to127oct_gb: Rx65to127octGb, + rx128to255oct_gb: Rx128to255octGb, + rx256to511oct_gb: Rx256to511octGb, + rx512to1023oct_gb: Rx512to1023octGb, + rx1024maxoct_gb: Rx1024maxoctGb, + rxucastframes_g: RxucastframesG, + rxlengtherror: Rxlengtherror, + rxoutrangetype: Rxoutrangetype, + rxpauseframes: Rxpauseframes, + rxfifooverflow: Rxfifooverflow, + rxvlanframes_gb: RxvlanframesGb, + rxwdogerror: Rxwdogerror, + rxrcverror: Rxrcverror, + rxctrlframes_g: RxctrlframesG, _reserved69: [u8; 0x039c], - #[doc = "0x584 - Holds the VLAN Tag for insertion into or replacement in the transmit frames"] - pub vlan_increplace: crate::Reg, - #[doc = "0x588 - Holds the VLAN Hash Table"] - pub vlan_hashtable: crate::Reg, + vlan_increplace: VlanIncreplace, + vlan_hashtable: VlanHashtable, _reserved71: [u8; 0x0174], - #[doc = "0x700 - Controls the IEEE 1588 timestamp generation and update logic"] - pub timestamp_ctrl: crate::Reg, - #[doc = "0x704 - Holds the 8-bit value by which the Sub-Second register is incremented"] - pub subsec_inc: crate::Reg, - #[doc = "0x708 - Holds the lower 32 bits of the second field of the system time"] - pub systime_seconds: crate::Reg, - #[doc = "0x70c - Holds 32 bits of the nano-second field of the system time"] - pub systime_nanosec: crate::Reg, - #[doc = "0x710 - Holds the lower 32 bits of the second field to be written to, added to, or subtracted from the system time value"] - pub systime_secsupdat: crate::Reg, - #[doc = "0x714 - Holds 32 bits of the nano-second field to be written to, added to, or subtracted from the system time value"] - pub systime_nsecup: crate::Reg, - #[doc = "0x718 - This register is used by software to re-adjust the clock frequency linearly to match the Master clock frequency"] - pub timestampaddend: crate::Reg, - #[doc = "0x71c - Holds the high 32-bits of time to be compared with the system time"] - pub target_time_secs: crate::Reg, - #[doc = "0x720 - Holds the lower 32-bits of time to be compared with the system time"] - pub target_time_nsec: crate::Reg, + timestamp_ctrl: TimestampCtrl, + subsec_inc: SubsecInc, + systime_seconds: SystimeSeconds, + systime_nanosec: SystimeNanosec, + systime_secsupdat: SystimeSecsupdat, + systime_nsecup: SystimeNsecup, + timestampaddend: Timestampaddend, + target_time_secs: TargetTimeSecs, + target_time_nsec: TargetTimeNsec, _reserved80: [u8; 0x08dc], - #[doc = "0x1000 - Controls the DMA Host Interface Mode"] - pub dma_bus_mode: crate::Reg, - #[doc = "0x1004 - Used by the host to instruct the DMA to poll the transmit Descriptor list"] - pub dma_tx_poll_demand: crate::Reg, - #[doc = "0x1008 - Used by the host to instruct the DMA to poll the Receive Descriptor list"] - pub dma_rx_poll_demand: crate::Reg, - #[doc = "0x100c - Points the DMA to the start of the Receive Descriptor list"] - pub dma_rx_desc_list_addr: crate::Reg, - #[doc = "0x1010 - Points the DMA to the start of the Transmit Descriptor list"] - pub dma_tx_desc_list_addr: crate::Reg, - #[doc = "0x1014 - Used to determine the status of the DMA"] - pub dma_status: crate::Reg, - #[doc = "0x1018 - Sets the Receive and Transmit operation mode and command"] - pub dma_oper_mode: crate::Reg, - #[doc = "0x101c - Enables the interrupts reported in the status register"] - pub dma_intr_en: crate::Reg, - #[doc = "0x1020 - Contains the counters for discarded frames because no Receive Descriptor is available"] - pub dma_miss_over_counter: crate::Reg, - #[doc = "0x1024 - Watchdog timeout for Receive Interrupt from DMA"] - pub dma_rx_intr_wdog_timer: crate::Reg, + dma_bus_mode: DmaBusMode, + dma_tx_poll_demand: DmaTxPollDemand, + dma_rx_poll_demand: DmaRxPollDemand, + dma_rx_desc_list_addr: DmaRxDescListAddr, + dma_tx_desc_list_addr: DmaTxDescListAddr, + dma_status: DmaStatus, + dma_oper_mode: DmaOperMode, + dma_intr_en: DmaIntrEn, + dma_miss_over_counter: DmaMissOverCounter, + dma_rx_intr_wdog_timer: DmaRxIntrWdogTimer, _reserved90: [u8; 0x04], - #[doc = "0x102c - Provides the active status of the read and write channels of the AHB master interface"] - pub dma_ahb_status: crate::Reg, + dma_ahb_status: DmaAhbStatus, _reserved91: [u8; 0x18], - #[doc = "0x1048 - Contains the start address of the current Transmit Descriptor read by the DMA"] - pub dma_curr_tx_desc: crate::Reg, - #[doc = "0x104c - Contains the start address of the current Receive Descriptor read by the DMA"] - pub dma_curr_rx_desc: crate::Reg, - #[doc = "0x1050 - Contains the start address of the current Receive Descriptor read by the DMA"] - pub dma_curr_tx_bufr_addr: crate::Reg, - #[doc = "0x1054 - Contains the current Receive Buffer address read by the DMA"] - pub dma_curr_rx_bufr_addr: crate::Reg, + dma_curr_tx_desc: DmaCurrTxDesc, + dma_curr_rx_desc: DmaCurrRxDesc, + dma_curr_tx_bufr_addr: DmaCurrTxBufrAddr, + dma_curr_rx_bufr_addr: DmaCurrRxBufrAddr, } -#[doc = "MAC_CONFIG register accessor: an alias for `Reg`"] -pub type MAC_CONFIG = crate::Reg; +impl RegisterBlock { + #[doc = "0x00 - Operation mode register for the MAC"] + #[inline(always)] + pub const fn mac_config(&self) -> &MacConfig { + &self.mac_config + } + #[doc = "0x04 - Contains the frame filtering controls"] + #[inline(always)] + pub const fn mac_frame_fltr(&self) -> &MacFrameFltr { + &self.mac_frame_fltr + } + #[doc = "0x10 - Controls the management cycles to an external PHY"] + #[inline(always)] + pub const fn mac_gmii_addr(&self) -> &MacGmiiAddr { + &self.mac_gmii_addr + } + #[doc = "0x14 - Contains the data to be written to or read from the PHY register"] + #[inline(always)] + pub const fn mac_gmii_data(&self) -> &MacGmiiData { + &self.mac_gmii_data + } + #[doc = "0x18 - Controls the generation of control frames"] + #[inline(always)] + pub const fn mac_flow_ctrl(&self) -> &MacFlowCtrl { + &self.mac_flow_ctrl + } + #[doc = "0x1c - Identifies IEEE 802.1Q VLAN type frames"] + #[inline(always)] + pub const fn mac_vlan_tag(&self) -> &MacVlanTag { + &self.mac_vlan_tag + } + #[doc = "0x24 - Gives the status of the various internal blocks for debugging"] + #[inline(always)] + pub const fn mac_debug(&self) -> &MacDebug { + &self.mac_debug + } + #[doc = "0x38 - Contains the interrupt status"] + #[inline(always)] + pub const fn mac_intr_stat(&self) -> &MacIntrStat { + &self.mac_intr_stat + } + #[doc = "0x3c - Contains the masks for generating interrupt"] + #[inline(always)] + pub const fn mac_intr_mask(&self) -> &MacIntrMask { + &self.mac_intr_mask + } + #[doc = "0x40 - Contains the high 16-bits of the first MAC Address"] + #[inline(always)] + pub const fn mac_addr_h(&self) -> &MacAddrH { + &self.mac_addr_h + } + #[doc = "0x44 - Contains the Low 32-bits of the first MAC Address"] + #[inline(always)] + pub const fn mac_addr_l(&self) -> &MacAddrL { + &self.mac_addr_l + } + #[doc = "0xdc - Controls the watchdog time-out for received frames"] + #[inline(always)] + pub const fn mac_wdog_to(&self) -> &MacWdogTo { + &self.mac_wdog_to + } + #[doc = "0x100 - MMC Control Register"] + #[inline(always)] + pub const fn mmc_cntrl(&self) -> &MmcCntrl { + &self.mmc_cntrl + } + #[doc = "0x104 - MMC Receive Interrupt Register"] + #[inline(always)] + pub const fn mmc_intr_rx(&self) -> &MmcIntrRx { + &self.mmc_intr_rx + } + #[doc = "0x108 - MMC Transmit Interrupt Register"] + #[inline(always)] + pub const fn mmc_intr_tx(&self) -> &MmcIntrTx { + &self.mmc_intr_tx + } + #[doc = "0x10c - MMC Receive Interrupt Mask Register"] + #[inline(always)] + pub const fn mmc_intr_mask_rx(&self) -> &MmcIntrMaskRx { + &self.mmc_intr_mask_rx + } + #[doc = "0x110 - MMC Transmit Interrupt Mask Register"] + #[inline(always)] + pub const fn mmc_intr_mask_tx(&self) -> &MmcIntrMaskTx { + &self.mmc_intr_mask_tx + } + #[doc = "0x114 - MMC Transmit Count"] + #[inline(always)] + pub const fn txoctetcount_gb(&self) -> &TxoctetcountGb { + &self.txoctetcount_gb + } + #[doc = "0x118 - MMC Frame Count Register"] + #[inline(always)] + pub const fn txframecount_gb(&self) -> &TxframecountGb { + &self.txframecount_gb + } + #[doc = "0x11c - MMC Good Broadcast Frames Register"] + #[inline(always)] + pub const fn txbcastframes_g(&self) -> &TxbcastframesG { + &self.txbcastframes_g + } + #[doc = "0x120 - MMC Good Multicast Frames Register"] + #[inline(always)] + pub const fn txmcastframes_g(&self) -> &TxmcastframesG { + &self.txmcastframes_g + } + #[doc = "0x124 - MMC Good and bad Frames transmitted with length 64"] + #[inline(always)] + pub const fn tx64oct_gb(&self) -> &Tx64octGb { + &self.tx64oct_gb + } + #[doc = "0x128 - MMC Good and bad Frames transmitted with length 65 to 127"] + #[inline(always)] + pub const fn tx65to127oct_gb(&self) -> &Tx65to127octGb { + &self.tx65to127oct_gb + } + #[doc = "0x12c - MMC Good and bad Frames transmitted with length 128 to 255"] + #[inline(always)] + pub const fn tx128to255oct_gb(&self) -> &Tx128to255octGb { + &self.tx128to255oct_gb + } + #[doc = "0x130 - MMC Good and bad Frames transmitted with length 256 to 511"] + #[inline(always)] + pub const fn tx256to511oct_gb(&self) -> &Tx256to511octGb { + &self.tx256to511oct_gb + } + #[doc = "0x134 - MMC Good and bad Frames transmitted with length 512 to 1023"] + #[inline(always)] + pub const fn tx512to1023oct_gb(&self) -> &Tx512to1023octGb { + &self.tx512to1023oct_gb + } + #[doc = "0x138 - MMC Good and bad Frames transmitted with length 1024 to max bytes"] + #[inline(always)] + pub const fn tx1024maxoct_gb(&self) -> &Tx1024maxoctGb { + &self.tx1024maxoct_gb + } + #[doc = "0x13c - MMC number of good and bad unicast frames transmitted"] + #[inline(always)] + pub const fn txucastframe_gb(&self) -> &TxucastframeGb { + &self.txucastframe_gb + } + #[doc = "0x140 - MMC number of good and bad MULTIcast frames transmitted"] + #[inline(always)] + pub const fn txmcastframe_gb(&self) -> &TxmcastframeGb { + &self.txmcastframe_gb + } + #[doc = "0x144 - MMC number of good and bad broadcast frames transmitted"] + #[inline(always)] + pub const fn txbcastframe_gb(&self) -> &TxbcastframeGb { + &self.txbcastframe_gb + } + #[doc = "0x148 - MMC number of frames aborted because of frame underflow error"] + #[inline(always)] + pub const fn txundererr(&self) -> &Txundererr { + &self.txundererr + } + #[doc = "0x14c - MMC Number of successfully transmitted frames after a single collision"] + #[inline(always)] + pub const fn txsinglecol_g(&self) -> &TxsinglecolG { + &self.txsinglecol_g + } + #[doc = "0x150 - MMC Number of successfully transmitted frames after multiple collisions"] + #[inline(always)] + pub const fn txmulticol_g(&self) -> &TxmulticolG { + &self.txmulticol_g + } + #[doc = "0x154 - MMC Number of successfully transmitted frames after a deferral"] + #[inline(always)] + pub const fn txdeferred(&self) -> &Txdeferred { + &self.txdeferred + } + #[doc = "0x158 - MMC Number of aborted frames because of late collision error"] + #[inline(always)] + pub const fn txlatecol(&self) -> &Txlatecol { + &self.txlatecol + } + #[doc = "0x15c - MMC Number of aborted frames because of excessive collision errors"] + #[inline(always)] + pub const fn txexesscol(&self) -> &Txexesscol { + &self.txexesscol + } + #[doc = "0x160 - MMC Number of aborted frames because of carrier sense error"] + #[inline(always)] + pub const fn txcarriererror(&self) -> &Txcarriererror { + &self.txcarriererror + } + #[doc = "0x164 - MMC Number of bytes transmitted frames only in good frames"] + #[inline(always)] + pub const fn txoctetcount_g(&self) -> &TxoctetcountG { + &self.txoctetcount_g + } + #[doc = "0x168 - MMC Number of good frames transmitted"] + #[inline(always)] + pub const fn txframecount_g(&self) -> &TxframecountG { + &self.txframecount_g + } + #[doc = "0x16c - MMC Number of frames aborted because of excessive deferral error"] + #[inline(always)] + pub const fn txexcessdef(&self) -> &Txexcessdef { + &self.txexcessdef + } + #[doc = "0x170 - MMC Number of good pause frames transmitted"] + #[inline(always)] + pub const fn txpauseframes(&self) -> &Txpauseframes { + &self.txpauseframes + } + #[doc = "0x174 - MMC Number of good VLAN frames transmitted"] + #[inline(always)] + pub const fn txlanframes_g(&self) -> &TxlanframesG { + &self.txlanframes_g + } + #[doc = "0x178 - MMC Number of frames transmitted without errors"] + #[inline(always)] + pub const fn txoversize_g(&self) -> &TxoversizeG { + &self.txoversize_g + } + #[doc = "0x180 - MMC Number of good and bad frames received"] + #[inline(always)] + pub const fn rxframecount_gb(&self) -> &RxframecountGb { + &self.rxframecount_gb + } + #[doc = "0x184 - MMC Number of bytes received in good and bad frames"] + #[inline(always)] + pub const fn rxoctetcount_gb(&self) -> &RxoctetcountGb { + &self.rxoctetcount_gb + } + #[doc = "0x188 - MMC Number of bytes received in good frames only"] + #[inline(always)] + pub const fn rxoctetcount_g(&self) -> &RxoctetcountG { + &self.rxoctetcount_g + } + #[doc = "0x18c - MMC Number of good broadcast frames received"] + #[inline(always)] + pub const fn rxbcastframes_g(&self) -> &RxbcastframesG { + &self.rxbcastframes_g + } + #[doc = "0x190 - MMC Number of good multicast frames received"] + #[inline(always)] + pub const fn rxmcastframes_g(&self) -> &RxmcastframesG { + &self.rxmcastframes_g + } + #[doc = "0x194 - MMC Number of frames received with CRC error"] + #[inline(always)] + pub const fn rxcrcerror(&self) -> &Rxcrcerror { + &self.rxcrcerror + } + #[doc = "0x198 - MMC Number of frames received with alignment error"] + #[inline(always)] + pub const fn rxalignerror(&self) -> &Rxalignerror { + &self.rxalignerror + } + #[doc = "0x19c - MMC Number of frames received with runt error"] + #[inline(always)] + pub const fn rxrunterror(&self) -> &Rxrunterror { + &self.rxrunterror + } + #[doc = "0x1a0 - MMC Number of giant frames received with length greater than 1518 bytes and with CRC error"] + #[inline(always)] + pub const fn rxjabbererror(&self) -> &Rxjabbererror { + &self.rxjabbererror + } + #[doc = "0x1a4 - MMC Number of frames received with length less than 64 bytes"] + #[inline(always)] + pub const fn rxundersize_g(&self) -> &RxundersizeG { + &self.rxundersize_g + } + #[doc = "0x1a8 - MMC Number of frames received without errors with length greater than the max size"] + #[inline(always)] + pub const fn rxoversize_g(&self) -> &RxoversizeG { + &self.rxoversize_g + } + #[doc = "0x1ac - MMC Number of good and bad frames received with length 64 bytes"] + #[inline(always)] + pub const fn rx64octets_gb(&self) -> &Rx64octetsGb { + &self.rx64octets_gb + } + #[doc = "0x1b0 - MMC Number of good and bad frames received with length between 65 and 127 bytes"] + #[inline(always)] + pub const fn rx65to127oct_gb(&self) -> &Rx65to127octGb { + &self.rx65to127oct_gb + } + #[doc = "0x1b4 - MMC Number of good and bad frames received with length between 128 and 255 bytes"] + #[inline(always)] + pub const fn rx128to255oct_gb(&self) -> &Rx128to255octGb { + &self.rx128to255oct_gb + } + #[doc = "0x1b8 - MMC Number of good and bad frames received with length between 256 and 511 bytes"] + #[inline(always)] + pub const fn rx256to511oct_gb(&self) -> &Rx256to511octGb { + &self.rx256to511oct_gb + } + #[doc = "0x1bc - MMC Number of good and bad frames received with length between 512 and 1023 bytes"] + #[inline(always)] + pub const fn rx512to1023oct_gb(&self) -> &Rx512to1023octGb { + &self.rx512to1023oct_gb + } + #[doc = "0x1c0 - MMC Number of good and bad frames received with length between 1024 and max size bytes"] + #[inline(always)] + pub const fn rx1024maxoct_gb(&self) -> &Rx1024maxoctGb { + &self.rx1024maxoct_gb + } + #[doc = "0x1c4 - MMC Number of received good unicast frames"] + #[inline(always)] + pub const fn rxucastframes_g(&self) -> &RxucastframesG { + &self.rxucastframes_g + } + #[doc = "0x1c8 - MMC Number of frames received with length error"] + #[inline(always)] + pub const fn rxlengtherror(&self) -> &Rxlengtherror { + &self.rxlengtherror + } + #[doc = "0x1cc - MMC Number of frames received with length field not equal to the valid frame size"] + #[inline(always)] + pub const fn rxoutrangetype(&self) -> &Rxoutrangetype { + &self.rxoutrangetype + } + #[doc = "0x1d0 - MMC Number of good and valid Pause frames received"] + #[inline(always)] + pub const fn rxpauseframes(&self) -> &Rxpauseframes { + &self.rxpauseframes + } + #[doc = "0x1d4 - MMC Number of missed received frames because of FIFO overflow"] + #[inline(always)] + pub const fn rxfifooverflow(&self) -> &Rxfifooverflow { + &self.rxfifooverflow + } + #[doc = "0x1d8 - MMC Number of good and bad VLAN frames received"] + #[inline(always)] + pub const fn rxvlanframes_gb(&self) -> &RxvlanframesGb { + &self.rxvlanframes_gb + } + #[doc = "0x1dc - MMC Number of frames received with error because of watchdog timeout error"] + #[inline(always)] + pub const fn rxwdogerror(&self) -> &Rxwdogerror { + &self.rxwdogerror + } + #[doc = "0x1e0 - MMC Number of frames received with Receive error or Frame Extension error"] + #[inline(always)] + pub const fn rxrcverror(&self) -> &Rxrcverror { + &self.rxrcverror + } + #[doc = "0x1e4 - MMC Number of received good control frames"] + #[inline(always)] + pub const fn rxctrlframes_g(&self) -> &RxctrlframesG { + &self.rxctrlframes_g + } + #[doc = "0x584 - Holds the VLAN Tag for insertion into or replacement in the transmit frames"] + #[inline(always)] + pub const fn vlan_increplace(&self) -> &VlanIncreplace { + &self.vlan_increplace + } + #[doc = "0x588 - Holds the VLAN Hash Table"] + #[inline(always)] + pub const fn vlan_hashtable(&self) -> &VlanHashtable { + &self.vlan_hashtable + } + #[doc = "0x700 - Controls the IEEE 1588 timestamp generation and update logic"] + #[inline(always)] + pub const fn timestamp_ctrl(&self) -> &TimestampCtrl { + &self.timestamp_ctrl + } + #[doc = "0x704 - Holds the 8-bit value by which the Sub-Second register is incremented"] + #[inline(always)] + pub const fn subsec_inc(&self) -> &SubsecInc { + &self.subsec_inc + } + #[doc = "0x708 - Holds the lower 32 bits of the second field of the system time"] + #[inline(always)] + pub const fn systime_seconds(&self) -> &SystimeSeconds { + &self.systime_seconds + } + #[doc = "0x70c - Holds 32 bits of the nano-second field of the system time"] + #[inline(always)] + pub const fn systime_nanosec(&self) -> &SystimeNanosec { + &self.systime_nanosec + } + #[doc = "0x710 - Holds the lower 32 bits of the second field to be written to, added to, or subtracted from the system time value"] + #[inline(always)] + pub const fn systime_secsupdat(&self) -> &SystimeSecsupdat { + &self.systime_secsupdat + } + #[doc = "0x714 - Holds 32 bits of the nano-second field to be written to, added to, or subtracted from the system time value"] + #[inline(always)] + pub const fn systime_nsecup(&self) -> &SystimeNsecup { + &self.systime_nsecup + } + #[doc = "0x718 - This register is used by software to re-adjust the clock frequency linearly to match the Master clock frequency"] + #[inline(always)] + pub const fn timestampaddend(&self) -> &Timestampaddend { + &self.timestampaddend + } + #[doc = "0x71c - Holds the high 32-bits of time to be compared with the system time"] + #[inline(always)] + pub const fn target_time_secs(&self) -> &TargetTimeSecs { + &self.target_time_secs + } + #[doc = "0x720 - Holds the lower 32-bits of time to be compared with the system time"] + #[inline(always)] + pub const fn target_time_nsec(&self) -> &TargetTimeNsec { + &self.target_time_nsec + } + #[doc = "0x1000 - Controls the DMA Host Interface Mode"] + #[inline(always)] + pub const fn dma_bus_mode(&self) -> &DmaBusMode { + &self.dma_bus_mode + } + #[doc = "0x1004 - Used by the host to instruct the DMA to poll the transmit Descriptor list"] + #[inline(always)] + pub const fn dma_tx_poll_demand(&self) -> &DmaTxPollDemand { + &self.dma_tx_poll_demand + } + #[doc = "0x1008 - Used by the host to instruct the DMA to poll the Receive Descriptor list"] + #[inline(always)] + pub const fn dma_rx_poll_demand(&self) -> &DmaRxPollDemand { + &self.dma_rx_poll_demand + } + #[doc = "0x100c - Points the DMA to the start of the Receive Descriptor list"] + #[inline(always)] + pub const fn dma_rx_desc_list_addr(&self) -> &DmaRxDescListAddr { + &self.dma_rx_desc_list_addr + } + #[doc = "0x1010 - Points the DMA to the start of the Transmit Descriptor list"] + #[inline(always)] + pub const fn dma_tx_desc_list_addr(&self) -> &DmaTxDescListAddr { + &self.dma_tx_desc_list_addr + } + #[doc = "0x1014 - Used to determine the status of the DMA"] + #[inline(always)] + pub const fn dma_status(&self) -> &DmaStatus { + &self.dma_status + } + #[doc = "0x1018 - Sets the Receive and Transmit operation mode and command"] + #[inline(always)] + pub const fn dma_oper_mode(&self) -> &DmaOperMode { + &self.dma_oper_mode + } + #[doc = "0x101c - Enables the interrupts reported in the status register"] + #[inline(always)] + pub const fn dma_intr_en(&self) -> &DmaIntrEn { + &self.dma_intr_en + } + #[doc = "0x1020 - Contains the counters for discarded frames because no Receive Descriptor is available"] + #[inline(always)] + pub const fn dma_miss_over_counter(&self) -> &DmaMissOverCounter { + &self.dma_miss_over_counter + } + #[doc = "0x1024 - Watchdog timeout for Receive Interrupt from DMA"] + #[inline(always)] + pub const fn dma_rx_intr_wdog_timer(&self) -> &DmaRxIntrWdogTimer { + &self.dma_rx_intr_wdog_timer + } + #[doc = "0x102c - Provides the active status of the read and write channels of the AHB master interface"] + #[inline(always)] + pub const fn dma_ahb_status(&self) -> &DmaAhbStatus { + &self.dma_ahb_status + } + #[doc = "0x1048 - Contains the start address of the current Transmit Descriptor read by the DMA"] + #[inline(always)] + pub const fn dma_curr_tx_desc(&self) -> &DmaCurrTxDesc { + &self.dma_curr_tx_desc + } + #[doc = "0x104c - Contains the start address of the current Receive Descriptor read by the DMA"] + #[inline(always)] + pub const fn dma_curr_rx_desc(&self) -> &DmaCurrRxDesc { + &self.dma_curr_rx_desc + } + #[doc = "0x1050 - Contains the start address of the current Receive Descriptor read by the DMA"] + #[inline(always)] + pub const fn dma_curr_tx_bufr_addr(&self) -> &DmaCurrTxBufrAddr { + &self.dma_curr_tx_bufr_addr + } + #[doc = "0x1054 - Contains the current Receive Buffer address read by the DMA"] + #[inline(always)] + pub const fn dma_curr_rx_bufr_addr(&self) -> &DmaCurrRxBufrAddr { + &self.dma_curr_rx_bufr_addr + } +} +#[doc = "MAC_CONFIG (rw) register accessor: Operation mode register for the MAC\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_config::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mac_config::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_config`] +module"] +#[doc(alias = "MAC_CONFIG")] +pub type MacConfig = crate::Reg; #[doc = "Operation mode register for the MAC"] pub mod mac_config; -#[doc = "MAC_FRAME_FLTR register accessor: an alias for `Reg`"] -pub type MAC_FRAME_FLTR = crate::Reg; +#[doc = "MAC_FRAME_FLTR (rw) register accessor: Contains the frame filtering controls\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_frame_fltr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mac_frame_fltr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_frame_fltr`] +module"] +#[doc(alias = "MAC_FRAME_FLTR")] +pub type MacFrameFltr = crate::Reg; #[doc = "Contains the frame filtering controls"] pub mod mac_frame_fltr; -#[doc = "MAC_GMII_ADDR register accessor: an alias for `Reg`"] -pub type MAC_GMII_ADDR = crate::Reg; +#[doc = "MAC_GMII_ADDR (rw) register accessor: Controls the management cycles to an external PHY\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_gmii_addr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mac_gmii_addr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_gmii_addr`] +module"] +#[doc(alias = "MAC_GMII_ADDR")] +pub type MacGmiiAddr = crate::Reg; #[doc = "Controls the management cycles to an external PHY"] pub mod mac_gmii_addr; -#[doc = "MAC_GMII_DATA register accessor: an alias for `Reg`"] -pub type MAC_GMII_DATA = crate::Reg; +#[doc = "MAC_GMII_DATA (rw) register accessor: Contains the data to be written to or read from the PHY register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_gmii_data::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mac_gmii_data::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_gmii_data`] +module"] +#[doc(alias = "MAC_GMII_DATA")] +pub type MacGmiiData = crate::Reg; #[doc = "Contains the data to be written to or read from the PHY register"] pub mod mac_gmii_data; -#[doc = "MAC_FLOW_CTRL register accessor: an alias for `Reg`"] -pub type MAC_FLOW_CTRL = crate::Reg; +#[doc = "MAC_FLOW_CTRL (rw) register accessor: Controls the generation of control frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_flow_ctrl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mac_flow_ctrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_flow_ctrl`] +module"] +#[doc(alias = "MAC_FLOW_CTRL")] +pub type MacFlowCtrl = crate::Reg; #[doc = "Controls the generation of control frames"] pub mod mac_flow_ctrl; -#[doc = "MAC_VLAN_TAG register accessor: an alias for `Reg`"] -pub type MAC_VLAN_TAG = crate::Reg; +#[doc = "MAC_VLAN_TAG (rw) register accessor: Identifies IEEE 802.1Q VLAN type frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_vlan_tag::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mac_vlan_tag::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_vlan_tag`] +module"] +#[doc(alias = "MAC_VLAN_TAG")] +pub type MacVlanTag = crate::Reg; #[doc = "Identifies IEEE 802.1Q VLAN type frames"] pub mod mac_vlan_tag; -#[doc = "MAC_DEBUG register accessor: an alias for `Reg`"] -pub type MAC_DEBUG = crate::Reg; +#[doc = "MAC_DEBUG (r) register accessor: Gives the status of the various internal blocks for debugging\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_debug::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_debug`] +module"] +#[doc(alias = "MAC_DEBUG")] +pub type MacDebug = crate::Reg; #[doc = "Gives the status of the various internal blocks for debugging"] pub mod mac_debug; -#[doc = "MAC_INTR_STAT register accessor: an alias for `Reg`"] -pub type MAC_INTR_STAT = crate::Reg; +#[doc = "MAC_INTR_STAT (r) register accessor: Contains the interrupt status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_intr_stat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_intr_stat`] +module"] +#[doc(alias = "MAC_INTR_STAT")] +pub type MacIntrStat = crate::Reg; #[doc = "Contains the interrupt status"] pub mod mac_intr_stat; -#[doc = "MAC_INTR_MASK register accessor: an alias for `Reg`"] -pub type MAC_INTR_MASK = crate::Reg; +#[doc = "MAC_INTR_MASK (rw) register accessor: Contains the masks for generating interrupt\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_intr_mask::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mac_intr_mask::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_intr_mask`] +module"] +#[doc(alias = "MAC_INTR_MASK")] +pub type MacIntrMask = crate::Reg; #[doc = "Contains the masks for generating interrupt"] pub mod mac_intr_mask; -#[doc = "MAC_ADDR_H register accessor: an alias for `Reg`"] -pub type MAC_ADDR_H = crate::Reg; +#[doc = "MAC_ADDR_H (rw) register accessor: Contains the high 16-bits of the first MAC Address\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_addr_h::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mac_addr_h::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_addr_h`] +module"] +#[doc(alias = "MAC_ADDR_H")] +pub type MacAddrH = crate::Reg; #[doc = "Contains the high 16-bits of the first MAC Address"] pub mod mac_addr_h; -#[doc = "MAC_ADDR_L register accessor: an alias for `Reg`"] -pub type MAC_ADDR_L = crate::Reg; +#[doc = "MAC_ADDR_L (rw) register accessor: Contains the Low 32-bits of the first MAC Address\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_addr_l::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mac_addr_l::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_addr_l`] +module"] +#[doc(alias = "MAC_ADDR_L")] +pub type MacAddrL = crate::Reg; #[doc = "Contains the Low 32-bits of the first MAC Address"] pub mod mac_addr_l; -#[doc = "MAC_WDOG_TO register accessor: an alias for `Reg`"] -pub type MAC_WDOG_TO = crate::Reg; +#[doc = "MAC_WDOG_TO (rw) register accessor: Controls the watchdog time-out for received frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_wdog_to::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mac_wdog_to::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_wdog_to`] +module"] +#[doc(alias = "MAC_WDOG_TO")] +pub type MacWdogTo = crate::Reg; #[doc = "Controls the watchdog time-out for received frames"] pub mod mac_wdog_to; -#[doc = "MMC_CNTRL register accessor: an alias for `Reg`"] -pub type MMC_CNTRL = crate::Reg; +#[doc = "MMC_CNTRL (rw) register accessor: MMC Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mmc_cntrl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mmc_cntrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mmc_cntrl`] +module"] +#[doc(alias = "MMC_CNTRL")] +pub type MmcCntrl = crate::Reg; #[doc = "MMC Control Register"] pub mod mmc_cntrl; -#[doc = "MMC_INTR_RX register accessor: an alias for `Reg`"] -pub type MMC_INTR_RX = crate::Reg; +#[doc = "MMC_INTR_RX (rw) register accessor: MMC Receive Interrupt Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mmc_intr_rx::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mmc_intr_rx::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mmc_intr_rx`] +module"] +#[doc(alias = "MMC_INTR_RX")] +pub type MmcIntrRx = crate::Reg; #[doc = "MMC Receive Interrupt Register"] pub mod mmc_intr_rx; -#[doc = "MMC_INTR_TX register accessor: an alias for `Reg`"] -pub type MMC_INTR_TX = crate::Reg; +#[doc = "MMC_INTR_TX (rw) register accessor: MMC Transmit Interrupt Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mmc_intr_tx::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mmc_intr_tx::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mmc_intr_tx`] +module"] +#[doc(alias = "MMC_INTR_TX")] +pub type MmcIntrTx = crate::Reg; #[doc = "MMC Transmit Interrupt Register"] pub mod mmc_intr_tx; -#[doc = "MMC_INTR_MASK_RX register accessor: an alias for `Reg`"] -pub type MMC_INTR_MASK_RX = crate::Reg; +#[doc = "MMC_INTR_MASK_RX (rw) register accessor: MMC Receive Interrupt Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mmc_intr_mask_rx::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mmc_intr_mask_rx::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mmc_intr_mask_rx`] +module"] +#[doc(alias = "MMC_INTR_MASK_RX")] +pub type MmcIntrMaskRx = crate::Reg; #[doc = "MMC Receive Interrupt Mask Register"] pub mod mmc_intr_mask_rx; -#[doc = "MMC_INTR_MASK_TX register accessor: an alias for `Reg`"] -pub type MMC_INTR_MASK_TX = crate::Reg; +#[doc = "MMC_INTR_MASK_TX (rw) register accessor: MMC Transmit Interrupt Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mmc_intr_mask_tx::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mmc_intr_mask_tx::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mmc_intr_mask_tx`] +module"] +#[doc(alias = "MMC_INTR_MASK_TX")] +pub type MmcIntrMaskTx = crate::Reg; #[doc = "MMC Transmit Interrupt Mask Register"] pub mod mmc_intr_mask_tx; -#[doc = "TXOCTETCOUNT_GB register accessor: an alias for `Reg`"] -pub type TXOCTETCOUNT_GB = crate::Reg; +#[doc = "TXOCTETCOUNT_GB (r) register accessor: MMC Transmit Count\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txoctetcount_gb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txoctetcount_gb`] +module"] +#[doc(alias = "TXOCTETCOUNT_GB")] +pub type TxoctetcountGb = crate::Reg; #[doc = "MMC Transmit Count"] pub mod txoctetcount_gb; -#[doc = "TXFRAMECOUNT_GB register accessor: an alias for `Reg`"] -pub type TXFRAMECOUNT_GB = crate::Reg; +#[doc = "TXFRAMECOUNT_GB (r) register accessor: MMC Frame Count Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txframecount_gb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txframecount_gb`] +module"] +#[doc(alias = "TXFRAMECOUNT_GB")] +pub type TxframecountGb = crate::Reg; #[doc = "MMC Frame Count Register"] pub mod txframecount_gb; -#[doc = "TXBCASTFRAMES_G register accessor: an alias for `Reg`"] -pub type TXBCASTFRAMES_G = crate::Reg; +#[doc = "TXBCASTFRAMES_G (r) register accessor: MMC Good Broadcast Frames Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txbcastframes_g::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txbcastframes_g`] +module"] +#[doc(alias = "TXBCASTFRAMES_G")] +pub type TxbcastframesG = crate::Reg; #[doc = "MMC Good Broadcast Frames Register"] pub mod txbcastframes_g; -#[doc = "TXMCASTFRAMES_G register accessor: an alias for `Reg`"] -pub type TXMCASTFRAMES_G = crate::Reg; +#[doc = "TXMCASTFRAMES_G (r) register accessor: MMC Good Multicast Frames Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txmcastframes_g::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txmcastframes_g`] +module"] +#[doc(alias = "TXMCASTFRAMES_G")] +pub type TxmcastframesG = crate::Reg; #[doc = "MMC Good Multicast Frames Register"] pub mod txmcastframes_g; -#[doc = "TX64OCT_GB register accessor: an alias for `Reg`"] -pub type TX64OCT_GB = crate::Reg; +#[doc = "TX64OCT_GB (r) register accessor: MMC Good and bad Frames transmitted with length 64\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx64oct_gb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx64oct_gb`] +module"] +#[doc(alias = "TX64OCT_GB")] +pub type Tx64octGb = crate::Reg; #[doc = "MMC Good and bad Frames transmitted with length 64"] pub mod tx64oct_gb; -#[doc = "TX65TO127OCT_GB register accessor: an alias for `Reg`"] -pub type TX65TO127OCT_GB = crate::Reg; +#[doc = "TX65TO127OCT_GB (r) register accessor: MMC Good and bad Frames transmitted with length 65 to 127\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx65to127oct_gb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx65to127oct_gb`] +module"] +#[doc(alias = "TX65TO127OCT_GB")] +pub type Tx65to127octGb = crate::Reg; #[doc = "MMC Good and bad Frames transmitted with length 65 to 127"] pub mod tx65to127oct_gb; -#[doc = "TX128TO255OCT_GB register accessor: an alias for `Reg`"] -pub type TX128TO255OCT_GB = crate::Reg; +#[doc = "TX128TO255OCT_GB (r) register accessor: MMC Good and bad Frames transmitted with length 128 to 255\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx128to255oct_gb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx128to255oct_gb`] +module"] +#[doc(alias = "TX128TO255OCT_GB")] +pub type Tx128to255octGb = crate::Reg; #[doc = "MMC Good and bad Frames transmitted with length 128 to 255"] pub mod tx128to255oct_gb; -#[doc = "TX256TO511OCT_GB register accessor: an alias for `Reg`"] -pub type TX256TO511OCT_GB = crate::Reg; +#[doc = "TX256TO511OCT_GB (r) register accessor: MMC Good and bad Frames transmitted with length 256 to 511\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx256to511oct_gb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx256to511oct_gb`] +module"] +#[doc(alias = "TX256TO511OCT_GB")] +pub type Tx256to511octGb = crate::Reg; #[doc = "MMC Good and bad Frames transmitted with length 256 to 511"] pub mod tx256to511oct_gb; -#[doc = "TX512TO1023OCT_GB register accessor: an alias for `Reg`"] -pub type TX512TO1023OCT_GB = crate::Reg; +#[doc = "TX512TO1023OCT_GB (r) register accessor: MMC Good and bad Frames transmitted with length 512 to 1023\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx512to1023oct_gb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx512to1023oct_gb`] +module"] +#[doc(alias = "TX512TO1023OCT_GB")] +pub type Tx512to1023octGb = crate::Reg; #[doc = "MMC Good and bad Frames transmitted with length 512 to 1023"] pub mod tx512to1023oct_gb; -#[doc = "TX1024MAXOCT_GB register accessor: an alias for `Reg`"] -pub type TX1024MAXOCT_GB = crate::Reg; +#[doc = "TX1024MAXOCT_GB (r) register accessor: MMC Good and bad Frames transmitted with length 1024 to max bytes\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx1024maxoct_gb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx1024maxoct_gb`] +module"] +#[doc(alias = "TX1024MAXOCT_GB")] +pub type Tx1024maxoctGb = crate::Reg; #[doc = "MMC Good and bad Frames transmitted with length 1024 to max bytes"] pub mod tx1024maxoct_gb; -#[doc = "TXUCASTFRAME_GB register accessor: an alias for `Reg`"] -pub type TXUCASTFRAME_GB = crate::Reg; +#[doc = "TXUCASTFRAME_GB (r) register accessor: MMC number of good and bad unicast frames transmitted\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txucastframe_gb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txucastframe_gb`] +module"] +#[doc(alias = "TXUCASTFRAME_GB")] +pub type TxucastframeGb = crate::Reg; #[doc = "MMC number of good and bad unicast frames transmitted"] pub mod txucastframe_gb; -#[doc = "TXMCASTFRAME_GB register accessor: an alias for `Reg`"] -pub type TXMCASTFRAME_GB = crate::Reg; +#[doc = "TXMCASTFRAME_GB (r) register accessor: MMC number of good and bad MULTIcast frames transmitted\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txmcastframe_gb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txmcastframe_gb`] +module"] +#[doc(alias = "TXMCASTFRAME_GB")] +pub type TxmcastframeGb = crate::Reg; #[doc = "MMC number of good and bad MULTIcast frames transmitted"] pub mod txmcastframe_gb; -#[doc = "TXBCASTFRAME_GB register accessor: an alias for `Reg`"] -pub type TXBCASTFRAME_GB = crate::Reg; +#[doc = "TXBCASTFRAME_GB (r) register accessor: MMC number of good and bad broadcast frames transmitted\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txbcastframe_gb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txbcastframe_gb`] +module"] +#[doc(alias = "TXBCASTFRAME_GB")] +pub type TxbcastframeGb = crate::Reg; #[doc = "MMC number of good and bad broadcast frames transmitted"] pub mod txbcastframe_gb; -#[doc = "TXUNDERERR register accessor: an alias for `Reg`"] -pub type TXUNDERERR = crate::Reg; +#[doc = "TXUNDERERR (r) register accessor: MMC number of frames aborted because of frame underflow error\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txundererr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txundererr`] +module"] +#[doc(alias = "TXUNDERERR")] +pub type Txundererr = crate::Reg; #[doc = "MMC number of frames aborted because of frame underflow error"] pub mod txundererr; -#[doc = "TXSINGLECOL_G register accessor: an alias for `Reg`"] -pub type TXSINGLECOL_G = crate::Reg; +#[doc = "TXSINGLECOL_G (r) register accessor: MMC Number of successfully transmitted frames after a single collision\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txsinglecol_g::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txsinglecol_g`] +module"] +#[doc(alias = "TXSINGLECOL_G")] +pub type TxsinglecolG = crate::Reg; #[doc = "MMC Number of successfully transmitted frames after a single collision"] pub mod txsinglecol_g; -#[doc = "TXMULTICOL_G register accessor: an alias for `Reg`"] -pub type TXMULTICOL_G = crate::Reg; +#[doc = "TXMULTICOL_G (r) register accessor: MMC Number of successfully transmitted frames after multiple collisions\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txmulticol_g::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txmulticol_g`] +module"] +#[doc(alias = "TXMULTICOL_G")] +pub type TxmulticolG = crate::Reg; #[doc = "MMC Number of successfully transmitted frames after multiple collisions"] pub mod txmulticol_g; -#[doc = "TXDEFERRED register accessor: an alias for `Reg`"] -pub type TXDEFERRED = crate::Reg; +#[doc = "TXDEFERRED (r) register accessor: MMC Number of successfully transmitted frames after a deferral\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txdeferred::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txdeferred`] +module"] +#[doc(alias = "TXDEFERRED")] +pub type Txdeferred = crate::Reg; #[doc = "MMC Number of successfully transmitted frames after a deferral"] pub mod txdeferred; -#[doc = "TXLATECOL register accessor: an alias for `Reg`"] -pub type TXLATECOL = crate::Reg; +#[doc = "TXLATECOL (r) register accessor: MMC Number of aborted frames because of late collision error\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txlatecol::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txlatecol`] +module"] +#[doc(alias = "TXLATECOL")] +pub type Txlatecol = crate::Reg; #[doc = "MMC Number of aborted frames because of late collision error"] pub mod txlatecol; -#[doc = "TXEXESSCOL register accessor: an alias for `Reg`"] -pub type TXEXESSCOL = crate::Reg; +#[doc = "TXEXESSCOL (r) register accessor: MMC Number of aborted frames because of excessive collision errors\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txexesscol::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txexesscol`] +module"] +#[doc(alias = "TXEXESSCOL")] +pub type Txexesscol = crate::Reg; #[doc = "MMC Number of aborted frames because of excessive collision errors"] pub mod txexesscol; -#[doc = "TXCARRIERERROR register accessor: an alias for `Reg`"] -pub type TXCARRIERERROR = crate::Reg; +#[doc = "TXCARRIERERROR (r) register accessor: MMC Number of aborted frames because of carrier sense error\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txcarriererror::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txcarriererror`] +module"] +#[doc(alias = "TXCARRIERERROR")] +pub type Txcarriererror = crate::Reg; #[doc = "MMC Number of aborted frames because of carrier sense error"] pub mod txcarriererror; -#[doc = "TXOCTETCOUNT_G register accessor: an alias for `Reg`"] -pub type TXOCTETCOUNT_G = crate::Reg; +#[doc = "TXOCTETCOUNT_G (r) register accessor: MMC Number of bytes transmitted frames only in good frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txoctetcount_g::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txoctetcount_g`] +module"] +#[doc(alias = "TXOCTETCOUNT_G")] +pub type TxoctetcountG = crate::Reg; #[doc = "MMC Number of bytes transmitted frames only in good frames"] pub mod txoctetcount_g; -#[doc = "TXFRAMECOUNT_G register accessor: an alias for `Reg`"] -pub type TXFRAMECOUNT_G = crate::Reg; +#[doc = "TXFRAMECOUNT_G (r) register accessor: MMC Number of good frames transmitted\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txframecount_g::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txframecount_g`] +module"] +#[doc(alias = "TXFRAMECOUNT_G")] +pub type TxframecountG = crate::Reg; #[doc = "MMC Number of good frames transmitted"] pub mod txframecount_g; -#[doc = "TXEXCESSDEF register accessor: an alias for `Reg`"] -pub type TXEXCESSDEF = crate::Reg; +#[doc = "TXEXCESSDEF (r) register accessor: MMC Number of frames aborted because of excessive deferral error\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txexcessdef::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txexcessdef`] +module"] +#[doc(alias = "TXEXCESSDEF")] +pub type Txexcessdef = crate::Reg; #[doc = "MMC Number of frames aborted because of excessive deferral error"] pub mod txexcessdef; -#[doc = "TXPAUSEFRAMES register accessor: an alias for `Reg`"] -pub type TXPAUSEFRAMES = crate::Reg; +#[doc = "TXPAUSEFRAMES (r) register accessor: MMC Number of good pause frames transmitted\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txpauseframes::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txpauseframes`] +module"] +#[doc(alias = "TXPAUSEFRAMES")] +pub type Txpauseframes = crate::Reg; #[doc = "MMC Number of good pause frames transmitted"] pub mod txpauseframes; -#[doc = "TXLANFRAMES_G register accessor: an alias for `Reg`"] -pub type TXLANFRAMES_G = crate::Reg; +#[doc = "TXLANFRAMES_G (r) register accessor: MMC Number of good VLAN frames transmitted\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txlanframes_g::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txlanframes_g`] +module"] +#[doc(alias = "TXLANFRAMES_G")] +pub type TxlanframesG = crate::Reg; #[doc = "MMC Number of good VLAN frames transmitted"] pub mod txlanframes_g; -#[doc = "TXOVERSIZE_G register accessor: an alias for `Reg`"] -pub type TXOVERSIZE_G = crate::Reg; +#[doc = "TXOVERSIZE_G (r) register accessor: MMC Number of frames transmitted without errors\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txoversize_g::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txoversize_g`] +module"] +#[doc(alias = "TXOVERSIZE_G")] +pub type TxoversizeG = crate::Reg; #[doc = "MMC Number of frames transmitted without errors"] pub mod txoversize_g; -#[doc = "RXFRAMECOUNT_GB register accessor: an alias for `Reg`"] -pub type RXFRAMECOUNT_GB = crate::Reg; +#[doc = "RXFRAMECOUNT_GB (r) register accessor: MMC Number of good and bad frames received\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxframecount_gb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxframecount_gb`] +module"] +#[doc(alias = "RXFRAMECOUNT_GB")] +pub type RxframecountGb = crate::Reg; #[doc = "MMC Number of good and bad frames received"] pub mod rxframecount_gb; -#[doc = "RXOCTETCOUNT_GB register accessor: an alias for `Reg`"] -pub type RXOCTETCOUNT_GB = crate::Reg; +#[doc = "RXOCTETCOUNT_GB (r) register accessor: MMC Number of bytes received in good and bad frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxoctetcount_gb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxoctetcount_gb`] +module"] +#[doc(alias = "RXOCTETCOUNT_GB")] +pub type RxoctetcountGb = crate::Reg; #[doc = "MMC Number of bytes received in good and bad frames"] pub mod rxoctetcount_gb; -#[doc = "RXOCTETCOUNT_G register accessor: an alias for `Reg`"] -pub type RXOCTETCOUNT_G = crate::Reg; +#[doc = "RXOCTETCOUNT_G (r) register accessor: MMC Number of bytes received in good frames only\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxoctetcount_g::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxoctetcount_g`] +module"] +#[doc(alias = "RXOCTETCOUNT_G")] +pub type RxoctetcountG = crate::Reg; #[doc = "MMC Number of bytes received in good frames only"] pub mod rxoctetcount_g; -#[doc = "RXBCASTFRAMES_G register accessor: an alias for `Reg`"] -pub type RXBCASTFRAMES_G = crate::Reg; +#[doc = "RXBCASTFRAMES_G (r) register accessor: MMC Number of good broadcast frames received\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxbcastframes_g::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxbcastframes_g`] +module"] +#[doc(alias = "RXBCASTFRAMES_G")] +pub type RxbcastframesG = crate::Reg; #[doc = "MMC Number of good broadcast frames received"] pub mod rxbcastframes_g; -#[doc = "RXMCASTFRAMES_G register accessor: an alias for `Reg`"] -pub type RXMCASTFRAMES_G = crate::Reg; +#[doc = "RXMCASTFRAMES_G (r) register accessor: MMC Number of good multicast frames received\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxmcastframes_g::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxmcastframes_g`] +module"] +#[doc(alias = "RXMCASTFRAMES_G")] +pub type RxmcastframesG = crate::Reg; #[doc = "MMC Number of good multicast frames received"] pub mod rxmcastframes_g; -#[doc = "RXCRCERROR register accessor: an alias for `Reg`"] -pub type RXCRCERROR = crate::Reg; +#[doc = "RXCRCERROR (r) register accessor: MMC Number of frames received with CRC error\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxcrcerror::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxcrcerror`] +module"] +#[doc(alias = "RXCRCERROR")] +pub type Rxcrcerror = crate::Reg; #[doc = "MMC Number of frames received with CRC error"] pub mod rxcrcerror; -#[doc = "RXALIGNERROR register accessor: an alias for `Reg`"] -pub type RXALIGNERROR = crate::Reg; +#[doc = "RXALIGNERROR (r) register accessor: MMC Number of frames received with alignment error\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxalignerror::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxalignerror`] +module"] +#[doc(alias = "RXALIGNERROR")] +pub type Rxalignerror = crate::Reg; #[doc = "MMC Number of frames received with alignment error"] pub mod rxalignerror; -#[doc = "RXRUNTERROR register accessor: an alias for `Reg`"] -pub type RXRUNTERROR = crate::Reg; +#[doc = "RXRUNTERROR (r) register accessor: MMC Number of frames received with runt error\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxrunterror::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxrunterror`] +module"] +#[doc(alias = "RXRUNTERROR")] +pub type Rxrunterror = crate::Reg; #[doc = "MMC Number of frames received with runt error"] pub mod rxrunterror; -#[doc = "RXJABBERERROR register accessor: an alias for `Reg`"] -pub type RXJABBERERROR = crate::Reg; +#[doc = "RXJABBERERROR (r) register accessor: MMC Number of giant frames received with length greater than 1518 bytes and with CRC error\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxjabbererror::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxjabbererror`] +module"] +#[doc(alias = "RXJABBERERROR")] +pub type Rxjabbererror = crate::Reg; #[doc = "MMC Number of giant frames received with length greater than 1518 bytes and with CRC error"] pub mod rxjabbererror; -#[doc = "RXUNDERSIZE_G register accessor: an alias for `Reg`"] -pub type RXUNDERSIZE_G = crate::Reg; +#[doc = "RXUNDERSIZE_G (r) register accessor: MMC Number of frames received with length less than 64 bytes\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxundersize_g::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxundersize_g`] +module"] +#[doc(alias = "RXUNDERSIZE_G")] +pub type RxundersizeG = crate::Reg; #[doc = "MMC Number of frames received with length less than 64 bytes"] pub mod rxundersize_g; -#[doc = "RXOVERSIZE_G register accessor: an alias for `Reg`"] -pub type RXOVERSIZE_G = crate::Reg; +#[doc = "RXOVERSIZE_G (r) register accessor: MMC Number of frames received without errors with length greater than the max size\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxoversize_g::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxoversize_g`] +module"] +#[doc(alias = "RXOVERSIZE_G")] +pub type RxoversizeG = crate::Reg; #[doc = "MMC Number of frames received without errors with length greater than the max size"] pub mod rxoversize_g; -#[doc = "RX64OCTETS_GB register accessor: an alias for `Reg`"] -pub type RX64OCTETS_GB = crate::Reg; +#[doc = "RX64OCTETS_GB (r) register accessor: MMC Number of good and bad frames received with length 64 bytes\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx64octets_gb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx64octets_gb`] +module"] +#[doc(alias = "RX64OCTETS_GB")] +pub type Rx64octetsGb = crate::Reg; #[doc = "MMC Number of good and bad frames received with length 64 bytes"] pub mod rx64octets_gb; -#[doc = "RX65TO127OCT_GB register accessor: an alias for `Reg`"] -pub type RX65TO127OCT_GB = crate::Reg; +#[doc = "RX65TO127OCT_GB (r) register accessor: MMC Number of good and bad frames received with length between 65 and 127 bytes\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx65to127oct_gb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx65to127oct_gb`] +module"] +#[doc(alias = "RX65TO127OCT_GB")] +pub type Rx65to127octGb = crate::Reg; #[doc = "MMC Number of good and bad frames received with length between 65 and 127 bytes"] pub mod rx65to127oct_gb; -#[doc = "RX128TO255OCT_GB register accessor: an alias for `Reg`"] -pub type RX128TO255OCT_GB = crate::Reg; +#[doc = "RX128TO255OCT_GB (r) register accessor: MMC Number of good and bad frames received with length between 128 and 255 bytes\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx128to255oct_gb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx128to255oct_gb`] +module"] +#[doc(alias = "RX128TO255OCT_GB")] +pub type Rx128to255octGb = crate::Reg; #[doc = "MMC Number of good and bad frames received with length between 128 and 255 bytes"] pub mod rx128to255oct_gb; -#[doc = "RX256TO511OCT_GB register accessor: an alias for `Reg`"] -pub type RX256TO511OCT_GB = crate::Reg; +#[doc = "RX256TO511OCT_GB (r) register accessor: MMC Number of good and bad frames received with length between 256 and 511 bytes\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx256to511oct_gb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx256to511oct_gb`] +module"] +#[doc(alias = "RX256TO511OCT_GB")] +pub type Rx256to511octGb = crate::Reg; #[doc = "MMC Number of good and bad frames received with length between 256 and 511 bytes"] pub mod rx256to511oct_gb; -#[doc = "RX512TO1023OCT_GB register accessor: an alias for `Reg`"] -pub type RX512TO1023OCT_GB = crate::Reg; +#[doc = "RX512TO1023OCT_GB (r) register accessor: MMC Number of good and bad frames received with length between 512 and 1023 bytes\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx512to1023oct_gb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx512to1023oct_gb`] +module"] +#[doc(alias = "RX512TO1023OCT_GB")] +pub type Rx512to1023octGb = crate::Reg; #[doc = "MMC Number of good and bad frames received with length between 512 and 1023 bytes"] pub mod rx512to1023oct_gb; -#[doc = "RX1024MAXOCT_GB register accessor: an alias for `Reg`"] -pub type RX1024MAXOCT_GB = crate::Reg; +#[doc = "RX1024MAXOCT_GB (r) register accessor: MMC Number of good and bad frames received with length between 1024 and max size bytes\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx1024maxoct_gb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx1024maxoct_gb`] +module"] +#[doc(alias = "RX1024MAXOCT_GB")] +pub type Rx1024maxoctGb = crate::Reg; #[doc = "MMC Number of good and bad frames received with length between 1024 and max size bytes"] pub mod rx1024maxoct_gb; -#[doc = "RXUCASTFRAMES_G register accessor: an alias for `Reg`"] -pub type RXUCASTFRAMES_G = crate::Reg; +#[doc = "RXUCASTFRAMES_G (r) register accessor: MMC Number of received good unicast frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxucastframes_g::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxucastframes_g`] +module"] +#[doc(alias = "RXUCASTFRAMES_G")] +pub type RxucastframesG = crate::Reg; #[doc = "MMC Number of received good unicast frames"] pub mod rxucastframes_g; -#[doc = "RXLENGTHERROR register accessor: an alias for `Reg`"] -pub type RXLENGTHERROR = crate::Reg; +#[doc = "RXLENGTHERROR (r) register accessor: MMC Number of frames received with length error\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxlengtherror::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxlengtherror`] +module"] +#[doc(alias = "RXLENGTHERROR")] +pub type Rxlengtherror = crate::Reg; #[doc = "MMC Number of frames received with length error"] pub mod rxlengtherror; -#[doc = "RXOUTRANGETYPE register accessor: an alias for `Reg`"] -pub type RXOUTRANGETYPE = crate::Reg; +#[doc = "RXOUTRANGETYPE (r) register accessor: MMC Number of frames received with length field not equal to the valid frame size\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxoutrangetype::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxoutrangetype`] +module"] +#[doc(alias = "RXOUTRANGETYPE")] +pub type Rxoutrangetype = crate::Reg; #[doc = "MMC Number of frames received with length field not equal to the valid frame size"] pub mod rxoutrangetype; -#[doc = "RXPAUSEFRAMES register accessor: an alias for `Reg`"] -pub type RXPAUSEFRAMES = crate::Reg; +#[doc = "RXPAUSEFRAMES (r) register accessor: MMC Number of good and valid Pause frames received\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxpauseframes::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxpauseframes`] +module"] +#[doc(alias = "RXPAUSEFRAMES")] +pub type Rxpauseframes = crate::Reg; #[doc = "MMC Number of good and valid Pause frames received"] pub mod rxpauseframes; -#[doc = "RXFIFOOVERFLOW register accessor: an alias for `Reg`"] -pub type RXFIFOOVERFLOW = crate::Reg; +#[doc = "RXFIFOOVERFLOW (r) register accessor: MMC Number of missed received frames because of FIFO overflow\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxfifooverflow::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxfifooverflow`] +module"] +#[doc(alias = "RXFIFOOVERFLOW")] +pub type Rxfifooverflow = crate::Reg; #[doc = "MMC Number of missed received frames because of FIFO overflow"] pub mod rxfifooverflow; -#[doc = "RXVLANFRAMES_GB register accessor: an alias for `Reg`"] -pub type RXVLANFRAMES_GB = crate::Reg; +#[doc = "RXVLANFRAMES_GB (r) register accessor: MMC Number of good and bad VLAN frames received\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxvlanframes_gb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxvlanframes_gb`] +module"] +#[doc(alias = "RXVLANFRAMES_GB")] +pub type RxvlanframesGb = crate::Reg; #[doc = "MMC Number of good and bad VLAN frames received"] pub mod rxvlanframes_gb; -#[doc = "RXWDOGERROR register accessor: an alias for `Reg`"] -pub type RXWDOGERROR = crate::Reg; +#[doc = "RXWDOGERROR (r) register accessor: MMC Number of frames received with error because of watchdog timeout error\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxwdogerror::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxwdogerror`] +module"] +#[doc(alias = "RXWDOGERROR")] +pub type Rxwdogerror = crate::Reg; #[doc = "MMC Number of frames received with error because of watchdog timeout error"] pub mod rxwdogerror; -#[doc = "RXRCVERROR register accessor: an alias for `Reg`"] -pub type RXRCVERROR = crate::Reg; +#[doc = "RXRCVERROR (r) register accessor: MMC Number of frames received with Receive error or Frame Extension error\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxrcverror::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxrcverror`] +module"] +#[doc(alias = "RXRCVERROR")] +pub type Rxrcverror = crate::Reg; #[doc = "MMC Number of frames received with Receive error or Frame Extension error"] pub mod rxrcverror; -#[doc = "RXCTRLFRAMES_G register accessor: an alias for `Reg`"] -pub type RXCTRLFRAMES_G = crate::Reg; +#[doc = "RXCTRLFRAMES_G (r) register accessor: MMC Number of received good control frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxctrlframes_g::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxctrlframes_g`] +module"] +#[doc(alias = "RXCTRLFRAMES_G")] +pub type RxctrlframesG = crate::Reg; #[doc = "MMC Number of received good control frames"] pub mod rxctrlframes_g; -#[doc = "VLAN_INCREPLACE register accessor: an alias for `Reg`"] -pub type VLAN_INCREPLACE = crate::Reg; +#[doc = "VLAN_INCREPLACE (rw) register accessor: Holds the VLAN Tag for insertion into or replacement in the transmit frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`vlan_increplace::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`vlan_increplace::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@vlan_increplace`] +module"] +#[doc(alias = "VLAN_INCREPLACE")] +pub type VlanIncreplace = crate::Reg; #[doc = "Holds the VLAN Tag for insertion into or replacement in the transmit frames"] pub mod vlan_increplace; -#[doc = "VLAN_HASHTABLE register accessor: an alias for `Reg`"] -pub type VLAN_HASHTABLE = crate::Reg; +#[doc = "VLAN_HASHTABLE (rw) register accessor: Holds the VLAN Hash Table\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`vlan_hashtable::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`vlan_hashtable::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@vlan_hashtable`] +module"] +#[doc(alias = "VLAN_HASHTABLE")] +pub type VlanHashtable = crate::Reg; #[doc = "Holds the VLAN Hash Table"] pub mod vlan_hashtable; -#[doc = "TIMESTAMP_CTRL register accessor: an alias for `Reg`"] -pub type TIMESTAMP_CTRL = crate::Reg; +#[doc = "TIMESTAMP_CTRL (rw) register accessor: Controls the IEEE 1588 timestamp generation and update logic\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`timestamp_ctrl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`timestamp_ctrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timestamp_ctrl`] +module"] +#[doc(alias = "TIMESTAMP_CTRL")] +pub type TimestampCtrl = crate::Reg; #[doc = "Controls the IEEE 1588 timestamp generation and update logic"] pub mod timestamp_ctrl; -#[doc = "SUBSEC_INC register accessor: an alias for `Reg`"] -pub type SUBSEC_INC = crate::Reg; +#[doc = "SUBSEC_INC (rw) register accessor: Holds the 8-bit value by which the Sub-Second register is incremented\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`subsec_inc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`subsec_inc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@subsec_inc`] +module"] +#[doc(alias = "SUBSEC_INC")] +pub type SubsecInc = crate::Reg; #[doc = "Holds the 8-bit value by which the Sub-Second register is incremented"] pub mod subsec_inc; -#[doc = "SYSTIME_SECONDS register accessor: an alias for `Reg`"] -pub type SYSTIME_SECONDS = crate::Reg; +#[doc = "SYSTIME_SECONDS (r) register accessor: Holds the lower 32 bits of the second field of the system time\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`systime_seconds::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@systime_seconds`] +module"] +#[doc(alias = "SYSTIME_SECONDS")] +pub type SystimeSeconds = crate::Reg; #[doc = "Holds the lower 32 bits of the second field of the system time"] pub mod systime_seconds; -#[doc = "SYSTIME_NANOSEC register accessor: an alias for `Reg`"] -pub type SYSTIME_NANOSEC = crate::Reg; +#[doc = "SYSTIME_NANOSEC (r) register accessor: Holds 32 bits of the nano-second field of the system time\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`systime_nanosec::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@systime_nanosec`] +module"] +#[doc(alias = "SYSTIME_NANOSEC")] +pub type SystimeNanosec = crate::Reg; #[doc = "Holds 32 bits of the nano-second field of the system time"] pub mod systime_nanosec; -#[doc = "SYSTIME_SECSUPDAT register accessor: an alias for `Reg`"] -pub type SYSTIME_SECSUPDAT = crate::Reg; +#[doc = "SYSTIME_SECSUPDAT (rw) register accessor: Holds the lower 32 bits of the second field to be written to, added to, or subtracted from the system time value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`systime_secsupdat::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`systime_secsupdat::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@systime_secsupdat`] +module"] +#[doc(alias = "SYSTIME_SECSUPDAT")] +pub type SystimeSecsupdat = crate::Reg; #[doc = "Holds the lower 32 bits of the second field to be written to, added to, or subtracted from the system time value"] pub mod systime_secsupdat; -#[doc = "SYSTIME_NSECUP register accessor: an alias for `Reg`"] -pub type SYSTIME_NSECUP = crate::Reg; +#[doc = "SYSTIME_NSECUP (rw) register accessor: Holds 32 bits of the nano-second field to be written to, added to, or subtracted from the system time value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`systime_nsecup::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`systime_nsecup::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@systime_nsecup`] +module"] +#[doc(alias = "SYSTIME_NSECUP")] +pub type SystimeNsecup = crate::Reg; #[doc = "Holds 32 bits of the nano-second field to be written to, added to, or subtracted from the system time value"] pub mod systime_nsecup; -#[doc = "TIMESTAMPADDEND register accessor: an alias for `Reg`"] -pub type TIMESTAMPADDEND = crate::Reg; +#[doc = "TIMESTAMPADDEND (rw) register accessor: This register is used by software to re-adjust the clock frequency linearly to match the Master clock frequency\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`timestampaddend::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`timestampaddend::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timestampaddend`] +module"] +#[doc(alias = "TIMESTAMPADDEND")] +pub type Timestampaddend = crate::Reg; #[doc = "This register is used by software to re-adjust the clock frequency linearly to match the Master clock frequency"] pub mod timestampaddend; -#[doc = "TARGET_TIME_SECS register accessor: an alias for `Reg`"] -pub type TARGET_TIME_SECS = crate::Reg; +#[doc = "TARGET_TIME_SECS (rw) register accessor: Holds the high 32-bits of time to be compared with the system time\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`target_time_secs::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`target_time_secs::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@target_time_secs`] +module"] +#[doc(alias = "TARGET_TIME_SECS")] +pub type TargetTimeSecs = crate::Reg; #[doc = "Holds the high 32-bits of time to be compared with the system time"] pub mod target_time_secs; -#[doc = "TARGET_TIME_NSEC register accessor: an alias for `Reg`"] -pub type TARGET_TIME_NSEC = crate::Reg; +#[doc = "TARGET_TIME_NSEC (rw) register accessor: Holds the lower 32-bits of time to be compared with the system time\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`target_time_nsec::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`target_time_nsec::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@target_time_nsec`] +module"] +#[doc(alias = "TARGET_TIME_NSEC")] +pub type TargetTimeNsec = crate::Reg; #[doc = "Holds the lower 32-bits of time to be compared with the system time"] pub mod target_time_nsec; -#[doc = "DMA_BUS_MODE register accessor: an alias for `Reg`"] -pub type DMA_BUS_MODE = crate::Reg; +#[doc = "DMA_BUS_MODE (rw) register accessor: Controls the DMA Host Interface Mode\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_bus_mode::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_bus_mode::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_bus_mode`] +module"] +#[doc(alias = "DMA_BUS_MODE")] +pub type DmaBusMode = crate::Reg; #[doc = "Controls the DMA Host Interface Mode"] pub mod dma_bus_mode; -#[doc = "DMA_TX_POLL_DEMAND register accessor: an alias for `Reg`"] -pub type DMA_TX_POLL_DEMAND = crate::Reg; +#[doc = "DMA_TX_POLL_DEMAND (rw) register accessor: Used by the host to instruct the DMA to poll the transmit Descriptor list\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_tx_poll_demand::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_tx_poll_demand::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_tx_poll_demand`] +module"] +#[doc(alias = "DMA_TX_POLL_DEMAND")] +pub type DmaTxPollDemand = crate::Reg; #[doc = "Used by the host to instruct the DMA to poll the transmit Descriptor list"] pub mod dma_tx_poll_demand; -#[doc = "DMA_RX_POLL_DEMAND register accessor: an alias for `Reg`"] -pub type DMA_RX_POLL_DEMAND = crate::Reg; +#[doc = "DMA_RX_POLL_DEMAND (rw) register accessor: Used by the host to instruct the DMA to poll the Receive Descriptor list\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_rx_poll_demand::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_rx_poll_demand::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_rx_poll_demand`] +module"] +#[doc(alias = "DMA_RX_POLL_DEMAND")] +pub type DmaRxPollDemand = crate::Reg; #[doc = "Used by the host to instruct the DMA to poll the Receive Descriptor list"] pub mod dma_rx_poll_demand; -#[doc = "DMA_RX_DESC_LIST_ADDR register accessor: an alias for `Reg`"] -pub type DMA_RX_DESC_LIST_ADDR = crate::Reg; +#[doc = "DMA_RX_DESC_LIST_ADDR (rw) register accessor: Points the DMA to the start of the Receive Descriptor list\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_rx_desc_list_addr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_rx_desc_list_addr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_rx_desc_list_addr`] +module"] +#[doc(alias = "DMA_RX_DESC_LIST_ADDR")] +pub type DmaRxDescListAddr = crate::Reg; #[doc = "Points the DMA to the start of the Receive Descriptor list"] pub mod dma_rx_desc_list_addr; -#[doc = "DMA_TX_DESC_LIST_ADDR register accessor: an alias for `Reg`"] -pub type DMA_TX_DESC_LIST_ADDR = crate::Reg; +#[doc = "DMA_TX_DESC_LIST_ADDR (rw) register accessor: Points the DMA to the start of the Transmit Descriptor list\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_tx_desc_list_addr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_tx_desc_list_addr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_tx_desc_list_addr`] +module"] +#[doc(alias = "DMA_TX_DESC_LIST_ADDR")] +pub type DmaTxDescListAddr = crate::Reg; #[doc = "Points the DMA to the start of the Transmit Descriptor list"] pub mod dma_tx_desc_list_addr; -#[doc = "DMA_STATUS register accessor: an alias for `Reg`"] -pub type DMA_STATUS = crate::Reg; +#[doc = "DMA_STATUS (r) register accessor: Used to determine the status of the DMA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_status`] +module"] +#[doc(alias = "DMA_STATUS")] +pub type DmaStatus = crate::Reg; #[doc = "Used to determine the status of the DMA"] pub mod dma_status; -#[doc = "DMA_OPER_MODE register accessor: an alias for `Reg`"] -pub type DMA_OPER_MODE = crate::Reg; +#[doc = "DMA_OPER_MODE (rw) register accessor: Sets the Receive and Transmit operation mode and command\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_oper_mode::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_oper_mode::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_oper_mode`] +module"] +#[doc(alias = "DMA_OPER_MODE")] +pub type DmaOperMode = crate::Reg; #[doc = "Sets the Receive and Transmit operation mode and command"] pub mod dma_oper_mode; -#[doc = "DMA_INTR_EN register accessor: an alias for `Reg`"] -pub type DMA_INTR_EN = crate::Reg; +#[doc = "DMA_INTR_EN (rw) register accessor: Enables the interrupts reported in the status register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_intr_en::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_intr_en::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_intr_en`] +module"] +#[doc(alias = "DMA_INTR_EN")] +pub type DmaIntrEn = crate::Reg; #[doc = "Enables the interrupts reported in the status register"] pub mod dma_intr_en; -#[doc = "DMA_MISS_OVER_COUNTER register accessor: an alias for `Reg`"] -pub type DMA_MISS_OVER_COUNTER = crate::Reg; +#[doc = "DMA_MISS_OVER_COUNTER (rw) register accessor: Contains the counters for discarded frames because no Receive Descriptor is available\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_miss_over_counter::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_miss_over_counter::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_miss_over_counter`] +module"] +#[doc(alias = "DMA_MISS_OVER_COUNTER")] +pub type DmaMissOverCounter = crate::Reg; #[doc = "Contains the counters for discarded frames because no Receive Descriptor is available"] pub mod dma_miss_over_counter; -#[doc = "DMA_RX_INTR_WDOG_TIMER register accessor: an alias for `Reg`"] -pub type DMA_RX_INTR_WDOG_TIMER = crate::Reg; +#[doc = "DMA_RX_INTR_WDOG_TIMER (rw) register accessor: Watchdog timeout for Receive Interrupt from DMA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_rx_intr_wdog_timer::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_rx_intr_wdog_timer::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_rx_intr_wdog_timer`] +module"] +#[doc(alias = "DMA_RX_INTR_WDOG_TIMER")] +pub type DmaRxIntrWdogTimer = crate::Reg; #[doc = "Watchdog timeout for Receive Interrupt from DMA"] pub mod dma_rx_intr_wdog_timer; -#[doc = "DMA_AHB_STATUS register accessor: an alias for `Reg`"] -pub type DMA_AHB_STATUS = crate::Reg; +#[doc = "DMA_AHB_STATUS (rw) register accessor: Provides the active status of the read and write channels of the AHB master interface\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_ahb_status::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_ahb_status::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_ahb_status`] +module"] +#[doc(alias = "DMA_AHB_STATUS")] +pub type DmaAhbStatus = crate::Reg; #[doc = "Provides the active status of the read and write channels of the AHB master interface"] pub mod dma_ahb_status; -#[doc = "DMA_CURR_TX_DESC register accessor: an alias for `Reg`"] -pub type DMA_CURR_TX_DESC = crate::Reg; +#[doc = "DMA_CURR_TX_DESC (rw) register accessor: Contains the start address of the current Transmit Descriptor read by the DMA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_curr_tx_desc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_curr_tx_desc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_curr_tx_desc`] +module"] +#[doc(alias = "DMA_CURR_TX_DESC")] +pub type DmaCurrTxDesc = crate::Reg; #[doc = "Contains the start address of the current Transmit Descriptor read by the DMA"] pub mod dma_curr_tx_desc; -#[doc = "DMA_CURR_RX_DESC register accessor: an alias for `Reg`"] -pub type DMA_CURR_RX_DESC = crate::Reg; +#[doc = "DMA_CURR_RX_DESC (rw) register accessor: Contains the start address of the current Receive Descriptor read by the DMA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_curr_rx_desc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_curr_rx_desc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_curr_rx_desc`] +module"] +#[doc(alias = "DMA_CURR_RX_DESC")] +pub type DmaCurrRxDesc = crate::Reg; #[doc = "Contains the start address of the current Receive Descriptor read by the DMA"] pub mod dma_curr_rx_desc; -#[doc = "DMA_CURR_TX_BUFR_ADDR register accessor: an alias for `Reg`"] -pub type DMA_CURR_TX_BUFR_ADDR = crate::Reg; +#[doc = "DMA_CURR_TX_BUFR_ADDR (rw) register accessor: Contains the start address of the current Receive Descriptor read by the DMA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_curr_tx_bufr_addr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_curr_tx_bufr_addr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_curr_tx_bufr_addr`] +module"] +#[doc(alias = "DMA_CURR_TX_BUFR_ADDR")] +pub type DmaCurrTxBufrAddr = crate::Reg; #[doc = "Contains the start address of the current Receive Descriptor read by the DMA"] pub mod dma_curr_tx_bufr_addr; -#[doc = "DMA_CURR_RX_BUFR_ADDR register accessor: an alias for `Reg`"] -pub type DMA_CURR_RX_BUFR_ADDR = crate::Reg; +#[doc = "DMA_CURR_RX_BUFR_ADDR (rw) register accessor: Contains the current Receive Buffer address read by the DMA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_curr_rx_bufr_addr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_curr_rx_bufr_addr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_curr_rx_bufr_addr`] +module"] +#[doc(alias = "DMA_CURR_RX_BUFR_ADDR")] +pub type DmaCurrRxBufrAddr = crate::Reg; #[doc = "Contains the current Receive Buffer address read by the DMA"] pub mod dma_curr_rx_bufr_addr; diff --git a/va416xx/src/eth/dma_ahb_status.rs b/va416xx/src/eth/dma_ahb_status.rs index b1bf946..bb66213 100644 --- a/va416xx/src/eth/dma_ahb_status.rs +++ b/va416xx/src/eth/dma_ahb_status.rs @@ -1,113 +1,40 @@ #[doc = "Register `DMA_AHB_STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DMA_AHB_STATUS` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `AHBMASTRSTS` reader - When high, indicates that the AHB master interface FSMs are in the non-idle state"] -pub struct AHBMASTRSTS_R(crate::FieldReader); -impl AHBMASTRSTS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - AHBMASTRSTS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for AHBMASTRSTS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type AhbmastrstsR = crate::BitReader; #[doc = "Field `AHBMASTRSTS` writer - When high, indicates that the AHB master interface FSMs are in the non-idle state"] -pub struct AHBMASTRSTS_W<'a> { - w: &'a mut W, -} -impl<'a> AHBMASTRSTS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} +pub type AhbmastrstsW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - When high, indicates that the AHB master interface FSMs are in the non-idle state"] #[inline(always)] - pub fn ahbmastrsts(&self) -> AHBMASTRSTS_R { - AHBMASTRSTS_R::new((self.bits & 0x01) != 0) + pub fn ahbmastrsts(&self) -> AhbmastrstsR { + AhbmastrstsR::new((self.bits & 1) != 0) } } impl W { #[doc = "Bit 0 - When high, indicates that the AHB master interface FSMs are in the non-idle state"] #[inline(always)] - pub fn ahbmastrsts(&mut self) -> AHBMASTRSTS_W { - AHBMASTRSTS_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn ahbmastrsts(&mut self) -> AhbmastrstsW { + AhbmastrstsW::new(self, 0) } } -#[doc = "Provides the active status of the read and write channels of the AHB master interface\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dma_ahb_status](index.html) module"] -pub struct DMA_AHB_STATUS_SPEC; -impl crate::RegisterSpec for DMA_AHB_STATUS_SPEC { +#[doc = "Provides the active status of the read and write channels of the AHB master interface\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_ahb_status::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_ahb_status::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DmaAhbStatusSpec; +impl crate::RegisterSpec for DmaAhbStatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [dma_ahb_status::R](R) reader structure"] -impl crate::Readable for DMA_AHB_STATUS_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dma_ahb_status::W](W) writer structure"] -impl crate::Writable for DMA_AHB_STATUS_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`dma_ahb_status::R`](R) reader structure"] +impl crate::Readable for DmaAhbStatusSpec {} +#[doc = "`write(|w| ..)` method takes [`dma_ahb_status::W`](W) writer structure"] +impl crate::Writable for DmaAhbStatusSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DMA_AHB_STATUS to value 0"] -impl crate::Resettable for DMA_AHB_STATUS_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for DmaAhbStatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/dma_bus_mode.rs b/va416xx/src/eth/dma_bus_mode.rs index cd6bd5c..73f8249 100644 --- a/va416xx/src/eth/dma_bus_mode.rs +++ b/va416xx/src/eth/dma_bus_mode.rs @@ -1,674 +1,235 @@ #[doc = "Register `DMA_BUS_MODE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DMA_BUS_MODE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `RIB` reader - Rebuild INCRx Burst"] -pub struct RIB_R(crate::FieldReader); -impl RIB_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RIB_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RIB_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RIB` writer - Rebuild INCRx Burst"] -pub struct RIB_W<'a> { - w: &'a mut W, -} -impl<'a> RIB_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 31)) | ((value as u32 & 0x01) << 31); - self.w - } -} -#[doc = "Field `PRWG` reader - Channel Priority Weights"] -pub struct PRWG_R(crate::FieldReader); -impl PRWG_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - PRWG_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PRWG_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `PRWG` writer - Channel Priority Weights"] -pub struct PRWG_W<'a> { - w: &'a mut W, -} -impl<'a> PRWG_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x03 << 28)) | ((value as u32 & 0x03) << 28); - self.w - } -} -#[doc = "Field `TXPR` reader - Transmit Priority"] -pub struct TXPR_R(crate::FieldReader); -impl TXPR_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXPR_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXPR_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TXPR` writer - Transmit Priority"] -pub struct TXPR_W<'a> { - w: &'a mut W, -} -impl<'a> TXPR_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 27)) | ((value as u32 & 0x01) << 27); - self.w - } -} -#[doc = "Field `MB` reader - Mixed Burst"] -pub struct MB_R(crate::FieldReader); -impl MB_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - MB_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for MB_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `MB` writer - Mixed Burst"] -pub struct MB_W<'a> { - w: &'a mut W, -} -impl<'a> MB_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 26)) | ((value as u32 & 0x01) << 26); - self.w - } -} -#[doc = "Field `AAL` reader - Address-Aligned Beats"] -pub struct AAL_R(crate::FieldReader); -impl AAL_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - AAL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for AAL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `AAL` writer - Address-Aligned Beats"] -pub struct AAL_W<'a> { - w: &'a mut W, -} -impl<'a> AAL_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 25)) | ((value as u32 & 0x01) << 25); - self.w - } -} -#[doc = "Field `PBLx8` reader - PBLx8 Mode"] -pub struct PBLX8_R(crate::FieldReader); -impl PBLX8_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - PBLX8_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PBLX8_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `PBLx8` writer - PBLx8 Mode"] -pub struct PBLX8_W<'a> { - w: &'a mut W, -} -impl<'a> PBLX8_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 24)) | ((value as u32 & 0x01) << 24); - self.w - } -} -#[doc = "Field `USP` reader - Use Separate PBL"] -pub struct USP_R(crate::FieldReader); -impl USP_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - USP_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for USP_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `USP` writer - Use Separate PBL"] -pub struct USP_W<'a> { - w: &'a mut W, -} -impl<'a> USP_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 23)) | ((value as u32 & 0x01) << 23); - self.w - } -} -#[doc = "Field `RPBL` reader - Rx DMA PBL"] -pub struct RPBL_R(crate::FieldReader); -impl RPBL_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - RPBL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RPBL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RPBL` writer - Rx DMA PBL"] -pub struct RPBL_W<'a> { - w: &'a mut W, -} -impl<'a> RPBL_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x3f << 17)) | ((value as u32 & 0x3f) << 17); - self.w - } -} -#[doc = "Field `FB` reader - Fixed Burste"] -pub struct FB_R(crate::FieldReader); -impl FB_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - FB_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for FB_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `FB` writer - Fixed Burste"] -pub struct FB_W<'a> { - w: &'a mut W, -} -impl<'a> FB_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16); - self.w - } -} -#[doc = "Field `PR` reader - Priority Ratio"] -pub struct PR_R(crate::FieldReader); -impl PR_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - PR_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PR_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `PR` writer - Priority Ratio"] -pub struct PR_W<'a> { - w: &'a mut W, -} -impl<'a> PR_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x03 << 14)) | ((value as u32 & 0x03) << 14); - self.w - } -} -#[doc = "Field `PBL` reader - Programmable Burst Lengthe"] -pub struct PBL_R(crate::FieldReader); -impl PBL_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - PBL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PBL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `PBL` writer - Programmable Burst Lengthe"] -pub struct PBL_W<'a> { - w: &'a mut W, -} -impl<'a> PBL_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x3f << 8)) | ((value as u32 & 0x3f) << 8); - self.w - } -} -#[doc = "Field `DSL` reader - Descriptor Skip Length"] -pub struct DSL_R(crate::FieldReader); -impl DSL_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - DSL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for DSL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `DSL` writer - Descriptor Skip Length"] -pub struct DSL_W<'a> { - w: &'a mut W, -} -impl<'a> DSL_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x1f << 2)) | ((value as u32 & 0x1f) << 2); - self.w - } -} -#[doc = "Field `DA` reader - DMA Arbitration Scheme"] -pub struct DA_R(crate::FieldReader); -impl DA_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - DA_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for DA_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `DA` writer - DMA Arbitration Scheme"] -pub struct DA_W<'a> { - w: &'a mut W, -} -impl<'a> DA_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); - self.w - } -} +pub type W = crate::W; #[doc = "Field `SWR` reader - Software Reset (Read, Write Set, and Self Clear)"] -pub struct SWR_R(crate::FieldReader); -impl SWR_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - SWR_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for SWR_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type SwrR = crate::BitReader; #[doc = "Field `SWR` writer - Software Reset (Read, Write Set, and Self Clear)"] -pub struct SWR_W<'a> { - w: &'a mut W, -} -impl<'a> SWR_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} +pub type SwrW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `DA` reader - DMA Arbitration Scheme"] +pub type DaR = crate::BitReader; +#[doc = "Field `DA` writer - DMA Arbitration Scheme"] +pub type DaW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `DSL` reader - Descriptor Skip Length"] +pub type DslR = crate::FieldReader; +#[doc = "Field `DSL` writer - Descriptor Skip Length"] +pub type DslW<'a, REG> = crate::FieldWriter<'a, REG, 5>; +#[doc = "Field `PBL` reader - Programmable Burst Lengthe"] +pub type PblR = crate::FieldReader; +#[doc = "Field `PBL` writer - Programmable Burst Lengthe"] +pub type PblW<'a, REG> = crate::FieldWriter<'a, REG, 6>; +#[doc = "Field `PR` reader - Priority Ratio"] +pub type PrR = crate::FieldReader; +#[doc = "Field `PR` writer - Priority Ratio"] +pub type PrW<'a, REG> = crate::FieldWriter<'a, REG, 2>; +#[doc = "Field `FB` reader - Fixed Burste"] +pub type FbR = crate::BitReader; +#[doc = "Field `FB` writer - Fixed Burste"] +pub type FbW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `RPBL` reader - Rx DMA PBL"] +pub type RpblR = crate::FieldReader; +#[doc = "Field `RPBL` writer - Rx DMA PBL"] +pub type RpblW<'a, REG> = crate::FieldWriter<'a, REG, 6>; +#[doc = "Field `USP` reader - Use Separate PBL"] +pub type UspR = crate::BitReader; +#[doc = "Field `USP` writer - Use Separate PBL"] +pub type UspW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `PBLx8` reader - PBLx8 Mode"] +pub type Pblx8R = crate::BitReader; +#[doc = "Field `PBLx8` writer - PBLx8 Mode"] +pub type Pblx8W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `AAL` reader - Address-Aligned Beats"] +pub type AalR = crate::BitReader; +#[doc = "Field `AAL` writer - Address-Aligned Beats"] +pub type AalW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `MB` reader - Mixed Burst"] +pub type MbR = crate::BitReader; +#[doc = "Field `MB` writer - Mixed Burst"] +pub type MbW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TXPR` reader - Transmit Priority"] +pub type TxprR = crate::BitReader; +#[doc = "Field `TXPR` writer - Transmit Priority"] +pub type TxprW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `PRWG` reader - Channel Priority Weights"] +pub type PrwgR = crate::FieldReader; +#[doc = "Field `PRWG` writer - Channel Priority Weights"] +pub type PrwgW<'a, REG> = crate::FieldWriter<'a, REG, 2>; +#[doc = "Field `RIB` reader - Rebuild INCRx Burst"] +pub type RibR = crate::BitReader; +#[doc = "Field `RIB` writer - Rebuild INCRx Burst"] +pub type RibW<'a, REG> = crate::BitWriter<'a, REG>; impl R { - #[doc = "Bit 31 - Rebuild INCRx Burst"] + #[doc = "Bit 0 - Software Reset (Read, Write Set, and Self Clear)"] #[inline(always)] - pub fn rib(&self) -> RIB_R { - RIB_R::new(((self.bits >> 31) & 0x01) != 0) - } - #[doc = "Bits 28:29 - Channel Priority Weights"] - #[inline(always)] - pub fn prwg(&self) -> PRWG_R { - PRWG_R::new(((self.bits >> 28) & 0x03) as u8) - } - #[doc = "Bit 27 - Transmit Priority"] - #[inline(always)] - pub fn txpr(&self) -> TXPR_R { - TXPR_R::new(((self.bits >> 27) & 0x01) != 0) - } - #[doc = "Bit 26 - Mixed Burst"] - #[inline(always)] - pub fn mb(&self) -> MB_R { - MB_R::new(((self.bits >> 26) & 0x01) != 0) - } - #[doc = "Bit 25 - Address-Aligned Beats"] - #[inline(always)] - pub fn aal(&self) -> AAL_R { - AAL_R::new(((self.bits >> 25) & 0x01) != 0) - } - #[doc = "Bit 24 - PBLx8 Mode"] - #[inline(always)] - pub fn pblx8(&self) -> PBLX8_R { - PBLX8_R::new(((self.bits >> 24) & 0x01) != 0) - } - #[doc = "Bit 23 - Use Separate PBL"] - #[inline(always)] - pub fn usp(&self) -> USP_R { - USP_R::new(((self.bits >> 23) & 0x01) != 0) - } - #[doc = "Bits 17:22 - Rx DMA PBL"] - #[inline(always)] - pub fn rpbl(&self) -> RPBL_R { - RPBL_R::new(((self.bits >> 17) & 0x3f) as u8) - } - #[doc = "Bit 16 - Fixed Burste"] - #[inline(always)] - pub fn fb(&self) -> FB_R { - FB_R::new(((self.bits >> 16) & 0x01) != 0) - } - #[doc = "Bits 14:15 - Priority Ratio"] - #[inline(always)] - pub fn pr(&self) -> PR_R { - PR_R::new(((self.bits >> 14) & 0x03) as u8) - } - #[doc = "Bits 8:13 - Programmable Burst Lengthe"] - #[inline(always)] - pub fn pbl(&self) -> PBL_R { - PBL_R::new(((self.bits >> 8) & 0x3f) as u8) - } - #[doc = "Bits 2:6 - Descriptor Skip Length"] - #[inline(always)] - pub fn dsl(&self) -> DSL_R { - DSL_R::new(((self.bits >> 2) & 0x1f) as u8) + pub fn swr(&self) -> SwrR { + SwrR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - DMA Arbitration Scheme"] #[inline(always)] - pub fn da(&self) -> DA_R { - DA_R::new(((self.bits >> 1) & 0x01) != 0) + pub fn da(&self) -> DaR { + DaR::new(((self.bits >> 1) & 1) != 0) } - #[doc = "Bit 0 - Software Reset (Read, Write Set, and Self Clear)"] + #[doc = "Bits 2:6 - Descriptor Skip Length"] #[inline(always)] - pub fn swr(&self) -> SWR_R { - SWR_R::new((self.bits & 0x01) != 0) + pub fn dsl(&self) -> DslR { + DslR::new(((self.bits >> 2) & 0x1f) as u8) + } + #[doc = "Bits 8:13 - Programmable Burst Lengthe"] + #[inline(always)] + pub fn pbl(&self) -> PblR { + PblR::new(((self.bits >> 8) & 0x3f) as u8) + } + #[doc = "Bits 14:15 - Priority Ratio"] + #[inline(always)] + pub fn pr(&self) -> PrR { + PrR::new(((self.bits >> 14) & 3) as u8) + } + #[doc = "Bit 16 - Fixed Burste"] + #[inline(always)] + pub fn fb(&self) -> FbR { + FbR::new(((self.bits >> 16) & 1) != 0) + } + #[doc = "Bits 17:22 - Rx DMA PBL"] + #[inline(always)] + pub fn rpbl(&self) -> RpblR { + RpblR::new(((self.bits >> 17) & 0x3f) as u8) + } + #[doc = "Bit 23 - Use Separate PBL"] + #[inline(always)] + pub fn usp(&self) -> UspR { + UspR::new(((self.bits >> 23) & 1) != 0) + } + #[doc = "Bit 24 - PBLx8 Mode"] + #[inline(always)] + pub fn pblx8(&self) -> Pblx8R { + Pblx8R::new(((self.bits >> 24) & 1) != 0) + } + #[doc = "Bit 25 - Address-Aligned Beats"] + #[inline(always)] + pub fn aal(&self) -> AalR { + AalR::new(((self.bits >> 25) & 1) != 0) + } + #[doc = "Bit 26 - Mixed Burst"] + #[inline(always)] + pub fn mb(&self) -> MbR { + MbR::new(((self.bits >> 26) & 1) != 0) + } + #[doc = "Bit 27 - Transmit Priority"] + #[inline(always)] + pub fn txpr(&self) -> TxprR { + TxprR::new(((self.bits >> 27) & 1) != 0) + } + #[doc = "Bits 28:29 - Channel Priority Weights"] + #[inline(always)] + pub fn prwg(&self) -> PrwgR { + PrwgR::new(((self.bits >> 28) & 3) as u8) + } + #[doc = "Bit 31 - Rebuild INCRx Burst"] + #[inline(always)] + pub fn rib(&self) -> RibR { + RibR::new(((self.bits >> 31) & 1) != 0) } } impl W { - #[doc = "Bit 31 - Rebuild INCRx Burst"] + #[doc = "Bit 0 - Software Reset (Read, Write Set, and Self Clear)"] #[inline(always)] - pub fn rib(&mut self) -> RIB_W { - RIB_W { w: self } - } - #[doc = "Bits 28:29 - Channel Priority Weights"] - #[inline(always)] - pub fn prwg(&mut self) -> PRWG_W { - PRWG_W { w: self } - } - #[doc = "Bit 27 - Transmit Priority"] - #[inline(always)] - pub fn txpr(&mut self) -> TXPR_W { - TXPR_W { w: self } - } - #[doc = "Bit 26 - Mixed Burst"] - #[inline(always)] - pub fn mb(&mut self) -> MB_W { - MB_W { w: self } - } - #[doc = "Bit 25 - Address-Aligned Beats"] - #[inline(always)] - pub fn aal(&mut self) -> AAL_W { - AAL_W { w: self } - } - #[doc = "Bit 24 - PBLx8 Mode"] - #[inline(always)] - pub fn pblx8(&mut self) -> PBLX8_W { - PBLX8_W { w: self } - } - #[doc = "Bit 23 - Use Separate PBL"] - #[inline(always)] - pub fn usp(&mut self) -> USP_W { - USP_W { w: self } - } - #[doc = "Bits 17:22 - Rx DMA PBL"] - #[inline(always)] - pub fn rpbl(&mut self) -> RPBL_W { - RPBL_W { w: self } - } - #[doc = "Bit 16 - Fixed Burste"] - #[inline(always)] - pub fn fb(&mut self) -> FB_W { - FB_W { w: self } - } - #[doc = "Bits 14:15 - Priority Ratio"] - #[inline(always)] - pub fn pr(&mut self) -> PR_W { - PR_W { w: self } - } - #[doc = "Bits 8:13 - Programmable Burst Lengthe"] - #[inline(always)] - pub fn pbl(&mut self) -> PBL_W { - PBL_W { w: self } - } - #[doc = "Bits 2:6 - Descriptor Skip Length"] - #[inline(always)] - pub fn dsl(&mut self) -> DSL_W { - DSL_W { w: self } + #[must_use] + pub fn swr(&mut self) -> SwrW { + SwrW::new(self, 0) } #[doc = "Bit 1 - DMA Arbitration Scheme"] #[inline(always)] - pub fn da(&mut self) -> DA_W { - DA_W { w: self } + #[must_use] + pub fn da(&mut self) -> DaW { + DaW::new(self, 1) } - #[doc = "Bit 0 - Software Reset (Read, Write Set, and Self Clear)"] + #[doc = "Bits 2:6 - Descriptor Skip Length"] #[inline(always)] - pub fn swr(&mut self) -> SWR_W { - SWR_W { w: self } + #[must_use] + pub fn dsl(&mut self) -> DslW { + DslW::new(self, 2) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 8:13 - Programmable Burst Lengthe"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn pbl(&mut self) -> PblW { + PblW::new(self, 8) + } + #[doc = "Bits 14:15 - Priority Ratio"] + #[inline(always)] + #[must_use] + pub fn pr(&mut self) -> PrW { + PrW::new(self, 14) + } + #[doc = "Bit 16 - Fixed Burste"] + #[inline(always)] + #[must_use] + pub fn fb(&mut self) -> FbW { + FbW::new(self, 16) + } + #[doc = "Bits 17:22 - Rx DMA PBL"] + #[inline(always)] + #[must_use] + pub fn rpbl(&mut self) -> RpblW { + RpblW::new(self, 17) + } + #[doc = "Bit 23 - Use Separate PBL"] + #[inline(always)] + #[must_use] + pub fn usp(&mut self) -> UspW { + UspW::new(self, 23) + } + #[doc = "Bit 24 - PBLx8 Mode"] + #[inline(always)] + #[must_use] + pub fn pblx8(&mut self) -> Pblx8W { + Pblx8W::new(self, 24) + } + #[doc = "Bit 25 - Address-Aligned Beats"] + #[inline(always)] + #[must_use] + pub fn aal(&mut self) -> AalW { + AalW::new(self, 25) + } + #[doc = "Bit 26 - Mixed Burst"] + #[inline(always)] + #[must_use] + pub fn mb(&mut self) -> MbW { + MbW::new(self, 26) + } + #[doc = "Bit 27 - Transmit Priority"] + #[inline(always)] + #[must_use] + pub fn txpr(&mut self) -> TxprW { + TxprW::new(self, 27) + } + #[doc = "Bits 28:29 - Channel Priority Weights"] + #[inline(always)] + #[must_use] + pub fn prwg(&mut self) -> PrwgW { + PrwgW::new(self, 28) + } + #[doc = "Bit 31 - Rebuild INCRx Burst"] + #[inline(always)] + #[must_use] + pub fn rib(&mut self) -> RibW { + RibW::new(self, 31) } } -#[doc = "Controls the DMA Host Interface Mode\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dma_bus_mode](index.html) module"] -pub struct DMA_BUS_MODE_SPEC; -impl crate::RegisterSpec for DMA_BUS_MODE_SPEC { +#[doc = "Controls the DMA Host Interface Mode\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_bus_mode::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_bus_mode::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DmaBusModeSpec; +impl crate::RegisterSpec for DmaBusModeSpec { type Ux = u32; } -#[doc = "`read()` method returns [dma_bus_mode::R](R) reader structure"] -impl crate::Readable for DMA_BUS_MODE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dma_bus_mode::W](W) writer structure"] -impl crate::Writable for DMA_BUS_MODE_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`dma_bus_mode::R`](R) reader structure"] +impl crate::Readable for DmaBusModeSpec {} +#[doc = "`write(|w| ..)` method takes [`dma_bus_mode::W`](W) writer structure"] +impl crate::Writable for DmaBusModeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DMA_BUS_MODE to value 0x0002_0101"] -impl crate::Resettable for DMA_BUS_MODE_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0x0002_0101 - } +impl crate::Resettable for DmaBusModeSpec { + const RESET_VALUE: u32 = 0x0002_0101; } diff --git a/va416xx/src/eth/dma_curr_rx_bufr_addr.rs b/va416xx/src/eth/dma_curr_rx_bufr_addr.rs index dc479e5..7d24d1c 100644 --- a/va416xx/src/eth/dma_curr_rx_bufr_addr.rs +++ b/va416xx/src/eth/dma_curr_rx_bufr_addr.rs @@ -1,103 +1,40 @@ #[doc = "Register `DMA_CURR_RX_BUFR_ADDR` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DMA_CURR_RX_BUFR_ADDR` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CURTBUFAPTR` reader - Cleared on Reset. Pointer updated by the DMA during operation."] -pub struct CURTBUFAPTR_R(crate::FieldReader); -impl CURTBUFAPTR_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - CURTBUFAPTR_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CURTBUFAPTR_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type CurtbufaptrR = crate::FieldReader; #[doc = "Field `CURTBUFAPTR` writer - Cleared on Reset. Pointer updated by the DMA during operation."] -pub struct CURTBUFAPTR_W<'a> { - w: &'a mut W, -} -impl<'a> CURTBUFAPTR_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - self.w.bits = value as u32; - self.w - } -} +pub type CurtbufaptrW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Cleared on Reset. Pointer updated by the DMA during operation."] #[inline(always)] - pub fn curtbufaptr(&self) -> CURTBUFAPTR_R { - CURTBUFAPTR_R::new(self.bits as u32) + pub fn curtbufaptr(&self) -> CurtbufaptrR { + CurtbufaptrR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Cleared on Reset. Pointer updated by the DMA during operation."] #[inline(always)] - pub fn curtbufaptr(&mut self) -> CURTBUFAPTR_W { - CURTBUFAPTR_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn curtbufaptr(&mut self) -> CurtbufaptrW { + CurtbufaptrW::new(self, 0) } } -#[doc = "Contains the current Receive Buffer address read by the DMA\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dma_curr_rx_bufr_addr](index.html) module"] -pub struct DMA_CURR_RX_BUFR_ADDR_SPEC; -impl crate::RegisterSpec for DMA_CURR_RX_BUFR_ADDR_SPEC { +#[doc = "Contains the current Receive Buffer address read by the DMA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_curr_rx_bufr_addr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_curr_rx_bufr_addr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DmaCurrRxBufrAddrSpec; +impl crate::RegisterSpec for DmaCurrRxBufrAddrSpec { type Ux = u32; } -#[doc = "`read()` method returns [dma_curr_rx_bufr_addr::R](R) reader structure"] -impl crate::Readable for DMA_CURR_RX_BUFR_ADDR_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dma_curr_rx_bufr_addr::W](W) writer structure"] -impl crate::Writable for DMA_CURR_RX_BUFR_ADDR_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`dma_curr_rx_bufr_addr::R`](R) reader structure"] +impl crate::Readable for DmaCurrRxBufrAddrSpec {} +#[doc = "`write(|w| ..)` method takes [`dma_curr_rx_bufr_addr::W`](W) writer structure"] +impl crate::Writable for DmaCurrRxBufrAddrSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DMA_CURR_RX_BUFR_ADDR to value 0"] -impl crate::Resettable for DMA_CURR_RX_BUFR_ADDR_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for DmaCurrRxBufrAddrSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/dma_curr_rx_desc.rs b/va416xx/src/eth/dma_curr_rx_desc.rs index be651a6..5eb5692 100644 --- a/va416xx/src/eth/dma_curr_rx_desc.rs +++ b/va416xx/src/eth/dma_curr_rx_desc.rs @@ -1,103 +1,40 @@ #[doc = "Register `DMA_CURR_RX_DESC` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DMA_CURR_RX_DESC` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CURRDESAPTR` reader - Cleared on Reset. Pointer updated by the DMA during operation."] -pub struct CURRDESAPTR_R(crate::FieldReader); -impl CURRDESAPTR_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - CURRDESAPTR_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CURRDESAPTR_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type CurrdesaptrR = crate::FieldReader; #[doc = "Field `CURRDESAPTR` writer - Cleared on Reset. Pointer updated by the DMA during operation."] -pub struct CURRDESAPTR_W<'a> { - w: &'a mut W, -} -impl<'a> CURRDESAPTR_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - self.w.bits = value as u32; - self.w - } -} +pub type CurrdesaptrW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Cleared on Reset. Pointer updated by the DMA during operation."] #[inline(always)] - pub fn currdesaptr(&self) -> CURRDESAPTR_R { - CURRDESAPTR_R::new(self.bits as u32) + pub fn currdesaptr(&self) -> CurrdesaptrR { + CurrdesaptrR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Cleared on Reset. Pointer updated by the DMA during operation."] #[inline(always)] - pub fn currdesaptr(&mut self) -> CURRDESAPTR_W { - CURRDESAPTR_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn currdesaptr(&mut self) -> CurrdesaptrW { + CurrdesaptrW::new(self, 0) } } -#[doc = "Contains the start address of the current Receive Descriptor read by the DMA\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dma_curr_rx_desc](index.html) module"] -pub struct DMA_CURR_RX_DESC_SPEC; -impl crate::RegisterSpec for DMA_CURR_RX_DESC_SPEC { +#[doc = "Contains the start address of the current Receive Descriptor read by the DMA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_curr_rx_desc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_curr_rx_desc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DmaCurrRxDescSpec; +impl crate::RegisterSpec for DmaCurrRxDescSpec { type Ux = u32; } -#[doc = "`read()` method returns [dma_curr_rx_desc::R](R) reader structure"] -impl crate::Readable for DMA_CURR_RX_DESC_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dma_curr_rx_desc::W](W) writer structure"] -impl crate::Writable for DMA_CURR_RX_DESC_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`dma_curr_rx_desc::R`](R) reader structure"] +impl crate::Readable for DmaCurrRxDescSpec {} +#[doc = "`write(|w| ..)` method takes [`dma_curr_rx_desc::W`](W) writer structure"] +impl crate::Writable for DmaCurrRxDescSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DMA_CURR_RX_DESC to value 0"] -impl crate::Resettable for DMA_CURR_RX_DESC_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for DmaCurrRxDescSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/dma_curr_tx_bufr_addr.rs b/va416xx/src/eth/dma_curr_tx_bufr_addr.rs index 0e5a7c7..9734955 100644 --- a/va416xx/src/eth/dma_curr_tx_bufr_addr.rs +++ b/va416xx/src/eth/dma_curr_tx_bufr_addr.rs @@ -1,103 +1,40 @@ #[doc = "Register `DMA_CURR_TX_BUFR_ADDR` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DMA_CURR_TX_BUFR_ADDR` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CURTBUFAPTR` reader - Cleared on Reset. Pointer updated by the DMA during operation."] -pub struct CURTBUFAPTR_R(crate::FieldReader); -impl CURTBUFAPTR_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - CURTBUFAPTR_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CURTBUFAPTR_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type CurtbufaptrR = crate::FieldReader; #[doc = "Field `CURTBUFAPTR` writer - Cleared on Reset. Pointer updated by the DMA during operation."] -pub struct CURTBUFAPTR_W<'a> { - w: &'a mut W, -} -impl<'a> CURTBUFAPTR_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - self.w.bits = value as u32; - self.w - } -} +pub type CurtbufaptrW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Cleared on Reset. Pointer updated by the DMA during operation."] #[inline(always)] - pub fn curtbufaptr(&self) -> CURTBUFAPTR_R { - CURTBUFAPTR_R::new(self.bits as u32) + pub fn curtbufaptr(&self) -> CurtbufaptrR { + CurtbufaptrR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Cleared on Reset. Pointer updated by the DMA during operation."] #[inline(always)] - pub fn curtbufaptr(&mut self) -> CURTBUFAPTR_W { - CURTBUFAPTR_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn curtbufaptr(&mut self) -> CurtbufaptrW { + CurtbufaptrW::new(self, 0) } } -#[doc = "Contains the start address of the current Receive Descriptor read by the DMA\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dma_curr_tx_bufr_addr](index.html) module"] -pub struct DMA_CURR_TX_BUFR_ADDR_SPEC; -impl crate::RegisterSpec for DMA_CURR_TX_BUFR_ADDR_SPEC { +#[doc = "Contains the start address of the current Receive Descriptor read by the DMA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_curr_tx_bufr_addr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_curr_tx_bufr_addr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DmaCurrTxBufrAddrSpec; +impl crate::RegisterSpec for DmaCurrTxBufrAddrSpec { type Ux = u32; } -#[doc = "`read()` method returns [dma_curr_tx_bufr_addr::R](R) reader structure"] -impl crate::Readable for DMA_CURR_TX_BUFR_ADDR_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dma_curr_tx_bufr_addr::W](W) writer structure"] -impl crate::Writable for DMA_CURR_TX_BUFR_ADDR_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`dma_curr_tx_bufr_addr::R`](R) reader structure"] +impl crate::Readable for DmaCurrTxBufrAddrSpec {} +#[doc = "`write(|w| ..)` method takes [`dma_curr_tx_bufr_addr::W`](W) writer structure"] +impl crate::Writable for DmaCurrTxBufrAddrSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DMA_CURR_TX_BUFR_ADDR to value 0"] -impl crate::Resettable for DMA_CURR_TX_BUFR_ADDR_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for DmaCurrTxBufrAddrSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/dma_curr_tx_desc.rs b/va416xx/src/eth/dma_curr_tx_desc.rs index 358b2dd..940e775 100644 --- a/va416xx/src/eth/dma_curr_tx_desc.rs +++ b/va416xx/src/eth/dma_curr_tx_desc.rs @@ -1,103 +1,40 @@ #[doc = "Register `DMA_CURR_TX_DESC` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DMA_CURR_TX_DESC` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CURTDESAPTR` reader - Cleared on Reset. Pointer updated by the DMA during operation."] -pub struct CURTDESAPTR_R(crate::FieldReader); -impl CURTDESAPTR_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - CURTDESAPTR_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CURTDESAPTR_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type CurtdesaptrR = crate::FieldReader; #[doc = "Field `CURTDESAPTR` writer - Cleared on Reset. Pointer updated by the DMA during operation."] -pub struct CURTDESAPTR_W<'a> { - w: &'a mut W, -} -impl<'a> CURTDESAPTR_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - self.w.bits = value as u32; - self.w - } -} +pub type CurtdesaptrW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Cleared on Reset. Pointer updated by the DMA during operation."] #[inline(always)] - pub fn curtdesaptr(&self) -> CURTDESAPTR_R { - CURTDESAPTR_R::new(self.bits as u32) + pub fn curtdesaptr(&self) -> CurtdesaptrR { + CurtdesaptrR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Cleared on Reset. Pointer updated by the DMA during operation."] #[inline(always)] - pub fn curtdesaptr(&mut self) -> CURTDESAPTR_W { - CURTDESAPTR_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn curtdesaptr(&mut self) -> CurtdesaptrW { + CurtdesaptrW::new(self, 0) } } -#[doc = "Contains the start address of the current Transmit Descriptor read by the DMA\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dma_curr_tx_desc](index.html) module"] -pub struct DMA_CURR_TX_DESC_SPEC; -impl crate::RegisterSpec for DMA_CURR_TX_DESC_SPEC { +#[doc = "Contains the start address of the current Transmit Descriptor read by the DMA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_curr_tx_desc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_curr_tx_desc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DmaCurrTxDescSpec; +impl crate::RegisterSpec for DmaCurrTxDescSpec { type Ux = u32; } -#[doc = "`read()` method returns [dma_curr_tx_desc::R](R) reader structure"] -impl crate::Readable for DMA_CURR_TX_DESC_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dma_curr_tx_desc::W](W) writer structure"] -impl crate::Writable for DMA_CURR_TX_DESC_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`dma_curr_tx_desc::R`](R) reader structure"] +impl crate::Readable for DmaCurrTxDescSpec {} +#[doc = "`write(|w| ..)` method takes [`dma_curr_tx_desc::W`](W) writer structure"] +impl crate::Writable for DmaCurrTxDescSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DMA_CURR_TX_DESC to value 0"] -impl crate::Resettable for DMA_CURR_TX_DESC_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for DmaCurrTxDescSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/dma_intr_en.rs b/va416xx/src/eth/dma_intr_en.rs index 67a3818..ae6834d 100644 --- a/va416xx/src/eth/dma_intr_en.rs +++ b/va416xx/src/eth/dma_intr_en.rs @@ -1,771 +1,250 @@ #[doc = "Register `DMA_INTR_EN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DMA_INTR_EN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `NIE` reader - Normal Interrupt Summary Enable"] -pub struct NIE_R(crate::FieldReader); -impl NIE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - NIE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for NIE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `NIE` writer - Normal Interrupt Summary Enable"] -pub struct NIE_W<'a> { - w: &'a mut W, -} -impl<'a> NIE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16); - self.w - } -} -#[doc = "Field `AIE` reader - Abnormal Interrupt Summary Enable"] -pub struct AIE_R(crate::FieldReader); -impl AIE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - AIE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for AIE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `AIE` writer - Abnormal Interrupt Summary Enable"] -pub struct AIE_W<'a> { - w: &'a mut W, -} -impl<'a> AIE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); - self.w - } -} -#[doc = "Field `ERE` reader - Early Receive Interrupt Enable"] -pub struct ERE_R(crate::FieldReader); -impl ERE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - ERE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ERE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `ERE` writer - Early Receive Interrupt Enable"] -pub struct ERE_W<'a> { - w: &'a mut W, -} -impl<'a> ERE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); - self.w - } -} -#[doc = "Field `FBE` reader - Fatal Bus Error Enable"] -pub struct FBE_R(crate::FieldReader); -impl FBE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - FBE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for FBE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `FBE` writer - Fatal Bus Error Enable"] -pub struct FBE_W<'a> { - w: &'a mut W, -} -impl<'a> FBE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); - self.w - } -} -#[doc = "Field `ETE` reader - Early Transmit Interrupt Enable"] -pub struct ETE_R(crate::FieldReader); -impl ETE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - ETE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ETE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `ETE` writer - Early Transmit Interrupt Enable"] -pub struct ETE_W<'a> { - w: &'a mut W, -} -impl<'a> ETE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); - self.w - } -} -#[doc = "Field `RWE` reader - Receive Watchdog Timeout Enable"] -pub struct RWE_R(crate::FieldReader); -impl RWE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RWE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RWE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RWE` writer - Receive Watchdog Timeout Enable"] -pub struct RWE_W<'a> { - w: &'a mut W, -} -impl<'a> RWE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); - self.w - } -} -#[doc = "Field `RSE` reader - Receive Stopped Enable"] -pub struct RSE_R(crate::FieldReader); -impl RSE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RSE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RSE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RSE` writer - Receive Stopped Enable"] -pub struct RSE_W<'a> { - w: &'a mut W, -} -impl<'a> RSE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); - self.w - } -} -#[doc = "Field `RUE` reader - Receive Buffer Unavailable Enable"] -pub struct RUE_R(crate::FieldReader); -impl RUE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RUE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RUE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RUE` writer - Receive Buffer Unavailable Enable"] -pub struct RUE_W<'a> { - w: &'a mut W, -} -impl<'a> RUE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); - self.w - } -} -#[doc = "Field `RIE` reader - Receive Interrupt Enable"] -pub struct RIE_R(crate::FieldReader); -impl RIE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RIE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RIE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RIE` writer - Receive Interrupt Enable"] -pub struct RIE_W<'a> { - w: &'a mut W, -} -impl<'a> RIE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); - self.w - } -} -#[doc = "Field `UNE` reader - Underflow Interrupt Enable"] -pub struct UNE_R(crate::FieldReader); -impl UNE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - UNE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for UNE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `UNE` writer - Underflow Interrupt Enable"] -pub struct UNE_W<'a> { - w: &'a mut W, -} -impl<'a> UNE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); - self.w - } -} -#[doc = "Field `OVE` reader - Overflow Interrupt Enable"] -pub struct OVE_R(crate::FieldReader); -impl OVE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - OVE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for OVE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `OVE` writer - Overflow Interrupt Enable"] -pub struct OVE_W<'a> { - w: &'a mut W, -} -impl<'a> OVE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); - self.w - } -} -#[doc = "Field `THE` reader - Transmit Jabber Timeout Enable"] -pub struct THE_R(crate::FieldReader); -impl THE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - THE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for THE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `THE` writer - Transmit Jabber Timeout Enable"] -pub struct THE_W<'a> { - w: &'a mut W, -} -impl<'a> THE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); - self.w - } -} -#[doc = "Field `TUE` reader - Transmit Buffer Unavailable Enable"] -pub struct TUE_R(crate::FieldReader); -impl TUE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TUE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TUE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TUE` writer - Transmit Buffer Unavailable Enable"] -pub struct TUE_W<'a> { - w: &'a mut W, -} -impl<'a> TUE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); - self.w - } -} -#[doc = "Field `TSE` reader - Transmit Stopped Enable"] -pub struct TSE_R(crate::FieldReader); -impl TSE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TSE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TSE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TSE` writer - Transmit Stopped Enable"] -pub struct TSE_W<'a> { - w: &'a mut W, -} -impl<'a> TSE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); - self.w - } -} +pub type W = crate::W; #[doc = "Field `TIE` reader - Transmit Interrupt Enable"] -pub struct TIE_R(crate::FieldReader); -impl TIE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TIE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TIE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type TieR = crate::BitReader; #[doc = "Field `TIE` writer - Transmit Interrupt Enable"] -pub struct TIE_W<'a> { - w: &'a mut W, -} -impl<'a> TIE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} +pub type TieW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TSE` reader - Transmit Stopped Enable"] +pub type TseR = crate::BitReader; +#[doc = "Field `TSE` writer - Transmit Stopped Enable"] +pub type TseW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TUE` reader - Transmit Buffer Unavailable Enable"] +pub type TueR = crate::BitReader; +#[doc = "Field `TUE` writer - Transmit Buffer Unavailable Enable"] +pub type TueW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `THE` reader - Transmit Jabber Timeout Enable"] +pub type TheR = crate::BitReader; +#[doc = "Field `THE` writer - Transmit Jabber Timeout Enable"] +pub type TheW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `OVE` reader - Overflow Interrupt Enable"] +pub type OveR = crate::BitReader; +#[doc = "Field `OVE` writer - Overflow Interrupt Enable"] +pub type OveW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `UNE` reader - Underflow Interrupt Enable"] +pub type UneR = crate::BitReader; +#[doc = "Field `UNE` writer - Underflow Interrupt Enable"] +pub type UneW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `RIE` reader - Receive Interrupt Enable"] +pub type RieR = crate::BitReader; +#[doc = "Field `RIE` writer - Receive Interrupt Enable"] +pub type RieW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `RUE` reader - Receive Buffer Unavailable Enable"] +pub type RueR = crate::BitReader; +#[doc = "Field `RUE` writer - Receive Buffer Unavailable Enable"] +pub type RueW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `RSE` reader - Receive Stopped Enable"] +pub type RseR = crate::BitReader; +#[doc = "Field `RSE` writer - Receive Stopped Enable"] +pub type RseW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `RWE` reader - Receive Watchdog Timeout Enable"] +pub type RweR = crate::BitReader; +#[doc = "Field `RWE` writer - Receive Watchdog Timeout Enable"] +pub type RweW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `ETE` reader - Early Transmit Interrupt Enable"] +pub type EteR = crate::BitReader; +#[doc = "Field `ETE` writer - Early Transmit Interrupt Enable"] +pub type EteW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `FBE` reader - Fatal Bus Error Enable"] +pub type FbeR = crate::BitReader; +#[doc = "Field `FBE` writer - Fatal Bus Error Enable"] +pub type FbeW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `ERE` reader - Early Receive Interrupt Enable"] +pub type EreR = crate::BitReader; +#[doc = "Field `ERE` writer - Early Receive Interrupt Enable"] +pub type EreW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `AIE` reader - Abnormal Interrupt Summary Enable"] +pub type AieR = crate::BitReader; +#[doc = "Field `AIE` writer - Abnormal Interrupt Summary Enable"] +pub type AieW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `NIE` reader - Normal Interrupt Summary Enable"] +pub type NieR = crate::BitReader; +#[doc = "Field `NIE` writer - Normal Interrupt Summary Enable"] +pub type NieW<'a, REG> = crate::BitWriter<'a, REG>; impl R { - #[doc = "Bit 16 - Normal Interrupt Summary Enable"] + #[doc = "Bit 0 - Transmit Interrupt Enable"] #[inline(always)] - pub fn nie(&self) -> NIE_R { - NIE_R::new(((self.bits >> 16) & 0x01) != 0) - } - #[doc = "Bit 15 - Abnormal Interrupt Summary Enable"] - #[inline(always)] - pub fn aie(&self) -> AIE_R { - AIE_R::new(((self.bits >> 15) & 0x01) != 0) - } - #[doc = "Bit 14 - Early Receive Interrupt Enable"] - #[inline(always)] - pub fn ere(&self) -> ERE_R { - ERE_R::new(((self.bits >> 14) & 0x01) != 0) - } - #[doc = "Bit 13 - Fatal Bus Error Enable"] - #[inline(always)] - pub fn fbe(&self) -> FBE_R { - FBE_R::new(((self.bits >> 13) & 0x01) != 0) - } - #[doc = "Bit 10 - Early Transmit Interrupt Enable"] - #[inline(always)] - pub fn ete(&self) -> ETE_R { - ETE_R::new(((self.bits >> 10) & 0x01) != 0) - } - #[doc = "Bit 9 - Receive Watchdog Timeout Enable"] - #[inline(always)] - pub fn rwe(&self) -> RWE_R { - RWE_R::new(((self.bits >> 9) & 0x01) != 0) - } - #[doc = "Bit 8 - Receive Stopped Enable"] - #[inline(always)] - pub fn rse(&self) -> RSE_R { - RSE_R::new(((self.bits >> 8) & 0x01) != 0) - } - #[doc = "Bit 7 - Receive Buffer Unavailable Enable"] - #[inline(always)] - pub fn rue(&self) -> RUE_R { - RUE_R::new(((self.bits >> 7) & 0x01) != 0) - } - #[doc = "Bit 6 - Receive Interrupt Enable"] - #[inline(always)] - pub fn rie(&self) -> RIE_R { - RIE_R::new(((self.bits >> 6) & 0x01) != 0) - } - #[doc = "Bit 5 - Underflow Interrupt Enable"] - #[inline(always)] - pub fn une(&self) -> UNE_R { - UNE_R::new(((self.bits >> 5) & 0x01) != 0) - } - #[doc = "Bit 4 - Overflow Interrupt Enable"] - #[inline(always)] - pub fn ove(&self) -> OVE_R { - OVE_R::new(((self.bits >> 4) & 0x01) != 0) - } - #[doc = "Bit 3 - Transmit Jabber Timeout Enable"] - #[inline(always)] - pub fn the(&self) -> THE_R { - THE_R::new(((self.bits >> 3) & 0x01) != 0) - } - #[doc = "Bit 2 - Transmit Buffer Unavailable Enable"] - #[inline(always)] - pub fn tue(&self) -> TUE_R { - TUE_R::new(((self.bits >> 2) & 0x01) != 0) + pub fn tie(&self) -> TieR { + TieR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Transmit Stopped Enable"] #[inline(always)] - pub fn tse(&self) -> TSE_R { - TSE_R::new(((self.bits >> 1) & 0x01) != 0) + pub fn tse(&self) -> TseR { + TseR::new(((self.bits >> 1) & 1) != 0) } - #[doc = "Bit 0 - Transmit Interrupt Enable"] + #[doc = "Bit 2 - Transmit Buffer Unavailable Enable"] #[inline(always)] - pub fn tie(&self) -> TIE_R { - TIE_R::new((self.bits & 0x01) != 0) + pub fn tue(&self) -> TueR { + TueR::new(((self.bits >> 2) & 1) != 0) + } + #[doc = "Bit 3 - Transmit Jabber Timeout Enable"] + #[inline(always)] + pub fn the(&self) -> TheR { + TheR::new(((self.bits >> 3) & 1) != 0) + } + #[doc = "Bit 4 - Overflow Interrupt Enable"] + #[inline(always)] + pub fn ove(&self) -> OveR { + OveR::new(((self.bits >> 4) & 1) != 0) + } + #[doc = "Bit 5 - Underflow Interrupt Enable"] + #[inline(always)] + pub fn une(&self) -> UneR { + UneR::new(((self.bits >> 5) & 1) != 0) + } + #[doc = "Bit 6 - Receive Interrupt Enable"] + #[inline(always)] + pub fn rie(&self) -> RieR { + RieR::new(((self.bits >> 6) & 1) != 0) + } + #[doc = "Bit 7 - Receive Buffer Unavailable Enable"] + #[inline(always)] + pub fn rue(&self) -> RueR { + RueR::new(((self.bits >> 7) & 1) != 0) + } + #[doc = "Bit 8 - Receive Stopped Enable"] + #[inline(always)] + pub fn rse(&self) -> RseR { + RseR::new(((self.bits >> 8) & 1) != 0) + } + #[doc = "Bit 9 - Receive Watchdog Timeout Enable"] + #[inline(always)] + pub fn rwe(&self) -> RweR { + RweR::new(((self.bits >> 9) & 1) != 0) + } + #[doc = "Bit 10 - Early Transmit Interrupt Enable"] + #[inline(always)] + pub fn ete(&self) -> EteR { + EteR::new(((self.bits >> 10) & 1) != 0) + } + #[doc = "Bit 13 - Fatal Bus Error Enable"] + #[inline(always)] + pub fn fbe(&self) -> FbeR { + FbeR::new(((self.bits >> 13) & 1) != 0) + } + #[doc = "Bit 14 - Early Receive Interrupt Enable"] + #[inline(always)] + pub fn ere(&self) -> EreR { + EreR::new(((self.bits >> 14) & 1) != 0) + } + #[doc = "Bit 15 - Abnormal Interrupt Summary Enable"] + #[inline(always)] + pub fn aie(&self) -> AieR { + AieR::new(((self.bits >> 15) & 1) != 0) + } + #[doc = "Bit 16 - Normal Interrupt Summary Enable"] + #[inline(always)] + pub fn nie(&self) -> NieR { + NieR::new(((self.bits >> 16) & 1) != 0) } } impl W { - #[doc = "Bit 16 - Normal Interrupt Summary Enable"] + #[doc = "Bit 0 - Transmit Interrupt Enable"] #[inline(always)] - pub fn nie(&mut self) -> NIE_W { - NIE_W { w: self } - } - #[doc = "Bit 15 - Abnormal Interrupt Summary Enable"] - #[inline(always)] - pub fn aie(&mut self) -> AIE_W { - AIE_W { w: self } - } - #[doc = "Bit 14 - Early Receive Interrupt Enable"] - #[inline(always)] - pub fn ere(&mut self) -> ERE_W { - ERE_W { w: self } - } - #[doc = "Bit 13 - Fatal Bus Error Enable"] - #[inline(always)] - pub fn fbe(&mut self) -> FBE_W { - FBE_W { w: self } - } - #[doc = "Bit 10 - Early Transmit Interrupt Enable"] - #[inline(always)] - pub fn ete(&mut self) -> ETE_W { - ETE_W { w: self } - } - #[doc = "Bit 9 - Receive Watchdog Timeout Enable"] - #[inline(always)] - pub fn rwe(&mut self) -> RWE_W { - RWE_W { w: self } - } - #[doc = "Bit 8 - Receive Stopped Enable"] - #[inline(always)] - pub fn rse(&mut self) -> RSE_W { - RSE_W { w: self } - } - #[doc = "Bit 7 - Receive Buffer Unavailable Enable"] - #[inline(always)] - pub fn rue(&mut self) -> RUE_W { - RUE_W { w: self } - } - #[doc = "Bit 6 - Receive Interrupt Enable"] - #[inline(always)] - pub fn rie(&mut self) -> RIE_W { - RIE_W { w: self } - } - #[doc = "Bit 5 - Underflow Interrupt Enable"] - #[inline(always)] - pub fn une(&mut self) -> UNE_W { - UNE_W { w: self } - } - #[doc = "Bit 4 - Overflow Interrupt Enable"] - #[inline(always)] - pub fn ove(&mut self) -> OVE_W { - OVE_W { w: self } - } - #[doc = "Bit 3 - Transmit Jabber Timeout Enable"] - #[inline(always)] - pub fn the(&mut self) -> THE_W { - THE_W { w: self } - } - #[doc = "Bit 2 - Transmit Buffer Unavailable Enable"] - #[inline(always)] - pub fn tue(&mut self) -> TUE_W { - TUE_W { w: self } + #[must_use] + pub fn tie(&mut self) -> TieW { + TieW::new(self, 0) } #[doc = "Bit 1 - Transmit Stopped Enable"] #[inline(always)] - pub fn tse(&mut self) -> TSE_W { - TSE_W { w: self } + #[must_use] + pub fn tse(&mut self) -> TseW { + TseW::new(self, 1) } - #[doc = "Bit 0 - Transmit Interrupt Enable"] + #[doc = "Bit 2 - Transmit Buffer Unavailable Enable"] #[inline(always)] - pub fn tie(&mut self) -> TIE_W { - TIE_W { w: self } + #[must_use] + pub fn tue(&mut self) -> TueW { + TueW::new(self, 2) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bit 3 - Transmit Jabber Timeout Enable"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn the(&mut self) -> TheW { + TheW::new(self, 3) + } + #[doc = "Bit 4 - Overflow Interrupt Enable"] + #[inline(always)] + #[must_use] + pub fn ove(&mut self) -> OveW { + OveW::new(self, 4) + } + #[doc = "Bit 5 - Underflow Interrupt Enable"] + #[inline(always)] + #[must_use] + pub fn une(&mut self) -> UneW { + UneW::new(self, 5) + } + #[doc = "Bit 6 - Receive Interrupt Enable"] + #[inline(always)] + #[must_use] + pub fn rie(&mut self) -> RieW { + RieW::new(self, 6) + } + #[doc = "Bit 7 - Receive Buffer Unavailable Enable"] + #[inline(always)] + #[must_use] + pub fn rue(&mut self) -> RueW { + RueW::new(self, 7) + } + #[doc = "Bit 8 - Receive Stopped Enable"] + #[inline(always)] + #[must_use] + pub fn rse(&mut self) -> RseW { + RseW::new(self, 8) + } + #[doc = "Bit 9 - Receive Watchdog Timeout Enable"] + #[inline(always)] + #[must_use] + pub fn rwe(&mut self) -> RweW { + RweW::new(self, 9) + } + #[doc = "Bit 10 - Early Transmit Interrupt Enable"] + #[inline(always)] + #[must_use] + pub fn ete(&mut self) -> EteW { + EteW::new(self, 10) + } + #[doc = "Bit 13 - Fatal Bus Error Enable"] + #[inline(always)] + #[must_use] + pub fn fbe(&mut self) -> FbeW { + FbeW::new(self, 13) + } + #[doc = "Bit 14 - Early Receive Interrupt Enable"] + #[inline(always)] + #[must_use] + pub fn ere(&mut self) -> EreW { + EreW::new(self, 14) + } + #[doc = "Bit 15 - Abnormal Interrupt Summary Enable"] + #[inline(always)] + #[must_use] + pub fn aie(&mut self) -> AieW { + AieW::new(self, 15) + } + #[doc = "Bit 16 - Normal Interrupt Summary Enable"] + #[inline(always)] + #[must_use] + pub fn nie(&mut self) -> NieW { + NieW::new(self, 16) } } -#[doc = "Enables the interrupts reported in the status register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dma_intr_en](index.html) module"] -pub struct DMA_INTR_EN_SPEC; -impl crate::RegisterSpec for DMA_INTR_EN_SPEC { +#[doc = "Enables the interrupts reported in the status register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_intr_en::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_intr_en::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DmaIntrEnSpec; +impl crate::RegisterSpec for DmaIntrEnSpec { type Ux = u32; } -#[doc = "`read()` method returns [dma_intr_en::R](R) reader structure"] -impl crate::Readable for DMA_INTR_EN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dma_intr_en::W](W) writer structure"] -impl crate::Writable for DMA_INTR_EN_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`dma_intr_en::R`](R) reader structure"] +impl crate::Readable for DmaIntrEnSpec {} +#[doc = "`write(|w| ..)` method takes [`dma_intr_en::W`](W) writer structure"] +impl crate::Writable for DmaIntrEnSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DMA_INTR_EN to value 0"] -impl crate::Resettable for DMA_INTR_EN_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for DmaIntrEnSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/dma_miss_over_counter.rs b/va416xx/src/eth/dma_miss_over_counter.rs index 5b435bb..14f5065 100644 --- a/va416xx/src/eth/dma_miss_over_counter.rs +++ b/va416xx/src/eth/dma_miss_over_counter.rs @@ -1,234 +1,85 @@ #[doc = "Register `DMA_MISS_OVER_COUNTER` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DMA_MISS_OVER_COUNTER` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `OVFCNTOVF` reader - This bit is set every time the Overflow Frame Counter (Bits\\[27:17\\])overflows"] -pub struct OVFCNTOVF_R(crate::FieldReader); -impl OVFCNTOVF_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - OVFCNTOVF_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for OVFCNTOVF_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `OVFCNTOVF` writer - This bit is set every time the Overflow Frame Counter (Bits\\[27:17\\])overflows"] -pub struct OVFCNTOVF_W<'a> { - w: &'a mut W, -} -impl<'a> OVFCNTOVF_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 28)) | ((value as u32 & 0x01) << 28); - self.w - } -} -#[doc = "Field `OVFFRMCNT` reader - This field indicates the number of frames missed by the application"] -pub struct OVFFRMCNT_R(crate::FieldReader); -impl OVFFRMCNT_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - OVFFRMCNT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for OVFFRMCNT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `OVFFRMCNT` writer - This field indicates the number of frames missed by the application"] -pub struct OVFFRMCNT_W<'a> { - w: &'a mut W, -} -impl<'a> OVFFRMCNT_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x07ff << 17)) | ((value as u32 & 0x07ff) << 17); - self.w - } -} -#[doc = "Field `MISCNTOVF` reader - This bit is set every time Missed Frame Counter (Bits\\[15:0\\]) overflows"] -pub struct MISCNTOVF_R(crate::FieldReader); -impl MISCNTOVF_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - MISCNTOVF_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for MISCNTOVF_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `MISCNTOVF` writer - This bit is set every time Missed Frame Counter (Bits\\[15:0\\]) overflows"] -pub struct MISCNTOVF_W<'a> { - w: &'a mut W, -} -impl<'a> MISCNTOVF_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16); - self.w - } -} +pub type W = crate::W; #[doc = "Field `MISFRMCNT` reader - This field indicates the number of frames missed by the controller because of the Host Receive Buffer being unavailable."] -pub struct MISFRMCNT_R(crate::FieldReader); -impl MISFRMCNT_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - MISFRMCNT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for MISFRMCNT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type MisfrmcntR = crate::FieldReader; #[doc = "Field `MISFRMCNT` writer - This field indicates the number of frames missed by the controller because of the Host Receive Buffer being unavailable."] -pub struct MISFRMCNT_W<'a> { - w: &'a mut W, -} -impl<'a> MISFRMCNT_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); - self.w - } -} +pub type MisfrmcntW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +#[doc = "Field `MISCNTOVF` reader - This bit is set every time Missed Frame Counter (Bits\\[15:0\\]) overflows"] +pub type MiscntovfR = crate::BitReader; +#[doc = "Field `MISCNTOVF` writer - This bit is set every time Missed Frame Counter (Bits\\[15:0\\]) overflows"] +pub type MiscntovfW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `OVFFRMCNT` reader - This field indicates the number of frames missed by the application"] +pub type OvffrmcntR = crate::FieldReader; +#[doc = "Field `OVFFRMCNT` writer - This field indicates the number of frames missed by the application"] +pub type OvffrmcntW<'a, REG> = crate::FieldWriter<'a, REG, 11, u16>; +#[doc = "Field `OVFCNTOVF` reader - This bit is set every time the Overflow Frame Counter (Bits\\[27:17\\])overflows"] +pub type OvfcntovfR = crate::BitReader; +#[doc = "Field `OVFCNTOVF` writer - This bit is set every time the Overflow Frame Counter (Bits\\[27:17\\])overflows"] +pub type OvfcntovfW<'a, REG> = crate::BitWriter<'a, REG>; impl R { - #[doc = "Bit 28 - This bit is set every time the Overflow Frame Counter (Bits\\[27:17\\])overflows"] + #[doc = "Bits 0:15 - This field indicates the number of frames missed by the controller because of the Host Receive Buffer being unavailable."] #[inline(always)] - pub fn ovfcntovf(&self) -> OVFCNTOVF_R { - OVFCNTOVF_R::new(((self.bits >> 28) & 0x01) != 0) - } - #[doc = "Bits 17:27 - This field indicates the number of frames missed by the application"] - #[inline(always)] - pub fn ovffrmcnt(&self) -> OVFFRMCNT_R { - OVFFRMCNT_R::new(((self.bits >> 17) & 0x07ff) as u16) + pub fn misfrmcnt(&self) -> MisfrmcntR { + MisfrmcntR::new((self.bits & 0xffff) as u16) } #[doc = "Bit 16 - This bit is set every time Missed Frame Counter (Bits\\[15:0\\]) overflows"] #[inline(always)] - pub fn miscntovf(&self) -> MISCNTOVF_R { - MISCNTOVF_R::new(((self.bits >> 16) & 0x01) != 0) + pub fn miscntovf(&self) -> MiscntovfR { + MiscntovfR::new(((self.bits >> 16) & 1) != 0) } - #[doc = "Bits 0:15 - This field indicates the number of frames missed by the controller because of the Host Receive Buffer being unavailable."] + #[doc = "Bits 17:27 - This field indicates the number of frames missed by the application"] #[inline(always)] - pub fn misfrmcnt(&self) -> MISFRMCNT_R { - MISFRMCNT_R::new((self.bits & 0xffff) as u16) + pub fn ovffrmcnt(&self) -> OvffrmcntR { + OvffrmcntR::new(((self.bits >> 17) & 0x07ff) as u16) + } + #[doc = "Bit 28 - This bit is set every time the Overflow Frame Counter (Bits\\[27:17\\])overflows"] + #[inline(always)] + pub fn ovfcntovf(&self) -> OvfcntovfR { + OvfcntovfR::new(((self.bits >> 28) & 1) != 0) } } impl W { - #[doc = "Bit 28 - This bit is set every time the Overflow Frame Counter (Bits\\[27:17\\])overflows"] + #[doc = "Bits 0:15 - This field indicates the number of frames missed by the controller because of the Host Receive Buffer being unavailable."] #[inline(always)] - pub fn ovfcntovf(&mut self) -> OVFCNTOVF_W { - OVFCNTOVF_W { w: self } - } - #[doc = "Bits 17:27 - This field indicates the number of frames missed by the application"] - #[inline(always)] - pub fn ovffrmcnt(&mut self) -> OVFFRMCNT_W { - OVFFRMCNT_W { w: self } + #[must_use] + pub fn misfrmcnt(&mut self) -> MisfrmcntW { + MisfrmcntW::new(self, 0) } #[doc = "Bit 16 - This bit is set every time Missed Frame Counter (Bits\\[15:0\\]) overflows"] #[inline(always)] - pub fn miscntovf(&mut self) -> MISCNTOVF_W { - MISCNTOVF_W { w: self } + #[must_use] + pub fn miscntovf(&mut self) -> MiscntovfW { + MiscntovfW::new(self, 16) } - #[doc = "Bits 0:15 - This field indicates the number of frames missed by the controller because of the Host Receive Buffer being unavailable."] + #[doc = "Bits 17:27 - This field indicates the number of frames missed by the application"] #[inline(always)] - pub fn misfrmcnt(&mut self) -> MISFRMCNT_W { - MISFRMCNT_W { w: self } + #[must_use] + pub fn ovffrmcnt(&mut self) -> OvffrmcntW { + OvffrmcntW::new(self, 17) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bit 28 - This bit is set every time the Overflow Frame Counter (Bits\\[27:17\\])overflows"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn ovfcntovf(&mut self) -> OvfcntovfW { + OvfcntovfW::new(self, 28) } } -#[doc = "Contains the counters for discarded frames because no Receive Descriptor is available\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dma_miss_over_counter](index.html) module"] -pub struct DMA_MISS_OVER_COUNTER_SPEC; -impl crate::RegisterSpec for DMA_MISS_OVER_COUNTER_SPEC { +#[doc = "Contains the counters for discarded frames because no Receive Descriptor is available\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_miss_over_counter::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_miss_over_counter::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DmaMissOverCounterSpec; +impl crate::RegisterSpec for DmaMissOverCounterSpec { type Ux = u32; } -#[doc = "`read()` method returns [dma_miss_over_counter::R](R) reader structure"] -impl crate::Readable for DMA_MISS_OVER_COUNTER_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dma_miss_over_counter::W](W) writer structure"] -impl crate::Writable for DMA_MISS_OVER_COUNTER_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`dma_miss_over_counter::R`](R) reader structure"] +impl crate::Readable for DmaMissOverCounterSpec {} +#[doc = "`write(|w| ..)` method takes [`dma_miss_over_counter::W`](W) writer structure"] +impl crate::Writable for DmaMissOverCounterSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DMA_MISS_OVER_COUNTER to value 0"] -impl crate::Resettable for DMA_MISS_OVER_COUNTER_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for DmaMissOverCounterSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/dma_oper_mode.rs b/va416xx/src/eth/dma_oper_mode.rs index f1c57c6..8830bd5 100644 --- a/va416xx/src/eth/dma_oper_mode.rs +++ b/va416xx/src/eth/dma_oper_mode.rs @@ -1,731 +1,250 @@ #[doc = "Register `DMA_OPER_MODE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DMA_OPER_MODE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `DT` reader - Disable Dropping of TCP/IP Checksum Error Frames"] -pub struct DT_R(crate::FieldReader); -impl DT_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - DT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for DT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `DT` writer - Disable Dropping of TCP/IP Checksum Error Frames"] -pub struct DT_W<'a> { - w: &'a mut W, -} -impl<'a> DT_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 26)) | ((value as u32 & 0x01) << 26); - self.w - } -} -#[doc = "Field `RSF` reader - Receive Store and Forward"] -pub struct RSF_R(crate::FieldReader); -impl RSF_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RSF_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RSF_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RSF` writer - Receive Store and Forward"] -pub struct RSF_W<'a> { - w: &'a mut W, -} -impl<'a> RSF_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 25)) | ((value as u32 & 0x01) << 25); - self.w - } -} -#[doc = "Field `DFF` reader - Disable Flushing of Received Frames"] -pub struct DFF_R(crate::FieldReader); -impl DFF_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - DFF_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for DFF_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `DFF` writer - Disable Flushing of Received Frames"] -pub struct DFF_W<'a> { - w: &'a mut W, -} -impl<'a> DFF_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 24)) | ((value as u32 & 0x01) << 24); - self.w - } -} -#[doc = "Field `TSF` reader - Transmit Store and Forward"] -pub struct TSF_R(crate::FieldReader); -impl TSF_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TSF_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TSF_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TSF` writer - Transmit Store and Forward"] -pub struct TSF_W<'a> { - w: &'a mut W, -} -impl<'a> TSF_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 21)) | ((value as u32 & 0x01) << 21); - self.w - } -} -#[doc = "Field `FTF` reader - Flush Transmit FIFO"] -pub struct FTF_R(crate::FieldReader); -impl FTF_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - FTF_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for FTF_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `FTF` writer - Flush Transmit FIFO"] -pub struct FTF_W<'a> { - w: &'a mut W, -} -impl<'a> FTF_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 20)) | ((value as u32 & 0x01) << 20); - self.w - } -} -#[doc = "Field `TTC` reader - Transmit Threshold Control"] -pub struct TTC_R(crate::FieldReader); -impl TTC_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - TTC_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TTC_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TTC` writer - Transmit Threshold Control"] -pub struct TTC_W<'a> { - w: &'a mut W, -} -impl<'a> TTC_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x07 << 14)) | ((value as u32 & 0x07) << 14); - self.w - } -} -#[doc = "Field `ST` reader - Start or Stop Transmission Command"] -pub struct ST_R(crate::FieldReader); -impl ST_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - ST_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ST_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `ST` writer - Start or Stop Transmission Command"] -pub struct ST_W<'a> { - w: &'a mut W, -} -impl<'a> ST_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); - self.w - } -} -#[doc = "Field `RFD` reader - Threshold for Deactivating Flow Control"] -pub struct RFD_R(crate::FieldReader); -impl RFD_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - RFD_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RFD_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RFD` writer - Threshold for Deactivating Flow Control"] -pub struct RFD_W<'a> { - w: &'a mut W, -} -impl<'a> RFD_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x03 << 11)) | ((value as u32 & 0x03) << 11); - self.w - } -} -#[doc = "Field `RFA` reader - Threshold for Activating Flow Control"] -pub struct RFA_R(crate::FieldReader); -impl RFA_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - RFA_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RFA_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RFA` writer - Threshold for Activating Flow Control"] -pub struct RFA_W<'a> { - w: &'a mut W, -} -impl<'a> RFA_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x03 << 9)) | ((value as u32 & 0x03) << 9); - self.w - } -} -#[doc = "Field `FEF` reader - Forward Error Frames"] -pub struct FEF_R(crate::FieldReader); -impl FEF_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - FEF_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for FEF_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `FEF` writer - Forward Error Frames"] -pub struct FEF_W<'a> { - w: &'a mut W, -} -impl<'a> FEF_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); - self.w - } -} -#[doc = "Field `FUF` reader - Forward Undersized Good Frames"] -pub struct FUF_R(crate::FieldReader); -impl FUF_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - FUF_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for FUF_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `FUF` writer - Forward Undersized Good Frames"] -pub struct FUF_W<'a> { - w: &'a mut W, -} -impl<'a> FUF_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); - self.w - } -} -#[doc = "Field `DGF` reader - Drop Giant Frames"] -pub struct DGF_R(crate::FieldReader); -impl DGF_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - DGF_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for DGF_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `DGF` writer - Drop Giant Frames"] -pub struct DGF_W<'a> { - w: &'a mut W, -} -impl<'a> DGF_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); - self.w - } -} -#[doc = "Field `RTC` reader - Receive Threshold Control"] -pub struct RTC_R(crate::FieldReader); -impl RTC_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - RTC_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RTC_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RTC` writer - Receive Threshold Control"] -pub struct RTC_W<'a> { - w: &'a mut W, -} -impl<'a> RTC_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x03 << 3)) | ((value as u32 & 0x03) << 3); - self.w - } -} -#[doc = "Field `OSF` reader - Operate on Second Frame"] -pub struct OSF_R(crate::FieldReader); -impl OSF_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - OSF_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for OSF_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `OSF` writer - Operate on Second Frame"] -pub struct OSF_W<'a> { - w: &'a mut W, -} -impl<'a> OSF_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); - self.w - } -} +pub type W = crate::W; #[doc = "Field `SR` reader - Start or Stop Receive"] -pub struct SR_R(crate::FieldReader); -impl SR_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - SR_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for SR_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type SrR = crate::BitReader; #[doc = "Field `SR` writer - Start or Stop Receive"] -pub struct SR_W<'a> { - w: &'a mut W, -} -impl<'a> SR_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); - self.w - } -} +pub type SrW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `OSF` reader - Operate on Second Frame"] +pub type OsfR = crate::BitReader; +#[doc = "Field `OSF` writer - Operate on Second Frame"] +pub type OsfW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `RTC` reader - Receive Threshold Control"] +pub type RtcR = crate::FieldReader; +#[doc = "Field `RTC` writer - Receive Threshold Control"] +pub type RtcW<'a, REG> = crate::FieldWriter<'a, REG, 2>; +#[doc = "Field `DGF` reader - Drop Giant Frames"] +pub type DgfR = crate::BitReader; +#[doc = "Field `DGF` writer - Drop Giant Frames"] +pub type DgfW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `FUF` reader - Forward Undersized Good Frames"] +pub type FufR = crate::BitReader; +#[doc = "Field `FUF` writer - Forward Undersized Good Frames"] +pub type FufW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `FEF` reader - Forward Error Frames"] +pub type FefR = crate::BitReader; +#[doc = "Field `FEF` writer - Forward Error Frames"] +pub type FefW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `RFA` reader - Threshold for Activating Flow Control"] +pub type RfaR = crate::FieldReader; +#[doc = "Field `RFA` writer - Threshold for Activating Flow Control"] +pub type RfaW<'a, REG> = crate::FieldWriter<'a, REG, 2>; +#[doc = "Field `RFD` reader - Threshold for Deactivating Flow Control"] +pub type RfdR = crate::FieldReader; +#[doc = "Field `RFD` writer - Threshold for Deactivating Flow Control"] +pub type RfdW<'a, REG> = crate::FieldWriter<'a, REG, 2>; +#[doc = "Field `ST` reader - Start or Stop Transmission Command"] +pub type StR = crate::BitReader; +#[doc = "Field `ST` writer - Start or Stop Transmission Command"] +pub type StW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TTC` reader - Transmit Threshold Control"] +pub type TtcR = crate::FieldReader; +#[doc = "Field `TTC` writer - Transmit Threshold Control"] +pub type TtcW<'a, REG> = crate::FieldWriter<'a, REG, 3>; +#[doc = "Field `FTF` reader - Flush Transmit FIFO"] +pub type FtfR = crate::BitReader; +#[doc = "Field `FTF` writer - Flush Transmit FIFO"] +pub type FtfW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TSF` reader - Transmit Store and Forward"] +pub type TsfR = crate::BitReader; +#[doc = "Field `TSF` writer - Transmit Store and Forward"] +pub type TsfW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `DFF` reader - Disable Flushing of Received Frames"] +pub type DffR = crate::BitReader; +#[doc = "Field `DFF` writer - Disable Flushing of Received Frames"] +pub type DffW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `RSF` reader - Receive Store and Forward"] +pub type RsfR = crate::BitReader; +#[doc = "Field `RSF` writer - Receive Store and Forward"] +pub type RsfW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `DT` reader - Disable Dropping of TCP/IP Checksum Error Frames"] +pub type DtR = crate::BitReader; +#[doc = "Field `DT` writer - Disable Dropping of TCP/IP Checksum Error Frames"] +pub type DtW<'a, REG> = crate::BitWriter<'a, REG>; impl R { - #[doc = "Bit 26 - Disable Dropping of TCP/IP Checksum Error Frames"] + #[doc = "Bit 1 - Start or Stop Receive"] #[inline(always)] - pub fn dt(&self) -> DT_R { - DT_R::new(((self.bits >> 26) & 0x01) != 0) - } - #[doc = "Bit 25 - Receive Store and Forward"] - #[inline(always)] - pub fn rsf(&self) -> RSF_R { - RSF_R::new(((self.bits >> 25) & 0x01) != 0) - } - #[doc = "Bit 24 - Disable Flushing of Received Frames"] - #[inline(always)] - pub fn dff(&self) -> DFF_R { - DFF_R::new(((self.bits >> 24) & 0x01) != 0) - } - #[doc = "Bit 21 - Transmit Store and Forward"] - #[inline(always)] - pub fn tsf(&self) -> TSF_R { - TSF_R::new(((self.bits >> 21) & 0x01) != 0) - } - #[doc = "Bit 20 - Flush Transmit FIFO"] - #[inline(always)] - pub fn ftf(&self) -> FTF_R { - FTF_R::new(((self.bits >> 20) & 0x01) != 0) - } - #[doc = "Bits 14:16 - Transmit Threshold Control"] - #[inline(always)] - pub fn ttc(&self) -> TTC_R { - TTC_R::new(((self.bits >> 14) & 0x07) as u8) - } - #[doc = "Bit 13 - Start or Stop Transmission Command"] - #[inline(always)] - pub fn st(&self) -> ST_R { - ST_R::new(((self.bits >> 13) & 0x01) != 0) - } - #[doc = "Bits 11:12 - Threshold for Deactivating Flow Control"] - #[inline(always)] - pub fn rfd(&self) -> RFD_R { - RFD_R::new(((self.bits >> 11) & 0x03) as u8) - } - #[doc = "Bits 9:10 - Threshold for Activating Flow Control"] - #[inline(always)] - pub fn rfa(&self) -> RFA_R { - RFA_R::new(((self.bits >> 9) & 0x03) as u8) - } - #[doc = "Bit 7 - Forward Error Frames"] - #[inline(always)] - pub fn fef(&self) -> FEF_R { - FEF_R::new(((self.bits >> 7) & 0x01) != 0) - } - #[doc = "Bit 6 - Forward Undersized Good Frames"] - #[inline(always)] - pub fn fuf(&self) -> FUF_R { - FUF_R::new(((self.bits >> 6) & 0x01) != 0) - } - #[doc = "Bit 5 - Drop Giant Frames"] - #[inline(always)] - pub fn dgf(&self) -> DGF_R { - DGF_R::new(((self.bits >> 5) & 0x01) != 0) - } - #[doc = "Bits 3:4 - Receive Threshold Control"] - #[inline(always)] - pub fn rtc(&self) -> RTC_R { - RTC_R::new(((self.bits >> 3) & 0x03) as u8) + pub fn sr(&self) -> SrR { + SrR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Operate on Second Frame"] #[inline(always)] - pub fn osf(&self) -> OSF_R { - OSF_R::new(((self.bits >> 2) & 0x01) != 0) + pub fn osf(&self) -> OsfR { + OsfR::new(((self.bits >> 2) & 1) != 0) } - #[doc = "Bit 1 - Start or Stop Receive"] + #[doc = "Bits 3:4 - Receive Threshold Control"] #[inline(always)] - pub fn sr(&self) -> SR_R { - SR_R::new(((self.bits >> 1) & 0x01) != 0) + pub fn rtc(&self) -> RtcR { + RtcR::new(((self.bits >> 3) & 3) as u8) + } + #[doc = "Bit 5 - Drop Giant Frames"] + #[inline(always)] + pub fn dgf(&self) -> DgfR { + DgfR::new(((self.bits >> 5) & 1) != 0) + } + #[doc = "Bit 6 - Forward Undersized Good Frames"] + #[inline(always)] + pub fn fuf(&self) -> FufR { + FufR::new(((self.bits >> 6) & 1) != 0) + } + #[doc = "Bit 7 - Forward Error Frames"] + #[inline(always)] + pub fn fef(&self) -> FefR { + FefR::new(((self.bits >> 7) & 1) != 0) + } + #[doc = "Bits 9:10 - Threshold for Activating Flow Control"] + #[inline(always)] + pub fn rfa(&self) -> RfaR { + RfaR::new(((self.bits >> 9) & 3) as u8) + } + #[doc = "Bits 11:12 - Threshold for Deactivating Flow Control"] + #[inline(always)] + pub fn rfd(&self) -> RfdR { + RfdR::new(((self.bits >> 11) & 3) as u8) + } + #[doc = "Bit 13 - Start or Stop Transmission Command"] + #[inline(always)] + pub fn st(&self) -> StR { + StR::new(((self.bits >> 13) & 1) != 0) + } + #[doc = "Bits 14:16 - Transmit Threshold Control"] + #[inline(always)] + pub fn ttc(&self) -> TtcR { + TtcR::new(((self.bits >> 14) & 7) as u8) + } + #[doc = "Bit 20 - Flush Transmit FIFO"] + #[inline(always)] + pub fn ftf(&self) -> FtfR { + FtfR::new(((self.bits >> 20) & 1) != 0) + } + #[doc = "Bit 21 - Transmit Store and Forward"] + #[inline(always)] + pub fn tsf(&self) -> TsfR { + TsfR::new(((self.bits >> 21) & 1) != 0) + } + #[doc = "Bit 24 - Disable Flushing of Received Frames"] + #[inline(always)] + pub fn dff(&self) -> DffR { + DffR::new(((self.bits >> 24) & 1) != 0) + } + #[doc = "Bit 25 - Receive Store and Forward"] + #[inline(always)] + pub fn rsf(&self) -> RsfR { + RsfR::new(((self.bits >> 25) & 1) != 0) + } + #[doc = "Bit 26 - Disable Dropping of TCP/IP Checksum Error Frames"] + #[inline(always)] + pub fn dt(&self) -> DtR { + DtR::new(((self.bits >> 26) & 1) != 0) } } impl W { - #[doc = "Bit 26 - Disable Dropping of TCP/IP Checksum Error Frames"] + #[doc = "Bit 1 - Start or Stop Receive"] #[inline(always)] - pub fn dt(&mut self) -> DT_W { - DT_W { w: self } - } - #[doc = "Bit 25 - Receive Store and Forward"] - #[inline(always)] - pub fn rsf(&mut self) -> RSF_W { - RSF_W { w: self } - } - #[doc = "Bit 24 - Disable Flushing of Received Frames"] - #[inline(always)] - pub fn dff(&mut self) -> DFF_W { - DFF_W { w: self } - } - #[doc = "Bit 21 - Transmit Store and Forward"] - #[inline(always)] - pub fn tsf(&mut self) -> TSF_W { - TSF_W { w: self } - } - #[doc = "Bit 20 - Flush Transmit FIFO"] - #[inline(always)] - pub fn ftf(&mut self) -> FTF_W { - FTF_W { w: self } - } - #[doc = "Bits 14:16 - Transmit Threshold Control"] - #[inline(always)] - pub fn ttc(&mut self) -> TTC_W { - TTC_W { w: self } - } - #[doc = "Bit 13 - Start or Stop Transmission Command"] - #[inline(always)] - pub fn st(&mut self) -> ST_W { - ST_W { w: self } - } - #[doc = "Bits 11:12 - Threshold for Deactivating Flow Control"] - #[inline(always)] - pub fn rfd(&mut self) -> RFD_W { - RFD_W { w: self } - } - #[doc = "Bits 9:10 - Threshold for Activating Flow Control"] - #[inline(always)] - pub fn rfa(&mut self) -> RFA_W { - RFA_W { w: self } - } - #[doc = "Bit 7 - Forward Error Frames"] - #[inline(always)] - pub fn fef(&mut self) -> FEF_W { - FEF_W { w: self } - } - #[doc = "Bit 6 - Forward Undersized Good Frames"] - #[inline(always)] - pub fn fuf(&mut self) -> FUF_W { - FUF_W { w: self } - } - #[doc = "Bit 5 - Drop Giant Frames"] - #[inline(always)] - pub fn dgf(&mut self) -> DGF_W { - DGF_W { w: self } - } - #[doc = "Bits 3:4 - Receive Threshold Control"] - #[inline(always)] - pub fn rtc(&mut self) -> RTC_W { - RTC_W { w: self } + #[must_use] + pub fn sr(&mut self) -> SrW { + SrW::new(self, 1) } #[doc = "Bit 2 - Operate on Second Frame"] #[inline(always)] - pub fn osf(&mut self) -> OSF_W { - OSF_W { w: self } + #[must_use] + pub fn osf(&mut self) -> OsfW { + OsfW::new(self, 2) } - #[doc = "Bit 1 - Start or Stop Receive"] + #[doc = "Bits 3:4 - Receive Threshold Control"] #[inline(always)] - pub fn sr(&mut self) -> SR_W { - SR_W { w: self } + #[must_use] + pub fn rtc(&mut self) -> RtcW { + RtcW::new(self, 3) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bit 5 - Drop Giant Frames"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn dgf(&mut self) -> DgfW { + DgfW::new(self, 5) + } + #[doc = "Bit 6 - Forward Undersized Good Frames"] + #[inline(always)] + #[must_use] + pub fn fuf(&mut self) -> FufW { + FufW::new(self, 6) + } + #[doc = "Bit 7 - Forward Error Frames"] + #[inline(always)] + #[must_use] + pub fn fef(&mut self) -> FefW { + FefW::new(self, 7) + } + #[doc = "Bits 9:10 - Threshold for Activating Flow Control"] + #[inline(always)] + #[must_use] + pub fn rfa(&mut self) -> RfaW { + RfaW::new(self, 9) + } + #[doc = "Bits 11:12 - Threshold for Deactivating Flow Control"] + #[inline(always)] + #[must_use] + pub fn rfd(&mut self) -> RfdW { + RfdW::new(self, 11) + } + #[doc = "Bit 13 - Start or Stop Transmission Command"] + #[inline(always)] + #[must_use] + pub fn st(&mut self) -> StW { + StW::new(self, 13) + } + #[doc = "Bits 14:16 - Transmit Threshold Control"] + #[inline(always)] + #[must_use] + pub fn ttc(&mut self) -> TtcW { + TtcW::new(self, 14) + } + #[doc = "Bit 20 - Flush Transmit FIFO"] + #[inline(always)] + #[must_use] + pub fn ftf(&mut self) -> FtfW { + FtfW::new(self, 20) + } + #[doc = "Bit 21 - Transmit Store and Forward"] + #[inline(always)] + #[must_use] + pub fn tsf(&mut self) -> TsfW { + TsfW::new(self, 21) + } + #[doc = "Bit 24 - Disable Flushing of Received Frames"] + #[inline(always)] + #[must_use] + pub fn dff(&mut self) -> DffW { + DffW::new(self, 24) + } + #[doc = "Bit 25 - Receive Store and Forward"] + #[inline(always)] + #[must_use] + pub fn rsf(&mut self) -> RsfW { + RsfW::new(self, 25) + } + #[doc = "Bit 26 - Disable Dropping of TCP/IP Checksum Error Frames"] + #[inline(always)] + #[must_use] + pub fn dt(&mut self) -> DtW { + DtW::new(self, 26) } } -#[doc = "Sets the Receive and Transmit operation mode and command\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dma_oper_mode](index.html) module"] -pub struct DMA_OPER_MODE_SPEC; -impl crate::RegisterSpec for DMA_OPER_MODE_SPEC { +#[doc = "Sets the Receive and Transmit operation mode and command\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_oper_mode::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_oper_mode::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DmaOperModeSpec; +impl crate::RegisterSpec for DmaOperModeSpec { type Ux = u32; } -#[doc = "`read()` method returns [dma_oper_mode::R](R) reader structure"] -impl crate::Readable for DMA_OPER_MODE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dma_oper_mode::W](W) writer structure"] -impl crate::Writable for DMA_OPER_MODE_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`dma_oper_mode::R`](R) reader structure"] +impl crate::Readable for DmaOperModeSpec {} +#[doc = "`write(|w| ..)` method takes [`dma_oper_mode::W`](W) writer structure"] +impl crate::Writable for DmaOperModeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DMA_OPER_MODE to value 0"] -impl crate::Resettable for DMA_OPER_MODE_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for DmaOperModeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/dma_rx_desc_list_addr.rs b/va416xx/src/eth/dma_rx_desc_list_addr.rs index 62aa668..124dc86 100644 --- a/va416xx/src/eth/dma_rx_desc_list_addr.rs +++ b/va416xx/src/eth/dma_rx_desc_list_addr.rs @@ -1,103 +1,40 @@ #[doc = "Register `DMA_RX_DESC_LIST_ADDR` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DMA_RX_DESC_LIST_ADDR` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RDESLA` reader - Start of Receive List"] -pub struct RDESLA_R(crate::FieldReader); -impl RDESLA_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - RDESLA_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RDESLA_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type RdeslaR = crate::FieldReader; #[doc = "Field `RDESLA` writer - Start of Receive List"] -pub struct RDESLA_W<'a> { - w: &'a mut W, -} -impl<'a> RDESLA_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - self.w.bits = value as u32; - self.w - } -} +pub type RdeslaW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Start of Receive List"] #[inline(always)] - pub fn rdesla(&self) -> RDESLA_R { - RDESLA_R::new(self.bits as u32) + pub fn rdesla(&self) -> RdeslaR { + RdeslaR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Start of Receive List"] #[inline(always)] - pub fn rdesla(&mut self) -> RDESLA_W { - RDESLA_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn rdesla(&mut self) -> RdeslaW { + RdeslaW::new(self, 0) } } -#[doc = "Points the DMA to the start of the Receive Descriptor list\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dma_rx_desc_list_addr](index.html) module"] -pub struct DMA_RX_DESC_LIST_ADDR_SPEC; -impl crate::RegisterSpec for DMA_RX_DESC_LIST_ADDR_SPEC { +#[doc = "Points the DMA to the start of the Receive Descriptor list\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_rx_desc_list_addr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_rx_desc_list_addr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DmaRxDescListAddrSpec; +impl crate::RegisterSpec for DmaRxDescListAddrSpec { type Ux = u32; } -#[doc = "`read()` method returns [dma_rx_desc_list_addr::R](R) reader structure"] -impl crate::Readable for DMA_RX_DESC_LIST_ADDR_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dma_rx_desc_list_addr::W](W) writer structure"] -impl crate::Writable for DMA_RX_DESC_LIST_ADDR_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`dma_rx_desc_list_addr::R`](R) reader structure"] +impl crate::Readable for DmaRxDescListAddrSpec {} +#[doc = "`write(|w| ..)` method takes [`dma_rx_desc_list_addr::W`](W) writer structure"] +impl crate::Writable for DmaRxDescListAddrSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DMA_RX_DESC_LIST_ADDR to value 0"] -impl crate::Resettable for DMA_RX_DESC_LIST_ADDR_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for DmaRxDescListAddrSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/dma_rx_intr_wdog_timer.rs b/va416xx/src/eth/dma_rx_intr_wdog_timer.rs index 2f710ae..d4ef2f0 100644 --- a/va416xx/src/eth/dma_rx_intr_wdog_timer.rs +++ b/va416xx/src/eth/dma_rx_intr_wdog_timer.rs @@ -1,103 +1,40 @@ #[doc = "Register `DMA_RX_INTR_WDOG_TIMER` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DMA_RX_INTR_WDOG_TIMER` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RIWT` reader - These bits indicate the number of system clock cycles x 256 for which the watchdog timer is set."] -pub struct RIWT_R(crate::FieldReader); -impl RIWT_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - RIWT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RIWT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type RiwtR = crate::FieldReader; #[doc = "Field `RIWT` writer - These bits indicate the number of system clock cycles x 256 for which the watchdog timer is set."] -pub struct RIWT_W<'a> { - w: &'a mut W, -} -impl<'a> RIWT_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type RiwtW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - These bits indicate the number of system clock cycles x 256 for which the watchdog timer is set."] #[inline(always)] - pub fn riwt(&self) -> RIWT_R { - RIWT_R::new((self.bits & 0xff) as u8) + pub fn riwt(&self) -> RiwtR { + RiwtR::new((self.bits & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - These bits indicate the number of system clock cycles x 256 for which the watchdog timer is set."] #[inline(always)] - pub fn riwt(&mut self) -> RIWT_W { - RIWT_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn riwt(&mut self) -> RiwtW { + RiwtW::new(self, 0) } } -#[doc = "Watchdog timeout for Receive Interrupt from DMA\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dma_rx_intr_wdog_timer](index.html) module"] -pub struct DMA_RX_INTR_WDOG_TIMER_SPEC; -impl crate::RegisterSpec for DMA_RX_INTR_WDOG_TIMER_SPEC { +#[doc = "Watchdog timeout for Receive Interrupt from DMA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_rx_intr_wdog_timer::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_rx_intr_wdog_timer::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DmaRxIntrWdogTimerSpec; +impl crate::RegisterSpec for DmaRxIntrWdogTimerSpec { type Ux = u32; } -#[doc = "`read()` method returns [dma_rx_intr_wdog_timer::R](R) reader structure"] -impl crate::Readable for DMA_RX_INTR_WDOG_TIMER_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dma_rx_intr_wdog_timer::W](W) writer structure"] -impl crate::Writable for DMA_RX_INTR_WDOG_TIMER_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`dma_rx_intr_wdog_timer::R`](R) reader structure"] +impl crate::Readable for DmaRxIntrWdogTimerSpec {} +#[doc = "`write(|w| ..)` method takes [`dma_rx_intr_wdog_timer::W`](W) writer structure"] +impl crate::Writable for DmaRxIntrWdogTimerSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DMA_RX_INTR_WDOG_TIMER to value 0"] -impl crate::Resettable for DMA_RX_INTR_WDOG_TIMER_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for DmaRxIntrWdogTimerSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/dma_rx_poll_demand.rs b/va416xx/src/eth/dma_rx_poll_demand.rs index 4d84f5c..df87347 100644 --- a/va416xx/src/eth/dma_rx_poll_demand.rs +++ b/va416xx/src/eth/dma_rx_poll_demand.rs @@ -1,103 +1,40 @@ #[doc = "Register `DMA_RX_POLL_DEMAND` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DMA_RX_POLL_DEMAND` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RPD` reader - Receive Poll Demand (Read Only and Write Trigger)"] -pub struct RPD_R(crate::FieldReader); -impl RPD_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - RPD_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RPD_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type RpdR = crate::FieldReader; #[doc = "Field `RPD` writer - Receive Poll Demand (Read Only and Write Trigger)"] -pub struct RPD_W<'a> { - w: &'a mut W, -} -impl<'a> RPD_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - self.w.bits = value as u32; - self.w - } -} +pub type RpdW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Receive Poll Demand (Read Only and Write Trigger)"] #[inline(always)] - pub fn rpd(&self) -> RPD_R { - RPD_R::new(self.bits as u32) + pub fn rpd(&self) -> RpdR { + RpdR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Receive Poll Demand (Read Only and Write Trigger)"] #[inline(always)] - pub fn rpd(&mut self) -> RPD_W { - RPD_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn rpd(&mut self) -> RpdW { + RpdW::new(self, 0) } } -#[doc = "Used by the host to instruct the DMA to poll the Receive Descriptor list\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dma_rx_poll_demand](index.html) module"] -pub struct DMA_RX_POLL_DEMAND_SPEC; -impl crate::RegisterSpec for DMA_RX_POLL_DEMAND_SPEC { +#[doc = "Used by the host to instruct the DMA to poll the Receive Descriptor list\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_rx_poll_demand::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_rx_poll_demand::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DmaRxPollDemandSpec; +impl crate::RegisterSpec for DmaRxPollDemandSpec { type Ux = u32; } -#[doc = "`read()` method returns [dma_rx_poll_demand::R](R) reader structure"] -impl crate::Readable for DMA_RX_POLL_DEMAND_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dma_rx_poll_demand::W](W) writer structure"] -impl crate::Writable for DMA_RX_POLL_DEMAND_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`dma_rx_poll_demand::R`](R) reader structure"] +impl crate::Readable for DmaRxPollDemandSpec {} +#[doc = "`write(|w| ..)` method takes [`dma_rx_poll_demand::W`](W) writer structure"] +impl crate::Writable for DmaRxPollDemandSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DMA_RX_POLL_DEMAND to value 0"] -impl crate::Resettable for DMA_RX_POLL_DEMAND_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for DmaRxPollDemandSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/dma_status.rs b/va416xx/src/eth/dma_status.rs index 2ffa7c6..cc4d93d 100644 --- a/va416xx/src/eth/dma_status.rs +++ b/va416xx/src/eth/dma_status.rs @@ -1,433 +1,155 @@ #[doc = "Register `DMA_STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Field `TTI` reader - Timestamp Trigger Interrupt"] -pub struct TTI_R(crate::FieldReader); -impl TTI_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TTI_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TTI_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `GMI` reader - GMAC MMC Interrupt"] -pub struct GMI_R(crate::FieldReader); -impl GMI_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - GMI_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for GMI_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `EB` reader - Error Bits"] -pub struct EB_R(crate::FieldReader); -impl EB_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - EB_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for EB_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TS` reader - Transmit Process State"] -pub struct TS_R(crate::FieldReader); -impl TS_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - TS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RS` reader - Receive Process State"] -pub struct RS_R(crate::FieldReader); -impl RS_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - RS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `NIS` reader - Normal Interrupt Summary"] -pub struct NIS_R(crate::FieldReader); -impl NIS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - NIS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for NIS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `AIS` reader - Abnormal Interrupt Summary"] -pub struct AIS_R(crate::FieldReader); -impl AIS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - AIS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for AIS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `ERI` reader - Early Receive Interrupt"] -pub struct ERI_R(crate::FieldReader); -impl ERI_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - ERI_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ERI_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `FBI` reader - Fatal Bus Error Interruptble"] -pub struct FBI_R(crate::FieldReader); -impl FBI_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - FBI_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for FBI_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `ETI` reader - Early Transmit Interrupt"] -pub struct ETI_R(crate::FieldReader); -impl ETI_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - ETI_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ETI_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RWT` reader - Receive Watchdog Timeout"] -pub struct RWT_R(crate::FieldReader); -impl RWT_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RWT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RWT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RPS` reader - Receive Process Stopped"] -pub struct RPS_R(crate::FieldReader); -impl RPS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RPS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RPS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RU` reader - Receive Buffer Unavailable"] -pub struct RU_R(crate::FieldReader); -impl RU_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RU_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RU_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RI` reader - Receive Interrupt"] -pub struct RI_R(crate::FieldReader); -impl RI_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RI_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RI_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `UNF` reader - Transmit Underflow"] -pub struct UNF_R(crate::FieldReader); -impl UNF_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - UNF_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for UNF_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `OVF` reader - Receive Underflow"] -pub struct OVF_R(crate::FieldReader); -impl OVF_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - OVF_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for OVF_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TJT` reader - Transmit Jabber Timeout"] -pub struct TJT_R(crate::FieldReader); -impl TJT_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TJT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TJT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TU` reader - Transmit Buffer Unavailable"] -pub struct TU_R(crate::FieldReader); -impl TU_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TU_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TU_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TPS` reader - Transmit Process Stopped"] -pub struct TPS_R(crate::FieldReader); -impl TPS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TPS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TPS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type R = crate::R; #[doc = "Field `TI` reader - Transmit Interrupt"] -pub struct TI_R(crate::FieldReader); -impl TI_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TI_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TI_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type TiR = crate::BitReader; +#[doc = "Field `TPS` reader - Transmit Process Stopped"] +pub type TpsR = crate::BitReader; +#[doc = "Field `TU` reader - Transmit Buffer Unavailable"] +pub type TuR = crate::BitReader; +#[doc = "Field `TJT` reader - Transmit Jabber Timeout"] +pub type TjtR = crate::BitReader; +#[doc = "Field `OVF` reader - Receive Underflow"] +pub type OvfR = crate::BitReader; +#[doc = "Field `UNF` reader - Transmit Underflow"] +pub type UnfR = crate::BitReader; +#[doc = "Field `RI` reader - Receive Interrupt"] +pub type RiR = crate::BitReader; +#[doc = "Field `RU` reader - Receive Buffer Unavailable"] +pub type RuR = crate::BitReader; +#[doc = "Field `RPS` reader - Receive Process Stopped"] +pub type RpsR = crate::BitReader; +#[doc = "Field `RWT` reader - Receive Watchdog Timeout"] +pub type RwtR = crate::BitReader; +#[doc = "Field `ETI` reader - Early Transmit Interrupt"] +pub type EtiR = crate::BitReader; +#[doc = "Field `FBI` reader - Fatal Bus Error Interruptble"] +pub type FbiR = crate::BitReader; +#[doc = "Field `ERI` reader - Early Receive Interrupt"] +pub type EriR = crate::BitReader; +#[doc = "Field `AIS` reader - Abnormal Interrupt Summary"] +pub type AisR = crate::BitReader; +#[doc = "Field `NIS` reader - Normal Interrupt Summary"] +pub type NisR = crate::BitReader; +#[doc = "Field `RS` reader - Receive Process State"] +pub type RsR = crate::FieldReader; +#[doc = "Field `TS` reader - Transmit Process State"] +pub type TsR = crate::FieldReader; +#[doc = "Field `EB` reader - Error Bits"] +pub type EbR = crate::FieldReader; +#[doc = "Field `GMI` reader - GMAC MMC Interrupt"] +pub type GmiR = crate::BitReader; +#[doc = "Field `TTI` reader - Timestamp Trigger Interrupt"] +pub type TtiR = crate::BitReader; impl R { - #[doc = "Bit 29 - Timestamp Trigger Interrupt"] + #[doc = "Bit 0 - Transmit Interrupt"] #[inline(always)] - pub fn tti(&self) -> TTI_R { - TTI_R::new(((self.bits >> 29) & 0x01) != 0) - } - #[doc = "Bit 27 - GMAC MMC Interrupt"] - #[inline(always)] - pub fn gmi(&self) -> GMI_R { - GMI_R::new(((self.bits >> 27) & 0x01) != 0) - } - #[doc = "Bits 23:25 - Error Bits"] - #[inline(always)] - pub fn eb(&self) -> EB_R { - EB_R::new(((self.bits >> 23) & 0x07) as u8) - } - #[doc = "Bits 20:22 - Transmit Process State"] - #[inline(always)] - pub fn ts(&self) -> TS_R { - TS_R::new(((self.bits >> 20) & 0x07) as u8) - } - #[doc = "Bits 17:19 - Receive Process State"] - #[inline(always)] - pub fn rs(&self) -> RS_R { - RS_R::new(((self.bits >> 17) & 0x07) as u8) - } - #[doc = "Bit 16 - Normal Interrupt Summary"] - #[inline(always)] - pub fn nis(&self) -> NIS_R { - NIS_R::new(((self.bits >> 16) & 0x01) != 0) - } - #[doc = "Bit 15 - Abnormal Interrupt Summary"] - #[inline(always)] - pub fn ais(&self) -> AIS_R { - AIS_R::new(((self.bits >> 15) & 0x01) != 0) - } - #[doc = "Bit 14 - Early Receive Interrupt"] - #[inline(always)] - pub fn eri(&self) -> ERI_R { - ERI_R::new(((self.bits >> 14) & 0x01) != 0) - } - #[doc = "Bit 13 - Fatal Bus Error Interruptble"] - #[inline(always)] - pub fn fbi(&self) -> FBI_R { - FBI_R::new(((self.bits >> 13) & 0x01) != 0) - } - #[doc = "Bit 10 - Early Transmit Interrupt"] - #[inline(always)] - pub fn eti(&self) -> ETI_R { - ETI_R::new(((self.bits >> 10) & 0x01) != 0) - } - #[doc = "Bit 9 - Receive Watchdog Timeout"] - #[inline(always)] - pub fn rwt(&self) -> RWT_R { - RWT_R::new(((self.bits >> 9) & 0x01) != 0) - } - #[doc = "Bit 8 - Receive Process Stopped"] - #[inline(always)] - pub fn rps(&self) -> RPS_R { - RPS_R::new(((self.bits >> 8) & 0x01) != 0) - } - #[doc = "Bit 7 - Receive Buffer Unavailable"] - #[inline(always)] - pub fn ru(&self) -> RU_R { - RU_R::new(((self.bits >> 7) & 0x01) != 0) - } - #[doc = "Bit 6 - Receive Interrupt"] - #[inline(always)] - pub fn ri(&self) -> RI_R { - RI_R::new(((self.bits >> 6) & 0x01) != 0) - } - #[doc = "Bit 5 - Transmit Underflow"] - #[inline(always)] - pub fn unf(&self) -> UNF_R { - UNF_R::new(((self.bits >> 5) & 0x01) != 0) - } - #[doc = "Bit 4 - Receive Underflow"] - #[inline(always)] - pub fn ovf(&self) -> OVF_R { - OVF_R::new(((self.bits >> 4) & 0x01) != 0) - } - #[doc = "Bit 3 - Transmit Jabber Timeout"] - #[inline(always)] - pub fn tjt(&self) -> TJT_R { - TJT_R::new(((self.bits >> 3) & 0x01) != 0) - } - #[doc = "Bit 2 - Transmit Buffer Unavailable"] - #[inline(always)] - pub fn tu(&self) -> TU_R { - TU_R::new(((self.bits >> 2) & 0x01) != 0) + pub fn ti(&self) -> TiR { + TiR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Transmit Process Stopped"] #[inline(always)] - pub fn tps(&self) -> TPS_R { - TPS_R::new(((self.bits >> 1) & 0x01) != 0) + pub fn tps(&self) -> TpsR { + TpsR::new(((self.bits >> 1) & 1) != 0) } - #[doc = "Bit 0 - Transmit Interrupt"] + #[doc = "Bit 2 - Transmit Buffer Unavailable"] #[inline(always)] - pub fn ti(&self) -> TI_R { - TI_R::new((self.bits & 0x01) != 0) + pub fn tu(&self) -> TuR { + TuR::new(((self.bits >> 2) & 1) != 0) + } + #[doc = "Bit 3 - Transmit Jabber Timeout"] + #[inline(always)] + pub fn tjt(&self) -> TjtR { + TjtR::new(((self.bits >> 3) & 1) != 0) + } + #[doc = "Bit 4 - Receive Underflow"] + #[inline(always)] + pub fn ovf(&self) -> OvfR { + OvfR::new(((self.bits >> 4) & 1) != 0) + } + #[doc = "Bit 5 - Transmit Underflow"] + #[inline(always)] + pub fn unf(&self) -> UnfR { + UnfR::new(((self.bits >> 5) & 1) != 0) + } + #[doc = "Bit 6 - Receive Interrupt"] + #[inline(always)] + pub fn ri(&self) -> RiR { + RiR::new(((self.bits >> 6) & 1) != 0) + } + #[doc = "Bit 7 - Receive Buffer Unavailable"] + #[inline(always)] + pub fn ru(&self) -> RuR { + RuR::new(((self.bits >> 7) & 1) != 0) + } + #[doc = "Bit 8 - Receive Process Stopped"] + #[inline(always)] + pub fn rps(&self) -> RpsR { + RpsR::new(((self.bits >> 8) & 1) != 0) + } + #[doc = "Bit 9 - Receive Watchdog Timeout"] + #[inline(always)] + pub fn rwt(&self) -> RwtR { + RwtR::new(((self.bits >> 9) & 1) != 0) + } + #[doc = "Bit 10 - Early Transmit Interrupt"] + #[inline(always)] + pub fn eti(&self) -> EtiR { + EtiR::new(((self.bits >> 10) & 1) != 0) + } + #[doc = "Bit 13 - Fatal Bus Error Interruptble"] + #[inline(always)] + pub fn fbi(&self) -> FbiR { + FbiR::new(((self.bits >> 13) & 1) != 0) + } + #[doc = "Bit 14 - Early Receive Interrupt"] + #[inline(always)] + pub fn eri(&self) -> EriR { + EriR::new(((self.bits >> 14) & 1) != 0) + } + #[doc = "Bit 15 - Abnormal Interrupt Summary"] + #[inline(always)] + pub fn ais(&self) -> AisR { + AisR::new(((self.bits >> 15) & 1) != 0) + } + #[doc = "Bit 16 - Normal Interrupt Summary"] + #[inline(always)] + pub fn nis(&self) -> NisR { + NisR::new(((self.bits >> 16) & 1) != 0) + } + #[doc = "Bits 17:19 - Receive Process State"] + #[inline(always)] + pub fn rs(&self) -> RsR { + RsR::new(((self.bits >> 17) & 7) as u8) + } + #[doc = "Bits 20:22 - Transmit Process State"] + #[inline(always)] + pub fn ts(&self) -> TsR { + TsR::new(((self.bits >> 20) & 7) as u8) + } + #[doc = "Bits 23:25 - Error Bits"] + #[inline(always)] + pub fn eb(&self) -> EbR { + EbR::new(((self.bits >> 23) & 7) as u8) + } + #[doc = "Bit 27 - GMAC MMC Interrupt"] + #[inline(always)] + pub fn gmi(&self) -> GmiR { + GmiR::new(((self.bits >> 27) & 1) != 0) + } + #[doc = "Bit 29 - Timestamp Trigger Interrupt"] + #[inline(always)] + pub fn tti(&self) -> TtiR { + TtiR::new(((self.bits >> 29) & 1) != 0) } } -#[doc = "Used to determine the status of the DMA\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dma_status](index.html) module"] -pub struct DMA_STATUS_SPEC; -impl crate::RegisterSpec for DMA_STATUS_SPEC { +#[doc = "Used to determine the status of the DMA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DmaStatusSpec; +impl crate::RegisterSpec for DmaStatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [dma_status::R](R) reader structure"] -impl crate::Readable for DMA_STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`dma_status::R`](R) reader structure"] +impl crate::Readable for DmaStatusSpec {} #[doc = "`reset()` method sets DMA_STATUS to value 0"] -impl crate::Resettable for DMA_STATUS_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for DmaStatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/dma_tx_desc_list_addr.rs b/va416xx/src/eth/dma_tx_desc_list_addr.rs index b2abda2..123386b 100644 --- a/va416xx/src/eth/dma_tx_desc_list_addr.rs +++ b/va416xx/src/eth/dma_tx_desc_list_addr.rs @@ -1,103 +1,40 @@ #[doc = "Register `DMA_TX_DESC_LIST_ADDR` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DMA_TX_DESC_LIST_ADDR` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TDESLA` reader - Start of Transmit List"] -pub struct TDESLA_R(crate::FieldReader); -impl TDESLA_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - TDESLA_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TDESLA_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type TdeslaR = crate::FieldReader; #[doc = "Field `TDESLA` writer - Start of Transmit List"] -pub struct TDESLA_W<'a> { - w: &'a mut W, -} -impl<'a> TDESLA_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - self.w.bits = value as u32; - self.w - } -} +pub type TdeslaW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Start of Transmit List"] #[inline(always)] - pub fn tdesla(&self) -> TDESLA_R { - TDESLA_R::new(self.bits as u32) + pub fn tdesla(&self) -> TdeslaR { + TdeslaR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Start of Transmit List"] #[inline(always)] - pub fn tdesla(&mut self) -> TDESLA_W { - TDESLA_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn tdesla(&mut self) -> TdeslaW { + TdeslaW::new(self, 0) } } -#[doc = "Points the DMA to the start of the Transmit Descriptor list\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dma_tx_desc_list_addr](index.html) module"] -pub struct DMA_TX_DESC_LIST_ADDR_SPEC; -impl crate::RegisterSpec for DMA_TX_DESC_LIST_ADDR_SPEC { +#[doc = "Points the DMA to the start of the Transmit Descriptor list\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_tx_desc_list_addr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_tx_desc_list_addr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DmaTxDescListAddrSpec; +impl crate::RegisterSpec for DmaTxDescListAddrSpec { type Ux = u32; } -#[doc = "`read()` method returns [dma_tx_desc_list_addr::R](R) reader structure"] -impl crate::Readable for DMA_TX_DESC_LIST_ADDR_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dma_tx_desc_list_addr::W](W) writer structure"] -impl crate::Writable for DMA_TX_DESC_LIST_ADDR_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`dma_tx_desc_list_addr::R`](R) reader structure"] +impl crate::Readable for DmaTxDescListAddrSpec {} +#[doc = "`write(|w| ..)` method takes [`dma_tx_desc_list_addr::W`](W) writer structure"] +impl crate::Writable for DmaTxDescListAddrSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DMA_TX_DESC_LIST_ADDR to value 0"] -impl crate::Resettable for DMA_TX_DESC_LIST_ADDR_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for DmaTxDescListAddrSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/dma_tx_poll_demand.rs b/va416xx/src/eth/dma_tx_poll_demand.rs index fe773b2..b5d9b31 100644 --- a/va416xx/src/eth/dma_tx_poll_demand.rs +++ b/va416xx/src/eth/dma_tx_poll_demand.rs @@ -1,103 +1,40 @@ #[doc = "Register `DMA_TX_POLL_DEMAND` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DMA_TX_POLL_DEMAND` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TPD` reader - Transmit Poll Demand (Read Only and Write Trigger)"] -pub struct TPD_R(crate::FieldReader); -impl TPD_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - TPD_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TPD_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type TpdR = crate::FieldReader; #[doc = "Field `TPD` writer - Transmit Poll Demand (Read Only and Write Trigger)"] -pub struct TPD_W<'a> { - w: &'a mut W, -} -impl<'a> TPD_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - self.w.bits = value as u32; - self.w - } -} +pub type TpdW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Transmit Poll Demand (Read Only and Write Trigger)"] #[inline(always)] - pub fn tpd(&self) -> TPD_R { - TPD_R::new(self.bits as u32) + pub fn tpd(&self) -> TpdR { + TpdR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Transmit Poll Demand (Read Only and Write Trigger)"] #[inline(always)] - pub fn tpd(&mut self) -> TPD_W { - TPD_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn tpd(&mut self) -> TpdW { + TpdW::new(self, 0) } } -#[doc = "Used by the host to instruct the DMA to poll the transmit Descriptor list\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dma_tx_poll_demand](index.html) module"] -pub struct DMA_TX_POLL_DEMAND_SPEC; -impl crate::RegisterSpec for DMA_TX_POLL_DEMAND_SPEC { +#[doc = "Used by the host to instruct the DMA to poll the transmit Descriptor list\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_tx_poll_demand::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_tx_poll_demand::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DmaTxPollDemandSpec; +impl crate::RegisterSpec for DmaTxPollDemandSpec { type Ux = u32; } -#[doc = "`read()` method returns [dma_tx_poll_demand::R](R) reader structure"] -impl crate::Readable for DMA_TX_POLL_DEMAND_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dma_tx_poll_demand::W](W) writer structure"] -impl crate::Writable for DMA_TX_POLL_DEMAND_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`dma_tx_poll_demand::R`](R) reader structure"] +impl crate::Readable for DmaTxPollDemandSpec {} +#[doc = "`write(|w| ..)` method takes [`dma_tx_poll_demand::W`](W) writer structure"] +impl crate::Writable for DmaTxPollDemandSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DMA_TX_POLL_DEMAND to value 0"] -impl crate::Resettable for DMA_TX_POLL_DEMAND_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for DmaTxPollDemandSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/mac_addr_h.rs b/va416xx/src/eth/mac_addr_h.rs index ebe3d27..45fd510 100644 --- a/va416xx/src/eth/mac_addr_h.rs +++ b/va416xx/src/eth/mac_addr_h.rs @@ -1,106 +1,38 @@ #[doc = "Register `MAC_ADDR_H` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `MAC_ADDR_H` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `AE` reader - Address Enable, This bit is always set to 1"] -pub struct AE_R(crate::FieldReader); -impl AE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - AE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for AE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type W = crate::W; #[doc = "Field `ADDRHI` reader - MAC Address0\\[47:32\\]"] -pub struct ADDRHI_R(crate::FieldReader); -impl ADDRHI_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - ADDRHI_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ADDRHI_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type AddrhiR = crate::FieldReader; +#[doc = "Field `AE` reader - Address Enable, This bit is always set to 1"] +pub type AeR = crate::BitReader; impl R { - #[doc = "Bit 31 - Address Enable, This bit is always set to 1"] - #[inline(always)] - pub fn ae(&self) -> AE_R { - AE_R::new(((self.bits >> 31) & 0x01) != 0) - } #[doc = "Bits 0:15 - MAC Address0\\[47:32\\]"] #[inline(always)] - pub fn addrhi(&self) -> ADDRHI_R { - ADDRHI_R::new((self.bits & 0xffff) as u16) + pub fn addrhi(&self) -> AddrhiR { + AddrhiR::new((self.bits & 0xffff) as u16) } -} -impl W { - #[doc = "Writes raw bits to the register."] + #[doc = "Bit 31 - Address Enable, This bit is always set to 1"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ae(&self) -> AeR { + AeR::new(((self.bits >> 31) & 1) != 0) } } -#[doc = "Contains the high 16-bits of the first MAC Address\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [mac_addr_h](index.html) module"] -pub struct MAC_ADDR_H_SPEC; -impl crate::RegisterSpec for MAC_ADDR_H_SPEC { +impl W {} +#[doc = "Contains the high 16-bits of the first MAC Address\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_addr_h::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mac_addr_h::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct MacAddrHSpec; +impl crate::RegisterSpec for MacAddrHSpec { type Ux = u32; } -#[doc = "`read()` method returns [mac_addr_h::R](R) reader structure"] -impl crate::Readable for MAC_ADDR_H_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [mac_addr_h::W](W) writer structure"] -impl crate::Writable for MAC_ADDR_H_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`mac_addr_h::R`](R) reader structure"] +impl crate::Readable for MacAddrHSpec {} +#[doc = "`write(|w| ..)` method takes [`mac_addr_h::W`](W) writer structure"] +impl crate::Writable for MacAddrHSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MAC_ADDR_H to value 0x8000_ffff"] -impl crate::Resettable for MAC_ADDR_H_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0x8000_ffff - } +impl crate::Resettable for MacAddrHSpec { + const RESET_VALUE: u32 = 0x8000_ffff; } diff --git a/va416xx/src/eth/mac_addr_l.rs b/va416xx/src/eth/mac_addr_l.rs index 4e1e365..7a60fd7 100644 --- a/va416xx/src/eth/mac_addr_l.rs +++ b/va416xx/src/eth/mac_addr_l.rs @@ -1,86 +1,31 @@ #[doc = "Register `MAC_ADDR_L` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `MAC_ADDR_L` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `ADDRLO` reader - MAC Address0\\[31:0\\]"] -pub struct ADDRLO_R(crate::FieldReader); -impl ADDRLO_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - ADDRLO_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ADDRLO_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type AddrloR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - MAC Address0\\[31:0\\]"] #[inline(always)] - pub fn addrlo(&self) -> ADDRLO_R { - ADDRLO_R::new(self.bits as u32) + pub fn addrlo(&self) -> AddrloR { + AddrloR::new(self.bits) } } -impl W { - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "Contains the Low 32-bits of the first MAC Address\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [mac_addr_l](index.html) module"] -pub struct MAC_ADDR_L_SPEC; -impl crate::RegisterSpec for MAC_ADDR_L_SPEC { +impl W {} +#[doc = "Contains the Low 32-bits of the first MAC Address\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_addr_l::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mac_addr_l::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct MacAddrLSpec; +impl crate::RegisterSpec for MacAddrLSpec { type Ux = u32; } -#[doc = "`read()` method returns [mac_addr_l::R](R) reader structure"] -impl crate::Readable for MAC_ADDR_L_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [mac_addr_l::W](W) writer structure"] -impl crate::Writable for MAC_ADDR_L_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`mac_addr_l::R`](R) reader structure"] +impl crate::Readable for MacAddrLSpec {} +#[doc = "`write(|w| ..)` method takes [`mac_addr_l::W`](W) writer structure"] +impl crate::Writable for MacAddrLSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MAC_ADDR_L to value 0xffff_ffff"] -impl crate::Resettable for MAC_ADDR_L_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0xffff_ffff - } +impl crate::Resettable for MacAddrLSpec { + const RESET_VALUE: u32 = 0xffff_ffff; } diff --git a/va416xx/src/eth/mac_config.rs b/va416xx/src/eth/mac_config.rs index a37ed51..c855b13 100644 --- a/va416xx/src/eth/mac_config.rs +++ b/va416xx/src/eth/mac_config.rs @@ -1,929 +1,310 @@ #[doc = "Register `MAC_CONFIG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `MAC_CONFIG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `WD` reader - Watchdog disable"] -pub struct WD_R(crate::FieldReader); -impl WD_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - WD_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for WD_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `WD` writer - Watchdog disable"] -pub struct WD_W<'a> { - w: &'a mut W, -} -impl<'a> WD_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 23)) | ((value as u32 & 0x01) << 23); - self.w - } -} -#[doc = "Field `JD` reader - Jabber Disable"] -pub struct JD_R(crate::FieldReader); -impl JD_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - JD_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for JD_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `JD` writer - Jabber Disable"] -pub struct JD_W<'a> { - w: &'a mut W, -} -impl<'a> JD_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 22)) | ((value as u32 & 0x01) << 22); - self.w - } -} -#[doc = "Field `BE` reader - Frame Burst Enable"] -pub struct BE_R(crate::FieldReader); -impl BE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - BE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `BE` writer - Frame Burst Enable"] -pub struct BE_W<'a> { - w: &'a mut W, -} -impl<'a> BE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 21)) | ((value as u32 & 0x01) << 21); - self.w - } -} -#[doc = "Field `JE` reader - Jumbo Frame Enable"] -pub struct JE_R(crate::FieldReader); -impl JE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - JE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for JE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `JE` writer - Jumbo Frame Enable"] -pub struct JE_W<'a> { - w: &'a mut W, -} -impl<'a> JE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 20)) | ((value as u32 & 0x01) << 20); - self.w - } -} -#[doc = "Field `IFG` reader - Inter-Frame Gap"] -pub struct IFG_R(crate::FieldReader); -impl IFG_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - IFG_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for IFG_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `IFG` writer - Inter-Frame Gap"] -pub struct IFG_W<'a> { - w: &'a mut W, -} -impl<'a> IFG_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x07 << 17)) | ((value as u32 & 0x07) << 17); - self.w - } -} -#[doc = "Field `DCRS` reader - Disable Carrier Sense During Transmission"] -pub struct DCRS_R(crate::FieldReader); -impl DCRS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - DCRS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for DCRS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `DCRS` writer - Disable Carrier Sense During Transmission"] -pub struct DCRS_W<'a> { - w: &'a mut W, -} -impl<'a> DCRS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16); - self.w - } -} -#[doc = "Field `PS` reader - Port Select"] -pub struct PS_R(crate::FieldReader); -impl PS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - PS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `PS` writer - Port Select"] -pub struct PS_W<'a> { - w: &'a mut W, -} -impl<'a> PS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); - self.w - } -} -#[doc = "Field `FES` reader - Speed"] -pub struct FES_R(crate::FieldReader); -impl FES_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - FES_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for FES_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `FES` writer - Speed"] -pub struct FES_W<'a> { - w: &'a mut W, -} -impl<'a> FES_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); - self.w - } -} -#[doc = "Field `DRO` reader - Disable Receive Own"] -pub struct DRO_R(crate::FieldReader); -impl DRO_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - DRO_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for DRO_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `DRO` writer - Disable Receive Own"] -pub struct DRO_W<'a> { - w: &'a mut W, -} -impl<'a> DRO_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); - self.w - } -} -#[doc = "Field `LM` reader - Loopback Mode"] -pub struct LM_R(crate::FieldReader); -impl LM_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - LM_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for LM_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `LM` writer - Loopback Mode"] -pub struct LM_W<'a> { - w: &'a mut W, -} -impl<'a> LM_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); - self.w - } -} -#[doc = "Field `DM` reader - Duplex Mode"] -pub struct DM_R(crate::FieldReader); -impl DM_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - DM_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for DM_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `DM` writer - Duplex Mode"] -pub struct DM_W<'a> { - w: &'a mut W, -} -impl<'a> DM_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); - self.w - } -} -#[doc = "Field `IPC` reader - Checksum Offload"] -pub struct IPC_R(crate::FieldReader); -impl IPC_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - IPC_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for IPC_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `IPC` writer - Checksum Offload"] -pub struct IPC_W<'a> { - w: &'a mut W, -} -impl<'a> IPC_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); - self.w - } -} -#[doc = "Field `DR` reader - Disable Retry"] -pub struct DR_R(crate::FieldReader); -impl DR_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - DR_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for DR_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `DR` writer - Disable Retry"] -pub struct DR_W<'a> { - w: &'a mut W, -} -impl<'a> DR_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); - self.w - } -} -#[doc = "Field `ACS` reader - Automatic Pad, or CRC Stripping"] -pub struct ACS_R(crate::FieldReader); -impl ACS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - ACS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ACS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `ACS` writer - Automatic Pad, or CRC Stripping"] -pub struct ACS_W<'a> { - w: &'a mut W, -} -impl<'a> ACS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); - self.w - } -} -#[doc = "Field `BL` reader - Back-Off-Limit"] -pub struct BL_R(crate::FieldReader); -impl BL_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `BL` writer - Back-Off-Limit"] -pub struct BL_W<'a> { - w: &'a mut W, -} -impl<'a> BL_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x03 << 5)) | ((value as u32 & 0x03) << 5); - self.w - } -} -#[doc = "Field `DC` reader - Deferral Check"] -pub struct DC_R(crate::FieldReader); -impl DC_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - DC_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for DC_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `DC` writer - Deferral Check"] -pub struct DC_W<'a> { - w: &'a mut W, -} -impl<'a> DC_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); - self.w - } -} -#[doc = "Field `TE` reader - Transmitter Enable"] -pub struct TE_R(crate::FieldReader); -impl TE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TE` writer - Transmitter Enable"] -pub struct TE_W<'a> { - w: &'a mut W, -} -impl<'a> TE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); - self.w - } -} -#[doc = "Field `RE` reader - Receiver Enable"] -pub struct RE_R(crate::FieldReader); -impl RE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RE` writer - Receiver Enable"] -pub struct RE_W<'a> { - w: &'a mut W, -} -impl<'a> RE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); - self.w - } -} +pub type W = crate::W; #[doc = "Field `PRELEN` reader - Preamble Length for Transmit frames"] -pub struct PRELEN_R(crate::FieldReader); -impl PRELEN_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - PRELEN_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PRELEN_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type PrelenR = crate::FieldReader; #[doc = "Field `PRELEN` writer - Preamble Length for Transmit frames"] -pub struct PRELEN_W<'a> { - w: &'a mut W, -} -impl<'a> PRELEN_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0x03) | (value as u32 & 0x03); - self.w - } -} +pub type PrelenW<'a, REG> = crate::FieldWriter<'a, REG, 2>; +#[doc = "Field `RE` reader - Receiver Enable"] +pub type ReR = crate::BitReader; +#[doc = "Field `RE` writer - Receiver Enable"] +pub type ReW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TE` reader - Transmitter Enable"] +pub type TeR = crate::BitReader; +#[doc = "Field `TE` writer - Transmitter Enable"] +pub type TeW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `DC` reader - Deferral Check"] +pub type DcR = crate::BitReader; +#[doc = "Field `DC` writer - Deferral Check"] +pub type DcW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `BL` reader - Back-Off-Limit"] +pub type BlR = crate::FieldReader; +#[doc = "Field `BL` writer - Back-Off-Limit"] +pub type BlW<'a, REG> = crate::FieldWriter<'a, REG, 2>; +#[doc = "Field `ACS` reader - Automatic Pad, or CRC Stripping"] +pub type AcsR = crate::BitReader; +#[doc = "Field `ACS` writer - Automatic Pad, or CRC Stripping"] +pub type AcsW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `DR` reader - Disable Retry"] +pub type DrR = crate::BitReader; +#[doc = "Field `DR` writer - Disable Retry"] +pub type DrW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `IPC` reader - Checksum Offload"] +pub type IpcR = crate::BitReader; +#[doc = "Field `IPC` writer - Checksum Offload"] +pub type IpcW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `DM` reader - Duplex Mode"] +pub type DmR = crate::BitReader; +#[doc = "Field `DM` writer - Duplex Mode"] +pub type DmW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `LM` reader - Loopback Mode"] +pub type LmR = crate::BitReader; +#[doc = "Field `LM` writer - Loopback Mode"] +pub type LmW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `DRO` reader - Disable Receive Own"] +pub type DroR = crate::BitReader; +#[doc = "Field `DRO` writer - Disable Receive Own"] +pub type DroW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `FES` reader - Speed"] +pub type FesR = crate::BitReader; +#[doc = "Field `FES` writer - Speed"] +pub type FesW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `PS` reader - Port Select"] +pub type PsR = crate::BitReader; +#[doc = "Field `PS` writer - Port Select"] +pub type PsW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `DCRS` reader - Disable Carrier Sense During Transmission"] +pub type DcrsR = crate::BitReader; +#[doc = "Field `DCRS` writer - Disable Carrier Sense During Transmission"] +pub type DcrsW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `IFG` reader - Inter-Frame Gap"] +pub type IfgR = crate::FieldReader; +#[doc = "Field `IFG` writer - Inter-Frame Gap"] +pub type IfgW<'a, REG> = crate::FieldWriter<'a, REG, 3>; +#[doc = "Field `JE` reader - Jumbo Frame Enable"] +pub type JeR = crate::BitReader; +#[doc = "Field `JE` writer - Jumbo Frame Enable"] +pub type JeW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `BE` reader - Frame Burst Enable"] +pub type BeR = crate::BitReader; +#[doc = "Field `BE` writer - Frame Burst Enable"] +pub type BeW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `JD` reader - Jabber Disable"] +pub type JdR = crate::BitReader; +#[doc = "Field `JD` writer - Jabber Disable"] +pub type JdW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `WD` reader - Watchdog disable"] +pub type WdR = crate::BitReader; +#[doc = "Field `WD` writer - Watchdog disable"] +pub type WdW<'a, REG> = crate::BitWriter<'a, REG>; impl R { - #[doc = "Bit 23 - Watchdog disable"] + #[doc = "Bits 0:1 - Preamble Length for Transmit frames"] #[inline(always)] - pub fn wd(&self) -> WD_R { - WD_R::new(((self.bits >> 23) & 0x01) != 0) - } - #[doc = "Bit 22 - Jabber Disable"] - #[inline(always)] - pub fn jd(&self) -> JD_R { - JD_R::new(((self.bits >> 22) & 0x01) != 0) - } - #[doc = "Bit 21 - Frame Burst Enable"] - #[inline(always)] - pub fn be(&self) -> BE_R { - BE_R::new(((self.bits >> 21) & 0x01) != 0) - } - #[doc = "Bit 20 - Jumbo Frame Enable"] - #[inline(always)] - pub fn je(&self) -> JE_R { - JE_R::new(((self.bits >> 20) & 0x01) != 0) - } - #[doc = "Bits 17:19 - Inter-Frame Gap"] - #[inline(always)] - pub fn ifg(&self) -> IFG_R { - IFG_R::new(((self.bits >> 17) & 0x07) as u8) - } - #[doc = "Bit 16 - Disable Carrier Sense During Transmission"] - #[inline(always)] - pub fn dcrs(&self) -> DCRS_R { - DCRS_R::new(((self.bits >> 16) & 0x01) != 0) - } - #[doc = "Bit 15 - Port Select"] - #[inline(always)] - pub fn ps(&self) -> PS_R { - PS_R::new(((self.bits >> 15) & 0x01) != 0) - } - #[doc = "Bit 14 - Speed"] - #[inline(always)] - pub fn fes(&self) -> FES_R { - FES_R::new(((self.bits >> 14) & 0x01) != 0) - } - #[doc = "Bit 13 - Disable Receive Own"] - #[inline(always)] - pub fn dro(&self) -> DRO_R { - DRO_R::new(((self.bits >> 13) & 0x01) != 0) - } - #[doc = "Bit 12 - Loopback Mode"] - #[inline(always)] - pub fn lm(&self) -> LM_R { - LM_R::new(((self.bits >> 12) & 0x01) != 0) - } - #[doc = "Bit 11 - Duplex Mode"] - #[inline(always)] - pub fn dm(&self) -> DM_R { - DM_R::new(((self.bits >> 11) & 0x01) != 0) - } - #[doc = "Bit 10 - Checksum Offload"] - #[inline(always)] - pub fn ipc(&self) -> IPC_R { - IPC_R::new(((self.bits >> 10) & 0x01) != 0) - } - #[doc = "Bit 9 - Disable Retry"] - #[inline(always)] - pub fn dr(&self) -> DR_R { - DR_R::new(((self.bits >> 9) & 0x01) != 0) - } - #[doc = "Bit 7 - Automatic Pad, or CRC Stripping"] - #[inline(always)] - pub fn acs(&self) -> ACS_R { - ACS_R::new(((self.bits >> 7) & 0x01) != 0) - } - #[doc = "Bits 5:6 - Back-Off-Limit"] - #[inline(always)] - pub fn bl(&self) -> BL_R { - BL_R::new(((self.bits >> 5) & 0x03) as u8) - } - #[doc = "Bit 4 - Deferral Check"] - #[inline(always)] - pub fn dc(&self) -> DC_R { - DC_R::new(((self.bits >> 4) & 0x01) != 0) - } - #[doc = "Bit 3 - Transmitter Enable"] - #[inline(always)] - pub fn te(&self) -> TE_R { - TE_R::new(((self.bits >> 3) & 0x01) != 0) + pub fn prelen(&self) -> PrelenR { + PrelenR::new((self.bits & 3) as u8) } #[doc = "Bit 2 - Receiver Enable"] #[inline(always)] - pub fn re(&self) -> RE_R { - RE_R::new(((self.bits >> 2) & 0x01) != 0) + pub fn re(&self) -> ReR { + ReR::new(((self.bits >> 2) & 1) != 0) } - #[doc = "Bits 0:1 - Preamble Length for Transmit frames"] + #[doc = "Bit 3 - Transmitter Enable"] #[inline(always)] - pub fn prelen(&self) -> PRELEN_R { - PRELEN_R::new((self.bits & 0x03) as u8) + pub fn te(&self) -> TeR { + TeR::new(((self.bits >> 3) & 1) != 0) + } + #[doc = "Bit 4 - Deferral Check"] + #[inline(always)] + pub fn dc(&self) -> DcR { + DcR::new(((self.bits >> 4) & 1) != 0) + } + #[doc = "Bits 5:6 - Back-Off-Limit"] + #[inline(always)] + pub fn bl(&self) -> BlR { + BlR::new(((self.bits >> 5) & 3) as u8) + } + #[doc = "Bit 7 - Automatic Pad, or CRC Stripping"] + #[inline(always)] + pub fn acs(&self) -> AcsR { + AcsR::new(((self.bits >> 7) & 1) != 0) + } + #[doc = "Bit 9 - Disable Retry"] + #[inline(always)] + pub fn dr(&self) -> DrR { + DrR::new(((self.bits >> 9) & 1) != 0) + } + #[doc = "Bit 10 - Checksum Offload"] + #[inline(always)] + pub fn ipc(&self) -> IpcR { + IpcR::new(((self.bits >> 10) & 1) != 0) + } + #[doc = "Bit 11 - Duplex Mode"] + #[inline(always)] + pub fn dm(&self) -> DmR { + DmR::new(((self.bits >> 11) & 1) != 0) + } + #[doc = "Bit 12 - Loopback Mode"] + #[inline(always)] + pub fn lm(&self) -> LmR { + LmR::new(((self.bits >> 12) & 1) != 0) + } + #[doc = "Bit 13 - Disable Receive Own"] + #[inline(always)] + pub fn dro(&self) -> DroR { + DroR::new(((self.bits >> 13) & 1) != 0) + } + #[doc = "Bit 14 - Speed"] + #[inline(always)] + pub fn fes(&self) -> FesR { + FesR::new(((self.bits >> 14) & 1) != 0) + } + #[doc = "Bit 15 - Port Select"] + #[inline(always)] + pub fn ps(&self) -> PsR { + PsR::new(((self.bits >> 15) & 1) != 0) + } + #[doc = "Bit 16 - Disable Carrier Sense During Transmission"] + #[inline(always)] + pub fn dcrs(&self) -> DcrsR { + DcrsR::new(((self.bits >> 16) & 1) != 0) + } + #[doc = "Bits 17:19 - Inter-Frame Gap"] + #[inline(always)] + pub fn ifg(&self) -> IfgR { + IfgR::new(((self.bits >> 17) & 7) as u8) + } + #[doc = "Bit 20 - Jumbo Frame Enable"] + #[inline(always)] + pub fn je(&self) -> JeR { + JeR::new(((self.bits >> 20) & 1) != 0) + } + #[doc = "Bit 21 - Frame Burst Enable"] + #[inline(always)] + pub fn be(&self) -> BeR { + BeR::new(((self.bits >> 21) & 1) != 0) + } + #[doc = "Bit 22 - Jabber Disable"] + #[inline(always)] + pub fn jd(&self) -> JdR { + JdR::new(((self.bits >> 22) & 1) != 0) + } + #[doc = "Bit 23 - Watchdog disable"] + #[inline(always)] + pub fn wd(&self) -> WdR { + WdR::new(((self.bits >> 23) & 1) != 0) } } impl W { - #[doc = "Bit 23 - Watchdog disable"] + #[doc = "Bits 0:1 - Preamble Length for Transmit frames"] #[inline(always)] - pub fn wd(&mut self) -> WD_W { - WD_W { w: self } - } - #[doc = "Bit 22 - Jabber Disable"] - #[inline(always)] - pub fn jd(&mut self) -> JD_W { - JD_W { w: self } - } - #[doc = "Bit 21 - Frame Burst Enable"] - #[inline(always)] - pub fn be(&mut self) -> BE_W { - BE_W { w: self } - } - #[doc = "Bit 20 - Jumbo Frame Enable"] - #[inline(always)] - pub fn je(&mut self) -> JE_W { - JE_W { w: self } - } - #[doc = "Bits 17:19 - Inter-Frame Gap"] - #[inline(always)] - pub fn ifg(&mut self) -> IFG_W { - IFG_W { w: self } - } - #[doc = "Bit 16 - Disable Carrier Sense During Transmission"] - #[inline(always)] - pub fn dcrs(&mut self) -> DCRS_W { - DCRS_W { w: self } - } - #[doc = "Bit 15 - Port Select"] - #[inline(always)] - pub fn ps(&mut self) -> PS_W { - PS_W { w: self } - } - #[doc = "Bit 14 - Speed"] - #[inline(always)] - pub fn fes(&mut self) -> FES_W { - FES_W { w: self } - } - #[doc = "Bit 13 - Disable Receive Own"] - #[inline(always)] - pub fn dro(&mut self) -> DRO_W { - DRO_W { w: self } - } - #[doc = "Bit 12 - Loopback Mode"] - #[inline(always)] - pub fn lm(&mut self) -> LM_W { - LM_W { w: self } - } - #[doc = "Bit 11 - Duplex Mode"] - #[inline(always)] - pub fn dm(&mut self) -> DM_W { - DM_W { w: self } - } - #[doc = "Bit 10 - Checksum Offload"] - #[inline(always)] - pub fn ipc(&mut self) -> IPC_W { - IPC_W { w: self } - } - #[doc = "Bit 9 - Disable Retry"] - #[inline(always)] - pub fn dr(&mut self) -> DR_W { - DR_W { w: self } - } - #[doc = "Bit 7 - Automatic Pad, or CRC Stripping"] - #[inline(always)] - pub fn acs(&mut self) -> ACS_W { - ACS_W { w: self } - } - #[doc = "Bits 5:6 - Back-Off-Limit"] - #[inline(always)] - pub fn bl(&mut self) -> BL_W { - BL_W { w: self } - } - #[doc = "Bit 4 - Deferral Check"] - #[inline(always)] - pub fn dc(&mut self) -> DC_W { - DC_W { w: self } - } - #[doc = "Bit 3 - Transmitter Enable"] - #[inline(always)] - pub fn te(&mut self) -> TE_W { - TE_W { w: self } + #[must_use] + pub fn prelen(&mut self) -> PrelenW { + PrelenW::new(self, 0) } #[doc = "Bit 2 - Receiver Enable"] #[inline(always)] - pub fn re(&mut self) -> RE_W { - RE_W { w: self } + #[must_use] + pub fn re(&mut self) -> ReW { + ReW::new(self, 2) } - #[doc = "Bits 0:1 - Preamble Length for Transmit frames"] + #[doc = "Bit 3 - Transmitter Enable"] #[inline(always)] - pub fn prelen(&mut self) -> PRELEN_W { - PRELEN_W { w: self } + #[must_use] + pub fn te(&mut self) -> TeW { + TeW::new(self, 3) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bit 4 - Deferral Check"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn dc(&mut self) -> DcW { + DcW::new(self, 4) + } + #[doc = "Bits 5:6 - Back-Off-Limit"] + #[inline(always)] + #[must_use] + pub fn bl(&mut self) -> BlW { + BlW::new(self, 5) + } + #[doc = "Bit 7 - Automatic Pad, or CRC Stripping"] + #[inline(always)] + #[must_use] + pub fn acs(&mut self) -> AcsW { + AcsW::new(self, 7) + } + #[doc = "Bit 9 - Disable Retry"] + #[inline(always)] + #[must_use] + pub fn dr(&mut self) -> DrW { + DrW::new(self, 9) + } + #[doc = "Bit 10 - Checksum Offload"] + #[inline(always)] + #[must_use] + pub fn ipc(&mut self) -> IpcW { + IpcW::new(self, 10) + } + #[doc = "Bit 11 - Duplex Mode"] + #[inline(always)] + #[must_use] + pub fn dm(&mut self) -> DmW { + DmW::new(self, 11) + } + #[doc = "Bit 12 - Loopback Mode"] + #[inline(always)] + #[must_use] + pub fn lm(&mut self) -> LmW { + LmW::new(self, 12) + } + #[doc = "Bit 13 - Disable Receive Own"] + #[inline(always)] + #[must_use] + pub fn dro(&mut self) -> DroW { + DroW::new(self, 13) + } + #[doc = "Bit 14 - Speed"] + #[inline(always)] + #[must_use] + pub fn fes(&mut self) -> FesW { + FesW::new(self, 14) + } + #[doc = "Bit 15 - Port Select"] + #[inline(always)] + #[must_use] + pub fn ps(&mut self) -> PsW { + PsW::new(self, 15) + } + #[doc = "Bit 16 - Disable Carrier Sense During Transmission"] + #[inline(always)] + #[must_use] + pub fn dcrs(&mut self) -> DcrsW { + DcrsW::new(self, 16) + } + #[doc = "Bits 17:19 - Inter-Frame Gap"] + #[inline(always)] + #[must_use] + pub fn ifg(&mut self) -> IfgW { + IfgW::new(self, 17) + } + #[doc = "Bit 20 - Jumbo Frame Enable"] + #[inline(always)] + #[must_use] + pub fn je(&mut self) -> JeW { + JeW::new(self, 20) + } + #[doc = "Bit 21 - Frame Burst Enable"] + #[inline(always)] + #[must_use] + pub fn be(&mut self) -> BeW { + BeW::new(self, 21) + } + #[doc = "Bit 22 - Jabber Disable"] + #[inline(always)] + #[must_use] + pub fn jd(&mut self) -> JdW { + JdW::new(self, 22) + } + #[doc = "Bit 23 - Watchdog disable"] + #[inline(always)] + #[must_use] + pub fn wd(&mut self) -> WdW { + WdW::new(self, 23) } } -#[doc = "Operation mode register for the MAC\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [mac_config](index.html) module"] -pub struct MAC_CONFIG_SPEC; -impl crate::RegisterSpec for MAC_CONFIG_SPEC { +#[doc = "Operation mode register for the MAC\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_config::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mac_config::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct MacConfigSpec; +impl crate::RegisterSpec for MacConfigSpec { type Ux = u32; } -#[doc = "`read()` method returns [mac_config::R](R) reader structure"] -impl crate::Readable for MAC_CONFIG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [mac_config::W](W) writer structure"] -impl crate::Writable for MAC_CONFIG_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`mac_config::R`](R) reader structure"] +impl crate::Readable for MacConfigSpec {} +#[doc = "`write(|w| ..)` method takes [`mac_config::W`](W) writer structure"] +impl crate::Writable for MacConfigSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MAC_CONFIG to value 0"] -impl crate::Resettable for MAC_CONFIG_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for MacConfigSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/mac_debug.rs b/va416xx/src/eth/mac_debug.rs index 14d8b2b..b95f3d4 100644 --- a/va416xx/src/eth/mac_debug.rs +++ b/va416xx/src/eth/mac_debug.rs @@ -1,273 +1,99 @@ #[doc = "Register `MAC_DEBUG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Field `TXSTSFSTS` reader - MTL TxStatus FIFO Full Status"] -pub struct TXSTSFSTS_R(crate::FieldReader); -impl TXSTSFSTS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXSTSFSTS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXSTSFSTS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TXFSTS` reader - MTL Tx FIFO Not Empty Status"] -pub struct TXFSTS_R(crate::FieldReader); -impl TXFSTS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXFSTS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXFSTS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TWCSTS` reader - MTL Tx FIFO Write Controller Status"] -pub struct TWCSTS_R(crate::FieldReader); -impl TWCSTS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TWCSTS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TWCSTS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TRCSTS` reader - MTL Tx FIFO Read Controller Status"] -pub struct TRCSTS_R(crate::FieldReader); -impl TRCSTS_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - TRCSTS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TRCSTS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TXPAUSED` reader - MAC Transmitter in Pause"] -pub struct TXPAUSED_R(crate::FieldReader); -impl TXPAUSED_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXPAUSED_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXPAUSED_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TFCSTS` reader - PAC Transmit Frame Controller Status"] -pub struct TFCSTS_R(crate::FieldReader); -impl TFCSTS_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - TFCSTS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TFCSTS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TPESTS` reader - MAC GMII or MII Transmit Protocol Engine Status"] -pub struct TPESTS_R(crate::FieldReader); -impl TPESTS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TPESTS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TPESTS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RXFSTS` reader - MTL RxFIFO Fill-Level Status"] -pub struct RXFSTS_R(crate::FieldReader); -impl RXFSTS_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - RXFSTS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXFSTS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RRCSTS` reader - MTL RxFIFO Read Controller State"] -pub struct RRCSTS_R(crate::FieldReader); -impl RRCSTS_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - RRCSTS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RRCSTS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RWCSTS` reader - MTL Rx FIFO Write Controller Active Status"] -pub struct RWCSTS_R(crate::FieldReader); -impl RWCSTS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RWCSTS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RWCSTS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RFCFCSTS` reader - MAC Receive Frame FIFO Controller Status"] -pub struct RFCFCSTS_R(crate::FieldReader); -impl RFCFCSTS_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - RFCFCSTS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RFCFCSTS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type R = crate::R; #[doc = "Field `RPESTS` reader - MAC GMII or MII Receive Protocol Engine Status"] -pub struct RPESTS_R(crate::FieldReader); -impl RPESTS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RPESTS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RPESTS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type RpestsR = crate::BitReader; +#[doc = "Field `RFCFCSTS` reader - MAC Receive Frame FIFO Controller Status"] +pub type RfcfcstsR = crate::FieldReader; +#[doc = "Field `RWCSTS` reader - MTL Rx FIFO Write Controller Active Status"] +pub type RwcstsR = crate::BitReader; +#[doc = "Field `RRCSTS` reader - MTL RxFIFO Read Controller State"] +pub type RrcstsR = crate::FieldReader; +#[doc = "Field `RXFSTS` reader - MTL RxFIFO Fill-Level Status"] +pub type RxfstsR = crate::FieldReader; +#[doc = "Field `TPESTS` reader - MAC GMII or MII Transmit Protocol Engine Status"] +pub type TpestsR = crate::BitReader; +#[doc = "Field `TFCSTS` reader - PAC Transmit Frame Controller Status"] +pub type TfcstsR = crate::FieldReader; +#[doc = "Field `TXPAUSED` reader - MAC Transmitter in Pause"] +pub type TxpausedR = crate::BitReader; +#[doc = "Field `TRCSTS` reader - MTL Tx FIFO Read Controller Status"] +pub type TrcstsR = crate::FieldReader; +#[doc = "Field `TWCSTS` reader - MTL Tx FIFO Write Controller Status"] +pub type TwcstsR = crate::BitReader; +#[doc = "Field `TXFSTS` reader - MTL Tx FIFO Not Empty Status"] +pub type TxfstsR = crate::BitReader; +#[doc = "Field `TXSTSFSTS` reader - MTL TxStatus FIFO Full Status"] +pub type TxstsfstsR = crate::BitReader; impl R { - #[doc = "Bit 25 - MTL TxStatus FIFO Full Status"] + #[doc = "Bit 0 - MAC GMII or MII Receive Protocol Engine Status"] #[inline(always)] - pub fn txstsfsts(&self) -> TXSTSFSTS_R { - TXSTSFSTS_R::new(((self.bits >> 25) & 0x01) != 0) - } - #[doc = "Bit 24 - MTL Tx FIFO Not Empty Status"] - #[inline(always)] - pub fn txfsts(&self) -> TXFSTS_R { - TXFSTS_R::new(((self.bits >> 24) & 0x01) != 0) - } - #[doc = "Bit 22 - MTL Tx FIFO Write Controller Status"] - #[inline(always)] - pub fn twcsts(&self) -> TWCSTS_R { - TWCSTS_R::new(((self.bits >> 22) & 0x01) != 0) - } - #[doc = "Bits 20:21 - MTL Tx FIFO Read Controller Status"] - #[inline(always)] - pub fn trcsts(&self) -> TRCSTS_R { - TRCSTS_R::new(((self.bits >> 20) & 0x03) as u8) - } - #[doc = "Bit 19 - MAC Transmitter in Pause"] - #[inline(always)] - pub fn txpaused(&self) -> TXPAUSED_R { - TXPAUSED_R::new(((self.bits >> 19) & 0x01) != 0) - } - #[doc = "Bits 17:18 - PAC Transmit Frame Controller Status"] - #[inline(always)] - pub fn tfcsts(&self) -> TFCSTS_R { - TFCSTS_R::new(((self.bits >> 17) & 0x03) as u8) - } - #[doc = "Bit 16 - MAC GMII or MII Transmit Protocol Engine Status"] - #[inline(always)] - pub fn tpests(&self) -> TPESTS_R { - TPESTS_R::new(((self.bits >> 16) & 0x01) != 0) - } - #[doc = "Bits 8:9 - MTL RxFIFO Fill-Level Status"] - #[inline(always)] - pub fn rxfsts(&self) -> RXFSTS_R { - RXFSTS_R::new(((self.bits >> 8) & 0x03) as u8) - } - #[doc = "Bits 5:6 - MTL RxFIFO Read Controller State"] - #[inline(always)] - pub fn rrcsts(&self) -> RRCSTS_R { - RRCSTS_R::new(((self.bits >> 5) & 0x03) as u8) - } - #[doc = "Bit 4 - MTL Rx FIFO Write Controller Active Status"] - #[inline(always)] - pub fn rwcsts(&self) -> RWCSTS_R { - RWCSTS_R::new(((self.bits >> 4) & 0x01) != 0) + pub fn rpests(&self) -> RpestsR { + RpestsR::new((self.bits & 1) != 0) } #[doc = "Bits 1:2 - MAC Receive Frame FIFO Controller Status"] #[inline(always)] - pub fn rfcfcsts(&self) -> RFCFCSTS_R { - RFCFCSTS_R::new(((self.bits >> 1) & 0x03) as u8) + pub fn rfcfcsts(&self) -> RfcfcstsR { + RfcfcstsR::new(((self.bits >> 1) & 3) as u8) } - #[doc = "Bit 0 - MAC GMII or MII Receive Protocol Engine Status"] + #[doc = "Bit 4 - MTL Rx FIFO Write Controller Active Status"] #[inline(always)] - pub fn rpests(&self) -> RPESTS_R { - RPESTS_R::new((self.bits & 0x01) != 0) + pub fn rwcsts(&self) -> RwcstsR { + RwcstsR::new(((self.bits >> 4) & 1) != 0) + } + #[doc = "Bits 5:6 - MTL RxFIFO Read Controller State"] + #[inline(always)] + pub fn rrcsts(&self) -> RrcstsR { + RrcstsR::new(((self.bits >> 5) & 3) as u8) + } + #[doc = "Bits 8:9 - MTL RxFIFO Fill-Level Status"] + #[inline(always)] + pub fn rxfsts(&self) -> RxfstsR { + RxfstsR::new(((self.bits >> 8) & 3) as u8) + } + #[doc = "Bit 16 - MAC GMII or MII Transmit Protocol Engine Status"] + #[inline(always)] + pub fn tpests(&self) -> TpestsR { + TpestsR::new(((self.bits >> 16) & 1) != 0) + } + #[doc = "Bits 17:18 - PAC Transmit Frame Controller Status"] + #[inline(always)] + pub fn tfcsts(&self) -> TfcstsR { + TfcstsR::new(((self.bits >> 17) & 3) as u8) + } + #[doc = "Bit 19 - MAC Transmitter in Pause"] + #[inline(always)] + pub fn txpaused(&self) -> TxpausedR { + TxpausedR::new(((self.bits >> 19) & 1) != 0) + } + #[doc = "Bits 20:21 - MTL Tx FIFO Read Controller Status"] + #[inline(always)] + pub fn trcsts(&self) -> TrcstsR { + TrcstsR::new(((self.bits >> 20) & 3) as u8) + } + #[doc = "Bit 22 - MTL Tx FIFO Write Controller Status"] + #[inline(always)] + pub fn twcsts(&self) -> TwcstsR { + TwcstsR::new(((self.bits >> 22) & 1) != 0) + } + #[doc = "Bit 24 - MTL Tx FIFO Not Empty Status"] + #[inline(always)] + pub fn txfsts(&self) -> TxfstsR { + TxfstsR::new(((self.bits >> 24) & 1) != 0) + } + #[doc = "Bit 25 - MTL TxStatus FIFO Full Status"] + #[inline(always)] + pub fn txstsfsts(&self) -> TxstsfstsR { + TxstsfstsR::new(((self.bits >> 25) & 1) != 0) } } -#[doc = "Gives the status of the various internal blocks for debugging\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [mac_debug](index.html) module"] -pub struct MAC_DEBUG_SPEC; -impl crate::RegisterSpec for MAC_DEBUG_SPEC { +#[doc = "Gives the status of the various internal blocks for debugging\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_debug::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct MacDebugSpec; +impl crate::RegisterSpec for MacDebugSpec { type Ux = u32; } -#[doc = "`read()` method returns [mac_debug::R](R) reader structure"] -impl crate::Readable for MAC_DEBUG_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`mac_debug::R`](R) reader structure"] +impl crate::Readable for MacDebugSpec {} #[doc = "`reset()` method sets MAC_DEBUG to value 0"] -impl crate::Resettable for MAC_DEBUG_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for MacDebugSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/mac_flow_ctrl.rs b/va416xx/src/eth/mac_flow_ctrl.rs index 190009d..27f4bd2 100644 --- a/va416xx/src/eth/mac_flow_ctrl.rs +++ b/va416xx/src/eth/mac_flow_ctrl.rs @@ -1,375 +1,130 @@ #[doc = "Register `MAC_FLOW_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `MAC_FLOW_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `PT` reader - Pause time"] -pub struct PT_R(crate::FieldReader); -impl PT_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - PT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `PT` writer - Pause time"] -pub struct PT_W<'a> { - w: &'a mut W, -} -impl<'a> PT_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !(0xffff << 16)) | ((value as u32 & 0xffff) << 16); - self.w - } -} -#[doc = "Field `DZPQ` reader - Disable Zero-Quanta Pause"] -pub struct DZPQ_R(crate::FieldReader); -impl DZPQ_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - DZPQ_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for DZPQ_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `DZPQ` writer - Disable Zero-Quanta Pause"] -pub struct DZPQ_W<'a> { - w: &'a mut W, -} -impl<'a> DZPQ_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); - self.w - } -} -#[doc = "Field `PLT` reader - Pause Low Threshold"] -pub struct PLT_R(crate::FieldReader); -impl PLT_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - PLT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PLT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `PLT` writer - Pause Low Threshold"] -pub struct PLT_W<'a> { - w: &'a mut W, -} -impl<'a> PLT_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x03 << 4)) | ((value as u32 & 0x03) << 4); - self.w - } -} -#[doc = "Field `UP` reader - Unicast Pause Frame Detect"] -pub struct UP_R(crate::FieldReader); -impl UP_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - UP_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for UP_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `UP` writer - Unicast Pause Frame Detect"] -pub struct UP_W<'a> { - w: &'a mut W, -} -impl<'a> UP_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); - self.w - } -} -#[doc = "Field `RFE` reader - Receive Flow Control Enable"] -pub struct RFE_R(crate::FieldReader); -impl RFE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RFE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RFE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RFE` writer - Receive Flow Control Enable"] -pub struct RFE_W<'a> { - w: &'a mut W, -} -impl<'a> RFE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); - self.w - } -} -#[doc = "Field `TFE` reader - Transmit Flow Control Enable"] -pub struct TFE_R(crate::FieldReader); -impl TFE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TFE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TFE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TFE` writer - Transmit Flow Control Enable"] -pub struct TFE_W<'a> { - w: &'a mut W, -} -impl<'a> TFE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); - self.w - } -} +pub type W = crate::W; #[doc = "Field `FCB_BPA` reader - Flow Control Busy or Backpressure Activate"] -pub struct FCB_BPA_R(crate::FieldReader); -impl FCB_BPA_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - FCB_BPA_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for FCB_BPA_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type FcbBpaR = crate::BitReader; #[doc = "Field `FCB_BPA` writer - Flow Control Busy or Backpressure Activate"] -pub struct FCB_BPA_W<'a> { - w: &'a mut W, -} -impl<'a> FCB_BPA_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} +pub type FcbBpaW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TFE` reader - Transmit Flow Control Enable"] +pub type TfeR = crate::BitReader; +#[doc = "Field `TFE` writer - Transmit Flow Control Enable"] +pub type TfeW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `RFE` reader - Receive Flow Control Enable"] +pub type RfeR = crate::BitReader; +#[doc = "Field `RFE` writer - Receive Flow Control Enable"] +pub type RfeW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `UP` reader - Unicast Pause Frame Detect"] +pub type UpR = crate::BitReader; +#[doc = "Field `UP` writer - Unicast Pause Frame Detect"] +pub type UpW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `PLT` reader - Pause Low Threshold"] +pub type PltR = crate::FieldReader; +#[doc = "Field `PLT` writer - Pause Low Threshold"] +pub type PltW<'a, REG> = crate::FieldWriter<'a, REG, 2>; +#[doc = "Field `DZPQ` reader - Disable Zero-Quanta Pause"] +pub type DzpqR = crate::BitReader; +#[doc = "Field `DZPQ` writer - Disable Zero-Quanta Pause"] +pub type DzpqW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `PT` reader - Pause time"] +pub type PtR = crate::FieldReader; +#[doc = "Field `PT` writer - Pause time"] +pub type PtW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { - #[doc = "Bits 16:31 - Pause time"] + #[doc = "Bit 0 - Flow Control Busy or Backpressure Activate"] #[inline(always)] - pub fn pt(&self) -> PT_R { - PT_R::new(((self.bits >> 16) & 0xffff) as u16) - } - #[doc = "Bit 7 - Disable Zero-Quanta Pause"] - #[inline(always)] - pub fn dzpq(&self) -> DZPQ_R { - DZPQ_R::new(((self.bits >> 7) & 0x01) != 0) - } - #[doc = "Bits 4:5 - Pause Low Threshold"] - #[inline(always)] - pub fn plt(&self) -> PLT_R { - PLT_R::new(((self.bits >> 4) & 0x03) as u8) - } - #[doc = "Bit 3 - Unicast Pause Frame Detect"] - #[inline(always)] - pub fn up(&self) -> UP_R { - UP_R::new(((self.bits >> 3) & 0x01) != 0) - } - #[doc = "Bit 2 - Receive Flow Control Enable"] - #[inline(always)] - pub fn rfe(&self) -> RFE_R { - RFE_R::new(((self.bits >> 2) & 0x01) != 0) + pub fn fcb_bpa(&self) -> FcbBpaR { + FcbBpaR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Transmit Flow Control Enable"] #[inline(always)] - pub fn tfe(&self) -> TFE_R { - TFE_R::new(((self.bits >> 1) & 0x01) != 0) + pub fn tfe(&self) -> TfeR { + TfeR::new(((self.bits >> 1) & 1) != 0) } - #[doc = "Bit 0 - Flow Control Busy or Backpressure Activate"] + #[doc = "Bit 2 - Receive Flow Control Enable"] #[inline(always)] - pub fn fcb_bpa(&self) -> FCB_BPA_R { - FCB_BPA_R::new((self.bits & 0x01) != 0) + pub fn rfe(&self) -> RfeR { + RfeR::new(((self.bits >> 2) & 1) != 0) + } + #[doc = "Bit 3 - Unicast Pause Frame Detect"] + #[inline(always)] + pub fn up(&self) -> UpR { + UpR::new(((self.bits >> 3) & 1) != 0) + } + #[doc = "Bits 4:5 - Pause Low Threshold"] + #[inline(always)] + pub fn plt(&self) -> PltR { + PltR::new(((self.bits >> 4) & 3) as u8) + } + #[doc = "Bit 7 - Disable Zero-Quanta Pause"] + #[inline(always)] + pub fn dzpq(&self) -> DzpqR { + DzpqR::new(((self.bits >> 7) & 1) != 0) + } + #[doc = "Bits 16:31 - Pause time"] + #[inline(always)] + pub fn pt(&self) -> PtR { + PtR::new(((self.bits >> 16) & 0xffff) as u16) } } impl W { - #[doc = "Bits 16:31 - Pause time"] + #[doc = "Bit 0 - Flow Control Busy or Backpressure Activate"] #[inline(always)] - pub fn pt(&mut self) -> PT_W { - PT_W { w: self } - } - #[doc = "Bit 7 - Disable Zero-Quanta Pause"] - #[inline(always)] - pub fn dzpq(&mut self) -> DZPQ_W { - DZPQ_W { w: self } - } - #[doc = "Bits 4:5 - Pause Low Threshold"] - #[inline(always)] - pub fn plt(&mut self) -> PLT_W { - PLT_W { w: self } - } - #[doc = "Bit 3 - Unicast Pause Frame Detect"] - #[inline(always)] - pub fn up(&mut self) -> UP_W { - UP_W { w: self } - } - #[doc = "Bit 2 - Receive Flow Control Enable"] - #[inline(always)] - pub fn rfe(&mut self) -> RFE_W { - RFE_W { w: self } + #[must_use] + pub fn fcb_bpa(&mut self) -> FcbBpaW { + FcbBpaW::new(self, 0) } #[doc = "Bit 1 - Transmit Flow Control Enable"] #[inline(always)] - pub fn tfe(&mut self) -> TFE_W { - TFE_W { w: self } + #[must_use] + pub fn tfe(&mut self) -> TfeW { + TfeW::new(self, 1) } - #[doc = "Bit 0 - Flow Control Busy or Backpressure Activate"] + #[doc = "Bit 2 - Receive Flow Control Enable"] #[inline(always)] - pub fn fcb_bpa(&mut self) -> FCB_BPA_W { - FCB_BPA_W { w: self } + #[must_use] + pub fn rfe(&mut self) -> RfeW { + RfeW::new(self, 2) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bit 3 - Unicast Pause Frame Detect"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn up(&mut self) -> UpW { + UpW::new(self, 3) + } + #[doc = "Bits 4:5 - Pause Low Threshold"] + #[inline(always)] + #[must_use] + pub fn plt(&mut self) -> PltW { + PltW::new(self, 4) + } + #[doc = "Bit 7 - Disable Zero-Quanta Pause"] + #[inline(always)] + #[must_use] + pub fn dzpq(&mut self) -> DzpqW { + DzpqW::new(self, 7) + } + #[doc = "Bits 16:31 - Pause time"] + #[inline(always)] + #[must_use] + pub fn pt(&mut self) -> PtW { + PtW::new(self, 16) } } -#[doc = "Controls the generation of control frames\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [mac_flow_ctrl](index.html) module"] -pub struct MAC_FLOW_CTRL_SPEC; -impl crate::RegisterSpec for MAC_FLOW_CTRL_SPEC { +#[doc = "Controls the generation of control frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_flow_ctrl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mac_flow_ctrl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct MacFlowCtrlSpec; +impl crate::RegisterSpec for MacFlowCtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [mac_flow_ctrl::R](R) reader structure"] -impl crate::Readable for MAC_FLOW_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [mac_flow_ctrl::W](W) writer structure"] -impl crate::Writable for MAC_FLOW_CTRL_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`mac_flow_ctrl::R`](R) reader structure"] +impl crate::Readable for MacFlowCtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`mac_flow_ctrl::W`](W) writer structure"] +impl crate::Writable for MacFlowCtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MAC_FLOW_CTRL to value 0"] -impl crate::Resettable for MAC_FLOW_CTRL_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for MacFlowCtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/mac_frame_fltr.rs b/va416xx/src/eth/mac_frame_fltr.rs index 2ca0e7c..4ac7cd2 100644 --- a/va416xx/src/eth/mac_frame_fltr.rs +++ b/va416xx/src/eth/mac_frame_fltr.rs @@ -1,667 +1,220 @@ #[doc = "Register `MAC_FRAME_FLTR` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `MAC_FRAME_FLTR` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `RA` reader - Receive All"] -pub struct RA_R(crate::FieldReader); -impl RA_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RA_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RA_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RA` writer - Receive All"] -pub struct RA_W<'a> { - w: &'a mut W, -} -impl<'a> RA_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 31)) | ((value as u32 & 0x01) << 31); - self.w - } -} -#[doc = "Field `DNTU` reader - Drop non TCP/UDP over IP Frames"] -pub struct DNTU_R(crate::FieldReader); -impl DNTU_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - DNTU_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for DNTU_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `DNTU` writer - Drop non TCP/UDP over IP Frames"] -pub struct DNTU_W<'a> { - w: &'a mut W, -} -impl<'a> DNTU_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 21)) | ((value as u32 & 0x01) << 21); - self.w - } -} -#[doc = "Field `VFTE` reader - VLAN Tag Filter Enable"] -pub struct VFTE_R(crate::FieldReader); -impl VFTE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - VFTE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for VFTE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `VFTE` writer - VLAN Tag Filter Enable"] -pub struct VFTE_W<'a> { - w: &'a mut W, -} -impl<'a> VFTE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16); - self.w - } -} -#[doc = "Field `HDF` reader - Hash or Perfect Filter"] -pub struct HDF_R(crate::FieldReader); -impl HDF_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - HDF_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for HDF_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `HDF` writer - Hash or Perfect Filter"] -pub struct HDF_W<'a> { - w: &'a mut W, -} -impl<'a> HDF_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); - self.w - } -} -#[doc = "Field `SAF` reader - Source Address Filter Enable"] -pub struct SAF_R(crate::FieldReader); -impl SAF_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - SAF_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for SAF_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `SAF` writer - Source Address Filter Enable"] -pub struct SAF_W<'a> { - w: &'a mut W, -} -impl<'a> SAF_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); - self.w - } -} -#[doc = "Field `SAIF` reader - SA Inverse Filtering"] -pub struct SAIF_R(crate::FieldReader); -impl SAIF_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - SAIF_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for SAIF_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `SAIF` writer - SA Inverse Filtering"] -pub struct SAIF_W<'a> { - w: &'a mut W, -} -impl<'a> SAIF_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); - self.w - } -} -#[doc = "Field `PCF` reader - Pass Control Frames"] -pub struct PCF_R(crate::FieldReader); -impl PCF_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - PCF_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PCF_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `PCF` writer - Pass Control Frames"] -pub struct PCF_W<'a> { - w: &'a mut W, -} -impl<'a> PCF_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x03 << 6)) | ((value as u32 & 0x03) << 6); - self.w - } -} -#[doc = "Field `DBF` reader - Disable Broadcast Frames"] -pub struct DBF_R(crate::FieldReader); -impl DBF_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - DBF_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for DBF_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `DBF` writer - Disable Broadcast Frames"] -pub struct DBF_W<'a> { - w: &'a mut W, -} -impl<'a> DBF_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); - self.w - } -} -#[doc = "Field `PM` reader - Pass All Multicast"] -pub struct PM_R(crate::FieldReader); -impl PM_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - PM_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PM_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `PM` writer - Pass All Multicast"] -pub struct PM_W<'a> { - w: &'a mut W, -} -impl<'a> PM_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); - self.w - } -} -#[doc = "Field `DAIF` reader - DA Inverse Filtering"] -pub struct DAIF_R(crate::FieldReader); -impl DAIF_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - DAIF_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for DAIF_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `DAIF` writer - DA Inverse Filtering"] -pub struct DAIF_W<'a> { - w: &'a mut W, -} -impl<'a> DAIF_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); - self.w - } -} -#[doc = "Field `HMC` reader - Hash Multicast"] -pub struct HMC_R(crate::FieldReader); -impl HMC_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - HMC_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for HMC_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `HMC` writer - Hash Multicast"] -pub struct HMC_W<'a> { - w: &'a mut W, -} -impl<'a> HMC_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); - self.w - } -} -#[doc = "Field `HUC` reader - Hash Unicast"] -pub struct HUC_R(crate::FieldReader); -impl HUC_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - HUC_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for HUC_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `HUC` writer - Hash Unicast"] -pub struct HUC_W<'a> { - w: &'a mut W, -} -impl<'a> HUC_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); - self.w - } -} +pub type W = crate::W; #[doc = "Field `PR` reader - Promiscuous Mode"] -pub struct PR_R(crate::FieldReader); -impl PR_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - PR_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PR_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type PrR = crate::BitReader; #[doc = "Field `PR` writer - Promiscuous Mode"] -pub struct PR_W<'a> { - w: &'a mut W, -} -impl<'a> PR_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} +pub type PrW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `HUC` reader - Hash Unicast"] +pub type HucR = crate::BitReader; +#[doc = "Field `HUC` writer - Hash Unicast"] +pub type HucW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `HMC` reader - Hash Multicast"] +pub type HmcR = crate::BitReader; +#[doc = "Field `HMC` writer - Hash Multicast"] +pub type HmcW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `DAIF` reader - DA Inverse Filtering"] +pub type DaifR = crate::BitReader; +#[doc = "Field `DAIF` writer - DA Inverse Filtering"] +pub type DaifW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `PM` reader - Pass All Multicast"] +pub type PmR = crate::BitReader; +#[doc = "Field `PM` writer - Pass All Multicast"] +pub type PmW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `DBF` reader - Disable Broadcast Frames"] +pub type DbfR = crate::BitReader; +#[doc = "Field `DBF` writer - Disable Broadcast Frames"] +pub type DbfW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `PCF` reader - Pass Control Frames"] +pub type PcfR = crate::FieldReader; +#[doc = "Field `PCF` writer - Pass Control Frames"] +pub type PcfW<'a, REG> = crate::FieldWriter<'a, REG, 2>; +#[doc = "Field `SAIF` reader - SA Inverse Filtering"] +pub type SaifR = crate::BitReader; +#[doc = "Field `SAIF` writer - SA Inverse Filtering"] +pub type SaifW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `SAF` reader - Source Address Filter Enable"] +pub type SafR = crate::BitReader; +#[doc = "Field `SAF` writer - Source Address Filter Enable"] +pub type SafW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `HDF` reader - Hash or Perfect Filter"] +pub type HdfR = crate::BitReader; +#[doc = "Field `HDF` writer - Hash or Perfect Filter"] +pub type HdfW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `VFTE` reader - VLAN Tag Filter Enable"] +pub type VfteR = crate::BitReader; +#[doc = "Field `VFTE` writer - VLAN Tag Filter Enable"] +pub type VfteW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `DNTU` reader - Drop non TCP/UDP over IP Frames"] +pub type DntuR = crate::BitReader; +#[doc = "Field `DNTU` writer - Drop non TCP/UDP over IP Frames"] +pub type DntuW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `RA` reader - Receive All"] +pub type RaR = crate::BitReader; +#[doc = "Field `RA` writer - Receive All"] +pub type RaW<'a, REG> = crate::BitWriter<'a, REG>; impl R { - #[doc = "Bit 31 - Receive All"] + #[doc = "Bit 0 - Promiscuous Mode"] #[inline(always)] - pub fn ra(&self) -> RA_R { - RA_R::new(((self.bits >> 31) & 0x01) != 0) - } - #[doc = "Bit 21 - Drop non TCP/UDP over IP Frames"] - #[inline(always)] - pub fn dntu(&self) -> DNTU_R { - DNTU_R::new(((self.bits >> 21) & 0x01) != 0) - } - #[doc = "Bit 16 - VLAN Tag Filter Enable"] - #[inline(always)] - pub fn vfte(&self) -> VFTE_R { - VFTE_R::new(((self.bits >> 16) & 0x01) != 0) - } - #[doc = "Bit 10 - Hash or Perfect Filter"] - #[inline(always)] - pub fn hdf(&self) -> HDF_R { - HDF_R::new(((self.bits >> 10) & 0x01) != 0) - } - #[doc = "Bit 9 - Source Address Filter Enable"] - #[inline(always)] - pub fn saf(&self) -> SAF_R { - SAF_R::new(((self.bits >> 9) & 0x01) != 0) - } - #[doc = "Bit 8 - SA Inverse Filtering"] - #[inline(always)] - pub fn saif(&self) -> SAIF_R { - SAIF_R::new(((self.bits >> 8) & 0x01) != 0) - } - #[doc = "Bits 6:7 - Pass Control Frames"] - #[inline(always)] - pub fn pcf(&self) -> PCF_R { - PCF_R::new(((self.bits >> 6) & 0x03) as u8) - } - #[doc = "Bit 5 - Disable Broadcast Frames"] - #[inline(always)] - pub fn dbf(&self) -> DBF_R { - DBF_R::new(((self.bits >> 5) & 0x01) != 0) - } - #[doc = "Bit 4 - Pass All Multicast"] - #[inline(always)] - pub fn pm(&self) -> PM_R { - PM_R::new(((self.bits >> 4) & 0x01) != 0) - } - #[doc = "Bit 3 - DA Inverse Filtering"] - #[inline(always)] - pub fn daif(&self) -> DAIF_R { - DAIF_R::new(((self.bits >> 3) & 0x01) != 0) - } - #[doc = "Bit 2 - Hash Multicast"] - #[inline(always)] - pub fn hmc(&self) -> HMC_R { - HMC_R::new(((self.bits >> 2) & 0x01) != 0) + pub fn pr(&self) -> PrR { + PrR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Hash Unicast"] #[inline(always)] - pub fn huc(&self) -> HUC_R { - HUC_R::new(((self.bits >> 1) & 0x01) != 0) + pub fn huc(&self) -> HucR { + HucR::new(((self.bits >> 1) & 1) != 0) } - #[doc = "Bit 0 - Promiscuous Mode"] + #[doc = "Bit 2 - Hash Multicast"] #[inline(always)] - pub fn pr(&self) -> PR_R { - PR_R::new((self.bits & 0x01) != 0) + pub fn hmc(&self) -> HmcR { + HmcR::new(((self.bits >> 2) & 1) != 0) + } + #[doc = "Bit 3 - DA Inverse Filtering"] + #[inline(always)] + pub fn daif(&self) -> DaifR { + DaifR::new(((self.bits >> 3) & 1) != 0) + } + #[doc = "Bit 4 - Pass All Multicast"] + #[inline(always)] + pub fn pm(&self) -> PmR { + PmR::new(((self.bits >> 4) & 1) != 0) + } + #[doc = "Bit 5 - Disable Broadcast Frames"] + #[inline(always)] + pub fn dbf(&self) -> DbfR { + DbfR::new(((self.bits >> 5) & 1) != 0) + } + #[doc = "Bits 6:7 - Pass Control Frames"] + #[inline(always)] + pub fn pcf(&self) -> PcfR { + PcfR::new(((self.bits >> 6) & 3) as u8) + } + #[doc = "Bit 8 - SA Inverse Filtering"] + #[inline(always)] + pub fn saif(&self) -> SaifR { + SaifR::new(((self.bits >> 8) & 1) != 0) + } + #[doc = "Bit 9 - Source Address Filter Enable"] + #[inline(always)] + pub fn saf(&self) -> SafR { + SafR::new(((self.bits >> 9) & 1) != 0) + } + #[doc = "Bit 10 - Hash or Perfect Filter"] + #[inline(always)] + pub fn hdf(&self) -> HdfR { + HdfR::new(((self.bits >> 10) & 1) != 0) + } + #[doc = "Bit 16 - VLAN Tag Filter Enable"] + #[inline(always)] + pub fn vfte(&self) -> VfteR { + VfteR::new(((self.bits >> 16) & 1) != 0) + } + #[doc = "Bit 21 - Drop non TCP/UDP over IP Frames"] + #[inline(always)] + pub fn dntu(&self) -> DntuR { + DntuR::new(((self.bits >> 21) & 1) != 0) + } + #[doc = "Bit 31 - Receive All"] + #[inline(always)] + pub fn ra(&self) -> RaR { + RaR::new(((self.bits >> 31) & 1) != 0) } } impl W { - #[doc = "Bit 31 - Receive All"] + #[doc = "Bit 0 - Promiscuous Mode"] #[inline(always)] - pub fn ra(&mut self) -> RA_W { - RA_W { w: self } - } - #[doc = "Bit 21 - Drop non TCP/UDP over IP Frames"] - #[inline(always)] - pub fn dntu(&mut self) -> DNTU_W { - DNTU_W { w: self } - } - #[doc = "Bit 16 - VLAN Tag Filter Enable"] - #[inline(always)] - pub fn vfte(&mut self) -> VFTE_W { - VFTE_W { w: self } - } - #[doc = "Bit 10 - Hash or Perfect Filter"] - #[inline(always)] - pub fn hdf(&mut self) -> HDF_W { - HDF_W { w: self } - } - #[doc = "Bit 9 - Source Address Filter Enable"] - #[inline(always)] - pub fn saf(&mut self) -> SAF_W { - SAF_W { w: self } - } - #[doc = "Bit 8 - SA Inverse Filtering"] - #[inline(always)] - pub fn saif(&mut self) -> SAIF_W { - SAIF_W { w: self } - } - #[doc = "Bits 6:7 - Pass Control Frames"] - #[inline(always)] - pub fn pcf(&mut self) -> PCF_W { - PCF_W { w: self } - } - #[doc = "Bit 5 - Disable Broadcast Frames"] - #[inline(always)] - pub fn dbf(&mut self) -> DBF_W { - DBF_W { w: self } - } - #[doc = "Bit 4 - Pass All Multicast"] - #[inline(always)] - pub fn pm(&mut self) -> PM_W { - PM_W { w: self } - } - #[doc = "Bit 3 - DA Inverse Filtering"] - #[inline(always)] - pub fn daif(&mut self) -> DAIF_W { - DAIF_W { w: self } - } - #[doc = "Bit 2 - Hash Multicast"] - #[inline(always)] - pub fn hmc(&mut self) -> HMC_W { - HMC_W { w: self } + #[must_use] + pub fn pr(&mut self) -> PrW { + PrW::new(self, 0) } #[doc = "Bit 1 - Hash Unicast"] #[inline(always)] - pub fn huc(&mut self) -> HUC_W { - HUC_W { w: self } + #[must_use] + pub fn huc(&mut self) -> HucW { + HucW::new(self, 1) } - #[doc = "Bit 0 - Promiscuous Mode"] + #[doc = "Bit 2 - Hash Multicast"] #[inline(always)] - pub fn pr(&mut self) -> PR_W { - PR_W { w: self } + #[must_use] + pub fn hmc(&mut self) -> HmcW { + HmcW::new(self, 2) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bit 3 - DA Inverse Filtering"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn daif(&mut self) -> DaifW { + DaifW::new(self, 3) + } + #[doc = "Bit 4 - Pass All Multicast"] + #[inline(always)] + #[must_use] + pub fn pm(&mut self) -> PmW { + PmW::new(self, 4) + } + #[doc = "Bit 5 - Disable Broadcast Frames"] + #[inline(always)] + #[must_use] + pub fn dbf(&mut self) -> DbfW { + DbfW::new(self, 5) + } + #[doc = "Bits 6:7 - Pass Control Frames"] + #[inline(always)] + #[must_use] + pub fn pcf(&mut self) -> PcfW { + PcfW::new(self, 6) + } + #[doc = "Bit 8 - SA Inverse Filtering"] + #[inline(always)] + #[must_use] + pub fn saif(&mut self) -> SaifW { + SaifW::new(self, 8) + } + #[doc = "Bit 9 - Source Address Filter Enable"] + #[inline(always)] + #[must_use] + pub fn saf(&mut self) -> SafW { + SafW::new(self, 9) + } + #[doc = "Bit 10 - Hash or Perfect Filter"] + #[inline(always)] + #[must_use] + pub fn hdf(&mut self) -> HdfW { + HdfW::new(self, 10) + } + #[doc = "Bit 16 - VLAN Tag Filter Enable"] + #[inline(always)] + #[must_use] + pub fn vfte(&mut self) -> VfteW { + VfteW::new(self, 16) + } + #[doc = "Bit 21 - Drop non TCP/UDP over IP Frames"] + #[inline(always)] + #[must_use] + pub fn dntu(&mut self) -> DntuW { + DntuW::new(self, 21) + } + #[doc = "Bit 31 - Receive All"] + #[inline(always)] + #[must_use] + pub fn ra(&mut self) -> RaW { + RaW::new(self, 31) } } -#[doc = "Contains the frame filtering controls\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [mac_frame_fltr](index.html) module"] -pub struct MAC_FRAME_FLTR_SPEC; -impl crate::RegisterSpec for MAC_FRAME_FLTR_SPEC { +#[doc = "Contains the frame filtering controls\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_frame_fltr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mac_frame_fltr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct MacFrameFltrSpec; +impl crate::RegisterSpec for MacFrameFltrSpec { type Ux = u32; } -#[doc = "`read()` method returns [mac_frame_fltr::R](R) reader structure"] -impl crate::Readable for MAC_FRAME_FLTR_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [mac_frame_fltr::W](W) writer structure"] -impl crate::Writable for MAC_FRAME_FLTR_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`mac_frame_fltr::R`](R) reader structure"] +impl crate::Readable for MacFrameFltrSpec {} +#[doc = "`write(|w| ..)` method takes [`mac_frame_fltr::W`](W) writer structure"] +impl crate::Writable for MacFrameFltrSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MAC_FRAME_FLTR to value 0"] -impl crate::Resettable for MAC_FRAME_FLTR_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for MacFrameFltrSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/mac_gmii_addr.rs b/va416xx/src/eth/mac_gmii_addr.rs index a072474..3e2ad77 100644 --- a/va416xx/src/eth/mac_gmii_addr.rs +++ b/va416xx/src/eth/mac_gmii_addr.rs @@ -1,271 +1,100 @@ #[doc = "Register `MAC_GMII_ADDR` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `MAC_GMII_ADDR` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `PA` reader - Physical Layer Address"] -pub struct PA_R(crate::FieldReader); -impl PA_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - PA_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PA_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `PA` writer - Physical Layer Address"] -pub struct PA_W<'a> { - w: &'a mut W, -} -impl<'a> PA_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x1f << 11)) | ((value as u32 & 0x1f) << 11); - self.w - } -} -#[doc = "Field `GR` reader - GMII Register"] -pub struct GR_R(crate::FieldReader); -impl GR_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - GR_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for GR_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `GR` writer - GMII Register"] -pub struct GR_W<'a> { - w: &'a mut W, -} -impl<'a> GR_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x1f << 6)) | ((value as u32 & 0x1f) << 6); - self.w - } -} -#[doc = "Field `CR` reader - CSR Clock Range"] -pub struct CR_R(crate::FieldReader); -impl CR_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - CR_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CR_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CR` writer - CSR Clock Range"] -pub struct CR_W<'a> { - w: &'a mut W, -} -impl<'a> CR_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x0f << 2)) | ((value as u32 & 0x0f) << 2); - self.w - } -} -#[doc = "Field `GW` reader - GMII Write/Read"] -pub struct GW_R(crate::FieldReader); -impl GW_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - GW_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for GW_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `GW` writer - GMII Write/Read"] -pub struct GW_W<'a> { - w: &'a mut W, -} -impl<'a> GW_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); - self.w - } -} +pub type W = crate::W; #[doc = "Field `GB` reader - GMII Busy"] -pub struct GB_R(crate::FieldReader); -impl GB_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - GB_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for GB_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type GbR = crate::BitReader; #[doc = "Field `GB` writer - GMII Busy"] -pub struct GB_W<'a> { - w: &'a mut W, -} -impl<'a> GB_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} +pub type GbW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `GW` reader - GMII Write/Read"] +pub type GwR = crate::BitReader; +#[doc = "Field `GW` writer - GMII Write/Read"] +pub type GwW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `CR` reader - CSR Clock Range"] +pub type CrR = crate::FieldReader; +#[doc = "Field `CR` writer - CSR Clock Range"] +pub type CrW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +#[doc = "Field `GR` reader - GMII Register"] +pub type GrR = crate::FieldReader; +#[doc = "Field `GR` writer - GMII Register"] +pub type GrW<'a, REG> = crate::FieldWriter<'a, REG, 5>; +#[doc = "Field `PA` reader - Physical Layer Address"] +pub type PaR = crate::FieldReader; +#[doc = "Field `PA` writer - Physical Layer Address"] +pub type PaW<'a, REG> = crate::FieldWriter<'a, REG, 5>; impl R { - #[doc = "Bits 11:15 - Physical Layer Address"] + #[doc = "Bit 0 - GMII Busy"] #[inline(always)] - pub fn pa(&self) -> PA_R { - PA_R::new(((self.bits >> 11) & 0x1f) as u8) - } - #[doc = "Bits 6:10 - GMII Register"] - #[inline(always)] - pub fn gr(&self) -> GR_R { - GR_R::new(((self.bits >> 6) & 0x1f) as u8) - } - #[doc = "Bits 2:5 - CSR Clock Range"] - #[inline(always)] - pub fn cr(&self) -> CR_R { - CR_R::new(((self.bits >> 2) & 0x0f) as u8) + pub fn gb(&self) -> GbR { + GbR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - GMII Write/Read"] #[inline(always)] - pub fn gw(&self) -> GW_R { - GW_R::new(((self.bits >> 1) & 0x01) != 0) + pub fn gw(&self) -> GwR { + GwR::new(((self.bits >> 1) & 1) != 0) } - #[doc = "Bit 0 - GMII Busy"] + #[doc = "Bits 2:5 - CSR Clock Range"] #[inline(always)] - pub fn gb(&self) -> GB_R { - GB_R::new((self.bits & 0x01) != 0) + pub fn cr(&self) -> CrR { + CrR::new(((self.bits >> 2) & 0x0f) as u8) + } + #[doc = "Bits 6:10 - GMII Register"] + #[inline(always)] + pub fn gr(&self) -> GrR { + GrR::new(((self.bits >> 6) & 0x1f) as u8) + } + #[doc = "Bits 11:15 - Physical Layer Address"] + #[inline(always)] + pub fn pa(&self) -> PaR { + PaR::new(((self.bits >> 11) & 0x1f) as u8) } } impl W { - #[doc = "Bits 11:15 - Physical Layer Address"] + #[doc = "Bit 0 - GMII Busy"] #[inline(always)] - pub fn pa(&mut self) -> PA_W { - PA_W { w: self } - } - #[doc = "Bits 6:10 - GMII Register"] - #[inline(always)] - pub fn gr(&mut self) -> GR_W { - GR_W { w: self } - } - #[doc = "Bits 2:5 - CSR Clock Range"] - #[inline(always)] - pub fn cr(&mut self) -> CR_W { - CR_W { w: self } + #[must_use] + pub fn gb(&mut self) -> GbW { + GbW::new(self, 0) } #[doc = "Bit 1 - GMII Write/Read"] #[inline(always)] - pub fn gw(&mut self) -> GW_W { - GW_W { w: self } + #[must_use] + pub fn gw(&mut self) -> GwW { + GwW::new(self, 1) } - #[doc = "Bit 0 - GMII Busy"] + #[doc = "Bits 2:5 - CSR Clock Range"] #[inline(always)] - pub fn gb(&mut self) -> GB_W { - GB_W { w: self } + #[must_use] + pub fn cr(&mut self) -> CrW { + CrW::new(self, 2) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 6:10 - GMII Register"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn gr(&mut self) -> GrW { + GrW::new(self, 6) + } + #[doc = "Bits 11:15 - Physical Layer Address"] + #[inline(always)] + #[must_use] + pub fn pa(&mut self) -> PaW { + PaW::new(self, 11) } } -#[doc = "Controls the management cycles to an external PHY\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [mac_gmii_addr](index.html) module"] -pub struct MAC_GMII_ADDR_SPEC; -impl crate::RegisterSpec for MAC_GMII_ADDR_SPEC { +#[doc = "Controls the management cycles to an external PHY\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_gmii_addr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mac_gmii_addr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct MacGmiiAddrSpec; +impl crate::RegisterSpec for MacGmiiAddrSpec { type Ux = u32; } -#[doc = "`read()` method returns [mac_gmii_addr::R](R) reader structure"] -impl crate::Readable for MAC_GMII_ADDR_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [mac_gmii_addr::W](W) writer structure"] -impl crate::Writable for MAC_GMII_ADDR_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`mac_gmii_addr::R`](R) reader structure"] +impl crate::Readable for MacGmiiAddrSpec {} +#[doc = "`write(|w| ..)` method takes [`mac_gmii_addr::W`](W) writer structure"] +impl crate::Writable for MacGmiiAddrSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MAC_GMII_ADDR to value 0"] -impl crate::Resettable for MAC_GMII_ADDR_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for MacGmiiAddrSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/mac_gmii_data.rs b/va416xx/src/eth/mac_gmii_data.rs index 4565f2e..8fee346 100644 --- a/va416xx/src/eth/mac_gmii_data.rs +++ b/va416xx/src/eth/mac_gmii_data.rs @@ -1,103 +1,40 @@ #[doc = "Register `MAC_GMII_DATA` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `MAC_GMII_DATA` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `GD` reader - GMII Data"] -pub struct GD_R(crate::FieldReader); -impl GD_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - GD_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for GD_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type GdR = crate::FieldReader; #[doc = "Field `GD` writer - GMII Data"] -pub struct GD_W<'a> { - w: &'a mut W, -} -impl<'a> GD_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); - self.w - } -} +pub type GdW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - GMII Data"] #[inline(always)] - pub fn gd(&self) -> GD_R { - GD_R::new((self.bits & 0xffff) as u16) + pub fn gd(&self) -> GdR { + GdR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - GMII Data"] #[inline(always)] - pub fn gd(&mut self) -> GD_W { - GD_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn gd(&mut self) -> GdW { + GdW::new(self, 0) } } -#[doc = "Contains the data to be written to or read from the PHY register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [mac_gmii_data](index.html) module"] -pub struct MAC_GMII_DATA_SPEC; -impl crate::RegisterSpec for MAC_GMII_DATA_SPEC { +#[doc = "Contains the data to be written to or read from the PHY register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_gmii_data::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mac_gmii_data::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct MacGmiiDataSpec; +impl crate::RegisterSpec for MacGmiiDataSpec { type Ux = u32; } -#[doc = "`read()` method returns [mac_gmii_data::R](R) reader structure"] -impl crate::Readable for MAC_GMII_DATA_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [mac_gmii_data::W](W) writer structure"] -impl crate::Writable for MAC_GMII_DATA_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`mac_gmii_data::R`](R) reader structure"] +impl crate::Readable for MacGmiiDataSpec {} +#[doc = "`write(|w| ..)` method takes [`mac_gmii_data::W`](W) writer structure"] +impl crate::Writable for MacGmiiDataSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MAC_GMII_DATA to value 0"] -impl crate::Resettable for MAC_GMII_DATA_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for MacGmiiDataSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/mac_intr_mask.rs b/va416xx/src/eth/mac_intr_mask.rs index 3a8df9f..fd3b25b 100644 --- a/va416xx/src/eth/mac_intr_mask.rs +++ b/va416xx/src/eth/mac_intr_mask.rs @@ -1,113 +1,40 @@ #[doc = "Register `MAC_INTR_MASK` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `MAC_INTR_MASK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TSIM` reader - Timestamp Interrupt Mask"] -pub struct TSIM_R(crate::FieldReader); -impl TSIM_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TSIM_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TSIM_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type TsimR = crate::BitReader; #[doc = "Field `TSIM` writer - Timestamp Interrupt Mask"] -pub struct TSIM_W<'a> { - w: &'a mut W, -} -impl<'a> TSIM_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); - self.w - } -} +pub type TsimW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 9 - Timestamp Interrupt Mask"] #[inline(always)] - pub fn tsim(&self) -> TSIM_R { - TSIM_R::new(((self.bits >> 9) & 0x01) != 0) + pub fn tsim(&self) -> TsimR { + TsimR::new(((self.bits >> 9) & 1) != 0) } } impl W { #[doc = "Bit 9 - Timestamp Interrupt Mask"] #[inline(always)] - pub fn tsim(&mut self) -> TSIM_W { - TSIM_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn tsim(&mut self) -> TsimW { + TsimW::new(self, 9) } } -#[doc = "Contains the masks for generating interrupt\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [mac_intr_mask](index.html) module"] -pub struct MAC_INTR_MASK_SPEC; -impl crate::RegisterSpec for MAC_INTR_MASK_SPEC { +#[doc = "Contains the masks for generating interrupt\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_intr_mask::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mac_intr_mask::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct MacIntrMaskSpec; +impl crate::RegisterSpec for MacIntrMaskSpec { type Ux = u32; } -#[doc = "`read()` method returns [mac_intr_mask::R](R) reader structure"] -impl crate::Readable for MAC_INTR_MASK_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [mac_intr_mask::W](W) writer structure"] -impl crate::Writable for MAC_INTR_MASK_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`mac_intr_mask::R`](R) reader structure"] +impl crate::Readable for MacIntrMaskSpec {} +#[doc = "`write(|w| ..)` method takes [`mac_intr_mask::W`](W) writer structure"] +impl crate::Writable for MacIntrMaskSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MAC_INTR_MASK to value 0"] -impl crate::Resettable for MAC_INTR_MASK_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for MacIntrMaskSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/mac_intr_stat.rs b/va416xx/src/eth/mac_intr_stat.rs index b4de8f7..c5289b2 100644 --- a/va416xx/src/eth/mac_intr_stat.rs +++ b/va416xx/src/eth/mac_intr_stat.rs @@ -1,133 +1,50 @@ #[doc = "Register `MAC_INTR_STAT` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Field `TSIS` reader - Timestamp Interrupt Status"] -pub struct TSIS_R(crate::FieldReader); -impl TSIS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TSIS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TSIS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `MMCRXIPIS` reader - MMC Receive Checksum Offload Interrupt Status"] -pub struct MMCRXIPIS_R(crate::FieldReader); -impl MMCRXIPIS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - MMCRXIPIS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for MMCRXIPIS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `MMCTXIS` reader - MMC Transmit Interrupt Status"] -pub struct MMCTXIS_R(crate::FieldReader); -impl MMCTXIS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - MMCTXIS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for MMCTXIS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `MMCRXIS` reader - MMC Receive Interrupt Status"] -pub struct MMCRXIS_R(crate::FieldReader); -impl MMCRXIS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - MMCRXIS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for MMCRXIS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type R = crate::R; #[doc = "Field `MMCIS` reader - MMC Interrupt Status"] -pub struct MMCIS_R(crate::FieldReader); -impl MMCIS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - MMCIS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for MMCIS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type MmcisR = crate::BitReader; +#[doc = "Field `MMCRXIS` reader - MMC Receive Interrupt Status"] +pub type MmcrxisR = crate::BitReader; +#[doc = "Field `MMCTXIS` reader - MMC Transmit Interrupt Status"] +pub type MmctxisR = crate::BitReader; +#[doc = "Field `MMCRXIPIS` reader - MMC Receive Checksum Offload Interrupt Status"] +pub type MmcrxipisR = crate::BitReader; +#[doc = "Field `TSIS` reader - Timestamp Interrupt Status"] +pub type TsisR = crate::BitReader; impl R { - #[doc = "Bit 9 - Timestamp Interrupt Status"] + #[doc = "Bit 4 - MMC Interrupt Status"] #[inline(always)] - pub fn tsis(&self) -> TSIS_R { - TSIS_R::new(((self.bits >> 9) & 0x01) != 0) - } - #[doc = "Bit 7 - MMC Receive Checksum Offload Interrupt Status"] - #[inline(always)] - pub fn mmcrxipis(&self) -> MMCRXIPIS_R { - MMCRXIPIS_R::new(((self.bits >> 7) & 0x01) != 0) - } - #[doc = "Bit 6 - MMC Transmit Interrupt Status"] - #[inline(always)] - pub fn mmctxis(&self) -> MMCTXIS_R { - MMCTXIS_R::new(((self.bits >> 6) & 0x01) != 0) + pub fn mmcis(&self) -> MmcisR { + MmcisR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - MMC Receive Interrupt Status"] #[inline(always)] - pub fn mmcrxis(&self) -> MMCRXIS_R { - MMCRXIS_R::new(((self.bits >> 5) & 0x01) != 0) + pub fn mmcrxis(&self) -> MmcrxisR { + MmcrxisR::new(((self.bits >> 5) & 1) != 0) } - #[doc = "Bit 4 - MMC Interrupt Status"] + #[doc = "Bit 6 - MMC Transmit Interrupt Status"] #[inline(always)] - pub fn mmcis(&self) -> MMCIS_R { - MMCIS_R::new(((self.bits >> 4) & 0x01) != 0) + pub fn mmctxis(&self) -> MmctxisR { + MmctxisR::new(((self.bits >> 6) & 1) != 0) + } + #[doc = "Bit 7 - MMC Receive Checksum Offload Interrupt Status"] + #[inline(always)] + pub fn mmcrxipis(&self) -> MmcrxipisR { + MmcrxipisR::new(((self.bits >> 7) & 1) != 0) + } + #[doc = "Bit 9 - Timestamp Interrupt Status"] + #[inline(always)] + pub fn tsis(&self) -> TsisR { + TsisR::new(((self.bits >> 9) & 1) != 0) } } -#[doc = "Contains the interrupt status\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [mac_intr_stat](index.html) module"] -pub struct MAC_INTR_STAT_SPEC; -impl crate::RegisterSpec for MAC_INTR_STAT_SPEC { +#[doc = "Contains the interrupt status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_intr_stat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct MacIntrStatSpec; +impl crate::RegisterSpec for MacIntrStatSpec { type Ux = u32; } -#[doc = "`read()` method returns [mac_intr_stat::R](R) reader structure"] -impl crate::Readable for MAC_INTR_STAT_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`mac_intr_stat::R`](R) reader structure"] +impl crate::Readable for MacIntrStatSpec {} #[doc = "`reset()` method sets MAC_INTR_STAT to value 0"] -impl crate::Resettable for MAC_INTR_STAT_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for MacIntrStatSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/mac_vlan_tag.rs b/va416xx/src/eth/mac_vlan_tag.rs index 5d74de0..ffddabc 100644 --- a/va416xx/src/eth/mac_vlan_tag.rs +++ b/va416xx/src/eth/mac_vlan_tag.rs @@ -1,244 +1,85 @@ #[doc = "Register `MAC_VLAN_TAG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `MAC_VLAN_TAG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `ESVL` reader - Enable S-VLAN"] -pub struct ESVL_R(crate::FieldReader); -impl ESVL_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - ESVL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ESVL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `ESVL` writer - Enable S-VLAN"] -pub struct ESVL_W<'a> { - w: &'a mut W, -} -impl<'a> ESVL_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 18)) | ((value as u32 & 0x01) << 18); - self.w - } -} -#[doc = "Field `VTIM` reader - VLAN Tag Inverse Match Enable"] -pub struct VTIM_R(crate::FieldReader); -impl VTIM_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - VTIM_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for VTIM_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `VTIM` writer - VLAN Tag Inverse Match Enable"] -pub struct VTIM_W<'a> { - w: &'a mut W, -} -impl<'a> VTIM_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 17)) | ((value as u32 & 0x01) << 17); - self.w - } -} -#[doc = "Field `ETV` reader - Enable 12-Bit VLAN Tag Comparison"] -pub struct ETV_R(crate::FieldReader); -impl ETV_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - ETV_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ETV_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `ETV` writer - Enable 12-Bit VLAN Tag Comparison"] -pub struct ETV_W<'a> { - w: &'a mut W, -} -impl<'a> ETV_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16); - self.w - } -} +pub type W = crate::W; #[doc = "Field `VL` reader - VLAN Tag identifier for Receive Frames"] -pub struct VL_R(crate::FieldReader); -impl VL_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - VL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for VL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type VlR = crate::FieldReader; #[doc = "Field `VL` writer - VLAN Tag identifier for Receive Frames"] -pub struct VL_W<'a> { - w: &'a mut W, -} -impl<'a> VL_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); - self.w - } -} +pub type VlW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +#[doc = "Field `ETV` reader - Enable 12-Bit VLAN Tag Comparison"] +pub type EtvR = crate::BitReader; +#[doc = "Field `ETV` writer - Enable 12-Bit VLAN Tag Comparison"] +pub type EtvW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `VTIM` reader - VLAN Tag Inverse Match Enable"] +pub type VtimR = crate::BitReader; +#[doc = "Field `VTIM` writer - VLAN Tag Inverse Match Enable"] +pub type VtimW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `ESVL` reader - Enable S-VLAN"] +pub type EsvlR = crate::BitReader; +#[doc = "Field `ESVL` writer - Enable S-VLAN"] +pub type EsvlW<'a, REG> = crate::BitWriter<'a, REG>; impl R { - #[doc = "Bit 18 - Enable S-VLAN"] + #[doc = "Bits 0:15 - VLAN Tag identifier for Receive Frames"] #[inline(always)] - pub fn esvl(&self) -> ESVL_R { - ESVL_R::new(((self.bits >> 18) & 0x01) != 0) - } - #[doc = "Bit 17 - VLAN Tag Inverse Match Enable"] - #[inline(always)] - pub fn vtim(&self) -> VTIM_R { - VTIM_R::new(((self.bits >> 17) & 0x01) != 0) + pub fn vl(&self) -> VlR { + VlR::new((self.bits & 0xffff) as u16) } #[doc = "Bit 16 - Enable 12-Bit VLAN Tag Comparison"] #[inline(always)] - pub fn etv(&self) -> ETV_R { - ETV_R::new(((self.bits >> 16) & 0x01) != 0) + pub fn etv(&self) -> EtvR { + EtvR::new(((self.bits >> 16) & 1) != 0) } - #[doc = "Bits 0:15 - VLAN Tag identifier for Receive Frames"] + #[doc = "Bit 17 - VLAN Tag Inverse Match Enable"] #[inline(always)] - pub fn vl(&self) -> VL_R { - VL_R::new((self.bits & 0xffff) as u16) + pub fn vtim(&self) -> VtimR { + VtimR::new(((self.bits >> 17) & 1) != 0) + } + #[doc = "Bit 18 - Enable S-VLAN"] + #[inline(always)] + pub fn esvl(&self) -> EsvlR { + EsvlR::new(((self.bits >> 18) & 1) != 0) } } impl W { - #[doc = "Bit 18 - Enable S-VLAN"] + #[doc = "Bits 0:15 - VLAN Tag identifier for Receive Frames"] #[inline(always)] - pub fn esvl(&mut self) -> ESVL_W { - ESVL_W { w: self } - } - #[doc = "Bit 17 - VLAN Tag Inverse Match Enable"] - #[inline(always)] - pub fn vtim(&mut self) -> VTIM_W { - VTIM_W { w: self } + #[must_use] + pub fn vl(&mut self) -> VlW { + VlW::new(self, 0) } #[doc = "Bit 16 - Enable 12-Bit VLAN Tag Comparison"] #[inline(always)] - pub fn etv(&mut self) -> ETV_W { - ETV_W { w: self } + #[must_use] + pub fn etv(&mut self) -> EtvW { + EtvW::new(self, 16) } - #[doc = "Bits 0:15 - VLAN Tag identifier for Receive Frames"] + #[doc = "Bit 17 - VLAN Tag Inverse Match Enable"] #[inline(always)] - pub fn vl(&mut self) -> VL_W { - VL_W { w: self } + #[must_use] + pub fn vtim(&mut self) -> VtimW { + VtimW::new(self, 17) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bit 18 - Enable S-VLAN"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn esvl(&mut self) -> EsvlW { + EsvlW::new(self, 18) } } -#[doc = "Identifies IEEE 802.1Q VLAN type frames\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [mac_vlan_tag](index.html) module"] -pub struct MAC_VLAN_TAG_SPEC; -impl crate::RegisterSpec for MAC_VLAN_TAG_SPEC { +#[doc = "Identifies IEEE 802.1Q VLAN type frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_vlan_tag::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mac_vlan_tag::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct MacVlanTagSpec; +impl crate::RegisterSpec for MacVlanTagSpec { type Ux = u32; } -#[doc = "`read()` method returns [mac_vlan_tag::R](R) reader structure"] -impl crate::Readable for MAC_VLAN_TAG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [mac_vlan_tag::W](W) writer structure"] -impl crate::Writable for MAC_VLAN_TAG_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`mac_vlan_tag::R`](R) reader structure"] +impl crate::Readable for MacVlanTagSpec {} +#[doc = "`write(|w| ..)` method takes [`mac_vlan_tag::W`](W) writer structure"] +impl crate::Writable for MacVlanTagSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MAC_VLAN_TAG to value 0"] -impl crate::Resettable for MAC_VLAN_TAG_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for MacVlanTagSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/mac_wdog_to.rs b/va416xx/src/eth/mac_wdog_to.rs index 5feb0b8..a0ba4b0 100644 --- a/va416xx/src/eth/mac_wdog_to.rs +++ b/va416xx/src/eth/mac_wdog_to.rs @@ -1,150 +1,55 @@ #[doc = "Register `MAC_WDOG_TO` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `MAC_WDOG_TO` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `PWE` reader - Programmable Watchdog Enable"] -pub struct PWE_R(crate::FieldReader); -impl PWE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - PWE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PWE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `PWE` writer - Programmable Watchdog Enable"] -pub struct PWE_W<'a> { - w: &'a mut W, -} -impl<'a> PWE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16); - self.w - } -} +pub type W = crate::W; #[doc = "Field `WTO` reader - Watchdog Timeout"] -pub struct WTO_R(crate::FieldReader); -impl WTO_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - WTO_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for WTO_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type WtoR = crate::FieldReader; #[doc = "Field `WTO` writer - Watchdog Timeout"] -pub struct WTO_W<'a> { - w: &'a mut W, -} -impl<'a> WTO_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !0x3fff) | (value as u32 & 0x3fff); - self.w - } -} +pub type WtoW<'a, REG> = crate::FieldWriter<'a, REG, 14, u16>; +#[doc = "Field `PWE` reader - Programmable Watchdog Enable"] +pub type PweR = crate::BitReader; +#[doc = "Field `PWE` writer - Programmable Watchdog Enable"] +pub type PweW<'a, REG> = crate::BitWriter<'a, REG>; impl R { - #[doc = "Bit 16 - Programmable Watchdog Enable"] - #[inline(always)] - pub fn pwe(&self) -> PWE_R { - PWE_R::new(((self.bits >> 16) & 0x01) != 0) - } #[doc = "Bits 0:13 - Watchdog Timeout"] #[inline(always)] - pub fn wto(&self) -> WTO_R { - WTO_R::new((self.bits & 0x3fff) as u16) + pub fn wto(&self) -> WtoR { + WtoR::new((self.bits & 0x3fff) as u16) + } + #[doc = "Bit 16 - Programmable Watchdog Enable"] + #[inline(always)] + pub fn pwe(&self) -> PweR { + PweR::new(((self.bits >> 16) & 1) != 0) } } impl W { - #[doc = "Bit 16 - Programmable Watchdog Enable"] - #[inline(always)] - pub fn pwe(&mut self) -> PWE_W { - PWE_W { w: self } - } #[doc = "Bits 0:13 - Watchdog Timeout"] #[inline(always)] - pub fn wto(&mut self) -> WTO_W { - WTO_W { w: self } + #[must_use] + pub fn wto(&mut self) -> WtoW { + WtoW::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bit 16 - Programmable Watchdog Enable"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn pwe(&mut self) -> PweW { + PweW::new(self, 16) } } -#[doc = "Controls the watchdog time-out for received frames\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [mac_wdog_to](index.html) module"] -pub struct MAC_WDOG_TO_SPEC; -impl crate::RegisterSpec for MAC_WDOG_TO_SPEC { +#[doc = "Controls the watchdog time-out for received frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_wdog_to::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mac_wdog_to::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct MacWdogToSpec; +impl crate::RegisterSpec for MacWdogToSpec { type Ux = u32; } -#[doc = "`read()` method returns [mac_wdog_to::R](R) reader structure"] -impl crate::Readable for MAC_WDOG_TO_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [mac_wdog_to::W](W) writer structure"] -impl crate::Writable for MAC_WDOG_TO_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`mac_wdog_to::R`](R) reader structure"] +impl crate::Readable for MacWdogToSpec {} +#[doc = "`write(|w| ..)` method takes [`mac_wdog_to::W`](W) writer structure"] +impl crate::Writable for MacWdogToSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MAC_WDOG_TO to value 0"] -impl crate::Resettable for MAC_WDOG_TO_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for MacWdogToSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/mmc_cntrl.rs b/va416xx/src/eth/mmc_cntrl.rs index 86070b6..7d4c70a 100644 --- a/va416xx/src/eth/mmc_cntrl.rs +++ b/va416xx/src/eth/mmc_cntrl.rs @@ -1,395 +1,130 @@ #[doc = "Register `MMC_CNTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `MMC_CNTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `UCDBC` reader - Update MMC Counters for Dropped Broadcast Frames"] -pub struct UCDBC_R(crate::FieldReader); -impl UCDBC_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - UCDBC_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for UCDBC_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `UCDBC` writer - Update MMC Counters for Dropped Broadcast Frames"] -pub struct UCDBC_W<'a> { - w: &'a mut W, -} -impl<'a> UCDBC_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); - self.w - } -} -#[doc = "Field `CNTPRSTLVL` reader - Full-Half Preset"] -pub struct CNTPRSTLVL_R(crate::FieldReader); -impl CNTPRSTLVL_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CNTPRSTLVL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CNTPRSTLVL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CNTPRSTLVL` writer - Full-Half Preset"] -pub struct CNTPRSTLVL_W<'a> { - w: &'a mut W, -} -impl<'a> CNTPRSTLVL_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); - self.w - } -} -#[doc = "Field `CNTPRST` reader - Counters Preset"] -pub struct CNTPRST_R(crate::FieldReader); -impl CNTPRST_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CNTPRST_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CNTPRST_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CNTPRST` writer - Counters Preset"] -pub struct CNTPRST_W<'a> { - w: &'a mut W, -} -impl<'a> CNTPRST_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); - self.w - } -} -#[doc = "Field `CNTFREEZ` reader - MMC Counter Freeze"] -pub struct CNTFREEZ_R(crate::FieldReader); -impl CNTFREEZ_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CNTFREEZ_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CNTFREEZ_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CNTFREEZ` writer - MMC Counter Freeze"] -pub struct CNTFREEZ_W<'a> { - w: &'a mut W, -} -impl<'a> CNTFREEZ_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); - self.w - } -} -#[doc = "Field `RSTONRD` reader - Reset on Read"] -pub struct RSTONRD_R(crate::FieldReader); -impl RSTONRD_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RSTONRD_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RSTONRD_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RSTONRD` writer - Reset on Read"] -pub struct RSTONRD_W<'a> { - w: &'a mut W, -} -impl<'a> RSTONRD_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); - self.w - } -} -#[doc = "Field `CNTSTOPRO` reader - Counter Stop Rollover"] -pub struct CNTSTOPRO_R(crate::FieldReader); -impl CNTSTOPRO_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CNTSTOPRO_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CNTSTOPRO_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CNTSTOPRO` writer - Counter Stop Rollover"] -pub struct CNTSTOPRO_W<'a> { - w: &'a mut W, -} -impl<'a> CNTSTOPRO_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); - self.w - } -} +pub type W = crate::W; #[doc = "Field `CNTRST` reader - Counters Reset"] -pub struct CNTRST_R(crate::FieldReader); -impl CNTRST_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CNTRST_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CNTRST_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type CntrstR = crate::BitReader; #[doc = "Field `CNTRST` writer - Counters Reset"] -pub struct CNTRST_W<'a> { - w: &'a mut W, -} -impl<'a> CNTRST_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} +pub type CntrstW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `CNTSTOPRO` reader - Counter Stop Rollover"] +pub type CntstoproR = crate::BitReader; +#[doc = "Field `CNTSTOPRO` writer - Counter Stop Rollover"] +pub type CntstoproW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `RSTONRD` reader - Reset on Read"] +pub type RstonrdR = crate::BitReader; +#[doc = "Field `RSTONRD` writer - Reset on Read"] +pub type RstonrdW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `CNTFREEZ` reader - MMC Counter Freeze"] +pub type CntfreezR = crate::BitReader; +#[doc = "Field `CNTFREEZ` writer - MMC Counter Freeze"] +pub type CntfreezW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `CNTPRST` reader - Counters Preset"] +pub type CntprstR = crate::BitReader; +#[doc = "Field `CNTPRST` writer - Counters Preset"] +pub type CntprstW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `CNTPRSTLVL` reader - Full-Half Preset"] +pub type CntprstlvlR = crate::BitReader; +#[doc = "Field `CNTPRSTLVL` writer - Full-Half Preset"] +pub type CntprstlvlW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `UCDBC` reader - Update MMC Counters for Dropped Broadcast Frames"] +pub type UcdbcR = crate::BitReader; +#[doc = "Field `UCDBC` writer - Update MMC Counters for Dropped Broadcast Frames"] +pub type UcdbcW<'a, REG> = crate::BitWriter<'a, REG>; impl R { - #[doc = "Bit 8 - Update MMC Counters for Dropped Broadcast Frames"] + #[doc = "Bit 0 - Counters Reset"] #[inline(always)] - pub fn ucdbc(&self) -> UCDBC_R { - UCDBC_R::new(((self.bits >> 8) & 0x01) != 0) - } - #[doc = "Bit 5 - Full-Half Preset"] - #[inline(always)] - pub fn cntprstlvl(&self) -> CNTPRSTLVL_R { - CNTPRSTLVL_R::new(((self.bits >> 5) & 0x01) != 0) - } - #[doc = "Bit 4 - Counters Preset"] - #[inline(always)] - pub fn cntprst(&self) -> CNTPRST_R { - CNTPRST_R::new(((self.bits >> 4) & 0x01) != 0) - } - #[doc = "Bit 3 - MMC Counter Freeze"] - #[inline(always)] - pub fn cntfreez(&self) -> CNTFREEZ_R { - CNTFREEZ_R::new(((self.bits >> 3) & 0x01) != 0) - } - #[doc = "Bit 2 - Reset on Read"] - #[inline(always)] - pub fn rstonrd(&self) -> RSTONRD_R { - RSTONRD_R::new(((self.bits >> 2) & 0x01) != 0) + pub fn cntrst(&self) -> CntrstR { + CntrstR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Counter Stop Rollover"] #[inline(always)] - pub fn cntstopro(&self) -> CNTSTOPRO_R { - CNTSTOPRO_R::new(((self.bits >> 1) & 0x01) != 0) + pub fn cntstopro(&self) -> CntstoproR { + CntstoproR::new(((self.bits >> 1) & 1) != 0) } - #[doc = "Bit 0 - Counters Reset"] + #[doc = "Bit 2 - Reset on Read"] #[inline(always)] - pub fn cntrst(&self) -> CNTRST_R { - CNTRST_R::new((self.bits & 0x01) != 0) + pub fn rstonrd(&self) -> RstonrdR { + RstonrdR::new(((self.bits >> 2) & 1) != 0) + } + #[doc = "Bit 3 - MMC Counter Freeze"] + #[inline(always)] + pub fn cntfreez(&self) -> CntfreezR { + CntfreezR::new(((self.bits >> 3) & 1) != 0) + } + #[doc = "Bit 4 - Counters Preset"] + #[inline(always)] + pub fn cntprst(&self) -> CntprstR { + CntprstR::new(((self.bits >> 4) & 1) != 0) + } + #[doc = "Bit 5 - Full-Half Preset"] + #[inline(always)] + pub fn cntprstlvl(&self) -> CntprstlvlR { + CntprstlvlR::new(((self.bits >> 5) & 1) != 0) + } + #[doc = "Bit 8 - Update MMC Counters for Dropped Broadcast Frames"] + #[inline(always)] + pub fn ucdbc(&self) -> UcdbcR { + UcdbcR::new(((self.bits >> 8) & 1) != 0) } } impl W { - #[doc = "Bit 8 - Update MMC Counters for Dropped Broadcast Frames"] + #[doc = "Bit 0 - Counters Reset"] #[inline(always)] - pub fn ucdbc(&mut self) -> UCDBC_W { - UCDBC_W { w: self } - } - #[doc = "Bit 5 - Full-Half Preset"] - #[inline(always)] - pub fn cntprstlvl(&mut self) -> CNTPRSTLVL_W { - CNTPRSTLVL_W { w: self } - } - #[doc = "Bit 4 - Counters Preset"] - #[inline(always)] - pub fn cntprst(&mut self) -> CNTPRST_W { - CNTPRST_W { w: self } - } - #[doc = "Bit 3 - MMC Counter Freeze"] - #[inline(always)] - pub fn cntfreez(&mut self) -> CNTFREEZ_W { - CNTFREEZ_W { w: self } - } - #[doc = "Bit 2 - Reset on Read"] - #[inline(always)] - pub fn rstonrd(&mut self) -> RSTONRD_W { - RSTONRD_W { w: self } + #[must_use] + pub fn cntrst(&mut self) -> CntrstW { + CntrstW::new(self, 0) } #[doc = "Bit 1 - Counter Stop Rollover"] #[inline(always)] - pub fn cntstopro(&mut self) -> CNTSTOPRO_W { - CNTSTOPRO_W { w: self } + #[must_use] + pub fn cntstopro(&mut self) -> CntstoproW { + CntstoproW::new(self, 1) } - #[doc = "Bit 0 - Counters Reset"] + #[doc = "Bit 2 - Reset on Read"] #[inline(always)] - pub fn cntrst(&mut self) -> CNTRST_W { - CNTRST_W { w: self } + #[must_use] + pub fn rstonrd(&mut self) -> RstonrdW { + RstonrdW::new(self, 2) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bit 3 - MMC Counter Freeze"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn cntfreez(&mut self) -> CntfreezW { + CntfreezW::new(self, 3) + } + #[doc = "Bit 4 - Counters Preset"] + #[inline(always)] + #[must_use] + pub fn cntprst(&mut self) -> CntprstW { + CntprstW::new(self, 4) + } + #[doc = "Bit 5 - Full-Half Preset"] + #[inline(always)] + #[must_use] + pub fn cntprstlvl(&mut self) -> CntprstlvlW { + CntprstlvlW::new(self, 5) + } + #[doc = "Bit 8 - Update MMC Counters for Dropped Broadcast Frames"] + #[inline(always)] + #[must_use] + pub fn ucdbc(&mut self) -> UcdbcW { + UcdbcW::new(self, 8) } } -#[doc = "MMC Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [mmc_cntrl](index.html) module"] -pub struct MMC_CNTRL_SPEC; -impl crate::RegisterSpec for MMC_CNTRL_SPEC { +#[doc = "MMC Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mmc_cntrl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mmc_cntrl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct MmcCntrlSpec; +impl crate::RegisterSpec for MmcCntrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [mmc_cntrl::R](R) reader structure"] -impl crate::Readable for MMC_CNTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [mmc_cntrl::W](W) writer structure"] -impl crate::Writable for MMC_CNTRL_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`mmc_cntrl::R`](R) reader structure"] +impl crate::Readable for MmcCntrlSpec {} +#[doc = "`write(|w| ..)` method takes [`mmc_cntrl::W`](W) writer structure"] +impl crate::Writable for MmcCntrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MMC_CNTRL to value 0"] -impl crate::Resettable for MMC_CNTRL_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for MmcCntrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/mmc_intr_mask_rx.rs b/va416xx/src/eth/mmc_intr_mask_rx.rs index 1a929c8..6e771f2 100644 --- a/va416xx/src/eth/mmc_intr_mask_rx.rs +++ b/va416xx/src/eth/mmc_intr_mask_rx.rs @@ -1,1288 +1,415 @@ #[doc = "Register `MMC_INTR_MASK_RX` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `MMC_INTR_MASK_RX` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `RXCTRLFIM` reader - MMC Receive Control Frame Counter Interrupt Mask"] -pub struct RXCTRLFIM_R(crate::FieldReader); -impl RXCTRLFIM_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXCTRLFIM_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXCTRLFIM_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RXCTRLFIM` writer - MMC Receive Control Frame Counter Interrupt Mask"] -pub struct RXCTRLFIM_W<'a> { - w: &'a mut W, -} -impl<'a> RXCTRLFIM_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 25)) | ((value as u32 & 0x01) << 25); - self.w - } -} -#[doc = "Field `RXRCVERRFIM` reader - MMC Receive Error Frame Counter Interrupt Mask"] -pub struct RXRCVERRFIM_R(crate::FieldReader); -impl RXRCVERRFIM_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXRCVERRFIM_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXRCVERRFIM_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RXRCVERRFIM` writer - MMC Receive Error Frame Counter Interrupt Mask"] -pub struct RXRCVERRFIM_W<'a> { - w: &'a mut W, -} -impl<'a> RXRCVERRFIM_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 24)) | ((value as u32 & 0x01) << 24); - self.w - } -} -#[doc = "Field `RXWDOGFIM` reader - MMC Receive Watchdog Error Frame Counter Interrupt Mask"] -pub struct RXWDOGFIM_R(crate::FieldReader); -impl RXWDOGFIM_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXWDOGFIM_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXWDOGFIM_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RXWDOGFIM` writer - MMC Receive Watchdog Error Frame Counter Interrupt Mask"] -pub struct RXWDOGFIM_W<'a> { - w: &'a mut W, -} -impl<'a> RXWDOGFIM_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 23)) | ((value as u32 & 0x01) << 23); - self.w - } -} -#[doc = "Field `RXVLANGBFIM` reader - MMC Receive VLAN Good Bad Frame Counter Interrupt Mask"] -pub struct RXVLANGBFIM_R(crate::FieldReader); -impl RXVLANGBFIM_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXVLANGBFIM_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXVLANGBFIM_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RXVLANGBFIM` writer - MMC Receive VLAN Good Bad Frame Counter Interrupt Mask"] -pub struct RXVLANGBFIM_W<'a> { - w: &'a mut W, -} -impl<'a> RXVLANGBFIM_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 22)) | ((value as u32 & 0x01) << 22); - self.w - } -} -#[doc = "Field `RXFOVFIM` reader - MMC Receive FIFO Overflow Frame Counter Interrupt Mask"] -pub struct RXFOVFIM_R(crate::FieldReader); -impl RXFOVFIM_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXFOVFIM_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXFOVFIM_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RXFOVFIM` writer - MMC Receive FIFO Overflow Frame Counter Interrupt Mask"] -pub struct RXFOVFIM_W<'a> { - w: &'a mut W, -} -impl<'a> RXFOVFIM_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 21)) | ((value as u32 & 0x01) << 21); - self.w - } -} -#[doc = "Field `RXPAUSFIM` reader - MMC Receive Pause Frame Counter Interrupt Mask"] -pub struct RXPAUSFIM_R(crate::FieldReader); -impl RXPAUSFIM_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXPAUSFIM_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXPAUSFIM_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RXPAUSFIM` writer - MMC Receive Pause Frame Counter Interrupt Mask"] -pub struct RXPAUSFIM_W<'a> { - w: &'a mut W, -} -impl<'a> RXPAUSFIM_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 20)) | ((value as u32 & 0x01) << 20); - self.w - } -} -#[doc = "Field `RXORANGEFIM` reader - MMC Receive Out Of Range Error Frame Counter Interrupt Mask"] -pub struct RXORANGEFIM_R(crate::FieldReader); -impl RXORANGEFIM_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXORANGEFIM_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXORANGEFIM_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RXORANGEFIM` writer - MMC Receive Out Of Range Error Frame Counter Interrupt Mask"] -pub struct RXORANGEFIM_W<'a> { - w: &'a mut W, -} -impl<'a> RXORANGEFIM_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 19)) | ((value as u32 & 0x01) << 19); - self.w - } -} -#[doc = "Field `RXLENERFIM` reader - MMC Receive Length Error Frame Counter Interrupt Mask"] -pub struct RXLENERFIM_R(crate::FieldReader); -impl RXLENERFIM_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXLENERFIM_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXLENERFIM_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RXLENERFIM` writer - MMC Receive Length Error Frame Counter Interrupt Mask"] -pub struct RXLENERFIM_W<'a> { - w: &'a mut W, -} -impl<'a> RXLENERFIM_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 18)) | ((value as u32 & 0x01) << 18); - self.w - } -} -#[doc = "Field `RXUCGFIM` reader - MMC Receive Unicast Good Frame Counter Interrupt Mask"] -pub struct RXUCGFIM_R(crate::FieldReader); -impl RXUCGFIM_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXUCGFIM_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXUCGFIM_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RXUCGFIM` writer - MMC Receive Unicast Good Frame Counter Interrupt Mask"] -pub struct RXUCGFIM_W<'a> { - w: &'a mut W, -} -impl<'a> RXUCGFIM_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 17)) | ((value as u32 & 0x01) << 17); - self.w - } -} -#[doc = "Field `RX1024TMAXOCTGBFIM` reader - MMC Receive 1024 to Maximum Octet Good Bad Frame Counter Interrupt Mask."] -pub struct RX1024TMAXOCTGBFIM_R(crate::FieldReader); -impl RX1024TMAXOCTGBFIM_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RX1024TMAXOCTGBFIM_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RX1024TMAXOCTGBFIM_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RX1024TMAXOCTGBFIM` writer - MMC Receive 1024 to Maximum Octet Good Bad Frame Counter Interrupt Mask."] -pub struct RX1024TMAXOCTGBFIM_W<'a> { - w: &'a mut W, -} -impl<'a> RX1024TMAXOCTGBFIM_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16); - self.w - } -} -#[doc = "Field `RX512T1023OCTGBFIM` reader - MMC Receive 512 to 1023 Octet Good Bad Frame Counter Interrupt Mask"] -pub struct RX512T1023OCTGBFIM_R(crate::FieldReader); -impl RX512T1023OCTGBFIM_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RX512T1023OCTGBFIM_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RX512T1023OCTGBFIM_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RX512T1023OCTGBFIM` writer - MMC Receive 512 to 1023 Octet Good Bad Frame Counter Interrupt Mask"] -pub struct RX512T1023OCTGBFIM_W<'a> { - w: &'a mut W, -} -impl<'a> RX512T1023OCTGBFIM_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); - self.w - } -} -#[doc = "Field `RX256T511OCTGBFIM` reader - MMC Receive 256 to 511 Octet Good Bad Frame Counter Interrupt Mask"] -pub struct RX256T511OCTGBFIM_R(crate::FieldReader); -impl RX256T511OCTGBFIM_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RX256T511OCTGBFIM_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RX256T511OCTGBFIM_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RX256T511OCTGBFIM` writer - MMC Receive 256 to 511 Octet Good Bad Frame Counter Interrupt Mask"] -pub struct RX256T511OCTGBFIM_W<'a> { - w: &'a mut W, -} -impl<'a> RX256T511OCTGBFIM_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); - self.w - } -} -#[doc = "Field `RX128T255OCTGBFIM` reader - MMC Receive 128 to 255 Octet Good Bad Frame Counter Interrupt Mask"] -pub struct RX128T255OCTGBFIM_R(crate::FieldReader); -impl RX128T255OCTGBFIM_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RX128T255OCTGBFIM_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RX128T255OCTGBFIM_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RX128T255OCTGBFIM` writer - MMC Receive 128 to 255 Octet Good Bad Frame Counter Interrupt Mask"] -pub struct RX128T255OCTGBFIM_W<'a> { - w: &'a mut W, -} -impl<'a> RX128T255OCTGBFIM_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); - self.w - } -} -#[doc = "Field `RX65T127OCTGBFIM` reader - MMC Receive 65 to 127 Octet Good Bad Frame Counter Interrupt Mask"] -pub struct RX65T127OCTGBFIM_R(crate::FieldReader); -impl RX65T127OCTGBFIM_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RX65T127OCTGBFIM_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RX65T127OCTGBFIM_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RX65T127OCTGBFIM` writer - MMC Receive 65 to 127 Octet Good Bad Frame Counter Interrupt Mask"] -pub struct RX65T127OCTGBFIM_W<'a> { - w: &'a mut W, -} -impl<'a> RX65T127OCTGBFIM_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); - self.w - } -} -#[doc = "Field `RX64OCTGBFIM` reader - MMC Receive 64 Octet Good Bad Frame Counter Interrupt Mask"] -pub struct RX64OCTGBFIM_R(crate::FieldReader); -impl RX64OCTGBFIM_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RX64OCTGBFIM_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RX64OCTGBFIM_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RX64OCTGBFIM` writer - MMC Receive 64 Octet Good Bad Frame Counter Interrupt Mask"] -pub struct RX64OCTGBFIM_W<'a> { - w: &'a mut W, -} -impl<'a> RX64OCTGBFIM_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); - self.w - } -} -#[doc = "Field `RXOSIZEGFIM` reader - MMC Receive Oversize Good Frame Counter Interrupt Mask"] -pub struct RXOSIZEGFIM_R(crate::FieldReader); -impl RXOSIZEGFIM_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXOSIZEGFIM_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXOSIZEGFIM_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RXOSIZEGFIM` writer - MMC Receive Oversize Good Frame Counter Interrupt Mask"] -pub struct RXOSIZEGFIM_W<'a> { - w: &'a mut W, -} -impl<'a> RXOSIZEGFIM_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); - self.w - } -} -#[doc = "Field `RXUSIZEGFIM` reader - MMC Receive Undersize Good Frame Counter Interrupt Mask"] -pub struct RXUSIZEGFIM_R(crate::FieldReader); -impl RXUSIZEGFIM_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXUSIZEGFIM_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXUSIZEGFIM_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RXUSIZEGFIM` writer - MMC Receive Undersize Good Frame Counter Interrupt Mask"] -pub struct RXUSIZEGFIM_W<'a> { - w: &'a mut W, -} -impl<'a> RXUSIZEGFIM_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); - self.w - } -} -#[doc = "Field `RXJABERFIM` reader - MMC Receive Jabber Error Frame Counter Interrupt Mask"] -pub struct RXJABERFIM_R(crate::FieldReader); -impl RXJABERFIM_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXJABERFIM_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXJABERFIM_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RXJABERFIM` writer - MMC Receive Jabber Error Frame Counter Interrupt Mask"] -pub struct RXJABERFIM_W<'a> { - w: &'a mut W, -} -impl<'a> RXJABERFIM_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); - self.w - } -} -#[doc = "Field `RXRUNTFIM` reader - MMC Receive Runt Frame Counter Interrupt Mask"] -pub struct RXRUNTFIM_R(crate::FieldReader); -impl RXRUNTFIM_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXRUNTFIM_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXRUNTFIM_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RXRUNTFIM` writer - MMC Receive Runt Frame Counter Interrupt Mask"] -pub struct RXRUNTFIM_W<'a> { - w: &'a mut W, -} -impl<'a> RXRUNTFIM_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); - self.w - } -} -#[doc = "Field `RXALGNERFIM` reader - MMC Receive Alignment Error Frame Counter Interrupt Mask"] -pub struct RXALGNERFIM_R(crate::FieldReader); -impl RXALGNERFIM_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXALGNERFIM_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXALGNERFIM_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RXALGNERFIM` writer - MMC Receive Alignment Error Frame Counter Interrupt Mask"] -pub struct RXALGNERFIM_W<'a> { - w: &'a mut W, -} -impl<'a> RXALGNERFIM_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); - self.w - } -} -#[doc = "Field `RXCRCERFIM` reader - MMC Receive CRC Error Frame Counter Interrupt Mask"] -pub struct RXCRCERFIM_R(crate::FieldReader); -impl RXCRCERFIM_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXCRCERFIM_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXCRCERFIM_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RXCRCERFIM` writer - MMC Receive CRC Error Frame Counter Interrupt Mask"] -pub struct RXCRCERFIM_W<'a> { - w: &'a mut W, -} -impl<'a> RXCRCERFIM_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); - self.w - } -} -#[doc = "Field `RXMCGFIM` reader - MMC Receive Multicast Good Frame Counter Interrupt Mask"] -pub struct RXMCGFIM_R(crate::FieldReader); -impl RXMCGFIM_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXMCGFIM_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXMCGFIM_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RXMCGFIM` writer - MMC Receive Multicast Good Frame Counter Interrupt Mask"] -pub struct RXMCGFIM_W<'a> { - w: &'a mut W, -} -impl<'a> RXMCGFIM_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); - self.w - } -} -#[doc = "Field `RXBCGFIM` reader - MMC Receive Broadcast Good Frame Counter Interrupt Mask"] -pub struct RXBCGFIM_R(crate::FieldReader); -impl RXBCGFIM_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXBCGFIM_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXBCGFIM_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RXBCGFIM` writer - MMC Receive Broadcast Good Frame Counter Interrupt Mask"] -pub struct RXBCGFIM_W<'a> { - w: &'a mut W, -} -impl<'a> RXBCGFIM_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); - self.w - } -} -#[doc = "Field `RXGOCTIM` reader - MMC Receive Good Octet Counter Interrupt Mask"] -pub struct RXGOCTIM_R(crate::FieldReader); -impl RXGOCTIM_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXGOCTIM_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXGOCTIM_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RXGOCTIM` writer - MMC Receive Good Octet Counter Interrupt Mask"] -pub struct RXGOCTIM_W<'a> { - w: &'a mut W, -} -impl<'a> RXGOCTIM_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); - self.w - } -} -#[doc = "Field `RXGBOCTIM` reader - MMC Receive Good Bad Octet Counter Interrupt Mask."] -pub struct RXGBOCTIM_R(crate::FieldReader); -impl RXGBOCTIM_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXGBOCTIM_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXGBOCTIM_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RXGBOCTIM` writer - MMC Receive Good Bad Octet Counter Interrupt Mask."] -pub struct RXGBOCTIM_W<'a> { - w: &'a mut W, -} -impl<'a> RXGBOCTIM_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); - self.w - } -} +pub type W = crate::W; #[doc = "Field `RXGBFRMIM` reader - MMC Receive Good Bad Frame Counter Interrupt Mask"] -pub struct RXGBFRMIM_R(crate::FieldReader); -impl RXGBFRMIM_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXGBFRMIM_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXGBFRMIM_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type RxgbfrmimR = crate::BitReader; #[doc = "Field `RXGBFRMIM` writer - MMC Receive Good Bad Frame Counter Interrupt Mask"] -pub struct RXGBFRMIM_W<'a> { - w: &'a mut W, -} -impl<'a> RXGBFRMIM_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} +pub type RxgbfrmimW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `RXGBOCTIM` reader - MMC Receive Good Bad Octet Counter Interrupt Mask."] +pub type RxgboctimR = crate::BitReader; +#[doc = "Field `RXGBOCTIM` writer - MMC Receive Good Bad Octet Counter Interrupt Mask."] +pub type RxgboctimW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `RXGOCTIM` reader - MMC Receive Good Octet Counter Interrupt Mask"] +pub type RxgoctimR = crate::BitReader; +#[doc = "Field `RXGOCTIM` writer - MMC Receive Good Octet Counter Interrupt Mask"] +pub type RxgoctimW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `RXBCGFIM` reader - MMC Receive Broadcast Good Frame Counter Interrupt Mask"] +pub type RxbcgfimR = crate::BitReader; +#[doc = "Field `RXBCGFIM` writer - MMC Receive Broadcast Good Frame Counter Interrupt Mask"] +pub type RxbcgfimW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `RXMCGFIM` reader - MMC Receive Multicast Good Frame Counter Interrupt Mask"] +pub type RxmcgfimR = crate::BitReader; +#[doc = "Field `RXMCGFIM` writer - MMC Receive Multicast Good Frame Counter Interrupt Mask"] +pub type RxmcgfimW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `RXCRCERFIM` reader - MMC Receive CRC Error Frame Counter Interrupt Mask"] +pub type RxcrcerfimR = crate::BitReader; +#[doc = "Field `RXCRCERFIM` writer - MMC Receive CRC Error Frame Counter Interrupt Mask"] +pub type RxcrcerfimW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `RXALGNERFIM` reader - MMC Receive Alignment Error Frame Counter Interrupt Mask"] +pub type RxalgnerfimR = crate::BitReader; +#[doc = "Field `RXALGNERFIM` writer - MMC Receive Alignment Error Frame Counter Interrupt Mask"] +pub type RxalgnerfimW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `RXRUNTFIM` reader - MMC Receive Runt Frame Counter Interrupt Mask"] +pub type RxruntfimR = crate::BitReader; +#[doc = "Field `RXRUNTFIM` writer - MMC Receive Runt Frame Counter Interrupt Mask"] +pub type RxruntfimW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `RXJABERFIM` reader - MMC Receive Jabber Error Frame Counter Interrupt Mask"] +pub type RxjaberfimR = crate::BitReader; +#[doc = "Field `RXJABERFIM` writer - MMC Receive Jabber Error Frame Counter Interrupt Mask"] +pub type RxjaberfimW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `RXUSIZEGFIM` reader - MMC Receive Undersize Good Frame Counter Interrupt Mask"] +pub type RxusizegfimR = crate::BitReader; +#[doc = "Field `RXUSIZEGFIM` writer - MMC Receive Undersize Good Frame Counter Interrupt Mask"] +pub type RxusizegfimW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `RXOSIZEGFIM` reader - MMC Receive Oversize Good Frame Counter Interrupt Mask"] +pub type RxosizegfimR = crate::BitReader; +#[doc = "Field `RXOSIZEGFIM` writer - MMC Receive Oversize Good Frame Counter Interrupt Mask"] +pub type RxosizegfimW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `RX64OCTGBFIM` reader - MMC Receive 64 Octet Good Bad Frame Counter Interrupt Mask"] +pub type Rx64octgbfimR = crate::BitReader; +#[doc = "Field `RX64OCTGBFIM` writer - MMC Receive 64 Octet Good Bad Frame Counter Interrupt Mask"] +pub type Rx64octgbfimW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `RX65T127OCTGBFIM` reader - MMC Receive 65 to 127 Octet Good Bad Frame Counter Interrupt Mask"] +pub type Rx65t127octgbfimR = crate::BitReader; +#[doc = "Field `RX65T127OCTGBFIM` writer - MMC Receive 65 to 127 Octet Good Bad Frame Counter Interrupt Mask"] +pub type Rx65t127octgbfimW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `RX128T255OCTGBFIM` reader - MMC Receive 128 to 255 Octet Good Bad Frame Counter Interrupt Mask"] +pub type Rx128t255octgbfimR = crate::BitReader; +#[doc = "Field `RX128T255OCTGBFIM` writer - MMC Receive 128 to 255 Octet Good Bad Frame Counter Interrupt Mask"] +pub type Rx128t255octgbfimW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `RX256T511OCTGBFIM` reader - MMC Receive 256 to 511 Octet Good Bad Frame Counter Interrupt Mask"] +pub type Rx256t511octgbfimR = crate::BitReader; +#[doc = "Field `RX256T511OCTGBFIM` writer - MMC Receive 256 to 511 Octet Good Bad Frame Counter Interrupt Mask"] +pub type Rx256t511octgbfimW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `RX512T1023OCTGBFIM` reader - MMC Receive 512 to 1023 Octet Good Bad Frame Counter Interrupt Mask"] +pub type Rx512t1023octgbfimR = crate::BitReader; +#[doc = "Field `RX512T1023OCTGBFIM` writer - MMC Receive 512 to 1023 Octet Good Bad Frame Counter Interrupt Mask"] +pub type Rx512t1023octgbfimW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `RX1024TMAXOCTGBFIM` reader - MMC Receive 1024 to Maximum Octet Good Bad Frame Counter Interrupt Mask."] +pub type Rx1024tmaxoctgbfimR = crate::BitReader; +#[doc = "Field `RX1024TMAXOCTGBFIM` writer - MMC Receive 1024 to Maximum Octet Good Bad Frame Counter Interrupt Mask."] +pub type Rx1024tmaxoctgbfimW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `RXUCGFIM` reader - MMC Receive Unicast Good Frame Counter Interrupt Mask"] +pub type RxucgfimR = crate::BitReader; +#[doc = "Field `RXUCGFIM` writer - MMC Receive Unicast Good Frame Counter Interrupt Mask"] +pub type RxucgfimW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `RXLENERFIM` reader - MMC Receive Length Error Frame Counter Interrupt Mask"] +pub type RxlenerfimR = crate::BitReader; +#[doc = "Field `RXLENERFIM` writer - MMC Receive Length Error Frame Counter Interrupt Mask"] +pub type RxlenerfimW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `RXORANGEFIM` reader - MMC Receive Out Of Range Error Frame Counter Interrupt Mask"] +pub type RxorangefimR = crate::BitReader; +#[doc = "Field `RXORANGEFIM` writer - MMC Receive Out Of Range Error Frame Counter Interrupt Mask"] +pub type RxorangefimW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `RXPAUSFIM` reader - MMC Receive Pause Frame Counter Interrupt Mask"] +pub type RxpausfimR = crate::BitReader; +#[doc = "Field `RXPAUSFIM` writer - MMC Receive Pause Frame Counter Interrupt Mask"] +pub type RxpausfimW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `RXFOVFIM` reader - MMC Receive FIFO Overflow Frame Counter Interrupt Mask"] +pub type RxfovfimR = crate::BitReader; +#[doc = "Field `RXFOVFIM` writer - MMC Receive FIFO Overflow Frame Counter Interrupt Mask"] +pub type RxfovfimW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `RXVLANGBFIM` reader - MMC Receive VLAN Good Bad Frame Counter Interrupt Mask"] +pub type RxvlangbfimR = crate::BitReader; +#[doc = "Field `RXVLANGBFIM` writer - MMC Receive VLAN Good Bad Frame Counter Interrupt Mask"] +pub type RxvlangbfimW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `RXWDOGFIM` reader - MMC Receive Watchdog Error Frame Counter Interrupt Mask"] +pub type RxwdogfimR = crate::BitReader; +#[doc = "Field `RXWDOGFIM` writer - MMC Receive Watchdog Error Frame Counter Interrupt Mask"] +pub type RxwdogfimW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `RXRCVERRFIM` reader - MMC Receive Error Frame Counter Interrupt Mask"] +pub type RxrcverrfimR = crate::BitReader; +#[doc = "Field `RXRCVERRFIM` writer - MMC Receive Error Frame Counter Interrupt Mask"] +pub type RxrcverrfimW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `RXCTRLFIM` reader - MMC Receive Control Frame Counter Interrupt Mask"] +pub type RxctrlfimR = crate::BitReader; +#[doc = "Field `RXCTRLFIM` writer - MMC Receive Control Frame Counter Interrupt Mask"] +pub type RxctrlfimW<'a, REG> = crate::BitWriter<'a, REG>; impl R { - #[doc = "Bit 25 - MMC Receive Control Frame Counter Interrupt Mask"] + #[doc = "Bit 0 - MMC Receive Good Bad Frame Counter Interrupt Mask"] #[inline(always)] - pub fn rxctrlfim(&self) -> RXCTRLFIM_R { - RXCTRLFIM_R::new(((self.bits >> 25) & 0x01) != 0) - } - #[doc = "Bit 24 - MMC Receive Error Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn rxrcverrfim(&self) -> RXRCVERRFIM_R { - RXRCVERRFIM_R::new(((self.bits >> 24) & 0x01) != 0) - } - #[doc = "Bit 23 - MMC Receive Watchdog Error Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn rxwdogfim(&self) -> RXWDOGFIM_R { - RXWDOGFIM_R::new(((self.bits >> 23) & 0x01) != 0) - } - #[doc = "Bit 22 - MMC Receive VLAN Good Bad Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn rxvlangbfim(&self) -> RXVLANGBFIM_R { - RXVLANGBFIM_R::new(((self.bits >> 22) & 0x01) != 0) - } - #[doc = "Bit 21 - MMC Receive FIFO Overflow Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn rxfovfim(&self) -> RXFOVFIM_R { - RXFOVFIM_R::new(((self.bits >> 21) & 0x01) != 0) - } - #[doc = "Bit 20 - MMC Receive Pause Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn rxpausfim(&self) -> RXPAUSFIM_R { - RXPAUSFIM_R::new(((self.bits >> 20) & 0x01) != 0) - } - #[doc = "Bit 19 - MMC Receive Out Of Range Error Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn rxorangefim(&self) -> RXORANGEFIM_R { - RXORANGEFIM_R::new(((self.bits >> 19) & 0x01) != 0) - } - #[doc = "Bit 18 - MMC Receive Length Error Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn rxlenerfim(&self) -> RXLENERFIM_R { - RXLENERFIM_R::new(((self.bits >> 18) & 0x01) != 0) - } - #[doc = "Bit 17 - MMC Receive Unicast Good Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn rxucgfim(&self) -> RXUCGFIM_R { - RXUCGFIM_R::new(((self.bits >> 17) & 0x01) != 0) - } - #[doc = "Bit 16 - MMC Receive 1024 to Maximum Octet Good Bad Frame Counter Interrupt Mask."] - #[inline(always)] - pub fn rx1024tmaxoctgbfim(&self) -> RX1024TMAXOCTGBFIM_R { - RX1024TMAXOCTGBFIM_R::new(((self.bits >> 16) & 0x01) != 0) - } - #[doc = "Bit 15 - MMC Receive 512 to 1023 Octet Good Bad Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn rx512t1023octgbfim(&self) -> RX512T1023OCTGBFIM_R { - RX512T1023OCTGBFIM_R::new(((self.bits >> 15) & 0x01) != 0) - } - #[doc = "Bit 14 - MMC Receive 256 to 511 Octet Good Bad Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn rx256t511octgbfim(&self) -> RX256T511OCTGBFIM_R { - RX256T511OCTGBFIM_R::new(((self.bits >> 14) & 0x01) != 0) - } - #[doc = "Bit 13 - MMC Receive 128 to 255 Octet Good Bad Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn rx128t255octgbfim(&self) -> RX128T255OCTGBFIM_R { - RX128T255OCTGBFIM_R::new(((self.bits >> 13) & 0x01) != 0) - } - #[doc = "Bit 12 - MMC Receive 65 to 127 Octet Good Bad Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn rx65t127octgbfim(&self) -> RX65T127OCTGBFIM_R { - RX65T127OCTGBFIM_R::new(((self.bits >> 12) & 0x01) != 0) - } - #[doc = "Bit 11 - MMC Receive 64 Octet Good Bad Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn rx64octgbfim(&self) -> RX64OCTGBFIM_R { - RX64OCTGBFIM_R::new(((self.bits >> 11) & 0x01) != 0) - } - #[doc = "Bit 10 - MMC Receive Oversize Good Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn rxosizegfim(&self) -> RXOSIZEGFIM_R { - RXOSIZEGFIM_R::new(((self.bits >> 10) & 0x01) != 0) - } - #[doc = "Bit 9 - MMC Receive Undersize Good Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn rxusizegfim(&self) -> RXUSIZEGFIM_R { - RXUSIZEGFIM_R::new(((self.bits >> 9) & 0x01) != 0) - } - #[doc = "Bit 8 - MMC Receive Jabber Error Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn rxjaberfim(&self) -> RXJABERFIM_R { - RXJABERFIM_R::new(((self.bits >> 8) & 0x01) != 0) - } - #[doc = "Bit 7 - MMC Receive Runt Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn rxruntfim(&self) -> RXRUNTFIM_R { - RXRUNTFIM_R::new(((self.bits >> 7) & 0x01) != 0) - } - #[doc = "Bit 6 - MMC Receive Alignment Error Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn rxalgnerfim(&self) -> RXALGNERFIM_R { - RXALGNERFIM_R::new(((self.bits >> 6) & 0x01) != 0) - } - #[doc = "Bit 5 - MMC Receive CRC Error Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn rxcrcerfim(&self) -> RXCRCERFIM_R { - RXCRCERFIM_R::new(((self.bits >> 5) & 0x01) != 0) - } - #[doc = "Bit 4 - MMC Receive Multicast Good Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn rxmcgfim(&self) -> RXMCGFIM_R { - RXMCGFIM_R::new(((self.bits >> 4) & 0x01) != 0) - } - #[doc = "Bit 3 - MMC Receive Broadcast Good Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn rxbcgfim(&self) -> RXBCGFIM_R { - RXBCGFIM_R::new(((self.bits >> 3) & 0x01) != 0) - } - #[doc = "Bit 2 - MMC Receive Good Octet Counter Interrupt Mask"] - #[inline(always)] - pub fn rxgoctim(&self) -> RXGOCTIM_R { - RXGOCTIM_R::new(((self.bits >> 2) & 0x01) != 0) + pub fn rxgbfrmim(&self) -> RxgbfrmimR { + RxgbfrmimR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - MMC Receive Good Bad Octet Counter Interrupt Mask."] #[inline(always)] - pub fn rxgboctim(&self) -> RXGBOCTIM_R { - RXGBOCTIM_R::new(((self.bits >> 1) & 0x01) != 0) + pub fn rxgboctim(&self) -> RxgboctimR { + RxgboctimR::new(((self.bits >> 1) & 1) != 0) } - #[doc = "Bit 0 - MMC Receive Good Bad Frame Counter Interrupt Mask"] + #[doc = "Bit 2 - MMC Receive Good Octet Counter Interrupt Mask"] #[inline(always)] - pub fn rxgbfrmim(&self) -> RXGBFRMIM_R { - RXGBFRMIM_R::new((self.bits & 0x01) != 0) + pub fn rxgoctim(&self) -> RxgoctimR { + RxgoctimR::new(((self.bits >> 2) & 1) != 0) + } + #[doc = "Bit 3 - MMC Receive Broadcast Good Frame Counter Interrupt Mask"] + #[inline(always)] + pub fn rxbcgfim(&self) -> RxbcgfimR { + RxbcgfimR::new(((self.bits >> 3) & 1) != 0) + } + #[doc = "Bit 4 - MMC Receive Multicast Good Frame Counter Interrupt Mask"] + #[inline(always)] + pub fn rxmcgfim(&self) -> RxmcgfimR { + RxmcgfimR::new(((self.bits >> 4) & 1) != 0) + } + #[doc = "Bit 5 - MMC Receive CRC Error Frame Counter Interrupt Mask"] + #[inline(always)] + pub fn rxcrcerfim(&self) -> RxcrcerfimR { + RxcrcerfimR::new(((self.bits >> 5) & 1) != 0) + } + #[doc = "Bit 6 - MMC Receive Alignment Error Frame Counter Interrupt Mask"] + #[inline(always)] + pub fn rxalgnerfim(&self) -> RxalgnerfimR { + RxalgnerfimR::new(((self.bits >> 6) & 1) != 0) + } + #[doc = "Bit 7 - MMC Receive Runt Frame Counter Interrupt Mask"] + #[inline(always)] + pub fn rxruntfim(&self) -> RxruntfimR { + RxruntfimR::new(((self.bits >> 7) & 1) != 0) + } + #[doc = "Bit 8 - MMC Receive Jabber Error Frame Counter Interrupt Mask"] + #[inline(always)] + pub fn rxjaberfim(&self) -> RxjaberfimR { + RxjaberfimR::new(((self.bits >> 8) & 1) != 0) + } + #[doc = "Bit 9 - MMC Receive Undersize Good Frame Counter Interrupt Mask"] + #[inline(always)] + pub fn rxusizegfim(&self) -> RxusizegfimR { + RxusizegfimR::new(((self.bits >> 9) & 1) != 0) + } + #[doc = "Bit 10 - MMC Receive Oversize Good Frame Counter Interrupt Mask"] + #[inline(always)] + pub fn rxosizegfim(&self) -> RxosizegfimR { + RxosizegfimR::new(((self.bits >> 10) & 1) != 0) + } + #[doc = "Bit 11 - MMC Receive 64 Octet Good Bad Frame Counter Interrupt Mask"] + #[inline(always)] + pub fn rx64octgbfim(&self) -> Rx64octgbfimR { + Rx64octgbfimR::new(((self.bits >> 11) & 1) != 0) + } + #[doc = "Bit 12 - MMC Receive 65 to 127 Octet Good Bad Frame Counter Interrupt Mask"] + #[inline(always)] + pub fn rx65t127octgbfim(&self) -> Rx65t127octgbfimR { + Rx65t127octgbfimR::new(((self.bits >> 12) & 1) != 0) + } + #[doc = "Bit 13 - MMC Receive 128 to 255 Octet Good Bad Frame Counter Interrupt Mask"] + #[inline(always)] + pub fn rx128t255octgbfim(&self) -> Rx128t255octgbfimR { + Rx128t255octgbfimR::new(((self.bits >> 13) & 1) != 0) + } + #[doc = "Bit 14 - MMC Receive 256 to 511 Octet Good Bad Frame Counter Interrupt Mask"] + #[inline(always)] + pub fn rx256t511octgbfim(&self) -> Rx256t511octgbfimR { + Rx256t511octgbfimR::new(((self.bits >> 14) & 1) != 0) + } + #[doc = "Bit 15 - MMC Receive 512 to 1023 Octet Good Bad Frame Counter Interrupt Mask"] + #[inline(always)] + pub fn rx512t1023octgbfim(&self) -> Rx512t1023octgbfimR { + Rx512t1023octgbfimR::new(((self.bits >> 15) & 1) != 0) + } + #[doc = "Bit 16 - MMC Receive 1024 to Maximum Octet Good Bad Frame Counter Interrupt Mask."] + #[inline(always)] + pub fn rx1024tmaxoctgbfim(&self) -> Rx1024tmaxoctgbfimR { + Rx1024tmaxoctgbfimR::new(((self.bits >> 16) & 1) != 0) + } + #[doc = "Bit 17 - MMC Receive Unicast Good Frame Counter Interrupt Mask"] + #[inline(always)] + pub fn rxucgfim(&self) -> RxucgfimR { + RxucgfimR::new(((self.bits >> 17) & 1) != 0) + } + #[doc = "Bit 18 - MMC Receive Length Error Frame Counter Interrupt Mask"] + #[inline(always)] + pub fn rxlenerfim(&self) -> RxlenerfimR { + RxlenerfimR::new(((self.bits >> 18) & 1) != 0) + } + #[doc = "Bit 19 - MMC Receive Out Of Range Error Frame Counter Interrupt Mask"] + #[inline(always)] + pub fn rxorangefim(&self) -> RxorangefimR { + RxorangefimR::new(((self.bits >> 19) & 1) != 0) + } + #[doc = "Bit 20 - MMC Receive Pause Frame Counter Interrupt Mask"] + #[inline(always)] + pub fn rxpausfim(&self) -> RxpausfimR { + RxpausfimR::new(((self.bits >> 20) & 1) != 0) + } + #[doc = "Bit 21 - MMC Receive FIFO Overflow Frame Counter Interrupt Mask"] + #[inline(always)] + pub fn rxfovfim(&self) -> RxfovfimR { + RxfovfimR::new(((self.bits >> 21) & 1) != 0) + } + #[doc = "Bit 22 - MMC Receive VLAN Good Bad Frame Counter Interrupt Mask"] + #[inline(always)] + pub fn rxvlangbfim(&self) -> RxvlangbfimR { + RxvlangbfimR::new(((self.bits >> 22) & 1) != 0) + } + #[doc = "Bit 23 - MMC Receive Watchdog Error Frame Counter Interrupt Mask"] + #[inline(always)] + pub fn rxwdogfim(&self) -> RxwdogfimR { + RxwdogfimR::new(((self.bits >> 23) & 1) != 0) + } + #[doc = "Bit 24 - MMC Receive Error Frame Counter Interrupt Mask"] + #[inline(always)] + pub fn rxrcverrfim(&self) -> RxrcverrfimR { + RxrcverrfimR::new(((self.bits >> 24) & 1) != 0) + } + #[doc = "Bit 25 - MMC Receive Control Frame Counter Interrupt Mask"] + #[inline(always)] + pub fn rxctrlfim(&self) -> RxctrlfimR { + RxctrlfimR::new(((self.bits >> 25) & 1) != 0) } } impl W { - #[doc = "Bit 25 - MMC Receive Control Frame Counter Interrupt Mask"] + #[doc = "Bit 0 - MMC Receive Good Bad Frame Counter Interrupt Mask"] #[inline(always)] - pub fn rxctrlfim(&mut self) -> RXCTRLFIM_W { - RXCTRLFIM_W { w: self } - } - #[doc = "Bit 24 - MMC Receive Error Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn rxrcverrfim(&mut self) -> RXRCVERRFIM_W { - RXRCVERRFIM_W { w: self } - } - #[doc = "Bit 23 - MMC Receive Watchdog Error Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn rxwdogfim(&mut self) -> RXWDOGFIM_W { - RXWDOGFIM_W { w: self } - } - #[doc = "Bit 22 - MMC Receive VLAN Good Bad Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn rxvlangbfim(&mut self) -> RXVLANGBFIM_W { - RXVLANGBFIM_W { w: self } - } - #[doc = "Bit 21 - MMC Receive FIFO Overflow Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn rxfovfim(&mut self) -> RXFOVFIM_W { - RXFOVFIM_W { w: self } - } - #[doc = "Bit 20 - MMC Receive Pause Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn rxpausfim(&mut self) -> RXPAUSFIM_W { - RXPAUSFIM_W { w: self } - } - #[doc = "Bit 19 - MMC Receive Out Of Range Error Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn rxorangefim(&mut self) -> RXORANGEFIM_W { - RXORANGEFIM_W { w: self } - } - #[doc = "Bit 18 - MMC Receive Length Error Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn rxlenerfim(&mut self) -> RXLENERFIM_W { - RXLENERFIM_W { w: self } - } - #[doc = "Bit 17 - MMC Receive Unicast Good Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn rxucgfim(&mut self) -> RXUCGFIM_W { - RXUCGFIM_W { w: self } - } - #[doc = "Bit 16 - MMC Receive 1024 to Maximum Octet Good Bad Frame Counter Interrupt Mask."] - #[inline(always)] - pub fn rx1024tmaxoctgbfim(&mut self) -> RX1024TMAXOCTGBFIM_W { - RX1024TMAXOCTGBFIM_W { w: self } - } - #[doc = "Bit 15 - MMC Receive 512 to 1023 Octet Good Bad Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn rx512t1023octgbfim(&mut self) -> RX512T1023OCTGBFIM_W { - RX512T1023OCTGBFIM_W { w: self } - } - #[doc = "Bit 14 - MMC Receive 256 to 511 Octet Good Bad Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn rx256t511octgbfim(&mut self) -> RX256T511OCTGBFIM_W { - RX256T511OCTGBFIM_W { w: self } - } - #[doc = "Bit 13 - MMC Receive 128 to 255 Octet Good Bad Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn rx128t255octgbfim(&mut self) -> RX128T255OCTGBFIM_W { - RX128T255OCTGBFIM_W { w: self } - } - #[doc = "Bit 12 - MMC Receive 65 to 127 Octet Good Bad Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn rx65t127octgbfim(&mut self) -> RX65T127OCTGBFIM_W { - RX65T127OCTGBFIM_W { w: self } - } - #[doc = "Bit 11 - MMC Receive 64 Octet Good Bad Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn rx64octgbfim(&mut self) -> RX64OCTGBFIM_W { - RX64OCTGBFIM_W { w: self } - } - #[doc = "Bit 10 - MMC Receive Oversize Good Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn rxosizegfim(&mut self) -> RXOSIZEGFIM_W { - RXOSIZEGFIM_W { w: self } - } - #[doc = "Bit 9 - MMC Receive Undersize Good Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn rxusizegfim(&mut self) -> RXUSIZEGFIM_W { - RXUSIZEGFIM_W { w: self } - } - #[doc = "Bit 8 - MMC Receive Jabber Error Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn rxjaberfim(&mut self) -> RXJABERFIM_W { - RXJABERFIM_W { w: self } - } - #[doc = "Bit 7 - MMC Receive Runt Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn rxruntfim(&mut self) -> RXRUNTFIM_W { - RXRUNTFIM_W { w: self } - } - #[doc = "Bit 6 - MMC Receive Alignment Error Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn rxalgnerfim(&mut self) -> RXALGNERFIM_W { - RXALGNERFIM_W { w: self } - } - #[doc = "Bit 5 - MMC Receive CRC Error Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn rxcrcerfim(&mut self) -> RXCRCERFIM_W { - RXCRCERFIM_W { w: self } - } - #[doc = "Bit 4 - MMC Receive Multicast Good Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn rxmcgfim(&mut self) -> RXMCGFIM_W { - RXMCGFIM_W { w: self } - } - #[doc = "Bit 3 - MMC Receive Broadcast Good Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn rxbcgfim(&mut self) -> RXBCGFIM_W { - RXBCGFIM_W { w: self } - } - #[doc = "Bit 2 - MMC Receive Good Octet Counter Interrupt Mask"] - #[inline(always)] - pub fn rxgoctim(&mut self) -> RXGOCTIM_W { - RXGOCTIM_W { w: self } + #[must_use] + pub fn rxgbfrmim(&mut self) -> RxgbfrmimW { + RxgbfrmimW::new(self, 0) } #[doc = "Bit 1 - MMC Receive Good Bad Octet Counter Interrupt Mask."] #[inline(always)] - pub fn rxgboctim(&mut self) -> RXGBOCTIM_W { - RXGBOCTIM_W { w: self } + #[must_use] + pub fn rxgboctim(&mut self) -> RxgboctimW { + RxgboctimW::new(self, 1) } - #[doc = "Bit 0 - MMC Receive Good Bad Frame Counter Interrupt Mask"] + #[doc = "Bit 2 - MMC Receive Good Octet Counter Interrupt Mask"] #[inline(always)] - pub fn rxgbfrmim(&mut self) -> RXGBFRMIM_W { - RXGBFRMIM_W { w: self } + #[must_use] + pub fn rxgoctim(&mut self) -> RxgoctimW { + RxgoctimW::new(self, 2) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bit 3 - MMC Receive Broadcast Good Frame Counter Interrupt Mask"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn rxbcgfim(&mut self) -> RxbcgfimW { + RxbcgfimW::new(self, 3) + } + #[doc = "Bit 4 - MMC Receive Multicast Good Frame Counter Interrupt Mask"] + #[inline(always)] + #[must_use] + pub fn rxmcgfim(&mut self) -> RxmcgfimW { + RxmcgfimW::new(self, 4) + } + #[doc = "Bit 5 - MMC Receive CRC Error Frame Counter Interrupt Mask"] + #[inline(always)] + #[must_use] + pub fn rxcrcerfim(&mut self) -> RxcrcerfimW { + RxcrcerfimW::new(self, 5) + } + #[doc = "Bit 6 - MMC Receive Alignment Error Frame Counter Interrupt Mask"] + #[inline(always)] + #[must_use] + pub fn rxalgnerfim(&mut self) -> RxalgnerfimW { + RxalgnerfimW::new(self, 6) + } + #[doc = "Bit 7 - MMC Receive Runt Frame Counter Interrupt Mask"] + #[inline(always)] + #[must_use] + pub fn rxruntfim(&mut self) -> RxruntfimW { + RxruntfimW::new(self, 7) + } + #[doc = "Bit 8 - MMC Receive Jabber Error Frame Counter Interrupt Mask"] + #[inline(always)] + #[must_use] + pub fn rxjaberfim(&mut self) -> RxjaberfimW { + RxjaberfimW::new(self, 8) + } + #[doc = "Bit 9 - MMC Receive Undersize Good Frame Counter Interrupt Mask"] + #[inline(always)] + #[must_use] + pub fn rxusizegfim(&mut self) -> RxusizegfimW { + RxusizegfimW::new(self, 9) + } + #[doc = "Bit 10 - MMC Receive Oversize Good Frame Counter Interrupt Mask"] + #[inline(always)] + #[must_use] + pub fn rxosizegfim(&mut self) -> RxosizegfimW { + RxosizegfimW::new(self, 10) + } + #[doc = "Bit 11 - MMC Receive 64 Octet Good Bad Frame Counter Interrupt Mask"] + #[inline(always)] + #[must_use] + pub fn rx64octgbfim(&mut self) -> Rx64octgbfimW { + Rx64octgbfimW::new(self, 11) + } + #[doc = "Bit 12 - MMC Receive 65 to 127 Octet Good Bad Frame Counter Interrupt Mask"] + #[inline(always)] + #[must_use] + pub fn rx65t127octgbfim(&mut self) -> Rx65t127octgbfimW { + Rx65t127octgbfimW::new(self, 12) + } + #[doc = "Bit 13 - MMC Receive 128 to 255 Octet Good Bad Frame Counter Interrupt Mask"] + #[inline(always)] + #[must_use] + pub fn rx128t255octgbfim(&mut self) -> Rx128t255octgbfimW { + Rx128t255octgbfimW::new(self, 13) + } + #[doc = "Bit 14 - MMC Receive 256 to 511 Octet Good Bad Frame Counter Interrupt Mask"] + #[inline(always)] + #[must_use] + pub fn rx256t511octgbfim(&mut self) -> Rx256t511octgbfimW { + Rx256t511octgbfimW::new(self, 14) + } + #[doc = "Bit 15 - MMC Receive 512 to 1023 Octet Good Bad Frame Counter Interrupt Mask"] + #[inline(always)] + #[must_use] + pub fn rx512t1023octgbfim(&mut self) -> Rx512t1023octgbfimW { + Rx512t1023octgbfimW::new(self, 15) + } + #[doc = "Bit 16 - MMC Receive 1024 to Maximum Octet Good Bad Frame Counter Interrupt Mask."] + #[inline(always)] + #[must_use] + pub fn rx1024tmaxoctgbfim(&mut self) -> Rx1024tmaxoctgbfimW { + Rx1024tmaxoctgbfimW::new(self, 16) + } + #[doc = "Bit 17 - MMC Receive Unicast Good Frame Counter Interrupt Mask"] + #[inline(always)] + #[must_use] + pub fn rxucgfim(&mut self) -> RxucgfimW { + RxucgfimW::new(self, 17) + } + #[doc = "Bit 18 - MMC Receive Length Error Frame Counter Interrupt Mask"] + #[inline(always)] + #[must_use] + pub fn rxlenerfim(&mut self) -> RxlenerfimW { + RxlenerfimW::new(self, 18) + } + #[doc = "Bit 19 - MMC Receive Out Of Range Error Frame Counter Interrupt Mask"] + #[inline(always)] + #[must_use] + pub fn rxorangefim(&mut self) -> RxorangefimW { + RxorangefimW::new(self, 19) + } + #[doc = "Bit 20 - MMC Receive Pause Frame Counter Interrupt Mask"] + #[inline(always)] + #[must_use] + pub fn rxpausfim(&mut self) -> RxpausfimW { + RxpausfimW::new(self, 20) + } + #[doc = "Bit 21 - MMC Receive FIFO Overflow Frame Counter Interrupt Mask"] + #[inline(always)] + #[must_use] + pub fn rxfovfim(&mut self) -> RxfovfimW { + RxfovfimW::new(self, 21) + } + #[doc = "Bit 22 - MMC Receive VLAN Good Bad Frame Counter Interrupt Mask"] + #[inline(always)] + #[must_use] + pub fn rxvlangbfim(&mut self) -> RxvlangbfimW { + RxvlangbfimW::new(self, 22) + } + #[doc = "Bit 23 - MMC Receive Watchdog Error Frame Counter Interrupt Mask"] + #[inline(always)] + #[must_use] + pub fn rxwdogfim(&mut self) -> RxwdogfimW { + RxwdogfimW::new(self, 23) + } + #[doc = "Bit 24 - MMC Receive Error Frame Counter Interrupt Mask"] + #[inline(always)] + #[must_use] + pub fn rxrcverrfim(&mut self) -> RxrcverrfimW { + RxrcverrfimW::new(self, 24) + } + #[doc = "Bit 25 - MMC Receive Control Frame Counter Interrupt Mask"] + #[inline(always)] + #[must_use] + pub fn rxctrlfim(&mut self) -> RxctrlfimW { + RxctrlfimW::new(self, 25) } } -#[doc = "MMC Receive Interrupt Mask Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [mmc_intr_mask_rx](index.html) module"] -pub struct MMC_INTR_MASK_RX_SPEC; -impl crate::RegisterSpec for MMC_INTR_MASK_RX_SPEC { +#[doc = "MMC Receive Interrupt Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mmc_intr_mask_rx::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mmc_intr_mask_rx::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct MmcIntrMaskRxSpec; +impl crate::RegisterSpec for MmcIntrMaskRxSpec { type Ux = u32; } -#[doc = "`read()` method returns [mmc_intr_mask_rx::R](R) reader structure"] -impl crate::Readable for MMC_INTR_MASK_RX_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [mmc_intr_mask_rx::W](W) writer structure"] -impl crate::Writable for MMC_INTR_MASK_RX_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`mmc_intr_mask_rx::R`](R) reader structure"] +impl crate::Readable for MmcIntrMaskRxSpec {} +#[doc = "`write(|w| ..)` method takes [`mmc_intr_mask_rx::W`](W) writer structure"] +impl crate::Writable for MmcIntrMaskRxSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MMC_INTR_MASK_RX to value 0"] -impl crate::Resettable for MMC_INTR_MASK_RX_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for MmcIntrMaskRxSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/mmc_intr_mask_tx.rs b/va416xx/src/eth/mmc_intr_mask_tx.rs index 5469351..4867da8 100644 --- a/va416xx/src/eth/mmc_intr_mask_tx.rs +++ b/va416xx/src/eth/mmc_intr_mask_tx.rs @@ -1,1288 +1,415 @@ #[doc = "Register `MMC_INTR_MASK_TX` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `MMC_INTR_MASK_TX` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `TXOSIZEGFIM` reader - MMC Transmit Oversize Good Frame Counter Interrupt Mask"] -pub struct TXOSIZEGFIM_R(crate::FieldReader); -impl TXOSIZEGFIM_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXOSIZEGFIM_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXOSIZEGFIM_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TXOSIZEGFIM` writer - MMC Transmit Oversize Good Frame Counter Interrupt Mask"] -pub struct TXOSIZEGFIM_W<'a> { - w: &'a mut W, -} -impl<'a> TXOSIZEGFIM_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 25)) | ((value as u32 & 0x01) << 25); - self.w - } -} -#[doc = "Field `TXVLANGFIM` reader - MMC Transmit VLAN Good Frame Counter Interrupt Mask"] -pub struct TXVLANGFIM_R(crate::FieldReader); -impl TXVLANGFIM_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXVLANGFIM_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXVLANGFIM_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TXVLANGFIM` writer - MMC Transmit VLAN Good Frame Counter Interrupt Mask"] -pub struct TXVLANGFIM_W<'a> { - w: &'a mut W, -} -impl<'a> TXVLANGFIM_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 24)) | ((value as u32 & 0x01) << 24); - self.w - } -} -#[doc = "Field `TXPAUSFIM` reader - MMC Transmit Pause Frame Counter Interrupt Mask"] -pub struct TXPAUSFIM_R(crate::FieldReader); -impl TXPAUSFIM_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXPAUSFIM_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXPAUSFIM_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TXPAUSFIM` writer - MMC Transmit Pause Frame Counter Interrupt Mask"] -pub struct TXPAUSFIM_W<'a> { - w: &'a mut W, -} -impl<'a> TXPAUSFIM_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 23)) | ((value as u32 & 0x01) << 23); - self.w - } -} -#[doc = "Field `TXEXDEFFIM` reader - MMC Transmit Excessive Deferral Frame Counter Interrupt Mask"] -pub struct TXEXDEFFIM_R(crate::FieldReader); -impl TXEXDEFFIM_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXEXDEFFIM_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXEXDEFFIM_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TXEXDEFFIM` writer - MMC Transmit Excessive Deferral Frame Counter Interrupt Mask"] -pub struct TXEXDEFFIM_W<'a> { - w: &'a mut W, -} -impl<'a> TXEXDEFFIM_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 22)) | ((value as u32 & 0x01) << 22); - self.w - } -} -#[doc = "Field `TXGFRMIM` reader - MMC Transmit Good Frame Counter Interrupt Mask"] -pub struct TXGFRMIM_R(crate::FieldReader); -impl TXGFRMIM_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXGFRMIM_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXGFRMIM_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TXGFRMIM` writer - MMC Transmit Good Frame Counter Interrupt Mask"] -pub struct TXGFRMIM_W<'a> { - w: &'a mut W, -} -impl<'a> TXGFRMIM_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 21)) | ((value as u32 & 0x01) << 21); - self.w - } -} -#[doc = "Field `TXGOCTIM` reader - MMC Transmit Good Octet Counter Interrupt Mask"] -pub struct TXGOCTIM_R(crate::FieldReader); -impl TXGOCTIM_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXGOCTIM_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXGOCTIM_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TXGOCTIM` writer - MMC Transmit Good Octet Counter Interrupt Mask"] -pub struct TXGOCTIM_W<'a> { - w: &'a mut W, -} -impl<'a> TXGOCTIM_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 20)) | ((value as u32 & 0x01) << 20); - self.w - } -} -#[doc = "Field `TXCARERFIM` reader - MMC Transmit Carrier Error Frame Counter Interrupt Mask"] -pub struct TXCARERFIM_R(crate::FieldReader); -impl TXCARERFIM_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXCARERFIM_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXCARERFIM_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TXCARERFIM` writer - MMC Transmit Carrier Error Frame Counter Interrupt Mask"] -pub struct TXCARERFIM_W<'a> { - w: &'a mut W, -} -impl<'a> TXCARERFIM_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 19)) | ((value as u32 & 0x01) << 19); - self.w - } -} -#[doc = "Field `TXEXCOLFIM` reader - MMC Transmit Excessive Collision Frame Counter Interrupt Mask"] -pub struct TXEXCOLFIM_R(crate::FieldReader); -impl TXEXCOLFIM_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXEXCOLFIM_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXEXCOLFIM_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TXEXCOLFIM` writer - MMC Transmit Excessive Collision Frame Counter Interrupt Mask"] -pub struct TXEXCOLFIM_W<'a> { - w: &'a mut W, -} -impl<'a> TXEXCOLFIM_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 18)) | ((value as u32 & 0x01) << 18); - self.w - } -} -#[doc = "Field `TXLATCOLFIM` reader - MMC Transmit Late Collision Frame Counter Interrupt Mask"] -pub struct TXLATCOLFIM_R(crate::FieldReader); -impl TXLATCOLFIM_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXLATCOLFIM_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXLATCOLFIM_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TXLATCOLFIM` writer - MMC Transmit Late Collision Frame Counter Interrupt Mask"] -pub struct TXLATCOLFIM_W<'a> { - w: &'a mut W, -} -impl<'a> TXLATCOLFIM_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 17)) | ((value as u32 & 0x01) << 17); - self.w - } -} -#[doc = "Field `TXDEFFIM` reader - MMC Transmit Deferred Frame Counter Interrupt Mask"] -pub struct TXDEFFIM_R(crate::FieldReader); -impl TXDEFFIM_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXDEFFIM_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXDEFFIM_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TXDEFFIM` writer - MMC Transmit Deferred Frame Counter Interrupt Mask"] -pub struct TXDEFFIM_W<'a> { - w: &'a mut W, -} -impl<'a> TXDEFFIM_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16); - self.w - } -} -#[doc = "Field `TXMCOLGFIM` reader - MMC Transmit Multiple Collision Good Frame Counter Interrupt Mask"] -pub struct TXMCOLGFIM_R(crate::FieldReader); -impl TXMCOLGFIM_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXMCOLGFIM_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXMCOLGFIM_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TXMCOLGFIM` writer - MMC Transmit Multiple Collision Good Frame Counter Interrupt Mask"] -pub struct TXMCOLGFIM_W<'a> { - w: &'a mut W, -} -impl<'a> TXMCOLGFIM_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); - self.w - } -} -#[doc = "Field `TXSCOLGFIM` reader - MMC Transmit Single Collision Good Frame Counter Interrupt Mask"] -pub struct TXSCOLGFIM_R(crate::FieldReader); -impl TXSCOLGFIM_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXSCOLGFIM_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXSCOLGFIM_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TXSCOLGFIM` writer - MMC Transmit Single Collision Good Frame Counter Interrupt Mask"] -pub struct TXSCOLGFIM_W<'a> { - w: &'a mut W, -} -impl<'a> TXSCOLGFIM_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); - self.w - } -} -#[doc = "Field `TXUFLOWERFIM` reader - MMC Transmit Underflow Error Frame Counter Interrupt Mask"] -pub struct TXUFLOWERFIM_R(crate::FieldReader); -impl TXUFLOWERFIM_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXUFLOWERFIM_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXUFLOWERFIM_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TXUFLOWERFIM` writer - MMC Transmit Underflow Error Frame Counter Interrupt Mask"] -pub struct TXUFLOWERFIM_W<'a> { - w: &'a mut W, -} -impl<'a> TXUFLOWERFIM_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); - self.w - } -} -#[doc = "Field `TXBCGBFIM` reader - MMC Transmit Broadcast Good Bad Frame Counter Interrupt Mask"] -pub struct TXBCGBFIM_R(crate::FieldReader); -impl TXBCGBFIM_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXBCGBFIM_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXBCGBFIM_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TXBCGBFIM` writer - MMC Transmit Broadcast Good Bad Frame Counter Interrupt Mask"] -pub struct TXBCGBFIM_W<'a> { - w: &'a mut W, -} -impl<'a> TXBCGBFIM_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); - self.w - } -} -#[doc = "Field `TXMCGBFIM` reader - MMC Transmit Multicast Good Bad Frame Counter Interrupt Mask"] -pub struct TXMCGBFIM_R(crate::FieldReader); -impl TXMCGBFIM_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXMCGBFIM_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXMCGBFIM_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TXMCGBFIM` writer - MMC Transmit Multicast Good Bad Frame Counter Interrupt Mask"] -pub struct TXMCGBFIM_W<'a> { - w: &'a mut W, -} -impl<'a> TXMCGBFIM_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); - self.w - } -} -#[doc = "Field `TXUCGBFIM` reader - MMC Transmit Unicast Good Bad Frame Counter Interrupt Mask"] -pub struct TXUCGBFIM_R(crate::FieldReader); -impl TXUCGBFIM_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXUCGBFIM_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXUCGBFIM_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TXUCGBFIM` writer - MMC Transmit Unicast Good Bad Frame Counter Interrupt Mask"] -pub struct TXUCGBFIM_W<'a> { - w: &'a mut W, -} -impl<'a> TXUCGBFIM_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); - self.w - } -} -#[doc = "Field `TX1024TMAXOCTGBFIM` reader - MMC Transmit 1024 to Maximum Octet Good Bad Frame Counter Interrupt Mask"] -pub struct TX1024TMAXOCTGBFIM_R(crate::FieldReader); -impl TX1024TMAXOCTGBFIM_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TX1024TMAXOCTGBFIM_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TX1024TMAXOCTGBFIM_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TX1024TMAXOCTGBFIM` writer - MMC Transmit 1024 to Maximum Octet Good Bad Frame Counter Interrupt Mask"] -pub struct TX1024TMAXOCTGBFIM_W<'a> { - w: &'a mut W, -} -impl<'a> TX1024TMAXOCTGBFIM_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); - self.w - } -} -#[doc = "Field `TX512T1023OCTGBFIM` reader - MMC Transmit 512 to 1023 Octet Good Bad Frame Counter Interrupt Mask"] -pub struct TX512T1023OCTGBFIM_R(crate::FieldReader); -impl TX512T1023OCTGBFIM_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TX512T1023OCTGBFIM_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TX512T1023OCTGBFIM_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TX512T1023OCTGBFIM` writer - MMC Transmit 512 to 1023 Octet Good Bad Frame Counter Interrupt Mask"] -pub struct TX512T1023OCTGBFIM_W<'a> { - w: &'a mut W, -} -impl<'a> TX512T1023OCTGBFIM_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); - self.w - } -} -#[doc = "Field `TX256T511OCTGBFIM` reader - MC Transmit 256 to 511 Octet Good Bad Frame Counter Interrupt Mask"] -pub struct TX256T511OCTGBFIM_R(crate::FieldReader); -impl TX256T511OCTGBFIM_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TX256T511OCTGBFIM_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TX256T511OCTGBFIM_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TX256T511OCTGBFIM` writer - MC Transmit 256 to 511 Octet Good Bad Frame Counter Interrupt Mask"] -pub struct TX256T511OCTGBFIM_W<'a> { - w: &'a mut W, -} -impl<'a> TX256T511OCTGBFIM_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); - self.w - } -} -#[doc = "Field `TX128T255OCTGBFIM` reader - MMC Transmit 128 to 255 Octet Good Bad Frame Counter Interrupt Mask"] -pub struct TX128T255OCTGBFIM_R(crate::FieldReader); -impl TX128T255OCTGBFIM_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TX128T255OCTGBFIM_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TX128T255OCTGBFIM_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TX128T255OCTGBFIM` writer - MMC Transmit 128 to 255 Octet Good Bad Frame Counter Interrupt Mask"] -pub struct TX128T255OCTGBFIM_W<'a> { - w: &'a mut W, -} -impl<'a> TX128T255OCTGBFIM_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); - self.w - } -} -#[doc = "Field `TX65T127OCTGBFIM` reader - MMC Transmit 65 to 127 Octet Good Bad Frame Counter Interrupt Mask"] -pub struct TX65T127OCTGBFIM_R(crate::FieldReader); -impl TX65T127OCTGBFIM_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TX65T127OCTGBFIM_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TX65T127OCTGBFIM_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TX65T127OCTGBFIM` writer - MMC Transmit 65 to 127 Octet Good Bad Frame Counter Interrupt Mask"] -pub struct TX65T127OCTGBFIM_W<'a> { - w: &'a mut W, -} -impl<'a> TX65T127OCTGBFIM_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); - self.w - } -} -#[doc = "Field `TX64OCTGBFIM` reader - MMC Transmit 64 Octet Good Bad Frame Counter Interrupt Mask"] -pub struct TX64OCTGBFIM_R(crate::FieldReader); -impl TX64OCTGBFIM_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TX64OCTGBFIM_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TX64OCTGBFIM_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TX64OCTGBFIM` writer - MMC Transmit 64 Octet Good Bad Frame Counter Interrupt Mask"] -pub struct TX64OCTGBFIM_W<'a> { - w: &'a mut W, -} -impl<'a> TX64OCTGBFIM_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); - self.w - } -} -#[doc = "Field `TXMCGFIM` reader - MMC Transmit Multicast Good Frame Counter Interrupt Mask"] -pub struct TXMCGFIM_R(crate::FieldReader); -impl TXMCGFIM_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXMCGFIM_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXMCGFIM_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TXMCGFIM` writer - MMC Transmit Multicast Good Frame Counter Interrupt Mask"] -pub struct TXMCGFIM_W<'a> { - w: &'a mut W, -} -impl<'a> TXMCGFIM_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); - self.w - } -} -#[doc = "Field `TXBCGFIM` reader - MMC Transmit Broadcast Good Frame Counter Interrupt Mask"] -pub struct TXBCGFIM_R(crate::FieldReader); -impl TXBCGFIM_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXBCGFIM_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXBCGFIM_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TXBCGFIM` writer - MMC Transmit Broadcast Good Frame Counter Interrupt Mask"] -pub struct TXBCGFIM_W<'a> { - w: &'a mut W, -} -impl<'a> TXBCGFIM_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); - self.w - } -} -#[doc = "Field `TXGBFRMIM` reader - MMC Transmit Good Bad Frame Counter Interrupt Mask"] -pub struct TXGBFRMIM_R(crate::FieldReader); -impl TXGBFRMIM_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXGBFRMIM_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXGBFRMIM_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TXGBFRMIM` writer - MMC Transmit Good Bad Frame Counter Interrupt Mask"] -pub struct TXGBFRMIM_W<'a> { - w: &'a mut W, -} -impl<'a> TXGBFRMIM_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); - self.w - } -} +pub type W = crate::W; #[doc = "Field `TXGBOCTIM` reader - MMC Transmit Good Bad Octet Counter Interrupt Mask"] -pub struct TXGBOCTIM_R(crate::FieldReader); -impl TXGBOCTIM_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXGBOCTIM_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXGBOCTIM_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type TxgboctimR = crate::BitReader; #[doc = "Field `TXGBOCTIM` writer - MMC Transmit Good Bad Octet Counter Interrupt Mask"] -pub struct TXGBOCTIM_W<'a> { - w: &'a mut W, -} -impl<'a> TXGBOCTIM_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} +pub type TxgboctimW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TXGBFRMIM` reader - MMC Transmit Good Bad Frame Counter Interrupt Mask"] +pub type TxgbfrmimR = crate::BitReader; +#[doc = "Field `TXGBFRMIM` writer - MMC Transmit Good Bad Frame Counter Interrupt Mask"] +pub type TxgbfrmimW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TXBCGFIM` reader - MMC Transmit Broadcast Good Frame Counter Interrupt Mask"] +pub type TxbcgfimR = crate::BitReader; +#[doc = "Field `TXBCGFIM` writer - MMC Transmit Broadcast Good Frame Counter Interrupt Mask"] +pub type TxbcgfimW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TXMCGFIM` reader - MMC Transmit Multicast Good Frame Counter Interrupt Mask"] +pub type TxmcgfimR = crate::BitReader; +#[doc = "Field `TXMCGFIM` writer - MMC Transmit Multicast Good Frame Counter Interrupt Mask"] +pub type TxmcgfimW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TX64OCTGBFIM` reader - MMC Transmit 64 Octet Good Bad Frame Counter Interrupt Mask"] +pub type Tx64octgbfimR = crate::BitReader; +#[doc = "Field `TX64OCTGBFIM` writer - MMC Transmit 64 Octet Good Bad Frame Counter Interrupt Mask"] +pub type Tx64octgbfimW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TX65T127OCTGBFIM` reader - MMC Transmit 65 to 127 Octet Good Bad Frame Counter Interrupt Mask"] +pub type Tx65t127octgbfimR = crate::BitReader; +#[doc = "Field `TX65T127OCTGBFIM` writer - MMC Transmit 65 to 127 Octet Good Bad Frame Counter Interrupt Mask"] +pub type Tx65t127octgbfimW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TX128T255OCTGBFIM` reader - MMC Transmit 128 to 255 Octet Good Bad Frame Counter Interrupt Mask"] +pub type Tx128t255octgbfimR = crate::BitReader; +#[doc = "Field `TX128T255OCTGBFIM` writer - MMC Transmit 128 to 255 Octet Good Bad Frame Counter Interrupt Mask"] +pub type Tx128t255octgbfimW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TX256T511OCTGBFIM` reader - MC Transmit 256 to 511 Octet Good Bad Frame Counter Interrupt Mask"] +pub type Tx256t511octgbfimR = crate::BitReader; +#[doc = "Field `TX256T511OCTGBFIM` writer - MC Transmit 256 to 511 Octet Good Bad Frame Counter Interrupt Mask"] +pub type Tx256t511octgbfimW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TX512T1023OCTGBFIM` reader - MMC Transmit 512 to 1023 Octet Good Bad Frame Counter Interrupt Mask"] +pub type Tx512t1023octgbfimR = crate::BitReader; +#[doc = "Field `TX512T1023OCTGBFIM` writer - MMC Transmit 512 to 1023 Octet Good Bad Frame Counter Interrupt Mask"] +pub type Tx512t1023octgbfimW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TX1024TMAXOCTGBFIM` reader - MMC Transmit 1024 to Maximum Octet Good Bad Frame Counter Interrupt Mask"] +pub type Tx1024tmaxoctgbfimR = crate::BitReader; +#[doc = "Field `TX1024TMAXOCTGBFIM` writer - MMC Transmit 1024 to Maximum Octet Good Bad Frame Counter Interrupt Mask"] +pub type Tx1024tmaxoctgbfimW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TXUCGBFIM` reader - MMC Transmit Unicast Good Bad Frame Counter Interrupt Mask"] +pub type TxucgbfimR = crate::BitReader; +#[doc = "Field `TXUCGBFIM` writer - MMC Transmit Unicast Good Bad Frame Counter Interrupt Mask"] +pub type TxucgbfimW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TXMCGBFIM` reader - MMC Transmit Multicast Good Bad Frame Counter Interrupt Mask"] +pub type TxmcgbfimR = crate::BitReader; +#[doc = "Field `TXMCGBFIM` writer - MMC Transmit Multicast Good Bad Frame Counter Interrupt Mask"] +pub type TxmcgbfimW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TXBCGBFIM` reader - MMC Transmit Broadcast Good Bad Frame Counter Interrupt Mask"] +pub type TxbcgbfimR = crate::BitReader; +#[doc = "Field `TXBCGBFIM` writer - MMC Transmit Broadcast Good Bad Frame Counter Interrupt Mask"] +pub type TxbcgbfimW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TXUFLOWERFIM` reader - MMC Transmit Underflow Error Frame Counter Interrupt Mask"] +pub type TxuflowerfimR = crate::BitReader; +#[doc = "Field `TXUFLOWERFIM` writer - MMC Transmit Underflow Error Frame Counter Interrupt Mask"] +pub type TxuflowerfimW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TXSCOLGFIM` reader - MMC Transmit Single Collision Good Frame Counter Interrupt Mask"] +pub type TxscolgfimR = crate::BitReader; +#[doc = "Field `TXSCOLGFIM` writer - MMC Transmit Single Collision Good Frame Counter Interrupt Mask"] +pub type TxscolgfimW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TXMCOLGFIM` reader - MMC Transmit Multiple Collision Good Frame Counter Interrupt Mask"] +pub type TxmcolgfimR = crate::BitReader; +#[doc = "Field `TXMCOLGFIM` writer - MMC Transmit Multiple Collision Good Frame Counter Interrupt Mask"] +pub type TxmcolgfimW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TXDEFFIM` reader - MMC Transmit Deferred Frame Counter Interrupt Mask"] +pub type TxdeffimR = crate::BitReader; +#[doc = "Field `TXDEFFIM` writer - MMC Transmit Deferred Frame Counter Interrupt Mask"] +pub type TxdeffimW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TXLATCOLFIM` reader - MMC Transmit Late Collision Frame Counter Interrupt Mask"] +pub type TxlatcolfimR = crate::BitReader; +#[doc = "Field `TXLATCOLFIM` writer - MMC Transmit Late Collision Frame Counter Interrupt Mask"] +pub type TxlatcolfimW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TXEXCOLFIM` reader - MMC Transmit Excessive Collision Frame Counter Interrupt Mask"] +pub type TxexcolfimR = crate::BitReader; +#[doc = "Field `TXEXCOLFIM` writer - MMC Transmit Excessive Collision Frame Counter Interrupt Mask"] +pub type TxexcolfimW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TXCARERFIM` reader - MMC Transmit Carrier Error Frame Counter Interrupt Mask"] +pub type TxcarerfimR = crate::BitReader; +#[doc = "Field `TXCARERFIM` writer - MMC Transmit Carrier Error Frame Counter Interrupt Mask"] +pub type TxcarerfimW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TXGOCTIM` reader - MMC Transmit Good Octet Counter Interrupt Mask"] +pub type TxgoctimR = crate::BitReader; +#[doc = "Field `TXGOCTIM` writer - MMC Transmit Good Octet Counter Interrupt Mask"] +pub type TxgoctimW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TXGFRMIM` reader - MMC Transmit Good Frame Counter Interrupt Mask"] +pub type TxgfrmimR = crate::BitReader; +#[doc = "Field `TXGFRMIM` writer - MMC Transmit Good Frame Counter Interrupt Mask"] +pub type TxgfrmimW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TXEXDEFFIM` reader - MMC Transmit Excessive Deferral Frame Counter Interrupt Mask"] +pub type TxexdeffimR = crate::BitReader; +#[doc = "Field `TXEXDEFFIM` writer - MMC Transmit Excessive Deferral Frame Counter Interrupt Mask"] +pub type TxexdeffimW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TXPAUSFIM` reader - MMC Transmit Pause Frame Counter Interrupt Mask"] +pub type TxpausfimR = crate::BitReader; +#[doc = "Field `TXPAUSFIM` writer - MMC Transmit Pause Frame Counter Interrupt Mask"] +pub type TxpausfimW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TXVLANGFIM` reader - MMC Transmit VLAN Good Frame Counter Interrupt Mask"] +pub type TxvlangfimR = crate::BitReader; +#[doc = "Field `TXVLANGFIM` writer - MMC Transmit VLAN Good Frame Counter Interrupt Mask"] +pub type TxvlangfimW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TXOSIZEGFIM` reader - MMC Transmit Oversize Good Frame Counter Interrupt Mask"] +pub type TxosizegfimR = crate::BitReader; +#[doc = "Field `TXOSIZEGFIM` writer - MMC Transmit Oversize Good Frame Counter Interrupt Mask"] +pub type TxosizegfimW<'a, REG> = crate::BitWriter<'a, REG>; impl R { - #[doc = "Bit 25 - MMC Transmit Oversize Good Frame Counter Interrupt Mask"] + #[doc = "Bit 0 - MMC Transmit Good Bad Octet Counter Interrupt Mask"] #[inline(always)] - pub fn txosizegfim(&self) -> TXOSIZEGFIM_R { - TXOSIZEGFIM_R::new(((self.bits >> 25) & 0x01) != 0) - } - #[doc = "Bit 24 - MMC Transmit VLAN Good Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn txvlangfim(&self) -> TXVLANGFIM_R { - TXVLANGFIM_R::new(((self.bits >> 24) & 0x01) != 0) - } - #[doc = "Bit 23 - MMC Transmit Pause Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn txpausfim(&self) -> TXPAUSFIM_R { - TXPAUSFIM_R::new(((self.bits >> 23) & 0x01) != 0) - } - #[doc = "Bit 22 - MMC Transmit Excessive Deferral Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn txexdeffim(&self) -> TXEXDEFFIM_R { - TXEXDEFFIM_R::new(((self.bits >> 22) & 0x01) != 0) - } - #[doc = "Bit 21 - MMC Transmit Good Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn txgfrmim(&self) -> TXGFRMIM_R { - TXGFRMIM_R::new(((self.bits >> 21) & 0x01) != 0) - } - #[doc = "Bit 20 - MMC Transmit Good Octet Counter Interrupt Mask"] - #[inline(always)] - pub fn txgoctim(&self) -> TXGOCTIM_R { - TXGOCTIM_R::new(((self.bits >> 20) & 0x01) != 0) - } - #[doc = "Bit 19 - MMC Transmit Carrier Error Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn txcarerfim(&self) -> TXCARERFIM_R { - TXCARERFIM_R::new(((self.bits >> 19) & 0x01) != 0) - } - #[doc = "Bit 18 - MMC Transmit Excessive Collision Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn txexcolfim(&self) -> TXEXCOLFIM_R { - TXEXCOLFIM_R::new(((self.bits >> 18) & 0x01) != 0) - } - #[doc = "Bit 17 - MMC Transmit Late Collision Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn txlatcolfim(&self) -> TXLATCOLFIM_R { - TXLATCOLFIM_R::new(((self.bits >> 17) & 0x01) != 0) - } - #[doc = "Bit 16 - MMC Transmit Deferred Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn txdeffim(&self) -> TXDEFFIM_R { - TXDEFFIM_R::new(((self.bits >> 16) & 0x01) != 0) - } - #[doc = "Bit 15 - MMC Transmit Multiple Collision Good Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn txmcolgfim(&self) -> TXMCOLGFIM_R { - TXMCOLGFIM_R::new(((self.bits >> 15) & 0x01) != 0) - } - #[doc = "Bit 14 - MMC Transmit Single Collision Good Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn txscolgfim(&self) -> TXSCOLGFIM_R { - TXSCOLGFIM_R::new(((self.bits >> 14) & 0x01) != 0) - } - #[doc = "Bit 13 - MMC Transmit Underflow Error Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn txuflowerfim(&self) -> TXUFLOWERFIM_R { - TXUFLOWERFIM_R::new(((self.bits >> 13) & 0x01) != 0) - } - #[doc = "Bit 12 - MMC Transmit Broadcast Good Bad Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn txbcgbfim(&self) -> TXBCGBFIM_R { - TXBCGBFIM_R::new(((self.bits >> 12) & 0x01) != 0) - } - #[doc = "Bit 11 - MMC Transmit Multicast Good Bad Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn txmcgbfim(&self) -> TXMCGBFIM_R { - TXMCGBFIM_R::new(((self.bits >> 11) & 0x01) != 0) - } - #[doc = "Bit 10 - MMC Transmit Unicast Good Bad Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn txucgbfim(&self) -> TXUCGBFIM_R { - TXUCGBFIM_R::new(((self.bits >> 10) & 0x01) != 0) - } - #[doc = "Bit 9 - MMC Transmit 1024 to Maximum Octet Good Bad Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn tx1024tmaxoctgbfim(&self) -> TX1024TMAXOCTGBFIM_R { - TX1024TMAXOCTGBFIM_R::new(((self.bits >> 9) & 0x01) != 0) - } - #[doc = "Bit 8 - MMC Transmit 512 to 1023 Octet Good Bad Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn tx512t1023octgbfim(&self) -> TX512T1023OCTGBFIM_R { - TX512T1023OCTGBFIM_R::new(((self.bits >> 8) & 0x01) != 0) - } - #[doc = "Bit 7 - MC Transmit 256 to 511 Octet Good Bad Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn tx256t511octgbfim(&self) -> TX256T511OCTGBFIM_R { - TX256T511OCTGBFIM_R::new(((self.bits >> 7) & 0x01) != 0) - } - #[doc = "Bit 6 - MMC Transmit 128 to 255 Octet Good Bad Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn tx128t255octgbfim(&self) -> TX128T255OCTGBFIM_R { - TX128T255OCTGBFIM_R::new(((self.bits >> 6) & 0x01) != 0) - } - #[doc = "Bit 5 - MMC Transmit 65 to 127 Octet Good Bad Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn tx65t127octgbfim(&self) -> TX65T127OCTGBFIM_R { - TX65T127OCTGBFIM_R::new(((self.bits >> 5) & 0x01) != 0) - } - #[doc = "Bit 4 - MMC Transmit 64 Octet Good Bad Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn tx64octgbfim(&self) -> TX64OCTGBFIM_R { - TX64OCTGBFIM_R::new(((self.bits >> 4) & 0x01) != 0) - } - #[doc = "Bit 3 - MMC Transmit Multicast Good Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn txmcgfim(&self) -> TXMCGFIM_R { - TXMCGFIM_R::new(((self.bits >> 3) & 0x01) != 0) - } - #[doc = "Bit 2 - MMC Transmit Broadcast Good Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn txbcgfim(&self) -> TXBCGFIM_R { - TXBCGFIM_R::new(((self.bits >> 2) & 0x01) != 0) + pub fn txgboctim(&self) -> TxgboctimR { + TxgboctimR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - MMC Transmit Good Bad Frame Counter Interrupt Mask"] #[inline(always)] - pub fn txgbfrmim(&self) -> TXGBFRMIM_R { - TXGBFRMIM_R::new(((self.bits >> 1) & 0x01) != 0) + pub fn txgbfrmim(&self) -> TxgbfrmimR { + TxgbfrmimR::new(((self.bits >> 1) & 1) != 0) } - #[doc = "Bit 0 - MMC Transmit Good Bad Octet Counter Interrupt Mask"] + #[doc = "Bit 2 - MMC Transmit Broadcast Good Frame Counter Interrupt Mask"] #[inline(always)] - pub fn txgboctim(&self) -> TXGBOCTIM_R { - TXGBOCTIM_R::new((self.bits & 0x01) != 0) + pub fn txbcgfim(&self) -> TxbcgfimR { + TxbcgfimR::new(((self.bits >> 2) & 1) != 0) + } + #[doc = "Bit 3 - MMC Transmit Multicast Good Frame Counter Interrupt Mask"] + #[inline(always)] + pub fn txmcgfim(&self) -> TxmcgfimR { + TxmcgfimR::new(((self.bits >> 3) & 1) != 0) + } + #[doc = "Bit 4 - MMC Transmit 64 Octet Good Bad Frame Counter Interrupt Mask"] + #[inline(always)] + pub fn tx64octgbfim(&self) -> Tx64octgbfimR { + Tx64octgbfimR::new(((self.bits >> 4) & 1) != 0) + } + #[doc = "Bit 5 - MMC Transmit 65 to 127 Octet Good Bad Frame Counter Interrupt Mask"] + #[inline(always)] + pub fn tx65t127octgbfim(&self) -> Tx65t127octgbfimR { + Tx65t127octgbfimR::new(((self.bits >> 5) & 1) != 0) + } + #[doc = "Bit 6 - MMC Transmit 128 to 255 Octet Good Bad Frame Counter Interrupt Mask"] + #[inline(always)] + pub fn tx128t255octgbfim(&self) -> Tx128t255octgbfimR { + Tx128t255octgbfimR::new(((self.bits >> 6) & 1) != 0) + } + #[doc = "Bit 7 - MC Transmit 256 to 511 Octet Good Bad Frame Counter Interrupt Mask"] + #[inline(always)] + pub fn tx256t511octgbfim(&self) -> Tx256t511octgbfimR { + Tx256t511octgbfimR::new(((self.bits >> 7) & 1) != 0) + } + #[doc = "Bit 8 - MMC Transmit 512 to 1023 Octet Good Bad Frame Counter Interrupt Mask"] + #[inline(always)] + pub fn tx512t1023octgbfim(&self) -> Tx512t1023octgbfimR { + Tx512t1023octgbfimR::new(((self.bits >> 8) & 1) != 0) + } + #[doc = "Bit 9 - MMC Transmit 1024 to Maximum Octet Good Bad Frame Counter Interrupt Mask"] + #[inline(always)] + pub fn tx1024tmaxoctgbfim(&self) -> Tx1024tmaxoctgbfimR { + Tx1024tmaxoctgbfimR::new(((self.bits >> 9) & 1) != 0) + } + #[doc = "Bit 10 - MMC Transmit Unicast Good Bad Frame Counter Interrupt Mask"] + #[inline(always)] + pub fn txucgbfim(&self) -> TxucgbfimR { + TxucgbfimR::new(((self.bits >> 10) & 1) != 0) + } + #[doc = "Bit 11 - MMC Transmit Multicast Good Bad Frame Counter Interrupt Mask"] + #[inline(always)] + pub fn txmcgbfim(&self) -> TxmcgbfimR { + TxmcgbfimR::new(((self.bits >> 11) & 1) != 0) + } + #[doc = "Bit 12 - MMC Transmit Broadcast Good Bad Frame Counter Interrupt Mask"] + #[inline(always)] + pub fn txbcgbfim(&self) -> TxbcgbfimR { + TxbcgbfimR::new(((self.bits >> 12) & 1) != 0) + } + #[doc = "Bit 13 - MMC Transmit Underflow Error Frame Counter Interrupt Mask"] + #[inline(always)] + pub fn txuflowerfim(&self) -> TxuflowerfimR { + TxuflowerfimR::new(((self.bits >> 13) & 1) != 0) + } + #[doc = "Bit 14 - MMC Transmit Single Collision Good Frame Counter Interrupt Mask"] + #[inline(always)] + pub fn txscolgfim(&self) -> TxscolgfimR { + TxscolgfimR::new(((self.bits >> 14) & 1) != 0) + } + #[doc = "Bit 15 - MMC Transmit Multiple Collision Good Frame Counter Interrupt Mask"] + #[inline(always)] + pub fn txmcolgfim(&self) -> TxmcolgfimR { + TxmcolgfimR::new(((self.bits >> 15) & 1) != 0) + } + #[doc = "Bit 16 - MMC Transmit Deferred Frame Counter Interrupt Mask"] + #[inline(always)] + pub fn txdeffim(&self) -> TxdeffimR { + TxdeffimR::new(((self.bits >> 16) & 1) != 0) + } + #[doc = "Bit 17 - MMC Transmit Late Collision Frame Counter Interrupt Mask"] + #[inline(always)] + pub fn txlatcolfim(&self) -> TxlatcolfimR { + TxlatcolfimR::new(((self.bits >> 17) & 1) != 0) + } + #[doc = "Bit 18 - MMC Transmit Excessive Collision Frame Counter Interrupt Mask"] + #[inline(always)] + pub fn txexcolfim(&self) -> TxexcolfimR { + TxexcolfimR::new(((self.bits >> 18) & 1) != 0) + } + #[doc = "Bit 19 - MMC Transmit Carrier Error Frame Counter Interrupt Mask"] + #[inline(always)] + pub fn txcarerfim(&self) -> TxcarerfimR { + TxcarerfimR::new(((self.bits >> 19) & 1) != 0) + } + #[doc = "Bit 20 - MMC Transmit Good Octet Counter Interrupt Mask"] + #[inline(always)] + pub fn txgoctim(&self) -> TxgoctimR { + TxgoctimR::new(((self.bits >> 20) & 1) != 0) + } + #[doc = "Bit 21 - MMC Transmit Good Frame Counter Interrupt Mask"] + #[inline(always)] + pub fn txgfrmim(&self) -> TxgfrmimR { + TxgfrmimR::new(((self.bits >> 21) & 1) != 0) + } + #[doc = "Bit 22 - MMC Transmit Excessive Deferral Frame Counter Interrupt Mask"] + #[inline(always)] + pub fn txexdeffim(&self) -> TxexdeffimR { + TxexdeffimR::new(((self.bits >> 22) & 1) != 0) + } + #[doc = "Bit 23 - MMC Transmit Pause Frame Counter Interrupt Mask"] + #[inline(always)] + pub fn txpausfim(&self) -> TxpausfimR { + TxpausfimR::new(((self.bits >> 23) & 1) != 0) + } + #[doc = "Bit 24 - MMC Transmit VLAN Good Frame Counter Interrupt Mask"] + #[inline(always)] + pub fn txvlangfim(&self) -> TxvlangfimR { + TxvlangfimR::new(((self.bits >> 24) & 1) != 0) + } + #[doc = "Bit 25 - MMC Transmit Oversize Good Frame Counter Interrupt Mask"] + #[inline(always)] + pub fn txosizegfim(&self) -> TxosizegfimR { + TxosizegfimR::new(((self.bits >> 25) & 1) != 0) } } impl W { - #[doc = "Bit 25 - MMC Transmit Oversize Good Frame Counter Interrupt Mask"] + #[doc = "Bit 0 - MMC Transmit Good Bad Octet Counter Interrupt Mask"] #[inline(always)] - pub fn txosizegfim(&mut self) -> TXOSIZEGFIM_W { - TXOSIZEGFIM_W { w: self } - } - #[doc = "Bit 24 - MMC Transmit VLAN Good Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn txvlangfim(&mut self) -> TXVLANGFIM_W { - TXVLANGFIM_W { w: self } - } - #[doc = "Bit 23 - MMC Transmit Pause Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn txpausfim(&mut self) -> TXPAUSFIM_W { - TXPAUSFIM_W { w: self } - } - #[doc = "Bit 22 - MMC Transmit Excessive Deferral Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn txexdeffim(&mut self) -> TXEXDEFFIM_W { - TXEXDEFFIM_W { w: self } - } - #[doc = "Bit 21 - MMC Transmit Good Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn txgfrmim(&mut self) -> TXGFRMIM_W { - TXGFRMIM_W { w: self } - } - #[doc = "Bit 20 - MMC Transmit Good Octet Counter Interrupt Mask"] - #[inline(always)] - pub fn txgoctim(&mut self) -> TXGOCTIM_W { - TXGOCTIM_W { w: self } - } - #[doc = "Bit 19 - MMC Transmit Carrier Error Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn txcarerfim(&mut self) -> TXCARERFIM_W { - TXCARERFIM_W { w: self } - } - #[doc = "Bit 18 - MMC Transmit Excessive Collision Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn txexcolfim(&mut self) -> TXEXCOLFIM_W { - TXEXCOLFIM_W { w: self } - } - #[doc = "Bit 17 - MMC Transmit Late Collision Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn txlatcolfim(&mut self) -> TXLATCOLFIM_W { - TXLATCOLFIM_W { w: self } - } - #[doc = "Bit 16 - MMC Transmit Deferred Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn txdeffim(&mut self) -> TXDEFFIM_W { - TXDEFFIM_W { w: self } - } - #[doc = "Bit 15 - MMC Transmit Multiple Collision Good Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn txmcolgfim(&mut self) -> TXMCOLGFIM_W { - TXMCOLGFIM_W { w: self } - } - #[doc = "Bit 14 - MMC Transmit Single Collision Good Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn txscolgfim(&mut self) -> TXSCOLGFIM_W { - TXSCOLGFIM_W { w: self } - } - #[doc = "Bit 13 - MMC Transmit Underflow Error Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn txuflowerfim(&mut self) -> TXUFLOWERFIM_W { - TXUFLOWERFIM_W { w: self } - } - #[doc = "Bit 12 - MMC Transmit Broadcast Good Bad Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn txbcgbfim(&mut self) -> TXBCGBFIM_W { - TXBCGBFIM_W { w: self } - } - #[doc = "Bit 11 - MMC Transmit Multicast Good Bad Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn txmcgbfim(&mut self) -> TXMCGBFIM_W { - TXMCGBFIM_W { w: self } - } - #[doc = "Bit 10 - MMC Transmit Unicast Good Bad Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn txucgbfim(&mut self) -> TXUCGBFIM_W { - TXUCGBFIM_W { w: self } - } - #[doc = "Bit 9 - MMC Transmit 1024 to Maximum Octet Good Bad Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn tx1024tmaxoctgbfim(&mut self) -> TX1024TMAXOCTGBFIM_W { - TX1024TMAXOCTGBFIM_W { w: self } - } - #[doc = "Bit 8 - MMC Transmit 512 to 1023 Octet Good Bad Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn tx512t1023octgbfim(&mut self) -> TX512T1023OCTGBFIM_W { - TX512T1023OCTGBFIM_W { w: self } - } - #[doc = "Bit 7 - MC Transmit 256 to 511 Octet Good Bad Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn tx256t511octgbfim(&mut self) -> TX256T511OCTGBFIM_W { - TX256T511OCTGBFIM_W { w: self } - } - #[doc = "Bit 6 - MMC Transmit 128 to 255 Octet Good Bad Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn tx128t255octgbfim(&mut self) -> TX128T255OCTGBFIM_W { - TX128T255OCTGBFIM_W { w: self } - } - #[doc = "Bit 5 - MMC Transmit 65 to 127 Octet Good Bad Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn tx65t127octgbfim(&mut self) -> TX65T127OCTGBFIM_W { - TX65T127OCTGBFIM_W { w: self } - } - #[doc = "Bit 4 - MMC Transmit 64 Octet Good Bad Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn tx64octgbfim(&mut self) -> TX64OCTGBFIM_W { - TX64OCTGBFIM_W { w: self } - } - #[doc = "Bit 3 - MMC Transmit Multicast Good Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn txmcgfim(&mut self) -> TXMCGFIM_W { - TXMCGFIM_W { w: self } - } - #[doc = "Bit 2 - MMC Transmit Broadcast Good Frame Counter Interrupt Mask"] - #[inline(always)] - pub fn txbcgfim(&mut self) -> TXBCGFIM_W { - TXBCGFIM_W { w: self } + #[must_use] + pub fn txgboctim(&mut self) -> TxgboctimW { + TxgboctimW::new(self, 0) } #[doc = "Bit 1 - MMC Transmit Good Bad Frame Counter Interrupt Mask"] #[inline(always)] - pub fn txgbfrmim(&mut self) -> TXGBFRMIM_W { - TXGBFRMIM_W { w: self } + #[must_use] + pub fn txgbfrmim(&mut self) -> TxgbfrmimW { + TxgbfrmimW::new(self, 1) } - #[doc = "Bit 0 - MMC Transmit Good Bad Octet Counter Interrupt Mask"] + #[doc = "Bit 2 - MMC Transmit Broadcast Good Frame Counter Interrupt Mask"] #[inline(always)] - pub fn txgboctim(&mut self) -> TXGBOCTIM_W { - TXGBOCTIM_W { w: self } + #[must_use] + pub fn txbcgfim(&mut self) -> TxbcgfimW { + TxbcgfimW::new(self, 2) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bit 3 - MMC Transmit Multicast Good Frame Counter Interrupt Mask"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn txmcgfim(&mut self) -> TxmcgfimW { + TxmcgfimW::new(self, 3) + } + #[doc = "Bit 4 - MMC Transmit 64 Octet Good Bad Frame Counter Interrupt Mask"] + #[inline(always)] + #[must_use] + pub fn tx64octgbfim(&mut self) -> Tx64octgbfimW { + Tx64octgbfimW::new(self, 4) + } + #[doc = "Bit 5 - MMC Transmit 65 to 127 Octet Good Bad Frame Counter Interrupt Mask"] + #[inline(always)] + #[must_use] + pub fn tx65t127octgbfim(&mut self) -> Tx65t127octgbfimW { + Tx65t127octgbfimW::new(self, 5) + } + #[doc = "Bit 6 - MMC Transmit 128 to 255 Octet Good Bad Frame Counter Interrupt Mask"] + #[inline(always)] + #[must_use] + pub fn tx128t255octgbfim(&mut self) -> Tx128t255octgbfimW { + Tx128t255octgbfimW::new(self, 6) + } + #[doc = "Bit 7 - MC Transmit 256 to 511 Octet Good Bad Frame Counter Interrupt Mask"] + #[inline(always)] + #[must_use] + pub fn tx256t511octgbfim(&mut self) -> Tx256t511octgbfimW { + Tx256t511octgbfimW::new(self, 7) + } + #[doc = "Bit 8 - MMC Transmit 512 to 1023 Octet Good Bad Frame Counter Interrupt Mask"] + #[inline(always)] + #[must_use] + pub fn tx512t1023octgbfim(&mut self) -> Tx512t1023octgbfimW { + Tx512t1023octgbfimW::new(self, 8) + } + #[doc = "Bit 9 - MMC Transmit 1024 to Maximum Octet Good Bad Frame Counter Interrupt Mask"] + #[inline(always)] + #[must_use] + pub fn tx1024tmaxoctgbfim(&mut self) -> Tx1024tmaxoctgbfimW { + Tx1024tmaxoctgbfimW::new(self, 9) + } + #[doc = "Bit 10 - MMC Transmit Unicast Good Bad Frame Counter Interrupt Mask"] + #[inline(always)] + #[must_use] + pub fn txucgbfim(&mut self) -> TxucgbfimW { + TxucgbfimW::new(self, 10) + } + #[doc = "Bit 11 - MMC Transmit Multicast Good Bad Frame Counter Interrupt Mask"] + #[inline(always)] + #[must_use] + pub fn txmcgbfim(&mut self) -> TxmcgbfimW { + TxmcgbfimW::new(self, 11) + } + #[doc = "Bit 12 - MMC Transmit Broadcast Good Bad Frame Counter Interrupt Mask"] + #[inline(always)] + #[must_use] + pub fn txbcgbfim(&mut self) -> TxbcgbfimW { + TxbcgbfimW::new(self, 12) + } + #[doc = "Bit 13 - MMC Transmit Underflow Error Frame Counter Interrupt Mask"] + #[inline(always)] + #[must_use] + pub fn txuflowerfim(&mut self) -> TxuflowerfimW { + TxuflowerfimW::new(self, 13) + } + #[doc = "Bit 14 - MMC Transmit Single Collision Good Frame Counter Interrupt Mask"] + #[inline(always)] + #[must_use] + pub fn txscolgfim(&mut self) -> TxscolgfimW { + TxscolgfimW::new(self, 14) + } + #[doc = "Bit 15 - MMC Transmit Multiple Collision Good Frame Counter Interrupt Mask"] + #[inline(always)] + #[must_use] + pub fn txmcolgfim(&mut self) -> TxmcolgfimW { + TxmcolgfimW::new(self, 15) + } + #[doc = "Bit 16 - MMC Transmit Deferred Frame Counter Interrupt Mask"] + #[inline(always)] + #[must_use] + pub fn txdeffim(&mut self) -> TxdeffimW { + TxdeffimW::new(self, 16) + } + #[doc = "Bit 17 - MMC Transmit Late Collision Frame Counter Interrupt Mask"] + #[inline(always)] + #[must_use] + pub fn txlatcolfim(&mut self) -> TxlatcolfimW { + TxlatcolfimW::new(self, 17) + } + #[doc = "Bit 18 - MMC Transmit Excessive Collision Frame Counter Interrupt Mask"] + #[inline(always)] + #[must_use] + pub fn txexcolfim(&mut self) -> TxexcolfimW { + TxexcolfimW::new(self, 18) + } + #[doc = "Bit 19 - MMC Transmit Carrier Error Frame Counter Interrupt Mask"] + #[inline(always)] + #[must_use] + pub fn txcarerfim(&mut self) -> TxcarerfimW { + TxcarerfimW::new(self, 19) + } + #[doc = "Bit 20 - MMC Transmit Good Octet Counter Interrupt Mask"] + #[inline(always)] + #[must_use] + pub fn txgoctim(&mut self) -> TxgoctimW { + TxgoctimW::new(self, 20) + } + #[doc = "Bit 21 - MMC Transmit Good Frame Counter Interrupt Mask"] + #[inline(always)] + #[must_use] + pub fn txgfrmim(&mut self) -> TxgfrmimW { + TxgfrmimW::new(self, 21) + } + #[doc = "Bit 22 - MMC Transmit Excessive Deferral Frame Counter Interrupt Mask"] + #[inline(always)] + #[must_use] + pub fn txexdeffim(&mut self) -> TxexdeffimW { + TxexdeffimW::new(self, 22) + } + #[doc = "Bit 23 - MMC Transmit Pause Frame Counter Interrupt Mask"] + #[inline(always)] + #[must_use] + pub fn txpausfim(&mut self) -> TxpausfimW { + TxpausfimW::new(self, 23) + } + #[doc = "Bit 24 - MMC Transmit VLAN Good Frame Counter Interrupt Mask"] + #[inline(always)] + #[must_use] + pub fn txvlangfim(&mut self) -> TxvlangfimW { + TxvlangfimW::new(self, 24) + } + #[doc = "Bit 25 - MMC Transmit Oversize Good Frame Counter Interrupt Mask"] + #[inline(always)] + #[must_use] + pub fn txosizegfim(&mut self) -> TxosizegfimW { + TxosizegfimW::new(self, 25) } } -#[doc = "MMC Transmit Interrupt Mask Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [mmc_intr_mask_tx](index.html) module"] -pub struct MMC_INTR_MASK_TX_SPEC; -impl crate::RegisterSpec for MMC_INTR_MASK_TX_SPEC { +#[doc = "MMC Transmit Interrupt Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mmc_intr_mask_tx::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mmc_intr_mask_tx::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct MmcIntrMaskTxSpec; +impl crate::RegisterSpec for MmcIntrMaskTxSpec { type Ux = u32; } -#[doc = "`read()` method returns [mmc_intr_mask_tx::R](R) reader structure"] -impl crate::Readable for MMC_INTR_MASK_TX_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [mmc_intr_mask_tx::W](W) writer structure"] -impl crate::Writable for MMC_INTR_MASK_TX_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`mmc_intr_mask_tx::R`](R) reader structure"] +impl crate::Readable for MmcIntrMaskTxSpec {} +#[doc = "`write(|w| ..)` method takes [`mmc_intr_mask_tx::W`](W) writer structure"] +impl crate::Writable for MmcIntrMaskTxSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MMC_INTR_MASK_TX to value 0"] -impl crate::Resettable for MMC_INTR_MASK_TX_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for MmcIntrMaskTxSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/mmc_intr_rx.rs b/va416xx/src/eth/mmc_intr_rx.rs index e2e0832..78123ca 100644 --- a/va416xx/src/eth/mmc_intr_rx.rs +++ b/va416xx/src/eth/mmc_intr_rx.rs @@ -1,1288 +1,415 @@ #[doc = "Register `MMC_INTR_RX` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `MMC_INTR_RX` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `RXCTRLFIS` reader - MMC Receive Control Frame Counter Interrupt Status"] -pub struct RXCTRLFIS_R(crate::FieldReader); -impl RXCTRLFIS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXCTRLFIS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXCTRLFIS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RXCTRLFIS` writer - MMC Receive Control Frame Counter Interrupt Status"] -pub struct RXCTRLFIS_W<'a> { - w: &'a mut W, -} -impl<'a> RXCTRLFIS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 25)) | ((value as u32 & 0x01) << 25); - self.w - } -} -#[doc = "Field `RXRCVERRFIS` reader - MMC Receive Error Frame Counter Interrupt Status"] -pub struct RXRCVERRFIS_R(crate::FieldReader); -impl RXRCVERRFIS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXRCVERRFIS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXRCVERRFIS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RXRCVERRFIS` writer - MMC Receive Error Frame Counter Interrupt Status"] -pub struct RXRCVERRFIS_W<'a> { - w: &'a mut W, -} -impl<'a> RXRCVERRFIS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 24)) | ((value as u32 & 0x01) << 24); - self.w - } -} -#[doc = "Field `RXWDOGFIS` reader - MMC Receive Watchdog Error Frame Counter Interrupt Status"] -pub struct RXWDOGFIS_R(crate::FieldReader); -impl RXWDOGFIS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXWDOGFIS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXWDOGFIS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RXWDOGFIS` writer - MMC Receive Watchdog Error Frame Counter Interrupt Status"] -pub struct RXWDOGFIS_W<'a> { - w: &'a mut W, -} -impl<'a> RXWDOGFIS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 23)) | ((value as u32 & 0x01) << 23); - self.w - } -} -#[doc = "Field `RXVLANGBFIS` reader - MMC Receive VLAN Good Bad Frame Counter Interrupt Status"] -pub struct RXVLANGBFIS_R(crate::FieldReader); -impl RXVLANGBFIS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXVLANGBFIS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXVLANGBFIS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RXVLANGBFIS` writer - MMC Receive VLAN Good Bad Frame Counter Interrupt Status"] -pub struct RXVLANGBFIS_W<'a> { - w: &'a mut W, -} -impl<'a> RXVLANGBFIS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 22)) | ((value as u32 & 0x01) << 22); - self.w - } -} -#[doc = "Field `RXFOVFIS` reader - MMC Receive FIFO Overflow Frame Counter Interrupt Status"] -pub struct RXFOVFIS_R(crate::FieldReader); -impl RXFOVFIS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXFOVFIS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXFOVFIS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RXFOVFIS` writer - MMC Receive FIFO Overflow Frame Counter Interrupt Status"] -pub struct RXFOVFIS_W<'a> { - w: &'a mut W, -} -impl<'a> RXFOVFIS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 21)) | ((value as u32 & 0x01) << 21); - self.w - } -} -#[doc = "Field `RXPAUSFIS` reader - MMC Receive Pause Frame Counter Interrupt Status"] -pub struct RXPAUSFIS_R(crate::FieldReader); -impl RXPAUSFIS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXPAUSFIS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXPAUSFIS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RXPAUSFIS` writer - MMC Receive Pause Frame Counter Interrupt Status"] -pub struct RXPAUSFIS_W<'a> { - w: &'a mut W, -} -impl<'a> RXPAUSFIS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 20)) | ((value as u32 & 0x01) << 20); - self.w - } -} -#[doc = "Field `RXORANGEFIS` reader - MMC Receive Out Of Range Error Frame Counter Interrupt Status."] -pub struct RXORANGEFIS_R(crate::FieldReader); -impl RXORANGEFIS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXORANGEFIS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXORANGEFIS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RXORANGEFIS` writer - MMC Receive Out Of Range Error Frame Counter Interrupt Status."] -pub struct RXORANGEFIS_W<'a> { - w: &'a mut W, -} -impl<'a> RXORANGEFIS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 19)) | ((value as u32 & 0x01) << 19); - self.w - } -} -#[doc = "Field `RXLENERFIS` reader - MMC Receive Length Error Frame Counter Interrupt Status"] -pub struct RXLENERFIS_R(crate::FieldReader); -impl RXLENERFIS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXLENERFIS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXLENERFIS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RXLENERFIS` writer - MMC Receive Length Error Frame Counter Interrupt Status"] -pub struct RXLENERFIS_W<'a> { - w: &'a mut W, -} -impl<'a> RXLENERFIS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 18)) | ((value as u32 & 0x01) << 18); - self.w - } -} -#[doc = "Field `RXUCGFIS` reader - MMC Receive Unicast Good Frame Counter Interrupt Status"] -pub struct RXUCGFIS_R(crate::FieldReader); -impl RXUCGFIS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXUCGFIS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXUCGFIS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RXUCGFIS` writer - MMC Receive Unicast Good Frame Counter Interrupt Status"] -pub struct RXUCGFIS_W<'a> { - w: &'a mut W, -} -impl<'a> RXUCGFIS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 17)) | ((value as u32 & 0x01) << 17); - self.w - } -} -#[doc = "Field `RX1024TMAXOCTGBFIS` reader - MMC Receive 1024 to Maximum Octet Good Bad Frame Counter Interrupt Status."] -pub struct RX1024TMAXOCTGBFIS_R(crate::FieldReader); -impl RX1024TMAXOCTGBFIS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RX1024TMAXOCTGBFIS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RX1024TMAXOCTGBFIS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RX1024TMAXOCTGBFIS` writer - MMC Receive 1024 to Maximum Octet Good Bad Frame Counter Interrupt Status."] -pub struct RX1024TMAXOCTGBFIS_W<'a> { - w: &'a mut W, -} -impl<'a> RX1024TMAXOCTGBFIS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16); - self.w - } -} -#[doc = "Field `RX512T1023OCTGBFIS` reader - MMC Receive 512 to 1023 Octet Good Bad Frame Counter Interrupt Status"] -pub struct RX512T1023OCTGBFIS_R(crate::FieldReader); -impl RX512T1023OCTGBFIS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RX512T1023OCTGBFIS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RX512T1023OCTGBFIS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RX512T1023OCTGBFIS` writer - MMC Receive 512 to 1023 Octet Good Bad Frame Counter Interrupt Status"] -pub struct RX512T1023OCTGBFIS_W<'a> { - w: &'a mut W, -} -impl<'a> RX512T1023OCTGBFIS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); - self.w - } -} -#[doc = "Field `RX256T511OCTGBFIS` reader - MMC Receive 256 to 511 Octet Good Bad Frame Counter Interrupt Status"] -pub struct RX256T511OCTGBFIS_R(crate::FieldReader); -impl RX256T511OCTGBFIS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RX256T511OCTGBFIS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RX256T511OCTGBFIS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RX256T511OCTGBFIS` writer - MMC Receive 256 to 511 Octet Good Bad Frame Counter Interrupt Status"] -pub struct RX256T511OCTGBFIS_W<'a> { - w: &'a mut W, -} -impl<'a> RX256T511OCTGBFIS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); - self.w - } -} -#[doc = "Field `RX128T255OCTGBFIS` reader - MMC Receive 128 to 255 Octet Good Bad Frame Counter Interrupt Status"] -pub struct RX128T255OCTGBFIS_R(crate::FieldReader); -impl RX128T255OCTGBFIS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RX128T255OCTGBFIS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RX128T255OCTGBFIS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RX128T255OCTGBFIS` writer - MMC Receive 128 to 255 Octet Good Bad Frame Counter Interrupt Status"] -pub struct RX128T255OCTGBFIS_W<'a> { - w: &'a mut W, -} -impl<'a> RX128T255OCTGBFIS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); - self.w - } -} -#[doc = "Field `RX65T127OCTGBFIS` reader - MMC Receive 65 to 127 Octet Good Bad Frame Counter Interrupt Status"] -pub struct RX65T127OCTGBFIS_R(crate::FieldReader); -impl RX65T127OCTGBFIS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RX65T127OCTGBFIS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RX65T127OCTGBFIS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RX65T127OCTGBFIS` writer - MMC Receive 65 to 127 Octet Good Bad Frame Counter Interrupt Status"] -pub struct RX65T127OCTGBFIS_W<'a> { - w: &'a mut W, -} -impl<'a> RX65T127OCTGBFIS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); - self.w - } -} -#[doc = "Field `RX64OCTGBFIS` reader - MMC Receive 64 Octet Good Bad Frame Counter Interrupt Status"] -pub struct RX64OCTGBFIS_R(crate::FieldReader); -impl RX64OCTGBFIS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RX64OCTGBFIS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RX64OCTGBFIS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RX64OCTGBFIS` writer - MMC Receive 64 Octet Good Bad Frame Counter Interrupt Status"] -pub struct RX64OCTGBFIS_W<'a> { - w: &'a mut W, -} -impl<'a> RX64OCTGBFIS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); - self.w - } -} -#[doc = "Field `RXOSIZEGFIS` reader - MMC Receive Oversize Good Frame Counter Interrupt Status"] -pub struct RXOSIZEGFIS_R(crate::FieldReader); -impl RXOSIZEGFIS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXOSIZEGFIS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXOSIZEGFIS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RXOSIZEGFIS` writer - MMC Receive Oversize Good Frame Counter Interrupt Status"] -pub struct RXOSIZEGFIS_W<'a> { - w: &'a mut W, -} -impl<'a> RXOSIZEGFIS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); - self.w - } -} -#[doc = "Field `RXUSIZEGFIS` reader - MMC Receive Undersize Good Frame Counter Interrupt Status"] -pub struct RXUSIZEGFIS_R(crate::FieldReader); -impl RXUSIZEGFIS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXUSIZEGFIS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXUSIZEGFIS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RXUSIZEGFIS` writer - MMC Receive Undersize Good Frame Counter Interrupt Status"] -pub struct RXUSIZEGFIS_W<'a> { - w: &'a mut W, -} -impl<'a> RXUSIZEGFIS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); - self.w - } -} -#[doc = "Field `RXJABERFIS` reader - MMC Receive Jabber Error Frame Counter Interrupt Status"] -pub struct RXJABERFIS_R(crate::FieldReader); -impl RXJABERFIS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXJABERFIS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXJABERFIS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RXJABERFIS` writer - MMC Receive Jabber Error Frame Counter Interrupt Status"] -pub struct RXJABERFIS_W<'a> { - w: &'a mut W, -} -impl<'a> RXJABERFIS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); - self.w - } -} -#[doc = "Field `RXRUNTFIS` reader - MMC Receive Runt Frame Counter Interrupt Status"] -pub struct RXRUNTFIS_R(crate::FieldReader); -impl RXRUNTFIS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXRUNTFIS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXRUNTFIS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RXRUNTFIS` writer - MMC Receive Runt Frame Counter Interrupt Status"] -pub struct RXRUNTFIS_W<'a> { - w: &'a mut W, -} -impl<'a> RXRUNTFIS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); - self.w - } -} -#[doc = "Field `RXALGNERFIS` reader - MMC Receive Alignment Error Frame Counter Interrupt Status"] -pub struct RXALGNERFIS_R(crate::FieldReader); -impl RXALGNERFIS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXALGNERFIS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXALGNERFIS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RXALGNERFIS` writer - MMC Receive Alignment Error Frame Counter Interrupt Status"] -pub struct RXALGNERFIS_W<'a> { - w: &'a mut W, -} -impl<'a> RXALGNERFIS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); - self.w - } -} -#[doc = "Field `RXCRCERFIS` reader - MMC Receive CRC Error Frame Counter Interrupt Status"] -pub struct RXCRCERFIS_R(crate::FieldReader); -impl RXCRCERFIS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXCRCERFIS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXCRCERFIS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RXCRCERFIS` writer - MMC Receive CRC Error Frame Counter Interrupt Status"] -pub struct RXCRCERFIS_W<'a> { - w: &'a mut W, -} -impl<'a> RXCRCERFIS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); - self.w - } -} -#[doc = "Field `RXMCGFIS` reader - MMC Receive Multicast Good Frame Counter Interrupt Status"] -pub struct RXMCGFIS_R(crate::FieldReader); -impl RXMCGFIS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXMCGFIS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXMCGFIS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RXMCGFIS` writer - MMC Receive Multicast Good Frame Counter Interrupt Status"] -pub struct RXMCGFIS_W<'a> { - w: &'a mut W, -} -impl<'a> RXMCGFIS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); - self.w - } -} -#[doc = "Field `RXBCGFIS` reader - MMC Receive Broadcast Good Frame Counter Interrupt Status"] -pub struct RXBCGFIS_R(crate::FieldReader); -impl RXBCGFIS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXBCGFIS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXBCGFIS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RXBCGFIS` writer - MMC Receive Broadcast Good Frame Counter Interrupt Status"] -pub struct RXBCGFIS_W<'a> { - w: &'a mut W, -} -impl<'a> RXBCGFIS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); - self.w - } -} -#[doc = "Field `RXGOCTIS` reader - MMC Receive Good Octet Counter Interrupt Status"] -pub struct RXGOCTIS_R(crate::FieldReader); -impl RXGOCTIS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXGOCTIS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXGOCTIS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RXGOCTIS` writer - MMC Receive Good Octet Counter Interrupt Status"] -pub struct RXGOCTIS_W<'a> { - w: &'a mut W, -} -impl<'a> RXGOCTIS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); - self.w - } -} -#[doc = "Field `RXGBOCTIS` reader - MMC Receive Good Bad Octet Counter Interrupt Status"] -pub struct RXGBOCTIS_R(crate::FieldReader); -impl RXGBOCTIS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXGBOCTIS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXGBOCTIS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RXGBOCTIS` writer - MMC Receive Good Bad Octet Counter Interrupt Status"] -pub struct RXGBOCTIS_W<'a> { - w: &'a mut W, -} -impl<'a> RXGBOCTIS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); - self.w - } -} +pub type W = crate::W; #[doc = "Field `RXGBFRMIS` reader - MMC Receive Good Bad Frame Counter Interrupt Status"] -pub struct RXGBFRMIS_R(crate::FieldReader); -impl RXGBFRMIS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXGBFRMIS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXGBFRMIS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type RxgbfrmisR = crate::BitReader; #[doc = "Field `RXGBFRMIS` writer - MMC Receive Good Bad Frame Counter Interrupt Status"] -pub struct RXGBFRMIS_W<'a> { - w: &'a mut W, -} -impl<'a> RXGBFRMIS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} +pub type RxgbfrmisW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `RXGBOCTIS` reader - MMC Receive Good Bad Octet Counter Interrupt Status"] +pub type RxgboctisR = crate::BitReader; +#[doc = "Field `RXGBOCTIS` writer - MMC Receive Good Bad Octet Counter Interrupt Status"] +pub type RxgboctisW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `RXGOCTIS` reader - MMC Receive Good Octet Counter Interrupt Status"] +pub type RxgoctisR = crate::BitReader; +#[doc = "Field `RXGOCTIS` writer - MMC Receive Good Octet Counter Interrupt Status"] +pub type RxgoctisW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `RXBCGFIS` reader - MMC Receive Broadcast Good Frame Counter Interrupt Status"] +pub type RxbcgfisR = crate::BitReader; +#[doc = "Field `RXBCGFIS` writer - MMC Receive Broadcast Good Frame Counter Interrupt Status"] +pub type RxbcgfisW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `RXMCGFIS` reader - MMC Receive Multicast Good Frame Counter Interrupt Status"] +pub type RxmcgfisR = crate::BitReader; +#[doc = "Field `RXMCGFIS` writer - MMC Receive Multicast Good Frame Counter Interrupt Status"] +pub type RxmcgfisW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `RXCRCERFIS` reader - MMC Receive CRC Error Frame Counter Interrupt Status"] +pub type RxcrcerfisR = crate::BitReader; +#[doc = "Field `RXCRCERFIS` writer - MMC Receive CRC Error Frame Counter Interrupt Status"] +pub type RxcrcerfisW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `RXALGNERFIS` reader - MMC Receive Alignment Error Frame Counter Interrupt Status"] +pub type RxalgnerfisR = crate::BitReader; +#[doc = "Field `RXALGNERFIS` writer - MMC Receive Alignment Error Frame Counter Interrupt Status"] +pub type RxalgnerfisW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `RXRUNTFIS` reader - MMC Receive Runt Frame Counter Interrupt Status"] +pub type RxruntfisR = crate::BitReader; +#[doc = "Field `RXRUNTFIS` writer - MMC Receive Runt Frame Counter Interrupt Status"] +pub type RxruntfisW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `RXJABERFIS` reader - MMC Receive Jabber Error Frame Counter Interrupt Status"] +pub type RxjaberfisR = crate::BitReader; +#[doc = "Field `RXJABERFIS` writer - MMC Receive Jabber Error Frame Counter Interrupt Status"] +pub type RxjaberfisW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `RXUSIZEGFIS` reader - MMC Receive Undersize Good Frame Counter Interrupt Status"] +pub type RxusizegfisR = crate::BitReader; +#[doc = "Field `RXUSIZEGFIS` writer - MMC Receive Undersize Good Frame Counter Interrupt Status"] +pub type RxusizegfisW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `RXOSIZEGFIS` reader - MMC Receive Oversize Good Frame Counter Interrupt Status"] +pub type RxosizegfisR = crate::BitReader; +#[doc = "Field `RXOSIZEGFIS` writer - MMC Receive Oversize Good Frame Counter Interrupt Status"] +pub type RxosizegfisW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `RX64OCTGBFIS` reader - MMC Receive 64 Octet Good Bad Frame Counter Interrupt Status"] +pub type Rx64octgbfisR = crate::BitReader; +#[doc = "Field `RX64OCTGBFIS` writer - MMC Receive 64 Octet Good Bad Frame Counter Interrupt Status"] +pub type Rx64octgbfisW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `RX65T127OCTGBFIS` reader - MMC Receive 65 to 127 Octet Good Bad Frame Counter Interrupt Status"] +pub type Rx65t127octgbfisR = crate::BitReader; +#[doc = "Field `RX65T127OCTGBFIS` writer - MMC Receive 65 to 127 Octet Good Bad Frame Counter Interrupt Status"] +pub type Rx65t127octgbfisW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `RX128T255OCTGBFIS` reader - MMC Receive 128 to 255 Octet Good Bad Frame Counter Interrupt Status"] +pub type Rx128t255octgbfisR = crate::BitReader; +#[doc = "Field `RX128T255OCTGBFIS` writer - MMC Receive 128 to 255 Octet Good Bad Frame Counter Interrupt Status"] +pub type Rx128t255octgbfisW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `RX256T511OCTGBFIS` reader - MMC Receive 256 to 511 Octet Good Bad Frame Counter Interrupt Status"] +pub type Rx256t511octgbfisR = crate::BitReader; +#[doc = "Field `RX256T511OCTGBFIS` writer - MMC Receive 256 to 511 Octet Good Bad Frame Counter Interrupt Status"] +pub type Rx256t511octgbfisW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `RX512T1023OCTGBFIS` reader - MMC Receive 512 to 1023 Octet Good Bad Frame Counter Interrupt Status"] +pub type Rx512t1023octgbfisR = crate::BitReader; +#[doc = "Field `RX512T1023OCTGBFIS` writer - MMC Receive 512 to 1023 Octet Good Bad Frame Counter Interrupt Status"] +pub type Rx512t1023octgbfisW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `RX1024TMAXOCTGBFIS` reader - MMC Receive 1024 to Maximum Octet Good Bad Frame Counter Interrupt Status."] +pub type Rx1024tmaxoctgbfisR = crate::BitReader; +#[doc = "Field `RX1024TMAXOCTGBFIS` writer - MMC Receive 1024 to Maximum Octet Good Bad Frame Counter Interrupt Status."] +pub type Rx1024tmaxoctgbfisW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `RXUCGFIS` reader - MMC Receive Unicast Good Frame Counter Interrupt Status"] +pub type RxucgfisR = crate::BitReader; +#[doc = "Field `RXUCGFIS` writer - MMC Receive Unicast Good Frame Counter Interrupt Status"] +pub type RxucgfisW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `RXLENERFIS` reader - MMC Receive Length Error Frame Counter Interrupt Status"] +pub type RxlenerfisR = crate::BitReader; +#[doc = "Field `RXLENERFIS` writer - MMC Receive Length Error Frame Counter Interrupt Status"] +pub type RxlenerfisW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `RXORANGEFIS` reader - MMC Receive Out Of Range Error Frame Counter Interrupt Status."] +pub type RxorangefisR = crate::BitReader; +#[doc = "Field `RXORANGEFIS` writer - MMC Receive Out Of Range Error Frame Counter Interrupt Status."] +pub type RxorangefisW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `RXPAUSFIS` reader - MMC Receive Pause Frame Counter Interrupt Status"] +pub type RxpausfisR = crate::BitReader; +#[doc = "Field `RXPAUSFIS` writer - MMC Receive Pause Frame Counter Interrupt Status"] +pub type RxpausfisW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `RXFOVFIS` reader - MMC Receive FIFO Overflow Frame Counter Interrupt Status"] +pub type RxfovfisR = crate::BitReader; +#[doc = "Field `RXFOVFIS` writer - MMC Receive FIFO Overflow Frame Counter Interrupt Status"] +pub type RxfovfisW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `RXVLANGBFIS` reader - MMC Receive VLAN Good Bad Frame Counter Interrupt Status"] +pub type RxvlangbfisR = crate::BitReader; +#[doc = "Field `RXVLANGBFIS` writer - MMC Receive VLAN Good Bad Frame Counter Interrupt Status"] +pub type RxvlangbfisW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `RXWDOGFIS` reader - MMC Receive Watchdog Error Frame Counter Interrupt Status"] +pub type RxwdogfisR = crate::BitReader; +#[doc = "Field `RXWDOGFIS` writer - MMC Receive Watchdog Error Frame Counter Interrupt Status"] +pub type RxwdogfisW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `RXRCVERRFIS` reader - MMC Receive Error Frame Counter Interrupt Status"] +pub type RxrcverrfisR = crate::BitReader; +#[doc = "Field `RXRCVERRFIS` writer - MMC Receive Error Frame Counter Interrupt Status"] +pub type RxrcverrfisW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `RXCTRLFIS` reader - MMC Receive Control Frame Counter Interrupt Status"] +pub type RxctrlfisR = crate::BitReader; +#[doc = "Field `RXCTRLFIS` writer - MMC Receive Control Frame Counter Interrupt Status"] +pub type RxctrlfisW<'a, REG> = crate::BitWriter<'a, REG>; impl R { - #[doc = "Bit 25 - MMC Receive Control Frame Counter Interrupt Status"] + #[doc = "Bit 0 - MMC Receive Good Bad Frame Counter Interrupt Status"] #[inline(always)] - pub fn rxctrlfis(&self) -> RXCTRLFIS_R { - RXCTRLFIS_R::new(((self.bits >> 25) & 0x01) != 0) - } - #[doc = "Bit 24 - MMC Receive Error Frame Counter Interrupt Status"] - #[inline(always)] - pub fn rxrcverrfis(&self) -> RXRCVERRFIS_R { - RXRCVERRFIS_R::new(((self.bits >> 24) & 0x01) != 0) - } - #[doc = "Bit 23 - MMC Receive Watchdog Error Frame Counter Interrupt Status"] - #[inline(always)] - pub fn rxwdogfis(&self) -> RXWDOGFIS_R { - RXWDOGFIS_R::new(((self.bits >> 23) & 0x01) != 0) - } - #[doc = "Bit 22 - MMC Receive VLAN Good Bad Frame Counter Interrupt Status"] - #[inline(always)] - pub fn rxvlangbfis(&self) -> RXVLANGBFIS_R { - RXVLANGBFIS_R::new(((self.bits >> 22) & 0x01) != 0) - } - #[doc = "Bit 21 - MMC Receive FIFO Overflow Frame Counter Interrupt Status"] - #[inline(always)] - pub fn rxfovfis(&self) -> RXFOVFIS_R { - RXFOVFIS_R::new(((self.bits >> 21) & 0x01) != 0) - } - #[doc = "Bit 20 - MMC Receive Pause Frame Counter Interrupt Status"] - #[inline(always)] - pub fn rxpausfis(&self) -> RXPAUSFIS_R { - RXPAUSFIS_R::new(((self.bits >> 20) & 0x01) != 0) - } - #[doc = "Bit 19 - MMC Receive Out Of Range Error Frame Counter Interrupt Status."] - #[inline(always)] - pub fn rxorangefis(&self) -> RXORANGEFIS_R { - RXORANGEFIS_R::new(((self.bits >> 19) & 0x01) != 0) - } - #[doc = "Bit 18 - MMC Receive Length Error Frame Counter Interrupt Status"] - #[inline(always)] - pub fn rxlenerfis(&self) -> RXLENERFIS_R { - RXLENERFIS_R::new(((self.bits >> 18) & 0x01) != 0) - } - #[doc = "Bit 17 - MMC Receive Unicast Good Frame Counter Interrupt Status"] - #[inline(always)] - pub fn rxucgfis(&self) -> RXUCGFIS_R { - RXUCGFIS_R::new(((self.bits >> 17) & 0x01) != 0) - } - #[doc = "Bit 16 - MMC Receive 1024 to Maximum Octet Good Bad Frame Counter Interrupt Status."] - #[inline(always)] - pub fn rx1024tmaxoctgbfis(&self) -> RX1024TMAXOCTGBFIS_R { - RX1024TMAXOCTGBFIS_R::new(((self.bits >> 16) & 0x01) != 0) - } - #[doc = "Bit 15 - MMC Receive 512 to 1023 Octet Good Bad Frame Counter Interrupt Status"] - #[inline(always)] - pub fn rx512t1023octgbfis(&self) -> RX512T1023OCTGBFIS_R { - RX512T1023OCTGBFIS_R::new(((self.bits >> 15) & 0x01) != 0) - } - #[doc = "Bit 14 - MMC Receive 256 to 511 Octet Good Bad Frame Counter Interrupt Status"] - #[inline(always)] - pub fn rx256t511octgbfis(&self) -> RX256T511OCTGBFIS_R { - RX256T511OCTGBFIS_R::new(((self.bits >> 14) & 0x01) != 0) - } - #[doc = "Bit 13 - MMC Receive 128 to 255 Octet Good Bad Frame Counter Interrupt Status"] - #[inline(always)] - pub fn rx128t255octgbfis(&self) -> RX128T255OCTGBFIS_R { - RX128T255OCTGBFIS_R::new(((self.bits >> 13) & 0x01) != 0) - } - #[doc = "Bit 12 - MMC Receive 65 to 127 Octet Good Bad Frame Counter Interrupt Status"] - #[inline(always)] - pub fn rx65t127octgbfis(&self) -> RX65T127OCTGBFIS_R { - RX65T127OCTGBFIS_R::new(((self.bits >> 12) & 0x01) != 0) - } - #[doc = "Bit 11 - MMC Receive 64 Octet Good Bad Frame Counter Interrupt Status"] - #[inline(always)] - pub fn rx64octgbfis(&self) -> RX64OCTGBFIS_R { - RX64OCTGBFIS_R::new(((self.bits >> 11) & 0x01) != 0) - } - #[doc = "Bit 10 - MMC Receive Oversize Good Frame Counter Interrupt Status"] - #[inline(always)] - pub fn rxosizegfis(&self) -> RXOSIZEGFIS_R { - RXOSIZEGFIS_R::new(((self.bits >> 10) & 0x01) != 0) - } - #[doc = "Bit 9 - MMC Receive Undersize Good Frame Counter Interrupt Status"] - #[inline(always)] - pub fn rxusizegfis(&self) -> RXUSIZEGFIS_R { - RXUSIZEGFIS_R::new(((self.bits >> 9) & 0x01) != 0) - } - #[doc = "Bit 8 - MMC Receive Jabber Error Frame Counter Interrupt Status"] - #[inline(always)] - pub fn rxjaberfis(&self) -> RXJABERFIS_R { - RXJABERFIS_R::new(((self.bits >> 8) & 0x01) != 0) - } - #[doc = "Bit 7 - MMC Receive Runt Frame Counter Interrupt Status"] - #[inline(always)] - pub fn rxruntfis(&self) -> RXRUNTFIS_R { - RXRUNTFIS_R::new(((self.bits >> 7) & 0x01) != 0) - } - #[doc = "Bit 6 - MMC Receive Alignment Error Frame Counter Interrupt Status"] - #[inline(always)] - pub fn rxalgnerfis(&self) -> RXALGNERFIS_R { - RXALGNERFIS_R::new(((self.bits >> 6) & 0x01) != 0) - } - #[doc = "Bit 5 - MMC Receive CRC Error Frame Counter Interrupt Status"] - #[inline(always)] - pub fn rxcrcerfis(&self) -> RXCRCERFIS_R { - RXCRCERFIS_R::new(((self.bits >> 5) & 0x01) != 0) - } - #[doc = "Bit 4 - MMC Receive Multicast Good Frame Counter Interrupt Status"] - #[inline(always)] - pub fn rxmcgfis(&self) -> RXMCGFIS_R { - RXMCGFIS_R::new(((self.bits >> 4) & 0x01) != 0) - } - #[doc = "Bit 3 - MMC Receive Broadcast Good Frame Counter Interrupt Status"] - #[inline(always)] - pub fn rxbcgfis(&self) -> RXBCGFIS_R { - RXBCGFIS_R::new(((self.bits >> 3) & 0x01) != 0) - } - #[doc = "Bit 2 - MMC Receive Good Octet Counter Interrupt Status"] - #[inline(always)] - pub fn rxgoctis(&self) -> RXGOCTIS_R { - RXGOCTIS_R::new(((self.bits >> 2) & 0x01) != 0) + pub fn rxgbfrmis(&self) -> RxgbfrmisR { + RxgbfrmisR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - MMC Receive Good Bad Octet Counter Interrupt Status"] #[inline(always)] - pub fn rxgboctis(&self) -> RXGBOCTIS_R { - RXGBOCTIS_R::new(((self.bits >> 1) & 0x01) != 0) + pub fn rxgboctis(&self) -> RxgboctisR { + RxgboctisR::new(((self.bits >> 1) & 1) != 0) } - #[doc = "Bit 0 - MMC Receive Good Bad Frame Counter Interrupt Status"] + #[doc = "Bit 2 - MMC Receive Good Octet Counter Interrupt Status"] #[inline(always)] - pub fn rxgbfrmis(&self) -> RXGBFRMIS_R { - RXGBFRMIS_R::new((self.bits & 0x01) != 0) + pub fn rxgoctis(&self) -> RxgoctisR { + RxgoctisR::new(((self.bits >> 2) & 1) != 0) + } + #[doc = "Bit 3 - MMC Receive Broadcast Good Frame Counter Interrupt Status"] + #[inline(always)] + pub fn rxbcgfis(&self) -> RxbcgfisR { + RxbcgfisR::new(((self.bits >> 3) & 1) != 0) + } + #[doc = "Bit 4 - MMC Receive Multicast Good Frame Counter Interrupt Status"] + #[inline(always)] + pub fn rxmcgfis(&self) -> RxmcgfisR { + RxmcgfisR::new(((self.bits >> 4) & 1) != 0) + } + #[doc = "Bit 5 - MMC Receive CRC Error Frame Counter Interrupt Status"] + #[inline(always)] + pub fn rxcrcerfis(&self) -> RxcrcerfisR { + RxcrcerfisR::new(((self.bits >> 5) & 1) != 0) + } + #[doc = "Bit 6 - MMC Receive Alignment Error Frame Counter Interrupt Status"] + #[inline(always)] + pub fn rxalgnerfis(&self) -> RxalgnerfisR { + RxalgnerfisR::new(((self.bits >> 6) & 1) != 0) + } + #[doc = "Bit 7 - MMC Receive Runt Frame Counter Interrupt Status"] + #[inline(always)] + pub fn rxruntfis(&self) -> RxruntfisR { + RxruntfisR::new(((self.bits >> 7) & 1) != 0) + } + #[doc = "Bit 8 - MMC Receive Jabber Error Frame Counter Interrupt Status"] + #[inline(always)] + pub fn rxjaberfis(&self) -> RxjaberfisR { + RxjaberfisR::new(((self.bits >> 8) & 1) != 0) + } + #[doc = "Bit 9 - MMC Receive Undersize Good Frame Counter Interrupt Status"] + #[inline(always)] + pub fn rxusizegfis(&self) -> RxusizegfisR { + RxusizegfisR::new(((self.bits >> 9) & 1) != 0) + } + #[doc = "Bit 10 - MMC Receive Oversize Good Frame Counter Interrupt Status"] + #[inline(always)] + pub fn rxosizegfis(&self) -> RxosizegfisR { + RxosizegfisR::new(((self.bits >> 10) & 1) != 0) + } + #[doc = "Bit 11 - MMC Receive 64 Octet Good Bad Frame Counter Interrupt Status"] + #[inline(always)] + pub fn rx64octgbfis(&self) -> Rx64octgbfisR { + Rx64octgbfisR::new(((self.bits >> 11) & 1) != 0) + } + #[doc = "Bit 12 - MMC Receive 65 to 127 Octet Good Bad Frame Counter Interrupt Status"] + #[inline(always)] + pub fn rx65t127octgbfis(&self) -> Rx65t127octgbfisR { + Rx65t127octgbfisR::new(((self.bits >> 12) & 1) != 0) + } + #[doc = "Bit 13 - MMC Receive 128 to 255 Octet Good Bad Frame Counter Interrupt Status"] + #[inline(always)] + pub fn rx128t255octgbfis(&self) -> Rx128t255octgbfisR { + Rx128t255octgbfisR::new(((self.bits >> 13) & 1) != 0) + } + #[doc = "Bit 14 - MMC Receive 256 to 511 Octet Good Bad Frame Counter Interrupt Status"] + #[inline(always)] + pub fn rx256t511octgbfis(&self) -> Rx256t511octgbfisR { + Rx256t511octgbfisR::new(((self.bits >> 14) & 1) != 0) + } + #[doc = "Bit 15 - MMC Receive 512 to 1023 Octet Good Bad Frame Counter Interrupt Status"] + #[inline(always)] + pub fn rx512t1023octgbfis(&self) -> Rx512t1023octgbfisR { + Rx512t1023octgbfisR::new(((self.bits >> 15) & 1) != 0) + } + #[doc = "Bit 16 - MMC Receive 1024 to Maximum Octet Good Bad Frame Counter Interrupt Status."] + #[inline(always)] + pub fn rx1024tmaxoctgbfis(&self) -> Rx1024tmaxoctgbfisR { + Rx1024tmaxoctgbfisR::new(((self.bits >> 16) & 1) != 0) + } + #[doc = "Bit 17 - MMC Receive Unicast Good Frame Counter Interrupt Status"] + #[inline(always)] + pub fn rxucgfis(&self) -> RxucgfisR { + RxucgfisR::new(((self.bits >> 17) & 1) != 0) + } + #[doc = "Bit 18 - MMC Receive Length Error Frame Counter Interrupt Status"] + #[inline(always)] + pub fn rxlenerfis(&self) -> RxlenerfisR { + RxlenerfisR::new(((self.bits >> 18) & 1) != 0) + } + #[doc = "Bit 19 - MMC Receive Out Of Range Error Frame Counter Interrupt Status."] + #[inline(always)] + pub fn rxorangefis(&self) -> RxorangefisR { + RxorangefisR::new(((self.bits >> 19) & 1) != 0) + } + #[doc = "Bit 20 - MMC Receive Pause Frame Counter Interrupt Status"] + #[inline(always)] + pub fn rxpausfis(&self) -> RxpausfisR { + RxpausfisR::new(((self.bits >> 20) & 1) != 0) + } + #[doc = "Bit 21 - MMC Receive FIFO Overflow Frame Counter Interrupt Status"] + #[inline(always)] + pub fn rxfovfis(&self) -> RxfovfisR { + RxfovfisR::new(((self.bits >> 21) & 1) != 0) + } + #[doc = "Bit 22 - MMC Receive VLAN Good Bad Frame Counter Interrupt Status"] + #[inline(always)] + pub fn rxvlangbfis(&self) -> RxvlangbfisR { + RxvlangbfisR::new(((self.bits >> 22) & 1) != 0) + } + #[doc = "Bit 23 - MMC Receive Watchdog Error Frame Counter Interrupt Status"] + #[inline(always)] + pub fn rxwdogfis(&self) -> RxwdogfisR { + RxwdogfisR::new(((self.bits >> 23) & 1) != 0) + } + #[doc = "Bit 24 - MMC Receive Error Frame Counter Interrupt Status"] + #[inline(always)] + pub fn rxrcverrfis(&self) -> RxrcverrfisR { + RxrcverrfisR::new(((self.bits >> 24) & 1) != 0) + } + #[doc = "Bit 25 - MMC Receive Control Frame Counter Interrupt Status"] + #[inline(always)] + pub fn rxctrlfis(&self) -> RxctrlfisR { + RxctrlfisR::new(((self.bits >> 25) & 1) != 0) } } impl W { - #[doc = "Bit 25 - MMC Receive Control Frame Counter Interrupt Status"] + #[doc = "Bit 0 - MMC Receive Good Bad Frame Counter Interrupt Status"] #[inline(always)] - pub fn rxctrlfis(&mut self) -> RXCTRLFIS_W { - RXCTRLFIS_W { w: self } - } - #[doc = "Bit 24 - MMC Receive Error Frame Counter Interrupt Status"] - #[inline(always)] - pub fn rxrcverrfis(&mut self) -> RXRCVERRFIS_W { - RXRCVERRFIS_W { w: self } - } - #[doc = "Bit 23 - MMC Receive Watchdog Error Frame Counter Interrupt Status"] - #[inline(always)] - pub fn rxwdogfis(&mut self) -> RXWDOGFIS_W { - RXWDOGFIS_W { w: self } - } - #[doc = "Bit 22 - MMC Receive VLAN Good Bad Frame Counter Interrupt Status"] - #[inline(always)] - pub fn rxvlangbfis(&mut self) -> RXVLANGBFIS_W { - RXVLANGBFIS_W { w: self } - } - #[doc = "Bit 21 - MMC Receive FIFO Overflow Frame Counter Interrupt Status"] - #[inline(always)] - pub fn rxfovfis(&mut self) -> RXFOVFIS_W { - RXFOVFIS_W { w: self } - } - #[doc = "Bit 20 - MMC Receive Pause Frame Counter Interrupt Status"] - #[inline(always)] - pub fn rxpausfis(&mut self) -> RXPAUSFIS_W { - RXPAUSFIS_W { w: self } - } - #[doc = "Bit 19 - MMC Receive Out Of Range Error Frame Counter Interrupt Status."] - #[inline(always)] - pub fn rxorangefis(&mut self) -> RXORANGEFIS_W { - RXORANGEFIS_W { w: self } - } - #[doc = "Bit 18 - MMC Receive Length Error Frame Counter Interrupt Status"] - #[inline(always)] - pub fn rxlenerfis(&mut self) -> RXLENERFIS_W { - RXLENERFIS_W { w: self } - } - #[doc = "Bit 17 - MMC Receive Unicast Good Frame Counter Interrupt Status"] - #[inline(always)] - pub fn rxucgfis(&mut self) -> RXUCGFIS_W { - RXUCGFIS_W { w: self } - } - #[doc = "Bit 16 - MMC Receive 1024 to Maximum Octet Good Bad Frame Counter Interrupt Status."] - #[inline(always)] - pub fn rx1024tmaxoctgbfis(&mut self) -> RX1024TMAXOCTGBFIS_W { - RX1024TMAXOCTGBFIS_W { w: self } - } - #[doc = "Bit 15 - MMC Receive 512 to 1023 Octet Good Bad Frame Counter Interrupt Status"] - #[inline(always)] - pub fn rx512t1023octgbfis(&mut self) -> RX512T1023OCTGBFIS_W { - RX512T1023OCTGBFIS_W { w: self } - } - #[doc = "Bit 14 - MMC Receive 256 to 511 Octet Good Bad Frame Counter Interrupt Status"] - #[inline(always)] - pub fn rx256t511octgbfis(&mut self) -> RX256T511OCTGBFIS_W { - RX256T511OCTGBFIS_W { w: self } - } - #[doc = "Bit 13 - MMC Receive 128 to 255 Octet Good Bad Frame Counter Interrupt Status"] - #[inline(always)] - pub fn rx128t255octgbfis(&mut self) -> RX128T255OCTGBFIS_W { - RX128T255OCTGBFIS_W { w: self } - } - #[doc = "Bit 12 - MMC Receive 65 to 127 Octet Good Bad Frame Counter Interrupt Status"] - #[inline(always)] - pub fn rx65t127octgbfis(&mut self) -> RX65T127OCTGBFIS_W { - RX65T127OCTGBFIS_W { w: self } - } - #[doc = "Bit 11 - MMC Receive 64 Octet Good Bad Frame Counter Interrupt Status"] - #[inline(always)] - pub fn rx64octgbfis(&mut self) -> RX64OCTGBFIS_W { - RX64OCTGBFIS_W { w: self } - } - #[doc = "Bit 10 - MMC Receive Oversize Good Frame Counter Interrupt Status"] - #[inline(always)] - pub fn rxosizegfis(&mut self) -> RXOSIZEGFIS_W { - RXOSIZEGFIS_W { w: self } - } - #[doc = "Bit 9 - MMC Receive Undersize Good Frame Counter Interrupt Status"] - #[inline(always)] - pub fn rxusizegfis(&mut self) -> RXUSIZEGFIS_W { - RXUSIZEGFIS_W { w: self } - } - #[doc = "Bit 8 - MMC Receive Jabber Error Frame Counter Interrupt Status"] - #[inline(always)] - pub fn rxjaberfis(&mut self) -> RXJABERFIS_W { - RXJABERFIS_W { w: self } - } - #[doc = "Bit 7 - MMC Receive Runt Frame Counter Interrupt Status"] - #[inline(always)] - pub fn rxruntfis(&mut self) -> RXRUNTFIS_W { - RXRUNTFIS_W { w: self } - } - #[doc = "Bit 6 - MMC Receive Alignment Error Frame Counter Interrupt Status"] - #[inline(always)] - pub fn rxalgnerfis(&mut self) -> RXALGNERFIS_W { - RXALGNERFIS_W { w: self } - } - #[doc = "Bit 5 - MMC Receive CRC Error Frame Counter Interrupt Status"] - #[inline(always)] - pub fn rxcrcerfis(&mut self) -> RXCRCERFIS_W { - RXCRCERFIS_W { w: self } - } - #[doc = "Bit 4 - MMC Receive Multicast Good Frame Counter Interrupt Status"] - #[inline(always)] - pub fn rxmcgfis(&mut self) -> RXMCGFIS_W { - RXMCGFIS_W { w: self } - } - #[doc = "Bit 3 - MMC Receive Broadcast Good Frame Counter Interrupt Status"] - #[inline(always)] - pub fn rxbcgfis(&mut self) -> RXBCGFIS_W { - RXBCGFIS_W { w: self } - } - #[doc = "Bit 2 - MMC Receive Good Octet Counter Interrupt Status"] - #[inline(always)] - pub fn rxgoctis(&mut self) -> RXGOCTIS_W { - RXGOCTIS_W { w: self } + #[must_use] + pub fn rxgbfrmis(&mut self) -> RxgbfrmisW { + RxgbfrmisW::new(self, 0) } #[doc = "Bit 1 - MMC Receive Good Bad Octet Counter Interrupt Status"] #[inline(always)] - pub fn rxgboctis(&mut self) -> RXGBOCTIS_W { - RXGBOCTIS_W { w: self } + #[must_use] + pub fn rxgboctis(&mut self) -> RxgboctisW { + RxgboctisW::new(self, 1) } - #[doc = "Bit 0 - MMC Receive Good Bad Frame Counter Interrupt Status"] + #[doc = "Bit 2 - MMC Receive Good Octet Counter Interrupt Status"] #[inline(always)] - pub fn rxgbfrmis(&mut self) -> RXGBFRMIS_W { - RXGBFRMIS_W { w: self } + #[must_use] + pub fn rxgoctis(&mut self) -> RxgoctisW { + RxgoctisW::new(self, 2) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bit 3 - MMC Receive Broadcast Good Frame Counter Interrupt Status"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn rxbcgfis(&mut self) -> RxbcgfisW { + RxbcgfisW::new(self, 3) + } + #[doc = "Bit 4 - MMC Receive Multicast Good Frame Counter Interrupt Status"] + #[inline(always)] + #[must_use] + pub fn rxmcgfis(&mut self) -> RxmcgfisW { + RxmcgfisW::new(self, 4) + } + #[doc = "Bit 5 - MMC Receive CRC Error Frame Counter Interrupt Status"] + #[inline(always)] + #[must_use] + pub fn rxcrcerfis(&mut self) -> RxcrcerfisW { + RxcrcerfisW::new(self, 5) + } + #[doc = "Bit 6 - MMC Receive Alignment Error Frame Counter Interrupt Status"] + #[inline(always)] + #[must_use] + pub fn rxalgnerfis(&mut self) -> RxalgnerfisW { + RxalgnerfisW::new(self, 6) + } + #[doc = "Bit 7 - MMC Receive Runt Frame Counter Interrupt Status"] + #[inline(always)] + #[must_use] + pub fn rxruntfis(&mut self) -> RxruntfisW { + RxruntfisW::new(self, 7) + } + #[doc = "Bit 8 - MMC Receive Jabber Error Frame Counter Interrupt Status"] + #[inline(always)] + #[must_use] + pub fn rxjaberfis(&mut self) -> RxjaberfisW { + RxjaberfisW::new(self, 8) + } + #[doc = "Bit 9 - MMC Receive Undersize Good Frame Counter Interrupt Status"] + #[inline(always)] + #[must_use] + pub fn rxusizegfis(&mut self) -> RxusizegfisW { + RxusizegfisW::new(self, 9) + } + #[doc = "Bit 10 - MMC Receive Oversize Good Frame Counter Interrupt Status"] + #[inline(always)] + #[must_use] + pub fn rxosizegfis(&mut self) -> RxosizegfisW { + RxosizegfisW::new(self, 10) + } + #[doc = "Bit 11 - MMC Receive 64 Octet Good Bad Frame Counter Interrupt Status"] + #[inline(always)] + #[must_use] + pub fn rx64octgbfis(&mut self) -> Rx64octgbfisW { + Rx64octgbfisW::new(self, 11) + } + #[doc = "Bit 12 - MMC Receive 65 to 127 Octet Good Bad Frame Counter Interrupt Status"] + #[inline(always)] + #[must_use] + pub fn rx65t127octgbfis(&mut self) -> Rx65t127octgbfisW { + Rx65t127octgbfisW::new(self, 12) + } + #[doc = "Bit 13 - MMC Receive 128 to 255 Octet Good Bad Frame Counter Interrupt Status"] + #[inline(always)] + #[must_use] + pub fn rx128t255octgbfis(&mut self) -> Rx128t255octgbfisW { + Rx128t255octgbfisW::new(self, 13) + } + #[doc = "Bit 14 - MMC Receive 256 to 511 Octet Good Bad Frame Counter Interrupt Status"] + #[inline(always)] + #[must_use] + pub fn rx256t511octgbfis(&mut self) -> Rx256t511octgbfisW { + Rx256t511octgbfisW::new(self, 14) + } + #[doc = "Bit 15 - MMC Receive 512 to 1023 Octet Good Bad Frame Counter Interrupt Status"] + #[inline(always)] + #[must_use] + pub fn rx512t1023octgbfis(&mut self) -> Rx512t1023octgbfisW { + Rx512t1023octgbfisW::new(self, 15) + } + #[doc = "Bit 16 - MMC Receive 1024 to Maximum Octet Good Bad Frame Counter Interrupt Status."] + #[inline(always)] + #[must_use] + pub fn rx1024tmaxoctgbfis(&mut self) -> Rx1024tmaxoctgbfisW { + Rx1024tmaxoctgbfisW::new(self, 16) + } + #[doc = "Bit 17 - MMC Receive Unicast Good Frame Counter Interrupt Status"] + #[inline(always)] + #[must_use] + pub fn rxucgfis(&mut self) -> RxucgfisW { + RxucgfisW::new(self, 17) + } + #[doc = "Bit 18 - MMC Receive Length Error Frame Counter Interrupt Status"] + #[inline(always)] + #[must_use] + pub fn rxlenerfis(&mut self) -> RxlenerfisW { + RxlenerfisW::new(self, 18) + } + #[doc = "Bit 19 - MMC Receive Out Of Range Error Frame Counter Interrupt Status."] + #[inline(always)] + #[must_use] + pub fn rxorangefis(&mut self) -> RxorangefisW { + RxorangefisW::new(self, 19) + } + #[doc = "Bit 20 - MMC Receive Pause Frame Counter Interrupt Status"] + #[inline(always)] + #[must_use] + pub fn rxpausfis(&mut self) -> RxpausfisW { + RxpausfisW::new(self, 20) + } + #[doc = "Bit 21 - MMC Receive FIFO Overflow Frame Counter Interrupt Status"] + #[inline(always)] + #[must_use] + pub fn rxfovfis(&mut self) -> RxfovfisW { + RxfovfisW::new(self, 21) + } + #[doc = "Bit 22 - MMC Receive VLAN Good Bad Frame Counter Interrupt Status"] + #[inline(always)] + #[must_use] + pub fn rxvlangbfis(&mut self) -> RxvlangbfisW { + RxvlangbfisW::new(self, 22) + } + #[doc = "Bit 23 - MMC Receive Watchdog Error Frame Counter Interrupt Status"] + #[inline(always)] + #[must_use] + pub fn rxwdogfis(&mut self) -> RxwdogfisW { + RxwdogfisW::new(self, 23) + } + #[doc = "Bit 24 - MMC Receive Error Frame Counter Interrupt Status"] + #[inline(always)] + #[must_use] + pub fn rxrcverrfis(&mut self) -> RxrcverrfisW { + RxrcverrfisW::new(self, 24) + } + #[doc = "Bit 25 - MMC Receive Control Frame Counter Interrupt Status"] + #[inline(always)] + #[must_use] + pub fn rxctrlfis(&mut self) -> RxctrlfisW { + RxctrlfisW::new(self, 25) } } -#[doc = "MMC Receive Interrupt Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [mmc_intr_rx](index.html) module"] -pub struct MMC_INTR_RX_SPEC; -impl crate::RegisterSpec for MMC_INTR_RX_SPEC { +#[doc = "MMC Receive Interrupt Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mmc_intr_rx::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mmc_intr_rx::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct MmcIntrRxSpec; +impl crate::RegisterSpec for MmcIntrRxSpec { type Ux = u32; } -#[doc = "`read()` method returns [mmc_intr_rx::R](R) reader structure"] -impl crate::Readable for MMC_INTR_RX_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [mmc_intr_rx::W](W) writer structure"] -impl crate::Writable for MMC_INTR_RX_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`mmc_intr_rx::R`](R) reader structure"] +impl crate::Readable for MmcIntrRxSpec {} +#[doc = "`write(|w| ..)` method takes [`mmc_intr_rx::W`](W) writer structure"] +impl crate::Writable for MmcIntrRxSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MMC_INTR_RX to value 0"] -impl crate::Resettable for MMC_INTR_RX_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for MmcIntrRxSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/mmc_intr_tx.rs b/va416xx/src/eth/mmc_intr_tx.rs index 1afae74..7069df4 100644 --- a/va416xx/src/eth/mmc_intr_tx.rs +++ b/va416xx/src/eth/mmc_intr_tx.rs @@ -1,1288 +1,415 @@ #[doc = "Register `MMC_INTR_TX` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `MMC_INTR_TX` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `TXOSIZEGFIS` reader - MMC Transmit Oversize Good Frame Counter Interrupt Status"] -pub struct TXOSIZEGFIS_R(crate::FieldReader); -impl TXOSIZEGFIS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXOSIZEGFIS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXOSIZEGFIS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TXOSIZEGFIS` writer - MMC Transmit Oversize Good Frame Counter Interrupt Status"] -pub struct TXOSIZEGFIS_W<'a> { - w: &'a mut W, -} -impl<'a> TXOSIZEGFIS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 25)) | ((value as u32 & 0x01) << 25); - self.w - } -} -#[doc = "Field `TXVLANGFIS` reader - MMC Transmit VLAN Good Frame Counter Interrupt Status"] -pub struct TXVLANGFIS_R(crate::FieldReader); -impl TXVLANGFIS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXVLANGFIS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXVLANGFIS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TXVLANGFIS` writer - MMC Transmit VLAN Good Frame Counter Interrupt Status"] -pub struct TXVLANGFIS_W<'a> { - w: &'a mut W, -} -impl<'a> TXVLANGFIS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 24)) | ((value as u32 & 0x01) << 24); - self.w - } -} -#[doc = "Field `TXPAUSFIS` reader - MMC Transmit Pause Frame Counter Interrupt Status"] -pub struct TXPAUSFIS_R(crate::FieldReader); -impl TXPAUSFIS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXPAUSFIS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXPAUSFIS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TXPAUSFIS` writer - MMC Transmit Pause Frame Counter Interrupt Status"] -pub struct TXPAUSFIS_W<'a> { - w: &'a mut W, -} -impl<'a> TXPAUSFIS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 23)) | ((value as u32 & 0x01) << 23); - self.w - } -} -#[doc = "Field `TXEXDEFFIS` reader - MMC Transmit Excessive Deferral Frame Counter Interrupt Status"] -pub struct TXEXDEFFIS_R(crate::FieldReader); -impl TXEXDEFFIS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXEXDEFFIS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXEXDEFFIS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TXEXDEFFIS` writer - MMC Transmit Excessive Deferral Frame Counter Interrupt Status"] -pub struct TXEXDEFFIS_W<'a> { - w: &'a mut W, -} -impl<'a> TXEXDEFFIS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 22)) | ((value as u32 & 0x01) << 22); - self.w - } -} -#[doc = "Field `TXGFRMIS` reader - MMC Transmit Good Frame Counter Interrupt Status"] -pub struct TXGFRMIS_R(crate::FieldReader); -impl TXGFRMIS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXGFRMIS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXGFRMIS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TXGFRMIS` writer - MMC Transmit Good Frame Counter Interrupt Status"] -pub struct TXGFRMIS_W<'a> { - w: &'a mut W, -} -impl<'a> TXGFRMIS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 21)) | ((value as u32 & 0x01) << 21); - self.w - } -} -#[doc = "Field `TXGOCTIS` reader - MMC Transmit Good Octet Counter Interrupt Status"] -pub struct TXGOCTIS_R(crate::FieldReader); -impl TXGOCTIS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXGOCTIS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXGOCTIS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TXGOCTIS` writer - MMC Transmit Good Octet Counter Interrupt Status"] -pub struct TXGOCTIS_W<'a> { - w: &'a mut W, -} -impl<'a> TXGOCTIS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 20)) | ((value as u32 & 0x01) << 20); - self.w - } -} -#[doc = "Field `TXCARERFIS` reader - MMC Transmit Carrier Error Frame Counter Interrupt Status"] -pub struct TXCARERFIS_R(crate::FieldReader); -impl TXCARERFIS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXCARERFIS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXCARERFIS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TXCARERFIS` writer - MMC Transmit Carrier Error Frame Counter Interrupt Status"] -pub struct TXCARERFIS_W<'a> { - w: &'a mut W, -} -impl<'a> TXCARERFIS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 19)) | ((value as u32 & 0x01) << 19); - self.w - } -} -#[doc = "Field `TXEXCOLFIS` reader - MMC Transmit Excessive Collision Frame Counter Interrupt Status"] -pub struct TXEXCOLFIS_R(crate::FieldReader); -impl TXEXCOLFIS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXEXCOLFIS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXEXCOLFIS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TXEXCOLFIS` writer - MMC Transmit Excessive Collision Frame Counter Interrupt Status"] -pub struct TXEXCOLFIS_W<'a> { - w: &'a mut W, -} -impl<'a> TXEXCOLFIS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 18)) | ((value as u32 & 0x01) << 18); - self.w - } -} -#[doc = "Field `TXLATCOLFIS` reader - MMC Transmit Late Collision Frame Counter Interrupt Status"] -pub struct TXLATCOLFIS_R(crate::FieldReader); -impl TXLATCOLFIS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXLATCOLFIS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXLATCOLFIS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TXLATCOLFIS` writer - MMC Transmit Late Collision Frame Counter Interrupt Status"] -pub struct TXLATCOLFIS_W<'a> { - w: &'a mut W, -} -impl<'a> TXLATCOLFIS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 17)) | ((value as u32 & 0x01) << 17); - self.w - } -} -#[doc = "Field `TXDEFFIS` reader - MMC Transmit Deferred Frame Counter Interrupt Status"] -pub struct TXDEFFIS_R(crate::FieldReader); -impl TXDEFFIS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXDEFFIS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXDEFFIS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TXDEFFIS` writer - MMC Transmit Deferred Frame Counter Interrupt Status"] -pub struct TXDEFFIS_W<'a> { - w: &'a mut W, -} -impl<'a> TXDEFFIS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16); - self.w - } -} -#[doc = "Field `TXMCOLGFIS` reader - MMC Transmit Multiple Collision Good Frame Counter Interrupt Status"] -pub struct TXMCOLGFIS_R(crate::FieldReader); -impl TXMCOLGFIS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXMCOLGFIS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXMCOLGFIS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TXMCOLGFIS` writer - MMC Transmit Multiple Collision Good Frame Counter Interrupt Status"] -pub struct TXMCOLGFIS_W<'a> { - w: &'a mut W, -} -impl<'a> TXMCOLGFIS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); - self.w - } -} -#[doc = "Field `TXSCOLGFIS` reader - MMC Transmit Single Collision Good Frame Counter Interrupt Status"] -pub struct TXSCOLGFIS_R(crate::FieldReader); -impl TXSCOLGFIS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXSCOLGFIS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXSCOLGFIS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TXSCOLGFIS` writer - MMC Transmit Single Collision Good Frame Counter Interrupt Status"] -pub struct TXSCOLGFIS_W<'a> { - w: &'a mut W, -} -impl<'a> TXSCOLGFIS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); - self.w - } -} -#[doc = "Field `TXUFLOWERFIS` reader - MMC Transmit Underflow Error Frame Counter Interrupt Status"] -pub struct TXUFLOWERFIS_R(crate::FieldReader); -impl TXUFLOWERFIS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXUFLOWERFIS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXUFLOWERFIS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TXUFLOWERFIS` writer - MMC Transmit Underflow Error Frame Counter Interrupt Status"] -pub struct TXUFLOWERFIS_W<'a> { - w: &'a mut W, -} -impl<'a> TXUFLOWERFIS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); - self.w - } -} -#[doc = "Field `TXBCGBFIS` reader - MMC Transmit Broadcast Good Bad Frame Counter Interrupt Status"] -pub struct TXBCGBFIS_R(crate::FieldReader); -impl TXBCGBFIS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXBCGBFIS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXBCGBFIS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TXBCGBFIS` writer - MMC Transmit Broadcast Good Bad Frame Counter Interrupt Status"] -pub struct TXBCGBFIS_W<'a> { - w: &'a mut W, -} -impl<'a> TXBCGBFIS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); - self.w - } -} -#[doc = "Field `TXMCGBFIS` reader - MMC Transmit Multicast Good Bad Frame Counter Interrupt Status"] -pub struct TXMCGBFIS_R(crate::FieldReader); -impl TXMCGBFIS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXMCGBFIS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXMCGBFIS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TXMCGBFIS` writer - MMC Transmit Multicast Good Bad Frame Counter Interrupt Status"] -pub struct TXMCGBFIS_W<'a> { - w: &'a mut W, -} -impl<'a> TXMCGBFIS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); - self.w - } -} -#[doc = "Field `TXUCGBFIS` reader - MMC Transmit Unicast Good Bad Frame Counter Interrupt Status"] -pub struct TXUCGBFIS_R(crate::FieldReader); -impl TXUCGBFIS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXUCGBFIS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXUCGBFIS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TXUCGBFIS` writer - MMC Transmit Unicast Good Bad Frame Counter Interrupt Status"] -pub struct TXUCGBFIS_W<'a> { - w: &'a mut W, -} -impl<'a> TXUCGBFIS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); - self.w - } -} -#[doc = "Field `TX1024TMAXOCTGBFIS` reader - MMC Transmit 1024 to Maximum Octet Good Bad Frame Counter"] -pub struct TX1024TMAXOCTGBFIS_R(crate::FieldReader); -impl TX1024TMAXOCTGBFIS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TX1024TMAXOCTGBFIS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TX1024TMAXOCTGBFIS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TX1024TMAXOCTGBFIS` writer - MMC Transmit 1024 to Maximum Octet Good Bad Frame Counter"] -pub struct TX1024TMAXOCTGBFIS_W<'a> { - w: &'a mut W, -} -impl<'a> TX1024TMAXOCTGBFIS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); - self.w - } -} -#[doc = "Field `TX512T1023OCTGBFIS` reader - MMC Transmit 512 to 1023 Octet Good Bad Frame Counter Interrupt Status"] -pub struct TX512T1023OCTGBFIS_R(crate::FieldReader); -impl TX512T1023OCTGBFIS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TX512T1023OCTGBFIS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TX512T1023OCTGBFIS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TX512T1023OCTGBFIS` writer - MMC Transmit 512 to 1023 Octet Good Bad Frame Counter Interrupt Status"] -pub struct TX512T1023OCTGBFIS_W<'a> { - w: &'a mut W, -} -impl<'a> TX512T1023OCTGBFIS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); - self.w - } -} -#[doc = "Field `TX256T511OCTGBFIS` reader - MMC Transmit 256 to 511 Octet Good Bad Frame Counter Interrupt Status"] -pub struct TX256T511OCTGBFIS_R(crate::FieldReader); -impl TX256T511OCTGBFIS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TX256T511OCTGBFIS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TX256T511OCTGBFIS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TX256T511OCTGBFIS` writer - MMC Transmit 256 to 511 Octet Good Bad Frame Counter Interrupt Status"] -pub struct TX256T511OCTGBFIS_W<'a> { - w: &'a mut W, -} -impl<'a> TX256T511OCTGBFIS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); - self.w - } -} -#[doc = "Field `TX128T255OCTGBFIS` reader - MMC Transmit 128 to 255 Octet Good Bad Frame Counter Interrupt Status"] -pub struct TX128T255OCTGBFIS_R(crate::FieldReader); -impl TX128T255OCTGBFIS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TX128T255OCTGBFIS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TX128T255OCTGBFIS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TX128T255OCTGBFIS` writer - MMC Transmit 128 to 255 Octet Good Bad Frame Counter Interrupt Status"] -pub struct TX128T255OCTGBFIS_W<'a> { - w: &'a mut W, -} -impl<'a> TX128T255OCTGBFIS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); - self.w - } -} -#[doc = "Field `TX65T127OCTGBFIS` reader - MMC Transmit 65 to 127 Octet Good Bad Frame Counter Interrupt Status"] -pub struct TX65T127OCTGBFIS_R(crate::FieldReader); -impl TX65T127OCTGBFIS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TX65T127OCTGBFIS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TX65T127OCTGBFIS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TX65T127OCTGBFIS` writer - MMC Transmit 65 to 127 Octet Good Bad Frame Counter Interrupt Status"] -pub struct TX65T127OCTGBFIS_W<'a> { - w: &'a mut W, -} -impl<'a> TX65T127OCTGBFIS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); - self.w - } -} -#[doc = "Field `TX64OCTGBFIS` reader - MMC Transmit 64 Octet Good Bad Frame Counter Interrupt Status"] -pub struct TX64OCTGBFIS_R(crate::FieldReader); -impl TX64OCTGBFIS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TX64OCTGBFIS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TX64OCTGBFIS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TX64OCTGBFIS` writer - MMC Transmit 64 Octet Good Bad Frame Counter Interrupt Status"] -pub struct TX64OCTGBFIS_W<'a> { - w: &'a mut W, -} -impl<'a> TX64OCTGBFIS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); - self.w - } -} -#[doc = "Field `TXMCGFIS` reader - MMC Transmit Multicast Good Frame Counter Interrupt Status"] -pub struct TXMCGFIS_R(crate::FieldReader); -impl TXMCGFIS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXMCGFIS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXMCGFIS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TXMCGFIS` writer - MMC Transmit Multicast Good Frame Counter Interrupt Status"] -pub struct TXMCGFIS_W<'a> { - w: &'a mut W, -} -impl<'a> TXMCGFIS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); - self.w - } -} -#[doc = "Field `TXBCGFIS` reader - MMC Transmit Broadcast Good Frame Counter Interrupt Status"] -pub struct TXBCGFIS_R(crate::FieldReader); -impl TXBCGFIS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXBCGFIS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXBCGFIS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TXBCGFIS` writer - MMC Transmit Broadcast Good Frame Counter Interrupt Status"] -pub struct TXBCGFIS_W<'a> { - w: &'a mut W, -} -impl<'a> TXBCGFIS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); - self.w - } -} -#[doc = "Field `TXGBFRMIS` reader - MMC Transmit Good Bad Frame Counter Interrupt Status"] -pub struct TXGBFRMIS_R(crate::FieldReader); -impl TXGBFRMIS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXGBFRMIS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXGBFRMIS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TXGBFRMIS` writer - MMC Transmit Good Bad Frame Counter Interrupt Status"] -pub struct TXGBFRMIS_W<'a> { - w: &'a mut W, -} -impl<'a> TXGBFRMIS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); - self.w - } -} +pub type W = crate::W; #[doc = "Field `TXGBOCTIS` reader - MMC Transmit Good Bad Octet Counter Interrupt Status"] -pub struct TXGBOCTIS_R(crate::FieldReader); -impl TXGBOCTIS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXGBOCTIS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXGBOCTIS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type TxgboctisR = crate::BitReader; #[doc = "Field `TXGBOCTIS` writer - MMC Transmit Good Bad Octet Counter Interrupt Status"] -pub struct TXGBOCTIS_W<'a> { - w: &'a mut W, -} -impl<'a> TXGBOCTIS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} +pub type TxgboctisW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TXGBFRMIS` reader - MMC Transmit Good Bad Frame Counter Interrupt Status"] +pub type TxgbfrmisR = crate::BitReader; +#[doc = "Field `TXGBFRMIS` writer - MMC Transmit Good Bad Frame Counter Interrupt Status"] +pub type TxgbfrmisW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TXBCGFIS` reader - MMC Transmit Broadcast Good Frame Counter Interrupt Status"] +pub type TxbcgfisR = crate::BitReader; +#[doc = "Field `TXBCGFIS` writer - MMC Transmit Broadcast Good Frame Counter Interrupt Status"] +pub type TxbcgfisW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TXMCGFIS` reader - MMC Transmit Multicast Good Frame Counter Interrupt Status"] +pub type TxmcgfisR = crate::BitReader; +#[doc = "Field `TXMCGFIS` writer - MMC Transmit Multicast Good Frame Counter Interrupt Status"] +pub type TxmcgfisW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TX64OCTGBFIS` reader - MMC Transmit 64 Octet Good Bad Frame Counter Interrupt Status"] +pub type Tx64octgbfisR = crate::BitReader; +#[doc = "Field `TX64OCTGBFIS` writer - MMC Transmit 64 Octet Good Bad Frame Counter Interrupt Status"] +pub type Tx64octgbfisW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TX65T127OCTGBFIS` reader - MMC Transmit 65 to 127 Octet Good Bad Frame Counter Interrupt Status"] +pub type Tx65t127octgbfisR = crate::BitReader; +#[doc = "Field `TX65T127OCTGBFIS` writer - MMC Transmit 65 to 127 Octet Good Bad Frame Counter Interrupt Status"] +pub type Tx65t127octgbfisW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TX128T255OCTGBFIS` reader - MMC Transmit 128 to 255 Octet Good Bad Frame Counter Interrupt Status"] +pub type Tx128t255octgbfisR = crate::BitReader; +#[doc = "Field `TX128T255OCTGBFIS` writer - MMC Transmit 128 to 255 Octet Good Bad Frame Counter Interrupt Status"] +pub type Tx128t255octgbfisW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TX256T511OCTGBFIS` reader - MMC Transmit 256 to 511 Octet Good Bad Frame Counter Interrupt Status"] +pub type Tx256t511octgbfisR = crate::BitReader; +#[doc = "Field `TX256T511OCTGBFIS` writer - MMC Transmit 256 to 511 Octet Good Bad Frame Counter Interrupt Status"] +pub type Tx256t511octgbfisW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TX512T1023OCTGBFIS` reader - MMC Transmit 512 to 1023 Octet Good Bad Frame Counter Interrupt Status"] +pub type Tx512t1023octgbfisR = crate::BitReader; +#[doc = "Field `TX512T1023OCTGBFIS` writer - MMC Transmit 512 to 1023 Octet Good Bad Frame Counter Interrupt Status"] +pub type Tx512t1023octgbfisW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TX1024TMAXOCTGBFIS` reader - MMC Transmit 1024 to Maximum Octet Good Bad Frame Counter"] +pub type Tx1024tmaxoctgbfisR = crate::BitReader; +#[doc = "Field `TX1024TMAXOCTGBFIS` writer - MMC Transmit 1024 to Maximum Octet Good Bad Frame Counter"] +pub type Tx1024tmaxoctgbfisW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TXUCGBFIS` reader - MMC Transmit Unicast Good Bad Frame Counter Interrupt Status"] +pub type TxucgbfisR = crate::BitReader; +#[doc = "Field `TXUCGBFIS` writer - MMC Transmit Unicast Good Bad Frame Counter Interrupt Status"] +pub type TxucgbfisW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TXMCGBFIS` reader - MMC Transmit Multicast Good Bad Frame Counter Interrupt Status"] +pub type TxmcgbfisR = crate::BitReader; +#[doc = "Field `TXMCGBFIS` writer - MMC Transmit Multicast Good Bad Frame Counter Interrupt Status"] +pub type TxmcgbfisW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TXBCGBFIS` reader - MMC Transmit Broadcast Good Bad Frame Counter Interrupt Status"] +pub type TxbcgbfisR = crate::BitReader; +#[doc = "Field `TXBCGBFIS` writer - MMC Transmit Broadcast Good Bad Frame Counter Interrupt Status"] +pub type TxbcgbfisW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TXUFLOWERFIS` reader - MMC Transmit Underflow Error Frame Counter Interrupt Status"] +pub type TxuflowerfisR = crate::BitReader; +#[doc = "Field `TXUFLOWERFIS` writer - MMC Transmit Underflow Error Frame Counter Interrupt Status"] +pub type TxuflowerfisW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TXSCOLGFIS` reader - MMC Transmit Single Collision Good Frame Counter Interrupt Status"] +pub type TxscolgfisR = crate::BitReader; +#[doc = "Field `TXSCOLGFIS` writer - MMC Transmit Single Collision Good Frame Counter Interrupt Status"] +pub type TxscolgfisW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TXMCOLGFIS` reader - MMC Transmit Multiple Collision Good Frame Counter Interrupt Status"] +pub type TxmcolgfisR = crate::BitReader; +#[doc = "Field `TXMCOLGFIS` writer - MMC Transmit Multiple Collision Good Frame Counter Interrupt Status"] +pub type TxmcolgfisW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TXDEFFIS` reader - MMC Transmit Deferred Frame Counter Interrupt Status"] +pub type TxdeffisR = crate::BitReader; +#[doc = "Field `TXDEFFIS` writer - MMC Transmit Deferred Frame Counter Interrupt Status"] +pub type TxdeffisW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TXLATCOLFIS` reader - MMC Transmit Late Collision Frame Counter Interrupt Status"] +pub type TxlatcolfisR = crate::BitReader; +#[doc = "Field `TXLATCOLFIS` writer - MMC Transmit Late Collision Frame Counter Interrupt Status"] +pub type TxlatcolfisW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TXEXCOLFIS` reader - MMC Transmit Excessive Collision Frame Counter Interrupt Status"] +pub type TxexcolfisR = crate::BitReader; +#[doc = "Field `TXEXCOLFIS` writer - MMC Transmit Excessive Collision Frame Counter Interrupt Status"] +pub type TxexcolfisW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TXCARERFIS` reader - MMC Transmit Carrier Error Frame Counter Interrupt Status"] +pub type TxcarerfisR = crate::BitReader; +#[doc = "Field `TXCARERFIS` writer - MMC Transmit Carrier Error Frame Counter Interrupt Status"] +pub type TxcarerfisW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TXGOCTIS` reader - MMC Transmit Good Octet Counter Interrupt Status"] +pub type TxgoctisR = crate::BitReader; +#[doc = "Field `TXGOCTIS` writer - MMC Transmit Good Octet Counter Interrupt Status"] +pub type TxgoctisW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TXGFRMIS` reader - MMC Transmit Good Frame Counter Interrupt Status"] +pub type TxgfrmisR = crate::BitReader; +#[doc = "Field `TXGFRMIS` writer - MMC Transmit Good Frame Counter Interrupt Status"] +pub type TxgfrmisW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TXEXDEFFIS` reader - MMC Transmit Excessive Deferral Frame Counter Interrupt Status"] +pub type TxexdeffisR = crate::BitReader; +#[doc = "Field `TXEXDEFFIS` writer - MMC Transmit Excessive Deferral Frame Counter Interrupt Status"] +pub type TxexdeffisW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TXPAUSFIS` reader - MMC Transmit Pause Frame Counter Interrupt Status"] +pub type TxpausfisR = crate::BitReader; +#[doc = "Field `TXPAUSFIS` writer - MMC Transmit Pause Frame Counter Interrupt Status"] +pub type TxpausfisW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TXVLANGFIS` reader - MMC Transmit VLAN Good Frame Counter Interrupt Status"] +pub type TxvlangfisR = crate::BitReader; +#[doc = "Field `TXVLANGFIS` writer - MMC Transmit VLAN Good Frame Counter Interrupt Status"] +pub type TxvlangfisW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TXOSIZEGFIS` reader - MMC Transmit Oversize Good Frame Counter Interrupt Status"] +pub type TxosizegfisR = crate::BitReader; +#[doc = "Field `TXOSIZEGFIS` writer - MMC Transmit Oversize Good Frame Counter Interrupt Status"] +pub type TxosizegfisW<'a, REG> = crate::BitWriter<'a, REG>; impl R { - #[doc = "Bit 25 - MMC Transmit Oversize Good Frame Counter Interrupt Status"] + #[doc = "Bit 0 - MMC Transmit Good Bad Octet Counter Interrupt Status"] #[inline(always)] - pub fn txosizegfis(&self) -> TXOSIZEGFIS_R { - TXOSIZEGFIS_R::new(((self.bits >> 25) & 0x01) != 0) - } - #[doc = "Bit 24 - MMC Transmit VLAN Good Frame Counter Interrupt Status"] - #[inline(always)] - pub fn txvlangfis(&self) -> TXVLANGFIS_R { - TXVLANGFIS_R::new(((self.bits >> 24) & 0x01) != 0) - } - #[doc = "Bit 23 - MMC Transmit Pause Frame Counter Interrupt Status"] - #[inline(always)] - pub fn txpausfis(&self) -> TXPAUSFIS_R { - TXPAUSFIS_R::new(((self.bits >> 23) & 0x01) != 0) - } - #[doc = "Bit 22 - MMC Transmit Excessive Deferral Frame Counter Interrupt Status"] - #[inline(always)] - pub fn txexdeffis(&self) -> TXEXDEFFIS_R { - TXEXDEFFIS_R::new(((self.bits >> 22) & 0x01) != 0) - } - #[doc = "Bit 21 - MMC Transmit Good Frame Counter Interrupt Status"] - #[inline(always)] - pub fn txgfrmis(&self) -> TXGFRMIS_R { - TXGFRMIS_R::new(((self.bits >> 21) & 0x01) != 0) - } - #[doc = "Bit 20 - MMC Transmit Good Octet Counter Interrupt Status"] - #[inline(always)] - pub fn txgoctis(&self) -> TXGOCTIS_R { - TXGOCTIS_R::new(((self.bits >> 20) & 0x01) != 0) - } - #[doc = "Bit 19 - MMC Transmit Carrier Error Frame Counter Interrupt Status"] - #[inline(always)] - pub fn txcarerfis(&self) -> TXCARERFIS_R { - TXCARERFIS_R::new(((self.bits >> 19) & 0x01) != 0) - } - #[doc = "Bit 18 - MMC Transmit Excessive Collision Frame Counter Interrupt Status"] - #[inline(always)] - pub fn txexcolfis(&self) -> TXEXCOLFIS_R { - TXEXCOLFIS_R::new(((self.bits >> 18) & 0x01) != 0) - } - #[doc = "Bit 17 - MMC Transmit Late Collision Frame Counter Interrupt Status"] - #[inline(always)] - pub fn txlatcolfis(&self) -> TXLATCOLFIS_R { - TXLATCOLFIS_R::new(((self.bits >> 17) & 0x01) != 0) - } - #[doc = "Bit 16 - MMC Transmit Deferred Frame Counter Interrupt Status"] - #[inline(always)] - pub fn txdeffis(&self) -> TXDEFFIS_R { - TXDEFFIS_R::new(((self.bits >> 16) & 0x01) != 0) - } - #[doc = "Bit 15 - MMC Transmit Multiple Collision Good Frame Counter Interrupt Status"] - #[inline(always)] - pub fn txmcolgfis(&self) -> TXMCOLGFIS_R { - TXMCOLGFIS_R::new(((self.bits >> 15) & 0x01) != 0) - } - #[doc = "Bit 14 - MMC Transmit Single Collision Good Frame Counter Interrupt Status"] - #[inline(always)] - pub fn txscolgfis(&self) -> TXSCOLGFIS_R { - TXSCOLGFIS_R::new(((self.bits >> 14) & 0x01) != 0) - } - #[doc = "Bit 13 - MMC Transmit Underflow Error Frame Counter Interrupt Status"] - #[inline(always)] - pub fn txuflowerfis(&self) -> TXUFLOWERFIS_R { - TXUFLOWERFIS_R::new(((self.bits >> 13) & 0x01) != 0) - } - #[doc = "Bit 12 - MMC Transmit Broadcast Good Bad Frame Counter Interrupt Status"] - #[inline(always)] - pub fn txbcgbfis(&self) -> TXBCGBFIS_R { - TXBCGBFIS_R::new(((self.bits >> 12) & 0x01) != 0) - } - #[doc = "Bit 11 - MMC Transmit Multicast Good Bad Frame Counter Interrupt Status"] - #[inline(always)] - pub fn txmcgbfis(&self) -> TXMCGBFIS_R { - TXMCGBFIS_R::new(((self.bits >> 11) & 0x01) != 0) - } - #[doc = "Bit 10 - MMC Transmit Unicast Good Bad Frame Counter Interrupt Status"] - #[inline(always)] - pub fn txucgbfis(&self) -> TXUCGBFIS_R { - TXUCGBFIS_R::new(((self.bits >> 10) & 0x01) != 0) - } - #[doc = "Bit 9 - MMC Transmit 1024 to Maximum Octet Good Bad Frame Counter"] - #[inline(always)] - pub fn tx1024tmaxoctgbfis(&self) -> TX1024TMAXOCTGBFIS_R { - TX1024TMAXOCTGBFIS_R::new(((self.bits >> 9) & 0x01) != 0) - } - #[doc = "Bit 8 - MMC Transmit 512 to 1023 Octet Good Bad Frame Counter Interrupt Status"] - #[inline(always)] - pub fn tx512t1023octgbfis(&self) -> TX512T1023OCTGBFIS_R { - TX512T1023OCTGBFIS_R::new(((self.bits >> 8) & 0x01) != 0) - } - #[doc = "Bit 7 - MMC Transmit 256 to 511 Octet Good Bad Frame Counter Interrupt Status"] - #[inline(always)] - pub fn tx256t511octgbfis(&self) -> TX256T511OCTGBFIS_R { - TX256T511OCTGBFIS_R::new(((self.bits >> 7) & 0x01) != 0) - } - #[doc = "Bit 6 - MMC Transmit 128 to 255 Octet Good Bad Frame Counter Interrupt Status"] - #[inline(always)] - pub fn tx128t255octgbfis(&self) -> TX128T255OCTGBFIS_R { - TX128T255OCTGBFIS_R::new(((self.bits >> 6) & 0x01) != 0) - } - #[doc = "Bit 5 - MMC Transmit 65 to 127 Octet Good Bad Frame Counter Interrupt Status"] - #[inline(always)] - pub fn tx65t127octgbfis(&self) -> TX65T127OCTGBFIS_R { - TX65T127OCTGBFIS_R::new(((self.bits >> 5) & 0x01) != 0) - } - #[doc = "Bit 4 - MMC Transmit 64 Octet Good Bad Frame Counter Interrupt Status"] - #[inline(always)] - pub fn tx64octgbfis(&self) -> TX64OCTGBFIS_R { - TX64OCTGBFIS_R::new(((self.bits >> 4) & 0x01) != 0) - } - #[doc = "Bit 3 - MMC Transmit Multicast Good Frame Counter Interrupt Status"] - #[inline(always)] - pub fn txmcgfis(&self) -> TXMCGFIS_R { - TXMCGFIS_R::new(((self.bits >> 3) & 0x01) != 0) - } - #[doc = "Bit 2 - MMC Transmit Broadcast Good Frame Counter Interrupt Status"] - #[inline(always)] - pub fn txbcgfis(&self) -> TXBCGFIS_R { - TXBCGFIS_R::new(((self.bits >> 2) & 0x01) != 0) + pub fn txgboctis(&self) -> TxgboctisR { + TxgboctisR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - MMC Transmit Good Bad Frame Counter Interrupt Status"] #[inline(always)] - pub fn txgbfrmis(&self) -> TXGBFRMIS_R { - TXGBFRMIS_R::new(((self.bits >> 1) & 0x01) != 0) + pub fn txgbfrmis(&self) -> TxgbfrmisR { + TxgbfrmisR::new(((self.bits >> 1) & 1) != 0) } - #[doc = "Bit 0 - MMC Transmit Good Bad Octet Counter Interrupt Status"] + #[doc = "Bit 2 - MMC Transmit Broadcast Good Frame Counter Interrupt Status"] #[inline(always)] - pub fn txgboctis(&self) -> TXGBOCTIS_R { - TXGBOCTIS_R::new((self.bits & 0x01) != 0) + pub fn txbcgfis(&self) -> TxbcgfisR { + TxbcgfisR::new(((self.bits >> 2) & 1) != 0) + } + #[doc = "Bit 3 - MMC Transmit Multicast Good Frame Counter Interrupt Status"] + #[inline(always)] + pub fn txmcgfis(&self) -> TxmcgfisR { + TxmcgfisR::new(((self.bits >> 3) & 1) != 0) + } + #[doc = "Bit 4 - MMC Transmit 64 Octet Good Bad Frame Counter Interrupt Status"] + #[inline(always)] + pub fn tx64octgbfis(&self) -> Tx64octgbfisR { + Tx64octgbfisR::new(((self.bits >> 4) & 1) != 0) + } + #[doc = "Bit 5 - MMC Transmit 65 to 127 Octet Good Bad Frame Counter Interrupt Status"] + #[inline(always)] + pub fn tx65t127octgbfis(&self) -> Tx65t127octgbfisR { + Tx65t127octgbfisR::new(((self.bits >> 5) & 1) != 0) + } + #[doc = "Bit 6 - MMC Transmit 128 to 255 Octet Good Bad Frame Counter Interrupt Status"] + #[inline(always)] + pub fn tx128t255octgbfis(&self) -> Tx128t255octgbfisR { + Tx128t255octgbfisR::new(((self.bits >> 6) & 1) != 0) + } + #[doc = "Bit 7 - MMC Transmit 256 to 511 Octet Good Bad Frame Counter Interrupt Status"] + #[inline(always)] + pub fn tx256t511octgbfis(&self) -> Tx256t511octgbfisR { + Tx256t511octgbfisR::new(((self.bits >> 7) & 1) != 0) + } + #[doc = "Bit 8 - MMC Transmit 512 to 1023 Octet Good Bad Frame Counter Interrupt Status"] + #[inline(always)] + pub fn tx512t1023octgbfis(&self) -> Tx512t1023octgbfisR { + Tx512t1023octgbfisR::new(((self.bits >> 8) & 1) != 0) + } + #[doc = "Bit 9 - MMC Transmit 1024 to Maximum Octet Good Bad Frame Counter"] + #[inline(always)] + pub fn tx1024tmaxoctgbfis(&self) -> Tx1024tmaxoctgbfisR { + Tx1024tmaxoctgbfisR::new(((self.bits >> 9) & 1) != 0) + } + #[doc = "Bit 10 - MMC Transmit Unicast Good Bad Frame Counter Interrupt Status"] + #[inline(always)] + pub fn txucgbfis(&self) -> TxucgbfisR { + TxucgbfisR::new(((self.bits >> 10) & 1) != 0) + } + #[doc = "Bit 11 - MMC Transmit Multicast Good Bad Frame Counter Interrupt Status"] + #[inline(always)] + pub fn txmcgbfis(&self) -> TxmcgbfisR { + TxmcgbfisR::new(((self.bits >> 11) & 1) != 0) + } + #[doc = "Bit 12 - MMC Transmit Broadcast Good Bad Frame Counter Interrupt Status"] + #[inline(always)] + pub fn txbcgbfis(&self) -> TxbcgbfisR { + TxbcgbfisR::new(((self.bits >> 12) & 1) != 0) + } + #[doc = "Bit 13 - MMC Transmit Underflow Error Frame Counter Interrupt Status"] + #[inline(always)] + pub fn txuflowerfis(&self) -> TxuflowerfisR { + TxuflowerfisR::new(((self.bits >> 13) & 1) != 0) + } + #[doc = "Bit 14 - MMC Transmit Single Collision Good Frame Counter Interrupt Status"] + #[inline(always)] + pub fn txscolgfis(&self) -> TxscolgfisR { + TxscolgfisR::new(((self.bits >> 14) & 1) != 0) + } + #[doc = "Bit 15 - MMC Transmit Multiple Collision Good Frame Counter Interrupt Status"] + #[inline(always)] + pub fn txmcolgfis(&self) -> TxmcolgfisR { + TxmcolgfisR::new(((self.bits >> 15) & 1) != 0) + } + #[doc = "Bit 16 - MMC Transmit Deferred Frame Counter Interrupt Status"] + #[inline(always)] + pub fn txdeffis(&self) -> TxdeffisR { + TxdeffisR::new(((self.bits >> 16) & 1) != 0) + } + #[doc = "Bit 17 - MMC Transmit Late Collision Frame Counter Interrupt Status"] + #[inline(always)] + pub fn txlatcolfis(&self) -> TxlatcolfisR { + TxlatcolfisR::new(((self.bits >> 17) & 1) != 0) + } + #[doc = "Bit 18 - MMC Transmit Excessive Collision Frame Counter Interrupt Status"] + #[inline(always)] + pub fn txexcolfis(&self) -> TxexcolfisR { + TxexcolfisR::new(((self.bits >> 18) & 1) != 0) + } + #[doc = "Bit 19 - MMC Transmit Carrier Error Frame Counter Interrupt Status"] + #[inline(always)] + pub fn txcarerfis(&self) -> TxcarerfisR { + TxcarerfisR::new(((self.bits >> 19) & 1) != 0) + } + #[doc = "Bit 20 - MMC Transmit Good Octet Counter Interrupt Status"] + #[inline(always)] + pub fn txgoctis(&self) -> TxgoctisR { + TxgoctisR::new(((self.bits >> 20) & 1) != 0) + } + #[doc = "Bit 21 - MMC Transmit Good Frame Counter Interrupt Status"] + #[inline(always)] + pub fn txgfrmis(&self) -> TxgfrmisR { + TxgfrmisR::new(((self.bits >> 21) & 1) != 0) + } + #[doc = "Bit 22 - MMC Transmit Excessive Deferral Frame Counter Interrupt Status"] + #[inline(always)] + pub fn txexdeffis(&self) -> TxexdeffisR { + TxexdeffisR::new(((self.bits >> 22) & 1) != 0) + } + #[doc = "Bit 23 - MMC Transmit Pause Frame Counter Interrupt Status"] + #[inline(always)] + pub fn txpausfis(&self) -> TxpausfisR { + TxpausfisR::new(((self.bits >> 23) & 1) != 0) + } + #[doc = "Bit 24 - MMC Transmit VLAN Good Frame Counter Interrupt Status"] + #[inline(always)] + pub fn txvlangfis(&self) -> TxvlangfisR { + TxvlangfisR::new(((self.bits >> 24) & 1) != 0) + } + #[doc = "Bit 25 - MMC Transmit Oversize Good Frame Counter Interrupt Status"] + #[inline(always)] + pub fn txosizegfis(&self) -> TxosizegfisR { + TxosizegfisR::new(((self.bits >> 25) & 1) != 0) } } impl W { - #[doc = "Bit 25 - MMC Transmit Oversize Good Frame Counter Interrupt Status"] + #[doc = "Bit 0 - MMC Transmit Good Bad Octet Counter Interrupt Status"] #[inline(always)] - pub fn txosizegfis(&mut self) -> TXOSIZEGFIS_W { - TXOSIZEGFIS_W { w: self } - } - #[doc = "Bit 24 - MMC Transmit VLAN Good Frame Counter Interrupt Status"] - #[inline(always)] - pub fn txvlangfis(&mut self) -> TXVLANGFIS_W { - TXVLANGFIS_W { w: self } - } - #[doc = "Bit 23 - MMC Transmit Pause Frame Counter Interrupt Status"] - #[inline(always)] - pub fn txpausfis(&mut self) -> TXPAUSFIS_W { - TXPAUSFIS_W { w: self } - } - #[doc = "Bit 22 - MMC Transmit Excessive Deferral Frame Counter Interrupt Status"] - #[inline(always)] - pub fn txexdeffis(&mut self) -> TXEXDEFFIS_W { - TXEXDEFFIS_W { w: self } - } - #[doc = "Bit 21 - MMC Transmit Good Frame Counter Interrupt Status"] - #[inline(always)] - pub fn txgfrmis(&mut self) -> TXGFRMIS_W { - TXGFRMIS_W { w: self } - } - #[doc = "Bit 20 - MMC Transmit Good Octet Counter Interrupt Status"] - #[inline(always)] - pub fn txgoctis(&mut self) -> TXGOCTIS_W { - TXGOCTIS_W { w: self } - } - #[doc = "Bit 19 - MMC Transmit Carrier Error Frame Counter Interrupt Status"] - #[inline(always)] - pub fn txcarerfis(&mut self) -> TXCARERFIS_W { - TXCARERFIS_W { w: self } - } - #[doc = "Bit 18 - MMC Transmit Excessive Collision Frame Counter Interrupt Status"] - #[inline(always)] - pub fn txexcolfis(&mut self) -> TXEXCOLFIS_W { - TXEXCOLFIS_W { w: self } - } - #[doc = "Bit 17 - MMC Transmit Late Collision Frame Counter Interrupt Status"] - #[inline(always)] - pub fn txlatcolfis(&mut self) -> TXLATCOLFIS_W { - TXLATCOLFIS_W { w: self } - } - #[doc = "Bit 16 - MMC Transmit Deferred Frame Counter Interrupt Status"] - #[inline(always)] - pub fn txdeffis(&mut self) -> TXDEFFIS_W { - TXDEFFIS_W { w: self } - } - #[doc = "Bit 15 - MMC Transmit Multiple Collision Good Frame Counter Interrupt Status"] - #[inline(always)] - pub fn txmcolgfis(&mut self) -> TXMCOLGFIS_W { - TXMCOLGFIS_W { w: self } - } - #[doc = "Bit 14 - MMC Transmit Single Collision Good Frame Counter Interrupt Status"] - #[inline(always)] - pub fn txscolgfis(&mut self) -> TXSCOLGFIS_W { - TXSCOLGFIS_W { w: self } - } - #[doc = "Bit 13 - MMC Transmit Underflow Error Frame Counter Interrupt Status"] - #[inline(always)] - pub fn txuflowerfis(&mut self) -> TXUFLOWERFIS_W { - TXUFLOWERFIS_W { w: self } - } - #[doc = "Bit 12 - MMC Transmit Broadcast Good Bad Frame Counter Interrupt Status"] - #[inline(always)] - pub fn txbcgbfis(&mut self) -> TXBCGBFIS_W { - TXBCGBFIS_W { w: self } - } - #[doc = "Bit 11 - MMC Transmit Multicast Good Bad Frame Counter Interrupt Status"] - #[inline(always)] - pub fn txmcgbfis(&mut self) -> TXMCGBFIS_W { - TXMCGBFIS_W { w: self } - } - #[doc = "Bit 10 - MMC Transmit Unicast Good Bad Frame Counter Interrupt Status"] - #[inline(always)] - pub fn txucgbfis(&mut self) -> TXUCGBFIS_W { - TXUCGBFIS_W { w: self } - } - #[doc = "Bit 9 - MMC Transmit 1024 to Maximum Octet Good Bad Frame Counter"] - #[inline(always)] - pub fn tx1024tmaxoctgbfis(&mut self) -> TX1024TMAXOCTGBFIS_W { - TX1024TMAXOCTGBFIS_W { w: self } - } - #[doc = "Bit 8 - MMC Transmit 512 to 1023 Octet Good Bad Frame Counter Interrupt Status"] - #[inline(always)] - pub fn tx512t1023octgbfis(&mut self) -> TX512T1023OCTGBFIS_W { - TX512T1023OCTGBFIS_W { w: self } - } - #[doc = "Bit 7 - MMC Transmit 256 to 511 Octet Good Bad Frame Counter Interrupt Status"] - #[inline(always)] - pub fn tx256t511octgbfis(&mut self) -> TX256T511OCTGBFIS_W { - TX256T511OCTGBFIS_W { w: self } - } - #[doc = "Bit 6 - MMC Transmit 128 to 255 Octet Good Bad Frame Counter Interrupt Status"] - #[inline(always)] - pub fn tx128t255octgbfis(&mut self) -> TX128T255OCTGBFIS_W { - TX128T255OCTGBFIS_W { w: self } - } - #[doc = "Bit 5 - MMC Transmit 65 to 127 Octet Good Bad Frame Counter Interrupt Status"] - #[inline(always)] - pub fn tx65t127octgbfis(&mut self) -> TX65T127OCTGBFIS_W { - TX65T127OCTGBFIS_W { w: self } - } - #[doc = "Bit 4 - MMC Transmit 64 Octet Good Bad Frame Counter Interrupt Status"] - #[inline(always)] - pub fn tx64octgbfis(&mut self) -> TX64OCTGBFIS_W { - TX64OCTGBFIS_W { w: self } - } - #[doc = "Bit 3 - MMC Transmit Multicast Good Frame Counter Interrupt Status"] - #[inline(always)] - pub fn txmcgfis(&mut self) -> TXMCGFIS_W { - TXMCGFIS_W { w: self } - } - #[doc = "Bit 2 - MMC Transmit Broadcast Good Frame Counter Interrupt Status"] - #[inline(always)] - pub fn txbcgfis(&mut self) -> TXBCGFIS_W { - TXBCGFIS_W { w: self } + #[must_use] + pub fn txgboctis(&mut self) -> TxgboctisW { + TxgboctisW::new(self, 0) } #[doc = "Bit 1 - MMC Transmit Good Bad Frame Counter Interrupt Status"] #[inline(always)] - pub fn txgbfrmis(&mut self) -> TXGBFRMIS_W { - TXGBFRMIS_W { w: self } + #[must_use] + pub fn txgbfrmis(&mut self) -> TxgbfrmisW { + TxgbfrmisW::new(self, 1) } - #[doc = "Bit 0 - MMC Transmit Good Bad Octet Counter Interrupt Status"] + #[doc = "Bit 2 - MMC Transmit Broadcast Good Frame Counter Interrupt Status"] #[inline(always)] - pub fn txgboctis(&mut self) -> TXGBOCTIS_W { - TXGBOCTIS_W { w: self } + #[must_use] + pub fn txbcgfis(&mut self) -> TxbcgfisW { + TxbcgfisW::new(self, 2) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bit 3 - MMC Transmit Multicast Good Frame Counter Interrupt Status"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn txmcgfis(&mut self) -> TxmcgfisW { + TxmcgfisW::new(self, 3) + } + #[doc = "Bit 4 - MMC Transmit 64 Octet Good Bad Frame Counter Interrupt Status"] + #[inline(always)] + #[must_use] + pub fn tx64octgbfis(&mut self) -> Tx64octgbfisW { + Tx64octgbfisW::new(self, 4) + } + #[doc = "Bit 5 - MMC Transmit 65 to 127 Octet Good Bad Frame Counter Interrupt Status"] + #[inline(always)] + #[must_use] + pub fn tx65t127octgbfis(&mut self) -> Tx65t127octgbfisW { + Tx65t127octgbfisW::new(self, 5) + } + #[doc = "Bit 6 - MMC Transmit 128 to 255 Octet Good Bad Frame Counter Interrupt Status"] + #[inline(always)] + #[must_use] + pub fn tx128t255octgbfis(&mut self) -> Tx128t255octgbfisW { + Tx128t255octgbfisW::new(self, 6) + } + #[doc = "Bit 7 - MMC Transmit 256 to 511 Octet Good Bad Frame Counter Interrupt Status"] + #[inline(always)] + #[must_use] + pub fn tx256t511octgbfis(&mut self) -> Tx256t511octgbfisW { + Tx256t511octgbfisW::new(self, 7) + } + #[doc = "Bit 8 - MMC Transmit 512 to 1023 Octet Good Bad Frame Counter Interrupt Status"] + #[inline(always)] + #[must_use] + pub fn tx512t1023octgbfis(&mut self) -> Tx512t1023octgbfisW { + Tx512t1023octgbfisW::new(self, 8) + } + #[doc = "Bit 9 - MMC Transmit 1024 to Maximum Octet Good Bad Frame Counter"] + #[inline(always)] + #[must_use] + pub fn tx1024tmaxoctgbfis(&mut self) -> Tx1024tmaxoctgbfisW { + Tx1024tmaxoctgbfisW::new(self, 9) + } + #[doc = "Bit 10 - MMC Transmit Unicast Good Bad Frame Counter Interrupt Status"] + #[inline(always)] + #[must_use] + pub fn txucgbfis(&mut self) -> TxucgbfisW { + TxucgbfisW::new(self, 10) + } + #[doc = "Bit 11 - MMC Transmit Multicast Good Bad Frame Counter Interrupt Status"] + #[inline(always)] + #[must_use] + pub fn txmcgbfis(&mut self) -> TxmcgbfisW { + TxmcgbfisW::new(self, 11) + } + #[doc = "Bit 12 - MMC Transmit Broadcast Good Bad Frame Counter Interrupt Status"] + #[inline(always)] + #[must_use] + pub fn txbcgbfis(&mut self) -> TxbcgbfisW { + TxbcgbfisW::new(self, 12) + } + #[doc = "Bit 13 - MMC Transmit Underflow Error Frame Counter Interrupt Status"] + #[inline(always)] + #[must_use] + pub fn txuflowerfis(&mut self) -> TxuflowerfisW { + TxuflowerfisW::new(self, 13) + } + #[doc = "Bit 14 - MMC Transmit Single Collision Good Frame Counter Interrupt Status"] + #[inline(always)] + #[must_use] + pub fn txscolgfis(&mut self) -> TxscolgfisW { + TxscolgfisW::new(self, 14) + } + #[doc = "Bit 15 - MMC Transmit Multiple Collision Good Frame Counter Interrupt Status"] + #[inline(always)] + #[must_use] + pub fn txmcolgfis(&mut self) -> TxmcolgfisW { + TxmcolgfisW::new(self, 15) + } + #[doc = "Bit 16 - MMC Transmit Deferred Frame Counter Interrupt Status"] + #[inline(always)] + #[must_use] + pub fn txdeffis(&mut self) -> TxdeffisW { + TxdeffisW::new(self, 16) + } + #[doc = "Bit 17 - MMC Transmit Late Collision Frame Counter Interrupt Status"] + #[inline(always)] + #[must_use] + pub fn txlatcolfis(&mut self) -> TxlatcolfisW { + TxlatcolfisW::new(self, 17) + } + #[doc = "Bit 18 - MMC Transmit Excessive Collision Frame Counter Interrupt Status"] + #[inline(always)] + #[must_use] + pub fn txexcolfis(&mut self) -> TxexcolfisW { + TxexcolfisW::new(self, 18) + } + #[doc = "Bit 19 - MMC Transmit Carrier Error Frame Counter Interrupt Status"] + #[inline(always)] + #[must_use] + pub fn txcarerfis(&mut self) -> TxcarerfisW { + TxcarerfisW::new(self, 19) + } + #[doc = "Bit 20 - MMC Transmit Good Octet Counter Interrupt Status"] + #[inline(always)] + #[must_use] + pub fn txgoctis(&mut self) -> TxgoctisW { + TxgoctisW::new(self, 20) + } + #[doc = "Bit 21 - MMC Transmit Good Frame Counter Interrupt Status"] + #[inline(always)] + #[must_use] + pub fn txgfrmis(&mut self) -> TxgfrmisW { + TxgfrmisW::new(self, 21) + } + #[doc = "Bit 22 - MMC Transmit Excessive Deferral Frame Counter Interrupt Status"] + #[inline(always)] + #[must_use] + pub fn txexdeffis(&mut self) -> TxexdeffisW { + TxexdeffisW::new(self, 22) + } + #[doc = "Bit 23 - MMC Transmit Pause Frame Counter Interrupt Status"] + #[inline(always)] + #[must_use] + pub fn txpausfis(&mut self) -> TxpausfisW { + TxpausfisW::new(self, 23) + } + #[doc = "Bit 24 - MMC Transmit VLAN Good Frame Counter Interrupt Status"] + #[inline(always)] + #[must_use] + pub fn txvlangfis(&mut self) -> TxvlangfisW { + TxvlangfisW::new(self, 24) + } + #[doc = "Bit 25 - MMC Transmit Oversize Good Frame Counter Interrupt Status"] + #[inline(always)] + #[must_use] + pub fn txosizegfis(&mut self) -> TxosizegfisW { + TxosizegfisW::new(self, 25) } } -#[doc = "MMC Transmit Interrupt Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [mmc_intr_tx](index.html) module"] -pub struct MMC_INTR_TX_SPEC; -impl crate::RegisterSpec for MMC_INTR_TX_SPEC { +#[doc = "MMC Transmit Interrupt Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mmc_intr_tx::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mmc_intr_tx::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct MmcIntrTxSpec; +impl crate::RegisterSpec for MmcIntrTxSpec { type Ux = u32; } -#[doc = "`read()` method returns [mmc_intr_tx::R](R) reader structure"] -impl crate::Readable for MMC_INTR_TX_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [mmc_intr_tx::W](W) writer structure"] -impl crate::Writable for MMC_INTR_TX_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`mmc_intr_tx::R`](R) reader structure"] +impl crate::Readable for MmcIntrTxSpec {} +#[doc = "`write(|w| ..)` method takes [`mmc_intr_tx::W`](W) writer structure"] +impl crate::Writable for MmcIntrTxSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MMC_INTR_TX to value 0"] -impl crate::Resettable for MMC_INTR_TX_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for MmcIntrTxSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/rx1024maxoct_gb.rs b/va416xx/src/eth/rx1024maxoct_gb.rs index a97b92c..aed43cc 100644 --- a/va416xx/src/eth/rx1024maxoct_gb.rs +++ b/va416xx/src/eth/rx1024maxoct_gb.rs @@ -1,53 +1,22 @@ #[doc = "Register `RX1024MAXOCT_GB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `COUNT` reader - Number of frames"] -pub struct COUNT_R(crate::FieldReader); -impl COUNT_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - COUNT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for COUNT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type CountR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Number of frames"] #[inline(always)] - pub fn count(&self) -> COUNT_R { - COUNT_R::new(self.bits as u32) + pub fn count(&self) -> CountR { + CountR::new(self.bits) } } -#[doc = "MMC Number of good and bad frames received with length between 1024 and max size bytes\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rx1024maxoct_gb](index.html) module"] -pub struct RX1024MAXOCT_GB_SPEC; -impl crate::RegisterSpec for RX1024MAXOCT_GB_SPEC { +#[doc = "MMC Number of good and bad frames received with length between 1024 and max size bytes\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx1024maxoct_gb::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Rx1024maxoctGbSpec; +impl crate::RegisterSpec for Rx1024maxoctGbSpec { type Ux = u32; } -#[doc = "`read()` method returns [rx1024maxoct_gb::R](R) reader structure"] -impl crate::Readable for RX1024MAXOCT_GB_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`rx1024maxoct_gb::R`](R) reader structure"] +impl crate::Readable for Rx1024maxoctGbSpec {} #[doc = "`reset()` method sets RX1024MAXOCT_GB to value 0"] -impl crate::Resettable for RX1024MAXOCT_GB_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Rx1024maxoctGbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/rx128to255oct_gb.rs b/va416xx/src/eth/rx128to255oct_gb.rs index e04d6e5..570447e 100644 --- a/va416xx/src/eth/rx128to255oct_gb.rs +++ b/va416xx/src/eth/rx128to255oct_gb.rs @@ -1,53 +1,22 @@ #[doc = "Register `RX128TO255OCT_GB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `COUNT` reader - Number of frames"] -pub struct COUNT_R(crate::FieldReader); -impl COUNT_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - COUNT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for COUNT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type CountR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Number of frames"] #[inline(always)] - pub fn count(&self) -> COUNT_R { - COUNT_R::new(self.bits as u32) + pub fn count(&self) -> CountR { + CountR::new(self.bits) } } -#[doc = "MMC Number of good and bad frames received with length between 128 and 255 bytes\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rx128to255oct_gb](index.html) module"] -pub struct RX128TO255OCT_GB_SPEC; -impl crate::RegisterSpec for RX128TO255OCT_GB_SPEC { +#[doc = "MMC Number of good and bad frames received with length between 128 and 255 bytes\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx128to255oct_gb::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Rx128to255octGbSpec; +impl crate::RegisterSpec for Rx128to255octGbSpec { type Ux = u32; } -#[doc = "`read()` method returns [rx128to255oct_gb::R](R) reader structure"] -impl crate::Readable for RX128TO255OCT_GB_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`rx128to255oct_gb::R`](R) reader structure"] +impl crate::Readable for Rx128to255octGbSpec {} #[doc = "`reset()` method sets RX128TO255OCT_GB to value 0"] -impl crate::Resettable for RX128TO255OCT_GB_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Rx128to255octGbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/rx256to511oct_gb.rs b/va416xx/src/eth/rx256to511oct_gb.rs index 48533fe..298d61c 100644 --- a/va416xx/src/eth/rx256to511oct_gb.rs +++ b/va416xx/src/eth/rx256to511oct_gb.rs @@ -1,53 +1,22 @@ #[doc = "Register `RX256TO511OCT_GB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `COUNT` reader - Number of frames"] -pub struct COUNT_R(crate::FieldReader); -impl COUNT_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - COUNT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for COUNT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type CountR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Number of frames"] #[inline(always)] - pub fn count(&self) -> COUNT_R { - COUNT_R::new(self.bits as u32) + pub fn count(&self) -> CountR { + CountR::new(self.bits) } } -#[doc = "MMC Number of good and bad frames received with length between 256 and 511 bytes\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rx256to511oct_gb](index.html) module"] -pub struct RX256TO511OCT_GB_SPEC; -impl crate::RegisterSpec for RX256TO511OCT_GB_SPEC { +#[doc = "MMC Number of good and bad frames received with length between 256 and 511 bytes\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx256to511oct_gb::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Rx256to511octGbSpec; +impl crate::RegisterSpec for Rx256to511octGbSpec { type Ux = u32; } -#[doc = "`read()` method returns [rx256to511oct_gb::R](R) reader structure"] -impl crate::Readable for RX256TO511OCT_GB_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`rx256to511oct_gb::R`](R) reader structure"] +impl crate::Readable for Rx256to511octGbSpec {} #[doc = "`reset()` method sets RX256TO511OCT_GB to value 0"] -impl crate::Resettable for RX256TO511OCT_GB_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Rx256to511octGbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/rx512to1023oct_gb.rs b/va416xx/src/eth/rx512to1023oct_gb.rs index 381682e..a02df66 100644 --- a/va416xx/src/eth/rx512to1023oct_gb.rs +++ b/va416xx/src/eth/rx512to1023oct_gb.rs @@ -1,53 +1,22 @@ #[doc = "Register `RX512TO1023OCT_GB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `COUNT` reader - Number of frames"] -pub struct COUNT_R(crate::FieldReader); -impl COUNT_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - COUNT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for COUNT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type CountR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Number of frames"] #[inline(always)] - pub fn count(&self) -> COUNT_R { - COUNT_R::new(self.bits as u32) + pub fn count(&self) -> CountR { + CountR::new(self.bits) } } -#[doc = "MMC Number of good and bad frames received with length between 512 and 1023 bytes\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rx512to1023oct_gb](index.html) module"] -pub struct RX512TO1023OCT_GB_SPEC; -impl crate::RegisterSpec for RX512TO1023OCT_GB_SPEC { +#[doc = "MMC Number of good and bad frames received with length between 512 and 1023 bytes\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx512to1023oct_gb::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Rx512to1023octGbSpec; +impl crate::RegisterSpec for Rx512to1023octGbSpec { type Ux = u32; } -#[doc = "`read()` method returns [rx512to1023oct_gb::R](R) reader structure"] -impl crate::Readable for RX512TO1023OCT_GB_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`rx512to1023oct_gb::R`](R) reader structure"] +impl crate::Readable for Rx512to1023octGbSpec {} #[doc = "`reset()` method sets RX512TO1023OCT_GB to value 0"] -impl crate::Resettable for RX512TO1023OCT_GB_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Rx512to1023octGbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/rx64octets_gb.rs b/va416xx/src/eth/rx64octets_gb.rs index ad8d616..a5f714d 100644 --- a/va416xx/src/eth/rx64octets_gb.rs +++ b/va416xx/src/eth/rx64octets_gb.rs @@ -1,53 +1,22 @@ #[doc = "Register `RX64OCTETS_GB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `COUNT` reader - Number of frames"] -pub struct COUNT_R(crate::FieldReader); -impl COUNT_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - COUNT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for COUNT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type CountR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Number of frames"] #[inline(always)] - pub fn count(&self) -> COUNT_R { - COUNT_R::new(self.bits as u32) + pub fn count(&self) -> CountR { + CountR::new(self.bits) } } -#[doc = "MMC Number of good and bad frames received with length 64 bytes\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rx64octets_gb](index.html) module"] -pub struct RX64OCTETS_GB_SPEC; -impl crate::RegisterSpec for RX64OCTETS_GB_SPEC { +#[doc = "MMC Number of good and bad frames received with length 64 bytes\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx64octets_gb::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Rx64octetsGbSpec; +impl crate::RegisterSpec for Rx64octetsGbSpec { type Ux = u32; } -#[doc = "`read()` method returns [rx64octets_gb::R](R) reader structure"] -impl crate::Readable for RX64OCTETS_GB_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`rx64octets_gb::R`](R) reader structure"] +impl crate::Readable for Rx64octetsGbSpec {} #[doc = "`reset()` method sets RX64OCTETS_GB to value 0"] -impl crate::Resettable for RX64OCTETS_GB_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Rx64octetsGbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/rx65to127oct_gb.rs b/va416xx/src/eth/rx65to127oct_gb.rs index ff88bdb..dd691e8 100644 --- a/va416xx/src/eth/rx65to127oct_gb.rs +++ b/va416xx/src/eth/rx65to127oct_gb.rs @@ -1,53 +1,22 @@ #[doc = "Register `RX65TO127OCT_GB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `COUNT` reader - Number of frames"] -pub struct COUNT_R(crate::FieldReader); -impl COUNT_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - COUNT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for COUNT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type CountR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Number of frames"] #[inline(always)] - pub fn count(&self) -> COUNT_R { - COUNT_R::new(self.bits as u32) + pub fn count(&self) -> CountR { + CountR::new(self.bits) } } -#[doc = "MMC Number of good and bad frames received with length between 65 and 127 bytes\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rx65to127oct_gb](index.html) module"] -pub struct RX65TO127OCT_GB_SPEC; -impl crate::RegisterSpec for RX65TO127OCT_GB_SPEC { +#[doc = "MMC Number of good and bad frames received with length between 65 and 127 bytes\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx65to127oct_gb::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Rx65to127octGbSpec; +impl crate::RegisterSpec for Rx65to127octGbSpec { type Ux = u32; } -#[doc = "`read()` method returns [rx65to127oct_gb::R](R) reader structure"] -impl crate::Readable for RX65TO127OCT_GB_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`rx65to127oct_gb::R`](R) reader structure"] +impl crate::Readable for Rx65to127octGbSpec {} #[doc = "`reset()` method sets RX65TO127OCT_GB to value 0"] -impl crate::Resettable for RX65TO127OCT_GB_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Rx65to127octGbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/rxalignerror.rs b/va416xx/src/eth/rxalignerror.rs index 3a2083c..433b904 100644 --- a/va416xx/src/eth/rxalignerror.rs +++ b/va416xx/src/eth/rxalignerror.rs @@ -1,53 +1,22 @@ #[doc = "Register `RXALIGNERROR` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `COUNT` reader - Number of frames"] -pub struct COUNT_R(crate::FieldReader); -impl COUNT_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - COUNT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for COUNT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type CountR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Number of frames"] #[inline(always)] - pub fn count(&self) -> COUNT_R { - COUNT_R::new(self.bits as u32) + pub fn count(&self) -> CountR { + CountR::new(self.bits) } } -#[doc = "MMC Number of frames received with alignment error\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxalignerror](index.html) module"] -pub struct RXALIGNERROR_SPEC; -impl crate::RegisterSpec for RXALIGNERROR_SPEC { +#[doc = "MMC Number of frames received with alignment error\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxalignerror::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RxalignerrorSpec; +impl crate::RegisterSpec for RxalignerrorSpec { type Ux = u32; } -#[doc = "`read()` method returns [rxalignerror::R](R) reader structure"] -impl crate::Readable for RXALIGNERROR_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`rxalignerror::R`](R) reader structure"] +impl crate::Readable for RxalignerrorSpec {} #[doc = "`reset()` method sets RXALIGNERROR to value 0"] -impl crate::Resettable for RXALIGNERROR_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for RxalignerrorSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/rxbcastframes_g.rs b/va416xx/src/eth/rxbcastframes_g.rs index b831350..2074e5e 100644 --- a/va416xx/src/eth/rxbcastframes_g.rs +++ b/va416xx/src/eth/rxbcastframes_g.rs @@ -1,53 +1,22 @@ #[doc = "Register `RXBCASTFRAMES_G` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `COUNT` reader - Number of frames"] -pub struct COUNT_R(crate::FieldReader); -impl COUNT_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - COUNT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for COUNT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type CountR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Number of frames"] #[inline(always)] - pub fn count(&self) -> COUNT_R { - COUNT_R::new(self.bits as u32) + pub fn count(&self) -> CountR { + CountR::new(self.bits) } } -#[doc = "MMC Number of good broadcast frames received\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxbcastframes_g](index.html) module"] -pub struct RXBCASTFRAMES_G_SPEC; -impl crate::RegisterSpec for RXBCASTFRAMES_G_SPEC { +#[doc = "MMC Number of good broadcast frames received\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxbcastframes_g::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RxbcastframesGSpec; +impl crate::RegisterSpec for RxbcastframesGSpec { type Ux = u32; } -#[doc = "`read()` method returns [rxbcastframes_g::R](R) reader structure"] -impl crate::Readable for RXBCASTFRAMES_G_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`rxbcastframes_g::R`](R) reader structure"] +impl crate::Readable for RxbcastframesGSpec {} #[doc = "`reset()` method sets RXBCASTFRAMES_G to value 0"] -impl crate::Resettable for RXBCASTFRAMES_G_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for RxbcastframesGSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/rxcrcerror.rs b/va416xx/src/eth/rxcrcerror.rs index a0c32a1..33d47f1 100644 --- a/va416xx/src/eth/rxcrcerror.rs +++ b/va416xx/src/eth/rxcrcerror.rs @@ -1,53 +1,22 @@ #[doc = "Register `RXCRCERROR` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `COUNT` reader - Number of frames"] -pub struct COUNT_R(crate::FieldReader); -impl COUNT_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - COUNT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for COUNT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type CountR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Number of frames"] #[inline(always)] - pub fn count(&self) -> COUNT_R { - COUNT_R::new(self.bits as u32) + pub fn count(&self) -> CountR { + CountR::new(self.bits) } } -#[doc = "MMC Number of frames received with CRC error\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxcrcerror](index.html) module"] -pub struct RXCRCERROR_SPEC; -impl crate::RegisterSpec for RXCRCERROR_SPEC { +#[doc = "MMC Number of frames received with CRC error\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxcrcerror::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RxcrcerrorSpec; +impl crate::RegisterSpec for RxcrcerrorSpec { type Ux = u32; } -#[doc = "`read()` method returns [rxcrcerror::R](R) reader structure"] -impl crate::Readable for RXCRCERROR_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`rxcrcerror::R`](R) reader structure"] +impl crate::Readable for RxcrcerrorSpec {} #[doc = "`reset()` method sets RXCRCERROR to value 0"] -impl crate::Resettable for RXCRCERROR_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for RxcrcerrorSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/rxctrlframes_g.rs b/va416xx/src/eth/rxctrlframes_g.rs index faa75f7..949f2c9 100644 --- a/va416xx/src/eth/rxctrlframes_g.rs +++ b/va416xx/src/eth/rxctrlframes_g.rs @@ -1,53 +1,22 @@ #[doc = "Register `RXCTRLFRAMES_G` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `COUNT` reader - Number of frames"] -pub struct COUNT_R(crate::FieldReader); -impl COUNT_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - COUNT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for COUNT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type CountR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Number of frames"] #[inline(always)] - pub fn count(&self) -> COUNT_R { - COUNT_R::new(self.bits as u32) + pub fn count(&self) -> CountR { + CountR::new(self.bits) } } -#[doc = "MMC Number of received good control frames\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxctrlframes_g](index.html) module"] -pub struct RXCTRLFRAMES_G_SPEC; -impl crate::RegisterSpec for RXCTRLFRAMES_G_SPEC { +#[doc = "MMC Number of received good control frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxctrlframes_g::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RxctrlframesGSpec; +impl crate::RegisterSpec for RxctrlframesGSpec { type Ux = u32; } -#[doc = "`read()` method returns [rxctrlframes_g::R](R) reader structure"] -impl crate::Readable for RXCTRLFRAMES_G_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`rxctrlframes_g::R`](R) reader structure"] +impl crate::Readable for RxctrlframesGSpec {} #[doc = "`reset()` method sets RXCTRLFRAMES_G to value 0"] -impl crate::Resettable for RXCTRLFRAMES_G_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for RxctrlframesGSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/rxfifooverflow.rs b/va416xx/src/eth/rxfifooverflow.rs index 173569d..e149320 100644 --- a/va416xx/src/eth/rxfifooverflow.rs +++ b/va416xx/src/eth/rxfifooverflow.rs @@ -1,53 +1,22 @@ #[doc = "Register `RXFIFOOVERFLOW` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `COUNT` reader - Number of frames"] -pub struct COUNT_R(crate::FieldReader); -impl COUNT_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - COUNT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for COUNT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type CountR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Number of frames"] #[inline(always)] - pub fn count(&self) -> COUNT_R { - COUNT_R::new(self.bits as u32) + pub fn count(&self) -> CountR { + CountR::new(self.bits) } } -#[doc = "MMC Number of missed received frames because of FIFO overflow\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxfifooverflow](index.html) module"] -pub struct RXFIFOOVERFLOW_SPEC; -impl crate::RegisterSpec for RXFIFOOVERFLOW_SPEC { +#[doc = "MMC Number of missed received frames because of FIFO overflow\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxfifooverflow::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RxfifooverflowSpec; +impl crate::RegisterSpec for RxfifooverflowSpec { type Ux = u32; } -#[doc = "`read()` method returns [rxfifooverflow::R](R) reader structure"] -impl crate::Readable for RXFIFOOVERFLOW_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`rxfifooverflow::R`](R) reader structure"] +impl crate::Readable for RxfifooverflowSpec {} #[doc = "`reset()` method sets RXFIFOOVERFLOW to value 0"] -impl crate::Resettable for RXFIFOOVERFLOW_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for RxfifooverflowSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/rxframecount_gb.rs b/va416xx/src/eth/rxframecount_gb.rs index 8084839..0b6cad3 100644 --- a/va416xx/src/eth/rxframecount_gb.rs +++ b/va416xx/src/eth/rxframecount_gb.rs @@ -1,53 +1,22 @@ #[doc = "Register `RXFRAMECOUNT_GB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `COUNT` reader - Number of frames"] -pub struct COUNT_R(crate::FieldReader); -impl COUNT_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - COUNT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for COUNT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type CountR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Number of frames"] #[inline(always)] - pub fn count(&self) -> COUNT_R { - COUNT_R::new(self.bits as u32) + pub fn count(&self) -> CountR { + CountR::new(self.bits) } } -#[doc = "MMC Number of good and bad frames received\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxframecount_gb](index.html) module"] -pub struct RXFRAMECOUNT_GB_SPEC; -impl crate::RegisterSpec for RXFRAMECOUNT_GB_SPEC { +#[doc = "MMC Number of good and bad frames received\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxframecount_gb::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RxframecountGbSpec; +impl crate::RegisterSpec for RxframecountGbSpec { type Ux = u32; } -#[doc = "`read()` method returns [rxframecount_gb::R](R) reader structure"] -impl crate::Readable for RXFRAMECOUNT_GB_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`rxframecount_gb::R`](R) reader structure"] +impl crate::Readable for RxframecountGbSpec {} #[doc = "`reset()` method sets RXFRAMECOUNT_GB to value 0"] -impl crate::Resettable for RXFRAMECOUNT_GB_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for RxframecountGbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/rxjabbererror.rs b/va416xx/src/eth/rxjabbererror.rs index f8308ab..88ba0fe 100644 --- a/va416xx/src/eth/rxjabbererror.rs +++ b/va416xx/src/eth/rxjabbererror.rs @@ -1,53 +1,22 @@ #[doc = "Register `RXJABBERERROR` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `COUNT` reader - Number of frames"] -pub struct COUNT_R(crate::FieldReader); -impl COUNT_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - COUNT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for COUNT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type CountR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Number of frames"] #[inline(always)] - pub fn count(&self) -> COUNT_R { - COUNT_R::new(self.bits as u32) + pub fn count(&self) -> CountR { + CountR::new(self.bits) } } -#[doc = "MMC Number of giant frames received with length greater than 1518 bytes and with CRC error\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxjabbererror](index.html) module"] -pub struct RXJABBERERROR_SPEC; -impl crate::RegisterSpec for RXJABBERERROR_SPEC { +#[doc = "MMC Number of giant frames received with length greater than 1518 bytes and with CRC error\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxjabbererror::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RxjabbererrorSpec; +impl crate::RegisterSpec for RxjabbererrorSpec { type Ux = u32; } -#[doc = "`read()` method returns [rxjabbererror::R](R) reader structure"] -impl crate::Readable for RXJABBERERROR_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`rxjabbererror::R`](R) reader structure"] +impl crate::Readable for RxjabbererrorSpec {} #[doc = "`reset()` method sets RXJABBERERROR to value 0"] -impl crate::Resettable for RXJABBERERROR_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for RxjabbererrorSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/rxlengtherror.rs b/va416xx/src/eth/rxlengtherror.rs index f9bbcf1..f838621 100644 --- a/va416xx/src/eth/rxlengtherror.rs +++ b/va416xx/src/eth/rxlengtherror.rs @@ -1,53 +1,22 @@ #[doc = "Register `RXLENGTHERROR` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `COUNT` reader - Number of frames"] -pub struct COUNT_R(crate::FieldReader); -impl COUNT_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - COUNT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for COUNT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type CountR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Number of frames"] #[inline(always)] - pub fn count(&self) -> COUNT_R { - COUNT_R::new(self.bits as u32) + pub fn count(&self) -> CountR { + CountR::new(self.bits) } } -#[doc = "MMC Number of frames received with length error\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxlengtherror](index.html) module"] -pub struct RXLENGTHERROR_SPEC; -impl crate::RegisterSpec for RXLENGTHERROR_SPEC { +#[doc = "MMC Number of frames received with length error\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxlengtherror::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RxlengtherrorSpec; +impl crate::RegisterSpec for RxlengtherrorSpec { type Ux = u32; } -#[doc = "`read()` method returns [rxlengtherror::R](R) reader structure"] -impl crate::Readable for RXLENGTHERROR_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`rxlengtherror::R`](R) reader structure"] +impl crate::Readable for RxlengtherrorSpec {} #[doc = "`reset()` method sets RXLENGTHERROR to value 0"] -impl crate::Resettable for RXLENGTHERROR_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for RxlengtherrorSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/rxmcastframes_g.rs b/va416xx/src/eth/rxmcastframes_g.rs index 3dcb6f5..3c2c4e7 100644 --- a/va416xx/src/eth/rxmcastframes_g.rs +++ b/va416xx/src/eth/rxmcastframes_g.rs @@ -1,53 +1,22 @@ #[doc = "Register `RXMCASTFRAMES_G` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `COUNT` reader - Number of frames"] -pub struct COUNT_R(crate::FieldReader); -impl COUNT_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - COUNT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for COUNT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type CountR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Number of frames"] #[inline(always)] - pub fn count(&self) -> COUNT_R { - COUNT_R::new(self.bits as u32) + pub fn count(&self) -> CountR { + CountR::new(self.bits) } } -#[doc = "MMC Number of good multicast frames received\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxmcastframes_g](index.html) module"] -pub struct RXMCASTFRAMES_G_SPEC; -impl crate::RegisterSpec for RXMCASTFRAMES_G_SPEC { +#[doc = "MMC Number of good multicast frames received\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxmcastframes_g::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RxmcastframesGSpec; +impl crate::RegisterSpec for RxmcastframesGSpec { type Ux = u32; } -#[doc = "`read()` method returns [rxmcastframes_g::R](R) reader structure"] -impl crate::Readable for RXMCASTFRAMES_G_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`rxmcastframes_g::R`](R) reader structure"] +impl crate::Readable for RxmcastframesGSpec {} #[doc = "`reset()` method sets RXMCASTFRAMES_G to value 0"] -impl crate::Resettable for RXMCASTFRAMES_G_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for RxmcastframesGSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/rxoctetcount_g.rs b/va416xx/src/eth/rxoctetcount_g.rs index f2a72e7..69e5aab 100644 --- a/va416xx/src/eth/rxoctetcount_g.rs +++ b/va416xx/src/eth/rxoctetcount_g.rs @@ -1,53 +1,22 @@ #[doc = "Register `RXOCTETCOUNT_G` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `COUNT` reader - Number of bytes"] -pub struct COUNT_R(crate::FieldReader); -impl COUNT_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - COUNT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for COUNT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type CountR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Number of bytes"] #[inline(always)] - pub fn count(&self) -> COUNT_R { - COUNT_R::new(self.bits as u32) + pub fn count(&self) -> CountR { + CountR::new(self.bits) } } -#[doc = "MMC Number of bytes received in good frames only\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxoctetcount_g](index.html) module"] -pub struct RXOCTETCOUNT_G_SPEC; -impl crate::RegisterSpec for RXOCTETCOUNT_G_SPEC { +#[doc = "MMC Number of bytes received in good frames only\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxoctetcount_g::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RxoctetcountGSpec; +impl crate::RegisterSpec for RxoctetcountGSpec { type Ux = u32; } -#[doc = "`read()` method returns [rxoctetcount_g::R](R) reader structure"] -impl crate::Readable for RXOCTETCOUNT_G_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`rxoctetcount_g::R`](R) reader structure"] +impl crate::Readable for RxoctetcountGSpec {} #[doc = "`reset()` method sets RXOCTETCOUNT_G to value 0"] -impl crate::Resettable for RXOCTETCOUNT_G_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for RxoctetcountGSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/rxoctetcount_gb.rs b/va416xx/src/eth/rxoctetcount_gb.rs index 2b281d8..2673785 100644 --- a/va416xx/src/eth/rxoctetcount_gb.rs +++ b/va416xx/src/eth/rxoctetcount_gb.rs @@ -1,53 +1,22 @@ #[doc = "Register `RXOCTETCOUNT_GB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `COUNT` reader - Number of bytes"] -pub struct COUNT_R(crate::FieldReader); -impl COUNT_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - COUNT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for COUNT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type CountR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Number of bytes"] #[inline(always)] - pub fn count(&self) -> COUNT_R { - COUNT_R::new(self.bits as u32) + pub fn count(&self) -> CountR { + CountR::new(self.bits) } } -#[doc = "MMC Number of bytes received in good and bad frames\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxoctetcount_gb](index.html) module"] -pub struct RXOCTETCOUNT_GB_SPEC; -impl crate::RegisterSpec for RXOCTETCOUNT_GB_SPEC { +#[doc = "MMC Number of bytes received in good and bad frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxoctetcount_gb::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RxoctetcountGbSpec; +impl crate::RegisterSpec for RxoctetcountGbSpec { type Ux = u32; } -#[doc = "`read()` method returns [rxoctetcount_gb::R](R) reader structure"] -impl crate::Readable for RXOCTETCOUNT_GB_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`rxoctetcount_gb::R`](R) reader structure"] +impl crate::Readable for RxoctetcountGbSpec {} #[doc = "`reset()` method sets RXOCTETCOUNT_GB to value 0"] -impl crate::Resettable for RXOCTETCOUNT_GB_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for RxoctetcountGbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/rxoutrangetype.rs b/va416xx/src/eth/rxoutrangetype.rs index 17228db..bbf7a57 100644 --- a/va416xx/src/eth/rxoutrangetype.rs +++ b/va416xx/src/eth/rxoutrangetype.rs @@ -1,53 +1,22 @@ #[doc = "Register `RXOUTRANGETYPE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `COUNT` reader - Number of frames"] -pub struct COUNT_R(crate::FieldReader); -impl COUNT_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - COUNT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for COUNT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type CountR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Number of frames"] #[inline(always)] - pub fn count(&self) -> COUNT_R { - COUNT_R::new(self.bits as u32) + pub fn count(&self) -> CountR { + CountR::new(self.bits) } } -#[doc = "MMC Number of frames received with length field not equal to the valid frame size\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxoutrangetype](index.html) module"] -pub struct RXOUTRANGETYPE_SPEC; -impl crate::RegisterSpec for RXOUTRANGETYPE_SPEC { +#[doc = "MMC Number of frames received with length field not equal to the valid frame size\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxoutrangetype::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RxoutrangetypeSpec; +impl crate::RegisterSpec for RxoutrangetypeSpec { type Ux = u32; } -#[doc = "`read()` method returns [rxoutrangetype::R](R) reader structure"] -impl crate::Readable for RXOUTRANGETYPE_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`rxoutrangetype::R`](R) reader structure"] +impl crate::Readable for RxoutrangetypeSpec {} #[doc = "`reset()` method sets RXOUTRANGETYPE to value 0"] -impl crate::Resettable for RXOUTRANGETYPE_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for RxoutrangetypeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/rxoversize_g.rs b/va416xx/src/eth/rxoversize_g.rs index 8aec4a2..5767117 100644 --- a/va416xx/src/eth/rxoversize_g.rs +++ b/va416xx/src/eth/rxoversize_g.rs @@ -1,53 +1,22 @@ #[doc = "Register `RXOVERSIZE_G` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `COUNT` reader - Number of frames"] -pub struct COUNT_R(crate::FieldReader); -impl COUNT_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - COUNT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for COUNT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type CountR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Number of frames"] #[inline(always)] - pub fn count(&self) -> COUNT_R { - COUNT_R::new(self.bits as u32) + pub fn count(&self) -> CountR { + CountR::new(self.bits) } } -#[doc = "MMC Number of frames received without errors with length greater than the max size\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxoversize_g](index.html) module"] -pub struct RXOVERSIZE_G_SPEC; -impl crate::RegisterSpec for RXOVERSIZE_G_SPEC { +#[doc = "MMC Number of frames received without errors with length greater than the max size\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxoversize_g::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RxoversizeGSpec; +impl crate::RegisterSpec for RxoversizeGSpec { type Ux = u32; } -#[doc = "`read()` method returns [rxoversize_g::R](R) reader structure"] -impl crate::Readable for RXOVERSIZE_G_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`rxoversize_g::R`](R) reader structure"] +impl crate::Readable for RxoversizeGSpec {} #[doc = "`reset()` method sets RXOVERSIZE_G to value 0"] -impl crate::Resettable for RXOVERSIZE_G_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for RxoversizeGSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/rxpauseframes.rs b/va416xx/src/eth/rxpauseframes.rs index 9492097..71376de 100644 --- a/va416xx/src/eth/rxpauseframes.rs +++ b/va416xx/src/eth/rxpauseframes.rs @@ -1,53 +1,22 @@ #[doc = "Register `RXPAUSEFRAMES` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `COUNT` reader - Number of frames"] -pub struct COUNT_R(crate::FieldReader); -impl COUNT_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - COUNT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for COUNT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type CountR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Number of frames"] #[inline(always)] - pub fn count(&self) -> COUNT_R { - COUNT_R::new(self.bits as u32) + pub fn count(&self) -> CountR { + CountR::new(self.bits) } } -#[doc = "MMC Number of good and valid Pause frames received\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxpauseframes](index.html) module"] -pub struct RXPAUSEFRAMES_SPEC; -impl crate::RegisterSpec for RXPAUSEFRAMES_SPEC { +#[doc = "MMC Number of good and valid Pause frames received\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxpauseframes::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RxpauseframesSpec; +impl crate::RegisterSpec for RxpauseframesSpec { type Ux = u32; } -#[doc = "`read()` method returns [rxpauseframes::R](R) reader structure"] -impl crate::Readable for RXPAUSEFRAMES_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`rxpauseframes::R`](R) reader structure"] +impl crate::Readable for RxpauseframesSpec {} #[doc = "`reset()` method sets RXPAUSEFRAMES to value 0"] -impl crate::Resettable for RXPAUSEFRAMES_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for RxpauseframesSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/rxrcverror.rs b/va416xx/src/eth/rxrcverror.rs index 65a2652..bc1b9d3 100644 --- a/va416xx/src/eth/rxrcverror.rs +++ b/va416xx/src/eth/rxrcverror.rs @@ -1,53 +1,22 @@ #[doc = "Register `RXRCVERROR` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `COUNT` reader - Number of frames"] -pub struct COUNT_R(crate::FieldReader); -impl COUNT_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - COUNT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for COUNT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type CountR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Number of frames"] #[inline(always)] - pub fn count(&self) -> COUNT_R { - COUNT_R::new(self.bits as u32) + pub fn count(&self) -> CountR { + CountR::new(self.bits) } } -#[doc = "MMC Number of frames received with Receive error or Frame Extension error\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxrcverror](index.html) module"] -pub struct RXRCVERROR_SPEC; -impl crate::RegisterSpec for RXRCVERROR_SPEC { +#[doc = "MMC Number of frames received with Receive error or Frame Extension error\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxrcverror::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RxrcverrorSpec; +impl crate::RegisterSpec for RxrcverrorSpec { type Ux = u32; } -#[doc = "`read()` method returns [rxrcverror::R](R) reader structure"] -impl crate::Readable for RXRCVERROR_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`rxrcverror::R`](R) reader structure"] +impl crate::Readable for RxrcverrorSpec {} #[doc = "`reset()` method sets RXRCVERROR to value 0"] -impl crate::Resettable for RXRCVERROR_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for RxrcverrorSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/rxrunterror.rs b/va416xx/src/eth/rxrunterror.rs index bebb487..383a955 100644 --- a/va416xx/src/eth/rxrunterror.rs +++ b/va416xx/src/eth/rxrunterror.rs @@ -1,53 +1,22 @@ #[doc = "Register `RXRUNTERROR` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `COUNT` reader - Number of frames"] -pub struct COUNT_R(crate::FieldReader); -impl COUNT_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - COUNT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for COUNT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type CountR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Number of frames"] #[inline(always)] - pub fn count(&self) -> COUNT_R { - COUNT_R::new(self.bits as u32) + pub fn count(&self) -> CountR { + CountR::new(self.bits) } } -#[doc = "MMC Number of frames received with runt error\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxrunterror](index.html) module"] -pub struct RXRUNTERROR_SPEC; -impl crate::RegisterSpec for RXRUNTERROR_SPEC { +#[doc = "MMC Number of frames received with runt error\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxrunterror::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RxrunterrorSpec; +impl crate::RegisterSpec for RxrunterrorSpec { type Ux = u32; } -#[doc = "`read()` method returns [rxrunterror::R](R) reader structure"] -impl crate::Readable for RXRUNTERROR_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`rxrunterror::R`](R) reader structure"] +impl crate::Readable for RxrunterrorSpec {} #[doc = "`reset()` method sets RXRUNTERROR to value 0"] -impl crate::Resettable for RXRUNTERROR_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for RxrunterrorSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/rxucastframes_g.rs b/va416xx/src/eth/rxucastframes_g.rs index 3a4c0b7..3e53f7f 100644 --- a/va416xx/src/eth/rxucastframes_g.rs +++ b/va416xx/src/eth/rxucastframes_g.rs @@ -1,53 +1,22 @@ #[doc = "Register `RXUCASTFRAMES_G` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `COUNT` reader - Number of frames"] -pub struct COUNT_R(crate::FieldReader); -impl COUNT_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - COUNT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for COUNT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type CountR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Number of frames"] #[inline(always)] - pub fn count(&self) -> COUNT_R { - COUNT_R::new(self.bits as u32) + pub fn count(&self) -> CountR { + CountR::new(self.bits) } } -#[doc = "MMC Number of received good unicast frames\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxucastframes_g](index.html) module"] -pub struct RXUCASTFRAMES_G_SPEC; -impl crate::RegisterSpec for RXUCASTFRAMES_G_SPEC { +#[doc = "MMC Number of received good unicast frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxucastframes_g::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RxucastframesGSpec; +impl crate::RegisterSpec for RxucastframesGSpec { type Ux = u32; } -#[doc = "`read()` method returns [rxucastframes_g::R](R) reader structure"] -impl crate::Readable for RXUCASTFRAMES_G_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`rxucastframes_g::R`](R) reader structure"] +impl crate::Readable for RxucastframesGSpec {} #[doc = "`reset()` method sets RXUCASTFRAMES_G to value 0"] -impl crate::Resettable for RXUCASTFRAMES_G_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for RxucastframesGSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/rxundersize_g.rs b/va416xx/src/eth/rxundersize_g.rs index 1a89b0a..4464266 100644 --- a/va416xx/src/eth/rxundersize_g.rs +++ b/va416xx/src/eth/rxundersize_g.rs @@ -1,53 +1,22 @@ #[doc = "Register `RXUNDERSIZE_G` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `COUNT` reader - Number of frames"] -pub struct COUNT_R(crate::FieldReader); -impl COUNT_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - COUNT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for COUNT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type CountR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Number of frames"] #[inline(always)] - pub fn count(&self) -> COUNT_R { - COUNT_R::new(self.bits as u32) + pub fn count(&self) -> CountR { + CountR::new(self.bits) } } -#[doc = "MMC Number of frames received with length less than 64 bytes\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxundersize_g](index.html) module"] -pub struct RXUNDERSIZE_G_SPEC; -impl crate::RegisterSpec for RXUNDERSIZE_G_SPEC { +#[doc = "MMC Number of frames received with length less than 64 bytes\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxundersize_g::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RxundersizeGSpec; +impl crate::RegisterSpec for RxundersizeGSpec { type Ux = u32; } -#[doc = "`read()` method returns [rxundersize_g::R](R) reader structure"] -impl crate::Readable for RXUNDERSIZE_G_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`rxundersize_g::R`](R) reader structure"] +impl crate::Readable for RxundersizeGSpec {} #[doc = "`reset()` method sets RXUNDERSIZE_G to value 0"] -impl crate::Resettable for RXUNDERSIZE_G_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for RxundersizeGSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/rxvlanframes_gb.rs b/va416xx/src/eth/rxvlanframes_gb.rs index 20927e3..81088d7 100644 --- a/va416xx/src/eth/rxvlanframes_gb.rs +++ b/va416xx/src/eth/rxvlanframes_gb.rs @@ -1,53 +1,22 @@ #[doc = "Register `RXVLANFRAMES_GB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `COUNT` reader - Number of frames"] -pub struct COUNT_R(crate::FieldReader); -impl COUNT_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - COUNT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for COUNT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type CountR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Number of frames"] #[inline(always)] - pub fn count(&self) -> COUNT_R { - COUNT_R::new(self.bits as u32) + pub fn count(&self) -> CountR { + CountR::new(self.bits) } } -#[doc = "MMC Number of good and bad VLAN frames received\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxvlanframes_gb](index.html) module"] -pub struct RXVLANFRAMES_GB_SPEC; -impl crate::RegisterSpec for RXVLANFRAMES_GB_SPEC { +#[doc = "MMC Number of good and bad VLAN frames received\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxvlanframes_gb::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RxvlanframesGbSpec; +impl crate::RegisterSpec for RxvlanframesGbSpec { type Ux = u32; } -#[doc = "`read()` method returns [rxvlanframes_gb::R](R) reader structure"] -impl crate::Readable for RXVLANFRAMES_GB_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`rxvlanframes_gb::R`](R) reader structure"] +impl crate::Readable for RxvlanframesGbSpec {} #[doc = "`reset()` method sets RXVLANFRAMES_GB to value 0"] -impl crate::Resettable for RXVLANFRAMES_GB_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for RxvlanframesGbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/rxwdogerror.rs b/va416xx/src/eth/rxwdogerror.rs index c95800f..6d6d922 100644 --- a/va416xx/src/eth/rxwdogerror.rs +++ b/va416xx/src/eth/rxwdogerror.rs @@ -1,53 +1,22 @@ #[doc = "Register `RXWDOGERROR` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `COUNT` reader - Number of frames"] -pub struct COUNT_R(crate::FieldReader); -impl COUNT_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - COUNT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for COUNT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type CountR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Number of frames"] #[inline(always)] - pub fn count(&self) -> COUNT_R { - COUNT_R::new(self.bits as u32) + pub fn count(&self) -> CountR { + CountR::new(self.bits) } } -#[doc = "MMC Number of frames received with error because of watchdog timeout error\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxwdogerror](index.html) module"] -pub struct RXWDOGERROR_SPEC; -impl crate::RegisterSpec for RXWDOGERROR_SPEC { +#[doc = "MMC Number of frames received with error because of watchdog timeout error\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxwdogerror::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RxwdogerrorSpec; +impl crate::RegisterSpec for RxwdogerrorSpec { type Ux = u32; } -#[doc = "`read()` method returns [rxwdogerror::R](R) reader structure"] -impl crate::Readable for RXWDOGERROR_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`rxwdogerror::R`](R) reader structure"] +impl crate::Readable for RxwdogerrorSpec {} #[doc = "`reset()` method sets RXWDOGERROR to value 0"] -impl crate::Resettable for RXWDOGERROR_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for RxwdogerrorSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/subsec_inc.rs b/va416xx/src/eth/subsec_inc.rs index a96e3f8..02dd4a6 100644 --- a/va416xx/src/eth/subsec_inc.rs +++ b/va416xx/src/eth/subsec_inc.rs @@ -1,103 +1,40 @@ #[doc = "Register `SUBSEC_INC` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SUBSEC_INC` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SSINC` reader - Sub-Second Increment Valuee"] -pub struct SSINC_R(crate::FieldReader); -impl SSINC_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - SSINC_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for SSINC_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type SsincR = crate::FieldReader; #[doc = "Field `SSINC` writer - Sub-Second Increment Valuee"] -pub struct SSINC_W<'a> { - w: &'a mut W, -} -impl<'a> SSINC_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type SsincW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Sub-Second Increment Valuee"] #[inline(always)] - pub fn ssinc(&self) -> SSINC_R { - SSINC_R::new((self.bits & 0xff) as u8) + pub fn ssinc(&self) -> SsincR { + SsincR::new((self.bits & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Sub-Second Increment Valuee"] #[inline(always)] - pub fn ssinc(&mut self) -> SSINC_W { - SSINC_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn ssinc(&mut self) -> SsincW { + SsincW::new(self, 0) } } -#[doc = "Holds the 8-bit value by which the Sub-Second register is incremented\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [subsec_inc](index.html) module"] -pub struct SUBSEC_INC_SPEC; -impl crate::RegisterSpec for SUBSEC_INC_SPEC { +#[doc = "Holds the 8-bit value by which the Sub-Second register is incremented\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`subsec_inc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`subsec_inc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SubsecIncSpec; +impl crate::RegisterSpec for SubsecIncSpec { type Ux = u32; } -#[doc = "`read()` method returns [subsec_inc::R](R) reader structure"] -impl crate::Readable for SUBSEC_INC_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [subsec_inc::W](W) writer structure"] -impl crate::Writable for SUBSEC_INC_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`subsec_inc::R`](R) reader structure"] +impl crate::Readable for SubsecIncSpec {} +#[doc = "`write(|w| ..)` method takes [`subsec_inc::W`](W) writer structure"] +impl crate::Writable for SubsecIncSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SUBSEC_INC to value 0"] -impl crate::Resettable for SUBSEC_INC_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for SubsecIncSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/systime_nanosec.rs b/va416xx/src/eth/systime_nanosec.rs index d93d159..0d91afe 100644 --- a/va416xx/src/eth/systime_nanosec.rs +++ b/va416xx/src/eth/systime_nanosec.rs @@ -1,53 +1,22 @@ #[doc = "Register `SYSTIME_NANOSEC` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `TSSS` reader - Timestamp Sub Seconds"] -pub struct TSSS_R(crate::FieldReader); -impl TSSS_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - TSSS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TSSS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type TsssR = crate::FieldReader; impl R { #[doc = "Bits 0:30 - Timestamp Sub Seconds"] #[inline(always)] - pub fn tsss(&self) -> TSSS_R { - TSSS_R::new((self.bits & 0x7fff_ffff) as u32) + pub fn tsss(&self) -> TsssR { + TsssR::new(self.bits & 0x7fff_ffff) } } -#[doc = "Holds 32 bits of the nano-second field of the system time\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [systime_nanosec](index.html) module"] -pub struct SYSTIME_NANOSEC_SPEC; -impl crate::RegisterSpec for SYSTIME_NANOSEC_SPEC { +#[doc = "Holds 32 bits of the nano-second field of the system time\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`systime_nanosec::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SystimeNanosecSpec; +impl crate::RegisterSpec for SystimeNanosecSpec { type Ux = u32; } -#[doc = "`read()` method returns [systime_nanosec::R](R) reader structure"] -impl crate::Readable for SYSTIME_NANOSEC_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`systime_nanosec::R`](R) reader structure"] +impl crate::Readable for SystimeNanosecSpec {} #[doc = "`reset()` method sets SYSTIME_NANOSEC to value 0"] -impl crate::Resettable for SYSTIME_NANOSEC_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for SystimeNanosecSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/systime_nsecup.rs b/va416xx/src/eth/systime_nsecup.rs index 3f9c828..f2a86de 100644 --- a/va416xx/src/eth/systime_nsecup.rs +++ b/va416xx/src/eth/systime_nsecup.rs @@ -1,150 +1,55 @@ #[doc = "Register `SYSTIME_NSECUP` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SYSTIME_NSECUP` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `ADDSUB` reader - Add or Subtract Time"] -pub struct ADDSUB_R(crate::FieldReader); -impl ADDSUB_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - ADDSUB_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ADDSUB_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `ADDSUB` writer - Add or Subtract Time"] -pub struct ADDSUB_W<'a> { - w: &'a mut W, -} -impl<'a> ADDSUB_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 31)) | ((value as u32 & 0x01) << 31); - self.w - } -} +pub type W = crate::W; #[doc = "Field `TSSS` reader - Timestamp Sub Seconds"] -pub struct TSSS_R(crate::FieldReader); -impl TSSS_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - TSSS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TSSS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type TsssR = crate::FieldReader; #[doc = "Field `TSSS` writer - Timestamp Sub Seconds"] -pub struct TSSS_W<'a> { - w: &'a mut W, -} -impl<'a> TSSS_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - self.w.bits = (self.w.bits & !0x7fff_ffff) | (value as u32 & 0x7fff_ffff); - self.w - } -} +pub type TsssW<'a, REG> = crate::FieldWriter<'a, REG, 31, u32>; +#[doc = "Field `ADDSUB` reader - Add or Subtract Time"] +pub type AddsubR = crate::BitReader; +#[doc = "Field `ADDSUB` writer - Add or Subtract Time"] +pub type AddsubW<'a, REG> = crate::BitWriter<'a, REG>; impl R { - #[doc = "Bit 31 - Add or Subtract Time"] - #[inline(always)] - pub fn addsub(&self) -> ADDSUB_R { - ADDSUB_R::new(((self.bits >> 31) & 0x01) != 0) - } #[doc = "Bits 0:30 - Timestamp Sub Seconds"] #[inline(always)] - pub fn tsss(&self) -> TSSS_R { - TSSS_R::new((self.bits & 0x7fff_ffff) as u32) + pub fn tsss(&self) -> TsssR { + TsssR::new(self.bits & 0x7fff_ffff) + } + #[doc = "Bit 31 - Add or Subtract Time"] + #[inline(always)] + pub fn addsub(&self) -> AddsubR { + AddsubR::new(((self.bits >> 31) & 1) != 0) } } impl W { - #[doc = "Bit 31 - Add or Subtract Time"] - #[inline(always)] - pub fn addsub(&mut self) -> ADDSUB_W { - ADDSUB_W { w: self } - } #[doc = "Bits 0:30 - Timestamp Sub Seconds"] #[inline(always)] - pub fn tsss(&mut self) -> TSSS_W { - TSSS_W { w: self } + #[must_use] + pub fn tsss(&mut self) -> TsssW { + TsssW::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bit 31 - Add or Subtract Time"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn addsub(&mut self) -> AddsubW { + AddsubW::new(self, 31) } } -#[doc = "Holds 32 bits of the nano-second field to be written to, added to, or subtracted from the system time value\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [systime_nsecup](index.html) module"] -pub struct SYSTIME_NSECUP_SPEC; -impl crate::RegisterSpec for SYSTIME_NSECUP_SPEC { +#[doc = "Holds 32 bits of the nano-second field to be written to, added to, or subtracted from the system time value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`systime_nsecup::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`systime_nsecup::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SystimeNsecupSpec; +impl crate::RegisterSpec for SystimeNsecupSpec { type Ux = u32; } -#[doc = "`read()` method returns [systime_nsecup::R](R) reader structure"] -impl crate::Readable for SYSTIME_NSECUP_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [systime_nsecup::W](W) writer structure"] -impl crate::Writable for SYSTIME_NSECUP_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`systime_nsecup::R`](R) reader structure"] +impl crate::Readable for SystimeNsecupSpec {} +#[doc = "`write(|w| ..)` method takes [`systime_nsecup::W`](W) writer structure"] +impl crate::Writable for SystimeNsecupSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SYSTIME_NSECUP to value 0"] -impl crate::Resettable for SYSTIME_NSECUP_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for SystimeNsecupSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/systime_seconds.rs b/va416xx/src/eth/systime_seconds.rs index 2c6f690..202f06c 100644 --- a/va416xx/src/eth/systime_seconds.rs +++ b/va416xx/src/eth/systime_seconds.rs @@ -1,53 +1,22 @@ #[doc = "Register `SYSTIME_SECONDS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `TSS` reader - Timestamp Second"] -pub struct TSS_R(crate::FieldReader); -impl TSS_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - TSS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TSS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type TssR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Timestamp Second"] #[inline(always)] - pub fn tss(&self) -> TSS_R { - TSS_R::new(self.bits as u32) + pub fn tss(&self) -> TssR { + TssR::new(self.bits) } } -#[doc = "Holds the lower 32 bits of the second field of the system time\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [systime_seconds](index.html) module"] -pub struct SYSTIME_SECONDS_SPEC; -impl crate::RegisterSpec for SYSTIME_SECONDS_SPEC { +#[doc = "Holds the lower 32 bits of the second field of the system time\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`systime_seconds::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SystimeSecondsSpec; +impl crate::RegisterSpec for SystimeSecondsSpec { type Ux = u32; } -#[doc = "`read()` method returns [systime_seconds::R](R) reader structure"] -impl crate::Readable for SYSTIME_SECONDS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`systime_seconds::R`](R) reader structure"] +impl crate::Readable for SystimeSecondsSpec {} #[doc = "`reset()` method sets SYSTIME_SECONDS to value 0"] -impl crate::Resettable for SYSTIME_SECONDS_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for SystimeSecondsSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/systime_secsupdat.rs b/va416xx/src/eth/systime_secsupdat.rs index 73e58a5..30d3328 100644 --- a/va416xx/src/eth/systime_secsupdat.rs +++ b/va416xx/src/eth/systime_secsupdat.rs @@ -1,103 +1,40 @@ #[doc = "Register `SYSTIME_SECSUPDAT` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SYSTIME_SECSUPDAT` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TSS` reader - Timestamp Second"] -pub struct TSS_R(crate::FieldReader); -impl TSS_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - TSS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TSS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type TssR = crate::FieldReader; #[doc = "Field `TSS` writer - Timestamp Second"] -pub struct TSS_W<'a> { - w: &'a mut W, -} -impl<'a> TSS_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - self.w.bits = value as u32; - self.w - } -} +pub type TssW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Timestamp Second"] #[inline(always)] - pub fn tss(&self) -> TSS_R { - TSS_R::new(self.bits as u32) + pub fn tss(&self) -> TssR { + TssR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Timestamp Second"] #[inline(always)] - pub fn tss(&mut self) -> TSS_W { - TSS_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn tss(&mut self) -> TssW { + TssW::new(self, 0) } } -#[doc = "Holds the lower 32 bits of the second field to be written to, added to, or subtracted from the system time value\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [systime_secsupdat](index.html) module"] -pub struct SYSTIME_SECSUPDAT_SPEC; -impl crate::RegisterSpec for SYSTIME_SECSUPDAT_SPEC { +#[doc = "Holds the lower 32 bits of the second field to be written to, added to, or subtracted from the system time value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`systime_secsupdat::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`systime_secsupdat::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SystimeSecsupdatSpec; +impl crate::RegisterSpec for SystimeSecsupdatSpec { type Ux = u32; } -#[doc = "`read()` method returns [systime_secsupdat::R](R) reader structure"] -impl crate::Readable for SYSTIME_SECSUPDAT_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [systime_secsupdat::W](W) writer structure"] -impl crate::Writable for SYSTIME_SECSUPDAT_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`systime_secsupdat::R`](R) reader structure"] +impl crate::Readable for SystimeSecsupdatSpec {} +#[doc = "`write(|w| ..)` method takes [`systime_secsupdat::W`](W) writer structure"] +impl crate::Writable for SystimeSecsupdatSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SYSTIME_SECSUPDAT to value 0"] -impl crate::Resettable for SYSTIME_SECSUPDAT_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for SystimeSecsupdatSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/target_time_nsec.rs b/va416xx/src/eth/target_time_nsec.rs index 277d4a0..4e91ab0 100644 --- a/va416xx/src/eth/target_time_nsec.rs +++ b/va416xx/src/eth/target_time_nsec.rs @@ -1,150 +1,55 @@ #[doc = "Register `TARGET_TIME_NSEC` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TARGET_TIME_NSEC` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `TRGTBUSY` reader - 32 Bits of Hash Table"] -pub struct TRGTBUSY_R(crate::FieldReader); -impl TRGTBUSY_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TRGTBUSY_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TRGTBUSY_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TRGTBUSY` writer - 32 Bits of Hash Table"] -pub struct TRGTBUSY_W<'a> { - w: &'a mut W, -} -impl<'a> TRGTBUSY_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 31)) | ((value as u32 & 0x01) << 31); - self.w - } -} +pub type W = crate::W; #[doc = "Field `TTSLO` reader - Target Timestamp Low Register"] -pub struct TTSLO_R(crate::FieldReader); -impl TTSLO_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - TTSLO_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TTSLO_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type TtsloR = crate::FieldReader; #[doc = "Field `TTSLO` writer - Target Timestamp Low Register"] -pub struct TTSLO_W<'a> { - w: &'a mut W, -} -impl<'a> TTSLO_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - self.w.bits = (self.w.bits & !0x7fff_ffff) | (value as u32 & 0x7fff_ffff); - self.w - } -} +pub type TtsloW<'a, REG> = crate::FieldWriter<'a, REG, 31, u32>; +#[doc = "Field `TRGTBUSY` reader - 32 Bits of Hash Table"] +pub type TrgtbusyR = crate::BitReader; +#[doc = "Field `TRGTBUSY` writer - 32 Bits of Hash Table"] +pub type TrgtbusyW<'a, REG> = crate::BitWriter<'a, REG>; impl R { - #[doc = "Bit 31 - 32 Bits of Hash Table"] - #[inline(always)] - pub fn trgtbusy(&self) -> TRGTBUSY_R { - TRGTBUSY_R::new(((self.bits >> 31) & 0x01) != 0) - } #[doc = "Bits 0:30 - Target Timestamp Low Register"] #[inline(always)] - pub fn ttslo(&self) -> TTSLO_R { - TTSLO_R::new((self.bits & 0x7fff_ffff) as u32) + pub fn ttslo(&self) -> TtsloR { + TtsloR::new(self.bits & 0x7fff_ffff) + } + #[doc = "Bit 31 - 32 Bits of Hash Table"] + #[inline(always)] + pub fn trgtbusy(&self) -> TrgtbusyR { + TrgtbusyR::new(((self.bits >> 31) & 1) != 0) } } impl W { - #[doc = "Bit 31 - 32 Bits of Hash Table"] - #[inline(always)] - pub fn trgtbusy(&mut self) -> TRGTBUSY_W { - TRGTBUSY_W { w: self } - } #[doc = "Bits 0:30 - Target Timestamp Low Register"] #[inline(always)] - pub fn ttslo(&mut self) -> TTSLO_W { - TTSLO_W { w: self } + #[must_use] + pub fn ttslo(&mut self) -> TtsloW { + TtsloW::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bit 31 - 32 Bits of Hash Table"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn trgtbusy(&mut self) -> TrgtbusyW { + TrgtbusyW::new(self, 31) } } -#[doc = "Holds the lower 32-bits of time to be compared with the system time\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [target_time_nsec](index.html) module"] -pub struct TARGET_TIME_NSEC_SPEC; -impl crate::RegisterSpec for TARGET_TIME_NSEC_SPEC { +#[doc = "Holds the lower 32-bits of time to be compared with the system time\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`target_time_nsec::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`target_time_nsec::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TargetTimeNsecSpec; +impl crate::RegisterSpec for TargetTimeNsecSpec { type Ux = u32; } -#[doc = "`read()` method returns [target_time_nsec::R](R) reader structure"] -impl crate::Readable for TARGET_TIME_NSEC_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [target_time_nsec::W](W) writer structure"] -impl crate::Writable for TARGET_TIME_NSEC_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`target_time_nsec::R`](R) reader structure"] +impl crate::Readable for TargetTimeNsecSpec {} +#[doc = "`write(|w| ..)` method takes [`target_time_nsec::W`](W) writer structure"] +impl crate::Writable for TargetTimeNsecSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TARGET_TIME_NSEC to value 0"] -impl crate::Resettable for TARGET_TIME_NSEC_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for TargetTimeNsecSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/target_time_secs.rs b/va416xx/src/eth/target_time_secs.rs index 25d8345..b5d9c4d 100644 --- a/va416xx/src/eth/target_time_secs.rs +++ b/va416xx/src/eth/target_time_secs.rs @@ -1,103 +1,40 @@ #[doc = "Register `TARGET_TIME_SECS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TARGET_TIME_SECS` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TSTR` reader - Target Time Seconds Registe"] -pub struct TSTR_R(crate::FieldReader); -impl TSTR_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - TSTR_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TSTR_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type TstrR = crate::FieldReader; #[doc = "Field `TSTR` writer - Target Time Seconds Registe"] -pub struct TSTR_W<'a> { - w: &'a mut W, -} -impl<'a> TSTR_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - self.w.bits = value as u32; - self.w - } -} +pub type TstrW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Target Time Seconds Registe"] #[inline(always)] - pub fn tstr(&self) -> TSTR_R { - TSTR_R::new(self.bits as u32) + pub fn tstr(&self) -> TstrR { + TstrR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Target Time Seconds Registe"] #[inline(always)] - pub fn tstr(&mut self) -> TSTR_W { - TSTR_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn tstr(&mut self) -> TstrW { + TstrW::new(self, 0) } } -#[doc = "Holds the high 32-bits of time to be compared with the system time\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [target_time_secs](index.html) module"] -pub struct TARGET_TIME_SECS_SPEC; -impl crate::RegisterSpec for TARGET_TIME_SECS_SPEC { +#[doc = "Holds the high 32-bits of time to be compared with the system time\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`target_time_secs::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`target_time_secs::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TargetTimeSecsSpec; +impl crate::RegisterSpec for TargetTimeSecsSpec { type Ux = u32; } -#[doc = "`read()` method returns [target_time_secs::R](R) reader structure"] -impl crate::Readable for TARGET_TIME_SECS_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [target_time_secs::W](W) writer structure"] -impl crate::Writable for TARGET_TIME_SECS_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`target_time_secs::R`](R) reader structure"] +impl crate::Readable for TargetTimeSecsSpec {} +#[doc = "`write(|w| ..)` method takes [`target_time_secs::W`](W) writer structure"] +impl crate::Writable for TargetTimeSecsSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TARGET_TIME_SECS to value 0"] -impl crate::Resettable for TARGET_TIME_SECS_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for TargetTimeSecsSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/timestamp_ctrl.rs b/va416xx/src/eth/timestamp_ctrl.rs index 8b5c6d1..e41dce4 100644 --- a/va416xx/src/eth/timestamp_ctrl.rs +++ b/va416xx/src/eth/timestamp_ctrl.rs @@ -1,1043 +1,340 @@ #[doc = "Register `TIMESTAMP_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMESTAMP_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `ATSEN3` reader - Auxiliary Snapshot 3 Enable"] -pub struct ATSEN3_R(crate::FieldReader); -impl ATSEN3_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - ATSEN3_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ATSEN3_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `ATSEN3` writer - Auxiliary Snapshot 3 Enable"] -pub struct ATSEN3_W<'a> { - w: &'a mut W, -} -impl<'a> ATSEN3_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 28)) | ((value as u32 & 0x01) << 28); - self.w - } -} -#[doc = "Field `ATSEN2` reader - Auxiliary Snapshot 2 Enable"] -pub struct ATSEN2_R(crate::FieldReader); -impl ATSEN2_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - ATSEN2_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ATSEN2_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `ATSEN2` writer - Auxiliary Snapshot 2 Enable"] -pub struct ATSEN2_W<'a> { - w: &'a mut W, -} -impl<'a> ATSEN2_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 27)) | ((value as u32 & 0x01) << 27); - self.w - } -} -#[doc = "Field `ATSEN1` reader - Auxiliary Snapshot 1 Enable"] -pub struct ATSEN1_R(crate::FieldReader); -impl ATSEN1_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - ATSEN1_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ATSEN1_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `ATSEN1` writer - Auxiliary Snapshot 1 Enable"] -pub struct ATSEN1_W<'a> { - w: &'a mut W, -} -impl<'a> ATSEN1_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 26)) | ((value as u32 & 0x01) << 26); - self.w - } -} -#[doc = "Field `ATSEN0` reader - Auxiliary Snapshot 0 Enable"] -pub struct ATSEN0_R(crate::FieldReader); -impl ATSEN0_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - ATSEN0_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ATSEN0_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `ATSEN0` writer - Auxiliary Snapshot 0 Enable"] -pub struct ATSEN0_W<'a> { - w: &'a mut W, -} -impl<'a> ATSEN0_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 25)) | ((value as u32 & 0x01) << 25); - self.w - } -} -#[doc = "Field `ATSFC` reader - Auxiliary Snapshot FIFO Clear"] -pub struct ATSFC_R(crate::FieldReader); -impl ATSFC_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - ATSFC_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ATSFC_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `ATSFC` writer - Auxiliary Snapshot FIFO Clear"] -pub struct ATSFC_W<'a> { - w: &'a mut W, -} -impl<'a> ATSFC_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 24)) | ((value as u32 & 0x01) << 24); - self.w - } -} -#[doc = "Field `TSENMACADDR` reader - Enable MAC address for PTP Frame Filtering"] -pub struct TSENMACADDR_R(crate::FieldReader); -impl TSENMACADDR_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TSENMACADDR_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TSENMACADDR_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TSENMACADDR` writer - Enable MAC address for PTP Frame Filtering"] -pub struct TSENMACADDR_W<'a> { - w: &'a mut W, -} -impl<'a> TSENMACADDR_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 18)) | ((value as u32 & 0x01) << 18); - self.w - } -} -#[doc = "Field `SNAPTYPSEL` reader - Select PTP packets for Taking Snapshots"] -pub struct SNAPTYPSEL_R(crate::FieldReader); -impl SNAPTYPSEL_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - SNAPTYPSEL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for SNAPTYPSEL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `SNAPTYPSEL` writer - Select PTP packets for Taking Snapshots"] -pub struct SNAPTYPSEL_W<'a> { - w: &'a mut W, -} -impl<'a> SNAPTYPSEL_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x03 << 16)) | ((value as u32 & 0x03) << 16); - self.w - } -} -#[doc = "Field `TSMSTRENA` reader - Enable Snapshot for Messages Relevant to Master"] -pub struct TSMSTRENA_R(crate::FieldReader); -impl TSMSTRENA_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TSMSTRENA_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TSMSTRENA_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TSMSTRENA` writer - Enable Snapshot for Messages Relevant to Master"] -pub struct TSMSTRENA_W<'a> { - w: &'a mut W, -} -impl<'a> TSMSTRENA_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); - self.w - } -} -#[doc = "Field `TSEVNTENA` reader - Enable Timestamp Snapshot for Event Messages"] -pub struct TSEVNTENA_R(crate::FieldReader); -impl TSEVNTENA_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TSEVNTENA_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TSEVNTENA_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TSEVNTENA` writer - Enable Timestamp Snapshot for Event Messages"] -pub struct TSEVNTENA_W<'a> { - w: &'a mut W, -} -impl<'a> TSEVNTENA_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); - self.w - } -} -#[doc = "Field `TSIPV4ENA` reader - Enable Processing of PTP Frames Sent over IPv4-UDP"] -pub struct TSIPV4ENA_R(crate::FieldReader); -impl TSIPV4ENA_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TSIPV4ENA_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TSIPV4ENA_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TSIPV4ENA` writer - Enable Processing of PTP Frames Sent over IPv4-UDP"] -pub struct TSIPV4ENA_W<'a> { - w: &'a mut W, -} -impl<'a> TSIPV4ENA_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); - self.w - } -} -#[doc = "Field `TSIPV6ENA` reader - Enable Processing of PTP Frames Sent over IPv6-UDP"] -pub struct TSIPV6ENA_R(crate::FieldReader); -impl TSIPV6ENA_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TSIPV6ENA_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TSIPV6ENA_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TSIPV6ENA` writer - Enable Processing of PTP Frames Sent over IPv6-UDP"] -pub struct TSIPV6ENA_W<'a> { - w: &'a mut W, -} -impl<'a> TSIPV6ENA_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); - self.w - } -} -#[doc = "Field `TSIPENA` reader - Enable Processing of PTP over Ethernet Frames"] -pub struct TSIPENA_R(crate::FieldReader); -impl TSIPENA_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TSIPENA_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TSIPENA_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TSIPENA` writer - Enable Processing of PTP over Ethernet Frames"] -pub struct TSIPENA_W<'a> { - w: &'a mut W, -} -impl<'a> TSIPENA_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); - self.w - } -} -#[doc = "Field `TSVER2ENA` reader - Enable PTP packet Processing for Version 2 Format"] -pub struct TSVER2ENA_R(crate::FieldReader); -impl TSVER2ENA_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TSVER2ENA_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TSVER2ENA_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TSVER2ENA` writer - Enable PTP packet Processing for Version 2 Format"] -pub struct TSVER2ENA_W<'a> { - w: &'a mut W, -} -impl<'a> TSVER2ENA_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); - self.w - } -} -#[doc = "Field `TSCTRLSSR` reader - Timestamp Digital or Binary Rollover Control"] -pub struct TSCTRLSSR_R(crate::FieldReader); -impl TSCTRLSSR_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TSCTRLSSR_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TSCTRLSSR_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TSCTRLSSR` writer - Timestamp Digital or Binary Rollover Control"] -pub struct TSCTRLSSR_W<'a> { - w: &'a mut W, -} -impl<'a> TSCTRLSSR_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); - self.w - } -} -#[doc = "Field `TSENALL` reader - Enable Timestamp for All Frames"] -pub struct TSENALL_R(crate::FieldReader); -impl TSENALL_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TSENALL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TSENALL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TSENALL` writer - Enable Timestamp for All Frames"] -pub struct TSENALL_W<'a> { - w: &'a mut W, -} -impl<'a> TSENALL_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); - self.w - } -} -#[doc = "Field `TSADDRREG` reader - Addend Reg Update"] -pub struct TSADDRREG_R(crate::FieldReader); -impl TSADDRREG_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TSADDRREG_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TSADDRREG_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TSADDRREG` writer - Addend Reg Update"] -pub struct TSADDRREG_W<'a> { - w: &'a mut W, -} -impl<'a> TSADDRREG_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); - self.w - } -} -#[doc = "Field `TSTRIG` reader - Timestamp Interrupt Trigger Enable"] -pub struct TSTRIG_R(crate::FieldReader); -impl TSTRIG_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TSTRIG_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TSTRIG_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TSTRIG` writer - Timestamp Interrupt Trigger Enable"] -pub struct TSTRIG_W<'a> { - w: &'a mut W, -} -impl<'a> TSTRIG_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); - self.w - } -} -#[doc = "Field `TSUPDT` reader - Timestamp Update"] -pub struct TSUPDT_R(crate::FieldReader); -impl TSUPDT_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TSUPDT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TSUPDT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TSUPDT` writer - Timestamp Update"] -pub struct TSUPDT_W<'a> { - w: &'a mut W, -} -impl<'a> TSUPDT_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); - self.w - } -} -#[doc = "Field `TSINIT` reader - Timestamp Initialize"] -pub struct TSINIT_R(crate::FieldReader); -impl TSINIT_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TSINIT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TSINIT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TSINIT` writer - Timestamp Initialize"] -pub struct TSINIT_W<'a> { - w: &'a mut W, -} -impl<'a> TSINIT_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); - self.w - } -} -#[doc = "Field `TSCFUPDT` reader - Timestamp Fine or Coarse Update"] -pub struct TSCFUPDT_R(crate::FieldReader); -impl TSCFUPDT_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TSCFUPDT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TSCFUPDT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TSCFUPDT` writer - Timestamp Fine or Coarse Update"] -pub struct TSCFUPDT_W<'a> { - w: &'a mut W, -} -impl<'a> TSCFUPDT_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); - self.w - } -} +pub type W = crate::W; #[doc = "Field `TSENA` reader - Timestamp Enable"] -pub struct TSENA_R(crate::FieldReader); -impl TSENA_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TSENA_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TSENA_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type TsenaR = crate::BitReader; #[doc = "Field `TSENA` writer - Timestamp Enable"] -pub struct TSENA_W<'a> { - w: &'a mut W, -} -impl<'a> TSENA_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} +pub type TsenaW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TSCFUPDT` reader - Timestamp Fine or Coarse Update"] +pub type TscfupdtR = crate::BitReader; +#[doc = "Field `TSCFUPDT` writer - Timestamp Fine or Coarse Update"] +pub type TscfupdtW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TSINIT` reader - Timestamp Initialize"] +pub type TsinitR = crate::BitReader; +#[doc = "Field `TSINIT` writer - Timestamp Initialize"] +pub type TsinitW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TSUPDT` reader - Timestamp Update"] +pub type TsupdtR = crate::BitReader; +#[doc = "Field `TSUPDT` writer - Timestamp Update"] +pub type TsupdtW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TSTRIG` reader - Timestamp Interrupt Trigger Enable"] +pub type TstrigR = crate::BitReader; +#[doc = "Field `TSTRIG` writer - Timestamp Interrupt Trigger Enable"] +pub type TstrigW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TSADDRREG` reader - Addend Reg Update"] +pub type TsaddrregR = crate::BitReader; +#[doc = "Field `TSADDRREG` writer - Addend Reg Update"] +pub type TsaddrregW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TSENALL` reader - Enable Timestamp for All Frames"] +pub type TsenallR = crate::BitReader; +#[doc = "Field `TSENALL` writer - Enable Timestamp for All Frames"] +pub type TsenallW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TSCTRLSSR` reader - Timestamp Digital or Binary Rollover Control"] +pub type TsctrlssrR = crate::BitReader; +#[doc = "Field `TSCTRLSSR` writer - Timestamp Digital or Binary Rollover Control"] +pub type TsctrlssrW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TSVER2ENA` reader - Enable PTP packet Processing for Version 2 Format"] +pub type Tsver2enaR = crate::BitReader; +#[doc = "Field `TSVER2ENA` writer - Enable PTP packet Processing for Version 2 Format"] +pub type Tsver2enaW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TSIPENA` reader - Enable Processing of PTP over Ethernet Frames"] +pub type TsipenaR = crate::BitReader; +#[doc = "Field `TSIPENA` writer - Enable Processing of PTP over Ethernet Frames"] +pub type TsipenaW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TSIPV6ENA` reader - Enable Processing of PTP Frames Sent over IPv6-UDP"] +pub type Tsipv6enaR = crate::BitReader; +#[doc = "Field `TSIPV6ENA` writer - Enable Processing of PTP Frames Sent over IPv6-UDP"] +pub type Tsipv6enaW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TSIPV4ENA` reader - Enable Processing of PTP Frames Sent over IPv4-UDP"] +pub type Tsipv4enaR = crate::BitReader; +#[doc = "Field `TSIPV4ENA` writer - Enable Processing of PTP Frames Sent over IPv4-UDP"] +pub type Tsipv4enaW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TSEVNTENA` reader - Enable Timestamp Snapshot for Event Messages"] +pub type TsevntenaR = crate::BitReader; +#[doc = "Field `TSEVNTENA` writer - Enable Timestamp Snapshot for Event Messages"] +pub type TsevntenaW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TSMSTRENA` reader - Enable Snapshot for Messages Relevant to Master"] +pub type TsmstrenaR = crate::BitReader; +#[doc = "Field `TSMSTRENA` writer - Enable Snapshot for Messages Relevant to Master"] +pub type TsmstrenaW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `SNAPTYPSEL` reader - Select PTP packets for Taking Snapshots"] +pub type SnaptypselR = crate::FieldReader; +#[doc = "Field `SNAPTYPSEL` writer - Select PTP packets for Taking Snapshots"] +pub type SnaptypselW<'a, REG> = crate::FieldWriter<'a, REG, 2>; +#[doc = "Field `TSENMACADDR` reader - Enable MAC address for PTP Frame Filtering"] +pub type TsenmacaddrR = crate::BitReader; +#[doc = "Field `TSENMACADDR` writer - Enable MAC address for PTP Frame Filtering"] +pub type TsenmacaddrW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `ATSFC` reader - Auxiliary Snapshot FIFO Clear"] +pub type AtsfcR = crate::BitReader; +#[doc = "Field `ATSFC` writer - Auxiliary Snapshot FIFO Clear"] +pub type AtsfcW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `ATSEN0` reader - Auxiliary Snapshot 0 Enable"] +pub type Atsen0R = crate::BitReader; +#[doc = "Field `ATSEN0` writer - Auxiliary Snapshot 0 Enable"] +pub type Atsen0W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `ATSEN1` reader - Auxiliary Snapshot 1 Enable"] +pub type Atsen1R = crate::BitReader; +#[doc = "Field `ATSEN1` writer - Auxiliary Snapshot 1 Enable"] +pub type Atsen1W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `ATSEN2` reader - Auxiliary Snapshot 2 Enable"] +pub type Atsen2R = crate::BitReader; +#[doc = "Field `ATSEN2` writer - Auxiliary Snapshot 2 Enable"] +pub type Atsen2W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `ATSEN3` reader - Auxiliary Snapshot 3 Enable"] +pub type Atsen3R = crate::BitReader; +#[doc = "Field `ATSEN3` writer - Auxiliary Snapshot 3 Enable"] +pub type Atsen3W<'a, REG> = crate::BitWriter<'a, REG>; impl R { - #[doc = "Bit 28 - Auxiliary Snapshot 3 Enable"] + #[doc = "Bit 0 - Timestamp Enable"] #[inline(always)] - pub fn atsen3(&self) -> ATSEN3_R { - ATSEN3_R::new(((self.bits >> 28) & 0x01) != 0) - } - #[doc = "Bit 27 - Auxiliary Snapshot 2 Enable"] - #[inline(always)] - pub fn atsen2(&self) -> ATSEN2_R { - ATSEN2_R::new(((self.bits >> 27) & 0x01) != 0) - } - #[doc = "Bit 26 - Auxiliary Snapshot 1 Enable"] - #[inline(always)] - pub fn atsen1(&self) -> ATSEN1_R { - ATSEN1_R::new(((self.bits >> 26) & 0x01) != 0) - } - #[doc = "Bit 25 - Auxiliary Snapshot 0 Enable"] - #[inline(always)] - pub fn atsen0(&self) -> ATSEN0_R { - ATSEN0_R::new(((self.bits >> 25) & 0x01) != 0) - } - #[doc = "Bit 24 - Auxiliary Snapshot FIFO Clear"] - #[inline(always)] - pub fn atsfc(&self) -> ATSFC_R { - ATSFC_R::new(((self.bits >> 24) & 0x01) != 0) - } - #[doc = "Bit 18 - Enable MAC address for PTP Frame Filtering"] - #[inline(always)] - pub fn tsenmacaddr(&self) -> TSENMACADDR_R { - TSENMACADDR_R::new(((self.bits >> 18) & 0x01) != 0) - } - #[doc = "Bits 16:17 - Select PTP packets for Taking Snapshots"] - #[inline(always)] - pub fn snaptypsel(&self) -> SNAPTYPSEL_R { - SNAPTYPSEL_R::new(((self.bits >> 16) & 0x03) as u8) - } - #[doc = "Bit 15 - Enable Snapshot for Messages Relevant to Master"] - #[inline(always)] - pub fn tsmstrena(&self) -> TSMSTRENA_R { - TSMSTRENA_R::new(((self.bits >> 15) & 0x01) != 0) - } - #[doc = "Bit 14 - Enable Timestamp Snapshot for Event Messages"] - #[inline(always)] - pub fn tsevntena(&self) -> TSEVNTENA_R { - TSEVNTENA_R::new(((self.bits >> 14) & 0x01) != 0) - } - #[doc = "Bit 13 - Enable Processing of PTP Frames Sent over IPv4-UDP"] - #[inline(always)] - pub fn tsipv4ena(&self) -> TSIPV4ENA_R { - TSIPV4ENA_R::new(((self.bits >> 13) & 0x01) != 0) - } - #[doc = "Bit 12 - Enable Processing of PTP Frames Sent over IPv6-UDP"] - #[inline(always)] - pub fn tsipv6ena(&self) -> TSIPV6ENA_R { - TSIPV6ENA_R::new(((self.bits >> 12) & 0x01) != 0) - } - #[doc = "Bit 11 - Enable Processing of PTP over Ethernet Frames"] - #[inline(always)] - pub fn tsipena(&self) -> TSIPENA_R { - TSIPENA_R::new(((self.bits >> 11) & 0x01) != 0) - } - #[doc = "Bit 10 - Enable PTP packet Processing for Version 2 Format"] - #[inline(always)] - pub fn tsver2ena(&self) -> TSVER2ENA_R { - TSVER2ENA_R::new(((self.bits >> 10) & 0x01) != 0) - } - #[doc = "Bit 9 - Timestamp Digital or Binary Rollover Control"] - #[inline(always)] - pub fn tsctrlssr(&self) -> TSCTRLSSR_R { - TSCTRLSSR_R::new(((self.bits >> 9) & 0x01) != 0) - } - #[doc = "Bit 8 - Enable Timestamp for All Frames"] - #[inline(always)] - pub fn tsenall(&self) -> TSENALL_R { - TSENALL_R::new(((self.bits >> 8) & 0x01) != 0) - } - #[doc = "Bit 5 - Addend Reg Update"] - #[inline(always)] - pub fn tsaddrreg(&self) -> TSADDRREG_R { - TSADDRREG_R::new(((self.bits >> 5) & 0x01) != 0) - } - #[doc = "Bit 4 - Timestamp Interrupt Trigger Enable"] - #[inline(always)] - pub fn tstrig(&self) -> TSTRIG_R { - TSTRIG_R::new(((self.bits >> 4) & 0x01) != 0) - } - #[doc = "Bit 3 - Timestamp Update"] - #[inline(always)] - pub fn tsupdt(&self) -> TSUPDT_R { - TSUPDT_R::new(((self.bits >> 3) & 0x01) != 0) - } - #[doc = "Bit 2 - Timestamp Initialize"] - #[inline(always)] - pub fn tsinit(&self) -> TSINIT_R { - TSINIT_R::new(((self.bits >> 2) & 0x01) != 0) + pub fn tsena(&self) -> TsenaR { + TsenaR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Timestamp Fine or Coarse Update"] #[inline(always)] - pub fn tscfupdt(&self) -> TSCFUPDT_R { - TSCFUPDT_R::new(((self.bits >> 1) & 0x01) != 0) + pub fn tscfupdt(&self) -> TscfupdtR { + TscfupdtR::new(((self.bits >> 1) & 1) != 0) } - #[doc = "Bit 0 - Timestamp Enable"] + #[doc = "Bit 2 - Timestamp Initialize"] #[inline(always)] - pub fn tsena(&self) -> TSENA_R { - TSENA_R::new((self.bits & 0x01) != 0) + pub fn tsinit(&self) -> TsinitR { + TsinitR::new(((self.bits >> 2) & 1) != 0) + } + #[doc = "Bit 3 - Timestamp Update"] + #[inline(always)] + pub fn tsupdt(&self) -> TsupdtR { + TsupdtR::new(((self.bits >> 3) & 1) != 0) + } + #[doc = "Bit 4 - Timestamp Interrupt Trigger Enable"] + #[inline(always)] + pub fn tstrig(&self) -> TstrigR { + TstrigR::new(((self.bits >> 4) & 1) != 0) + } + #[doc = "Bit 5 - Addend Reg Update"] + #[inline(always)] + pub fn tsaddrreg(&self) -> TsaddrregR { + TsaddrregR::new(((self.bits >> 5) & 1) != 0) + } + #[doc = "Bit 8 - Enable Timestamp for All Frames"] + #[inline(always)] + pub fn tsenall(&self) -> TsenallR { + TsenallR::new(((self.bits >> 8) & 1) != 0) + } + #[doc = "Bit 9 - Timestamp Digital or Binary Rollover Control"] + #[inline(always)] + pub fn tsctrlssr(&self) -> TsctrlssrR { + TsctrlssrR::new(((self.bits >> 9) & 1) != 0) + } + #[doc = "Bit 10 - Enable PTP packet Processing for Version 2 Format"] + #[inline(always)] + pub fn tsver2ena(&self) -> Tsver2enaR { + Tsver2enaR::new(((self.bits >> 10) & 1) != 0) + } + #[doc = "Bit 11 - Enable Processing of PTP over Ethernet Frames"] + #[inline(always)] + pub fn tsipena(&self) -> TsipenaR { + TsipenaR::new(((self.bits >> 11) & 1) != 0) + } + #[doc = "Bit 12 - Enable Processing of PTP Frames Sent over IPv6-UDP"] + #[inline(always)] + pub fn tsipv6ena(&self) -> Tsipv6enaR { + Tsipv6enaR::new(((self.bits >> 12) & 1) != 0) + } + #[doc = "Bit 13 - Enable Processing of PTP Frames Sent over IPv4-UDP"] + #[inline(always)] + pub fn tsipv4ena(&self) -> Tsipv4enaR { + Tsipv4enaR::new(((self.bits >> 13) & 1) != 0) + } + #[doc = "Bit 14 - Enable Timestamp Snapshot for Event Messages"] + #[inline(always)] + pub fn tsevntena(&self) -> TsevntenaR { + TsevntenaR::new(((self.bits >> 14) & 1) != 0) + } + #[doc = "Bit 15 - Enable Snapshot for Messages Relevant to Master"] + #[inline(always)] + pub fn tsmstrena(&self) -> TsmstrenaR { + TsmstrenaR::new(((self.bits >> 15) & 1) != 0) + } + #[doc = "Bits 16:17 - Select PTP packets for Taking Snapshots"] + #[inline(always)] + pub fn snaptypsel(&self) -> SnaptypselR { + SnaptypselR::new(((self.bits >> 16) & 3) as u8) + } + #[doc = "Bit 18 - Enable MAC address for PTP Frame Filtering"] + #[inline(always)] + pub fn tsenmacaddr(&self) -> TsenmacaddrR { + TsenmacaddrR::new(((self.bits >> 18) & 1) != 0) + } + #[doc = "Bit 24 - Auxiliary Snapshot FIFO Clear"] + #[inline(always)] + pub fn atsfc(&self) -> AtsfcR { + AtsfcR::new(((self.bits >> 24) & 1) != 0) + } + #[doc = "Bit 25 - Auxiliary Snapshot 0 Enable"] + #[inline(always)] + pub fn atsen0(&self) -> Atsen0R { + Atsen0R::new(((self.bits >> 25) & 1) != 0) + } + #[doc = "Bit 26 - Auxiliary Snapshot 1 Enable"] + #[inline(always)] + pub fn atsen1(&self) -> Atsen1R { + Atsen1R::new(((self.bits >> 26) & 1) != 0) + } + #[doc = "Bit 27 - Auxiliary Snapshot 2 Enable"] + #[inline(always)] + pub fn atsen2(&self) -> Atsen2R { + Atsen2R::new(((self.bits >> 27) & 1) != 0) + } + #[doc = "Bit 28 - Auxiliary Snapshot 3 Enable"] + #[inline(always)] + pub fn atsen3(&self) -> Atsen3R { + Atsen3R::new(((self.bits >> 28) & 1) != 0) } } impl W { - #[doc = "Bit 28 - Auxiliary Snapshot 3 Enable"] + #[doc = "Bit 0 - Timestamp Enable"] #[inline(always)] - pub fn atsen3(&mut self) -> ATSEN3_W { - ATSEN3_W { w: self } - } - #[doc = "Bit 27 - Auxiliary Snapshot 2 Enable"] - #[inline(always)] - pub fn atsen2(&mut self) -> ATSEN2_W { - ATSEN2_W { w: self } - } - #[doc = "Bit 26 - Auxiliary Snapshot 1 Enable"] - #[inline(always)] - pub fn atsen1(&mut self) -> ATSEN1_W { - ATSEN1_W { w: self } - } - #[doc = "Bit 25 - Auxiliary Snapshot 0 Enable"] - #[inline(always)] - pub fn atsen0(&mut self) -> ATSEN0_W { - ATSEN0_W { w: self } - } - #[doc = "Bit 24 - Auxiliary Snapshot FIFO Clear"] - #[inline(always)] - pub fn atsfc(&mut self) -> ATSFC_W { - ATSFC_W { w: self } - } - #[doc = "Bit 18 - Enable MAC address for PTP Frame Filtering"] - #[inline(always)] - pub fn tsenmacaddr(&mut self) -> TSENMACADDR_W { - TSENMACADDR_W { w: self } - } - #[doc = "Bits 16:17 - Select PTP packets for Taking Snapshots"] - #[inline(always)] - pub fn snaptypsel(&mut self) -> SNAPTYPSEL_W { - SNAPTYPSEL_W { w: self } - } - #[doc = "Bit 15 - Enable Snapshot for Messages Relevant to Master"] - #[inline(always)] - pub fn tsmstrena(&mut self) -> TSMSTRENA_W { - TSMSTRENA_W { w: self } - } - #[doc = "Bit 14 - Enable Timestamp Snapshot for Event Messages"] - #[inline(always)] - pub fn tsevntena(&mut self) -> TSEVNTENA_W { - TSEVNTENA_W { w: self } - } - #[doc = "Bit 13 - Enable Processing of PTP Frames Sent over IPv4-UDP"] - #[inline(always)] - pub fn tsipv4ena(&mut self) -> TSIPV4ENA_W { - TSIPV4ENA_W { w: self } - } - #[doc = "Bit 12 - Enable Processing of PTP Frames Sent over IPv6-UDP"] - #[inline(always)] - pub fn tsipv6ena(&mut self) -> TSIPV6ENA_W { - TSIPV6ENA_W { w: self } - } - #[doc = "Bit 11 - Enable Processing of PTP over Ethernet Frames"] - #[inline(always)] - pub fn tsipena(&mut self) -> TSIPENA_W { - TSIPENA_W { w: self } - } - #[doc = "Bit 10 - Enable PTP packet Processing for Version 2 Format"] - #[inline(always)] - pub fn tsver2ena(&mut self) -> TSVER2ENA_W { - TSVER2ENA_W { w: self } - } - #[doc = "Bit 9 - Timestamp Digital or Binary Rollover Control"] - #[inline(always)] - pub fn tsctrlssr(&mut self) -> TSCTRLSSR_W { - TSCTRLSSR_W { w: self } - } - #[doc = "Bit 8 - Enable Timestamp for All Frames"] - #[inline(always)] - pub fn tsenall(&mut self) -> TSENALL_W { - TSENALL_W { w: self } - } - #[doc = "Bit 5 - Addend Reg Update"] - #[inline(always)] - pub fn tsaddrreg(&mut self) -> TSADDRREG_W { - TSADDRREG_W { w: self } - } - #[doc = "Bit 4 - Timestamp Interrupt Trigger Enable"] - #[inline(always)] - pub fn tstrig(&mut self) -> TSTRIG_W { - TSTRIG_W { w: self } - } - #[doc = "Bit 3 - Timestamp Update"] - #[inline(always)] - pub fn tsupdt(&mut self) -> TSUPDT_W { - TSUPDT_W { w: self } - } - #[doc = "Bit 2 - Timestamp Initialize"] - #[inline(always)] - pub fn tsinit(&mut self) -> TSINIT_W { - TSINIT_W { w: self } + #[must_use] + pub fn tsena(&mut self) -> TsenaW { + TsenaW::new(self, 0) } #[doc = "Bit 1 - Timestamp Fine or Coarse Update"] #[inline(always)] - pub fn tscfupdt(&mut self) -> TSCFUPDT_W { - TSCFUPDT_W { w: self } + #[must_use] + pub fn tscfupdt(&mut self) -> TscfupdtW { + TscfupdtW::new(self, 1) } - #[doc = "Bit 0 - Timestamp Enable"] + #[doc = "Bit 2 - Timestamp Initialize"] #[inline(always)] - pub fn tsena(&mut self) -> TSENA_W { - TSENA_W { w: self } + #[must_use] + pub fn tsinit(&mut self) -> TsinitW { + TsinitW::new(self, 2) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bit 3 - Timestamp Update"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn tsupdt(&mut self) -> TsupdtW { + TsupdtW::new(self, 3) + } + #[doc = "Bit 4 - Timestamp Interrupt Trigger Enable"] + #[inline(always)] + #[must_use] + pub fn tstrig(&mut self) -> TstrigW { + TstrigW::new(self, 4) + } + #[doc = "Bit 5 - Addend Reg Update"] + #[inline(always)] + #[must_use] + pub fn tsaddrreg(&mut self) -> TsaddrregW { + TsaddrregW::new(self, 5) + } + #[doc = "Bit 8 - Enable Timestamp for All Frames"] + #[inline(always)] + #[must_use] + pub fn tsenall(&mut self) -> TsenallW { + TsenallW::new(self, 8) + } + #[doc = "Bit 9 - Timestamp Digital or Binary Rollover Control"] + #[inline(always)] + #[must_use] + pub fn tsctrlssr(&mut self) -> TsctrlssrW { + TsctrlssrW::new(self, 9) + } + #[doc = "Bit 10 - Enable PTP packet Processing for Version 2 Format"] + #[inline(always)] + #[must_use] + pub fn tsver2ena(&mut self) -> Tsver2enaW { + Tsver2enaW::new(self, 10) + } + #[doc = "Bit 11 - Enable Processing of PTP over Ethernet Frames"] + #[inline(always)] + #[must_use] + pub fn tsipena(&mut self) -> TsipenaW { + TsipenaW::new(self, 11) + } + #[doc = "Bit 12 - Enable Processing of PTP Frames Sent over IPv6-UDP"] + #[inline(always)] + #[must_use] + pub fn tsipv6ena(&mut self) -> Tsipv6enaW { + Tsipv6enaW::new(self, 12) + } + #[doc = "Bit 13 - Enable Processing of PTP Frames Sent over IPv4-UDP"] + #[inline(always)] + #[must_use] + pub fn tsipv4ena(&mut self) -> Tsipv4enaW { + Tsipv4enaW::new(self, 13) + } + #[doc = "Bit 14 - Enable Timestamp Snapshot for Event Messages"] + #[inline(always)] + #[must_use] + pub fn tsevntena(&mut self) -> TsevntenaW { + TsevntenaW::new(self, 14) + } + #[doc = "Bit 15 - Enable Snapshot for Messages Relevant to Master"] + #[inline(always)] + #[must_use] + pub fn tsmstrena(&mut self) -> TsmstrenaW { + TsmstrenaW::new(self, 15) + } + #[doc = "Bits 16:17 - Select PTP packets for Taking Snapshots"] + #[inline(always)] + #[must_use] + pub fn snaptypsel(&mut self) -> SnaptypselW { + SnaptypselW::new(self, 16) + } + #[doc = "Bit 18 - Enable MAC address for PTP Frame Filtering"] + #[inline(always)] + #[must_use] + pub fn tsenmacaddr(&mut self) -> TsenmacaddrW { + TsenmacaddrW::new(self, 18) + } + #[doc = "Bit 24 - Auxiliary Snapshot FIFO Clear"] + #[inline(always)] + #[must_use] + pub fn atsfc(&mut self) -> AtsfcW { + AtsfcW::new(self, 24) + } + #[doc = "Bit 25 - Auxiliary Snapshot 0 Enable"] + #[inline(always)] + #[must_use] + pub fn atsen0(&mut self) -> Atsen0W { + Atsen0W::new(self, 25) + } + #[doc = "Bit 26 - Auxiliary Snapshot 1 Enable"] + #[inline(always)] + #[must_use] + pub fn atsen1(&mut self) -> Atsen1W { + Atsen1W::new(self, 26) + } + #[doc = "Bit 27 - Auxiliary Snapshot 2 Enable"] + #[inline(always)] + #[must_use] + pub fn atsen2(&mut self) -> Atsen2W { + Atsen2W::new(self, 27) + } + #[doc = "Bit 28 - Auxiliary Snapshot 3 Enable"] + #[inline(always)] + #[must_use] + pub fn atsen3(&mut self) -> Atsen3W { + Atsen3W::new(self, 28) } } -#[doc = "Controls the IEEE 1588 timestamp generation and update logic\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timestamp_ctrl](index.html) module"] -pub struct TIMESTAMP_CTRL_SPEC; -impl crate::RegisterSpec for TIMESTAMP_CTRL_SPEC { +#[doc = "Controls the IEEE 1588 timestamp generation and update logic\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`timestamp_ctrl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`timestamp_ctrl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TimestampCtrlSpec; +impl crate::RegisterSpec for TimestampCtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [timestamp_ctrl::R](R) reader structure"] -impl crate::Readable for TIMESTAMP_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timestamp_ctrl::W](W) writer structure"] -impl crate::Writable for TIMESTAMP_CTRL_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`timestamp_ctrl::R`](R) reader structure"] +impl crate::Readable for TimestampCtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`timestamp_ctrl::W`](W) writer structure"] +impl crate::Writable for TimestampCtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMESTAMP_CTRL to value 0"] -impl crate::Resettable for TIMESTAMP_CTRL_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for TimestampCtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/timestampaddend.rs b/va416xx/src/eth/timestampaddend.rs index b851e22..3b76f70 100644 --- a/va416xx/src/eth/timestampaddend.rs +++ b/va416xx/src/eth/timestampaddend.rs @@ -1,103 +1,40 @@ #[doc = "Register `TIMESTAMPADDEND` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMESTAMPADDEND` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TSAR` reader - Timestamp Addend Register"] -pub struct TSAR_R(crate::FieldReader); -impl TSAR_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - TSAR_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TSAR_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type TsarR = crate::FieldReader; #[doc = "Field `TSAR` writer - Timestamp Addend Register"] -pub struct TSAR_W<'a> { - w: &'a mut W, -} -impl<'a> TSAR_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - self.w.bits = value as u32; - self.w - } -} +pub type TsarW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Timestamp Addend Register"] #[inline(always)] - pub fn tsar(&self) -> TSAR_R { - TSAR_R::new(self.bits as u32) + pub fn tsar(&self) -> TsarR { + TsarR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Timestamp Addend Register"] #[inline(always)] - pub fn tsar(&mut self) -> TSAR_W { - TSAR_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn tsar(&mut self) -> TsarW { + TsarW::new(self, 0) } } -#[doc = "This register is used by software to re-adjust the clock frequency linearly to match the Master clock frequency\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timestampaddend](index.html) module"] -pub struct TIMESTAMPADDEND_SPEC; -impl crate::RegisterSpec for TIMESTAMPADDEND_SPEC { +#[doc = "This register is used by software to re-adjust the clock frequency linearly to match the Master clock frequency\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`timestampaddend::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`timestampaddend::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TimestampaddendSpec; +impl crate::RegisterSpec for TimestampaddendSpec { type Ux = u32; } -#[doc = "`read()` method returns [timestampaddend::R](R) reader structure"] -impl crate::Readable for TIMESTAMPADDEND_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timestampaddend::W](W) writer structure"] -impl crate::Writable for TIMESTAMPADDEND_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`timestampaddend::R`](R) reader structure"] +impl crate::Readable for TimestampaddendSpec {} +#[doc = "`write(|w| ..)` method takes [`timestampaddend::W`](W) writer structure"] +impl crate::Writable for TimestampaddendSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMESTAMPADDEND to value 0"] -impl crate::Resettable for TIMESTAMPADDEND_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for TimestampaddendSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/tx1024maxoct_gb.rs b/va416xx/src/eth/tx1024maxoct_gb.rs index 08d7c76..6f1c043 100644 --- a/va416xx/src/eth/tx1024maxoct_gb.rs +++ b/va416xx/src/eth/tx1024maxoct_gb.rs @@ -1,53 +1,22 @@ #[doc = "Register `TX1024MAXOCT_GB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `COUNT` reader - Number of frames"] -pub struct COUNT_R(crate::FieldReader); -impl COUNT_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - COUNT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for COUNT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type CountR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Number of frames"] #[inline(always)] - pub fn count(&self) -> COUNT_R { - COUNT_R::new(self.bits as u32) + pub fn count(&self) -> CountR { + CountR::new(self.bits) } } -#[doc = "MMC Good and bad Frames transmitted with length 1024 to max bytes\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tx1024maxoct_gb](index.html) module"] -pub struct TX1024MAXOCT_GB_SPEC; -impl crate::RegisterSpec for TX1024MAXOCT_GB_SPEC { +#[doc = "MMC Good and bad Frames transmitted with length 1024 to max bytes\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx1024maxoct_gb::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Tx1024maxoctGbSpec; +impl crate::RegisterSpec for Tx1024maxoctGbSpec { type Ux = u32; } -#[doc = "`read()` method returns [tx1024maxoct_gb::R](R) reader structure"] -impl crate::Readable for TX1024MAXOCT_GB_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`tx1024maxoct_gb::R`](R) reader structure"] +impl crate::Readable for Tx1024maxoctGbSpec {} #[doc = "`reset()` method sets TX1024MAXOCT_GB to value 0"] -impl crate::Resettable for TX1024MAXOCT_GB_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Tx1024maxoctGbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/tx128to255oct_gb.rs b/va416xx/src/eth/tx128to255oct_gb.rs index 1d0ab04..021b3d8 100644 --- a/va416xx/src/eth/tx128to255oct_gb.rs +++ b/va416xx/src/eth/tx128to255oct_gb.rs @@ -1,53 +1,22 @@ #[doc = "Register `TX128TO255OCT_GB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `COUNT` reader - Number of frames"] -pub struct COUNT_R(crate::FieldReader); -impl COUNT_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - COUNT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for COUNT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type CountR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Number of frames"] #[inline(always)] - pub fn count(&self) -> COUNT_R { - COUNT_R::new(self.bits as u32) + pub fn count(&self) -> CountR { + CountR::new(self.bits) } } -#[doc = "MMC Good and bad Frames transmitted with length 128 to 255\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tx128to255oct_gb](index.html) module"] -pub struct TX128TO255OCT_GB_SPEC; -impl crate::RegisterSpec for TX128TO255OCT_GB_SPEC { +#[doc = "MMC Good and bad Frames transmitted with length 128 to 255\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx128to255oct_gb::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Tx128to255octGbSpec; +impl crate::RegisterSpec for Tx128to255octGbSpec { type Ux = u32; } -#[doc = "`read()` method returns [tx128to255oct_gb::R](R) reader structure"] -impl crate::Readable for TX128TO255OCT_GB_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`tx128to255oct_gb::R`](R) reader structure"] +impl crate::Readable for Tx128to255octGbSpec {} #[doc = "`reset()` method sets TX128TO255OCT_GB to value 0"] -impl crate::Resettable for TX128TO255OCT_GB_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Tx128to255octGbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/tx256to511oct_gb.rs b/va416xx/src/eth/tx256to511oct_gb.rs index 41802b4..f131a58 100644 --- a/va416xx/src/eth/tx256to511oct_gb.rs +++ b/va416xx/src/eth/tx256to511oct_gb.rs @@ -1,53 +1,22 @@ #[doc = "Register `TX256TO511OCT_GB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `COUNT` reader - Number of frames"] -pub struct COUNT_R(crate::FieldReader); -impl COUNT_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - COUNT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for COUNT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type CountR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Number of frames"] #[inline(always)] - pub fn count(&self) -> COUNT_R { - COUNT_R::new(self.bits as u32) + pub fn count(&self) -> CountR { + CountR::new(self.bits) } } -#[doc = "MMC Good and bad Frames transmitted with length 256 to 511\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tx256to511oct_gb](index.html) module"] -pub struct TX256TO511OCT_GB_SPEC; -impl crate::RegisterSpec for TX256TO511OCT_GB_SPEC { +#[doc = "MMC Good and bad Frames transmitted with length 256 to 511\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx256to511oct_gb::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Tx256to511octGbSpec; +impl crate::RegisterSpec for Tx256to511octGbSpec { type Ux = u32; } -#[doc = "`read()` method returns [tx256to511oct_gb::R](R) reader structure"] -impl crate::Readable for TX256TO511OCT_GB_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`tx256to511oct_gb::R`](R) reader structure"] +impl crate::Readable for Tx256to511octGbSpec {} #[doc = "`reset()` method sets TX256TO511OCT_GB to value 0"] -impl crate::Resettable for TX256TO511OCT_GB_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Tx256to511octGbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/tx512to1023oct_gb.rs b/va416xx/src/eth/tx512to1023oct_gb.rs index 96c4c28..e0451c5 100644 --- a/va416xx/src/eth/tx512to1023oct_gb.rs +++ b/va416xx/src/eth/tx512to1023oct_gb.rs @@ -1,53 +1,22 @@ #[doc = "Register `TX512TO1023OCT_GB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `COUNT` reader - Number of frames"] -pub struct COUNT_R(crate::FieldReader); -impl COUNT_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - COUNT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for COUNT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type CountR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Number of frames"] #[inline(always)] - pub fn count(&self) -> COUNT_R { - COUNT_R::new(self.bits as u32) + pub fn count(&self) -> CountR { + CountR::new(self.bits) } } -#[doc = "MMC Good and bad Frames transmitted with length 512 to 1023\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tx512to1023oct_gb](index.html) module"] -pub struct TX512TO1023OCT_GB_SPEC; -impl crate::RegisterSpec for TX512TO1023OCT_GB_SPEC { +#[doc = "MMC Good and bad Frames transmitted with length 512 to 1023\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx512to1023oct_gb::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Tx512to1023octGbSpec; +impl crate::RegisterSpec for Tx512to1023octGbSpec { type Ux = u32; } -#[doc = "`read()` method returns [tx512to1023oct_gb::R](R) reader structure"] -impl crate::Readable for TX512TO1023OCT_GB_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`tx512to1023oct_gb::R`](R) reader structure"] +impl crate::Readable for Tx512to1023octGbSpec {} #[doc = "`reset()` method sets TX512TO1023OCT_GB to value 0"] -impl crate::Resettable for TX512TO1023OCT_GB_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Tx512to1023octGbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/tx64oct_gb.rs b/va416xx/src/eth/tx64oct_gb.rs index 673ab6b..ed2432d 100644 --- a/va416xx/src/eth/tx64oct_gb.rs +++ b/va416xx/src/eth/tx64oct_gb.rs @@ -1,53 +1,22 @@ #[doc = "Register `TX64OCT_GB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `COUNT` reader - Number of frames"] -pub struct COUNT_R(crate::FieldReader); -impl COUNT_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - COUNT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for COUNT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type CountR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Number of frames"] #[inline(always)] - pub fn count(&self) -> COUNT_R { - COUNT_R::new(self.bits as u32) + pub fn count(&self) -> CountR { + CountR::new(self.bits) } } -#[doc = "MMC Good and bad Frames transmitted with length 64\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tx64oct_gb](index.html) module"] -pub struct TX64OCT_GB_SPEC; -impl crate::RegisterSpec for TX64OCT_GB_SPEC { +#[doc = "MMC Good and bad Frames transmitted with length 64\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx64oct_gb::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Tx64octGbSpec; +impl crate::RegisterSpec for Tx64octGbSpec { type Ux = u32; } -#[doc = "`read()` method returns [tx64oct_gb::R](R) reader structure"] -impl crate::Readable for TX64OCT_GB_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`tx64oct_gb::R`](R) reader structure"] +impl crate::Readable for Tx64octGbSpec {} #[doc = "`reset()` method sets TX64OCT_GB to value 0"] -impl crate::Resettable for TX64OCT_GB_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Tx64octGbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/tx65to127oct_gb.rs b/va416xx/src/eth/tx65to127oct_gb.rs index 13df3b3..9a36048 100644 --- a/va416xx/src/eth/tx65to127oct_gb.rs +++ b/va416xx/src/eth/tx65to127oct_gb.rs @@ -1,53 +1,22 @@ #[doc = "Register `TX65TO127OCT_GB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `COUNT` reader - Number of frames"] -pub struct COUNT_R(crate::FieldReader); -impl COUNT_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - COUNT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for COUNT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type CountR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Number of frames"] #[inline(always)] - pub fn count(&self) -> COUNT_R { - COUNT_R::new(self.bits as u32) + pub fn count(&self) -> CountR { + CountR::new(self.bits) } } -#[doc = "MMC Good and bad Frames transmitted with length 65 to 127\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tx65to127oct_gb](index.html) module"] -pub struct TX65TO127OCT_GB_SPEC; -impl crate::RegisterSpec for TX65TO127OCT_GB_SPEC { +#[doc = "MMC Good and bad Frames transmitted with length 65 to 127\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx65to127oct_gb::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Tx65to127octGbSpec; +impl crate::RegisterSpec for Tx65to127octGbSpec { type Ux = u32; } -#[doc = "`read()` method returns [tx65to127oct_gb::R](R) reader structure"] -impl crate::Readable for TX65TO127OCT_GB_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`tx65to127oct_gb::R`](R) reader structure"] +impl crate::Readable for Tx65to127octGbSpec {} #[doc = "`reset()` method sets TX65TO127OCT_GB to value 0"] -impl crate::Resettable for TX65TO127OCT_GB_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Tx65to127octGbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/txbcastframe_gb.rs b/va416xx/src/eth/txbcastframe_gb.rs index 0c2cbc4..650735f 100644 --- a/va416xx/src/eth/txbcastframe_gb.rs +++ b/va416xx/src/eth/txbcastframe_gb.rs @@ -1,53 +1,22 @@ #[doc = "Register `TXBCASTFRAME_GB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `COUNT` reader - Number of frames"] -pub struct COUNT_R(crate::FieldReader); -impl COUNT_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - COUNT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for COUNT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type CountR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Number of frames"] #[inline(always)] - pub fn count(&self) -> COUNT_R { - COUNT_R::new(self.bits as u32) + pub fn count(&self) -> CountR { + CountR::new(self.bits) } } -#[doc = "MMC number of good and bad broadcast frames transmitted\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txbcastframe_gb](index.html) module"] -pub struct TXBCASTFRAME_GB_SPEC; -impl crate::RegisterSpec for TXBCASTFRAME_GB_SPEC { +#[doc = "MMC number of good and bad broadcast frames transmitted\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txbcastframe_gb::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TxbcastframeGbSpec; +impl crate::RegisterSpec for TxbcastframeGbSpec { type Ux = u32; } -#[doc = "`read()` method returns [txbcastframe_gb::R](R) reader structure"] -impl crate::Readable for TXBCASTFRAME_GB_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`txbcastframe_gb::R`](R) reader structure"] +impl crate::Readable for TxbcastframeGbSpec {} #[doc = "`reset()` method sets TXBCASTFRAME_GB to value 0"] -impl crate::Resettable for TXBCASTFRAME_GB_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for TxbcastframeGbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/txbcastframes_g.rs b/va416xx/src/eth/txbcastframes_g.rs index 7f61a05..6ad1301 100644 --- a/va416xx/src/eth/txbcastframes_g.rs +++ b/va416xx/src/eth/txbcastframes_g.rs @@ -1,53 +1,22 @@ #[doc = "Register `TXBCASTFRAMES_G` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `COUNT` reader - Number of frames"] -pub struct COUNT_R(crate::FieldReader); -impl COUNT_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - COUNT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for COUNT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type CountR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Number of frames"] #[inline(always)] - pub fn count(&self) -> COUNT_R { - COUNT_R::new(self.bits as u32) + pub fn count(&self) -> CountR { + CountR::new(self.bits) } } -#[doc = "MMC Good Broadcast Frames Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txbcastframes_g](index.html) module"] -pub struct TXBCASTFRAMES_G_SPEC; -impl crate::RegisterSpec for TXBCASTFRAMES_G_SPEC { +#[doc = "MMC Good Broadcast Frames Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txbcastframes_g::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TxbcastframesGSpec; +impl crate::RegisterSpec for TxbcastframesGSpec { type Ux = u32; } -#[doc = "`read()` method returns [txbcastframes_g::R](R) reader structure"] -impl crate::Readable for TXBCASTFRAMES_G_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`txbcastframes_g::R`](R) reader structure"] +impl crate::Readable for TxbcastframesGSpec {} #[doc = "`reset()` method sets TXBCASTFRAMES_G to value 0"] -impl crate::Resettable for TXBCASTFRAMES_G_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for TxbcastframesGSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/txcarriererror.rs b/va416xx/src/eth/txcarriererror.rs index b86b717..48b8c3e 100644 --- a/va416xx/src/eth/txcarriererror.rs +++ b/va416xx/src/eth/txcarriererror.rs @@ -1,53 +1,22 @@ #[doc = "Register `TXCARRIERERROR` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `COUNT` reader - Number of frames"] -pub struct COUNT_R(crate::FieldReader); -impl COUNT_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - COUNT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for COUNT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type CountR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Number of frames"] #[inline(always)] - pub fn count(&self) -> COUNT_R { - COUNT_R::new(self.bits as u32) + pub fn count(&self) -> CountR { + CountR::new(self.bits) } } -#[doc = "MMC Number of aborted frames because of carrier sense error\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txcarriererror](index.html) module"] -pub struct TXCARRIERERROR_SPEC; -impl crate::RegisterSpec for TXCARRIERERROR_SPEC { +#[doc = "MMC Number of aborted frames because of carrier sense error\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txcarriererror::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TxcarriererrorSpec; +impl crate::RegisterSpec for TxcarriererrorSpec { type Ux = u32; } -#[doc = "`read()` method returns [txcarriererror::R](R) reader structure"] -impl crate::Readable for TXCARRIERERROR_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`txcarriererror::R`](R) reader structure"] +impl crate::Readable for TxcarriererrorSpec {} #[doc = "`reset()` method sets TXCARRIERERROR to value 0"] -impl crate::Resettable for TXCARRIERERROR_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for TxcarriererrorSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/txdeferred.rs b/va416xx/src/eth/txdeferred.rs index 7d6427e..879b8e9 100644 --- a/va416xx/src/eth/txdeferred.rs +++ b/va416xx/src/eth/txdeferred.rs @@ -1,53 +1,22 @@ #[doc = "Register `TXDEFERRED` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `COUNT` reader - Number of frames"] -pub struct COUNT_R(crate::FieldReader); -impl COUNT_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - COUNT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for COUNT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type CountR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Number of frames"] #[inline(always)] - pub fn count(&self) -> COUNT_R { - COUNT_R::new(self.bits as u32) + pub fn count(&self) -> CountR { + CountR::new(self.bits) } } -#[doc = "MMC Number of successfully transmitted frames after a deferral\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txdeferred](index.html) module"] -pub struct TXDEFERRED_SPEC; -impl crate::RegisterSpec for TXDEFERRED_SPEC { +#[doc = "MMC Number of successfully transmitted frames after a deferral\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txdeferred::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TxdeferredSpec; +impl crate::RegisterSpec for TxdeferredSpec { type Ux = u32; } -#[doc = "`read()` method returns [txdeferred::R](R) reader structure"] -impl crate::Readable for TXDEFERRED_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`txdeferred::R`](R) reader structure"] +impl crate::Readable for TxdeferredSpec {} #[doc = "`reset()` method sets TXDEFERRED to value 0"] -impl crate::Resettable for TXDEFERRED_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for TxdeferredSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/txexcessdef.rs b/va416xx/src/eth/txexcessdef.rs index 632c3c1..49dba0b 100644 --- a/va416xx/src/eth/txexcessdef.rs +++ b/va416xx/src/eth/txexcessdef.rs @@ -1,53 +1,22 @@ #[doc = "Register `TXEXCESSDEF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `COUNT` reader - Number of frames"] -pub struct COUNT_R(crate::FieldReader); -impl COUNT_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - COUNT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for COUNT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type CountR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Number of frames"] #[inline(always)] - pub fn count(&self) -> COUNT_R { - COUNT_R::new(self.bits as u32) + pub fn count(&self) -> CountR { + CountR::new(self.bits) } } -#[doc = "MMC Number of frames aborted because of excessive deferral error\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txexcessdef](index.html) module"] -pub struct TXEXCESSDEF_SPEC; -impl crate::RegisterSpec for TXEXCESSDEF_SPEC { +#[doc = "MMC Number of frames aborted because of excessive deferral error\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txexcessdef::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TxexcessdefSpec; +impl crate::RegisterSpec for TxexcessdefSpec { type Ux = u32; } -#[doc = "`read()` method returns [txexcessdef::R](R) reader structure"] -impl crate::Readable for TXEXCESSDEF_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`txexcessdef::R`](R) reader structure"] +impl crate::Readable for TxexcessdefSpec {} #[doc = "`reset()` method sets TXEXCESSDEF to value 0"] -impl crate::Resettable for TXEXCESSDEF_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for TxexcessdefSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/txexesscol.rs b/va416xx/src/eth/txexesscol.rs index bae764b..1fda568 100644 --- a/va416xx/src/eth/txexesscol.rs +++ b/va416xx/src/eth/txexesscol.rs @@ -1,53 +1,22 @@ #[doc = "Register `TXEXESSCOL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `COUNT` reader - Number of frames"] -pub struct COUNT_R(crate::FieldReader); -impl COUNT_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - COUNT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for COUNT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type CountR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Number of frames"] #[inline(always)] - pub fn count(&self) -> COUNT_R { - COUNT_R::new(self.bits as u32) + pub fn count(&self) -> CountR { + CountR::new(self.bits) } } -#[doc = "MMC Number of aborted frames because of excessive collision errors\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txexesscol](index.html) module"] -pub struct TXEXESSCOL_SPEC; -impl crate::RegisterSpec for TXEXESSCOL_SPEC { +#[doc = "MMC Number of aborted frames because of excessive collision errors\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txexesscol::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TxexesscolSpec; +impl crate::RegisterSpec for TxexesscolSpec { type Ux = u32; } -#[doc = "`read()` method returns [txexesscol::R](R) reader structure"] -impl crate::Readable for TXEXESSCOL_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`txexesscol::R`](R) reader structure"] +impl crate::Readable for TxexesscolSpec {} #[doc = "`reset()` method sets TXEXESSCOL to value 0"] -impl crate::Resettable for TXEXESSCOL_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for TxexesscolSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/txframecount_g.rs b/va416xx/src/eth/txframecount_g.rs index eaf74a2..1828751 100644 --- a/va416xx/src/eth/txframecount_g.rs +++ b/va416xx/src/eth/txframecount_g.rs @@ -1,53 +1,22 @@ #[doc = "Register `TXFRAMECOUNT_G` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `COUNT` reader - Number of frames"] -pub struct COUNT_R(crate::FieldReader); -impl COUNT_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - COUNT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for COUNT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type CountR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Number of frames"] #[inline(always)] - pub fn count(&self) -> COUNT_R { - COUNT_R::new(self.bits as u32) + pub fn count(&self) -> CountR { + CountR::new(self.bits) } } -#[doc = "MMC Number of good frames transmitted\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txframecount_g](index.html) module"] -pub struct TXFRAMECOUNT_G_SPEC; -impl crate::RegisterSpec for TXFRAMECOUNT_G_SPEC { +#[doc = "MMC Number of good frames transmitted\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txframecount_g::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TxframecountGSpec; +impl crate::RegisterSpec for TxframecountGSpec { type Ux = u32; } -#[doc = "`read()` method returns [txframecount_g::R](R) reader structure"] -impl crate::Readable for TXFRAMECOUNT_G_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`txframecount_g::R`](R) reader structure"] +impl crate::Readable for TxframecountGSpec {} #[doc = "`reset()` method sets TXFRAMECOUNT_G to value 0"] -impl crate::Resettable for TXFRAMECOUNT_G_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for TxframecountGSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/txframecount_gb.rs b/va416xx/src/eth/txframecount_gb.rs index 37dd748..7327de5 100644 --- a/va416xx/src/eth/txframecount_gb.rs +++ b/va416xx/src/eth/txframecount_gb.rs @@ -1,53 +1,22 @@ #[doc = "Register `TXFRAMECOUNT_GB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `COUNT` reader - Number of frames"] -pub struct COUNT_R(crate::FieldReader); -impl COUNT_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - COUNT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for COUNT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type CountR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Number of frames"] #[inline(always)] - pub fn count(&self) -> COUNT_R { - COUNT_R::new(self.bits as u32) + pub fn count(&self) -> CountR { + CountR::new(self.bits) } } -#[doc = "MMC Frame Count Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txframecount_gb](index.html) module"] -pub struct TXFRAMECOUNT_GB_SPEC; -impl crate::RegisterSpec for TXFRAMECOUNT_GB_SPEC { +#[doc = "MMC Frame Count Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txframecount_gb::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TxframecountGbSpec; +impl crate::RegisterSpec for TxframecountGbSpec { type Ux = u32; } -#[doc = "`read()` method returns [txframecount_gb::R](R) reader structure"] -impl crate::Readable for TXFRAMECOUNT_GB_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`txframecount_gb::R`](R) reader structure"] +impl crate::Readable for TxframecountGbSpec {} #[doc = "`reset()` method sets TXFRAMECOUNT_GB to value 0"] -impl crate::Resettable for TXFRAMECOUNT_GB_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for TxframecountGbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/txlanframes_g.rs b/va416xx/src/eth/txlanframes_g.rs index c86ad77..3006719 100644 --- a/va416xx/src/eth/txlanframes_g.rs +++ b/va416xx/src/eth/txlanframes_g.rs @@ -1,53 +1,22 @@ #[doc = "Register `TXLANFRAMES_G` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `COUNT` reader - Number of frames"] -pub struct COUNT_R(crate::FieldReader); -impl COUNT_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - COUNT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for COUNT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type CountR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Number of frames"] #[inline(always)] - pub fn count(&self) -> COUNT_R { - COUNT_R::new(self.bits as u32) + pub fn count(&self) -> CountR { + CountR::new(self.bits) } } -#[doc = "MMC Number of good VLAN frames transmitted\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txlanframes_g](index.html) module"] -pub struct TXLANFRAMES_G_SPEC; -impl crate::RegisterSpec for TXLANFRAMES_G_SPEC { +#[doc = "MMC Number of good VLAN frames transmitted\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txlanframes_g::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TxlanframesGSpec; +impl crate::RegisterSpec for TxlanframesGSpec { type Ux = u32; } -#[doc = "`read()` method returns [txlanframes_g::R](R) reader structure"] -impl crate::Readable for TXLANFRAMES_G_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`txlanframes_g::R`](R) reader structure"] +impl crate::Readable for TxlanframesGSpec {} #[doc = "`reset()` method sets TXLANFRAMES_G to value 0"] -impl crate::Resettable for TXLANFRAMES_G_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for TxlanframesGSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/txlatecol.rs b/va416xx/src/eth/txlatecol.rs index 15fa8b4..2041d11 100644 --- a/va416xx/src/eth/txlatecol.rs +++ b/va416xx/src/eth/txlatecol.rs @@ -1,53 +1,22 @@ #[doc = "Register `TXLATECOL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `COUNT` reader - Number of frames"] -pub struct COUNT_R(crate::FieldReader); -impl COUNT_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - COUNT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for COUNT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type CountR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Number of frames"] #[inline(always)] - pub fn count(&self) -> COUNT_R { - COUNT_R::new(self.bits as u32) + pub fn count(&self) -> CountR { + CountR::new(self.bits) } } -#[doc = "MMC Number of aborted frames because of late collision error\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txlatecol](index.html) module"] -pub struct TXLATECOL_SPEC; -impl crate::RegisterSpec for TXLATECOL_SPEC { +#[doc = "MMC Number of aborted frames because of late collision error\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txlatecol::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TxlatecolSpec; +impl crate::RegisterSpec for TxlatecolSpec { type Ux = u32; } -#[doc = "`read()` method returns [txlatecol::R](R) reader structure"] -impl crate::Readable for TXLATECOL_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`txlatecol::R`](R) reader structure"] +impl crate::Readable for TxlatecolSpec {} #[doc = "`reset()` method sets TXLATECOL to value 0"] -impl crate::Resettable for TXLATECOL_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for TxlatecolSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/txmcastframe_gb.rs b/va416xx/src/eth/txmcastframe_gb.rs index cade60a..478ff2c 100644 --- a/va416xx/src/eth/txmcastframe_gb.rs +++ b/va416xx/src/eth/txmcastframe_gb.rs @@ -1,53 +1,22 @@ #[doc = "Register `TXMCASTFRAME_GB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `COUNT` reader - Number of frames"] -pub struct COUNT_R(crate::FieldReader); -impl COUNT_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - COUNT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for COUNT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type CountR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Number of frames"] #[inline(always)] - pub fn count(&self) -> COUNT_R { - COUNT_R::new(self.bits as u32) + pub fn count(&self) -> CountR { + CountR::new(self.bits) } } -#[doc = "MMC number of good and bad MULTIcast frames transmitted\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txmcastframe_gb](index.html) module"] -pub struct TXMCASTFRAME_GB_SPEC; -impl crate::RegisterSpec for TXMCASTFRAME_GB_SPEC { +#[doc = "MMC number of good and bad MULTIcast frames transmitted\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txmcastframe_gb::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TxmcastframeGbSpec; +impl crate::RegisterSpec for TxmcastframeGbSpec { type Ux = u32; } -#[doc = "`read()` method returns [txmcastframe_gb::R](R) reader structure"] -impl crate::Readable for TXMCASTFRAME_GB_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`txmcastframe_gb::R`](R) reader structure"] +impl crate::Readable for TxmcastframeGbSpec {} #[doc = "`reset()` method sets TXMCASTFRAME_GB to value 0"] -impl crate::Resettable for TXMCASTFRAME_GB_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for TxmcastframeGbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/txmcastframes_g.rs b/va416xx/src/eth/txmcastframes_g.rs index b89ba03..b165a17 100644 --- a/va416xx/src/eth/txmcastframes_g.rs +++ b/va416xx/src/eth/txmcastframes_g.rs @@ -1,53 +1,22 @@ #[doc = "Register `TXMCASTFRAMES_G` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `COUNT` reader - Number of frames"] -pub struct COUNT_R(crate::FieldReader); -impl COUNT_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - COUNT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for COUNT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type CountR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Number of frames"] #[inline(always)] - pub fn count(&self) -> COUNT_R { - COUNT_R::new(self.bits as u32) + pub fn count(&self) -> CountR { + CountR::new(self.bits) } } -#[doc = "MMC Good Multicast Frames Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txmcastframes_g](index.html) module"] -pub struct TXMCASTFRAMES_G_SPEC; -impl crate::RegisterSpec for TXMCASTFRAMES_G_SPEC { +#[doc = "MMC Good Multicast Frames Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txmcastframes_g::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TxmcastframesGSpec; +impl crate::RegisterSpec for TxmcastframesGSpec { type Ux = u32; } -#[doc = "`read()` method returns [txmcastframes_g::R](R) reader structure"] -impl crate::Readable for TXMCASTFRAMES_G_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`txmcastframes_g::R`](R) reader structure"] +impl crate::Readable for TxmcastframesGSpec {} #[doc = "`reset()` method sets TXMCASTFRAMES_G to value 0"] -impl crate::Resettable for TXMCASTFRAMES_G_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for TxmcastframesGSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/txmulticol_g.rs b/va416xx/src/eth/txmulticol_g.rs index f6e2d1d..6d1c3a3 100644 --- a/va416xx/src/eth/txmulticol_g.rs +++ b/va416xx/src/eth/txmulticol_g.rs @@ -1,53 +1,22 @@ #[doc = "Register `TXMULTICOL_G` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `COUNT` reader - Number of frames"] -pub struct COUNT_R(crate::FieldReader); -impl COUNT_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - COUNT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for COUNT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type CountR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Number of frames"] #[inline(always)] - pub fn count(&self) -> COUNT_R { - COUNT_R::new(self.bits as u32) + pub fn count(&self) -> CountR { + CountR::new(self.bits) } } -#[doc = "MMC Number of successfully transmitted frames after multiple collisions\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txmulticol_g](index.html) module"] -pub struct TXMULTICOL_G_SPEC; -impl crate::RegisterSpec for TXMULTICOL_G_SPEC { +#[doc = "MMC Number of successfully transmitted frames after multiple collisions\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txmulticol_g::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TxmulticolGSpec; +impl crate::RegisterSpec for TxmulticolGSpec { type Ux = u32; } -#[doc = "`read()` method returns [txmulticol_g::R](R) reader structure"] -impl crate::Readable for TXMULTICOL_G_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`txmulticol_g::R`](R) reader structure"] +impl crate::Readable for TxmulticolGSpec {} #[doc = "`reset()` method sets TXMULTICOL_G to value 0"] -impl crate::Resettable for TXMULTICOL_G_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for TxmulticolGSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/txoctetcount_g.rs b/va416xx/src/eth/txoctetcount_g.rs index 1931f6a..d48556e 100644 --- a/va416xx/src/eth/txoctetcount_g.rs +++ b/va416xx/src/eth/txoctetcount_g.rs @@ -1,53 +1,22 @@ #[doc = "Register `TXOCTETCOUNT_G` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `COUNT` reader - Number of bytes"] -pub struct COUNT_R(crate::FieldReader); -impl COUNT_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - COUNT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for COUNT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type CountR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Number of bytes"] #[inline(always)] - pub fn count(&self) -> COUNT_R { - COUNT_R::new(self.bits as u32) + pub fn count(&self) -> CountR { + CountR::new(self.bits) } } -#[doc = "MMC Number of bytes transmitted frames only in good frames\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txoctetcount_g](index.html) module"] -pub struct TXOCTETCOUNT_G_SPEC; -impl crate::RegisterSpec for TXOCTETCOUNT_G_SPEC { +#[doc = "MMC Number of bytes transmitted frames only in good frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txoctetcount_g::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TxoctetcountGSpec; +impl crate::RegisterSpec for TxoctetcountGSpec { type Ux = u32; } -#[doc = "`read()` method returns [txoctetcount_g::R](R) reader structure"] -impl crate::Readable for TXOCTETCOUNT_G_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`txoctetcount_g::R`](R) reader structure"] +impl crate::Readable for TxoctetcountGSpec {} #[doc = "`reset()` method sets TXOCTETCOUNT_G to value 0"] -impl crate::Resettable for TXOCTETCOUNT_G_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for TxoctetcountGSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/txoctetcount_gb.rs b/va416xx/src/eth/txoctetcount_gb.rs index 4967fa0..77d2143 100644 --- a/va416xx/src/eth/txoctetcount_gb.rs +++ b/va416xx/src/eth/txoctetcount_gb.rs @@ -1,53 +1,22 @@ #[doc = "Register `TXOCTETCOUNT_GB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `COUNT` reader - Number of bytes"] -pub struct COUNT_R(crate::FieldReader); -impl COUNT_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - COUNT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for COUNT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type CountR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Number of bytes"] #[inline(always)] - pub fn count(&self) -> COUNT_R { - COUNT_R::new(self.bits as u32) + pub fn count(&self) -> CountR { + CountR::new(self.bits) } } -#[doc = "MMC Transmit Count\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txoctetcount_gb](index.html) module"] -pub struct TXOCTETCOUNT_GB_SPEC; -impl crate::RegisterSpec for TXOCTETCOUNT_GB_SPEC { +#[doc = "MMC Transmit Count\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txoctetcount_gb::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TxoctetcountGbSpec; +impl crate::RegisterSpec for TxoctetcountGbSpec { type Ux = u32; } -#[doc = "`read()` method returns [txoctetcount_gb::R](R) reader structure"] -impl crate::Readable for TXOCTETCOUNT_GB_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`txoctetcount_gb::R`](R) reader structure"] +impl crate::Readable for TxoctetcountGbSpec {} #[doc = "`reset()` method sets TXOCTETCOUNT_GB to value 0"] -impl crate::Resettable for TXOCTETCOUNT_GB_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for TxoctetcountGbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/txoversize_g.rs b/va416xx/src/eth/txoversize_g.rs index a810b6b..df066e9 100644 --- a/va416xx/src/eth/txoversize_g.rs +++ b/va416xx/src/eth/txoversize_g.rs @@ -1,53 +1,22 @@ #[doc = "Register `TXOVERSIZE_G` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `COUNT` reader - Number of frames"] -pub struct COUNT_R(crate::FieldReader); -impl COUNT_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - COUNT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for COUNT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type CountR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Number of frames"] #[inline(always)] - pub fn count(&self) -> COUNT_R { - COUNT_R::new(self.bits as u32) + pub fn count(&self) -> CountR { + CountR::new(self.bits) } } -#[doc = "MMC Number of frames transmitted without errors\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txoversize_g](index.html) module"] -pub struct TXOVERSIZE_G_SPEC; -impl crate::RegisterSpec for TXOVERSIZE_G_SPEC { +#[doc = "MMC Number of frames transmitted without errors\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txoversize_g::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TxoversizeGSpec; +impl crate::RegisterSpec for TxoversizeGSpec { type Ux = u32; } -#[doc = "`read()` method returns [txoversize_g::R](R) reader structure"] -impl crate::Readable for TXOVERSIZE_G_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`txoversize_g::R`](R) reader structure"] +impl crate::Readable for TxoversizeGSpec {} #[doc = "`reset()` method sets TXOVERSIZE_G to value 0"] -impl crate::Resettable for TXOVERSIZE_G_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for TxoversizeGSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/txpauseframes.rs b/va416xx/src/eth/txpauseframes.rs index 79868be..e495689 100644 --- a/va416xx/src/eth/txpauseframes.rs +++ b/va416xx/src/eth/txpauseframes.rs @@ -1,53 +1,22 @@ #[doc = "Register `TXPAUSEFRAMES` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `COUNT` reader - Number of frames"] -pub struct COUNT_R(crate::FieldReader); -impl COUNT_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - COUNT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for COUNT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type CountR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Number of frames"] #[inline(always)] - pub fn count(&self) -> COUNT_R { - COUNT_R::new(self.bits as u32) + pub fn count(&self) -> CountR { + CountR::new(self.bits) } } -#[doc = "MMC Number of good pause frames transmitted\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txpauseframes](index.html) module"] -pub struct TXPAUSEFRAMES_SPEC; -impl crate::RegisterSpec for TXPAUSEFRAMES_SPEC { +#[doc = "MMC Number of good pause frames transmitted\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txpauseframes::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TxpauseframesSpec; +impl crate::RegisterSpec for TxpauseframesSpec { type Ux = u32; } -#[doc = "`read()` method returns [txpauseframes::R](R) reader structure"] -impl crate::Readable for TXPAUSEFRAMES_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`txpauseframes::R`](R) reader structure"] +impl crate::Readable for TxpauseframesSpec {} #[doc = "`reset()` method sets TXPAUSEFRAMES to value 0"] -impl crate::Resettable for TXPAUSEFRAMES_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for TxpauseframesSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/txsinglecol_g.rs b/va416xx/src/eth/txsinglecol_g.rs index 77effb1..4fc0ccf 100644 --- a/va416xx/src/eth/txsinglecol_g.rs +++ b/va416xx/src/eth/txsinglecol_g.rs @@ -1,53 +1,22 @@ #[doc = "Register `TXSINGLECOL_G` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `COUNT` reader - Number of frames"] -pub struct COUNT_R(crate::FieldReader); -impl COUNT_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - COUNT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for COUNT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type CountR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Number of frames"] #[inline(always)] - pub fn count(&self) -> COUNT_R { - COUNT_R::new(self.bits as u32) + pub fn count(&self) -> CountR { + CountR::new(self.bits) } } -#[doc = "MMC Number of successfully transmitted frames after a single collision\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txsinglecol_g](index.html) module"] -pub struct TXSINGLECOL_G_SPEC; -impl crate::RegisterSpec for TXSINGLECOL_G_SPEC { +#[doc = "MMC Number of successfully transmitted frames after a single collision\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txsinglecol_g::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TxsinglecolGSpec; +impl crate::RegisterSpec for TxsinglecolGSpec { type Ux = u32; } -#[doc = "`read()` method returns [txsinglecol_g::R](R) reader structure"] -impl crate::Readable for TXSINGLECOL_G_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`txsinglecol_g::R`](R) reader structure"] +impl crate::Readable for TxsinglecolGSpec {} #[doc = "`reset()` method sets TXSINGLECOL_G to value 0"] -impl crate::Resettable for TXSINGLECOL_G_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for TxsinglecolGSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/txucastframe_gb.rs b/va416xx/src/eth/txucastframe_gb.rs index 2802106..951c3d9 100644 --- a/va416xx/src/eth/txucastframe_gb.rs +++ b/va416xx/src/eth/txucastframe_gb.rs @@ -1,53 +1,22 @@ #[doc = "Register `TXUCASTFRAME_GB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `COUNT` reader - Number of frames"] -pub struct COUNT_R(crate::FieldReader); -impl COUNT_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - COUNT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for COUNT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type CountR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Number of frames"] #[inline(always)] - pub fn count(&self) -> COUNT_R { - COUNT_R::new(self.bits as u32) + pub fn count(&self) -> CountR { + CountR::new(self.bits) } } -#[doc = "MMC number of good and bad unicast frames transmitted\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txucastframe_gb](index.html) module"] -pub struct TXUCASTFRAME_GB_SPEC; -impl crate::RegisterSpec for TXUCASTFRAME_GB_SPEC { +#[doc = "MMC number of good and bad unicast frames transmitted\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txucastframe_gb::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TxucastframeGbSpec; +impl crate::RegisterSpec for TxucastframeGbSpec { type Ux = u32; } -#[doc = "`read()` method returns [txucastframe_gb::R](R) reader structure"] -impl crate::Readable for TXUCASTFRAME_GB_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`txucastframe_gb::R`](R) reader structure"] +impl crate::Readable for TxucastframeGbSpec {} #[doc = "`reset()` method sets TXUCASTFRAME_GB to value 0"] -impl crate::Resettable for TXUCASTFRAME_GB_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for TxucastframeGbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/txundererr.rs b/va416xx/src/eth/txundererr.rs index 7642999..03d9c8f 100644 --- a/va416xx/src/eth/txundererr.rs +++ b/va416xx/src/eth/txundererr.rs @@ -1,53 +1,22 @@ #[doc = "Register `TXUNDERERR` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `COUNT` reader - Number of frames"] -pub struct COUNT_R(crate::FieldReader); -impl COUNT_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - COUNT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for COUNT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type CountR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Number of frames"] #[inline(always)] - pub fn count(&self) -> COUNT_R { - COUNT_R::new(self.bits as u32) + pub fn count(&self) -> CountR { + CountR::new(self.bits) } } -#[doc = "MMC number of frames aborted because of frame underflow error\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txundererr](index.html) module"] -pub struct TXUNDERERR_SPEC; -impl crate::RegisterSpec for TXUNDERERR_SPEC { +#[doc = "MMC number of frames aborted because of frame underflow error\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txundererr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TxundererrSpec; +impl crate::RegisterSpec for TxundererrSpec { type Ux = u32; } -#[doc = "`read()` method returns [txundererr::R](R) reader structure"] -impl crate::Readable for TXUNDERERR_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`txundererr::R`](R) reader structure"] +impl crate::Readable for TxundererrSpec {} #[doc = "`reset()` method sets TXUNDERERR to value 0"] -impl crate::Resettable for TXUNDERERR_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for TxundererrSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/vlan_hashtable.rs b/va416xx/src/eth/vlan_hashtable.rs index 9dc2ee4..f6166d5 100644 --- a/va416xx/src/eth/vlan_hashtable.rs +++ b/va416xx/src/eth/vlan_hashtable.rs @@ -1,103 +1,40 @@ #[doc = "Register `VLAN_HASHTABLE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `VLAN_HASHTABLE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `VLHT` reader - VLAN Hash Table"] -pub struct VLHT_R(crate::FieldReader); -impl VLHT_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - VLHT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for VLHT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type VlhtR = crate::FieldReader; #[doc = "Field `VLHT` writer - VLAN Hash Table"] -pub struct VLHT_W<'a> { - w: &'a mut W, -} -impl<'a> VLHT_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); - self.w - } -} +pub type VlhtW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - VLAN Hash Table"] #[inline(always)] - pub fn vlht(&self) -> VLHT_R { - VLHT_R::new((self.bits & 0xffff) as u16) + pub fn vlht(&self) -> VlhtR { + VlhtR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - VLAN Hash Table"] #[inline(always)] - pub fn vlht(&mut self) -> VLHT_W { - VLHT_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn vlht(&mut self) -> VlhtW { + VlhtW::new(self, 0) } } -#[doc = "Holds the VLAN Hash Table\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [vlan_hashtable](index.html) module"] -pub struct VLAN_HASHTABLE_SPEC; -impl crate::RegisterSpec for VLAN_HASHTABLE_SPEC { +#[doc = "Holds the VLAN Hash Table\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`vlan_hashtable::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`vlan_hashtable::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct VlanHashtableSpec; +impl crate::RegisterSpec for VlanHashtableSpec { type Ux = u32; } -#[doc = "`read()` method returns [vlan_hashtable::R](R) reader structure"] -impl crate::Readable for VLAN_HASHTABLE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [vlan_hashtable::W](W) writer structure"] -impl crate::Writable for VLAN_HASHTABLE_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`vlan_hashtable::R`](R) reader structure"] +impl crate::Readable for VlanHashtableSpec {} +#[doc = "`write(|w| ..)` method takes [`vlan_hashtable::W`](W) writer structure"] +impl crate::Writable for VlanHashtableSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets VLAN_HASHTABLE to value 0"] -impl crate::Resettable for VLAN_HASHTABLE_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for VlanHashtableSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/eth/vlan_increplace.rs b/va416xx/src/eth/vlan_increplace.rs index 45a45c2..d733b5a 100644 --- a/va416xx/src/eth/vlan_increplace.rs +++ b/va416xx/src/eth/vlan_increplace.rs @@ -1,234 +1,85 @@ #[doc = "Register `VLAN_INCREPLACE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `VLAN_INCREPLACE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `CSVL` reader - C-VLAN or S-VLAN"] -pub struct CSVL_R(crate::FieldReader); -impl CSVL_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CSVL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CSVL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CSVL` writer - C-VLAN or S-VLAN"] -pub struct CSVL_W<'a> { - w: &'a mut W, -} -impl<'a> CSVL_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 19)) | ((value as u32 & 0x01) << 19); - self.w - } -} -#[doc = "Field `VLP` reader - VLAN Priority Control"] -pub struct VLP_R(crate::FieldReader); -impl VLP_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - VLP_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for VLP_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `VLP` writer - VLAN Priority Control"] -pub struct VLP_W<'a> { - w: &'a mut W, -} -impl<'a> VLP_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 18)) | ((value as u32 & 0x01) << 18); - self.w - } -} -#[doc = "Field `VLC` reader - VLAN Tag Control in Transmit Frames"] -pub struct VLC_R(crate::FieldReader); -impl VLC_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - VLC_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for VLC_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `VLC` writer - VLAN Tag Control in Transmit Frames"] -pub struct VLC_W<'a> { - w: &'a mut W, -} -impl<'a> VLC_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x03 << 16)) | ((value as u32 & 0x03) << 16); - self.w - } -} +pub type W = crate::W; #[doc = "Field `VLT` reader - VLAN Tag for Transmit Frames"] -pub struct VLT_R(crate::FieldReader); -impl VLT_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - VLT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for VLT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type VltR = crate::FieldReader; #[doc = "Field `VLT` writer - VLAN Tag for Transmit Frames"] -pub struct VLT_W<'a> { - w: &'a mut W, -} -impl<'a> VLT_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); - self.w - } -} +pub type VltW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +#[doc = "Field `VLC` reader - VLAN Tag Control in Transmit Frames"] +pub type VlcR = crate::FieldReader; +#[doc = "Field `VLC` writer - VLAN Tag Control in Transmit Frames"] +pub type VlcW<'a, REG> = crate::FieldWriter<'a, REG, 2>; +#[doc = "Field `VLP` reader - VLAN Priority Control"] +pub type VlpR = crate::BitReader; +#[doc = "Field `VLP` writer - VLAN Priority Control"] +pub type VlpW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `CSVL` reader - C-VLAN or S-VLAN"] +pub type CsvlR = crate::BitReader; +#[doc = "Field `CSVL` writer - C-VLAN or S-VLAN"] +pub type CsvlW<'a, REG> = crate::BitWriter<'a, REG>; impl R { - #[doc = "Bit 19 - C-VLAN or S-VLAN"] + #[doc = "Bits 0:15 - VLAN Tag for Transmit Frames"] #[inline(always)] - pub fn csvl(&self) -> CSVL_R { - CSVL_R::new(((self.bits >> 19) & 0x01) != 0) - } - #[doc = "Bit 18 - VLAN Priority Control"] - #[inline(always)] - pub fn vlp(&self) -> VLP_R { - VLP_R::new(((self.bits >> 18) & 0x01) != 0) + pub fn vlt(&self) -> VltR { + VltR::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:17 - VLAN Tag Control in Transmit Frames"] #[inline(always)] - pub fn vlc(&self) -> VLC_R { - VLC_R::new(((self.bits >> 16) & 0x03) as u8) + pub fn vlc(&self) -> VlcR { + VlcR::new(((self.bits >> 16) & 3) as u8) } - #[doc = "Bits 0:15 - VLAN Tag for Transmit Frames"] + #[doc = "Bit 18 - VLAN Priority Control"] #[inline(always)] - pub fn vlt(&self) -> VLT_R { - VLT_R::new((self.bits & 0xffff) as u16) + pub fn vlp(&self) -> VlpR { + VlpR::new(((self.bits >> 18) & 1) != 0) + } + #[doc = "Bit 19 - C-VLAN or S-VLAN"] + #[inline(always)] + pub fn csvl(&self) -> CsvlR { + CsvlR::new(((self.bits >> 19) & 1) != 0) } } impl W { - #[doc = "Bit 19 - C-VLAN or S-VLAN"] + #[doc = "Bits 0:15 - VLAN Tag for Transmit Frames"] #[inline(always)] - pub fn csvl(&mut self) -> CSVL_W { - CSVL_W { w: self } - } - #[doc = "Bit 18 - VLAN Priority Control"] - #[inline(always)] - pub fn vlp(&mut self) -> VLP_W { - VLP_W { w: self } + #[must_use] + pub fn vlt(&mut self) -> VltW { + VltW::new(self, 0) } #[doc = "Bits 16:17 - VLAN Tag Control in Transmit Frames"] #[inline(always)] - pub fn vlc(&mut self) -> VLC_W { - VLC_W { w: self } + #[must_use] + pub fn vlc(&mut self) -> VlcW { + VlcW::new(self, 16) } - #[doc = "Bits 0:15 - VLAN Tag for Transmit Frames"] + #[doc = "Bit 18 - VLAN Priority Control"] #[inline(always)] - pub fn vlt(&mut self) -> VLT_W { - VLT_W { w: self } + #[must_use] + pub fn vlp(&mut self) -> VlpW { + VlpW::new(self, 18) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bit 19 - C-VLAN or S-VLAN"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn csvl(&mut self) -> CsvlW { + CsvlW::new(self, 19) } } -#[doc = "Holds the VLAN Tag for insertion into or replacement in the transmit frames\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [vlan_increplace](index.html) module"] -pub struct VLAN_INCREPLACE_SPEC; -impl crate::RegisterSpec for VLAN_INCREPLACE_SPEC { +#[doc = "Holds the VLAN Tag for insertion into or replacement in the transmit frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`vlan_increplace::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`vlan_increplace::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct VlanIncreplaceSpec; +impl crate::RegisterSpec for VlanIncreplaceSpec { type Ux = u32; } -#[doc = "`read()` method returns [vlan_increplace::R](R) reader structure"] -impl crate::Readable for VLAN_INCREPLACE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [vlan_increplace::W](W) writer structure"] -impl crate::Writable for VLAN_INCREPLACE_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`vlan_increplace::R`](R) reader structure"] +impl crate::Readable for VlanIncreplaceSpec {} +#[doc = "`write(|w| ..)` method takes [`vlan_increplace::W`](W) writer structure"] +impl crate::Writable for VlanIncreplaceSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets VLAN_INCREPLACE to value 0"] -impl crate::Resettable for VLAN_INCREPLACE_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for VlanIncreplaceSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/generic.rs b/va416xx/src/generic.rs index 7615964..45ebed1 100644 --- a/va416xx/src/generic.rs +++ b/va416xx/src/generic.rs @@ -1,24 +1,73 @@ use core::marker; +#[doc = " Raw register type (`u8`, `u16`, `u32`, ...)"] +pub trait RawReg: + Copy + + Default + + From + + core::ops::BitOr + + core::ops::BitAnd + + core::ops::BitOrAssign + + core::ops::BitAndAssign + + core::ops::Not + + core::ops::Shl +{ + #[doc = " Mask for bits of width `WI`"] + fn mask() -> Self; + #[doc = " Mask for bits of width 1"] + fn one() -> Self; +} +macro_rules! raw_reg { + ($ U : ty , $ size : literal , $ mask : ident) => { + impl RawReg for $U { + #[inline(always)] + fn mask() -> Self { + $mask::() + } + #[inline(always)] + fn one() -> Self { + 1 + } + } + const fn $mask() -> $U { + <$U>::MAX >> ($size - WI) + } + impl FieldSpec for $U { + type Ux = $U; + } + }; +} +raw_reg!(u8, 8, mask_u8); +raw_reg!(u16, 16, mask_u16); +raw_reg!(u32, 32, mask_u32); +raw_reg!(u64, 64, mask_u64); #[doc = " Raw register type"] pub trait RegisterSpec { #[doc = " Raw register type (`u8`, `u16`, `u32`, ...)."] - type Ux: Copy; + type Ux: RawReg; } +#[doc = " Raw field type"] +pub trait FieldSpec: Sized { + #[doc = " Raw field type (`u8`, `u16`, `u32`, ...)."] + type Ux: Copy + core::fmt::Debug + PartialEq + From; +} +#[doc = " Marker for fields with fixed values"] +pub trait IsEnum: FieldSpec {} #[doc = " Trait implemented by readable registers to enable the `read` method."] #[doc = ""] -#[doc = " Registers marked with `Writable` can be also `modify`'ed."] -pub trait Readable: RegisterSpec { - #[doc = " Result from a call to `read` and argument to `modify`."] - type Reader: From> + core::ops::Deref>; -} +#[doc = " Registers marked with `Writable` can be also be `modify`'ed."] +pub trait Readable: RegisterSpec {} #[doc = " Trait implemented by writeable registers."] #[doc = ""] #[doc = " This enables the `write`, `write_with_zero` and `reset` methods."] #[doc = ""] -#[doc = " Registers marked with `Readable` can be also `modify`'ed."] +#[doc = " Registers marked with `Readable` can be also be `modify`'ed."] pub trait Writable: RegisterSpec { - #[doc = " Writer type argument to `write`, et al."] - type Writer: From> + core::ops::DerefMut>; + #[doc = " Is it safe to write any bits to register"] + type Safety; + #[doc = " Specifies the register bits that are not changed if you pass `1` and are changed if you pass `0`"] + const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux; + #[doc = " Specifies the register bits that are not changed if you pass `0` and are changed if you pass `1`"] + const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux; } #[doc = " Reset value of the register."] #[doc = ""] @@ -26,7 +75,12 @@ pub trait Writable: RegisterSpec { #[doc = " register by using the `reset` method."] pub trait Resettable: RegisterSpec { #[doc = " Reset value of the register."] - fn reset_value() -> Self::Ux; + const RESET_VALUE: Self::Ux; + #[doc = " Reset value of the register."] + #[inline(always)] + fn reset_value() -> Self::Ux { + Self::RESET_VALUE + } } #[doc = " This structure provides volatile access to registers."] #[repr(transparent)] @@ -60,11 +114,11 @@ impl Reg { #[doc = " let flag = reader.field2().bit_is_set();"] #[doc = " ```"] #[inline(always)] - pub fn read(&self) -> REG::Reader { - REG::Reader::from(R { + pub fn read(&self) -> R { + R { bits: self.register.get(), _reg: marker::PhantomData, - }) + } } } impl Reg { @@ -73,7 +127,7 @@ impl Reg { #[doc = " Resets the register to its initial state."] #[inline(always)] pub fn reset(&self) { - self.register.set(REG::reset_value()) + self.register.set(REG::RESET_VALUE) } #[doc = " Writes bits to a `Writable` register."] #[doc = ""] @@ -89,38 +143,48 @@ impl Reg { #[doc = " .field3().variant(VARIANT)"] #[doc = " );"] #[doc = " ```"] + #[doc = " or an alternative way of saying the same:"] + #[doc = " ```ignore"] + #[doc = " periph.reg.write(|w| {"] + #[doc = " w.field1().bits(newfield1bits);"] + #[doc = " w.field2().set_bit();"] + #[doc = " w.field3().variant(VARIANT)"] + #[doc = " });"] + #[doc = " ```"] #[doc = " In the latter case, other fields will be set to their reset value."] #[inline(always)] pub fn write(&self, f: F) where - F: FnOnce(&mut REG::Writer) -> &mut W, + F: FnOnce(&mut W) -> &mut W, { self.register.set( - f(&mut REG::Writer::from(W { - bits: REG::reset_value(), + f(&mut W { + bits: REG::RESET_VALUE & !REG::ONE_TO_MODIFY_FIELDS_BITMAP + | REG::ZERO_TO_MODIFY_FIELDS_BITMAP, _reg: marker::PhantomData, - })) + }) .bits, ); } } -impl Reg -where - REG::Ux: Default, -{ +impl Reg { #[doc = " Writes 0 to a `Writable` register."] #[doc = ""] #[doc = " Similar to `write`, but unused bits will contain 0."] + #[doc = ""] + #[doc = " # Safety"] + #[doc = ""] + #[doc = " Unsafe to use with registers which don't allow to write 0."] #[inline(always)] pub unsafe fn write_with_zero(&self, f: F) where - F: FnOnce(&mut REG::Writer) -> &mut W, + F: FnOnce(&mut W) -> &mut W, { self.register.set( - (*f(&mut REG::Writer::from(W { + f(&mut W { bits: REG::Ux::default(), _reg: marker::PhantomData, - }))) + }) .bits, ); } @@ -142,119 +206,413 @@ impl Reg { #[doc = " .field3().variant(VARIANT)"] #[doc = " );"] #[doc = " ```"] + #[doc = " or an alternative way of saying the same:"] + #[doc = " ```ignore"] + #[doc = " periph.reg.modify(|_, w| {"] + #[doc = " w.field1().bits(newfield1bits);"] + #[doc = " w.field2().set_bit();"] + #[doc = " w.field3().variant(VARIANT)"] + #[doc = " });"] + #[doc = " ```"] #[doc = " Other fields will have the value they had before the call to `modify`."] #[inline(always)] pub fn modify(&self, f: F) where - for<'w> F: FnOnce(®::Reader, &'w mut REG::Writer) -> &'w mut W, + for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, { let bits = self.register.get(); self.register.set( f( - ®::Reader::from(R { + &R { bits, _reg: marker::PhantomData, - }), - &mut REG::Writer::from(W { - bits, + }, + &mut W { + bits: bits & !REG::ONE_TO_MODIFY_FIELDS_BITMAP + | REG::ZERO_TO_MODIFY_FIELDS_BITMAP, _reg: marker::PhantomData, - }), + }, ) .bits, ); } } +impl core::fmt::Debug for crate::generic::Reg +where + R: core::fmt::Debug, +{ + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { + core::fmt::Debug::fmt(&self.read(), f) + } +} +#[doc(hidden)] +pub mod raw; #[doc = " Register reader."] #[doc = ""] #[doc = " Result of the `read` methods of registers. Also used as a closure argument in the `modify`"] #[doc = " method."] -pub struct R { - pub(crate) bits: REG::Ux, - _reg: marker::PhantomData, -} +pub type R = raw::R; impl R { #[doc = " Reads raw bits from register."] #[inline(always)] - pub fn bits(&self) -> REG::Ux { + pub const fn bits(&self) -> REG::Ux { self.bits } } impl PartialEq for R where REG::Ux: PartialEq, - FI: Copy + Into, + FI: Copy, + REG::Ux: From, { #[inline(always)] fn eq(&self, other: &FI) -> bool { - self.bits.eq(&(*other).into()) + self.bits.eq(®::Ux::from(*other)) } } #[doc = " Register writer."] #[doc = ""] #[doc = " Used as an argument to the closures in the `write` and `modify` methods of the register."] -pub struct W { - #[doc = "Writable bits"] - pub(crate) bits: REG::Ux, - _reg: marker::PhantomData, -} -impl W { +pub type W = raw::W; +impl W { #[doc = " Writes raw bits to the register."] + #[doc = ""] + #[doc = " # Safety"] + #[doc = ""] + #[doc = " Passing incorrect value can cause undefined behaviour. See reference manual"] #[inline(always)] pub unsafe fn bits(&mut self, bits: REG::Ux) -> &mut Self { self.bits = bits; self } } +impl W +where + REG: Writable, +{ + #[doc = " Writes raw bits to the register."] + #[inline(always)] + pub fn set(&mut self, bits: REG::Ux) -> &mut Self { + self.bits = bits; + self + } +} #[doc = " Field reader."] #[doc = ""] #[doc = " Result of the `read` methods of fields."] -pub struct FieldReader { - pub(crate) bits: U, - _reg: marker::PhantomData, -} -impl FieldReader -where - U: Copy, -{ - #[doc = " Creates a new instance of the reader."] - #[allow(unused)] - #[inline(always)] - pub(crate) fn new(bits: U) -> Self { - Self { - bits, - _reg: marker::PhantomData, - } - } +pub type FieldReader = raw::FieldReader; +#[doc = " Bit-wise field reader"] +pub type BitReader = raw::BitReader; +impl FieldReader { #[doc = " Reads raw bits from field."] #[inline(always)] - pub fn bits(&self) -> U { + pub const fn bits(&self) -> FI::Ux { self.bits } } -impl PartialEq for FieldReader +impl core::fmt::Debug for FieldReader { + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { + core::fmt::Debug::fmt(&self.bits, f) + } +} +impl PartialEq for FieldReader where - U: PartialEq, - FI: Copy + Into, + FI: FieldSpec + Copy, { #[inline(always)] fn eq(&self, other: &FI) -> bool { - self.bits.eq(&(*other).into()) + self.bits.eq(&FI::Ux::from(*other)) } } -impl FieldReader { +impl PartialEq for BitReader +where + FI: Copy, + bool: From, +{ + #[inline(always)] + fn eq(&self, other: &FI) -> bool { + self.bits.eq(&bool::from(*other)) + } +} +impl BitReader { #[doc = " Value of the field as raw bits."] #[inline(always)] - pub fn bit(&self) -> bool { + pub const fn bit(&self) -> bool { self.bits } #[doc = " Returns `true` if the bit is clear (0)."] #[inline(always)] - pub fn bit_is_clear(&self) -> bool { + pub const fn bit_is_clear(&self) -> bool { !self.bit() } #[doc = " Returns `true` if the bit is set (1)."] #[inline(always)] - pub fn bit_is_set(&self) -> bool { + pub const fn bit_is_set(&self) -> bool { self.bit() } } +impl core::fmt::Debug for BitReader { + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { + core::fmt::Debug::fmt(&self.bits, f) + } +} +#[doc = " Marker for register/field writers which can take any value of specified width"] +pub struct Safe; +#[doc = " You should check that value is allowed to pass to register/field writer marked with this"] +pub struct Unsafe; +#[doc = " Marker for field writers are safe to write in specified inclusive range"] +pub struct Range; +#[doc = " Marker for field writers are safe to write in specified inclusive range"] +pub struct RangeFrom; +#[doc = " Marker for field writers are safe to write in specified inclusive range"] +pub struct RangeTo; +#[doc = " Write field Proxy"] +pub type FieldWriter<'a, REG, const WI: u8, FI = u8, Safety = Unsafe> = + raw::FieldWriter<'a, REG, WI, FI, Safety>; +impl<'a, REG, const WI: u8, FI, Safety> FieldWriter<'a, REG, WI, FI, Safety> +where + REG: Writable + RegisterSpec, + FI: FieldSpec, +{ + #[doc = " Field width"] + pub const WIDTH: u8 = WI; + #[doc = " Field width"] + #[inline(always)] + pub const fn width(&self) -> u8 { + WI + } + #[doc = " Field offset"] + #[inline(always)] + pub const fn offset(&self) -> u8 { + self.o + } +} +impl<'a, REG, const WI: u8, FI, Safety> FieldWriter<'a, REG, WI, FI, Safety> +where + REG: Writable + RegisterSpec, + FI: FieldSpec, + REG::Ux: From, +{ + #[doc = " Writes raw bits to the field"] + #[doc = ""] + #[doc = " # Safety"] + #[doc = ""] + #[doc = " Passing incorrect value can cause undefined behaviour. See reference manual"] + #[inline(always)] + pub unsafe fn bits(self, value: FI::Ux) -> &'a mut W { + self.w.bits &= !(REG::Ux::mask::() << self.o); + self.w.bits |= (REG::Ux::from(value) & REG::Ux::mask::()) << self.o; + self.w + } +} +impl<'a, REG, const WI: u8, FI> FieldWriter<'a, REG, WI, FI, Safe> +where + REG: Writable + RegisterSpec, + FI: FieldSpec, + REG::Ux: From, +{ + #[doc = " Writes raw bits to the field"] + #[inline(always)] + pub fn set(self, value: FI::Ux) -> &'a mut W { + unsafe { self.bits(value) } + } +} +impl<'a, REG, const WI: u8, FI, const MIN: u64, const MAX: u64> + FieldWriter<'a, REG, WI, FI, Range> +where + REG: Writable + RegisterSpec, + FI: FieldSpec, + REG::Ux: From, + u64: From, +{ + #[doc = " Writes raw bits to the field"] + #[inline(always)] + pub fn set(self, value: FI::Ux) -> &'a mut W { + { + let value = u64::from(value); + assert!(value >= MIN && value <= MAX); + } + unsafe { self.bits(value) } + } +} +impl<'a, REG, const WI: u8, FI, const MIN: u64> FieldWriter<'a, REG, WI, FI, RangeFrom> +where + REG: Writable + RegisterSpec, + FI: FieldSpec, + REG::Ux: From, + u64: From, +{ + #[doc = " Writes raw bits to the field"] + #[inline(always)] + pub fn set(self, value: FI::Ux) -> &'a mut W { + { + let value = u64::from(value); + assert!(value >= MIN); + } + unsafe { self.bits(value) } + } +} +impl<'a, REG, const WI: u8, FI, const MAX: u64> FieldWriter<'a, REG, WI, FI, RangeTo> +where + REG: Writable + RegisterSpec, + FI: FieldSpec, + REG::Ux: From, + u64: From, +{ + #[doc = " Writes raw bits to the field"] + #[inline(always)] + pub fn set(self, value: FI::Ux) -> &'a mut W { + { + let value = u64::from(value); + assert!(value <= MAX); + } + unsafe { self.bits(value) } + } +} +impl<'a, REG, const WI: u8, FI, Safety> FieldWriter<'a, REG, WI, FI, Safety> +where + REG: Writable + RegisterSpec, + FI: IsEnum, + REG::Ux: From, +{ + #[doc = " Writes `variant` to the field"] + #[inline(always)] + pub fn variant(self, variant: FI) -> &'a mut W { + unsafe { self.bits(FI::Ux::from(variant)) } + } +} +macro_rules! bit_proxy { + ($ writer : ident , $ mwv : ident) => { + #[doc(hidden)] + pub struct $mwv; + #[doc = " Bit-wise write field proxy"] + pub type $writer<'a, REG, FI = bool> = raw::BitWriter<'a, REG, FI, $mwv>; + impl<'a, REG, FI> $writer<'a, REG, FI> + where + REG: Writable + RegisterSpec, + bool: From, + { + #[doc = " Field width"] + pub const WIDTH: u8 = 1; + #[doc = " Field width"] + #[inline(always)] + pub const fn width(&self) -> u8 { + Self::WIDTH + } + #[doc = " Field offset"] + #[inline(always)] + pub const fn offset(&self) -> u8 { + self.o + } + #[doc = " Writes bit to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits &= !(REG::Ux::one() << self.o); + self.w.bits |= (REG::Ux::from(value) & REG::Ux::one()) << self.o; + self.w + } + #[doc = " Writes `variant` to the field"] + #[inline(always)] + pub fn variant(self, variant: FI) -> &'a mut W { + self.bit(bool::from(variant)) + } + } + }; +} +bit_proxy!(BitWriter, BitM); +bit_proxy!(BitWriter1S, Bit1S); +bit_proxy!(BitWriter0C, Bit0C); +bit_proxy!(BitWriter1C, Bit1C); +bit_proxy!(BitWriter0S, Bit0S); +bit_proxy!(BitWriter1T, Bit1T); +bit_proxy!(BitWriter0T, Bit0T); +impl<'a, REG, FI> BitWriter<'a, REG, FI> +where + REG: Writable + RegisterSpec, + bool: From, +{ + #[doc = " Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.w.bits |= REG::Ux::one() << self.o; + self.w + } + #[doc = " Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.w.bits &= !(REG::Ux::one() << self.o); + self.w + } +} +impl<'a, REG, FI> BitWriter1S<'a, REG, FI> +where + REG: Writable + RegisterSpec, + bool: From, +{ + #[doc = " Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.w.bits |= REG::Ux::one() << self.o; + self.w + } +} +impl<'a, REG, FI> BitWriter0C<'a, REG, FI> +where + REG: Writable + RegisterSpec, + bool: From, +{ + #[doc = " Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.w.bits &= !(REG::Ux::one() << self.o); + self.w + } +} +impl<'a, REG, FI> BitWriter1C<'a, REG, FI> +where + REG: Writable + RegisterSpec, + bool: From, +{ + #[doc = "Clears the field bit by passing one"] + #[inline(always)] + pub fn clear_bit_by_one(self) -> &'a mut W { + self.w.bits |= REG::Ux::one() << self.o; + self.w + } +} +impl<'a, REG, FI> BitWriter0S<'a, REG, FI> +where + REG: Writable + RegisterSpec, + bool: From, +{ + #[doc = "Sets the field bit by passing zero"] + #[inline(always)] + pub fn set_bit_by_zero(self) -> &'a mut W { + self.w.bits &= !(REG::Ux::one() << self.o); + self.w + } +} +impl<'a, REG, FI> BitWriter1T<'a, REG, FI> +where + REG: Writable + RegisterSpec, + bool: From, +{ + #[doc = "Toggle the field bit by passing one"] + #[inline(always)] + pub fn toggle_bit(self) -> &'a mut W { + self.w.bits |= REG::Ux::one() << self.o; + self.w + } +} +impl<'a, REG, FI> BitWriter0T<'a, REG, FI> +where + REG: Writable + RegisterSpec, + bool: From, +{ + #[doc = "Toggle the field bit by passing zero"] + #[inline(always)] + pub fn toggle_bit(self) -> &'a mut W { + self.w.bits &= !(REG::Ux::one() << self.o); + self.w + } +} diff --git a/va416xx/src/generic/raw.rs b/va416xx/src/generic/raw.rs new file mode 100644 index 0000000..81f5779 --- /dev/null +++ b/va416xx/src/generic/raw.rs @@ -0,0 +1,93 @@ +use super::{marker, BitM, FieldSpec, RegisterSpec, Unsafe, Writable}; +pub struct R { + pub(crate) bits: REG::Ux, + pub(super) _reg: marker::PhantomData, +} +pub struct W { + #[doc = "Writable bits"] + pub(crate) bits: REG::Ux, + pub(super) _reg: marker::PhantomData, +} +pub struct FieldReader +where + FI: FieldSpec, +{ + pub(crate) bits: FI::Ux, + _reg: marker::PhantomData, +} +impl FieldReader { + #[doc = " Creates a new instance of the reader."] + #[allow(unused)] + #[inline(always)] + pub(crate) const fn new(bits: FI::Ux) -> Self { + Self { + bits, + _reg: marker::PhantomData, + } + } +} +pub struct BitReader { + pub(crate) bits: bool, + _reg: marker::PhantomData, +} +impl BitReader { + #[doc = " Creates a new instance of the reader."] + #[allow(unused)] + #[inline(always)] + pub(crate) const fn new(bits: bool) -> Self { + Self { + bits, + _reg: marker::PhantomData, + } + } +} +pub struct FieldWriter<'a, REG, const WI: u8, FI = u8, Safety = Unsafe> +where + REG: Writable + RegisterSpec, + FI: FieldSpec, +{ + pub(crate) w: &'a mut W, + pub(crate) o: u8, + _field: marker::PhantomData<(FI, Safety)>, +} +impl<'a, REG, const WI: u8, FI, Safety> FieldWriter<'a, REG, WI, FI, Safety> +where + REG: Writable + RegisterSpec, + FI: FieldSpec, +{ + #[doc = " Creates a new instance of the writer"] + #[allow(unused)] + #[inline(always)] + pub(crate) fn new(w: &'a mut W, o: u8) -> Self { + Self { + w, + o, + _field: marker::PhantomData, + } + } +} +pub struct BitWriter<'a, REG, FI = bool, M = BitM> +where + REG: Writable + RegisterSpec, + bool: From, +{ + pub(crate) w: &'a mut W, + pub(crate) o: u8, + _field: marker::PhantomData<(FI, M)>, +} +impl<'a, REG, FI, M> BitWriter<'a, REG, FI, M> +where + REG: Writable + RegisterSpec, + bool: From, +{ + #[doc = " Creates a new instance of the writer"] + #[allow(unused)] + #[inline(always)] + pub(crate) fn new(w: &'a mut W, o: u8) -> Self { + Self { + w, + o, + _field: marker::PhantomData, + } + } +} diff --git a/va416xx/src/i2c0.rs b/va416xx/src/i2c0.rs index 57f5c7f..2492ae0 100644 --- a/va416xx/src/i2c0.rs +++ b/va416xx/src/i2c0.rs @@ -1,240 +1,452 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - #[doc = "0x00 - Control Register"] - pub ctrl: crate::Reg, - #[doc = "0x04 - Clock Scale divide value"] - pub clkscale: crate::Reg, - #[doc = "0x08 - Word Count value"] - pub words: crate::Reg, - #[doc = "0x0c - I2C Address value"] - pub address: crate::Reg, - #[doc = "0x10 - Data Input/Output"] - pub data: crate::Reg, - #[doc = "0x14 - Command Register"] - pub cmd: crate::Reg, - #[doc = "0x18 - I2C Controller Status Register"] - pub status: crate::Reg, - #[doc = "0x1c - Internal STATE of I2C Master Controller"] - pub state: crate::Reg, - #[doc = "0x20 - TX Count Register"] - pub txcount: crate::Reg, - #[doc = "0x24 - RX Count Register"] - pub rxcount: crate::Reg, - #[doc = "0x28 - Interrupt Enable Register"] - pub irq_enb: crate::Reg, - #[doc = "0x2c - Raw Interrupt Status Register"] - pub irq_raw: crate::Reg, - #[doc = "0x30 - Enabled Interrupt Status Register"] - pub irq_end: crate::Reg, - #[doc = "0x34 - Clear Interrupt Status Register"] - pub irq_clr: crate::Reg, - #[doc = "0x38 - Rx FIFO IRQ Trigger Level"] - pub rxfifoirqtrg: crate::Reg, - #[doc = "0x3c - Tx FIFO IRQ Trigger Level"] - pub txfifoirqtrg: crate::Reg, - #[doc = "0x40 - Clear FIFO Register"] - pub fifo_clr: crate::Reg, - #[doc = "0x44 - Timing Config Register"] - pub tmconfig: crate::Reg, - #[doc = "0x48 - Clock Low Timeout Limit Register"] - pub clktolimit: crate::Reg, + ctrl: Ctrl, + clkscale: Clkscale, + words: Words, + address: Address, + data: Data, + cmd: Cmd, + status: Status, + state: State, + txcount: Txcount, + rxcount: Rxcount, + irq_enb: IrqEnb, + irq_raw: IrqRaw, + irq_end: IrqEnd, + irq_clr: IrqClr, + rxfifoirqtrg: Rxfifoirqtrg, + txfifoirqtrg: Txfifoirqtrg, + fifo_clr: FifoClr, + tmconfig: Tmconfig, + clktolimit: Clktolimit, _reserved19: [u8; 0xb4], - #[doc = "0x100 - Slave Control Register"] - pub s0_ctrl: crate::Reg, - #[doc = "0x104 - Slave MaxWords Register"] - pub s0_maxwords: crate::Reg, - #[doc = "0x108 - Slave I2C Address Value"] - pub s0_address: crate::Reg, - #[doc = "0x10c - Slave I2C Address Mask value"] - pub s0_addressmask: crate::Reg, - #[doc = "0x110 - Slave Data Input/Output"] - pub s0_data: crate::Reg, - #[doc = "0x114 - Slave I2C Last Address value"] - pub s0_lastaddress: crate::Reg, - #[doc = "0x118 - Slave I2C Controller Status Register"] - pub s0_status: crate::Reg, - #[doc = "0x11c - Internal STATE of I2C Slave Controller"] - pub s0_state: crate::Reg, - #[doc = "0x120 - Slave TX Count Register"] - pub s0_txcount: crate::Reg, - #[doc = "0x124 - Slave RX Count Register"] - pub s0_rxcount: crate::Reg, - #[doc = "0x128 - Slave Interrupt Enable Register"] - pub s0_irq_enb: crate::Reg, - #[doc = "0x12c - Slave Raw Interrupt Status Register"] - pub s0_irq_raw: crate::Reg, - #[doc = "0x130 - Slave Enabled Interrupt Status Register"] - pub s0_irq_end: crate::Reg, - #[doc = "0x134 - Slave Clear Interrupt Status Register"] - pub s0_irq_clr: crate::Reg, - #[doc = "0x138 - Slave Rx FIFO IRQ Trigger Level"] - pub s0_rxfifoirqtrg: crate::Reg, - #[doc = "0x13c - Slave Tx FIFO IRQ Trigger Level"] - pub s0_txfifoirqtrg: crate::Reg, - #[doc = "0x140 - Slave Clear FIFO Register"] - pub s0_fifo_clr: crate::Reg, - #[doc = "0x144 - Slave I2C Address B Value"] - pub s0_addressb: crate::Reg, - #[doc = "0x148 - Slave I2C Address B Mask value"] - pub s0_addressmaskb: crate::Reg, + s0_ctrl: S0Ctrl, + s0_maxwords: S0Maxwords, + s0_address: S0Address, + s0_addressmask: S0Addressmask, + s0_data: S0Data, + s0_lastaddress: S0Lastaddress, + s0_status: S0Status, + s0_state: S0State, + s0_txcount: S0Txcount, + s0_rxcount: S0Rxcount, + s0_irq_enb: S0IrqEnb, + s0_irq_raw: S0IrqRaw, + s0_irq_end: S0IrqEnd, + s0_irq_clr: S0IrqClr, + s0_rxfifoirqtrg: S0Rxfifoirqtrg, + s0_txfifoirqtrg: S0Txfifoirqtrg, + s0_fifo_clr: S0FifoClr, + s0_addressb: S0Addressb, + s0_addressmaskb: S0Addressmaskb, _reserved38: [u8; 0x02b0], - #[doc = "0x3fc - Peripheral ID Register"] - pub perid: crate::Reg, + perid: Perid, } -#[doc = "CTRL register accessor: an alias for `Reg`"] -pub type CTRL = crate::Reg; +impl RegisterBlock { + #[doc = "0x00 - Control Register"] + #[inline(always)] + pub const fn ctrl(&self) -> &Ctrl { + &self.ctrl + } + #[doc = "0x04 - Clock Scale divide value"] + #[inline(always)] + pub const fn clkscale(&self) -> &Clkscale { + &self.clkscale + } + #[doc = "0x08 - Word Count value"] + #[inline(always)] + pub const fn words(&self) -> &Words { + &self.words + } + #[doc = "0x0c - I2C Address value"] + #[inline(always)] + pub const fn address(&self) -> &Address { + &self.address + } + #[doc = "0x10 - Data Input/Output"] + #[inline(always)] + pub const fn data(&self) -> &Data { + &self.data + } + #[doc = "0x14 - Command Register"] + #[inline(always)] + pub const fn cmd(&self) -> &Cmd { + &self.cmd + } + #[doc = "0x18 - I2C Controller Status Register"] + #[inline(always)] + pub const fn status(&self) -> &Status { + &self.status + } + #[doc = "0x1c - Internal STATE of I2C Master Controller"] + #[inline(always)] + pub const fn state(&self) -> &State { + &self.state + } + #[doc = "0x20 - TX Count Register"] + #[inline(always)] + pub const fn txcount(&self) -> &Txcount { + &self.txcount + } + #[doc = "0x24 - RX Count Register"] + #[inline(always)] + pub const fn rxcount(&self) -> &Rxcount { + &self.rxcount + } + #[doc = "0x28 - Interrupt Enable Register"] + #[inline(always)] + pub const fn irq_enb(&self) -> &IrqEnb { + &self.irq_enb + } + #[doc = "0x2c - Raw Interrupt Status Register"] + #[inline(always)] + pub const fn irq_raw(&self) -> &IrqRaw { + &self.irq_raw + } + #[doc = "0x30 - Enabled Interrupt Status Register"] + #[inline(always)] + pub const fn irq_end(&self) -> &IrqEnd { + &self.irq_end + } + #[doc = "0x34 - Clear Interrupt Status Register"] + #[inline(always)] + pub const fn irq_clr(&self) -> &IrqClr { + &self.irq_clr + } + #[doc = "0x38 - Rx FIFO IRQ Trigger Level"] + #[inline(always)] + pub const fn rxfifoirqtrg(&self) -> &Rxfifoirqtrg { + &self.rxfifoirqtrg + } + #[doc = "0x3c - Tx FIFO IRQ Trigger Level"] + #[inline(always)] + pub const fn txfifoirqtrg(&self) -> &Txfifoirqtrg { + &self.txfifoirqtrg + } + #[doc = "0x40 - Clear FIFO Register"] + #[inline(always)] + pub const fn fifo_clr(&self) -> &FifoClr { + &self.fifo_clr + } + #[doc = "0x44 - Timing Config Register"] + #[inline(always)] + pub const fn tmconfig(&self) -> &Tmconfig { + &self.tmconfig + } + #[doc = "0x48 - Clock Low Timeout Limit Register"] + #[inline(always)] + pub const fn clktolimit(&self) -> &Clktolimit { + &self.clktolimit + } + #[doc = "0x100 - Slave Control Register"] + #[inline(always)] + pub const fn s0_ctrl(&self) -> &S0Ctrl { + &self.s0_ctrl + } + #[doc = "0x104 - Slave MaxWords Register"] + #[inline(always)] + pub const fn s0_maxwords(&self) -> &S0Maxwords { + &self.s0_maxwords + } + #[doc = "0x108 - Slave I2C Address Value"] + #[inline(always)] + pub const fn s0_address(&self) -> &S0Address { + &self.s0_address + } + #[doc = "0x10c - Slave I2C Address Mask value"] + #[inline(always)] + pub const fn s0_addressmask(&self) -> &S0Addressmask { + &self.s0_addressmask + } + #[doc = "0x110 - Slave Data Input/Output"] + #[inline(always)] + pub const fn s0_data(&self) -> &S0Data { + &self.s0_data + } + #[doc = "0x114 - Slave I2C Last Address value"] + #[inline(always)] + pub const fn s0_lastaddress(&self) -> &S0Lastaddress { + &self.s0_lastaddress + } + #[doc = "0x118 - Slave I2C Controller Status Register"] + #[inline(always)] + pub const fn s0_status(&self) -> &S0Status { + &self.s0_status + } + #[doc = "0x11c - Internal STATE of I2C Slave Controller"] + #[inline(always)] + pub const fn s0_state(&self) -> &S0State { + &self.s0_state + } + #[doc = "0x120 - Slave TX Count Register"] + #[inline(always)] + pub const fn s0_txcount(&self) -> &S0Txcount { + &self.s0_txcount + } + #[doc = "0x124 - Slave RX Count Register"] + #[inline(always)] + pub const fn s0_rxcount(&self) -> &S0Rxcount { + &self.s0_rxcount + } + #[doc = "0x128 - Slave Interrupt Enable Register"] + #[inline(always)] + pub const fn s0_irq_enb(&self) -> &S0IrqEnb { + &self.s0_irq_enb + } + #[doc = "0x12c - Slave Raw Interrupt Status Register"] + #[inline(always)] + pub const fn s0_irq_raw(&self) -> &S0IrqRaw { + &self.s0_irq_raw + } + #[doc = "0x130 - Slave Enabled Interrupt Status Register"] + #[inline(always)] + pub const fn s0_irq_end(&self) -> &S0IrqEnd { + &self.s0_irq_end + } + #[doc = "0x134 - Slave Clear Interrupt Status Register"] + #[inline(always)] + pub const fn s0_irq_clr(&self) -> &S0IrqClr { + &self.s0_irq_clr + } + #[doc = "0x138 - Slave Rx FIFO IRQ Trigger Level"] + #[inline(always)] + pub const fn s0_rxfifoirqtrg(&self) -> &S0Rxfifoirqtrg { + &self.s0_rxfifoirqtrg + } + #[doc = "0x13c - Slave Tx FIFO IRQ Trigger Level"] + #[inline(always)] + pub const fn s0_txfifoirqtrg(&self) -> &S0Txfifoirqtrg { + &self.s0_txfifoirqtrg + } + #[doc = "0x140 - Slave Clear FIFO Register"] + #[inline(always)] + pub const fn s0_fifo_clr(&self) -> &S0FifoClr { + &self.s0_fifo_clr + } + #[doc = "0x144 - Slave I2C Address B Value"] + #[inline(always)] + pub const fn s0_addressb(&self) -> &S0Addressb { + &self.s0_addressb + } + #[doc = "0x148 - Slave I2C Address B Mask value"] + #[inline(always)] + pub const fn s0_addressmaskb(&self) -> &S0Addressmaskb { + &self.s0_addressmaskb + } + #[doc = "0x3fc - Peripheral ID Register"] + #[inline(always)] + pub const fn perid(&self) -> &Perid { + &self.perid + } +} +#[doc = "CTRL (rw) register accessor: Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`] +module"] +#[doc(alias = "CTRL")] +pub type Ctrl = crate::Reg; #[doc = "Control Register"] pub mod ctrl; -#[doc = "CLKSCALE register accessor: an alias for `Reg`"] -pub type CLKSCALE = crate::Reg; +#[doc = "CLKSCALE (rw) register accessor: Clock Scale divide value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clkscale::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clkscale::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkscale`] +module"] +#[doc(alias = "CLKSCALE")] +pub type Clkscale = crate::Reg; #[doc = "Clock Scale divide value"] pub mod clkscale; -#[doc = "WORDS register accessor: an alias for `Reg`"] -pub type WORDS = crate::Reg; +#[doc = "WORDS (rw) register accessor: Word Count value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`words::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`words::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@words`] +module"] +#[doc(alias = "WORDS")] +pub type Words = crate::Reg; #[doc = "Word Count value"] pub mod words; -#[doc = "ADDRESS register accessor: an alias for `Reg`"] -pub type ADDRESS = crate::Reg; +#[doc = "ADDRESS (rw) register accessor: I2C Address value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`address::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`address::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@address`] +module"] +#[doc(alias = "ADDRESS")] +pub type Address = crate::Reg; #[doc = "I2C Address value"] pub mod address; -#[doc = "DATA register accessor: an alias for `Reg`"] -pub type DATA = crate::Reg; +#[doc = "DATA (rw) register accessor: Data Input/Output\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data`] +module"] +#[doc(alias = "DATA")] +pub type Data = crate::Reg; #[doc = "Data Input/Output"] pub mod data; -#[doc = "CMD register accessor: an alias for `Reg`"] -pub type CMD = crate::Reg; +#[doc = "CMD (rw) register accessor: Command Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cmd::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cmd::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmd`] +module"] +#[doc(alias = "CMD")] +pub type Cmd = crate::Reg; #[doc = "Command Register"] pub mod cmd; -#[doc = "STATUS register accessor: an alias for `Reg`"] -pub type STATUS = crate::Reg; +#[doc = "STATUS (rw) register accessor: I2C Controller Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`status::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`status::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] +module"] +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "I2C Controller Status Register"] pub mod status; -#[doc = "STATE register accessor: an alias for `Reg`"] -pub type STATE = crate::Reg; +#[doc = "STATE (r) register accessor: Internal STATE of I2C Master Controller\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`state::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@state`] +module"] +#[doc(alias = "STATE")] +pub type State = crate::Reg; #[doc = "Internal STATE of I2C Master Controller"] pub mod state; -#[doc = "TXCOUNT register accessor: an alias for `Reg`"] -pub type TXCOUNT = crate::Reg; +#[doc = "TXCOUNT (r) register accessor: TX Count Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txcount::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txcount`] +module"] +#[doc(alias = "TXCOUNT")] +pub type Txcount = crate::Reg; #[doc = "TX Count Register"] pub mod txcount; -#[doc = "RXCOUNT register accessor: an alias for `Reg`"] -pub type RXCOUNT = crate::Reg; +#[doc = "RXCOUNT (r) register accessor: RX Count Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxcount::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxcount`] +module"] +#[doc(alias = "RXCOUNT")] +pub type Rxcount = crate::Reg; #[doc = "RX Count Register"] pub mod rxcount; -#[doc = "IRQ_ENB register accessor: an alias for `Reg`"] -pub type IRQ_ENB = crate::Reg; +#[doc = "IRQ_ENB (rw) register accessor: Interrupt Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_enb::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`irq_enb::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_enb`] +module"] +#[doc(alias = "IRQ_ENB")] +pub type IrqEnb = crate::Reg; #[doc = "Interrupt Enable Register"] pub mod irq_enb; -#[doc = "IRQ_RAW register accessor: an alias for `Reg`"] -pub type IRQ_RAW = crate::Reg; -#[doc = "Raw Interrupt Status Register"] -pub mod irq_raw; -#[doc = "IRQ_END register accessor: an alias for `Reg`"] -pub type IRQ_END = crate::Reg; -#[doc = "Enabled Interrupt Status Register"] -pub mod irq_end; -#[doc = "IRQ_CLR register accessor: an alias for `Reg`"] -pub type IRQ_CLR = crate::Reg; -#[doc = "Clear Interrupt Status Register"] -pub mod irq_clr; -#[doc = "RXFIFOIRQTRG register accessor: an alias for `Reg`"] -pub type RXFIFOIRQTRG = crate::Reg; +pub use irq_enb as irq_raw; +pub use irq_enb as irq_end; +pub use irq_enb as irq_clr; +pub use IrqEnb as IrqRaw; +pub use IrqEnb as IrqEnd; +pub use IrqEnb as IrqClr; +#[doc = "RXFIFOIRQTRG (rw) register accessor: Rx FIFO IRQ Trigger Level\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxfifoirqtrg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rxfifoirqtrg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxfifoirqtrg`] +module"] +#[doc(alias = "RXFIFOIRQTRG")] +pub type Rxfifoirqtrg = crate::Reg; #[doc = "Rx FIFO IRQ Trigger Level"] pub mod rxfifoirqtrg; -#[doc = "TXFIFOIRQTRG register accessor: an alias for `Reg`"] -pub type TXFIFOIRQTRG = crate::Reg; +#[doc = "TXFIFOIRQTRG (rw) register accessor: Tx FIFO IRQ Trigger Level\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txfifoirqtrg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`txfifoirqtrg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txfifoirqtrg`] +module"] +#[doc(alias = "TXFIFOIRQTRG")] +pub type Txfifoirqtrg = crate::Reg; #[doc = "Tx FIFO IRQ Trigger Level"] pub mod txfifoirqtrg; -#[doc = "FIFO_CLR register accessor: an alias for `Reg`"] -pub type FIFO_CLR = crate::Reg; +#[doc = "FIFO_CLR (w) register accessor: Clear FIFO Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fifo_clr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fifo_clr`] +module"] +#[doc(alias = "FIFO_CLR")] +pub type FifoClr = crate::Reg; #[doc = "Clear FIFO Register"] pub mod fifo_clr; -#[doc = "TMCONFIG register accessor: an alias for `Reg`"] -pub type TMCONFIG = crate::Reg; +#[doc = "TMCONFIG (rw) register accessor: Timing Config Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tmconfig::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tmconfig::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tmconfig`] +module"] +#[doc(alias = "TMCONFIG")] +pub type Tmconfig = crate::Reg; #[doc = "Timing Config Register"] pub mod tmconfig; -#[doc = "CLKTOLIMIT register accessor: an alias for `Reg`"] -pub type CLKTOLIMIT = crate::Reg; +#[doc = "CLKTOLIMIT (rw) register accessor: Clock Low Timeout Limit Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clktolimit::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clktolimit::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clktolimit`] +module"] +#[doc(alias = "CLKTOLIMIT")] +pub type Clktolimit = crate::Reg; #[doc = "Clock Low Timeout Limit Register"] pub mod clktolimit; -#[doc = "S0_CTRL register accessor: an alias for `Reg`"] -pub type S0_CTRL = crate::Reg; +#[doc = "S0_CTRL (rw) register accessor: Slave Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`s0_ctrl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`s0_ctrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@s0_ctrl`] +module"] +#[doc(alias = "S0_CTRL")] +pub type S0Ctrl = crate::Reg; #[doc = "Slave Control Register"] pub mod s0_ctrl; -#[doc = "S0_MAXWORDS register accessor: an alias for `Reg`"] -pub type S0_MAXWORDS = crate::Reg; +#[doc = "S0_MAXWORDS (rw) register accessor: Slave MaxWords Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`s0_maxwords::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`s0_maxwords::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@s0_maxwords`] +module"] +#[doc(alias = "S0_MAXWORDS")] +pub type S0Maxwords = crate::Reg; #[doc = "Slave MaxWords Register"] pub mod s0_maxwords; -#[doc = "S0_ADDRESS register accessor: an alias for `Reg`"] -pub type S0_ADDRESS = crate::Reg; +#[doc = "S0_ADDRESS (rw) register accessor: Slave I2C Address Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`s0_address::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`s0_address::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@s0_address`] +module"] +#[doc(alias = "S0_ADDRESS")] +pub type S0Address = crate::Reg; #[doc = "Slave I2C Address Value"] pub mod s0_address; -#[doc = "S0_ADDRESSMASK register accessor: an alias for `Reg`"] -pub type S0_ADDRESSMASK = crate::Reg; +#[doc = "S0_ADDRESSMASK (rw) register accessor: Slave I2C Address Mask value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`s0_addressmask::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`s0_addressmask::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@s0_addressmask`] +module"] +#[doc(alias = "S0_ADDRESSMASK")] +pub type S0Addressmask = crate::Reg; #[doc = "Slave I2C Address Mask value"] pub mod s0_addressmask; -#[doc = "S0_DATA register accessor: an alias for `Reg`"] -pub type S0_DATA = crate::Reg; +#[doc = "S0_DATA (rw) register accessor: Slave Data Input/Output\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`s0_data::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`s0_data::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@s0_data`] +module"] +#[doc(alias = "S0_DATA")] +pub type S0Data = crate::Reg; #[doc = "Slave Data Input/Output"] pub mod s0_data; -#[doc = "S0_LASTADDRESS register accessor: an alias for `Reg`"] -pub type S0_LASTADDRESS = crate::Reg; +#[doc = "S0_LASTADDRESS (r) register accessor: Slave I2C Last Address value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`s0_lastaddress::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@s0_lastaddress`] +module"] +#[doc(alias = "S0_LASTADDRESS")] +pub type S0Lastaddress = crate::Reg; #[doc = "Slave I2C Last Address value"] pub mod s0_lastaddress; -#[doc = "S0_STATUS register accessor: an alias for `Reg`"] -pub type S0_STATUS = crate::Reg; +#[doc = "S0_STATUS (r) register accessor: Slave I2C Controller Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`s0_status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@s0_status`] +module"] +#[doc(alias = "S0_STATUS")] +pub type S0Status = crate::Reg; #[doc = "Slave I2C Controller Status Register"] pub mod s0_status; -#[doc = "S0_STATE register accessor: an alias for `Reg`"] -pub type S0_STATE = crate::Reg; +#[doc = "S0_STATE (r) register accessor: Internal STATE of I2C Slave Controller\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`s0_state::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@s0_state`] +module"] +#[doc(alias = "S0_STATE")] +pub type S0State = crate::Reg; #[doc = "Internal STATE of I2C Slave Controller"] pub mod s0_state; -#[doc = "S0_TXCOUNT register accessor: an alias for `Reg`"] -pub type S0_TXCOUNT = crate::Reg; +#[doc = "S0_TXCOUNT (r) register accessor: Slave TX Count Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`s0_txcount::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@s0_txcount`] +module"] +#[doc(alias = "S0_TXCOUNT")] +pub type S0Txcount = crate::Reg; #[doc = "Slave TX Count Register"] pub mod s0_txcount; -#[doc = "S0_RXCOUNT register accessor: an alias for `Reg`"] -pub type S0_RXCOUNT = crate::Reg; +#[doc = "S0_RXCOUNT (r) register accessor: Slave RX Count Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`s0_rxcount::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@s0_rxcount`] +module"] +#[doc(alias = "S0_RXCOUNT")] +pub type S0Rxcount = crate::Reg; #[doc = "Slave RX Count Register"] pub mod s0_rxcount; -#[doc = "S0_IRQ_ENB register accessor: an alias for `Reg`"] -pub type S0_IRQ_ENB = crate::Reg; +#[doc = "S0_IRQ_ENB (rw) register accessor: Slave Interrupt Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`s0_irq_enb::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`s0_irq_enb::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@s0_irq_enb`] +module"] +#[doc(alias = "S0_IRQ_ENB")] +pub type S0IrqEnb = crate::Reg; #[doc = "Slave Interrupt Enable Register"] pub mod s0_irq_enb; -#[doc = "S0_IRQ_RAW register accessor: an alias for `Reg`"] -pub type S0_IRQ_RAW = crate::Reg; -#[doc = "Slave Raw Interrupt Status Register"] -pub mod s0_irq_raw; -#[doc = "S0_IRQ_END register accessor: an alias for `Reg`"] -pub type S0_IRQ_END = crate::Reg; -#[doc = "Slave Enabled Interrupt Status Register"] -pub mod s0_irq_end; -#[doc = "S0_IRQ_CLR register accessor: an alias for `Reg`"] -pub type S0_IRQ_CLR = crate::Reg; -#[doc = "Slave Clear Interrupt Status Register"] -pub mod s0_irq_clr; -#[doc = "S0_RXFIFOIRQTRG register accessor: an alias for `Reg`"] -pub type S0_RXFIFOIRQTRG = crate::Reg; +pub use s0_irq_enb as s0_irq_raw; +pub use s0_irq_enb as s0_irq_end; +pub use s0_irq_enb as s0_irq_clr; +pub use S0IrqEnb as S0IrqRaw; +pub use S0IrqEnb as S0IrqEnd; +pub use S0IrqEnb as S0IrqClr; +#[doc = "S0_RXFIFOIRQTRG (rw) register accessor: Slave Rx FIFO IRQ Trigger Level\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`s0_rxfifoirqtrg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`s0_rxfifoirqtrg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@s0_rxfifoirqtrg`] +module"] +#[doc(alias = "S0_RXFIFOIRQTRG")] +pub type S0Rxfifoirqtrg = crate::Reg; #[doc = "Slave Rx FIFO IRQ Trigger Level"] pub mod s0_rxfifoirqtrg; -#[doc = "S0_TXFIFOIRQTRG register accessor: an alias for `Reg`"] -pub type S0_TXFIFOIRQTRG = crate::Reg; +#[doc = "S0_TXFIFOIRQTRG (rw) register accessor: Slave Tx FIFO IRQ Trigger Level\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`s0_txfifoirqtrg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`s0_txfifoirqtrg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@s0_txfifoirqtrg`] +module"] +#[doc(alias = "S0_TXFIFOIRQTRG")] +pub type S0Txfifoirqtrg = crate::Reg; #[doc = "Slave Tx FIFO IRQ Trigger Level"] pub mod s0_txfifoirqtrg; -#[doc = "S0_FIFO_CLR register accessor: an alias for `Reg`"] -pub type S0_FIFO_CLR = crate::Reg; +#[doc = "S0_FIFO_CLR (w) register accessor: Slave Clear FIFO Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`s0_fifo_clr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@s0_fifo_clr`] +module"] +#[doc(alias = "S0_FIFO_CLR")] +pub type S0FifoClr = crate::Reg; #[doc = "Slave Clear FIFO Register"] pub mod s0_fifo_clr; -#[doc = "S0_ADDRESSB register accessor: an alias for `Reg`"] -pub type S0_ADDRESSB = crate::Reg; +#[doc = "S0_ADDRESSB (rw) register accessor: Slave I2C Address B Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`s0_addressb::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`s0_addressb::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@s0_addressb`] +module"] +#[doc(alias = "S0_ADDRESSB")] +pub type S0Addressb = crate::Reg; #[doc = "Slave I2C Address B Value"] pub mod s0_addressb; -#[doc = "S0_ADDRESSMASKB register accessor: an alias for `Reg`"] -pub type S0_ADDRESSMASKB = crate::Reg; +#[doc = "S0_ADDRESSMASKB (rw) register accessor: Slave I2C Address B Mask value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`s0_addressmaskb::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`s0_addressmaskb::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@s0_addressmaskb`] +module"] +#[doc(alias = "S0_ADDRESSMASKB")] +pub type S0Addressmaskb = crate::Reg; #[doc = "Slave I2C Address B Mask value"] pub mod s0_addressmaskb; -#[doc = "PERID register accessor: an alias for `Reg`"] -pub type PERID = crate::Reg; +#[doc = "PERID (r) register accessor: Peripheral ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`perid::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@perid`] +module"] +#[doc(alias = "PERID")] +pub type Perid = crate::Reg; #[doc = "Peripheral ID Register"] pub mod perid; diff --git a/va416xx/src/i2c0/address.rs b/va416xx/src/i2c0/address.rs index 676d23e..4733ce9 100644 --- a/va416xx/src/i2c0/address.rs +++ b/va416xx/src/i2c0/address.rs @@ -1,64 +1,27 @@ #[doc = "Register `ADDRESS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ADDRESS` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 +pub type W = crate::W; +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) } } -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -impl W { - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "I2C Address value\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [address](index.html) module"] -pub struct ADDRESS_SPEC; -impl crate::RegisterSpec for ADDRESS_SPEC { +impl W {} +#[doc = "I2C Address value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`address::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`address::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct AddressSpec; +impl crate::RegisterSpec for AddressSpec { type Ux = u32; } -#[doc = "`read()` method returns [address::R](R) reader structure"] -impl crate::Readable for ADDRESS_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [address::W](W) writer structure"] -impl crate::Writable for ADDRESS_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`address::R`](R) reader structure"] +impl crate::Readable for AddressSpec {} +#[doc = "`write(|w| ..)` method takes [`address::W`](W) writer structure"] +impl crate::Writable for AddressSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ADDRESS to value 0"] -impl crate::Resettable for ADDRESS_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for AddressSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/i2c0/clkscale.rs b/va416xx/src/i2c0/clkscale.rs index 5b221e4..ad9dbd5 100644 --- a/va416xx/src/i2c0/clkscale.rs +++ b/va416xx/src/i2c0/clkscale.rs @@ -1,150 +1,55 @@ #[doc = "Register `CLKSCALE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CLKSCALE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `VALUE` reader - Enable FastMode"] -pub struct VALUE_R(crate::FieldReader); -impl VALUE_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - VALUE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for VALUE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type ValueR = crate::FieldReader; #[doc = "Field `VALUE` writer - Enable FastMode"] -pub struct VALUE_W<'a> { - w: &'a mut W, -} -impl<'a> VALUE_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - self.w.bits = (self.w.bits & !0x7fff_ffff) | (value as u32 & 0x7fff_ffff); - self.w - } -} +pub type ValueW<'a, REG> = crate::FieldWriter<'a, REG, 31, u32>; #[doc = "Field `FASTMODE` reader - Enable FastMode"] -pub struct FASTMODE_R(crate::FieldReader); -impl FASTMODE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - FASTMODE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for FASTMODE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type FastmodeR = crate::BitReader; #[doc = "Field `FASTMODE` writer - Enable FastMode"] -pub struct FASTMODE_W<'a> { - w: &'a mut W, -} -impl<'a> FASTMODE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 31)) | ((value as u32 & 0x01) << 31); - self.w - } -} +pub type FastmodeW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:30 - Enable FastMode"] #[inline(always)] - pub fn value(&self) -> VALUE_R { - VALUE_R::new((self.bits & 0x7fff_ffff) as u32) + pub fn value(&self) -> ValueR { + ValueR::new(self.bits & 0x7fff_ffff) } #[doc = "Bit 31 - Enable FastMode"] #[inline(always)] - pub fn fastmode(&self) -> FASTMODE_R { - FASTMODE_R::new(((self.bits >> 31) & 0x01) != 0) + pub fn fastmode(&self) -> FastmodeR { + FastmodeR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 0:30 - Enable FastMode"] #[inline(always)] - pub fn value(&mut self) -> VALUE_W { - VALUE_W { w: self } + #[must_use] + pub fn value(&mut self) -> ValueW { + ValueW::new(self, 0) } #[doc = "Bit 31 - Enable FastMode"] #[inline(always)] - pub fn fastmode(&mut self) -> FASTMODE_W { - FASTMODE_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn fastmode(&mut self) -> FastmodeW { + FastmodeW::new(self, 31) } } -#[doc = "Clock Scale divide value\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [clkscale](index.html) module"] -pub struct CLKSCALE_SPEC; -impl crate::RegisterSpec for CLKSCALE_SPEC { +#[doc = "Clock Scale divide value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clkscale::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clkscale::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ClkscaleSpec; +impl crate::RegisterSpec for ClkscaleSpec { type Ux = u32; } -#[doc = "`read()` method returns [clkscale::R](R) reader structure"] -impl crate::Readable for CLKSCALE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [clkscale::W](W) writer structure"] -impl crate::Writable for CLKSCALE_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`clkscale::R`](R) reader structure"] +impl crate::Readable for ClkscaleSpec {} +#[doc = "`write(|w| ..)` method takes [`clkscale::W`](W) writer structure"] +impl crate::Writable for ClkscaleSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CLKSCALE to value 0"] -impl crate::Resettable for CLKSCALE_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for ClkscaleSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/i2c0/clktolimit.rs b/va416xx/src/i2c0/clktolimit.rs index 884cf3c..2c0569d 100644 --- a/va416xx/src/i2c0/clktolimit.rs +++ b/va416xx/src/i2c0/clktolimit.rs @@ -1,64 +1,27 @@ #[doc = "Register `CLKTOLIMIT` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CLKTOLIMIT` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 +pub type W = crate::W; +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) } } -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -impl W { - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "Clock Low Timeout Limit Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [clktolimit](index.html) module"] -pub struct CLKTOLIMIT_SPEC; -impl crate::RegisterSpec for CLKTOLIMIT_SPEC { +impl W {} +#[doc = "Clock Low Timeout Limit Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clktolimit::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clktolimit::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ClktolimitSpec; +impl crate::RegisterSpec for ClktolimitSpec { type Ux = u32; } -#[doc = "`read()` method returns [clktolimit::R](R) reader structure"] -impl crate::Readable for CLKTOLIMIT_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [clktolimit::W](W) writer structure"] -impl crate::Writable for CLKTOLIMIT_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`clktolimit::R`](R) reader structure"] +impl crate::Readable for ClktolimitSpec {} +#[doc = "`write(|w| ..)` method takes [`clktolimit::W`](W) writer structure"] +impl crate::Writable for ClktolimitSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CLKTOLIMIT to value 0"] -impl crate::Resettable for CLKTOLIMIT_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for ClktolimitSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/i2c0/cmd.rs b/va416xx/src/i2c0/cmd.rs index 4e65290..aee7ef2 100644 --- a/va416xx/src/i2c0/cmd.rs +++ b/va416xx/src/i2c0/cmd.rs @@ -1,64 +1,27 @@ #[doc = "Register `CMD` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CMD` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 +pub type W = crate::W; +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) } } -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -impl W { - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "Command Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmd](index.html) module"] -pub struct CMD_SPEC; -impl crate::RegisterSpec for CMD_SPEC { +impl W {} +#[doc = "Command Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cmd::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cmd::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CmdSpec; +impl crate::RegisterSpec for CmdSpec { type Ux = u32; } -#[doc = "`read()` method returns [cmd::R](R) reader structure"] -impl crate::Readable for CMD_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cmd::W](W) writer structure"] -impl crate::Writable for CMD_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`cmd::R`](R) reader structure"] +impl crate::Readable for CmdSpec {} +#[doc = "`write(|w| ..)` method takes [`cmd::W`](W) writer structure"] +impl crate::Writable for CmdSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CMD to value 0"] -impl crate::Resettable for CMD_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for CmdSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/i2c0/ctrl.rs b/va416xx/src/i2c0/ctrl.rs index 0c6cbb1..203c9d3 100644 --- a/va416xx/src/i2c0/ctrl.rs +++ b/va416xx/src/i2c0/ctrl.rs @@ -1,489 +1,160 @@ #[doc = "Register `CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CLKENABLED` reader - I2C CLK Enabled"] -pub struct CLKENABLED_R(crate::FieldReader); -impl CLKENABLED_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CLKENABLED_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CLKENABLED_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type ClkenabledR = crate::BitReader; #[doc = "Field `CLKENABLED` writer - I2C CLK Enabled"] -pub struct CLKENABLED_W<'a> { - w: &'a mut W, -} -impl<'a> CLKENABLED_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} +pub type ClkenabledW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ENABLED` reader - I2C Activated"] -pub struct ENABLED_R(crate::FieldReader); -impl ENABLED_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - ENABLED_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ENABLED_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type EnabledR = crate::BitReader; #[doc = "Field `ENABLED` writer - I2C Activated"] -pub struct ENABLED_W<'a> { - w: &'a mut W, -} -impl<'a> ENABLED_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); - self.w - } -} +pub type EnabledW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ENABLE` reader - I2C Active"] -pub struct ENABLE_R(crate::FieldReader); -impl ENABLE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - ENABLE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ENABLE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type EnableR = crate::BitReader; #[doc = "Field `ENABLE` writer - I2C Active"] -pub struct ENABLE_W<'a> { - w: &'a mut W, -} -impl<'a> ENABLE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); - self.w - } -} +pub type EnableW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXFEMD` reader - TX FIFIO Empty Mode"] -pub struct TXFEMD_R(crate::FieldReader); -impl TXFEMD_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXFEMD_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXFEMD_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type TxfemdR = crate::BitReader; #[doc = "Field `TXFEMD` writer - TX FIFIO Empty Mode"] -pub struct TXFEMD_W<'a> { - w: &'a mut W, -} -impl<'a> TXFEMD_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); - self.w - } -} +pub type TxfemdW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXFFMD` reader - RX FIFO Full Mode"] -pub struct RXFFMD_R(crate::FieldReader); -impl RXFFMD_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXFFMD_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXFFMD_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type RxffmdR = crate::BitReader; #[doc = "Field `RXFFMD` writer - RX FIFO Full Mode"] -pub struct RXFFMD_W<'a> { - w: &'a mut W, -} -impl<'a> RXFFMD_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); - self.w - } -} +pub type RxffmdW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ALGFILTER` reader - Enable Input Analog Glitch Filter"] -pub struct ALGFILTER_R(crate::FieldReader); -impl ALGFILTER_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - ALGFILTER_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ALGFILTER_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type AlgfilterR = crate::BitReader; #[doc = "Field `ALGFILTER` writer - Enable Input Analog Glitch Filter"] -pub struct ALGFILTER_W<'a> { - w: &'a mut W, -} -impl<'a> ALGFILTER_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); - self.w - } -} +pub type AlgfilterW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DLGFILTER` reader - Enable Input Digital Glitch Filter"] -pub struct DLGFILTER_R(crate::FieldReader); -impl DLGFILTER_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - DLGFILTER_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for DLGFILTER_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type DlgfilterR = crate::BitReader; #[doc = "Field `DLGFILTER` writer - Enable Input Digital Glitch Filter"] -pub struct DLGFILTER_W<'a> { - w: &'a mut W, -} -impl<'a> DLGFILTER_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); - self.w - } -} +pub type DlgfilterW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LOOPBACK` reader - Enable LoopBack Mode"] -pub struct LOOPBACK_R(crate::FieldReader); -impl LOOPBACK_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - LOOPBACK_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for LOOPBACK_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type LoopbackR = crate::BitReader; #[doc = "Field `LOOPBACK` writer - Enable LoopBack Mode"] -pub struct LOOPBACK_W<'a> { - w: &'a mut W, -} -impl<'a> LOOPBACK_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); - self.w - } -} +pub type LoopbackW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TMCONFIGENB` reader - Enable Timing Config Register"] -pub struct TMCONFIGENB_R(crate::FieldReader); -impl TMCONFIGENB_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TMCONFIGENB_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TMCONFIGENB_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type TmconfigenbR = crate::BitReader; #[doc = "Field `TMCONFIGENB` writer - Enable Timing Config Register"] -pub struct TMCONFIGENB_W<'a> { - w: &'a mut W, -} -impl<'a> TMCONFIGENB_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); - self.w - } -} +pub type TmconfigenbW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - I2C CLK Enabled"] #[inline(always)] - pub fn clkenabled(&self) -> CLKENABLED_R { - CLKENABLED_R::new((self.bits & 0x01) != 0) + pub fn clkenabled(&self) -> ClkenabledR { + ClkenabledR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - I2C Activated"] #[inline(always)] - pub fn enabled(&self) -> ENABLED_R { - ENABLED_R::new(((self.bits >> 1) & 0x01) != 0) + pub fn enabled(&self) -> EnabledR { + EnabledR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - I2C Active"] #[inline(always)] - pub fn enable(&self) -> ENABLE_R { - ENABLE_R::new(((self.bits >> 2) & 0x01) != 0) + pub fn enable(&self) -> EnableR { + EnableR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - TX FIFIO Empty Mode"] #[inline(always)] - pub fn txfemd(&self) -> TXFEMD_R { - TXFEMD_R::new(((self.bits >> 3) & 0x01) != 0) + pub fn txfemd(&self) -> TxfemdR { + TxfemdR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - RX FIFO Full Mode"] #[inline(always)] - pub fn rxffmd(&self) -> RXFFMD_R { - RXFFMD_R::new(((self.bits >> 4) & 0x01) != 0) + pub fn rxffmd(&self) -> RxffmdR { + RxffmdR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Enable Input Analog Glitch Filter"] #[inline(always)] - pub fn algfilter(&self) -> ALGFILTER_R { - ALGFILTER_R::new(((self.bits >> 5) & 0x01) != 0) + pub fn algfilter(&self) -> AlgfilterR { + AlgfilterR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Enable Input Digital Glitch Filter"] #[inline(always)] - pub fn dlgfilter(&self) -> DLGFILTER_R { - DLGFILTER_R::new(((self.bits >> 6) & 0x01) != 0) + pub fn dlgfilter(&self) -> DlgfilterR { + DlgfilterR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 8 - Enable LoopBack Mode"] #[inline(always)] - pub fn loopback(&self) -> LOOPBACK_R { - LOOPBACK_R::new(((self.bits >> 8) & 0x01) != 0) + pub fn loopback(&self) -> LoopbackR { + LoopbackR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Enable Timing Config Register"] #[inline(always)] - pub fn tmconfigenb(&self) -> TMCONFIGENB_R { - TMCONFIGENB_R::new(((self.bits >> 9) & 0x01) != 0) + pub fn tmconfigenb(&self) -> TmconfigenbR { + TmconfigenbR::new(((self.bits >> 9) & 1) != 0) } } impl W { #[doc = "Bit 0 - I2C CLK Enabled"] #[inline(always)] - pub fn clkenabled(&mut self) -> CLKENABLED_W { - CLKENABLED_W { w: self } + #[must_use] + pub fn clkenabled(&mut self) -> ClkenabledW { + ClkenabledW::new(self, 0) } #[doc = "Bit 1 - I2C Activated"] #[inline(always)] - pub fn enabled(&mut self) -> ENABLED_W { - ENABLED_W { w: self } + #[must_use] + pub fn enabled(&mut self) -> EnabledW { + EnabledW::new(self, 1) } #[doc = "Bit 2 - I2C Active"] #[inline(always)] - pub fn enable(&mut self) -> ENABLE_W { - ENABLE_W { w: self } + #[must_use] + pub fn enable(&mut self) -> EnableW { + EnableW::new(self, 2) } #[doc = "Bit 3 - TX FIFIO Empty Mode"] #[inline(always)] - pub fn txfemd(&mut self) -> TXFEMD_W { - TXFEMD_W { w: self } + #[must_use] + pub fn txfemd(&mut self) -> TxfemdW { + TxfemdW::new(self, 3) } #[doc = "Bit 4 - RX FIFO Full Mode"] #[inline(always)] - pub fn rxffmd(&mut self) -> RXFFMD_W { - RXFFMD_W { w: self } + #[must_use] + pub fn rxffmd(&mut self) -> RxffmdW { + RxffmdW::new(self, 4) } #[doc = "Bit 5 - Enable Input Analog Glitch Filter"] #[inline(always)] - pub fn algfilter(&mut self) -> ALGFILTER_W { - ALGFILTER_W { w: self } + #[must_use] + pub fn algfilter(&mut self) -> AlgfilterW { + AlgfilterW::new(self, 5) } #[doc = "Bit 6 - Enable Input Digital Glitch Filter"] #[inline(always)] - pub fn dlgfilter(&mut self) -> DLGFILTER_W { - DLGFILTER_W { w: self } + #[must_use] + pub fn dlgfilter(&mut self) -> DlgfilterW { + DlgfilterW::new(self, 6) } #[doc = "Bit 8 - Enable LoopBack Mode"] #[inline(always)] - pub fn loopback(&mut self) -> LOOPBACK_W { - LOOPBACK_W { w: self } + #[must_use] + pub fn loopback(&mut self) -> LoopbackW { + LoopbackW::new(self, 8) } #[doc = "Bit 9 - Enable Timing Config Register"] #[inline(always)] - pub fn tmconfigenb(&mut self) -> TMCONFIGENB_W { - TMCONFIGENB_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn tmconfigenb(&mut self) -> TmconfigenbW { + TmconfigenbW::new(self, 9) } } -#[doc = "Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](index.html) module"] -pub struct CTRL_SPEC; -impl crate::RegisterSpec for CTRL_SPEC { +#[doc = "Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctrl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctrl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CtrlSpec; +impl crate::RegisterSpec for CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [ctrl::R](R) reader structure"] -impl crate::Readable for CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ctrl::W](W) writer structure"] -impl crate::Writable for CTRL_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`ctrl::R`](R) reader structure"] +impl crate::Readable for CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`ctrl::W`](W) writer structure"] +impl crate::Writable for CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTRL to value 0"] -impl crate::Resettable for CTRL_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/i2c0/data.rs b/va416xx/src/i2c0/data.rs index 31777b9..30b85c9 100644 --- a/va416xx/src/i2c0/data.rs +++ b/va416xx/src/i2c0/data.rs @@ -1,64 +1,27 @@ #[doc = "Register `DATA` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DATA` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 +pub type W = crate::W; +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) } } -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -impl W { - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "Data Input/Output\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data](index.html) module"] -pub struct DATA_SPEC; -impl crate::RegisterSpec for DATA_SPEC { +impl W {} +#[doc = "Data Input/Output\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DataSpec; +impl crate::RegisterSpec for DataSpec { type Ux = u32; } -#[doc = "`read()` method returns [data::R](R) reader structure"] -impl crate::Readable for DATA_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [data::W](W) writer structure"] -impl crate::Writable for DATA_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`data::R`](R) reader structure"] +impl crate::Readable for DataSpec {} +#[doc = "`write(|w| ..)` method takes [`data::W`](W) writer structure"] +impl crate::Writable for DataSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA to value 0"] -impl crate::Resettable for DATA_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for DataSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/i2c0/fifo_clr.rs b/va416xx/src/i2c0/fifo_clr.rs index 3d95fdd..156da87 100644 --- a/va416xx/src/i2c0/fifo_clr.rs +++ b/va416xx/src/i2c0/fifo_clr.rs @@ -1,99 +1,35 @@ #[doc = "Register `FIFO_CLR` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RXFIFO` writer - Clear Rx FIFO"] -pub struct RXFIFO_W<'a> { - w: &'a mut W, -} -impl<'a> RXFIFO_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} +pub type RxfifoW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXFIFO` writer - Clear Tx FIFO"] -pub struct TXFIFO_W<'a> { - w: &'a mut W, -} -impl<'a> TXFIFO_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); - self.w - } -} +pub type TxfifoW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Clear Rx FIFO"] #[inline(always)] - pub fn rxfifo(&mut self) -> RXFIFO_W { - RXFIFO_W { w: self } + #[must_use] + pub fn rxfifo(&mut self) -> RxfifoW { + RxfifoW::new(self, 0) } #[doc = "Bit 1 - Clear Tx FIFO"] #[inline(always)] - pub fn txfifo(&mut self) -> TXFIFO_W { - TXFIFO_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn txfifo(&mut self) -> TxfifoW { + TxfifoW::new(self, 1) } } -#[doc = "Clear FIFO Register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [fifo_clr](index.html) module"] -pub struct FIFO_CLR_SPEC; -impl crate::RegisterSpec for FIFO_CLR_SPEC { +#[doc = "Clear FIFO Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fifo_clr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct FifoClrSpec; +impl crate::RegisterSpec for FifoClrSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [fifo_clr::W](W) writer structure"] -impl crate::Writable for FIFO_CLR_SPEC { - type Writer = W; +#[doc = "`write(|w| ..)` method takes [`fifo_clr::W`](W) writer structure"] +impl crate::Writable for FifoClrSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets FIFO_CLR to value 0"] -impl crate::Resettable for FIFO_CLR_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for FifoClrSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/i2c0/irq_clr.rs b/va416xx/src/i2c0/irq_clr.rs deleted file mode 100644 index fad92d0..0000000 --- a/va416xx/src/i2c0/irq_clr.rs +++ /dev/null @@ -1,423 +0,0 @@ -#[doc = "Register `IRQ_CLR` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `I2CIDLE` writer - I2C Bus is Idle"] -pub struct I2CIDLE_W<'a> { - w: &'a mut W, -} -impl<'a> I2CIDLE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} -#[doc = "Field `IDLE` writer - Controller is Idle"] -pub struct IDLE_W<'a> { - w: &'a mut W, -} -impl<'a> IDLE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); - self.w - } -} -#[doc = "Field `WAITING` writer - Controller is Waiting"] -pub struct WAITING_W<'a> { - w: &'a mut W, -} -impl<'a> WAITING_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); - self.w - } -} -#[doc = "Field `STALLED` writer - Controller is Stalled"] -pub struct STALLED_W<'a> { - w: &'a mut W, -} -impl<'a> STALLED_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); - self.w - } -} -#[doc = "Field `ARBLOST` writer - I2C Arbitration was lost"] -pub struct ARBLOST_W<'a> { - w: &'a mut W, -} -impl<'a> ARBLOST_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); - self.w - } -} -#[doc = "Field `NACKADDR` writer - I2C Address was not Acknowledged"] -pub struct NACKADDR_W<'a> { - w: &'a mut W, -} -impl<'a> NACKADDR_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); - self.w - } -} -#[doc = "Field `NACKDATA` writer - I2C Data was not Acknowledged"] -pub struct NACKDATA_W<'a> { - w: &'a mut W, -} -impl<'a> NACKDATA_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); - self.w - } -} -#[doc = "Field `CLKLOTO` writer - I2C Clock Low Timeout"] -pub struct CLKLOTO_W<'a> { - w: &'a mut W, -} -impl<'a> CLKLOTO_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); - self.w - } -} -#[doc = "Field `TXOVERFLOW` writer - TX FIFO Overflowed"] -pub struct TXOVERFLOW_W<'a> { - w: &'a mut W, -} -impl<'a> TXOVERFLOW_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); - self.w - } -} -#[doc = "Field `RXOVERFLOW` writer - TX FIFO Overflowed"] -pub struct RXOVERFLOW_W<'a> { - w: &'a mut W, -} -impl<'a> RXOVERFLOW_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); - self.w - } -} -#[doc = "Field `TXREADY` writer - TX FIFO Ready"] -pub struct TXREADY_W<'a> { - w: &'a mut W, -} -impl<'a> TXREADY_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); - self.w - } -} -#[doc = "Field `RXREADY` writer - RX FIFO Ready"] -pub struct RXREADY_W<'a> { - w: &'a mut W, -} -impl<'a> RXREADY_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); - self.w - } -} -#[doc = "Field `TXEMPTY` writer - TX FIFO Empty"] -pub struct TXEMPTY_W<'a> { - w: &'a mut W, -} -impl<'a> TXEMPTY_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); - self.w - } -} -#[doc = "Field `RXFULL` writer - RX FIFO Full"] -pub struct RXFULL_W<'a> { - w: &'a mut W, -} -impl<'a> RXFULL_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); - self.w - } -} -impl W { - #[doc = "Bit 0 - I2C Bus is Idle"] - #[inline(always)] - pub fn i2cidle(&mut self) -> I2CIDLE_W { - I2CIDLE_W { w: self } - } - #[doc = "Bit 1 - Controller is Idle"] - #[inline(always)] - pub fn idle(&mut self) -> IDLE_W { - IDLE_W { w: self } - } - #[doc = "Bit 2 - Controller is Waiting"] - #[inline(always)] - pub fn waiting(&mut self) -> WAITING_W { - WAITING_W { w: self } - } - #[doc = "Bit 3 - Controller is Stalled"] - #[inline(always)] - pub fn stalled(&mut self) -> STALLED_W { - STALLED_W { w: self } - } - #[doc = "Bit 4 - I2C Arbitration was lost"] - #[inline(always)] - pub fn arblost(&mut self) -> ARBLOST_W { - ARBLOST_W { w: self } - } - #[doc = "Bit 5 - I2C Address was not Acknowledged"] - #[inline(always)] - pub fn nackaddr(&mut self) -> NACKADDR_W { - NACKADDR_W { w: self } - } - #[doc = "Bit 6 - I2C Data was not Acknowledged"] - #[inline(always)] - pub fn nackdata(&mut self) -> NACKDATA_W { - NACKDATA_W { w: self } - } - #[doc = "Bit 7 - I2C Clock Low Timeout"] - #[inline(always)] - pub fn clkloto(&mut self) -> CLKLOTO_W { - CLKLOTO_W { w: self } - } - #[doc = "Bit 10 - TX FIFO Overflowed"] - #[inline(always)] - pub fn txoverflow(&mut self) -> TXOVERFLOW_W { - TXOVERFLOW_W { w: self } - } - #[doc = "Bit 11 - TX FIFO Overflowed"] - #[inline(always)] - pub fn rxoverflow(&mut self) -> RXOVERFLOW_W { - RXOVERFLOW_W { w: self } - } - #[doc = "Bit 12 - TX FIFO Ready"] - #[inline(always)] - pub fn txready(&mut self) -> TXREADY_W { - TXREADY_W { w: self } - } - #[doc = "Bit 13 - RX FIFO Ready"] - #[inline(always)] - pub fn rxready(&mut self) -> RXREADY_W { - RXREADY_W { w: self } - } - #[doc = "Bit 14 - TX FIFO Empty"] - #[inline(always)] - pub fn txempty(&mut self) -> TXEMPTY_W { - TXEMPTY_W { w: self } - } - #[doc = "Bit 15 - RX FIFO Full"] - #[inline(always)] - pub fn rxfull(&mut self) -> RXFULL_W { - RXFULL_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "Clear Interrupt Status Register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [irq_clr](index.html) module"] -pub struct IRQ_CLR_SPEC; -impl crate::RegisterSpec for IRQ_CLR_SPEC { - type Ux = u32; -} -#[doc = "`write(|w| ..)` method takes [irq_clr::W](W) writer structure"] -impl crate::Writable for IRQ_CLR_SPEC { - type Writer = W; -} -#[doc = "`reset()` method sets IRQ_CLR to value 0"] -impl crate::Resettable for IRQ_CLR_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } -} diff --git a/va416xx/src/i2c0/irq_enb.rs b/va416xx/src/i2c0/irq_enb.rs index eab46a4..4eba067 100644 --- a/va416xx/src/i2c0/irq_enb.rs +++ b/va416xx/src/i2c0/irq_enb.rs @@ -1,724 +1,235 @@ #[doc = "Register `IRQ_ENB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IRQ_ENB` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `I2CIDLE` reader - I2C Bus is Idle"] -pub struct I2CIDLE_R(crate::FieldReader); -impl I2CIDLE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - I2CIDLE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for I2CIDLE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type I2cidleR = crate::BitReader; #[doc = "Field `I2CIDLE` writer - I2C Bus is Idle"] -pub struct I2CIDLE_W<'a> { - w: &'a mut W, -} -impl<'a> I2CIDLE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} +pub type I2cidleW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `IDLE` reader - Controller is Idle"] -pub struct IDLE_R(crate::FieldReader); -impl IDLE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - IDLE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for IDLE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type IdleR = crate::BitReader; #[doc = "Field `IDLE` writer - Controller is Idle"] -pub struct IDLE_W<'a> { - w: &'a mut W, -} -impl<'a> IDLE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); - self.w - } -} +pub type IdleW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WAITING` reader - Controller is Waiting"] -pub struct WAITING_R(crate::FieldReader); -impl WAITING_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - WAITING_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for WAITING_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type WaitingR = crate::BitReader; #[doc = "Field `WAITING` writer - Controller is Waiting"] -pub struct WAITING_W<'a> { - w: &'a mut W, -} -impl<'a> WAITING_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); - self.w - } -} +pub type WaitingW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STALLED` reader - Controller is Stalled"] -pub struct STALLED_R(crate::FieldReader); -impl STALLED_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - STALLED_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for STALLED_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type StalledR = crate::BitReader; #[doc = "Field `STALLED` writer - Controller is Stalled"] -pub struct STALLED_W<'a> { - w: &'a mut W, -} -impl<'a> STALLED_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); - self.w - } -} +pub type StalledW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ARBLOST` reader - I2C Arbitration was lost"] -pub struct ARBLOST_R(crate::FieldReader); -impl ARBLOST_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - ARBLOST_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ARBLOST_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type ArblostR = crate::BitReader; #[doc = "Field `ARBLOST` writer - I2C Arbitration was lost"] -pub struct ARBLOST_W<'a> { - w: &'a mut W, -} -impl<'a> ARBLOST_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); - self.w - } -} +pub type ArblostW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NACKADDR` reader - I2C Address was not Acknowledged"] -pub struct NACKADDR_R(crate::FieldReader); -impl NACKADDR_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - NACKADDR_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for NACKADDR_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type NackaddrR = crate::BitReader; #[doc = "Field `NACKADDR` writer - I2C Address was not Acknowledged"] -pub struct NACKADDR_W<'a> { - w: &'a mut W, -} -impl<'a> NACKADDR_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); - self.w - } -} +pub type NackaddrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NACKDATA` reader - I2C Data was not Acknowledged"] -pub struct NACKDATA_R(crate::FieldReader); -impl NACKDATA_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - NACKDATA_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for NACKDATA_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type NackdataR = crate::BitReader; #[doc = "Field `NACKDATA` writer - I2C Data was not Acknowledged"] -pub struct NACKDATA_W<'a> { - w: &'a mut W, -} -impl<'a> NACKDATA_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); - self.w - } -} +pub type NackdataW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CLKLOTO` reader - I2C Clock Low Timeout"] -pub struct CLKLOTO_R(crate::FieldReader); -impl CLKLOTO_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CLKLOTO_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CLKLOTO_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type ClklotoR = crate::BitReader; #[doc = "Field `CLKLOTO` writer - I2C Clock Low Timeout"] -pub struct CLKLOTO_W<'a> { - w: &'a mut W, -} -impl<'a> CLKLOTO_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); - self.w - } -} +pub type ClklotoW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXOVERFLOW` reader - TX FIFO Overflowed"] -pub struct TXOVERFLOW_R(crate::FieldReader); -impl TXOVERFLOW_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXOVERFLOW_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXOVERFLOW_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type TxoverflowR = crate::BitReader; #[doc = "Field `TXOVERFLOW` writer - TX FIFO Overflowed"] -pub struct TXOVERFLOW_W<'a> { - w: &'a mut W, -} -impl<'a> TXOVERFLOW_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); - self.w - } -} +pub type TxoverflowW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXOVERFLOW` reader - TX FIFO Overflowed"] -pub struct RXOVERFLOW_R(crate::FieldReader); -impl RXOVERFLOW_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXOVERFLOW_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXOVERFLOW_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type RxoverflowR = crate::BitReader; #[doc = "Field `RXOVERFLOW` writer - TX FIFO Overflowed"] -pub struct RXOVERFLOW_W<'a> { - w: &'a mut W, -} -impl<'a> RXOVERFLOW_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); - self.w - } -} +pub type RxoverflowW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXREADY` reader - TX FIFO Ready"] -pub struct TXREADY_R(crate::FieldReader); -impl TXREADY_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXREADY_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXREADY_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type TxreadyR = crate::BitReader; #[doc = "Field `TXREADY` writer - TX FIFO Ready"] -pub struct TXREADY_W<'a> { - w: &'a mut W, -} -impl<'a> TXREADY_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); - self.w - } -} +pub type TxreadyW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXREADY` reader - RX FIFO Ready"] -pub struct RXREADY_R(crate::FieldReader); -impl RXREADY_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXREADY_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXREADY_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type RxreadyR = crate::BitReader; #[doc = "Field `RXREADY` writer - RX FIFO Ready"] -pub struct RXREADY_W<'a> { - w: &'a mut W, -} -impl<'a> RXREADY_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); - self.w - } -} +pub type RxreadyW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXEMPTY` reader - TX FIFO Empty"] -pub struct TXEMPTY_R(crate::FieldReader); -impl TXEMPTY_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXEMPTY_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXEMPTY_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type TxemptyR = crate::BitReader; #[doc = "Field `TXEMPTY` writer - TX FIFO Empty"] -pub struct TXEMPTY_W<'a> { - w: &'a mut W, -} -impl<'a> TXEMPTY_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); - self.w - } -} +pub type TxemptyW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXFULL` reader - RX FIFO Full"] -pub struct RXFULL_R(crate::FieldReader); -impl RXFULL_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXFULL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXFULL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type RxfullR = crate::BitReader; #[doc = "Field `RXFULL` writer - RX FIFO Full"] -pub struct RXFULL_W<'a> { - w: &'a mut W, -} -impl<'a> RXFULL_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); - self.w - } -} +pub type RxfullW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - I2C Bus is Idle"] #[inline(always)] - pub fn i2cidle(&self) -> I2CIDLE_R { - I2CIDLE_R::new((self.bits & 0x01) != 0) + pub fn i2cidle(&self) -> I2cidleR { + I2cidleR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Controller is Idle"] #[inline(always)] - pub fn idle(&self) -> IDLE_R { - IDLE_R::new(((self.bits >> 1) & 0x01) != 0) + pub fn idle(&self) -> IdleR { + IdleR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Controller is Waiting"] #[inline(always)] - pub fn waiting(&self) -> WAITING_R { - WAITING_R::new(((self.bits >> 2) & 0x01) != 0) + pub fn waiting(&self) -> WaitingR { + WaitingR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Controller is Stalled"] #[inline(always)] - pub fn stalled(&self) -> STALLED_R { - STALLED_R::new(((self.bits >> 3) & 0x01) != 0) + pub fn stalled(&self) -> StalledR { + StalledR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - I2C Arbitration was lost"] #[inline(always)] - pub fn arblost(&self) -> ARBLOST_R { - ARBLOST_R::new(((self.bits >> 4) & 0x01) != 0) + pub fn arblost(&self) -> ArblostR { + ArblostR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - I2C Address was not Acknowledged"] #[inline(always)] - pub fn nackaddr(&self) -> NACKADDR_R { - NACKADDR_R::new(((self.bits >> 5) & 0x01) != 0) + pub fn nackaddr(&self) -> NackaddrR { + NackaddrR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - I2C Data was not Acknowledged"] #[inline(always)] - pub fn nackdata(&self) -> NACKDATA_R { - NACKDATA_R::new(((self.bits >> 6) & 0x01) != 0) + pub fn nackdata(&self) -> NackdataR { + NackdataR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - I2C Clock Low Timeout"] #[inline(always)] - pub fn clkloto(&self) -> CLKLOTO_R { - CLKLOTO_R::new(((self.bits >> 7) & 0x01) != 0) + pub fn clkloto(&self) -> ClklotoR { + ClklotoR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 10 - TX FIFO Overflowed"] #[inline(always)] - pub fn txoverflow(&self) -> TXOVERFLOW_R { - TXOVERFLOW_R::new(((self.bits >> 10) & 0x01) != 0) + pub fn txoverflow(&self) -> TxoverflowR { + TxoverflowR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - TX FIFO Overflowed"] #[inline(always)] - pub fn rxoverflow(&self) -> RXOVERFLOW_R { - RXOVERFLOW_R::new(((self.bits >> 11) & 0x01) != 0) + pub fn rxoverflow(&self) -> RxoverflowR { + RxoverflowR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - TX FIFO Ready"] #[inline(always)] - pub fn txready(&self) -> TXREADY_R { - TXREADY_R::new(((self.bits >> 12) & 0x01) != 0) + pub fn txready(&self) -> TxreadyR { + TxreadyR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - RX FIFO Ready"] #[inline(always)] - pub fn rxready(&self) -> RXREADY_R { - RXREADY_R::new(((self.bits >> 13) & 0x01) != 0) + pub fn rxready(&self) -> RxreadyR { + RxreadyR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - TX FIFO Empty"] #[inline(always)] - pub fn txempty(&self) -> TXEMPTY_R { - TXEMPTY_R::new(((self.bits >> 14) & 0x01) != 0) + pub fn txempty(&self) -> TxemptyR { + TxemptyR::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - RX FIFO Full"] #[inline(always)] - pub fn rxfull(&self) -> RXFULL_R { - RXFULL_R::new(((self.bits >> 15) & 0x01) != 0) + pub fn rxfull(&self) -> RxfullR { + RxfullR::new(((self.bits >> 15) & 1) != 0) } } impl W { #[doc = "Bit 0 - I2C Bus is Idle"] #[inline(always)] - pub fn i2cidle(&mut self) -> I2CIDLE_W { - I2CIDLE_W { w: self } + #[must_use] + pub fn i2cidle(&mut self) -> I2cidleW { + I2cidleW::new(self, 0) } #[doc = "Bit 1 - Controller is Idle"] #[inline(always)] - pub fn idle(&mut self) -> IDLE_W { - IDLE_W { w: self } + #[must_use] + pub fn idle(&mut self) -> IdleW { + IdleW::new(self, 1) } #[doc = "Bit 2 - Controller is Waiting"] #[inline(always)] - pub fn waiting(&mut self) -> WAITING_W { - WAITING_W { w: self } + #[must_use] + pub fn waiting(&mut self) -> WaitingW { + WaitingW::new(self, 2) } #[doc = "Bit 3 - Controller is Stalled"] #[inline(always)] - pub fn stalled(&mut self) -> STALLED_W { - STALLED_W { w: self } + #[must_use] + pub fn stalled(&mut self) -> StalledW { + StalledW::new(self, 3) } #[doc = "Bit 4 - I2C Arbitration was lost"] #[inline(always)] - pub fn arblost(&mut self) -> ARBLOST_W { - ARBLOST_W { w: self } + #[must_use] + pub fn arblost(&mut self) -> ArblostW { + ArblostW::new(self, 4) } #[doc = "Bit 5 - I2C Address was not Acknowledged"] #[inline(always)] - pub fn nackaddr(&mut self) -> NACKADDR_W { - NACKADDR_W { w: self } + #[must_use] + pub fn nackaddr(&mut self) -> NackaddrW { + NackaddrW::new(self, 5) } #[doc = "Bit 6 - I2C Data was not Acknowledged"] #[inline(always)] - pub fn nackdata(&mut self) -> NACKDATA_W { - NACKDATA_W { w: self } + #[must_use] + pub fn nackdata(&mut self) -> NackdataW { + NackdataW::new(self, 6) } #[doc = "Bit 7 - I2C Clock Low Timeout"] #[inline(always)] - pub fn clkloto(&mut self) -> CLKLOTO_W { - CLKLOTO_W { w: self } + #[must_use] + pub fn clkloto(&mut self) -> ClklotoW { + ClklotoW::new(self, 7) } #[doc = "Bit 10 - TX FIFO Overflowed"] #[inline(always)] - pub fn txoverflow(&mut self) -> TXOVERFLOW_W { - TXOVERFLOW_W { w: self } + #[must_use] + pub fn txoverflow(&mut self) -> TxoverflowW { + TxoverflowW::new(self, 10) } #[doc = "Bit 11 - TX FIFO Overflowed"] #[inline(always)] - pub fn rxoverflow(&mut self) -> RXOVERFLOW_W { - RXOVERFLOW_W { w: self } + #[must_use] + pub fn rxoverflow(&mut self) -> RxoverflowW { + RxoverflowW::new(self, 11) } #[doc = "Bit 12 - TX FIFO Ready"] #[inline(always)] - pub fn txready(&mut self) -> TXREADY_W { - TXREADY_W { w: self } + #[must_use] + pub fn txready(&mut self) -> TxreadyW { + TxreadyW::new(self, 12) } #[doc = "Bit 13 - RX FIFO Ready"] #[inline(always)] - pub fn rxready(&mut self) -> RXREADY_W { - RXREADY_W { w: self } + #[must_use] + pub fn rxready(&mut self) -> RxreadyW { + RxreadyW::new(self, 13) } #[doc = "Bit 14 - TX FIFO Empty"] #[inline(always)] - pub fn txempty(&mut self) -> TXEMPTY_W { - TXEMPTY_W { w: self } + #[must_use] + pub fn txempty(&mut self) -> TxemptyW { + TxemptyW::new(self, 14) } #[doc = "Bit 15 - RX FIFO Full"] #[inline(always)] - pub fn rxfull(&mut self) -> RXFULL_W { - RXFULL_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn rxfull(&mut self) -> RxfullW { + RxfullW::new(self, 15) } } -#[doc = "Interrupt Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [irq_enb](index.html) module"] -pub struct IRQ_ENB_SPEC; -impl crate::RegisterSpec for IRQ_ENB_SPEC { +#[doc = "Interrupt Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_enb::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`irq_enb::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IrqEnbSpec; +impl crate::RegisterSpec for IrqEnbSpec { type Ux = u32; } -#[doc = "`read()` method returns [irq_enb::R](R) reader structure"] -impl crate::Readable for IRQ_ENB_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [irq_enb::W](W) writer structure"] -impl crate::Writable for IRQ_ENB_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`irq_enb::R`](R) reader structure"] +impl crate::Readable for IrqEnbSpec {} +#[doc = "`write(|w| ..)` method takes [`irq_enb::W`](W) writer structure"] +impl crate::Writable for IrqEnbSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IRQ_ENB to value 0"] -impl crate::Resettable for IRQ_ENB_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for IrqEnbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/i2c0/irq_end.rs b/va416xx/src/i2c0/irq_end.rs deleted file mode 100644 index 6a0ac28..0000000 --- a/va416xx/src/i2c0/irq_end.rs +++ /dev/null @@ -1,313 +0,0 @@ -#[doc = "Register `IRQ_END` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Field `I2CIDLE` reader - I2C Bus is Idle"] -pub struct I2CIDLE_R(crate::FieldReader); -impl I2CIDLE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - I2CIDLE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for I2CIDLE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `IDLE` reader - Controller is Idle"] -pub struct IDLE_R(crate::FieldReader); -impl IDLE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - IDLE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for IDLE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `WAITING` reader - Controller is Waiting"] -pub struct WAITING_R(crate::FieldReader); -impl WAITING_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - WAITING_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for WAITING_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `STALLED` reader - Controller is Stalled"] -pub struct STALLED_R(crate::FieldReader); -impl STALLED_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - STALLED_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for STALLED_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `ARBLOST` reader - I2C Arbitration was lost"] -pub struct ARBLOST_R(crate::FieldReader); -impl ARBLOST_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - ARBLOST_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ARBLOST_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `NACKADDR` reader - I2C Address was not Acknowledged"] -pub struct NACKADDR_R(crate::FieldReader); -impl NACKADDR_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - NACKADDR_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for NACKADDR_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `NACKDATA` reader - I2C Data was not Acknowledged"] -pub struct NACKDATA_R(crate::FieldReader); -impl NACKDATA_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - NACKDATA_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for NACKDATA_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CLKLOTO` reader - I2C Clock Low Timeout"] -pub struct CLKLOTO_R(crate::FieldReader); -impl CLKLOTO_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CLKLOTO_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CLKLOTO_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TXOVERFLOW` reader - TX FIFO Overflowed"] -pub struct TXOVERFLOW_R(crate::FieldReader); -impl TXOVERFLOW_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXOVERFLOW_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXOVERFLOW_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RXOVERFLOW` reader - TX FIFO Overflowed"] -pub struct RXOVERFLOW_R(crate::FieldReader); -impl RXOVERFLOW_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXOVERFLOW_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXOVERFLOW_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TXREADY` reader - TX FIFO Ready"] -pub struct TXREADY_R(crate::FieldReader); -impl TXREADY_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXREADY_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXREADY_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RXREADY` reader - RX FIFO Ready"] -pub struct RXREADY_R(crate::FieldReader); -impl RXREADY_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXREADY_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXREADY_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TXEMPTY` reader - TX FIFO Empty"] -pub struct TXEMPTY_R(crate::FieldReader); -impl TXEMPTY_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXEMPTY_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXEMPTY_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RXFULL` reader - RX FIFO Full"] -pub struct RXFULL_R(crate::FieldReader); -impl RXFULL_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXFULL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXFULL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl R { - #[doc = "Bit 0 - I2C Bus is Idle"] - #[inline(always)] - pub fn i2cidle(&self) -> I2CIDLE_R { - I2CIDLE_R::new((self.bits & 0x01) != 0) - } - #[doc = "Bit 1 - Controller is Idle"] - #[inline(always)] - pub fn idle(&self) -> IDLE_R { - IDLE_R::new(((self.bits >> 1) & 0x01) != 0) - } - #[doc = "Bit 2 - Controller is Waiting"] - #[inline(always)] - pub fn waiting(&self) -> WAITING_R { - WAITING_R::new(((self.bits >> 2) & 0x01) != 0) - } - #[doc = "Bit 3 - Controller is Stalled"] - #[inline(always)] - pub fn stalled(&self) -> STALLED_R { - STALLED_R::new(((self.bits >> 3) & 0x01) != 0) - } - #[doc = "Bit 4 - I2C Arbitration was lost"] - #[inline(always)] - pub fn arblost(&self) -> ARBLOST_R { - ARBLOST_R::new(((self.bits >> 4) & 0x01) != 0) - } - #[doc = "Bit 5 - I2C Address was not Acknowledged"] - #[inline(always)] - pub fn nackaddr(&self) -> NACKADDR_R { - NACKADDR_R::new(((self.bits >> 5) & 0x01) != 0) - } - #[doc = "Bit 6 - I2C Data was not Acknowledged"] - #[inline(always)] - pub fn nackdata(&self) -> NACKDATA_R { - NACKDATA_R::new(((self.bits >> 6) & 0x01) != 0) - } - #[doc = "Bit 7 - I2C Clock Low Timeout"] - #[inline(always)] - pub fn clkloto(&self) -> CLKLOTO_R { - CLKLOTO_R::new(((self.bits >> 7) & 0x01) != 0) - } - #[doc = "Bit 10 - TX FIFO Overflowed"] - #[inline(always)] - pub fn txoverflow(&self) -> TXOVERFLOW_R { - TXOVERFLOW_R::new(((self.bits >> 10) & 0x01) != 0) - } - #[doc = "Bit 11 - TX FIFO Overflowed"] - #[inline(always)] - pub fn rxoverflow(&self) -> RXOVERFLOW_R { - RXOVERFLOW_R::new(((self.bits >> 11) & 0x01) != 0) - } - #[doc = "Bit 12 - TX FIFO Ready"] - #[inline(always)] - pub fn txready(&self) -> TXREADY_R { - TXREADY_R::new(((self.bits >> 12) & 0x01) != 0) - } - #[doc = "Bit 13 - RX FIFO Ready"] - #[inline(always)] - pub fn rxready(&self) -> RXREADY_R { - RXREADY_R::new(((self.bits >> 13) & 0x01) != 0) - } - #[doc = "Bit 14 - TX FIFO Empty"] - #[inline(always)] - pub fn txempty(&self) -> TXEMPTY_R { - TXEMPTY_R::new(((self.bits >> 14) & 0x01) != 0) - } - #[doc = "Bit 15 - RX FIFO Full"] - #[inline(always)] - pub fn rxfull(&self) -> RXFULL_R { - RXFULL_R::new(((self.bits >> 15) & 0x01) != 0) - } -} -#[doc = "Enabled Interrupt Status Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [irq_end](index.html) module"] -pub struct IRQ_END_SPEC; -impl crate::RegisterSpec for IRQ_END_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [irq_end::R](R) reader structure"] -impl crate::Readable for IRQ_END_SPEC { - type Reader = R; -} -#[doc = "`reset()` method sets IRQ_END to value 0"] -impl crate::Resettable for IRQ_END_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } -} diff --git a/va416xx/src/i2c0/irq_raw.rs b/va416xx/src/i2c0/irq_raw.rs deleted file mode 100644 index e164ea0..0000000 --- a/va416xx/src/i2c0/irq_raw.rs +++ /dev/null @@ -1,313 +0,0 @@ -#[doc = "Register `IRQ_RAW` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Field `I2CIDLE` reader - I2C Bus is Idle"] -pub struct I2CIDLE_R(crate::FieldReader); -impl I2CIDLE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - I2CIDLE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for I2CIDLE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `IDLE` reader - Controller is Idle"] -pub struct IDLE_R(crate::FieldReader); -impl IDLE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - IDLE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for IDLE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `WAITING` reader - Controller is Waiting"] -pub struct WAITING_R(crate::FieldReader); -impl WAITING_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - WAITING_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for WAITING_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `STALLED` reader - Controller is Stalled"] -pub struct STALLED_R(crate::FieldReader); -impl STALLED_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - STALLED_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for STALLED_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `ARBLOST` reader - I2C Arbitration was lost"] -pub struct ARBLOST_R(crate::FieldReader); -impl ARBLOST_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - ARBLOST_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ARBLOST_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `NACKADDR` reader - I2C Address was not Acknowledged"] -pub struct NACKADDR_R(crate::FieldReader); -impl NACKADDR_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - NACKADDR_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for NACKADDR_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `NACKDATA` reader - I2C Data was not Acknowledged"] -pub struct NACKDATA_R(crate::FieldReader); -impl NACKDATA_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - NACKDATA_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for NACKDATA_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CLKLOTO` reader - I2C Clock Low Timeout"] -pub struct CLKLOTO_R(crate::FieldReader); -impl CLKLOTO_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CLKLOTO_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CLKLOTO_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TXOVERFLOW` reader - TX FIFO Overflowed"] -pub struct TXOVERFLOW_R(crate::FieldReader); -impl TXOVERFLOW_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXOVERFLOW_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXOVERFLOW_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RXOVERFLOW` reader - TX FIFO Overflowed"] -pub struct RXOVERFLOW_R(crate::FieldReader); -impl RXOVERFLOW_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXOVERFLOW_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXOVERFLOW_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TXREADY` reader - TX FIFO Ready"] -pub struct TXREADY_R(crate::FieldReader); -impl TXREADY_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXREADY_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXREADY_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RXREADY` reader - RX FIFO Ready"] -pub struct RXREADY_R(crate::FieldReader); -impl RXREADY_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXREADY_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXREADY_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TXEMPTY` reader - TX FIFO Empty"] -pub struct TXEMPTY_R(crate::FieldReader); -impl TXEMPTY_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXEMPTY_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXEMPTY_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RXFULL` reader - RX FIFO Full"] -pub struct RXFULL_R(crate::FieldReader); -impl RXFULL_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXFULL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXFULL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl R { - #[doc = "Bit 0 - I2C Bus is Idle"] - #[inline(always)] - pub fn i2cidle(&self) -> I2CIDLE_R { - I2CIDLE_R::new((self.bits & 0x01) != 0) - } - #[doc = "Bit 1 - Controller is Idle"] - #[inline(always)] - pub fn idle(&self) -> IDLE_R { - IDLE_R::new(((self.bits >> 1) & 0x01) != 0) - } - #[doc = "Bit 2 - Controller is Waiting"] - #[inline(always)] - pub fn waiting(&self) -> WAITING_R { - WAITING_R::new(((self.bits >> 2) & 0x01) != 0) - } - #[doc = "Bit 3 - Controller is Stalled"] - #[inline(always)] - pub fn stalled(&self) -> STALLED_R { - STALLED_R::new(((self.bits >> 3) & 0x01) != 0) - } - #[doc = "Bit 4 - I2C Arbitration was lost"] - #[inline(always)] - pub fn arblost(&self) -> ARBLOST_R { - ARBLOST_R::new(((self.bits >> 4) & 0x01) != 0) - } - #[doc = "Bit 5 - I2C Address was not Acknowledged"] - #[inline(always)] - pub fn nackaddr(&self) -> NACKADDR_R { - NACKADDR_R::new(((self.bits >> 5) & 0x01) != 0) - } - #[doc = "Bit 6 - I2C Data was not Acknowledged"] - #[inline(always)] - pub fn nackdata(&self) -> NACKDATA_R { - NACKDATA_R::new(((self.bits >> 6) & 0x01) != 0) - } - #[doc = "Bit 7 - I2C Clock Low Timeout"] - #[inline(always)] - pub fn clkloto(&self) -> CLKLOTO_R { - CLKLOTO_R::new(((self.bits >> 7) & 0x01) != 0) - } - #[doc = "Bit 10 - TX FIFO Overflowed"] - #[inline(always)] - pub fn txoverflow(&self) -> TXOVERFLOW_R { - TXOVERFLOW_R::new(((self.bits >> 10) & 0x01) != 0) - } - #[doc = "Bit 11 - TX FIFO Overflowed"] - #[inline(always)] - pub fn rxoverflow(&self) -> RXOVERFLOW_R { - RXOVERFLOW_R::new(((self.bits >> 11) & 0x01) != 0) - } - #[doc = "Bit 12 - TX FIFO Ready"] - #[inline(always)] - pub fn txready(&self) -> TXREADY_R { - TXREADY_R::new(((self.bits >> 12) & 0x01) != 0) - } - #[doc = "Bit 13 - RX FIFO Ready"] - #[inline(always)] - pub fn rxready(&self) -> RXREADY_R { - RXREADY_R::new(((self.bits >> 13) & 0x01) != 0) - } - #[doc = "Bit 14 - TX FIFO Empty"] - #[inline(always)] - pub fn txempty(&self) -> TXEMPTY_R { - TXEMPTY_R::new(((self.bits >> 14) & 0x01) != 0) - } - #[doc = "Bit 15 - RX FIFO Full"] - #[inline(always)] - pub fn rxfull(&self) -> RXFULL_R { - RXFULL_R::new(((self.bits >> 15) & 0x01) != 0) - } -} -#[doc = "Raw Interrupt Status Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [irq_raw](index.html) module"] -pub struct IRQ_RAW_SPEC; -impl crate::RegisterSpec for IRQ_RAW_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [irq_raw::R](R) reader structure"] -impl crate::Readable for IRQ_RAW_SPEC { - type Reader = R; -} -#[doc = "`reset()` method sets IRQ_RAW to value 0"] -impl crate::Resettable for IRQ_RAW_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } -} diff --git a/va416xx/src/i2c0/perid.rs b/va416xx/src/i2c0/perid.rs index 7c969be..832d608 100644 --- a/va416xx/src/i2c0/perid.rs +++ b/va416xx/src/i2c0/perid.rs @@ -1,31 +1,18 @@ #[doc = "Register `PERID` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 +pub type R = crate::R; +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) } } -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Peripheral ID Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [perid](index.html) module"] -pub struct PERID_SPEC; -impl crate::RegisterSpec for PERID_SPEC { +#[doc = "Peripheral ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`perid::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PeridSpec; +impl crate::RegisterSpec for PeridSpec { type Ux = u32; } -#[doc = "`read()` method returns [perid::R](R) reader structure"] -impl crate::Readable for PERID_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`perid::R`](R) reader structure"] +impl crate::Readable for PeridSpec {} #[doc = "`reset()` method sets PERID to value 0x0214_07e9"] -impl crate::Resettable for PERID_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0x0214_07e9 - } +impl crate::Resettable for PeridSpec { + const RESET_VALUE: u32 = 0x0214_07e9; } diff --git a/va416xx/src/i2c0/rxcount.rs b/va416xx/src/i2c0/rxcount.rs index 7feb8bc..b7b6d5a 100644 --- a/va416xx/src/i2c0/rxcount.rs +++ b/va416xx/src/i2c0/rxcount.rs @@ -1,31 +1,18 @@ #[doc = "Register `RXCOUNT` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 +pub type R = crate::R; +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) } } -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "RX Count Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxcount](index.html) module"] -pub struct RXCOUNT_SPEC; -impl crate::RegisterSpec for RXCOUNT_SPEC { +#[doc = "RX Count Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxcount::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RxcountSpec; +impl crate::RegisterSpec for RxcountSpec { type Ux = u32; } -#[doc = "`read()` method returns [rxcount::R](R) reader structure"] -impl crate::Readable for RXCOUNT_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`rxcount::R`](R) reader structure"] +impl crate::Readable for RxcountSpec {} #[doc = "`reset()` method sets RXCOUNT to value 0"] -impl crate::Resettable for RXCOUNT_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for RxcountSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/i2c0/rxfifoirqtrg.rs b/va416xx/src/i2c0/rxfifoirqtrg.rs index fb4d239..46124d5 100644 --- a/va416xx/src/i2c0/rxfifoirqtrg.rs +++ b/va416xx/src/i2c0/rxfifoirqtrg.rs @@ -1,64 +1,27 @@ #[doc = "Register `RXFIFOIRQTRG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RXFIFOIRQTRG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 +pub type W = crate::W; +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) } } -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -impl W { - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "Rx FIFO IRQ Trigger Level\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxfifoirqtrg](index.html) module"] -pub struct RXFIFOIRQTRG_SPEC; -impl crate::RegisterSpec for RXFIFOIRQTRG_SPEC { +impl W {} +#[doc = "Rx FIFO IRQ Trigger Level\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxfifoirqtrg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rxfifoirqtrg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RxfifoirqtrgSpec; +impl crate::RegisterSpec for RxfifoirqtrgSpec { type Ux = u32; } -#[doc = "`read()` method returns [rxfifoirqtrg::R](R) reader structure"] -impl crate::Readable for RXFIFOIRQTRG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [rxfifoirqtrg::W](W) writer structure"] -impl crate::Writable for RXFIFOIRQTRG_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`rxfifoirqtrg::R`](R) reader structure"] +impl crate::Readable for RxfifoirqtrgSpec {} +#[doc = "`write(|w| ..)` method takes [`rxfifoirqtrg::W`](W) writer structure"] +impl crate::Writable for RxfifoirqtrgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RXFIFOIRQTRG to value 0"] -impl crate::Resettable for RXFIFOIRQTRG_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for RxfifoirqtrgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/i2c0/s0_address.rs b/va416xx/src/i2c0/s0_address.rs index 87e9f74..69d3dbe 100644 --- a/va416xx/src/i2c0/s0_address.rs +++ b/va416xx/src/i2c0/s0_address.rs @@ -1,197 +1,70 @@ #[doc = "Register `S0_ADDRESS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `S0_ADDRESS` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `A10MODE` reader - Enable 10b address mode"] -pub struct A10MODE_R(crate::FieldReader); -impl A10MODE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - A10MODE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for A10MODE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `A10MODE` writer - Enable 10b address mode"] -pub struct A10MODE_W<'a> { - w: &'a mut W, -} -impl<'a> A10MODE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); - self.w - } -} -#[doc = "Field `ADDRESS` reader - Address value"] -pub struct ADDRESS_R(crate::FieldReader); -impl ADDRESS_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - ADDRESS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ADDRESS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `ADDRESS` writer - Address value"] -pub struct ADDRESS_W<'a> { - w: &'a mut W, -} -impl<'a> ADDRESS_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x03ff << 1)) | ((value as u32 & 0x03ff) << 1); - self.w - } -} +pub type W = crate::W; #[doc = "Field `RW` reader - Read/Write value"] -pub struct RW_R(crate::FieldReader); -impl RW_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RW_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RW_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type RwR = crate::BitReader; #[doc = "Field `RW` writer - Read/Write value"] -pub struct RW_W<'a> { - w: &'a mut W, -} -impl<'a> RW_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} +pub type RwW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `ADDRESS` reader - Address value"] +pub type AddressR = crate::FieldReader; +#[doc = "Field `ADDRESS` writer - Address value"] +pub type AddressW<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; +#[doc = "Field `A10MODE` reader - Enable 10b address mode"] +pub type A10modeR = crate::BitReader; +#[doc = "Field `A10MODE` writer - Enable 10b address mode"] +pub type A10modeW<'a, REG> = crate::BitWriter<'a, REG>; impl R { - #[doc = "Bit 15 - Enable 10b address mode"] + #[doc = "Bit 0 - Read/Write value"] #[inline(always)] - pub fn a10mode(&self) -> A10MODE_R { - A10MODE_R::new(((self.bits >> 15) & 0x01) != 0) + pub fn rw(&self) -> RwR { + RwR::new((self.bits & 1) != 0) } #[doc = "Bits 1:10 - Address value"] #[inline(always)] - pub fn address(&self) -> ADDRESS_R { - ADDRESS_R::new(((self.bits >> 1) & 0x03ff) as u16) + pub fn address(&self) -> AddressR { + AddressR::new(((self.bits >> 1) & 0x03ff) as u16) } - #[doc = "Bit 0 - Read/Write value"] + #[doc = "Bit 15 - Enable 10b address mode"] #[inline(always)] - pub fn rw(&self) -> RW_R { - RW_R::new((self.bits & 0x01) != 0) + pub fn a10mode(&self) -> A10modeR { + A10modeR::new(((self.bits >> 15) & 1) != 0) } } impl W { - #[doc = "Bit 15 - Enable 10b address mode"] + #[doc = "Bit 0 - Read/Write value"] #[inline(always)] - pub fn a10mode(&mut self) -> A10MODE_W { - A10MODE_W { w: self } + #[must_use] + pub fn rw(&mut self) -> RwW { + RwW::new(self, 0) } #[doc = "Bits 1:10 - Address value"] #[inline(always)] - pub fn address(&mut self) -> ADDRESS_W { - ADDRESS_W { w: self } + #[must_use] + pub fn address(&mut self) -> AddressW { + AddressW::new(self, 1) } - #[doc = "Bit 0 - Read/Write value"] + #[doc = "Bit 15 - Enable 10b address mode"] #[inline(always)] - pub fn rw(&mut self) -> RW_W { - RW_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn a10mode(&mut self) -> A10modeW { + A10modeW::new(self, 15) } } -#[doc = "Slave I2C Address Value\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [s0_address](index.html) module"] -pub struct S0_ADDRESS_SPEC; -impl crate::RegisterSpec for S0_ADDRESS_SPEC { +#[doc = "Slave I2C Address Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`s0_address::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`s0_address::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct S0AddressSpec; +impl crate::RegisterSpec for S0AddressSpec { type Ux = u32; } -#[doc = "`read()` method returns [s0_address::R](R) reader structure"] -impl crate::Readable for S0_ADDRESS_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [s0_address::W](W) writer structure"] -impl crate::Writable for S0_ADDRESS_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`s0_address::R`](R) reader structure"] +impl crate::Readable for S0AddressSpec {} +#[doc = "`write(|w| ..)` method takes [`s0_address::W`](W) writer structure"] +impl crate::Writable for S0AddressSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets S0_ADDRESS to value 0"] -impl crate::Resettable for S0_ADDRESS_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for S0AddressSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/i2c0/s0_addressb.rs b/va416xx/src/i2c0/s0_addressb.rs index 5d74434..c82d283 100644 --- a/va416xx/src/i2c0/s0_addressb.rs +++ b/va416xx/src/i2c0/s0_addressb.rs @@ -1,197 +1,70 @@ #[doc = "Register `S0_ADDRESSB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `S0_ADDRESSB` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RW` reader - Read write value"] -pub struct RW_R(crate::FieldReader); -impl RW_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RW_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RW_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type RwR = crate::BitReader; #[doc = "Field `RW` writer - Read write value"] -pub struct RW_W<'a> { - w: &'a mut W, -} -impl<'a> RW_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} +pub type RwW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ADDRESS` reader - Address value"] -pub struct ADDRESS_R(crate::FieldReader); -impl ADDRESS_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - ADDRESS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ADDRESS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type AddressR = crate::FieldReader; #[doc = "Field `ADDRESS` writer - Address value"] -pub struct ADDRESS_W<'a> { - w: &'a mut W, -} -impl<'a> ADDRESS_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x03ff << 1)) | ((value as u32 & 0x03ff) << 1); - self.w - } -} +pub type AddressW<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; #[doc = "Field `ADDRESSBEN` reader - Enable Address B"] -pub struct ADDRESSBEN_R(crate::FieldReader); -impl ADDRESSBEN_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - ADDRESSBEN_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ADDRESSBEN_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type AddressbenR = crate::BitReader; #[doc = "Field `ADDRESSBEN` writer - Enable Address B"] -pub struct ADDRESSBEN_W<'a> { - w: &'a mut W, -} -impl<'a> ADDRESSBEN_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); - self.w - } -} +pub type AddressbenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Read write value"] #[inline(always)] - pub fn rw(&self) -> RW_R { - RW_R::new((self.bits & 0x01) != 0) + pub fn rw(&self) -> RwR { + RwR::new((self.bits & 1) != 0) } #[doc = "Bits 1:10 - Address value"] #[inline(always)] - pub fn address(&self) -> ADDRESS_R { - ADDRESS_R::new(((self.bits >> 1) & 0x03ff) as u16) + pub fn address(&self) -> AddressR { + AddressR::new(((self.bits >> 1) & 0x03ff) as u16) } #[doc = "Bit 15 - Enable Address B"] #[inline(always)] - pub fn addressben(&self) -> ADDRESSBEN_R { - ADDRESSBEN_R::new(((self.bits >> 15) & 0x01) != 0) + pub fn addressben(&self) -> AddressbenR { + AddressbenR::new(((self.bits >> 15) & 1) != 0) } } impl W { #[doc = "Bit 0 - Read write value"] #[inline(always)] - pub fn rw(&mut self) -> RW_W { - RW_W { w: self } + #[must_use] + pub fn rw(&mut self) -> RwW { + RwW::new(self, 0) } #[doc = "Bits 1:10 - Address value"] #[inline(always)] - pub fn address(&mut self) -> ADDRESS_W { - ADDRESS_W { w: self } + #[must_use] + pub fn address(&mut self) -> AddressW { + AddressW::new(self, 1) } #[doc = "Bit 15 - Enable Address B"] #[inline(always)] - pub fn addressben(&mut self) -> ADDRESSBEN_W { - ADDRESSBEN_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn addressben(&mut self) -> AddressbenW { + AddressbenW::new(self, 15) } } -#[doc = "Slave I2C Address B Value\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [s0_addressb](index.html) module"] -pub struct S0_ADDRESSB_SPEC; -impl crate::RegisterSpec for S0_ADDRESSB_SPEC { +#[doc = "Slave I2C Address B Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`s0_addressb::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`s0_addressb::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct S0AddressbSpec; +impl crate::RegisterSpec for S0AddressbSpec { type Ux = u32; } -#[doc = "`read()` method returns [s0_addressb::R](R) reader structure"] -impl crate::Readable for S0_ADDRESSB_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [s0_addressb::W](W) writer structure"] -impl crate::Writable for S0_ADDRESSB_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`s0_addressb::R`](R) reader structure"] +impl crate::Readable for S0AddressbSpec {} +#[doc = "`write(|w| ..)` method takes [`s0_addressb::W`](W) writer structure"] +impl crate::Writable for S0AddressbSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets S0_ADDRESSB to value 0"] -impl crate::Resettable for S0_ADDRESSB_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for S0AddressbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/i2c0/s0_addressmask.rs b/va416xx/src/i2c0/s0_addressmask.rs index 038fd85..bcc7051 100644 --- a/va416xx/src/i2c0/s0_addressmask.rs +++ b/va416xx/src/i2c0/s0_addressmask.rs @@ -1,150 +1,55 @@ #[doc = "Register `S0_ADDRESSMASK` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `S0_ADDRESSMASK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `MASK` reader - Address mask value"] -pub struct MASK_R(crate::FieldReader); -impl MASK_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - MASK_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for MASK_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `MASK` writer - Address mask value"] -pub struct MASK_W<'a> { - w: &'a mut W, -} -impl<'a> MASK_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x03ff << 1)) | ((value as u32 & 0x03ff) << 1); - self.w - } -} +pub type W = crate::W; #[doc = "Field `RWMASK` reader - Read/Write mask"] -pub struct RWMASK_R(crate::FieldReader); -impl RWMASK_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RWMASK_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RWMASK_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type RwmaskR = crate::BitReader; #[doc = "Field `RWMASK` writer - Read/Write mask"] -pub struct RWMASK_W<'a> { - w: &'a mut W, -} -impl<'a> RWMASK_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} +pub type RwmaskW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `MASK` reader - Address mask value"] +pub type MaskR = crate::FieldReader; +#[doc = "Field `MASK` writer - Address mask value"] +pub type MaskW<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; impl R { - #[doc = "Bits 1:10 - Address mask value"] - #[inline(always)] - pub fn mask(&self) -> MASK_R { - MASK_R::new(((self.bits >> 1) & 0x03ff) as u16) - } #[doc = "Bit 0 - Read/Write mask"] #[inline(always)] - pub fn rwmask(&self) -> RWMASK_R { - RWMASK_R::new((self.bits & 0x01) != 0) + pub fn rwmask(&self) -> RwmaskR { + RwmaskR::new((self.bits & 1) != 0) + } + #[doc = "Bits 1:10 - Address mask value"] + #[inline(always)] + pub fn mask(&self) -> MaskR { + MaskR::new(((self.bits >> 1) & 0x03ff) as u16) } } impl W { - #[doc = "Bits 1:10 - Address mask value"] - #[inline(always)] - pub fn mask(&mut self) -> MASK_W { - MASK_W { w: self } - } #[doc = "Bit 0 - Read/Write mask"] #[inline(always)] - pub fn rwmask(&mut self) -> RWMASK_W { - RWMASK_W { w: self } + #[must_use] + pub fn rwmask(&mut self) -> RwmaskW { + RwmaskW::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 1:10 - Address mask value"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn mask(&mut self) -> MaskW { + MaskW::new(self, 1) } } -#[doc = "Slave I2C Address Mask value\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [s0_addressmask](index.html) module"] -pub struct S0_ADDRESSMASK_SPEC; -impl crate::RegisterSpec for S0_ADDRESSMASK_SPEC { +#[doc = "Slave I2C Address Mask value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`s0_addressmask::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`s0_addressmask::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct S0AddressmaskSpec; +impl crate::RegisterSpec for S0AddressmaskSpec { type Ux = u32; } -#[doc = "`read()` method returns [s0_addressmask::R](R) reader structure"] -impl crate::Readable for S0_ADDRESSMASK_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [s0_addressmask::W](W) writer structure"] -impl crate::Writable for S0_ADDRESSMASK_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`s0_addressmask::R`](R) reader structure"] +impl crate::Readable for S0AddressmaskSpec {} +#[doc = "`write(|w| ..)` method takes [`s0_addressmask::W`](W) writer structure"] +impl crate::Writable for S0AddressmaskSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets S0_ADDRESSMASK to value 0"] -impl crate::Resettable for S0_ADDRESSMASK_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for S0AddressmaskSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/i2c0/s0_addressmaskb.rs b/va416xx/src/i2c0/s0_addressmaskb.rs index b3af7b4..a7b22f0 100644 --- a/va416xx/src/i2c0/s0_addressmaskb.rs +++ b/va416xx/src/i2c0/s0_addressmaskb.rs @@ -1,150 +1,55 @@ #[doc = "Register `S0_ADDRESSMASKB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `S0_ADDRESSMASKB` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RWMASK` reader - Read write mask"] -pub struct RWMASK_R(crate::FieldReader); -impl RWMASK_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RWMASK_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RWMASK_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type RwmaskR = crate::BitReader; #[doc = "Field `RWMASK` writer - Read write mask"] -pub struct RWMASK_W<'a> { - w: &'a mut W, -} -impl<'a> RWMASK_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} +pub type RwmaskW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MASK` reader - Address mask value"] -pub struct MASK_R(crate::FieldReader); -impl MASK_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - MASK_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for MASK_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type MaskR = crate::FieldReader; #[doc = "Field `MASK` writer - Address mask value"] -pub struct MASK_W<'a> { - w: &'a mut W, -} -impl<'a> MASK_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x03ff << 1)) | ((value as u32 & 0x03ff) << 1); - self.w - } -} +pub type MaskW<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; impl R { #[doc = "Bit 0 - Read write mask"] #[inline(always)] - pub fn rwmask(&self) -> RWMASK_R { - RWMASK_R::new((self.bits & 0x01) != 0) + pub fn rwmask(&self) -> RwmaskR { + RwmaskR::new((self.bits & 1) != 0) } #[doc = "Bits 1:10 - Address mask value"] #[inline(always)] - pub fn mask(&self) -> MASK_R { - MASK_R::new(((self.bits >> 1) & 0x03ff) as u16) + pub fn mask(&self) -> MaskR { + MaskR::new(((self.bits >> 1) & 0x03ff) as u16) } } impl W { #[doc = "Bit 0 - Read write mask"] #[inline(always)] - pub fn rwmask(&mut self) -> RWMASK_W { - RWMASK_W { w: self } + #[must_use] + pub fn rwmask(&mut self) -> RwmaskW { + RwmaskW::new(self, 0) } #[doc = "Bits 1:10 - Address mask value"] #[inline(always)] - pub fn mask(&mut self) -> MASK_W { - MASK_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn mask(&mut self) -> MaskW { + MaskW::new(self, 1) } } -#[doc = "Slave I2C Address B Mask value\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [s0_addressmaskb](index.html) module"] -pub struct S0_ADDRESSMASKB_SPEC; -impl crate::RegisterSpec for S0_ADDRESSMASKB_SPEC { +#[doc = "Slave I2C Address B Mask value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`s0_addressmaskb::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`s0_addressmaskb::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct S0AddressmaskbSpec; +impl crate::RegisterSpec for S0AddressmaskbSpec { type Ux = u32; } -#[doc = "`read()` method returns [s0_addressmaskb::R](R) reader structure"] -impl crate::Readable for S0_ADDRESSMASKB_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [s0_addressmaskb::W](W) writer structure"] -impl crate::Writable for S0_ADDRESSMASKB_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`s0_addressmaskb::R`](R) reader structure"] +impl crate::Readable for S0AddressmaskbSpec {} +#[doc = "`write(|w| ..)` method takes [`s0_addressmaskb::W`](W) writer structure"] +impl crate::Writable for S0AddressmaskbSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets S0_ADDRESSMASKB to value 0x07fe"] -impl crate::Resettable for S0_ADDRESSMASKB_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0x07fe - } +impl crate::Resettable for S0AddressmaskbSpec { + const RESET_VALUE: u32 = 0x07fe; } diff --git a/va416xx/src/i2c0/s0_ctrl.rs b/va416xx/src/i2c0/s0_ctrl.rs index 9cb3965..c22d6de 100644 --- a/va416xx/src/i2c0/s0_ctrl.rs +++ b/va416xx/src/i2c0/s0_ctrl.rs @@ -1,301 +1,100 @@ #[doc = "Register `S0_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `S0_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CLKENABLED` reader - I2C Enabled"] -pub struct CLKENABLED_R(crate::FieldReader); -impl CLKENABLED_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CLKENABLED_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CLKENABLED_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type ClkenabledR = crate::BitReader; #[doc = "Field `CLKENABLED` writer - I2C Enabled"] -pub struct CLKENABLED_W<'a> { - w: &'a mut W, -} -impl<'a> CLKENABLED_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} +pub type ClkenabledW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ENABLED` reader - I2C Activated"] -pub struct ENABLED_R(crate::FieldReader); -impl ENABLED_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - ENABLED_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ENABLED_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type EnabledR = crate::BitReader; #[doc = "Field `ENABLED` writer - I2C Activated"] -pub struct ENABLED_W<'a> { - w: &'a mut W, -} -impl<'a> ENABLED_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); - self.w - } -} +pub type EnabledW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ENABLE` reader - I2C Active"] -pub struct ENABLE_R(crate::FieldReader); -impl ENABLE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - ENABLE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ENABLE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type EnableR = crate::BitReader; #[doc = "Field `ENABLE` writer - I2C Active"] -pub struct ENABLE_W<'a> { - w: &'a mut W, -} -impl<'a> ENABLE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); - self.w - } -} +pub type EnableW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXFEMD` reader - TX FIFIO Empty Mode"] -pub struct TXFEMD_R(crate::FieldReader); -impl TXFEMD_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXFEMD_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXFEMD_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type TxfemdR = crate::BitReader; #[doc = "Field `TXFEMD` writer - TX FIFIO Empty Mode"] -pub struct TXFEMD_W<'a> { - w: &'a mut W, -} -impl<'a> TXFEMD_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); - self.w - } -} +pub type TxfemdW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXFFMD` reader - RX FIFO Full Mode"] -pub struct RXFFMD_R(crate::FieldReader); -impl RXFFMD_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXFFMD_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXFFMD_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type RxffmdR = crate::BitReader; #[doc = "Field `RXFFMD` writer - RX FIFO Full Mode"] -pub struct RXFFMD_W<'a> { - w: &'a mut W, -} -impl<'a> RXFFMD_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); - self.w - } -} +pub type RxffmdW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - I2C Enabled"] #[inline(always)] - pub fn clkenabled(&self) -> CLKENABLED_R { - CLKENABLED_R::new((self.bits & 0x01) != 0) + pub fn clkenabled(&self) -> ClkenabledR { + ClkenabledR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - I2C Activated"] #[inline(always)] - pub fn enabled(&self) -> ENABLED_R { - ENABLED_R::new(((self.bits >> 1) & 0x01) != 0) + pub fn enabled(&self) -> EnabledR { + EnabledR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - I2C Active"] #[inline(always)] - pub fn enable(&self) -> ENABLE_R { - ENABLE_R::new(((self.bits >> 2) & 0x01) != 0) + pub fn enable(&self) -> EnableR { + EnableR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - TX FIFIO Empty Mode"] #[inline(always)] - pub fn txfemd(&self) -> TXFEMD_R { - TXFEMD_R::new(((self.bits >> 3) & 0x01) != 0) + pub fn txfemd(&self) -> TxfemdR { + TxfemdR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - RX FIFO Full Mode"] #[inline(always)] - pub fn rxffmd(&self) -> RXFFMD_R { - RXFFMD_R::new(((self.bits >> 4) & 0x01) != 0) + pub fn rxffmd(&self) -> RxffmdR { + RxffmdR::new(((self.bits >> 4) & 1) != 0) } } impl W { #[doc = "Bit 0 - I2C Enabled"] #[inline(always)] - pub fn clkenabled(&mut self) -> CLKENABLED_W { - CLKENABLED_W { w: self } + #[must_use] + pub fn clkenabled(&mut self) -> ClkenabledW { + ClkenabledW::new(self, 0) } #[doc = "Bit 1 - I2C Activated"] #[inline(always)] - pub fn enabled(&mut self) -> ENABLED_W { - ENABLED_W { w: self } + #[must_use] + pub fn enabled(&mut self) -> EnabledW { + EnabledW::new(self, 1) } #[doc = "Bit 2 - I2C Active"] #[inline(always)] - pub fn enable(&mut self) -> ENABLE_W { - ENABLE_W { w: self } + #[must_use] + pub fn enable(&mut self) -> EnableW { + EnableW::new(self, 2) } #[doc = "Bit 3 - TX FIFIO Empty Mode"] #[inline(always)] - pub fn txfemd(&mut self) -> TXFEMD_W { - TXFEMD_W { w: self } + #[must_use] + pub fn txfemd(&mut self) -> TxfemdW { + TxfemdW::new(self, 3) } #[doc = "Bit 4 - RX FIFO Full Mode"] #[inline(always)] - pub fn rxffmd(&mut self) -> RXFFMD_W { - RXFFMD_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn rxffmd(&mut self) -> RxffmdW { + RxffmdW::new(self, 4) } } -#[doc = "Slave Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [s0_ctrl](index.html) module"] -pub struct S0_CTRL_SPEC; -impl crate::RegisterSpec for S0_CTRL_SPEC { +#[doc = "Slave Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`s0_ctrl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`s0_ctrl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct S0CtrlSpec; +impl crate::RegisterSpec for S0CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [s0_ctrl::R](R) reader structure"] -impl crate::Readable for S0_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [s0_ctrl::W](W) writer structure"] -impl crate::Writable for S0_CTRL_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`s0_ctrl::R`](R) reader structure"] +impl crate::Readable for S0CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`s0_ctrl::W`](W) writer structure"] +impl crate::Writable for S0CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets S0_CTRL to value 0"] -impl crate::Resettable for S0_CTRL_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for S0CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/i2c0/s0_data.rs b/va416xx/src/i2c0/s0_data.rs index d8229cc..0429280 100644 --- a/va416xx/src/i2c0/s0_data.rs +++ b/va416xx/src/i2c0/s0_data.rs @@ -1,103 +1,40 @@ #[doc = "Register `S0_DATA` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `S0_DATA` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `VALUE` reader - I2C data value"] -pub struct VALUE_R(crate::FieldReader); -impl VALUE_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - VALUE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for VALUE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type ValueR = crate::FieldReader; #[doc = "Field `VALUE` writer - I2C data value"] -pub struct VALUE_W<'a> { - w: &'a mut W, -} -impl<'a> VALUE_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type ValueW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - I2C data value"] #[inline(always)] - pub fn value(&self) -> VALUE_R { - VALUE_R::new((self.bits & 0xff) as u8) + pub fn value(&self) -> ValueR { + ValueR::new((self.bits & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - I2C data value"] #[inline(always)] - pub fn value(&mut self) -> VALUE_W { - VALUE_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn value(&mut self) -> ValueW { + ValueW::new(self, 0) } } -#[doc = "Slave Data Input/Output\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [s0_data](index.html) module"] -pub struct S0_DATA_SPEC; -impl crate::RegisterSpec for S0_DATA_SPEC { +#[doc = "Slave Data Input/Output\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`s0_data::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`s0_data::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct S0DataSpec; +impl crate::RegisterSpec for S0DataSpec { type Ux = u32; } -#[doc = "`read()` method returns [s0_data::R](R) reader structure"] -impl crate::Readable for S0_DATA_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [s0_data::W](W) writer structure"] -impl crate::Writable for S0_DATA_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`s0_data::R`](R) reader structure"] +impl crate::Readable for S0DataSpec {} +#[doc = "`write(|w| ..)` method takes [`s0_data::W`](W) writer structure"] +impl crate::Writable for S0DataSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets S0_DATA to value 0"] -impl crate::Resettable for S0_DATA_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for S0DataSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/i2c0/s0_fifo_clr.rs b/va416xx/src/i2c0/s0_fifo_clr.rs index f9cc956..0d5dd60 100644 --- a/va416xx/src/i2c0/s0_fifo_clr.rs +++ b/va416xx/src/i2c0/s0_fifo_clr.rs @@ -1,99 +1,35 @@ #[doc = "Register `S0_FIFO_CLR` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RXFIFO` writer - Clear Rx FIFO"] -pub struct RXFIFO_W<'a> { - w: &'a mut W, -} -impl<'a> RXFIFO_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} +pub type RxfifoW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXFIFO` writer - Clear Tx FIFO"] -pub struct TXFIFO_W<'a> { - w: &'a mut W, -} -impl<'a> TXFIFO_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); - self.w - } -} +pub type TxfifoW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Clear Rx FIFO"] #[inline(always)] - pub fn rxfifo(&mut self) -> RXFIFO_W { - RXFIFO_W { w: self } + #[must_use] + pub fn rxfifo(&mut self) -> RxfifoW { + RxfifoW::new(self, 0) } #[doc = "Bit 1 - Clear Tx FIFO"] #[inline(always)] - pub fn txfifo(&mut self) -> TXFIFO_W { - TXFIFO_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn txfifo(&mut self) -> TxfifoW { + TxfifoW::new(self, 1) } } -#[doc = "Slave Clear FIFO Register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [s0_fifo_clr](index.html) module"] -pub struct S0_FIFO_CLR_SPEC; -impl crate::RegisterSpec for S0_FIFO_CLR_SPEC { +#[doc = "Slave Clear FIFO Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`s0_fifo_clr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct S0FifoClrSpec; +impl crate::RegisterSpec for S0FifoClrSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [s0_fifo_clr::W](W) writer structure"] -impl crate::Writable for S0_FIFO_CLR_SPEC { - type Writer = W; +#[doc = "`write(|w| ..)` method takes [`s0_fifo_clr::W`](W) writer structure"] +impl crate::Writable for S0FifoClrSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets S0_FIFO_CLR to value 0"] -impl crate::Resettable for S0_FIFO_CLR_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for S0FifoClrSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/i2c0/s0_irq_clr.rs b/va416xx/src/i2c0/s0_irq_clr.rs deleted file mode 100644 index 0024cd9..0000000 --- a/va416xx/src/i2c0/s0_irq_clr.rs +++ /dev/null @@ -1,477 +0,0 @@ -#[doc = "Register `S0_IRQ_CLR` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `COMPLETED` writer - Controller Complted a Transaction"] -pub struct COMPLETED_W<'a> { - w: &'a mut W, -} -impl<'a> COMPLETED_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} -#[doc = "Field `IDLE` writer - Controller is Idle"] -pub struct IDLE_W<'a> { - w: &'a mut W, -} -impl<'a> IDLE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); - self.w - } -} -#[doc = "Field `WAITING` writer - Controller is Waiting"] -pub struct WAITING_W<'a> { - w: &'a mut W, -} -impl<'a> WAITING_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); - self.w - } -} -#[doc = "Field `TXSTALLED` writer - Controller is Tx Stalled"] -pub struct TXSTALLED_W<'a> { - w: &'a mut W, -} -impl<'a> TXSTALLED_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); - self.w - } -} -#[doc = "Field `RXSTALLED` writer - Controller is Rx Stalled"] -pub struct RXSTALLED_W<'a> { - w: &'a mut W, -} -impl<'a> RXSTALLED_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); - self.w - } -} -#[doc = "Field `ADDRESSMATCH` writer - I2C Address Match"] -pub struct ADDRESSMATCH_W<'a> { - w: &'a mut W, -} -impl<'a> ADDRESSMATCH_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); - self.w - } -} -#[doc = "Field `NACKDATA` writer - I2C Data was not Acknowledged"] -pub struct NACKDATA_W<'a> { - w: &'a mut W, -} -impl<'a> NACKDATA_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); - self.w - } -} -#[doc = "Field `RXDATAFIRST` writer - Pending Data is first Byte following Address"] -pub struct RXDATAFIRST_W<'a> { - w: &'a mut W, -} -impl<'a> RXDATAFIRST_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); - self.w - } -} -#[doc = "Field `I2C_START` writer - I2C Start Condition"] -pub struct I2C_START_W<'a> { - w: &'a mut W, -} -impl<'a> I2C_START_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); - self.w - } -} -#[doc = "Field `I2C_STOP` writer - I2C Stop Condition"] -pub struct I2C_STOP_W<'a> { - w: &'a mut W, -} -impl<'a> I2C_STOP_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); - self.w - } -} -#[doc = "Field `TXUNDERFLOW` writer - TX FIFO Underflowed"] -pub struct TXUNDERFLOW_W<'a> { - w: &'a mut W, -} -impl<'a> TXUNDERFLOW_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); - self.w - } -} -#[doc = "Field `RXOVERFLOW` writer - TX FIFO Overflowed"] -pub struct RXOVERFLOW_W<'a> { - w: &'a mut W, -} -impl<'a> RXOVERFLOW_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); - self.w - } -} -#[doc = "Field `TXREADY` writer - TX FIFO Ready"] -pub struct TXREADY_W<'a> { - w: &'a mut W, -} -impl<'a> TXREADY_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); - self.w - } -} -#[doc = "Field `RXREADY` writer - RX FIFO Ready"] -pub struct RXREADY_W<'a> { - w: &'a mut W, -} -impl<'a> RXREADY_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); - self.w - } -} -#[doc = "Field `TXEMPTY` writer - TX FIFO Empty"] -pub struct TXEMPTY_W<'a> { - w: &'a mut W, -} -impl<'a> TXEMPTY_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); - self.w - } -} -#[doc = "Field `RXFULL` writer - RX FIFO Full"] -pub struct RXFULL_W<'a> { - w: &'a mut W, -} -impl<'a> RXFULL_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); - self.w - } -} -impl W { - #[doc = "Bit 0 - Controller Complted a Transaction"] - #[inline(always)] - pub fn completed(&mut self) -> COMPLETED_W { - COMPLETED_W { w: self } - } - #[doc = "Bit 1 - Controller is Idle"] - #[inline(always)] - pub fn idle(&mut self) -> IDLE_W { - IDLE_W { w: self } - } - #[doc = "Bit 2 - Controller is Waiting"] - #[inline(always)] - pub fn waiting(&mut self) -> WAITING_W { - WAITING_W { w: self } - } - #[doc = "Bit 3 - Controller is Tx Stalled"] - #[inline(always)] - pub fn txstalled(&mut self) -> TXSTALLED_W { - TXSTALLED_W { w: self } - } - #[doc = "Bit 4 - Controller is Rx Stalled"] - #[inline(always)] - pub fn rxstalled(&mut self) -> RXSTALLED_W { - RXSTALLED_W { w: self } - } - #[doc = "Bit 5 - I2C Address Match"] - #[inline(always)] - pub fn addressmatch(&mut self) -> ADDRESSMATCH_W { - ADDRESSMATCH_W { w: self } - } - #[doc = "Bit 6 - I2C Data was not Acknowledged"] - #[inline(always)] - pub fn nackdata(&mut self) -> NACKDATA_W { - NACKDATA_W { w: self } - } - #[doc = "Bit 7 - Pending Data is first Byte following Address"] - #[inline(always)] - pub fn rxdatafirst(&mut self) -> RXDATAFIRST_W { - RXDATAFIRST_W { w: self } - } - #[doc = "Bit 8 - I2C Start Condition"] - #[inline(always)] - pub fn i2c_start(&mut self) -> I2C_START_W { - I2C_START_W { w: self } - } - #[doc = "Bit 9 - I2C Stop Condition"] - #[inline(always)] - pub fn i2c_stop(&mut self) -> I2C_STOP_W { - I2C_STOP_W { w: self } - } - #[doc = "Bit 10 - TX FIFO Underflowed"] - #[inline(always)] - pub fn txunderflow(&mut self) -> TXUNDERFLOW_W { - TXUNDERFLOW_W { w: self } - } - #[doc = "Bit 11 - TX FIFO Overflowed"] - #[inline(always)] - pub fn rxoverflow(&mut self) -> RXOVERFLOW_W { - RXOVERFLOW_W { w: self } - } - #[doc = "Bit 12 - TX FIFO Ready"] - #[inline(always)] - pub fn txready(&mut self) -> TXREADY_W { - TXREADY_W { w: self } - } - #[doc = "Bit 13 - RX FIFO Ready"] - #[inline(always)] - pub fn rxready(&mut self) -> RXREADY_W { - RXREADY_W { w: self } - } - #[doc = "Bit 14 - TX FIFO Empty"] - #[inline(always)] - pub fn txempty(&mut self) -> TXEMPTY_W { - TXEMPTY_W { w: self } - } - #[doc = "Bit 15 - RX FIFO Full"] - #[inline(always)] - pub fn rxfull(&mut self) -> RXFULL_W { - RXFULL_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "Slave Clear Interrupt Status Register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [s0_irq_clr](index.html) module"] -pub struct S0_IRQ_CLR_SPEC; -impl crate::RegisterSpec for S0_IRQ_CLR_SPEC { - type Ux = u32; -} -#[doc = "`write(|w| ..)` method takes [s0_irq_clr::W](W) writer structure"] -impl crate::Writable for S0_IRQ_CLR_SPEC { - type Writer = W; -} -#[doc = "`reset()` method sets S0_IRQ_CLR to value 0"] -impl crate::Resettable for S0_IRQ_CLR_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } -} diff --git a/va416xx/src/i2c0/s0_irq_enb.rs b/va416xx/src/i2c0/s0_irq_enb.rs index bd93ee9..a6a30e2 100644 --- a/va416xx/src/i2c0/s0_irq_enb.rs +++ b/va416xx/src/i2c0/s0_irq_enb.rs @@ -1,818 +1,265 @@ #[doc = "Register `S0_IRQ_ENB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `S0_IRQ_ENB` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `COMPLETED` reader - Controller Complted a Transaction"] -pub struct COMPLETED_R(crate::FieldReader); -impl COMPLETED_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - COMPLETED_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for COMPLETED_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type CompletedR = crate::BitReader; #[doc = "Field `COMPLETED` writer - Controller Complted a Transaction"] -pub struct COMPLETED_W<'a> { - w: &'a mut W, -} -impl<'a> COMPLETED_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} +pub type CompletedW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `IDLE` reader - Controller is Idle"] -pub struct IDLE_R(crate::FieldReader); -impl IDLE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - IDLE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for IDLE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type IdleR = crate::BitReader; #[doc = "Field `IDLE` writer - Controller is Idle"] -pub struct IDLE_W<'a> { - w: &'a mut W, -} -impl<'a> IDLE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); - self.w - } -} +pub type IdleW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WAITING` reader - Controller is Waiting"] -pub struct WAITING_R(crate::FieldReader); -impl WAITING_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - WAITING_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for WAITING_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type WaitingR = crate::BitReader; #[doc = "Field `WAITING` writer - Controller is Waiting"] -pub struct WAITING_W<'a> { - w: &'a mut W, -} -impl<'a> WAITING_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); - self.w - } -} +pub type WaitingW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXSTALLED` reader - Controller is Tx Stalled"] -pub struct TXSTALLED_R(crate::FieldReader); -impl TXSTALLED_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXSTALLED_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXSTALLED_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type TxstalledR = crate::BitReader; #[doc = "Field `TXSTALLED` writer - Controller is Tx Stalled"] -pub struct TXSTALLED_W<'a> { - w: &'a mut W, -} -impl<'a> TXSTALLED_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); - self.w - } -} +pub type TxstalledW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXSTALLED` reader - Controller is Rx Stalled"] -pub struct RXSTALLED_R(crate::FieldReader); -impl RXSTALLED_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXSTALLED_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXSTALLED_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type RxstalledR = crate::BitReader; #[doc = "Field `RXSTALLED` writer - Controller is Rx Stalled"] -pub struct RXSTALLED_W<'a> { - w: &'a mut W, -} -impl<'a> RXSTALLED_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); - self.w - } -} +pub type RxstalledW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ADDRESSMATCH` reader - I2C Address Match"] -pub struct ADDRESSMATCH_R(crate::FieldReader); -impl ADDRESSMATCH_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - ADDRESSMATCH_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ADDRESSMATCH_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type AddressmatchR = crate::BitReader; #[doc = "Field `ADDRESSMATCH` writer - I2C Address Match"] -pub struct ADDRESSMATCH_W<'a> { - w: &'a mut W, -} -impl<'a> ADDRESSMATCH_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); - self.w - } -} +pub type AddressmatchW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NACKDATA` reader - I2C Data was not Acknowledged"] -pub struct NACKDATA_R(crate::FieldReader); -impl NACKDATA_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - NACKDATA_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for NACKDATA_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type NackdataR = crate::BitReader; #[doc = "Field `NACKDATA` writer - I2C Data was not Acknowledged"] -pub struct NACKDATA_W<'a> { - w: &'a mut W, -} -impl<'a> NACKDATA_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); - self.w - } -} +pub type NackdataW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXDATAFIRST` reader - Pending Data is first Byte following Address"] -pub struct RXDATAFIRST_R(crate::FieldReader); -impl RXDATAFIRST_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXDATAFIRST_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXDATAFIRST_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type RxdatafirstR = crate::BitReader; #[doc = "Field `RXDATAFIRST` writer - Pending Data is first Byte following Address"] -pub struct RXDATAFIRST_W<'a> { - w: &'a mut W, -} -impl<'a> RXDATAFIRST_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); - self.w - } -} +pub type RxdatafirstW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `I2C_START` reader - I2C Start Condition"] -pub struct I2C_START_R(crate::FieldReader); -impl I2C_START_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - I2C_START_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for I2C_START_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type I2cStartR = crate::BitReader; #[doc = "Field `I2C_START` writer - I2C Start Condition"] -pub struct I2C_START_W<'a> { - w: &'a mut W, -} -impl<'a> I2C_START_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); - self.w - } -} +pub type I2cStartW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `I2C_STOP` reader - I2C Stop Condition"] -pub struct I2C_STOP_R(crate::FieldReader); -impl I2C_STOP_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - I2C_STOP_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for I2C_STOP_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type I2cStopR = crate::BitReader; #[doc = "Field `I2C_STOP` writer - I2C Stop Condition"] -pub struct I2C_STOP_W<'a> { - w: &'a mut W, -} -impl<'a> I2C_STOP_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); - self.w - } -} +pub type I2cStopW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXUNDERFLOW` reader - TX FIFO Underflowed"] -pub struct TXUNDERFLOW_R(crate::FieldReader); -impl TXUNDERFLOW_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXUNDERFLOW_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXUNDERFLOW_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type TxunderflowR = crate::BitReader; #[doc = "Field `TXUNDERFLOW` writer - TX FIFO Underflowed"] -pub struct TXUNDERFLOW_W<'a> { - w: &'a mut W, -} -impl<'a> TXUNDERFLOW_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); - self.w - } -} +pub type TxunderflowW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXOVERFLOW` reader - TX FIFO Overflowed"] -pub struct RXOVERFLOW_R(crate::FieldReader); -impl RXOVERFLOW_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXOVERFLOW_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXOVERFLOW_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type RxoverflowR = crate::BitReader; #[doc = "Field `RXOVERFLOW` writer - TX FIFO Overflowed"] -pub struct RXOVERFLOW_W<'a> { - w: &'a mut W, -} -impl<'a> RXOVERFLOW_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); - self.w - } -} +pub type RxoverflowW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXREADY` reader - TX FIFO Ready"] -pub struct TXREADY_R(crate::FieldReader); -impl TXREADY_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXREADY_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXREADY_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type TxreadyR = crate::BitReader; #[doc = "Field `TXREADY` writer - TX FIFO Ready"] -pub struct TXREADY_W<'a> { - w: &'a mut W, -} -impl<'a> TXREADY_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); - self.w - } -} +pub type TxreadyW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXREADY` reader - RX FIFO Ready"] -pub struct RXREADY_R(crate::FieldReader); -impl RXREADY_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXREADY_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXREADY_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type RxreadyR = crate::BitReader; #[doc = "Field `RXREADY` writer - RX FIFO Ready"] -pub struct RXREADY_W<'a> { - w: &'a mut W, -} -impl<'a> RXREADY_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); - self.w - } -} +pub type RxreadyW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXEMPTY` reader - TX FIFO Empty"] -pub struct TXEMPTY_R(crate::FieldReader); -impl TXEMPTY_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXEMPTY_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXEMPTY_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type TxemptyR = crate::BitReader; #[doc = "Field `TXEMPTY` writer - TX FIFO Empty"] -pub struct TXEMPTY_W<'a> { - w: &'a mut W, -} -impl<'a> TXEMPTY_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); - self.w - } -} +pub type TxemptyW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXFULL` reader - RX FIFO Full"] -pub struct RXFULL_R(crate::FieldReader); -impl RXFULL_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXFULL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXFULL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type RxfullR = crate::BitReader; #[doc = "Field `RXFULL` writer - RX FIFO Full"] -pub struct RXFULL_W<'a> { - w: &'a mut W, -} -impl<'a> RXFULL_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); - self.w - } -} +pub type RxfullW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Controller Complted a Transaction"] #[inline(always)] - pub fn completed(&self) -> COMPLETED_R { - COMPLETED_R::new((self.bits & 0x01) != 0) + pub fn completed(&self) -> CompletedR { + CompletedR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Controller is Idle"] #[inline(always)] - pub fn idle(&self) -> IDLE_R { - IDLE_R::new(((self.bits >> 1) & 0x01) != 0) + pub fn idle(&self) -> IdleR { + IdleR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Controller is Waiting"] #[inline(always)] - pub fn waiting(&self) -> WAITING_R { - WAITING_R::new(((self.bits >> 2) & 0x01) != 0) + pub fn waiting(&self) -> WaitingR { + WaitingR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Controller is Tx Stalled"] #[inline(always)] - pub fn txstalled(&self) -> TXSTALLED_R { - TXSTALLED_R::new(((self.bits >> 3) & 0x01) != 0) + pub fn txstalled(&self) -> TxstalledR { + TxstalledR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Controller is Rx Stalled"] #[inline(always)] - pub fn rxstalled(&self) -> RXSTALLED_R { - RXSTALLED_R::new(((self.bits >> 4) & 0x01) != 0) + pub fn rxstalled(&self) -> RxstalledR { + RxstalledR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - I2C Address Match"] #[inline(always)] - pub fn addressmatch(&self) -> ADDRESSMATCH_R { - ADDRESSMATCH_R::new(((self.bits >> 5) & 0x01) != 0) + pub fn addressmatch(&self) -> AddressmatchR { + AddressmatchR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - I2C Data was not Acknowledged"] #[inline(always)] - pub fn nackdata(&self) -> NACKDATA_R { - NACKDATA_R::new(((self.bits >> 6) & 0x01) != 0) + pub fn nackdata(&self) -> NackdataR { + NackdataR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Pending Data is first Byte following Address"] #[inline(always)] - pub fn rxdatafirst(&self) -> RXDATAFIRST_R { - RXDATAFIRST_R::new(((self.bits >> 7) & 0x01) != 0) + pub fn rxdatafirst(&self) -> RxdatafirstR { + RxdatafirstR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - I2C Start Condition"] #[inline(always)] - pub fn i2c_start(&self) -> I2C_START_R { - I2C_START_R::new(((self.bits >> 8) & 0x01) != 0) + pub fn i2c_start(&self) -> I2cStartR { + I2cStartR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - I2C Stop Condition"] #[inline(always)] - pub fn i2c_stop(&self) -> I2C_STOP_R { - I2C_STOP_R::new(((self.bits >> 9) & 0x01) != 0) + pub fn i2c_stop(&self) -> I2cStopR { + I2cStopR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - TX FIFO Underflowed"] #[inline(always)] - pub fn txunderflow(&self) -> TXUNDERFLOW_R { - TXUNDERFLOW_R::new(((self.bits >> 10) & 0x01) != 0) + pub fn txunderflow(&self) -> TxunderflowR { + TxunderflowR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - TX FIFO Overflowed"] #[inline(always)] - pub fn rxoverflow(&self) -> RXOVERFLOW_R { - RXOVERFLOW_R::new(((self.bits >> 11) & 0x01) != 0) + pub fn rxoverflow(&self) -> RxoverflowR { + RxoverflowR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - TX FIFO Ready"] #[inline(always)] - pub fn txready(&self) -> TXREADY_R { - TXREADY_R::new(((self.bits >> 12) & 0x01) != 0) + pub fn txready(&self) -> TxreadyR { + TxreadyR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - RX FIFO Ready"] #[inline(always)] - pub fn rxready(&self) -> RXREADY_R { - RXREADY_R::new(((self.bits >> 13) & 0x01) != 0) + pub fn rxready(&self) -> RxreadyR { + RxreadyR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - TX FIFO Empty"] #[inline(always)] - pub fn txempty(&self) -> TXEMPTY_R { - TXEMPTY_R::new(((self.bits >> 14) & 0x01) != 0) + pub fn txempty(&self) -> TxemptyR { + TxemptyR::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - RX FIFO Full"] #[inline(always)] - pub fn rxfull(&self) -> RXFULL_R { - RXFULL_R::new(((self.bits >> 15) & 0x01) != 0) + pub fn rxfull(&self) -> RxfullR { + RxfullR::new(((self.bits >> 15) & 1) != 0) } } impl W { #[doc = "Bit 0 - Controller Complted a Transaction"] #[inline(always)] - pub fn completed(&mut self) -> COMPLETED_W { - COMPLETED_W { w: self } + #[must_use] + pub fn completed(&mut self) -> CompletedW { + CompletedW::new(self, 0) } #[doc = "Bit 1 - Controller is Idle"] #[inline(always)] - pub fn idle(&mut self) -> IDLE_W { - IDLE_W { w: self } + #[must_use] + pub fn idle(&mut self) -> IdleW { + IdleW::new(self, 1) } #[doc = "Bit 2 - Controller is Waiting"] #[inline(always)] - pub fn waiting(&mut self) -> WAITING_W { - WAITING_W { w: self } + #[must_use] + pub fn waiting(&mut self) -> WaitingW { + WaitingW::new(self, 2) } #[doc = "Bit 3 - Controller is Tx Stalled"] #[inline(always)] - pub fn txstalled(&mut self) -> TXSTALLED_W { - TXSTALLED_W { w: self } + #[must_use] + pub fn txstalled(&mut self) -> TxstalledW { + TxstalledW::new(self, 3) } #[doc = "Bit 4 - Controller is Rx Stalled"] #[inline(always)] - pub fn rxstalled(&mut self) -> RXSTALLED_W { - RXSTALLED_W { w: self } + #[must_use] + pub fn rxstalled(&mut self) -> RxstalledW { + RxstalledW::new(self, 4) } #[doc = "Bit 5 - I2C Address Match"] #[inline(always)] - pub fn addressmatch(&mut self) -> ADDRESSMATCH_W { - ADDRESSMATCH_W { w: self } + #[must_use] + pub fn addressmatch(&mut self) -> AddressmatchW { + AddressmatchW::new(self, 5) } #[doc = "Bit 6 - I2C Data was not Acknowledged"] #[inline(always)] - pub fn nackdata(&mut self) -> NACKDATA_W { - NACKDATA_W { w: self } + #[must_use] + pub fn nackdata(&mut self) -> NackdataW { + NackdataW::new(self, 6) } #[doc = "Bit 7 - Pending Data is first Byte following Address"] #[inline(always)] - pub fn rxdatafirst(&mut self) -> RXDATAFIRST_W { - RXDATAFIRST_W { w: self } + #[must_use] + pub fn rxdatafirst(&mut self) -> RxdatafirstW { + RxdatafirstW::new(self, 7) } #[doc = "Bit 8 - I2C Start Condition"] #[inline(always)] - pub fn i2c_start(&mut self) -> I2C_START_W { - I2C_START_W { w: self } + #[must_use] + pub fn i2c_start(&mut self) -> I2cStartW { + I2cStartW::new(self, 8) } #[doc = "Bit 9 - I2C Stop Condition"] #[inline(always)] - pub fn i2c_stop(&mut self) -> I2C_STOP_W { - I2C_STOP_W { w: self } + #[must_use] + pub fn i2c_stop(&mut self) -> I2cStopW { + I2cStopW::new(self, 9) } #[doc = "Bit 10 - TX FIFO Underflowed"] #[inline(always)] - pub fn txunderflow(&mut self) -> TXUNDERFLOW_W { - TXUNDERFLOW_W { w: self } + #[must_use] + pub fn txunderflow(&mut self) -> TxunderflowW { + TxunderflowW::new(self, 10) } #[doc = "Bit 11 - TX FIFO Overflowed"] #[inline(always)] - pub fn rxoverflow(&mut self) -> RXOVERFLOW_W { - RXOVERFLOW_W { w: self } + #[must_use] + pub fn rxoverflow(&mut self) -> RxoverflowW { + RxoverflowW::new(self, 11) } #[doc = "Bit 12 - TX FIFO Ready"] #[inline(always)] - pub fn txready(&mut self) -> TXREADY_W { - TXREADY_W { w: self } + #[must_use] + pub fn txready(&mut self) -> TxreadyW { + TxreadyW::new(self, 12) } #[doc = "Bit 13 - RX FIFO Ready"] #[inline(always)] - pub fn rxready(&mut self) -> RXREADY_W { - RXREADY_W { w: self } + #[must_use] + pub fn rxready(&mut self) -> RxreadyW { + RxreadyW::new(self, 13) } #[doc = "Bit 14 - TX FIFO Empty"] #[inline(always)] - pub fn txempty(&mut self) -> TXEMPTY_W { - TXEMPTY_W { w: self } + #[must_use] + pub fn txempty(&mut self) -> TxemptyW { + TxemptyW::new(self, 14) } #[doc = "Bit 15 - RX FIFO Full"] #[inline(always)] - pub fn rxfull(&mut self) -> RXFULL_W { - RXFULL_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn rxfull(&mut self) -> RxfullW { + RxfullW::new(self, 15) } } -#[doc = "Slave Interrupt Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [s0_irq_enb](index.html) module"] -pub struct S0_IRQ_ENB_SPEC; -impl crate::RegisterSpec for S0_IRQ_ENB_SPEC { +#[doc = "Slave Interrupt Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`s0_irq_enb::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`s0_irq_enb::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct S0IrqEnbSpec; +impl crate::RegisterSpec for S0IrqEnbSpec { type Ux = u32; } -#[doc = "`read()` method returns [s0_irq_enb::R](R) reader structure"] -impl crate::Readable for S0_IRQ_ENB_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [s0_irq_enb::W](W) writer structure"] -impl crate::Writable for S0_IRQ_ENB_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`s0_irq_enb::R`](R) reader structure"] +impl crate::Readable for S0IrqEnbSpec {} +#[doc = "`write(|w| ..)` method takes [`s0_irq_enb::W`](W) writer structure"] +impl crate::Writable for S0IrqEnbSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets S0_IRQ_ENB to value 0"] -impl crate::Resettable for S0_IRQ_ENB_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for S0IrqEnbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/i2c0/s0_irq_end.rs b/va416xx/src/i2c0/s0_irq_end.rs deleted file mode 100644 index 56d29fe..0000000 --- a/va416xx/src/i2c0/s0_irq_end.rs +++ /dev/null @@ -1,353 +0,0 @@ -#[doc = "Register `S0_IRQ_END` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Field `COMPLETED` reader - Controller Complted a Transaction"] -pub struct COMPLETED_R(crate::FieldReader); -impl COMPLETED_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - COMPLETED_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for COMPLETED_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `IDLE` reader - Controller is Idle"] -pub struct IDLE_R(crate::FieldReader); -impl IDLE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - IDLE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for IDLE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `WAITING` reader - Controller is Waiting"] -pub struct WAITING_R(crate::FieldReader); -impl WAITING_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - WAITING_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for WAITING_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TXSTALLED` reader - Controller is Tx Stalled"] -pub struct TXSTALLED_R(crate::FieldReader); -impl TXSTALLED_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXSTALLED_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXSTALLED_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RXSTALLED` reader - Controller is Rx Stalled"] -pub struct RXSTALLED_R(crate::FieldReader); -impl RXSTALLED_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXSTALLED_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXSTALLED_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `ADDRESSMATCH` reader - I2C Address Match"] -pub struct ADDRESSMATCH_R(crate::FieldReader); -impl ADDRESSMATCH_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - ADDRESSMATCH_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ADDRESSMATCH_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `NACKDATA` reader - I2C Data was not Acknowledged"] -pub struct NACKDATA_R(crate::FieldReader); -impl NACKDATA_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - NACKDATA_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for NACKDATA_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RXDATAFIRST` reader - Pending Data is first Byte following Address"] -pub struct RXDATAFIRST_R(crate::FieldReader); -impl RXDATAFIRST_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXDATAFIRST_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXDATAFIRST_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `I2C_START` reader - I2C Start Condition"] -pub struct I2C_START_R(crate::FieldReader); -impl I2C_START_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - I2C_START_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for I2C_START_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `I2C_STOP` reader - I2C Stop Condition"] -pub struct I2C_STOP_R(crate::FieldReader); -impl I2C_STOP_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - I2C_STOP_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for I2C_STOP_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TXUNDERFLOW` reader - TX FIFO Underflowed"] -pub struct TXUNDERFLOW_R(crate::FieldReader); -impl TXUNDERFLOW_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXUNDERFLOW_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXUNDERFLOW_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RXOVERFLOW` reader - TX FIFO Overflowed"] -pub struct RXOVERFLOW_R(crate::FieldReader); -impl RXOVERFLOW_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXOVERFLOW_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXOVERFLOW_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TXREADY` reader - TX FIFO Ready"] -pub struct TXREADY_R(crate::FieldReader); -impl TXREADY_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXREADY_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXREADY_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RXREADY` reader - RX FIFO Ready"] -pub struct RXREADY_R(crate::FieldReader); -impl RXREADY_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXREADY_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXREADY_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TXEMPTY` reader - TX FIFO Empty"] -pub struct TXEMPTY_R(crate::FieldReader); -impl TXEMPTY_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXEMPTY_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXEMPTY_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RXFULL` reader - RX FIFO Full"] -pub struct RXFULL_R(crate::FieldReader); -impl RXFULL_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXFULL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXFULL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl R { - #[doc = "Bit 0 - Controller Complted a Transaction"] - #[inline(always)] - pub fn completed(&self) -> COMPLETED_R { - COMPLETED_R::new((self.bits & 0x01) != 0) - } - #[doc = "Bit 1 - Controller is Idle"] - #[inline(always)] - pub fn idle(&self) -> IDLE_R { - IDLE_R::new(((self.bits >> 1) & 0x01) != 0) - } - #[doc = "Bit 2 - Controller is Waiting"] - #[inline(always)] - pub fn waiting(&self) -> WAITING_R { - WAITING_R::new(((self.bits >> 2) & 0x01) != 0) - } - #[doc = "Bit 3 - Controller is Tx Stalled"] - #[inline(always)] - pub fn txstalled(&self) -> TXSTALLED_R { - TXSTALLED_R::new(((self.bits >> 3) & 0x01) != 0) - } - #[doc = "Bit 4 - Controller is Rx Stalled"] - #[inline(always)] - pub fn rxstalled(&self) -> RXSTALLED_R { - RXSTALLED_R::new(((self.bits >> 4) & 0x01) != 0) - } - #[doc = "Bit 5 - I2C Address Match"] - #[inline(always)] - pub fn addressmatch(&self) -> ADDRESSMATCH_R { - ADDRESSMATCH_R::new(((self.bits >> 5) & 0x01) != 0) - } - #[doc = "Bit 6 - I2C Data was not Acknowledged"] - #[inline(always)] - pub fn nackdata(&self) -> NACKDATA_R { - NACKDATA_R::new(((self.bits >> 6) & 0x01) != 0) - } - #[doc = "Bit 7 - Pending Data is first Byte following Address"] - #[inline(always)] - pub fn rxdatafirst(&self) -> RXDATAFIRST_R { - RXDATAFIRST_R::new(((self.bits >> 7) & 0x01) != 0) - } - #[doc = "Bit 8 - I2C Start Condition"] - #[inline(always)] - pub fn i2c_start(&self) -> I2C_START_R { - I2C_START_R::new(((self.bits >> 8) & 0x01) != 0) - } - #[doc = "Bit 9 - I2C Stop Condition"] - #[inline(always)] - pub fn i2c_stop(&self) -> I2C_STOP_R { - I2C_STOP_R::new(((self.bits >> 9) & 0x01) != 0) - } - #[doc = "Bit 10 - TX FIFO Underflowed"] - #[inline(always)] - pub fn txunderflow(&self) -> TXUNDERFLOW_R { - TXUNDERFLOW_R::new(((self.bits >> 10) & 0x01) != 0) - } - #[doc = "Bit 11 - TX FIFO Overflowed"] - #[inline(always)] - pub fn rxoverflow(&self) -> RXOVERFLOW_R { - RXOVERFLOW_R::new(((self.bits >> 11) & 0x01) != 0) - } - #[doc = "Bit 12 - TX FIFO Ready"] - #[inline(always)] - pub fn txready(&self) -> TXREADY_R { - TXREADY_R::new(((self.bits >> 12) & 0x01) != 0) - } - #[doc = "Bit 13 - RX FIFO Ready"] - #[inline(always)] - pub fn rxready(&self) -> RXREADY_R { - RXREADY_R::new(((self.bits >> 13) & 0x01) != 0) - } - #[doc = "Bit 14 - TX FIFO Empty"] - #[inline(always)] - pub fn txempty(&self) -> TXEMPTY_R { - TXEMPTY_R::new(((self.bits >> 14) & 0x01) != 0) - } - #[doc = "Bit 15 - RX FIFO Full"] - #[inline(always)] - pub fn rxfull(&self) -> RXFULL_R { - RXFULL_R::new(((self.bits >> 15) & 0x01) != 0) - } -} -#[doc = "Slave Enabled Interrupt Status Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [s0_irq_end](index.html) module"] -pub struct S0_IRQ_END_SPEC; -impl crate::RegisterSpec for S0_IRQ_END_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [s0_irq_end::R](R) reader structure"] -impl crate::Readable for S0_IRQ_END_SPEC { - type Reader = R; -} -#[doc = "`reset()` method sets S0_IRQ_END to value 0"] -impl crate::Resettable for S0_IRQ_END_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } -} diff --git a/va416xx/src/i2c0/s0_irq_raw.rs b/va416xx/src/i2c0/s0_irq_raw.rs deleted file mode 100644 index 601b3b1..0000000 --- a/va416xx/src/i2c0/s0_irq_raw.rs +++ /dev/null @@ -1,353 +0,0 @@ -#[doc = "Register `S0_IRQ_RAW` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Field `COMPLETED` reader - Controller Complted a Transaction"] -pub struct COMPLETED_R(crate::FieldReader); -impl COMPLETED_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - COMPLETED_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for COMPLETED_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `IDLE` reader - Controller is Idle"] -pub struct IDLE_R(crate::FieldReader); -impl IDLE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - IDLE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for IDLE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `WAITING` reader - Controller is Waiting"] -pub struct WAITING_R(crate::FieldReader); -impl WAITING_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - WAITING_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for WAITING_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TXSTALLED` reader - Controller is Tx Stalled"] -pub struct TXSTALLED_R(crate::FieldReader); -impl TXSTALLED_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXSTALLED_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXSTALLED_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RXSTALLED` reader - Controller is Rx Stalled"] -pub struct RXSTALLED_R(crate::FieldReader); -impl RXSTALLED_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXSTALLED_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXSTALLED_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `ADDRESSMATCH` reader - I2C Address Match"] -pub struct ADDRESSMATCH_R(crate::FieldReader); -impl ADDRESSMATCH_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - ADDRESSMATCH_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ADDRESSMATCH_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `NACKDATA` reader - I2C Data was not Acknowledged"] -pub struct NACKDATA_R(crate::FieldReader); -impl NACKDATA_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - NACKDATA_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for NACKDATA_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RXDATAFIRST` reader - Pending Data is first Byte following Address"] -pub struct RXDATAFIRST_R(crate::FieldReader); -impl RXDATAFIRST_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXDATAFIRST_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXDATAFIRST_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `I2C_START` reader - I2C Start Condition"] -pub struct I2C_START_R(crate::FieldReader); -impl I2C_START_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - I2C_START_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for I2C_START_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `I2C_STOP` reader - I2C Stop Condition"] -pub struct I2C_STOP_R(crate::FieldReader); -impl I2C_STOP_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - I2C_STOP_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for I2C_STOP_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TXUNDERFLOW` reader - TX FIFO Underflowed"] -pub struct TXUNDERFLOW_R(crate::FieldReader); -impl TXUNDERFLOW_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXUNDERFLOW_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXUNDERFLOW_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RXOVERFLOW` reader - TX FIFO Overflowed"] -pub struct RXOVERFLOW_R(crate::FieldReader); -impl RXOVERFLOW_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXOVERFLOW_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXOVERFLOW_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TXREADY` reader - TX FIFO Ready"] -pub struct TXREADY_R(crate::FieldReader); -impl TXREADY_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXREADY_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXREADY_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RXREADY` reader - RX FIFO Ready"] -pub struct RXREADY_R(crate::FieldReader); -impl RXREADY_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXREADY_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXREADY_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TXEMPTY` reader - TX FIFO Empty"] -pub struct TXEMPTY_R(crate::FieldReader); -impl TXEMPTY_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXEMPTY_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXEMPTY_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RXFULL` reader - RX FIFO Full"] -pub struct RXFULL_R(crate::FieldReader); -impl RXFULL_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXFULL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXFULL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl R { - #[doc = "Bit 0 - Controller Complted a Transaction"] - #[inline(always)] - pub fn completed(&self) -> COMPLETED_R { - COMPLETED_R::new((self.bits & 0x01) != 0) - } - #[doc = "Bit 1 - Controller is Idle"] - #[inline(always)] - pub fn idle(&self) -> IDLE_R { - IDLE_R::new(((self.bits >> 1) & 0x01) != 0) - } - #[doc = "Bit 2 - Controller is Waiting"] - #[inline(always)] - pub fn waiting(&self) -> WAITING_R { - WAITING_R::new(((self.bits >> 2) & 0x01) != 0) - } - #[doc = "Bit 3 - Controller is Tx Stalled"] - #[inline(always)] - pub fn txstalled(&self) -> TXSTALLED_R { - TXSTALLED_R::new(((self.bits >> 3) & 0x01) != 0) - } - #[doc = "Bit 4 - Controller is Rx Stalled"] - #[inline(always)] - pub fn rxstalled(&self) -> RXSTALLED_R { - RXSTALLED_R::new(((self.bits >> 4) & 0x01) != 0) - } - #[doc = "Bit 5 - I2C Address Match"] - #[inline(always)] - pub fn addressmatch(&self) -> ADDRESSMATCH_R { - ADDRESSMATCH_R::new(((self.bits >> 5) & 0x01) != 0) - } - #[doc = "Bit 6 - I2C Data was not Acknowledged"] - #[inline(always)] - pub fn nackdata(&self) -> NACKDATA_R { - NACKDATA_R::new(((self.bits >> 6) & 0x01) != 0) - } - #[doc = "Bit 7 - Pending Data is first Byte following Address"] - #[inline(always)] - pub fn rxdatafirst(&self) -> RXDATAFIRST_R { - RXDATAFIRST_R::new(((self.bits >> 7) & 0x01) != 0) - } - #[doc = "Bit 8 - I2C Start Condition"] - #[inline(always)] - pub fn i2c_start(&self) -> I2C_START_R { - I2C_START_R::new(((self.bits >> 8) & 0x01) != 0) - } - #[doc = "Bit 9 - I2C Stop Condition"] - #[inline(always)] - pub fn i2c_stop(&self) -> I2C_STOP_R { - I2C_STOP_R::new(((self.bits >> 9) & 0x01) != 0) - } - #[doc = "Bit 10 - TX FIFO Underflowed"] - #[inline(always)] - pub fn txunderflow(&self) -> TXUNDERFLOW_R { - TXUNDERFLOW_R::new(((self.bits >> 10) & 0x01) != 0) - } - #[doc = "Bit 11 - TX FIFO Overflowed"] - #[inline(always)] - pub fn rxoverflow(&self) -> RXOVERFLOW_R { - RXOVERFLOW_R::new(((self.bits >> 11) & 0x01) != 0) - } - #[doc = "Bit 12 - TX FIFO Ready"] - #[inline(always)] - pub fn txready(&self) -> TXREADY_R { - TXREADY_R::new(((self.bits >> 12) & 0x01) != 0) - } - #[doc = "Bit 13 - RX FIFO Ready"] - #[inline(always)] - pub fn rxready(&self) -> RXREADY_R { - RXREADY_R::new(((self.bits >> 13) & 0x01) != 0) - } - #[doc = "Bit 14 - TX FIFO Empty"] - #[inline(always)] - pub fn txempty(&self) -> TXEMPTY_R { - TXEMPTY_R::new(((self.bits >> 14) & 0x01) != 0) - } - #[doc = "Bit 15 - RX FIFO Full"] - #[inline(always)] - pub fn rxfull(&self) -> RXFULL_R { - RXFULL_R::new(((self.bits >> 15) & 0x01) != 0) - } -} -#[doc = "Slave Raw Interrupt Status Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [s0_irq_raw](index.html) module"] -pub struct S0_IRQ_RAW_SPEC; -impl crate::RegisterSpec for S0_IRQ_RAW_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [s0_irq_raw::R](R) reader structure"] -impl crate::Readable for S0_IRQ_RAW_SPEC { - type Reader = R; -} -#[doc = "`reset()` method sets S0_IRQ_RAW to value 0"] -impl crate::Resettable for S0_IRQ_RAW_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } -} diff --git a/va416xx/src/i2c0/s0_lastaddress.rs b/va416xx/src/i2c0/s0_lastaddress.rs index c264426..98ac58d 100644 --- a/va416xx/src/i2c0/s0_lastaddress.rs +++ b/va416xx/src/i2c0/s0_lastaddress.rs @@ -1,73 +1,29 @@ #[doc = "Register `S0_LASTADDRESS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Field `ADDRESS` reader - Address value"] -pub struct ADDRESS_R(crate::FieldReader); -impl ADDRESS_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - ADDRESS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ADDRESS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type R = crate::R; #[doc = "Field `DIRECTION` reader - Transaction direction 0=master send, 1=master receive"] -pub struct DIRECTION_R(crate::FieldReader); -impl DIRECTION_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - DIRECTION_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for DIRECTION_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type DirectionR = crate::BitReader; +#[doc = "Field `ADDRESS` reader - Address value"] +pub type AddressR = crate::FieldReader; impl R { - #[doc = "Bits 1:10 - Address value"] - #[inline(always)] - pub fn address(&self) -> ADDRESS_R { - ADDRESS_R::new(((self.bits >> 1) & 0x03ff) as u16) - } #[doc = "Bit 0 - Transaction direction 0=master send, 1=master receive"] #[inline(always)] - pub fn direction(&self) -> DIRECTION_R { - DIRECTION_R::new((self.bits & 0x01) != 0) + pub fn direction(&self) -> DirectionR { + DirectionR::new((self.bits & 1) != 0) + } + #[doc = "Bits 1:10 - Address value"] + #[inline(always)] + pub fn address(&self) -> AddressR { + AddressR::new(((self.bits >> 1) & 0x03ff) as u16) } } -#[doc = "Slave I2C Last Address value\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [s0_lastaddress](index.html) module"] -pub struct S0_LASTADDRESS_SPEC; -impl crate::RegisterSpec for S0_LASTADDRESS_SPEC { +#[doc = "Slave I2C Last Address value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`s0_lastaddress::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct S0LastaddressSpec; +impl crate::RegisterSpec for S0LastaddressSpec { type Ux = u32; } -#[doc = "`read()` method returns [s0_lastaddress::R](R) reader structure"] -impl crate::Readable for S0_LASTADDRESS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`s0_lastaddress::R`](R) reader structure"] +impl crate::Readable for S0LastaddressSpec {} #[doc = "`reset()` method sets S0_LASTADDRESS to value 0"] -impl crate::Resettable for S0_LASTADDRESS_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for S0LastaddressSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/i2c0/s0_maxwords.rs b/va416xx/src/i2c0/s0_maxwords.rs index e86869e..e5fbd32 100644 --- a/va416xx/src/i2c0/s0_maxwords.rs +++ b/va416xx/src/i2c0/s0_maxwords.rs @@ -1,150 +1,55 @@ #[doc = "Register `S0_MAXWORDS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `S0_MAXWORDS` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `MAXWORD` reader - Max Word Count"] -pub struct MAXWORD_R(crate::FieldReader); -impl MAXWORD_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - MAXWORD_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for MAXWORD_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type MaxwordR = crate::FieldReader; #[doc = "Field `MAXWORD` writer - Max Word Count"] -pub struct MAXWORD_W<'a> { - w: &'a mut W, -} -impl<'a> MAXWORD_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !0x07ff) | (value as u32 & 0x07ff); - self.w - } -} +pub type MaxwordW<'a, REG> = crate::FieldWriter<'a, REG, 11, u16>; #[doc = "Field `ENABLE` reader - Enables the max word count"] -pub struct ENABLE_R(crate::FieldReader); -impl ENABLE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - ENABLE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ENABLE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type EnableR = crate::BitReader; #[doc = "Field `ENABLE` writer - Enables the max word count"] -pub struct ENABLE_W<'a> { - w: &'a mut W, -} -impl<'a> ENABLE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 31)) | ((value as u32 & 0x01) << 31); - self.w - } -} +pub type EnableW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:10 - Max Word Count"] #[inline(always)] - pub fn maxword(&self) -> MAXWORD_R { - MAXWORD_R::new((self.bits & 0x07ff) as u16) + pub fn maxword(&self) -> MaxwordR { + MaxwordR::new((self.bits & 0x07ff) as u16) } #[doc = "Bit 31 - Enables the max word count"] #[inline(always)] - pub fn enable(&self) -> ENABLE_R { - ENABLE_R::new(((self.bits >> 31) & 0x01) != 0) + pub fn enable(&self) -> EnableR { + EnableR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 0:10 - Max Word Count"] #[inline(always)] - pub fn maxword(&mut self) -> MAXWORD_W { - MAXWORD_W { w: self } + #[must_use] + pub fn maxword(&mut self) -> MaxwordW { + MaxwordW::new(self, 0) } #[doc = "Bit 31 - Enables the max word count"] #[inline(always)] - pub fn enable(&mut self) -> ENABLE_W { - ENABLE_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn enable(&mut self) -> EnableW { + EnableW::new(self, 31) } } -#[doc = "Slave MaxWords Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [s0_maxwords](index.html) module"] -pub struct S0_MAXWORDS_SPEC; -impl crate::RegisterSpec for S0_MAXWORDS_SPEC { +#[doc = "Slave MaxWords Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`s0_maxwords::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`s0_maxwords::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct S0MaxwordsSpec; +impl crate::RegisterSpec for S0MaxwordsSpec { type Ux = u32; } -#[doc = "`read()` method returns [s0_maxwords::R](R) reader structure"] -impl crate::Readable for S0_MAXWORDS_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [s0_maxwords::W](W) writer structure"] -impl crate::Writable for S0_MAXWORDS_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`s0_maxwords::R`](R) reader structure"] +impl crate::Readable for S0MaxwordsSpec {} +#[doc = "`write(|w| ..)` method takes [`s0_maxwords::W`](W) writer structure"] +impl crate::Writable for S0MaxwordsSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets S0_MAXWORDS to value 0"] -impl crate::Resettable for S0_MAXWORDS_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for S0MaxwordsSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/i2c0/s0_rxcount.rs b/va416xx/src/i2c0/s0_rxcount.rs index 91b57b5..b01fd37 100644 --- a/va416xx/src/i2c0/s0_rxcount.rs +++ b/va416xx/src/i2c0/s0_rxcount.rs @@ -1,53 +1,22 @@ #[doc = "Register `S0_RXCOUNT` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `VALUE` reader - Count value"] -pub struct VALUE_R(crate::FieldReader); -impl VALUE_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - VALUE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for VALUE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type ValueR = crate::FieldReader; impl R { #[doc = "Bits 0:10 - Count value"] #[inline(always)] - pub fn value(&self) -> VALUE_R { - VALUE_R::new((self.bits & 0x07ff) as u16) + pub fn value(&self) -> ValueR { + ValueR::new((self.bits & 0x07ff) as u16) } } -#[doc = "Slave RX Count Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [s0_rxcount](index.html) module"] -pub struct S0_RXCOUNT_SPEC; -impl crate::RegisterSpec for S0_RXCOUNT_SPEC { +#[doc = "Slave RX Count Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`s0_rxcount::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct S0RxcountSpec; +impl crate::RegisterSpec for S0RxcountSpec { type Ux = u32; } -#[doc = "`read()` method returns [s0_rxcount::R](R) reader structure"] -impl crate::Readable for S0_RXCOUNT_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`s0_rxcount::R`](R) reader structure"] +impl crate::Readable for S0RxcountSpec {} #[doc = "`reset()` method sets S0_RXCOUNT to value 0"] -impl crate::Resettable for S0_RXCOUNT_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for S0RxcountSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/i2c0/s0_rxfifoirqtrg.rs b/va416xx/src/i2c0/s0_rxfifoirqtrg.rs index 8a1f859..2c8f823 100644 --- a/va416xx/src/i2c0/s0_rxfifoirqtrg.rs +++ b/va416xx/src/i2c0/s0_rxfifoirqtrg.rs @@ -1,103 +1,40 @@ #[doc = "Register `S0_RXFIFOIRQTRG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `S0_RXFIFOIRQTRG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `LEVEL` reader - Half full level for the Rx FIFO"] -pub struct LEVEL_R(crate::FieldReader); -impl LEVEL_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - LEVEL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for LEVEL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type LevelR = crate::FieldReader; #[doc = "Field `LEVEL` writer - Half full level for the Rx FIFO"] -pub struct LEVEL_W<'a> { - w: &'a mut W, -} -impl<'a> LEVEL_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0x1f) | (value as u32 & 0x1f); - self.w - } -} +pub type LevelW<'a, REG> = crate::FieldWriter<'a, REG, 5>; impl R { #[doc = "Bits 0:4 - Half full level for the Rx FIFO"] #[inline(always)] - pub fn level(&self) -> LEVEL_R { - LEVEL_R::new((self.bits & 0x1f) as u8) + pub fn level(&self) -> LevelR { + LevelR::new((self.bits & 0x1f) as u8) } } impl W { #[doc = "Bits 0:4 - Half full level for the Rx FIFO"] #[inline(always)] - pub fn level(&mut self) -> LEVEL_W { - LEVEL_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn level(&mut self) -> LevelW { + LevelW::new(self, 0) } } -#[doc = "Slave Rx FIFO IRQ Trigger Level\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [s0_rxfifoirqtrg](index.html) module"] -pub struct S0_RXFIFOIRQTRG_SPEC; -impl crate::RegisterSpec for S0_RXFIFOIRQTRG_SPEC { +#[doc = "Slave Rx FIFO IRQ Trigger Level\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`s0_rxfifoirqtrg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`s0_rxfifoirqtrg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct S0RxfifoirqtrgSpec; +impl crate::RegisterSpec for S0RxfifoirqtrgSpec { type Ux = u32; } -#[doc = "`read()` method returns [s0_rxfifoirqtrg::R](R) reader structure"] -impl crate::Readable for S0_RXFIFOIRQTRG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [s0_rxfifoirqtrg::W](W) writer structure"] -impl crate::Writable for S0_RXFIFOIRQTRG_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`s0_rxfifoirqtrg::R`](R) reader structure"] +impl crate::Readable for S0RxfifoirqtrgSpec {} +#[doc = "`write(|w| ..)` method takes [`s0_rxfifoirqtrg::W`](W) writer structure"] +impl crate::Writable for S0RxfifoirqtrgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets S0_RXFIFOIRQTRG to value 0"] -impl crate::Resettable for S0_RXFIFOIRQTRG_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for S0RxfifoirqtrgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/i2c0/s0_state.rs b/va416xx/src/i2c0/s0_state.rs index 6d4c6df..473fd77 100644 --- a/va416xx/src/i2c0/s0_state.rs +++ b/va416xx/src/i2c0/s0_state.rs @@ -1,31 +1,18 @@ #[doc = "Register `S0_STATE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 +pub type R = crate::R; +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) } } -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Internal STATE of I2C Slave Controller\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [s0_state](index.html) module"] -pub struct S0_STATE_SPEC; -impl crate::RegisterSpec for S0_STATE_SPEC { +#[doc = "Internal STATE of I2C Slave Controller\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`s0_state::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct S0StateSpec; +impl crate::RegisterSpec for S0StateSpec { type Ux = u32; } -#[doc = "`read()` method returns [s0_state::R](R) reader structure"] -impl crate::Readable for S0_STATE_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`s0_state::R`](R) reader structure"] +impl crate::Readable for S0StateSpec {} #[doc = "`reset()` method sets S0_STATE to value 0"] -impl crate::Resettable for S0_STATE_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for S0StateSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/i2c0/s0_status.rs b/va416xx/src/i2c0/s0_status.rs index 9324f04..1a79596 100644 --- a/va416xx/src/i2c0/s0_status.rs +++ b/va416xx/src/i2c0/s0_status.rs @@ -1,373 +1,134 @@ #[doc = "Register `S0_STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `COMPLETED` reader - Controller Complted a Transaction"] -pub struct COMPLETED_R(crate::FieldReader); -impl COMPLETED_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - COMPLETED_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for COMPLETED_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type CompletedR = crate::BitReader; #[doc = "Field `IDLE` reader - Controller is Idle"] -pub struct IDLE_R(crate::FieldReader); -impl IDLE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - IDLE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for IDLE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type IdleR = crate::BitReader; #[doc = "Field `WAITING` reader - Controller is Waiting"] -pub struct WAITING_R(crate::FieldReader); -impl WAITING_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - WAITING_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for WAITING_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type WaitingR = crate::BitReader; #[doc = "Field `TXSTALLED` reader - Controller is Tx Stalled"] -pub struct TXSTALLED_R(crate::FieldReader); -impl TXSTALLED_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXSTALLED_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXSTALLED_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type TxstalledR = crate::BitReader; #[doc = "Field `RXSTALLED` reader - Controller is Rx Stalled"] -pub struct RXSTALLED_R(crate::FieldReader); -impl RXSTALLED_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXSTALLED_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXSTALLED_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type RxstalledR = crate::BitReader; #[doc = "Field `ADDRESSMATCH` reader - I2C Address Match"] -pub struct ADDRESSMATCH_R(crate::FieldReader); -impl ADDRESSMATCH_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - ADDRESSMATCH_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ADDRESSMATCH_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type AddressmatchR = crate::BitReader; #[doc = "Field `NACKDATA` reader - I2C Data was not Acknowledged"] -pub struct NACKDATA_R(crate::FieldReader); -impl NACKDATA_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - NACKDATA_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for NACKDATA_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type NackdataR = crate::BitReader; #[doc = "Field `RXDATAFIRST` reader - Pending Data is first Byte following Address"] -pub struct RXDATAFIRST_R(crate::FieldReader); -impl RXDATAFIRST_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXDATAFIRST_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXDATAFIRST_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type RxdatafirstR = crate::BitReader; #[doc = "Field `RXNEMPTY` reader - RX FIFO is Not Empty"] -pub struct RXNEMPTY_R(crate::FieldReader); -impl RXNEMPTY_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXNEMPTY_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXNEMPTY_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type RxnemptyR = crate::BitReader; #[doc = "Field `RXFULL` reader - RX FIFO is Full"] -pub struct RXFULL_R(crate::FieldReader); -impl RXFULL_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXFULL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXFULL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type RxfullR = crate::BitReader; #[doc = "Field `RXTRIGGER` reader - RX FIFO Above Trigger Level"] -pub struct RXTRIGGER_R(crate::FieldReader); -impl RXTRIGGER_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXTRIGGER_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXTRIGGER_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type RxtriggerR = crate::BitReader; #[doc = "Field `TXEMPTY` reader - TX FIFO is Empty"] -pub struct TXEMPTY_R(crate::FieldReader); -impl TXEMPTY_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXEMPTY_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXEMPTY_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type TxemptyR = crate::BitReader; #[doc = "Field `TXNFULL` reader - TX FIFO is Full"] -pub struct TXNFULL_R(crate::FieldReader); -impl TXNFULL_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXNFULL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXNFULL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type TxnfullR = crate::BitReader; #[doc = "Field `TXTRIGGER` reader - TX FIFO Below Trigger Level"] -pub struct TXTRIGGER_R(crate::FieldReader); -impl TXTRIGGER_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXTRIGGER_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXTRIGGER_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type TxtriggerR = crate::BitReader; #[doc = "Field `RAW_BUSY` reader - I2C Raw Busy value"] -pub struct RAW_BUSY_R(crate::FieldReader); -impl RAW_BUSY_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RAW_BUSY_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RAW_BUSY_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type RawBusyR = crate::BitReader; #[doc = "Field `RAW_SDA` reader - I2C Raw SDA value"] -pub struct RAW_SDA_R(crate::FieldReader); -impl RAW_SDA_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RAW_SDA_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RAW_SDA_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type RawSdaR = crate::BitReader; #[doc = "Field `RAW_SCL` reader - I2C Raw SCL value"] -pub struct RAW_SCL_R(crate::FieldReader); -impl RAW_SCL_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RAW_SCL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RAW_SCL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type RawSclR = crate::BitReader; impl R { #[doc = "Bit 0 - Controller Complted a Transaction"] #[inline(always)] - pub fn completed(&self) -> COMPLETED_R { - COMPLETED_R::new((self.bits & 0x01) != 0) + pub fn completed(&self) -> CompletedR { + CompletedR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Controller is Idle"] #[inline(always)] - pub fn idle(&self) -> IDLE_R { - IDLE_R::new(((self.bits >> 1) & 0x01) != 0) + pub fn idle(&self) -> IdleR { + IdleR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Controller is Waiting"] #[inline(always)] - pub fn waiting(&self) -> WAITING_R { - WAITING_R::new(((self.bits >> 2) & 0x01) != 0) + pub fn waiting(&self) -> WaitingR { + WaitingR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Controller is Tx Stalled"] #[inline(always)] - pub fn txstalled(&self) -> TXSTALLED_R { - TXSTALLED_R::new(((self.bits >> 3) & 0x01) != 0) + pub fn txstalled(&self) -> TxstalledR { + TxstalledR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Controller is Rx Stalled"] #[inline(always)] - pub fn rxstalled(&self) -> RXSTALLED_R { - RXSTALLED_R::new(((self.bits >> 4) & 0x01) != 0) + pub fn rxstalled(&self) -> RxstalledR { + RxstalledR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - I2C Address Match"] #[inline(always)] - pub fn addressmatch(&self) -> ADDRESSMATCH_R { - ADDRESSMATCH_R::new(((self.bits >> 5) & 0x01) != 0) + pub fn addressmatch(&self) -> AddressmatchR { + AddressmatchR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - I2C Data was not Acknowledged"] #[inline(always)] - pub fn nackdata(&self) -> NACKDATA_R { - NACKDATA_R::new(((self.bits >> 6) & 0x01) != 0) + pub fn nackdata(&self) -> NackdataR { + NackdataR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Pending Data is first Byte following Address"] #[inline(always)] - pub fn rxdatafirst(&self) -> RXDATAFIRST_R { - RXDATAFIRST_R::new(((self.bits >> 7) & 0x01) != 0) + pub fn rxdatafirst(&self) -> RxdatafirstR { + RxdatafirstR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - RX FIFO is Not Empty"] #[inline(always)] - pub fn rxnempty(&self) -> RXNEMPTY_R { - RXNEMPTY_R::new(((self.bits >> 8) & 0x01) != 0) + pub fn rxnempty(&self) -> RxnemptyR { + RxnemptyR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - RX FIFO is Full"] #[inline(always)] - pub fn rxfull(&self) -> RXFULL_R { - RXFULL_R::new(((self.bits >> 9) & 0x01) != 0) + pub fn rxfull(&self) -> RxfullR { + RxfullR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 11 - RX FIFO Above Trigger Level"] #[inline(always)] - pub fn rxtrigger(&self) -> RXTRIGGER_R { - RXTRIGGER_R::new(((self.bits >> 11) & 0x01) != 0) + pub fn rxtrigger(&self) -> RxtriggerR { + RxtriggerR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - TX FIFO is Empty"] #[inline(always)] - pub fn txempty(&self) -> TXEMPTY_R { - TXEMPTY_R::new(((self.bits >> 12) & 0x01) != 0) + pub fn txempty(&self) -> TxemptyR { + TxemptyR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - TX FIFO is Full"] #[inline(always)] - pub fn txnfull(&self) -> TXNFULL_R { - TXNFULL_R::new(((self.bits >> 13) & 0x01) != 0) + pub fn txnfull(&self) -> TxnfullR { + TxnfullR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 15 - TX FIFO Below Trigger Level"] #[inline(always)] - pub fn txtrigger(&self) -> TXTRIGGER_R { - TXTRIGGER_R::new(((self.bits >> 15) & 0x01) != 0) + pub fn txtrigger(&self) -> TxtriggerR { + TxtriggerR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 29 - I2C Raw Busy value"] #[inline(always)] - pub fn raw_busy(&self) -> RAW_BUSY_R { - RAW_BUSY_R::new(((self.bits >> 29) & 0x01) != 0) + pub fn raw_busy(&self) -> RawBusyR { + RawBusyR::new(((self.bits >> 29) & 1) != 0) } #[doc = "Bit 30 - I2C Raw SDA value"] #[inline(always)] - pub fn raw_sda(&self) -> RAW_SDA_R { - RAW_SDA_R::new(((self.bits >> 30) & 0x01) != 0) + pub fn raw_sda(&self) -> RawSdaR { + RawSdaR::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - I2C Raw SCL value"] #[inline(always)] - pub fn raw_scl(&self) -> RAW_SCL_R { - RAW_SCL_R::new(((self.bits >> 31) & 0x01) != 0) + pub fn raw_scl(&self) -> RawSclR { + RawSclR::new(((self.bits >> 31) & 1) != 0) } } -#[doc = "Slave I2C Controller Status Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [s0_status](index.html) module"] -pub struct S0_STATUS_SPEC; -impl crate::RegisterSpec for S0_STATUS_SPEC { +#[doc = "Slave I2C Controller Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`s0_status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct S0StatusSpec; +impl crate::RegisterSpec for S0StatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [s0_status::R](R) reader structure"] -impl crate::Readable for S0_STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`s0_status::R`](R) reader structure"] +impl crate::Readable for S0StatusSpec {} #[doc = "`reset()` method sets S0_STATUS to value 0"] -impl crate::Resettable for S0_STATUS_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for S0StatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/i2c0/s0_txcount.rs b/va416xx/src/i2c0/s0_txcount.rs index a7307c3..43bdd00 100644 --- a/va416xx/src/i2c0/s0_txcount.rs +++ b/va416xx/src/i2c0/s0_txcount.rs @@ -1,53 +1,22 @@ #[doc = "Register `S0_TXCOUNT` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `VALUE` reader - Count value"] -pub struct VALUE_R(crate::FieldReader); -impl VALUE_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - VALUE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for VALUE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type ValueR = crate::FieldReader; impl R { #[doc = "Bits 0:10 - Count value"] #[inline(always)] - pub fn value(&self) -> VALUE_R { - VALUE_R::new((self.bits & 0x07ff) as u16) + pub fn value(&self) -> ValueR { + ValueR::new((self.bits & 0x07ff) as u16) } } -#[doc = "Slave TX Count Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [s0_txcount](index.html) module"] -pub struct S0_TXCOUNT_SPEC; -impl crate::RegisterSpec for S0_TXCOUNT_SPEC { +#[doc = "Slave TX Count Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`s0_txcount::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct S0TxcountSpec; +impl crate::RegisterSpec for S0TxcountSpec { type Ux = u32; } -#[doc = "`read()` method returns [s0_txcount::R](R) reader structure"] -impl crate::Readable for S0_TXCOUNT_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`s0_txcount::R`](R) reader structure"] +impl crate::Readable for S0TxcountSpec {} #[doc = "`reset()` method sets S0_TXCOUNT to value 0"] -impl crate::Resettable for S0_TXCOUNT_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for S0TxcountSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/i2c0/s0_txfifoirqtrg.rs b/va416xx/src/i2c0/s0_txfifoirqtrg.rs index 568c4fe..2d8881a 100644 --- a/va416xx/src/i2c0/s0_txfifoirqtrg.rs +++ b/va416xx/src/i2c0/s0_txfifoirqtrg.rs @@ -1,103 +1,40 @@ #[doc = "Register `S0_TXFIFOIRQTRG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `S0_TXFIFOIRQTRG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `LEVEL` reader - Half full level for the Rx FIFO"] -pub struct LEVEL_R(crate::FieldReader); -impl LEVEL_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - LEVEL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for LEVEL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type LevelR = crate::FieldReader; #[doc = "Field `LEVEL` writer - Half full level for the Rx FIFO"] -pub struct LEVEL_W<'a> { - w: &'a mut W, -} -impl<'a> LEVEL_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0x1f) | (value as u32 & 0x1f); - self.w - } -} +pub type LevelW<'a, REG> = crate::FieldWriter<'a, REG, 5>; impl R { #[doc = "Bits 0:4 - Half full level for the Rx FIFO"] #[inline(always)] - pub fn level(&self) -> LEVEL_R { - LEVEL_R::new((self.bits & 0x1f) as u8) + pub fn level(&self) -> LevelR { + LevelR::new((self.bits & 0x1f) as u8) } } impl W { #[doc = "Bits 0:4 - Half full level for the Rx FIFO"] #[inline(always)] - pub fn level(&mut self) -> LEVEL_W { - LEVEL_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn level(&mut self) -> LevelW { + LevelW::new(self, 0) } } -#[doc = "Slave Tx FIFO IRQ Trigger Level\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [s0_txfifoirqtrg](index.html) module"] -pub struct S0_TXFIFOIRQTRG_SPEC; -impl crate::RegisterSpec for S0_TXFIFOIRQTRG_SPEC { +#[doc = "Slave Tx FIFO IRQ Trigger Level\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`s0_txfifoirqtrg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`s0_txfifoirqtrg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct S0TxfifoirqtrgSpec; +impl crate::RegisterSpec for S0TxfifoirqtrgSpec { type Ux = u32; } -#[doc = "`read()` method returns [s0_txfifoirqtrg::R](R) reader structure"] -impl crate::Readable for S0_TXFIFOIRQTRG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [s0_txfifoirqtrg::W](W) writer structure"] -impl crate::Writable for S0_TXFIFOIRQTRG_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`s0_txfifoirqtrg::R`](R) reader structure"] +impl crate::Readable for S0TxfifoirqtrgSpec {} +#[doc = "`write(|w| ..)` method takes [`s0_txfifoirqtrg::W`](W) writer structure"] +impl crate::Writable for S0TxfifoirqtrgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets S0_TXFIFOIRQTRG to value 0x08"] -impl crate::Resettable for S0_TXFIFOIRQTRG_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0x08 - } +impl crate::Resettable for S0TxfifoirqtrgSpec { + const RESET_VALUE: u32 = 0x08; } diff --git a/va416xx/src/i2c0/state.rs b/va416xx/src/i2c0/state.rs index c2a5924..fe3c04e 100644 --- a/va416xx/src/i2c0/state.rs +++ b/va416xx/src/i2c0/state.rs @@ -1,31 +1,18 @@ #[doc = "Register `STATE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 +pub type R = crate::R; +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) } } -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Internal STATE of I2C Master Controller\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [state](index.html) module"] -pub struct STATE_SPEC; -impl crate::RegisterSpec for STATE_SPEC { +#[doc = "Internal STATE of I2C Master Controller\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`state::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StateSpec; +impl crate::RegisterSpec for StateSpec { type Ux = u32; } -#[doc = "`read()` method returns [state::R](R) reader structure"] -impl crate::Readable for STATE_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`state::R`](R) reader structure"] +impl crate::Readable for StateSpec {} #[doc = "`reset()` method sets STATE to value 0"] -impl crate::Resettable for STATE_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for StateSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/i2c0/status.rs b/va416xx/src/i2c0/status.rs index ee680e4..2735cab 100644 --- a/va416xx/src/i2c0/status.rs +++ b/va416xx/src/i2c0/status.rs @@ -1,771 +1,250 @@ #[doc = "Register `STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `STATUS` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `I2CIDLE` reader - I2C bus is idle"] -pub struct I2CIDLE_R(crate::FieldReader); -impl I2CIDLE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - I2CIDLE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for I2CIDLE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type I2cidleR = crate::BitReader; #[doc = "Field `I2CIDLE` writer - I2C bus is idle"] -pub struct I2CIDLE_W<'a> { - w: &'a mut W, -} -impl<'a> I2CIDLE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} +pub type I2cidleW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `IDLE` reader - I2C controller is Idle"] -pub struct IDLE_R(crate::FieldReader); -impl IDLE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - IDLE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for IDLE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type IdleR = crate::BitReader; #[doc = "Field `IDLE` writer - I2C controller is Idle"] -pub struct IDLE_W<'a> { - w: &'a mut W, -} -impl<'a> IDLE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); - self.w - } -} +pub type IdleW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WAITING` reader - Controller is Waiting"] -pub struct WAITING_R(crate::FieldReader); -impl WAITING_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - WAITING_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for WAITING_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type WaitingR = crate::BitReader; #[doc = "Field `WAITING` writer - Controller is Waiting"] -pub struct WAITING_W<'a> { - w: &'a mut W, -} -impl<'a> WAITING_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); - self.w - } -} +pub type WaitingW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STALLED` reader - Controller is Stalled"] -pub struct STALLED_R(crate::FieldReader); -impl STALLED_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - STALLED_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for STALLED_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type StalledR = crate::BitReader; #[doc = "Field `STALLED` writer - Controller is Stalled"] -pub struct STALLED_W<'a> { - w: &'a mut W, -} -impl<'a> STALLED_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); - self.w - } -} +pub type StalledW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ARBLOST` reader - I2C Arbitration was lost"] -pub struct ARBLOST_R(crate::FieldReader); -impl ARBLOST_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - ARBLOST_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ARBLOST_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type ArblostR = crate::BitReader; #[doc = "Field `ARBLOST` writer - I2C Arbitration was lost"] -pub struct ARBLOST_W<'a> { - w: &'a mut W, -} -impl<'a> ARBLOST_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); - self.w - } -} +pub type ArblostW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NACKADDR` reader - I2C Address was not Acknowledged"] -pub struct NACKADDR_R(crate::FieldReader); -impl NACKADDR_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - NACKADDR_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for NACKADDR_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type NackaddrR = crate::BitReader; #[doc = "Field `NACKADDR` writer - I2C Address was not Acknowledged"] -pub struct NACKADDR_W<'a> { - w: &'a mut W, -} -impl<'a> NACKADDR_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); - self.w - } -} +pub type NackaddrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NACKDATA` reader - I2C Data was not Acknowledged"] -pub struct NACKDATA_R(crate::FieldReader); -impl NACKDATA_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - NACKDATA_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for NACKDATA_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type NackdataR = crate::BitReader; #[doc = "Field `NACKDATA` writer - I2C Data was not Acknowledged"] -pub struct NACKDATA_W<'a> { - w: &'a mut W, -} -impl<'a> NACKDATA_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); - self.w - } -} +pub type NackdataW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXNEMPTY` reader - RX FIFO is Not Empty"] -pub struct RXNEMPTY_R(crate::FieldReader); -impl RXNEMPTY_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXNEMPTY_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXNEMPTY_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type RxnemptyR = crate::BitReader; #[doc = "Field `RXNEMPTY` writer - RX FIFO is Not Empty"] -pub struct RXNEMPTY_W<'a> { - w: &'a mut W, -} -impl<'a> RXNEMPTY_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); - self.w - } -} +pub type RxnemptyW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXFULL` reader - RX FIFO is Full"] -pub struct RXFULL_R(crate::FieldReader); -impl RXFULL_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXFULL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXFULL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type RxfullR = crate::BitReader; #[doc = "Field `RXFULL` writer - RX FIFO is Full"] -pub struct RXFULL_W<'a> { - w: &'a mut W, -} -impl<'a> RXFULL_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); - self.w - } -} +pub type RxfullW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXTRIGGER` reader - RX FIFO Above Trigger Level"] -pub struct RXTRIGGER_R(crate::FieldReader); -impl RXTRIGGER_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXTRIGGER_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXTRIGGER_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type RxtriggerR = crate::BitReader; #[doc = "Field `RXTRIGGER` writer - RX FIFO Above Trigger Level"] -pub struct RXTRIGGER_W<'a> { - w: &'a mut W, -} -impl<'a> RXTRIGGER_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); - self.w - } -} +pub type RxtriggerW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXEMPTY` reader - TX FIFO is Empty"] -pub struct TXEMPTY_R(crate::FieldReader); -impl TXEMPTY_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXEMPTY_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXEMPTY_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type TxemptyR = crate::BitReader; #[doc = "Field `TXEMPTY` writer - TX FIFO is Empty"] -pub struct TXEMPTY_W<'a> { - w: &'a mut W, -} -impl<'a> TXEMPTY_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); - self.w - } -} +pub type TxemptyW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXNFULL` reader - TX FIFO is Full"] -pub struct TXNFULL_R(crate::FieldReader); -impl TXNFULL_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXNFULL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXNFULL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type TxnfullR = crate::BitReader; #[doc = "Field `TXNFULL` writer - TX FIFO is Full"] -pub struct TXNFULL_W<'a> { - w: &'a mut W, -} -impl<'a> TXNFULL_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); - self.w - } -} +pub type TxnfullW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXTRIGGER` reader - TX FIFO Below Trigger Level"] -pub struct TXTRIGGER_R(crate::FieldReader); -impl TXTRIGGER_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXTRIGGER_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXTRIGGER_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type TxtriggerR = crate::BitReader; #[doc = "Field `TXTRIGGER` writer - TX FIFO Below Trigger Level"] -pub struct TXTRIGGER_W<'a> { - w: &'a mut W, -} -impl<'a> TXTRIGGER_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); - self.w - } -} +pub type TxtriggerW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RAW_SDA` reader - I2C Raw SDA value"] -pub struct RAW_SDA_R(crate::FieldReader); -impl RAW_SDA_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RAW_SDA_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RAW_SDA_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type RawSdaR = crate::BitReader; #[doc = "Field `RAW_SDA` writer - I2C Raw SDA value"] -pub struct RAW_SDA_W<'a> { - w: &'a mut W, -} -impl<'a> RAW_SDA_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 30)) | ((value as u32 & 0x01) << 30); - self.w - } -} +pub type RawSdaW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RAW_SCL` reader - I2C Raw SCL value"] -pub struct RAW_SCL_R(crate::FieldReader); -impl RAW_SCL_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RAW_SCL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RAW_SCL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type RawSclR = crate::BitReader; #[doc = "Field `RAW_SCL` writer - I2C Raw SCL value"] -pub struct RAW_SCL_W<'a> { - w: &'a mut W, -} -impl<'a> RAW_SCL_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 31)) | ((value as u32 & 0x01) << 31); - self.w - } -} +pub type RawSclW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - I2C bus is idle"] #[inline(always)] - pub fn i2cidle(&self) -> I2CIDLE_R { - I2CIDLE_R::new((self.bits & 0x01) != 0) + pub fn i2cidle(&self) -> I2cidleR { + I2cidleR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - I2C controller is Idle"] #[inline(always)] - pub fn idle(&self) -> IDLE_R { - IDLE_R::new(((self.bits >> 1) & 0x01) != 0) + pub fn idle(&self) -> IdleR { + IdleR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Controller is Waiting"] #[inline(always)] - pub fn waiting(&self) -> WAITING_R { - WAITING_R::new(((self.bits >> 2) & 0x01) != 0) + pub fn waiting(&self) -> WaitingR { + WaitingR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Controller is Stalled"] #[inline(always)] - pub fn stalled(&self) -> STALLED_R { - STALLED_R::new(((self.bits >> 3) & 0x01) != 0) + pub fn stalled(&self) -> StalledR { + StalledR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - I2C Arbitration was lost"] #[inline(always)] - pub fn arblost(&self) -> ARBLOST_R { - ARBLOST_R::new(((self.bits >> 4) & 0x01) != 0) + pub fn arblost(&self) -> ArblostR { + ArblostR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - I2C Address was not Acknowledged"] #[inline(always)] - pub fn nackaddr(&self) -> NACKADDR_R { - NACKADDR_R::new(((self.bits >> 5) & 0x01) != 0) + pub fn nackaddr(&self) -> NackaddrR { + NackaddrR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - I2C Data was not Acknowledged"] #[inline(always)] - pub fn nackdata(&self) -> NACKDATA_R { - NACKDATA_R::new(((self.bits >> 6) & 0x01) != 0) + pub fn nackdata(&self) -> NackdataR { + NackdataR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 8 - RX FIFO is Not Empty"] #[inline(always)] - pub fn rxnempty(&self) -> RXNEMPTY_R { - RXNEMPTY_R::new(((self.bits >> 8) & 0x01) != 0) + pub fn rxnempty(&self) -> RxnemptyR { + RxnemptyR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - RX FIFO is Full"] #[inline(always)] - pub fn rxfull(&self) -> RXFULL_R { - RXFULL_R::new(((self.bits >> 9) & 0x01) != 0) + pub fn rxfull(&self) -> RxfullR { + RxfullR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 11 - RX FIFO Above Trigger Level"] #[inline(always)] - pub fn rxtrigger(&self) -> RXTRIGGER_R { - RXTRIGGER_R::new(((self.bits >> 11) & 0x01) != 0) + pub fn rxtrigger(&self) -> RxtriggerR { + RxtriggerR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - TX FIFO is Empty"] #[inline(always)] - pub fn txempty(&self) -> TXEMPTY_R { - TXEMPTY_R::new(((self.bits >> 12) & 0x01) != 0) + pub fn txempty(&self) -> TxemptyR { + TxemptyR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - TX FIFO is Full"] #[inline(always)] - pub fn txnfull(&self) -> TXNFULL_R { - TXNFULL_R::new(((self.bits >> 13) & 0x01) != 0) + pub fn txnfull(&self) -> TxnfullR { + TxnfullR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 15 - TX FIFO Below Trigger Level"] #[inline(always)] - pub fn txtrigger(&self) -> TXTRIGGER_R { - TXTRIGGER_R::new(((self.bits >> 15) & 0x01) != 0) + pub fn txtrigger(&self) -> TxtriggerR { + TxtriggerR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 30 - I2C Raw SDA value"] #[inline(always)] - pub fn raw_sda(&self) -> RAW_SDA_R { - RAW_SDA_R::new(((self.bits >> 30) & 0x01) != 0) + pub fn raw_sda(&self) -> RawSdaR { + RawSdaR::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - I2C Raw SCL value"] #[inline(always)] - pub fn raw_scl(&self) -> RAW_SCL_R { - RAW_SCL_R::new(((self.bits >> 31) & 0x01) != 0) + pub fn raw_scl(&self) -> RawSclR { + RawSclR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bit 0 - I2C bus is idle"] #[inline(always)] - pub fn i2cidle(&mut self) -> I2CIDLE_W { - I2CIDLE_W { w: self } + #[must_use] + pub fn i2cidle(&mut self) -> I2cidleW { + I2cidleW::new(self, 0) } #[doc = "Bit 1 - I2C controller is Idle"] #[inline(always)] - pub fn idle(&mut self) -> IDLE_W { - IDLE_W { w: self } + #[must_use] + pub fn idle(&mut self) -> IdleW { + IdleW::new(self, 1) } #[doc = "Bit 2 - Controller is Waiting"] #[inline(always)] - pub fn waiting(&mut self) -> WAITING_W { - WAITING_W { w: self } + #[must_use] + pub fn waiting(&mut self) -> WaitingW { + WaitingW::new(self, 2) } #[doc = "Bit 3 - Controller is Stalled"] #[inline(always)] - pub fn stalled(&mut self) -> STALLED_W { - STALLED_W { w: self } + #[must_use] + pub fn stalled(&mut self) -> StalledW { + StalledW::new(self, 3) } #[doc = "Bit 4 - I2C Arbitration was lost"] #[inline(always)] - pub fn arblost(&mut self) -> ARBLOST_W { - ARBLOST_W { w: self } + #[must_use] + pub fn arblost(&mut self) -> ArblostW { + ArblostW::new(self, 4) } #[doc = "Bit 5 - I2C Address was not Acknowledged"] #[inline(always)] - pub fn nackaddr(&mut self) -> NACKADDR_W { - NACKADDR_W { w: self } + #[must_use] + pub fn nackaddr(&mut self) -> NackaddrW { + NackaddrW::new(self, 5) } #[doc = "Bit 6 - I2C Data was not Acknowledged"] #[inline(always)] - pub fn nackdata(&mut self) -> NACKDATA_W { - NACKDATA_W { w: self } + #[must_use] + pub fn nackdata(&mut self) -> NackdataW { + NackdataW::new(self, 6) } #[doc = "Bit 8 - RX FIFO is Not Empty"] #[inline(always)] - pub fn rxnempty(&mut self) -> RXNEMPTY_W { - RXNEMPTY_W { w: self } + #[must_use] + pub fn rxnempty(&mut self) -> RxnemptyW { + RxnemptyW::new(self, 8) } #[doc = "Bit 9 - RX FIFO is Full"] #[inline(always)] - pub fn rxfull(&mut self) -> RXFULL_W { - RXFULL_W { w: self } + #[must_use] + pub fn rxfull(&mut self) -> RxfullW { + RxfullW::new(self, 9) } #[doc = "Bit 11 - RX FIFO Above Trigger Level"] #[inline(always)] - pub fn rxtrigger(&mut self) -> RXTRIGGER_W { - RXTRIGGER_W { w: self } + #[must_use] + pub fn rxtrigger(&mut self) -> RxtriggerW { + RxtriggerW::new(self, 11) } #[doc = "Bit 12 - TX FIFO is Empty"] #[inline(always)] - pub fn txempty(&mut self) -> TXEMPTY_W { - TXEMPTY_W { w: self } + #[must_use] + pub fn txempty(&mut self) -> TxemptyW { + TxemptyW::new(self, 12) } #[doc = "Bit 13 - TX FIFO is Full"] #[inline(always)] - pub fn txnfull(&mut self) -> TXNFULL_W { - TXNFULL_W { w: self } + #[must_use] + pub fn txnfull(&mut self) -> TxnfullW { + TxnfullW::new(self, 13) } #[doc = "Bit 15 - TX FIFO Below Trigger Level"] #[inline(always)] - pub fn txtrigger(&mut self) -> TXTRIGGER_W { - TXTRIGGER_W { w: self } + #[must_use] + pub fn txtrigger(&mut self) -> TxtriggerW { + TxtriggerW::new(self, 15) } #[doc = "Bit 30 - I2C Raw SDA value"] #[inline(always)] - pub fn raw_sda(&mut self) -> RAW_SDA_W { - RAW_SDA_W { w: self } + #[must_use] + pub fn raw_sda(&mut self) -> RawSdaW { + RawSdaW::new(self, 30) } #[doc = "Bit 31 - I2C Raw SCL value"] #[inline(always)] - pub fn raw_scl(&mut self) -> RAW_SCL_W { - RAW_SCL_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn raw_scl(&mut self) -> RawSclW { + RawSclW::new(self, 31) } } -#[doc = "I2C Controller Status Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +#[doc = "I2C Controller Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`status::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`status::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [status::R](R) reader structure"] -impl crate::Readable for STATUS_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [status::W](W) writer structure"] -impl crate::Writable for STATUS_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`status::R`](R) reader structure"] +impl crate::Readable for StatusSpec {} +#[doc = "`write(|w| ..)` method takes [`status::W`](W) writer structure"] +impl crate::Writable for StatusSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets STATUS to value 0"] -impl crate::Resettable for STATUS_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for StatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/i2c0/tmconfig.rs b/va416xx/src/i2c0/tmconfig.rs index c9700c3..2d0e025 100644 --- a/va416xx/src/i2c0/tmconfig.rs +++ b/va416xx/src/i2c0/tmconfig.rs @@ -1,64 +1,27 @@ #[doc = "Register `TMCONFIG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TMCONFIG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 +pub type W = crate::W; +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) } } -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -impl W { - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "Timing Config Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tmconfig](index.html) module"] -pub struct TMCONFIG_SPEC; -impl crate::RegisterSpec for TMCONFIG_SPEC { +impl W {} +#[doc = "Timing Config Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tmconfig::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tmconfig::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TmconfigSpec; +impl crate::RegisterSpec for TmconfigSpec { type Ux = u32; } -#[doc = "`read()` method returns [tmconfig::R](R) reader structure"] -impl crate::Readable for TMCONFIG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [tmconfig::W](W) writer structure"] -impl crate::Writable for TMCONFIG_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`tmconfig::R`](R) reader structure"] +impl crate::Readable for TmconfigSpec {} +#[doc = "`write(|w| ..)` method takes [`tmconfig::W`](W) writer structure"] +impl crate::Writable for TmconfigSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TMCONFIG to value 0"] -impl crate::Resettable for TMCONFIG_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for TmconfigSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/i2c0/txcount.rs b/va416xx/src/i2c0/txcount.rs index 59db92b..ae64e43 100644 --- a/va416xx/src/i2c0/txcount.rs +++ b/va416xx/src/i2c0/txcount.rs @@ -1,31 +1,18 @@ #[doc = "Register `TXCOUNT` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 +pub type R = crate::R; +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) } } -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "TX Count Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txcount](index.html) module"] -pub struct TXCOUNT_SPEC; -impl crate::RegisterSpec for TXCOUNT_SPEC { +#[doc = "TX Count Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txcount::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TxcountSpec; +impl crate::RegisterSpec for TxcountSpec { type Ux = u32; } -#[doc = "`read()` method returns [txcount::R](R) reader structure"] -impl crate::Readable for TXCOUNT_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`txcount::R`](R) reader structure"] +impl crate::Readable for TxcountSpec {} #[doc = "`reset()` method sets TXCOUNT to value 0"] -impl crate::Resettable for TXCOUNT_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for TxcountSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/i2c0/txfifoirqtrg.rs b/va416xx/src/i2c0/txfifoirqtrg.rs index a88c823..0d13e54 100644 --- a/va416xx/src/i2c0/txfifoirqtrg.rs +++ b/va416xx/src/i2c0/txfifoirqtrg.rs @@ -1,64 +1,27 @@ #[doc = "Register `TXFIFOIRQTRG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TXFIFOIRQTRG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 +pub type W = crate::W; +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) } } -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -impl W { - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "Tx FIFO IRQ Trigger Level\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txfifoirqtrg](index.html) module"] -pub struct TXFIFOIRQTRG_SPEC; -impl crate::RegisterSpec for TXFIFOIRQTRG_SPEC { +impl W {} +#[doc = "Tx FIFO IRQ Trigger Level\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txfifoirqtrg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`txfifoirqtrg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TxfifoirqtrgSpec; +impl crate::RegisterSpec for TxfifoirqtrgSpec { type Ux = u32; } -#[doc = "`read()` method returns [txfifoirqtrg::R](R) reader structure"] -impl crate::Readable for TXFIFOIRQTRG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [txfifoirqtrg::W](W) writer structure"] -impl crate::Writable for TXFIFOIRQTRG_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`txfifoirqtrg::R`](R) reader structure"] +impl crate::Readable for TxfifoirqtrgSpec {} +#[doc = "`write(|w| ..)` method takes [`txfifoirqtrg::W`](W) writer structure"] +impl crate::Writable for TxfifoirqtrgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TXFIFOIRQTRG to value 0"] -impl crate::Resettable for TXFIFOIRQTRG_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for TxfifoirqtrgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/i2c0/words.rs b/va416xx/src/i2c0/words.rs index 04e1ee5..9aedb52 100644 --- a/va416xx/src/i2c0/words.rs +++ b/va416xx/src/i2c0/words.rs @@ -1,64 +1,27 @@ #[doc = "Register `WORDS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `WORDS` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 +pub type W = crate::W; +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) } } -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -impl W { - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "Word Count value\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [words](index.html) module"] -pub struct WORDS_SPEC; -impl crate::RegisterSpec for WORDS_SPEC { +impl W {} +#[doc = "Word Count value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`words::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`words::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct WordsSpec; +impl crate::RegisterSpec for WordsSpec { type Ux = u32; } -#[doc = "`read()` method returns [words::R](R) reader structure"] -impl crate::Readable for WORDS_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [words::W](W) writer structure"] -impl crate::Writable for WORDS_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`words::R`](R) reader structure"] +impl crate::Readable for WordsSpec {} +#[doc = "`write(|w| ..)` method takes [`words::W`](W) writer structure"] +impl crate::Writable for WordsSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets WORDS to value 0"] -impl crate::Resettable for WORDS_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for WordsSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/ioconfig.rs b/va416xx/src/ioconfig.rs index 477ed2c..b6a329e 100644 --- a/va416xx/src/ioconfig.rs +++ b/va416xx/src/ioconfig.rs @@ -1,102 +1,218 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - #[doc = "0x00..0x40 - PORTA Pin Configuration Register"] - pub porta: [crate::Reg; 16], - #[doc = "0x40..0x80 - PORTB Pin Configuration Register"] - pub portb: [crate::Reg; 16], - #[doc = "0x80..0xc0 - PORTC Pin Configuration Register"] - pub portc: [crate::Reg; 16], - #[doc = "0xc0..0x100 - PORTD Pin Configuration Register"] - pub portd: [crate::Reg; 16], - #[doc = "0x100..0x140 - PORTE Pin Configuration Register"] - pub porte: [crate::Reg; 16], - #[doc = "0x140..0x180 - PORTF Pin Configuration Register"] - pub portf: [crate::Reg; 16], - #[doc = "0x180..0x1a0 - PORTG Pin Configuration Register"] - pub portg: [crate::Reg; 8], + porta: [Porta; 16], + portb0: [Portb; 16], + portc0: [Portc; 16], + portd0: [Portd; 16], + porte0: [Porte; 16], + portf0: [Portf; 16], + portg0: [Portg; 8], _reserved7: [u8; 0x20], - #[doc = "0x1c0 - Clock divide value. 0 will disable the clock"] - pub clkdiv0: crate::Reg, - #[doc = "0x1c4 - Clock divide value. 0 will disable the clock"] - pub clkdiv1: crate::Reg, - #[doc = "0x1c8 - Clock divide value. 0 will disable the clock"] - pub clkdiv2: crate::Reg, - #[doc = "0x1cc - Clock divide value. 0 will disable the clock"] - pub clkdiv3: crate::Reg, - #[doc = "0x1d0 - Clock divide value. 0 will disable the clock"] - pub clkdiv4: crate::Reg, - #[doc = "0x1d4 - Clock divide value. 0 will disable the clock"] - pub clkdiv5: crate::Reg, - #[doc = "0x1d8 - Clock divide value. 0 will disable the clock"] - pub clkdiv6: crate::Reg, - #[doc = "0x1dc - Clock divide value. 0 will disable the clock"] - pub clkdiv7: crate::Reg, + clkdiv0: Clkdiv0, + clkdiv1: Clkdiv1, + clkdiv2: Clkdiv2, + clkdiv3: Clkdiv3, + clkdiv4: Clkdiv4, + clkdiv5: Clkdiv5, + clkdiv6: Clkdiv6, + clkdiv7: Clkdiv7, _reserved15: [u8; 0x0e1c], - #[doc = "0xffc - Peripheral ID Register"] - pub perid: crate::Reg, + perid: Perid, } -#[doc = "PORTA register accessor: an alias for `Reg`"] -pub type PORTA = crate::Reg; +impl RegisterBlock { + #[doc = "0x00..0x40 - PORTA Pin Configuration Register"] + #[inline(always)] + pub const fn porta(&self, n: usize) -> &Porta { + &self.porta[n] + } + #[doc = "Iterator for array of:"] + #[doc = "0x00..0x40 - PORTA Pin Configuration Register"] + #[inline(always)] + pub fn porta_iter(&self) -> impl Iterator { + self.porta.iter() + } + #[doc = "0x40..0x80 - PORTB Pin Configuration Register"] + #[inline(always)] + pub const fn portb0(&self, n: usize) -> &Portb { + &self.portb0[n] + } + #[doc = "Iterator for array of:"] + #[doc = "0x40..0x80 - PORTB Pin Configuration Register"] + #[inline(always)] + pub fn portb0_iter(&self) -> impl Iterator { + self.portb0.iter() + } + #[doc = "0x80..0xc0 - PORTC Pin Configuration Register"] + #[inline(always)] + pub const fn portc0(&self, n: usize) -> &Portc { + &self.portc0[n] + } + #[doc = "Iterator for array of:"] + #[doc = "0x80..0xc0 - PORTC Pin Configuration Register"] + #[inline(always)] + pub fn portc0_iter(&self) -> impl Iterator { + self.portc0.iter() + } + #[doc = "0xc0..0x100 - PORTD Pin Configuration Register"] + #[inline(always)] + pub const fn portd0(&self, n: usize) -> &Portd { + &self.portd0[n] + } + #[doc = "Iterator for array of:"] + #[doc = "0xc0..0x100 - PORTD Pin Configuration Register"] + #[inline(always)] + pub fn portd0_iter(&self) -> impl Iterator { + self.portd0.iter() + } + #[doc = "0x100..0x140 - PORTE Pin Configuration Register"] + #[inline(always)] + pub const fn porte0(&self, n: usize) -> &Porte { + &self.porte0[n] + } + #[doc = "Iterator for array of:"] + #[doc = "0x100..0x140 - PORTE Pin Configuration Register"] + #[inline(always)] + pub fn porte0_iter(&self) -> impl Iterator { + self.porte0.iter() + } + #[doc = "0x140..0x180 - PORTF Pin Configuration Register"] + #[inline(always)] + pub const fn portf0(&self, n: usize) -> &Portf { + &self.portf0[n] + } + #[doc = "Iterator for array of:"] + #[doc = "0x140..0x180 - PORTF Pin Configuration Register"] + #[inline(always)] + pub fn portf0_iter(&self) -> impl Iterator { + self.portf0.iter() + } + #[doc = "0x180..0x1a0 - PORTG Pin Configuration Register"] + #[inline(always)] + pub const fn portg0(&self, n: usize) -> &Portg { + &self.portg0[n] + } + #[doc = "Iterator for array of:"] + #[doc = "0x180..0x1a0 - PORTG Pin Configuration Register"] + #[inline(always)] + pub fn portg0_iter(&self) -> impl Iterator { + self.portg0.iter() + } + #[doc = "0x1c0 - Clock divide value. 0 will disable the clock"] + #[inline(always)] + pub const fn clkdiv0(&self) -> &Clkdiv0 { + &self.clkdiv0 + } + #[doc = "0x1c4 - Clock divide value. 0 will disable the clock"] + #[inline(always)] + pub const fn clkdiv1(&self) -> &Clkdiv1 { + &self.clkdiv1 + } + #[doc = "0x1c8 - Clock divide value. 0 will disable the clock"] + #[inline(always)] + pub const fn clkdiv2(&self) -> &Clkdiv2 { + &self.clkdiv2 + } + #[doc = "0x1cc - Clock divide value. 0 will disable the clock"] + #[inline(always)] + pub const fn clkdiv3(&self) -> &Clkdiv3 { + &self.clkdiv3 + } + #[doc = "0x1d0 - Clock divide value. 0 will disable the clock"] + #[inline(always)] + pub const fn clkdiv4(&self) -> &Clkdiv4 { + &self.clkdiv4 + } + #[doc = "0x1d4 - Clock divide value. 0 will disable the clock"] + #[inline(always)] + pub const fn clkdiv5(&self) -> &Clkdiv5 { + &self.clkdiv5 + } + #[doc = "0x1d8 - Clock divide value. 0 will disable the clock"] + #[inline(always)] + pub const fn clkdiv6(&self) -> &Clkdiv6 { + &self.clkdiv6 + } + #[doc = "0x1dc - Clock divide value. 0 will disable the clock"] + #[inline(always)] + pub const fn clkdiv7(&self) -> &Clkdiv7 { + &self.clkdiv7 + } + #[doc = "0xffc - Peripheral ID Register"] + #[inline(always)] + pub const fn perid(&self) -> &Perid { + &self.perid + } +} +#[doc = "PORTA (rw) register accessor: PORTA Pin Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`porta::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`porta::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@porta`] +module"] +#[doc(alias = "PORTA")] +pub type Porta = crate::Reg; #[doc = "PORTA Pin Configuration Register"] pub mod porta; -#[doc = "PORTB register accessor: an alias for `Reg`"] -pub type PORTB = crate::Reg; -#[doc = "PORTB Pin Configuration Register"] -pub mod portb; -#[doc = "PORTC register accessor: an alias for `Reg`"] -pub type PORTC = crate::Reg; -#[doc = "PORTC Pin Configuration Register"] -pub mod portc; -#[doc = "PORTD register accessor: an alias for `Reg`"] -pub type PORTD = crate::Reg; -#[doc = "PORTD Pin Configuration Register"] -pub mod portd; -#[doc = "PORTE register accessor: an alias for `Reg`"] -pub type PORTE = crate::Reg; -#[doc = "PORTE Pin Configuration Register"] -pub mod porte; -#[doc = "PORTF register accessor: an alias for `Reg`"] -pub type PORTF = crate::Reg; -#[doc = "PORTF Pin Configuration Register"] -pub mod portf; -#[doc = "PORTG register accessor: an alias for `Reg`"] -pub type PORTG = crate::Reg; -#[doc = "PORTG Pin Configuration Register"] -pub mod portg; -#[doc = "CLKDIV0 register accessor: an alias for `Reg`"] -pub type CLKDIV0 = crate::Reg; +pub use porta as portb; +pub use porta as portc; +pub use porta as portd; +pub use porta as porte; +pub use porta as portf; +pub use porta as portg; +pub use Porta as Portb; +pub use Porta as Portc; +pub use Porta as Portd; +pub use Porta as Porte; +pub use Porta as Portf; +pub use Porta as Portg; +#[doc = "CLKDIV0 (r) register accessor: Clock divide value. 0 will disable the clock\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clkdiv0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkdiv0`] +module"] +#[doc(alias = "CLKDIV0")] +pub type Clkdiv0 = crate::Reg; #[doc = "Clock divide value. 0 will disable the clock"] pub mod clkdiv0; -#[doc = "CLKDIV1 register accessor: an alias for `Reg`"] -pub type CLKDIV1 = crate::Reg; +#[doc = "CLKDIV1 (rw) register accessor: Clock divide value. 0 will disable the clock\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clkdiv1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clkdiv1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkdiv1`] +module"] +#[doc(alias = "CLKDIV1")] +pub type Clkdiv1 = crate::Reg; #[doc = "Clock divide value. 0 will disable the clock"] pub mod clkdiv1; -#[doc = "CLKDIV2 register accessor: an alias for `Reg`"] -pub type CLKDIV2 = crate::Reg; +#[doc = "CLKDIV2 (rw) register accessor: Clock divide value. 0 will disable the clock\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clkdiv2::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clkdiv2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkdiv2`] +module"] +#[doc(alias = "CLKDIV2")] +pub type Clkdiv2 = crate::Reg; #[doc = "Clock divide value. 0 will disable the clock"] pub mod clkdiv2; -#[doc = "CLKDIV3 register accessor: an alias for `Reg`"] -pub type CLKDIV3 = crate::Reg; +#[doc = "CLKDIV3 (rw) register accessor: Clock divide value. 0 will disable the clock\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clkdiv3::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clkdiv3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkdiv3`] +module"] +#[doc(alias = "CLKDIV3")] +pub type Clkdiv3 = crate::Reg; #[doc = "Clock divide value. 0 will disable the clock"] pub mod clkdiv3; -#[doc = "CLKDIV4 register accessor: an alias for `Reg`"] -pub type CLKDIV4 = crate::Reg; +#[doc = "CLKDIV4 (rw) register accessor: Clock divide value. 0 will disable the clock\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clkdiv4::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clkdiv4::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkdiv4`] +module"] +#[doc(alias = "CLKDIV4")] +pub type Clkdiv4 = crate::Reg; #[doc = "Clock divide value. 0 will disable the clock"] pub mod clkdiv4; -#[doc = "CLKDIV5 register accessor: an alias for `Reg`"] -pub type CLKDIV5 = crate::Reg; +#[doc = "CLKDIV5 (rw) register accessor: Clock divide value. 0 will disable the clock\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clkdiv5::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clkdiv5::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkdiv5`] +module"] +#[doc(alias = "CLKDIV5")] +pub type Clkdiv5 = crate::Reg; #[doc = "Clock divide value. 0 will disable the clock"] pub mod clkdiv5; -#[doc = "CLKDIV6 register accessor: an alias for `Reg`"] -pub type CLKDIV6 = crate::Reg; +#[doc = "CLKDIV6 (rw) register accessor: Clock divide value. 0 will disable the clock\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clkdiv6::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clkdiv6::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkdiv6`] +module"] +#[doc(alias = "CLKDIV6")] +pub type Clkdiv6 = crate::Reg; #[doc = "Clock divide value. 0 will disable the clock"] pub mod clkdiv6; -#[doc = "CLKDIV7 register accessor: an alias for `Reg`"] -pub type CLKDIV7 = crate::Reg; +#[doc = "CLKDIV7 (rw) register accessor: Clock divide value. 0 will disable the clock\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clkdiv7::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clkdiv7::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkdiv7`] +module"] +#[doc(alias = "CLKDIV7")] +pub type Clkdiv7 = crate::Reg; #[doc = "Clock divide value. 0 will disable the clock"] pub mod clkdiv7; -#[doc = "PERID register accessor: an alias for `Reg`"] -pub type PERID = crate::Reg; +#[doc = "PERID (r) register accessor: Peripheral ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`perid::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@perid`] +module"] +#[doc(alias = "PERID")] +pub type Perid = crate::Reg; #[doc = "Peripheral ID Register"] pub mod perid; diff --git a/va416xx/src/ioconfig/clkdiv0.rs b/va416xx/src/ioconfig/clkdiv0.rs index 337076b..387ae41 100644 --- a/va416xx/src/ioconfig/clkdiv0.rs +++ b/va416xx/src/ioconfig/clkdiv0.rs @@ -1,31 +1,18 @@ #[doc = "Register `CLKDIV0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 +pub type R = crate::R; +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) } } -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Clock divide value. 0 will disable the clock\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [clkdiv0](index.html) module"] -pub struct CLKDIV0_SPEC; -impl crate::RegisterSpec for CLKDIV0_SPEC { +#[doc = "Clock divide value. 0 will disable the clock\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clkdiv0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Clkdiv0Spec; +impl crate::RegisterSpec for Clkdiv0Spec { type Ux = u32; } -#[doc = "`read()` method returns [clkdiv0::R](R) reader structure"] -impl crate::Readable for CLKDIV0_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`clkdiv0::R`](R) reader structure"] +impl crate::Readable for Clkdiv0Spec {} #[doc = "`reset()` method sets CLKDIV0 to value 0"] -impl crate::Resettable for CLKDIV0_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Clkdiv0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/ioconfig/clkdiv1.rs b/va416xx/src/ioconfig/clkdiv1.rs index 553a9b7..3bc2701 100644 --- a/va416xx/src/ioconfig/clkdiv1.rs +++ b/va416xx/src/ioconfig/clkdiv1.rs @@ -1,64 +1,27 @@ #[doc = "Register `CLKDIV1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CLKDIV1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 +pub type W = crate::W; +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) } } -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -impl W { - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "Clock divide value. 0 will disable the clock\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [clkdiv1](index.html) module"] -pub struct CLKDIV1_SPEC; -impl crate::RegisterSpec for CLKDIV1_SPEC { +impl W {} +#[doc = "Clock divide value. 0 will disable the clock\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clkdiv1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clkdiv1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Clkdiv1Spec; +impl crate::RegisterSpec for Clkdiv1Spec { type Ux = u32; } -#[doc = "`read()` method returns [clkdiv1::R](R) reader structure"] -impl crate::Readable for CLKDIV1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [clkdiv1::W](W) writer structure"] -impl crate::Writable for CLKDIV1_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`clkdiv1::R`](R) reader structure"] +impl crate::Readable for Clkdiv1Spec {} +#[doc = "`write(|w| ..)` method takes [`clkdiv1::W`](W) writer structure"] +impl crate::Writable for Clkdiv1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CLKDIV1 to value 0"] -impl crate::Resettable for CLKDIV1_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Clkdiv1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/ioconfig/clkdiv2.rs b/va416xx/src/ioconfig/clkdiv2.rs index 3fdbbf5..80e2943 100644 --- a/va416xx/src/ioconfig/clkdiv2.rs +++ b/va416xx/src/ioconfig/clkdiv2.rs @@ -1,64 +1,27 @@ #[doc = "Register `CLKDIV2` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CLKDIV2` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 +pub type W = crate::W; +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) } } -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -impl W { - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "Clock divide value. 0 will disable the clock\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [clkdiv2](index.html) module"] -pub struct CLKDIV2_SPEC; -impl crate::RegisterSpec for CLKDIV2_SPEC { +impl W {} +#[doc = "Clock divide value. 0 will disable the clock\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clkdiv2::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clkdiv2::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Clkdiv2Spec; +impl crate::RegisterSpec for Clkdiv2Spec { type Ux = u32; } -#[doc = "`read()` method returns [clkdiv2::R](R) reader structure"] -impl crate::Readable for CLKDIV2_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [clkdiv2::W](W) writer structure"] -impl crate::Writable for CLKDIV2_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`clkdiv2::R`](R) reader structure"] +impl crate::Readable for Clkdiv2Spec {} +#[doc = "`write(|w| ..)` method takes [`clkdiv2::W`](W) writer structure"] +impl crate::Writable for Clkdiv2Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CLKDIV2 to value 0"] -impl crate::Resettable for CLKDIV2_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Clkdiv2Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/ioconfig/clkdiv3.rs b/va416xx/src/ioconfig/clkdiv3.rs index f5763a2..d7ed7d0 100644 --- a/va416xx/src/ioconfig/clkdiv3.rs +++ b/va416xx/src/ioconfig/clkdiv3.rs @@ -1,64 +1,27 @@ #[doc = "Register `CLKDIV3` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CLKDIV3` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 +pub type W = crate::W; +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) } } -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -impl W { - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "Clock divide value. 0 will disable the clock\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [clkdiv3](index.html) module"] -pub struct CLKDIV3_SPEC; -impl crate::RegisterSpec for CLKDIV3_SPEC { +impl W {} +#[doc = "Clock divide value. 0 will disable the clock\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clkdiv3::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clkdiv3::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Clkdiv3Spec; +impl crate::RegisterSpec for Clkdiv3Spec { type Ux = u32; } -#[doc = "`read()` method returns [clkdiv3::R](R) reader structure"] -impl crate::Readable for CLKDIV3_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [clkdiv3::W](W) writer structure"] -impl crate::Writable for CLKDIV3_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`clkdiv3::R`](R) reader structure"] +impl crate::Readable for Clkdiv3Spec {} +#[doc = "`write(|w| ..)` method takes [`clkdiv3::W`](W) writer structure"] +impl crate::Writable for Clkdiv3Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CLKDIV3 to value 0"] -impl crate::Resettable for CLKDIV3_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Clkdiv3Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/ioconfig/clkdiv4.rs b/va416xx/src/ioconfig/clkdiv4.rs index 38989da..72ccd13 100644 --- a/va416xx/src/ioconfig/clkdiv4.rs +++ b/va416xx/src/ioconfig/clkdiv4.rs @@ -1,64 +1,27 @@ #[doc = "Register `CLKDIV4` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CLKDIV4` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 +pub type W = crate::W; +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) } } -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -impl W { - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "Clock divide value. 0 will disable the clock\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [clkdiv4](index.html) module"] -pub struct CLKDIV4_SPEC; -impl crate::RegisterSpec for CLKDIV4_SPEC { +impl W {} +#[doc = "Clock divide value. 0 will disable the clock\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clkdiv4::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clkdiv4::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Clkdiv4Spec; +impl crate::RegisterSpec for Clkdiv4Spec { type Ux = u32; } -#[doc = "`read()` method returns [clkdiv4::R](R) reader structure"] -impl crate::Readable for CLKDIV4_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [clkdiv4::W](W) writer structure"] -impl crate::Writable for CLKDIV4_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`clkdiv4::R`](R) reader structure"] +impl crate::Readable for Clkdiv4Spec {} +#[doc = "`write(|w| ..)` method takes [`clkdiv4::W`](W) writer structure"] +impl crate::Writable for Clkdiv4Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CLKDIV4 to value 0"] -impl crate::Resettable for CLKDIV4_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Clkdiv4Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/ioconfig/clkdiv5.rs b/va416xx/src/ioconfig/clkdiv5.rs index e55ca19..2481bef 100644 --- a/va416xx/src/ioconfig/clkdiv5.rs +++ b/va416xx/src/ioconfig/clkdiv5.rs @@ -1,64 +1,27 @@ #[doc = "Register `CLKDIV5` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CLKDIV5` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 +pub type W = crate::W; +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) } } -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -impl W { - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "Clock divide value. 0 will disable the clock\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [clkdiv5](index.html) module"] -pub struct CLKDIV5_SPEC; -impl crate::RegisterSpec for CLKDIV5_SPEC { +impl W {} +#[doc = "Clock divide value. 0 will disable the clock\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clkdiv5::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clkdiv5::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Clkdiv5Spec; +impl crate::RegisterSpec for Clkdiv5Spec { type Ux = u32; } -#[doc = "`read()` method returns [clkdiv5::R](R) reader structure"] -impl crate::Readable for CLKDIV5_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [clkdiv5::W](W) writer structure"] -impl crate::Writable for CLKDIV5_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`clkdiv5::R`](R) reader structure"] +impl crate::Readable for Clkdiv5Spec {} +#[doc = "`write(|w| ..)` method takes [`clkdiv5::W`](W) writer structure"] +impl crate::Writable for Clkdiv5Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CLKDIV5 to value 0"] -impl crate::Resettable for CLKDIV5_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Clkdiv5Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/ioconfig/clkdiv6.rs b/va416xx/src/ioconfig/clkdiv6.rs index 9527e28..cbd5c0a 100644 --- a/va416xx/src/ioconfig/clkdiv6.rs +++ b/va416xx/src/ioconfig/clkdiv6.rs @@ -1,64 +1,27 @@ #[doc = "Register `CLKDIV6` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CLKDIV6` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 +pub type W = crate::W; +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) } } -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -impl W { - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "Clock divide value. 0 will disable the clock\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [clkdiv6](index.html) module"] -pub struct CLKDIV6_SPEC; -impl crate::RegisterSpec for CLKDIV6_SPEC { +impl W {} +#[doc = "Clock divide value. 0 will disable the clock\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clkdiv6::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clkdiv6::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Clkdiv6Spec; +impl crate::RegisterSpec for Clkdiv6Spec { type Ux = u32; } -#[doc = "`read()` method returns [clkdiv6::R](R) reader structure"] -impl crate::Readable for CLKDIV6_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [clkdiv6::W](W) writer structure"] -impl crate::Writable for CLKDIV6_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`clkdiv6::R`](R) reader structure"] +impl crate::Readable for Clkdiv6Spec {} +#[doc = "`write(|w| ..)` method takes [`clkdiv6::W`](W) writer structure"] +impl crate::Writable for Clkdiv6Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CLKDIV6 to value 0"] -impl crate::Resettable for CLKDIV6_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Clkdiv6Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/ioconfig/clkdiv7.rs b/va416xx/src/ioconfig/clkdiv7.rs index 09ac34b..f461430 100644 --- a/va416xx/src/ioconfig/clkdiv7.rs +++ b/va416xx/src/ioconfig/clkdiv7.rs @@ -1,64 +1,27 @@ #[doc = "Register `CLKDIV7` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CLKDIV7` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 +pub type W = crate::W; +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) } } -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -impl W { - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "Clock divide value. 0 will disable the clock\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [clkdiv7](index.html) module"] -pub struct CLKDIV7_SPEC; -impl crate::RegisterSpec for CLKDIV7_SPEC { +impl W {} +#[doc = "Clock divide value. 0 will disable the clock\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clkdiv7::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clkdiv7::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Clkdiv7Spec; +impl crate::RegisterSpec for Clkdiv7Spec { type Ux = u32; } -#[doc = "`read()` method returns [clkdiv7::R](R) reader structure"] -impl crate::Readable for CLKDIV7_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [clkdiv7::W](W) writer structure"] -impl crate::Writable for CLKDIV7_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`clkdiv7::R`](R) reader structure"] +impl crate::Readable for Clkdiv7Spec {} +#[doc = "`write(|w| ..)` method takes [`clkdiv7::W`](W) writer structure"] +impl crate::Writable for Clkdiv7Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CLKDIV7 to value 0"] -impl crate::Resettable for CLKDIV7_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Clkdiv7Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/ioconfig/perid.rs b/va416xx/src/ioconfig/perid.rs index 9bc7997..6966c57 100644 --- a/va416xx/src/ioconfig/perid.rs +++ b/va416xx/src/ioconfig/perid.rs @@ -1,31 +1,18 @@ #[doc = "Register `PERID` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 +pub type R = crate::R; +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) } } -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Peripheral ID Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [perid](index.html) module"] -pub struct PERID_SPEC; -impl crate::RegisterSpec for PERID_SPEC { +#[doc = "Peripheral ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`perid::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PeridSpec; +impl crate::RegisterSpec for PeridSpec { type Ux = u32; } -#[doc = "`read()` method returns [perid::R](R) reader structure"] -impl crate::Readable for PERID_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`perid::R`](R) reader structure"] +impl crate::Readable for PeridSpec {} #[doc = "`reset()` method sets PERID to value 0x0282_07e9"] -impl crate::Resettable for PERID_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0x0282_07e9 - } +impl crate::Resettable for PeridSpec { + const RESET_VALUE: u32 = 0x0282_07e9; } diff --git a/va416xx/src/ioconfig/porta.rs b/va416xx/src/ioconfig/porta.rs index 13d1444..b068faa 100644 --- a/va416xx/src/ioconfig/porta.rs +++ b/va416xx/src/ioconfig/porta.rs @@ -1,655 +1,299 @@ #[doc = "Register `PORTA[%s]` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PORTA[%s]` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Input Filter Selectoin\n\nValue on reset: 0"] -#[derive(Clone, Copy, Debug, PartialEq)] +#[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum FLTTYPE_A { +pub enum Flttype { #[doc = "0: Synchronize to system clock"] - SYNC = 0, + Sync = 0, #[doc = "1: Direct input, no synchronization"] - DIRECT = 1, + Direct = 1, #[doc = "2: Require 2 samples to have the same value"] - FILTER1 = 2, + Filter1 = 2, #[doc = "3: Require 3 samples to have the same value"] - FILTER2 = 3, + Filter2 = 3, #[doc = "4: Require 4 samples to have the same value"] - FILTER3 = 4, + Filter3 = 4, #[doc = "5: Require 5 samples to have the same value"] - FILTER4 = 5, + Filter4 = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: FLTTYPE_A) -> Self { + fn from(variant: Flttype) -> Self { variant as _ } } +impl crate::FieldSpec for Flttype { + type Ux = u8; +} +impl crate::IsEnum for Flttype {} #[doc = "Field `FLTTYPE` reader - Input Filter Selectoin"] -pub struct FLTTYPE_R(crate::FieldReader); -impl FLTTYPE_R { +pub type FlttypeR = crate::FieldReader; +impl FlttypeR { + #[doc = "Get enumerated values variant"] #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - FLTTYPE_R(crate::FieldReader::new(bits)) - } - #[doc = r"Get enumerated values variant"] - #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(FLTTYPE_A::SYNC), - 1 => Some(FLTTYPE_A::DIRECT), - 2 => Some(FLTTYPE_A::FILTER1), - 3 => Some(FLTTYPE_A::FILTER2), - 4 => Some(FLTTYPE_A::FILTER3), - 5 => Some(FLTTYPE_A::FILTER4), + 0 => Some(Flttype::Sync), + 1 => Some(Flttype::Direct), + 2 => Some(Flttype::Filter1), + 3 => Some(Flttype::Filter2), + 4 => Some(Flttype::Filter3), + 5 => Some(Flttype::Filter4), _ => None, } } - #[doc = "Checks if the value of the field is `SYNC`"] - #[inline(always)] - pub fn is_sync(&self) -> bool { - **self == FLTTYPE_A::SYNC - } - #[doc = "Checks if the value of the field is `DIRECT`"] - #[inline(always)] - pub fn is_direct(&self) -> bool { - **self == FLTTYPE_A::DIRECT - } - #[doc = "Checks if the value of the field is `FILTER1`"] - #[inline(always)] - pub fn is_filter1(&self) -> bool { - **self == FLTTYPE_A::FILTER1 - } - #[doc = "Checks if the value of the field is `FILTER2`"] - #[inline(always)] - pub fn is_filter2(&self) -> bool { - **self == FLTTYPE_A::FILTER2 - } - #[doc = "Checks if the value of the field is `FILTER3`"] - #[inline(always)] - pub fn is_filter3(&self) -> bool { - **self == FLTTYPE_A::FILTER3 - } - #[doc = "Checks if the value of the field is `FILTER4`"] - #[inline(always)] - pub fn is_filter4(&self) -> bool { - **self == FLTTYPE_A::FILTER4 - } -} -impl core::ops::Deref for FLTTYPE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `FLTTYPE` writer - Input Filter Selectoin"] -pub struct FLTTYPE_W<'a> { - w: &'a mut W, -} -impl<'a> FLTTYPE_W<'a> { - #[doc = r"Writes `variant` to the field"] - #[inline(always)] - pub fn variant(self, variant: FLTTYPE_A) -> &'a mut W { - unsafe { self.bits(variant.into()) } - } #[doc = "Synchronize to system clock"] #[inline(always)] - pub fn sync(self) -> &'a mut W { - self.variant(FLTTYPE_A::SYNC) + pub fn is_sync(&self) -> bool { + *self == Flttype::Sync } #[doc = "Direct input, no synchronization"] #[inline(always)] - pub fn direct(self) -> &'a mut W { - self.variant(FLTTYPE_A::DIRECT) + pub fn is_direct(&self) -> bool { + *self == Flttype::Direct } #[doc = "Require 2 samples to have the same value"] #[inline(always)] - pub fn filter1(self) -> &'a mut W { - self.variant(FLTTYPE_A::FILTER1) + pub fn is_filter1(&self) -> bool { + *self == Flttype::Filter1 } #[doc = "Require 3 samples to have the same value"] #[inline(always)] - pub fn filter2(self) -> &'a mut W { - self.variant(FLTTYPE_A::FILTER2) + pub fn is_filter2(&self) -> bool { + *self == Flttype::Filter2 } #[doc = "Require 4 samples to have the same value"] #[inline(always)] - pub fn filter3(self) -> &'a mut W { - self.variant(FLTTYPE_A::FILTER3) + pub fn is_filter3(&self) -> bool { + *self == Flttype::Filter3 } #[doc = "Require 5 samples to have the same value"] #[inline(always)] - pub fn filter4(self) -> &'a mut W { - self.variant(FLTTYPE_A::FILTER4) + pub fn is_filter4(&self) -> bool { + *self == Flttype::Filter4 } - #[doc = r"Writes raw bits to the field"] +} +#[doc = "Field `FLTTYPE` writer - Input Filter Selectoin"] +pub type FlttypeW<'a, REG> = crate::FieldWriter<'a, REG, 3, Flttype>; +impl<'a, REG> FlttypeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ + #[doc = "Synchronize to system clock"] #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0x07) | (value as u32 & 0x07); - self.w + pub fn sync(self) -> &'a mut crate::W { + self.variant(Flttype::Sync) + } + #[doc = "Direct input, no synchronization"] + #[inline(always)] + pub fn direct(self) -> &'a mut crate::W { + self.variant(Flttype::Direct) + } + #[doc = "Require 2 samples to have the same value"] + #[inline(always)] + pub fn filter1(self) -> &'a mut crate::W { + self.variant(Flttype::Filter1) + } + #[doc = "Require 3 samples to have the same value"] + #[inline(always)] + pub fn filter2(self) -> &'a mut crate::W { + self.variant(Flttype::Filter2) + } + #[doc = "Require 4 samples to have the same value"] + #[inline(always)] + pub fn filter3(self) -> &'a mut crate::W { + self.variant(Flttype::Filter3) + } + #[doc = "Require 5 samples to have the same value"] + #[inline(always)] + pub fn filter4(self) -> &'a mut crate::W { + self.variant(Flttype::Filter4) } } #[doc = "Field `FLTCLK` reader - Input Filter Clock Selection"] -pub struct FLTCLK_R(crate::FieldReader); -impl FLTCLK_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - FLTCLK_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for FLTCLK_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type FltclkR = crate::FieldReader; #[doc = "Field `FLTCLK` writer - Input Filter Clock Selection"] -pub struct FLTCLK_W<'a> { - w: &'a mut W, -} -impl<'a> FLTCLK_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x07 << 3)) | ((value as u32 & 0x07) << 3); - self.w - } -} +pub type FltclkW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `INVINP` reader - Input Invert Selection"] -pub struct INVINP_R(crate::FieldReader); -impl INVINP_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - INVINP_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for INVINP_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type InvinpR = crate::BitReader; #[doc = "Field `INVINP` writer - Input Invert Selection"] -pub struct INVINP_W<'a> { - w: &'a mut W, -} -impl<'a> INVINP_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); - self.w - } -} +pub type InvinpW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `IEWO` reader - Input Enable While Output enabled"] -pub struct IEWO_R(crate::FieldReader); -impl IEWO_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - IEWO_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for IEWO_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type IewoR = crate::BitReader; #[doc = "Field `IEWO` writer - Input Enable While Output enabled"] -pub struct IEWO_W<'a> { - w: &'a mut W, -} -impl<'a> IEWO_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); - self.w - } -} +pub type IewoW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `OPENDRN` reader - Output Open Drain Mode"] -pub struct OPENDRN_R(crate::FieldReader); -impl OPENDRN_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - OPENDRN_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for OPENDRN_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type OpendrnR = crate::BitReader; #[doc = "Field `OPENDRN` writer - Output Open Drain Mode"] -pub struct OPENDRN_W<'a> { - w: &'a mut W, -} -impl<'a> OPENDRN_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); - self.w - } -} +pub type OpendrnW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INVOUT` reader - Output Invert Selection"] -pub struct INVOUT_R(crate::FieldReader); -impl INVOUT_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - INVOUT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for INVOUT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type InvoutR = crate::BitReader; #[doc = "Field `INVOUT` writer - Output Invert Selection"] -pub struct INVOUT_W<'a> { - w: &'a mut W, -} -impl<'a> INVOUT_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); - self.w - } -} +pub type InvoutW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PLEVEL` reader - Internal Pull up/down level"] -pub struct PLEVEL_R(crate::FieldReader); -impl PLEVEL_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - PLEVEL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PLEVEL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type PlevelR = crate::BitReader; #[doc = "Field `PLEVEL` writer - Internal Pull up/down level"] -pub struct PLEVEL_W<'a> { - w: &'a mut W, -} -impl<'a> PLEVEL_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); - self.w - } -} +pub type PlevelW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PEN` reader - Enable Internal Pull up/down"] -pub struct PEN_R(crate::FieldReader); -impl PEN_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - PEN_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PEN_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type PenR = crate::BitReader; #[doc = "Field `PEN` writer - Enable Internal Pull up/down"] -pub struct PEN_W<'a> { - w: &'a mut W, -} -impl<'a> PEN_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); - self.w - } -} +pub type PenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PWOA` reader - Enable Pull when output active"] -pub struct PWOA_R(crate::FieldReader); -impl PWOA_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - PWOA_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PWOA_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type PwoaR = crate::BitReader; #[doc = "Field `PWOA` writer - Enable Pull when output active"] -pub struct PWOA_W<'a> { - w: &'a mut W, -} -impl<'a> PWOA_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); - self.w - } -} +pub type PwoaW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FUNSEL` reader - Pin Function Selection"] -pub struct FUNSEL_R(crate::FieldReader); -impl FUNSEL_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - FUNSEL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for FUNSEL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type FunselR = crate::FieldReader; #[doc = "Field `FUNSEL` writer - Pin Function Selection"] -pub struct FUNSEL_W<'a> { - w: &'a mut W, -} -impl<'a> FUNSEL_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x07 << 13)) | ((value as u32 & 0x07) << 13); - self.w - } -} +pub type FunselW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `IODIS` reader - IO Pin Disable"] -pub struct IODIS_R(crate::FieldReader); -impl IODIS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - IODIS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for IODIS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type IodisR = crate::BitReader; #[doc = "Field `IODIS` writer - IO Pin Disable"] -pub struct IODIS_W<'a> { - w: &'a mut W, -} -impl<'a> IODIS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16); - self.w - } -} +pub type IodisW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:2 - Input Filter Selectoin"] #[inline(always)] - pub fn flttype(&self) -> FLTTYPE_R { - FLTTYPE_R::new((self.bits & 0x07) as u8) + pub fn flttype(&self) -> FlttypeR { + FlttypeR::new((self.bits & 7) as u8) } #[doc = "Bits 3:5 - Input Filter Clock Selection"] #[inline(always)] - pub fn fltclk(&self) -> FLTCLK_R { - FLTCLK_R::new(((self.bits >> 3) & 0x07) as u8) + pub fn fltclk(&self) -> FltclkR { + FltclkR::new(((self.bits >> 3) & 7) as u8) } #[doc = "Bit 6 - Input Invert Selection"] #[inline(always)] - pub fn invinp(&self) -> INVINP_R { - INVINP_R::new(((self.bits >> 6) & 0x01) != 0) + pub fn invinp(&self) -> InvinpR { + InvinpR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Input Enable While Output enabled"] #[inline(always)] - pub fn iewo(&self) -> IEWO_R { - IEWO_R::new(((self.bits >> 7) & 0x01) != 0) + pub fn iewo(&self) -> IewoR { + IewoR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Output Open Drain Mode"] #[inline(always)] - pub fn opendrn(&self) -> OPENDRN_R { - OPENDRN_R::new(((self.bits >> 8) & 0x01) != 0) + pub fn opendrn(&self) -> OpendrnR { + OpendrnR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Output Invert Selection"] #[inline(always)] - pub fn invout(&self) -> INVOUT_R { - INVOUT_R::new(((self.bits >> 9) & 0x01) != 0) + pub fn invout(&self) -> InvoutR { + InvoutR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Internal Pull up/down level"] #[inline(always)] - pub fn plevel(&self) -> PLEVEL_R { - PLEVEL_R::new(((self.bits >> 10) & 0x01) != 0) + pub fn plevel(&self) -> PlevelR { + PlevelR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Enable Internal Pull up/down"] #[inline(always)] - pub fn pen(&self) -> PEN_R { - PEN_R::new(((self.bits >> 11) & 0x01) != 0) + pub fn pen(&self) -> PenR { + PenR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Enable Pull when output active"] #[inline(always)] - pub fn pwoa(&self) -> PWOA_R { - PWOA_R::new(((self.bits >> 12) & 0x01) != 0) + pub fn pwoa(&self) -> PwoaR { + PwoaR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bits 13:15 - Pin Function Selection"] #[inline(always)] - pub fn funsel(&self) -> FUNSEL_R { - FUNSEL_R::new(((self.bits >> 13) & 0x07) as u8) + pub fn funsel(&self) -> FunselR { + FunselR::new(((self.bits >> 13) & 7) as u8) } #[doc = "Bit 16 - IO Pin Disable"] #[inline(always)] - pub fn iodis(&self) -> IODIS_R { - IODIS_R::new(((self.bits >> 16) & 0x01) != 0) + pub fn iodis(&self) -> IodisR { + IodisR::new(((self.bits >> 16) & 1) != 0) } } impl W { #[doc = "Bits 0:2 - Input Filter Selectoin"] #[inline(always)] - pub fn flttype(&mut self) -> FLTTYPE_W { - FLTTYPE_W { w: self } + #[must_use] + pub fn flttype(&mut self) -> FlttypeW { + FlttypeW::new(self, 0) } #[doc = "Bits 3:5 - Input Filter Clock Selection"] #[inline(always)] - pub fn fltclk(&mut self) -> FLTCLK_W { - FLTCLK_W { w: self } + #[must_use] + pub fn fltclk(&mut self) -> FltclkW { + FltclkW::new(self, 3) } #[doc = "Bit 6 - Input Invert Selection"] #[inline(always)] - pub fn invinp(&mut self) -> INVINP_W { - INVINP_W { w: self } + #[must_use] + pub fn invinp(&mut self) -> InvinpW { + InvinpW::new(self, 6) } #[doc = "Bit 7 - Input Enable While Output enabled"] #[inline(always)] - pub fn iewo(&mut self) -> IEWO_W { - IEWO_W { w: self } + #[must_use] + pub fn iewo(&mut self) -> IewoW { + IewoW::new(self, 7) } #[doc = "Bit 8 - Output Open Drain Mode"] #[inline(always)] - pub fn opendrn(&mut self) -> OPENDRN_W { - OPENDRN_W { w: self } + #[must_use] + pub fn opendrn(&mut self) -> OpendrnW { + OpendrnW::new(self, 8) } #[doc = "Bit 9 - Output Invert Selection"] #[inline(always)] - pub fn invout(&mut self) -> INVOUT_W { - INVOUT_W { w: self } + #[must_use] + pub fn invout(&mut self) -> InvoutW { + InvoutW::new(self, 9) } #[doc = "Bit 10 - Internal Pull up/down level"] #[inline(always)] - pub fn plevel(&mut self) -> PLEVEL_W { - PLEVEL_W { w: self } + #[must_use] + pub fn plevel(&mut self) -> PlevelW { + PlevelW::new(self, 10) } #[doc = "Bit 11 - Enable Internal Pull up/down"] #[inline(always)] - pub fn pen(&mut self) -> PEN_W { - PEN_W { w: self } + #[must_use] + pub fn pen(&mut self) -> PenW { + PenW::new(self, 11) } #[doc = "Bit 12 - Enable Pull when output active"] #[inline(always)] - pub fn pwoa(&mut self) -> PWOA_W { - PWOA_W { w: self } + #[must_use] + pub fn pwoa(&mut self) -> PwoaW { + PwoaW::new(self, 12) } #[doc = "Bits 13:15 - Pin Function Selection"] #[inline(always)] - pub fn funsel(&mut self) -> FUNSEL_W { - FUNSEL_W { w: self } + #[must_use] + pub fn funsel(&mut self) -> FunselW { + FunselW::new(self, 13) } #[doc = "Bit 16 - IO Pin Disable"] #[inline(always)] - pub fn iodis(&mut self) -> IODIS_W { - IODIS_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn iodis(&mut self) -> IodisW { + IodisW::new(self, 16) } } -#[doc = "PORTA Pin Configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [porta](index.html) module"] -pub struct PORTA_SPEC; -impl crate::RegisterSpec for PORTA_SPEC { +#[doc = "PORTA Pin Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`porta::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`porta::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PortaSpec; +impl crate::RegisterSpec for PortaSpec { type Ux = u32; } -#[doc = "`read()` method returns [porta::R](R) reader structure"] -impl crate::Readable for PORTA_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [porta::W](W) writer structure"] -impl crate::Writable for PORTA_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`porta::R`](R) reader structure"] +impl crate::Readable for PortaSpec {} +#[doc = "`write(|w| ..)` method takes [`porta::W`](W) writer structure"] +impl crate::Writable for PortaSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PORTA[%s] to value 0"] -impl crate::Resettable for PORTA_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for PortaSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/ioconfig/portb.rs b/va416xx/src/ioconfig/portb.rs deleted file mode 100644 index 3d70286..0000000 --- a/va416xx/src/ioconfig/portb.rs +++ /dev/null @@ -1,655 +0,0 @@ -#[doc = "Register `PORTB[%s]` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Register `PORTB[%s]` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Input Filter Selectoin\n\nValue on reset: 0"] -#[derive(Clone, Copy, Debug, PartialEq)] -#[repr(u8)] -pub enum FLTTYPE_A { - #[doc = "0: Synchronize to system clock"] - SYNC = 0, - #[doc = "1: Direct input, no synchronization"] - DIRECT = 1, - #[doc = "2: Require 2 samples to have the same value"] - FILTER1 = 2, - #[doc = "3: Require 3 samples to have the same value"] - FILTER2 = 3, - #[doc = "4: Require 4 samples to have the same value"] - FILTER3 = 4, - #[doc = "5: Require 5 samples to have the same value"] - FILTER4 = 5, -} -impl From for u8 { - #[inline(always)] - fn from(variant: FLTTYPE_A) -> Self { - variant as _ - } -} -#[doc = "Field `FLTTYPE` reader - Input Filter Selectoin"] -pub struct FLTTYPE_R(crate::FieldReader); -impl FLTTYPE_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - FLTTYPE_R(crate::FieldReader::new(bits)) - } - #[doc = r"Get enumerated values variant"] - #[inline(always)] - pub fn variant(&self) -> Option { - match self.bits { - 0 => Some(FLTTYPE_A::SYNC), - 1 => Some(FLTTYPE_A::DIRECT), - 2 => Some(FLTTYPE_A::FILTER1), - 3 => Some(FLTTYPE_A::FILTER2), - 4 => Some(FLTTYPE_A::FILTER3), - 5 => Some(FLTTYPE_A::FILTER4), - _ => None, - } - } - #[doc = "Checks if the value of the field is `SYNC`"] - #[inline(always)] - pub fn is_sync(&self) -> bool { - **self == FLTTYPE_A::SYNC - } - #[doc = "Checks if the value of the field is `DIRECT`"] - #[inline(always)] - pub fn is_direct(&self) -> bool { - **self == FLTTYPE_A::DIRECT - } - #[doc = "Checks if the value of the field is `FILTER1`"] - #[inline(always)] - pub fn is_filter1(&self) -> bool { - **self == FLTTYPE_A::FILTER1 - } - #[doc = "Checks if the value of the field is `FILTER2`"] - #[inline(always)] - pub fn is_filter2(&self) -> bool { - **self == FLTTYPE_A::FILTER2 - } - #[doc = "Checks if the value of the field is `FILTER3`"] - #[inline(always)] - pub fn is_filter3(&self) -> bool { - **self == FLTTYPE_A::FILTER3 - } - #[doc = "Checks if the value of the field is `FILTER4`"] - #[inline(always)] - pub fn is_filter4(&self) -> bool { - **self == FLTTYPE_A::FILTER4 - } -} -impl core::ops::Deref for FLTTYPE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `FLTTYPE` writer - Input Filter Selectoin"] -pub struct FLTTYPE_W<'a> { - w: &'a mut W, -} -impl<'a> FLTTYPE_W<'a> { - #[doc = r"Writes `variant` to the field"] - #[inline(always)] - pub fn variant(self, variant: FLTTYPE_A) -> &'a mut W { - unsafe { self.bits(variant.into()) } - } - #[doc = "Synchronize to system clock"] - #[inline(always)] - pub fn sync(self) -> &'a mut W { - self.variant(FLTTYPE_A::SYNC) - } - #[doc = "Direct input, no synchronization"] - #[inline(always)] - pub fn direct(self) -> &'a mut W { - self.variant(FLTTYPE_A::DIRECT) - } - #[doc = "Require 2 samples to have the same value"] - #[inline(always)] - pub fn filter1(self) -> &'a mut W { - self.variant(FLTTYPE_A::FILTER1) - } - #[doc = "Require 3 samples to have the same value"] - #[inline(always)] - pub fn filter2(self) -> &'a mut W { - self.variant(FLTTYPE_A::FILTER2) - } - #[doc = "Require 4 samples to have the same value"] - #[inline(always)] - pub fn filter3(self) -> &'a mut W { - self.variant(FLTTYPE_A::FILTER3) - } - #[doc = "Require 5 samples to have the same value"] - #[inline(always)] - pub fn filter4(self) -> &'a mut W { - self.variant(FLTTYPE_A::FILTER4) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0x07) | (value as u32 & 0x07); - self.w - } -} -#[doc = "Field `FLTCLK` reader - Input Filter Clock Selection"] -pub struct FLTCLK_R(crate::FieldReader); -impl FLTCLK_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - FLTCLK_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for FLTCLK_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `FLTCLK` writer - Input Filter Clock Selection"] -pub struct FLTCLK_W<'a> { - w: &'a mut W, -} -impl<'a> FLTCLK_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x07 << 3)) | ((value as u32 & 0x07) << 3); - self.w - } -} -#[doc = "Field `INVINP` reader - Input Invert Selection"] -pub struct INVINP_R(crate::FieldReader); -impl INVINP_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - INVINP_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for INVINP_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `INVINP` writer - Input Invert Selection"] -pub struct INVINP_W<'a> { - w: &'a mut W, -} -impl<'a> INVINP_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); - self.w - } -} -#[doc = "Field `IEWO` reader - Input Enable While Output enabled"] -pub struct IEWO_R(crate::FieldReader); -impl IEWO_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - IEWO_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for IEWO_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `IEWO` writer - Input Enable While Output enabled"] -pub struct IEWO_W<'a> { - w: &'a mut W, -} -impl<'a> IEWO_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); - self.w - } -} -#[doc = "Field `OPENDRN` reader - Output Open Drain Mode"] -pub struct OPENDRN_R(crate::FieldReader); -impl OPENDRN_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - OPENDRN_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for OPENDRN_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `OPENDRN` writer - Output Open Drain Mode"] -pub struct OPENDRN_W<'a> { - w: &'a mut W, -} -impl<'a> OPENDRN_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); - self.w - } -} -#[doc = "Field `INVOUT` reader - Output Invert Selection"] -pub struct INVOUT_R(crate::FieldReader); -impl INVOUT_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - INVOUT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for INVOUT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `INVOUT` writer - Output Invert Selection"] -pub struct INVOUT_W<'a> { - w: &'a mut W, -} -impl<'a> INVOUT_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); - self.w - } -} -#[doc = "Field `PLEVEL` reader - Internal Pull up/down level"] -pub struct PLEVEL_R(crate::FieldReader); -impl PLEVEL_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - PLEVEL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PLEVEL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `PLEVEL` writer - Internal Pull up/down level"] -pub struct PLEVEL_W<'a> { - w: &'a mut W, -} -impl<'a> PLEVEL_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); - self.w - } -} -#[doc = "Field `PEN` reader - Enable Internal Pull up/down"] -pub struct PEN_R(crate::FieldReader); -impl PEN_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - PEN_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PEN_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `PEN` writer - Enable Internal Pull up/down"] -pub struct PEN_W<'a> { - w: &'a mut W, -} -impl<'a> PEN_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); - self.w - } -} -#[doc = "Field `PWOA` reader - Enable Pull when output active"] -pub struct PWOA_R(crate::FieldReader); -impl PWOA_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - PWOA_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PWOA_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `PWOA` writer - Enable Pull when output active"] -pub struct PWOA_W<'a> { - w: &'a mut W, -} -impl<'a> PWOA_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); - self.w - } -} -#[doc = "Field `FUNSEL` reader - Pin Function Selection"] -pub struct FUNSEL_R(crate::FieldReader); -impl FUNSEL_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - FUNSEL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for FUNSEL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `FUNSEL` writer - Pin Function Selection"] -pub struct FUNSEL_W<'a> { - w: &'a mut W, -} -impl<'a> FUNSEL_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x07 << 13)) | ((value as u32 & 0x07) << 13); - self.w - } -} -#[doc = "Field `IODIS` reader - IO Pin Disable"] -pub struct IODIS_R(crate::FieldReader); -impl IODIS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - IODIS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for IODIS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `IODIS` writer - IO Pin Disable"] -pub struct IODIS_W<'a> { - w: &'a mut W, -} -impl<'a> IODIS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16); - self.w - } -} -impl R { - #[doc = "Bits 0:2 - Input Filter Selectoin"] - #[inline(always)] - pub fn flttype(&self) -> FLTTYPE_R { - FLTTYPE_R::new((self.bits & 0x07) as u8) - } - #[doc = "Bits 3:5 - Input Filter Clock Selection"] - #[inline(always)] - pub fn fltclk(&self) -> FLTCLK_R { - FLTCLK_R::new(((self.bits >> 3) & 0x07) as u8) - } - #[doc = "Bit 6 - Input Invert Selection"] - #[inline(always)] - pub fn invinp(&self) -> INVINP_R { - INVINP_R::new(((self.bits >> 6) & 0x01) != 0) - } - #[doc = "Bit 7 - Input Enable While Output enabled"] - #[inline(always)] - pub fn iewo(&self) -> IEWO_R { - IEWO_R::new(((self.bits >> 7) & 0x01) != 0) - } - #[doc = "Bit 8 - Output Open Drain Mode"] - #[inline(always)] - pub fn opendrn(&self) -> OPENDRN_R { - OPENDRN_R::new(((self.bits >> 8) & 0x01) != 0) - } - #[doc = "Bit 9 - Output Invert Selection"] - #[inline(always)] - pub fn invout(&self) -> INVOUT_R { - INVOUT_R::new(((self.bits >> 9) & 0x01) != 0) - } - #[doc = "Bit 10 - Internal Pull up/down level"] - #[inline(always)] - pub fn plevel(&self) -> PLEVEL_R { - PLEVEL_R::new(((self.bits >> 10) & 0x01) != 0) - } - #[doc = "Bit 11 - Enable Internal Pull up/down"] - #[inline(always)] - pub fn pen(&self) -> PEN_R { - PEN_R::new(((self.bits >> 11) & 0x01) != 0) - } - #[doc = "Bit 12 - Enable Pull when output active"] - #[inline(always)] - pub fn pwoa(&self) -> PWOA_R { - PWOA_R::new(((self.bits >> 12) & 0x01) != 0) - } - #[doc = "Bits 13:15 - Pin Function Selection"] - #[inline(always)] - pub fn funsel(&self) -> FUNSEL_R { - FUNSEL_R::new(((self.bits >> 13) & 0x07) as u8) - } - #[doc = "Bit 16 - IO Pin Disable"] - #[inline(always)] - pub fn iodis(&self) -> IODIS_R { - IODIS_R::new(((self.bits >> 16) & 0x01) != 0) - } -} -impl W { - #[doc = "Bits 0:2 - Input Filter Selectoin"] - #[inline(always)] - pub fn flttype(&mut self) -> FLTTYPE_W { - FLTTYPE_W { w: self } - } - #[doc = "Bits 3:5 - Input Filter Clock Selection"] - #[inline(always)] - pub fn fltclk(&mut self) -> FLTCLK_W { - FLTCLK_W { w: self } - } - #[doc = "Bit 6 - Input Invert Selection"] - #[inline(always)] - pub fn invinp(&mut self) -> INVINP_W { - INVINP_W { w: self } - } - #[doc = "Bit 7 - Input Enable While Output enabled"] - #[inline(always)] - pub fn iewo(&mut self) -> IEWO_W { - IEWO_W { w: self } - } - #[doc = "Bit 8 - Output Open Drain Mode"] - #[inline(always)] - pub fn opendrn(&mut self) -> OPENDRN_W { - OPENDRN_W { w: self } - } - #[doc = "Bit 9 - Output Invert Selection"] - #[inline(always)] - pub fn invout(&mut self) -> INVOUT_W { - INVOUT_W { w: self } - } - #[doc = "Bit 10 - Internal Pull up/down level"] - #[inline(always)] - pub fn plevel(&mut self) -> PLEVEL_W { - PLEVEL_W { w: self } - } - #[doc = "Bit 11 - Enable Internal Pull up/down"] - #[inline(always)] - pub fn pen(&mut self) -> PEN_W { - PEN_W { w: self } - } - #[doc = "Bit 12 - Enable Pull when output active"] - #[inline(always)] - pub fn pwoa(&mut self) -> PWOA_W { - PWOA_W { w: self } - } - #[doc = "Bits 13:15 - Pin Function Selection"] - #[inline(always)] - pub fn funsel(&mut self) -> FUNSEL_W { - FUNSEL_W { w: self } - } - #[doc = "Bit 16 - IO Pin Disable"] - #[inline(always)] - pub fn iodis(&mut self) -> IODIS_W { - IODIS_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "PORTB Pin Configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [portb](index.html) module"] -pub struct PORTB_SPEC; -impl crate::RegisterSpec for PORTB_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [portb::R](R) reader structure"] -impl crate::Readable for PORTB_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [portb::W](W) writer structure"] -impl crate::Writable for PORTB_SPEC { - type Writer = W; -} -#[doc = "`reset()` method sets PORTB[%s] -to value 0"] -impl crate::Resettable for PORTB_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } -} diff --git a/va416xx/src/ioconfig/portc.rs b/va416xx/src/ioconfig/portc.rs deleted file mode 100644 index 752f437..0000000 --- a/va416xx/src/ioconfig/portc.rs +++ /dev/null @@ -1,655 +0,0 @@ -#[doc = "Register `PORTC[%s]` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Register `PORTC[%s]` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Input Filter Selectoin\n\nValue on reset: 0"] -#[derive(Clone, Copy, Debug, PartialEq)] -#[repr(u8)] -pub enum FLTTYPE_A { - #[doc = "0: Synchronize to system clock"] - SYNC = 0, - #[doc = "1: Direct input, no synchronization"] - DIRECT = 1, - #[doc = "2: Require 2 samples to have the same value"] - FILTER1 = 2, - #[doc = "3: Require 3 samples to have the same value"] - FILTER2 = 3, - #[doc = "4: Require 4 samples to have the same value"] - FILTER3 = 4, - #[doc = "5: Require 5 samples to have the same value"] - FILTER4 = 5, -} -impl From for u8 { - #[inline(always)] - fn from(variant: FLTTYPE_A) -> Self { - variant as _ - } -} -#[doc = "Field `FLTTYPE` reader - Input Filter Selectoin"] -pub struct FLTTYPE_R(crate::FieldReader); -impl FLTTYPE_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - FLTTYPE_R(crate::FieldReader::new(bits)) - } - #[doc = r"Get enumerated values variant"] - #[inline(always)] - pub fn variant(&self) -> Option { - match self.bits { - 0 => Some(FLTTYPE_A::SYNC), - 1 => Some(FLTTYPE_A::DIRECT), - 2 => Some(FLTTYPE_A::FILTER1), - 3 => Some(FLTTYPE_A::FILTER2), - 4 => Some(FLTTYPE_A::FILTER3), - 5 => Some(FLTTYPE_A::FILTER4), - _ => None, - } - } - #[doc = "Checks if the value of the field is `SYNC`"] - #[inline(always)] - pub fn is_sync(&self) -> bool { - **self == FLTTYPE_A::SYNC - } - #[doc = "Checks if the value of the field is `DIRECT`"] - #[inline(always)] - pub fn is_direct(&self) -> bool { - **self == FLTTYPE_A::DIRECT - } - #[doc = "Checks if the value of the field is `FILTER1`"] - #[inline(always)] - pub fn is_filter1(&self) -> bool { - **self == FLTTYPE_A::FILTER1 - } - #[doc = "Checks if the value of the field is `FILTER2`"] - #[inline(always)] - pub fn is_filter2(&self) -> bool { - **self == FLTTYPE_A::FILTER2 - } - #[doc = "Checks if the value of the field is `FILTER3`"] - #[inline(always)] - pub fn is_filter3(&self) -> bool { - **self == FLTTYPE_A::FILTER3 - } - #[doc = "Checks if the value of the field is `FILTER4`"] - #[inline(always)] - pub fn is_filter4(&self) -> bool { - **self == FLTTYPE_A::FILTER4 - } -} -impl core::ops::Deref for FLTTYPE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `FLTTYPE` writer - Input Filter Selectoin"] -pub struct FLTTYPE_W<'a> { - w: &'a mut W, -} -impl<'a> FLTTYPE_W<'a> { - #[doc = r"Writes `variant` to the field"] - #[inline(always)] - pub fn variant(self, variant: FLTTYPE_A) -> &'a mut W { - unsafe { self.bits(variant.into()) } - } - #[doc = "Synchronize to system clock"] - #[inline(always)] - pub fn sync(self) -> &'a mut W { - self.variant(FLTTYPE_A::SYNC) - } - #[doc = "Direct input, no synchronization"] - #[inline(always)] - pub fn direct(self) -> &'a mut W { - self.variant(FLTTYPE_A::DIRECT) - } - #[doc = "Require 2 samples to have the same value"] - #[inline(always)] - pub fn filter1(self) -> &'a mut W { - self.variant(FLTTYPE_A::FILTER1) - } - #[doc = "Require 3 samples to have the same value"] - #[inline(always)] - pub fn filter2(self) -> &'a mut W { - self.variant(FLTTYPE_A::FILTER2) - } - #[doc = "Require 4 samples to have the same value"] - #[inline(always)] - pub fn filter3(self) -> &'a mut W { - self.variant(FLTTYPE_A::FILTER3) - } - #[doc = "Require 5 samples to have the same value"] - #[inline(always)] - pub fn filter4(self) -> &'a mut W { - self.variant(FLTTYPE_A::FILTER4) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0x07) | (value as u32 & 0x07); - self.w - } -} -#[doc = "Field `FLTCLK` reader - Input Filter Clock Selection"] -pub struct FLTCLK_R(crate::FieldReader); -impl FLTCLK_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - FLTCLK_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for FLTCLK_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `FLTCLK` writer - Input Filter Clock Selection"] -pub struct FLTCLK_W<'a> { - w: &'a mut W, -} -impl<'a> FLTCLK_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x07 << 3)) | ((value as u32 & 0x07) << 3); - self.w - } -} -#[doc = "Field `INVINP` reader - Input Invert Selection"] -pub struct INVINP_R(crate::FieldReader); -impl INVINP_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - INVINP_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for INVINP_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `INVINP` writer - Input Invert Selection"] -pub struct INVINP_W<'a> { - w: &'a mut W, -} -impl<'a> INVINP_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); - self.w - } -} -#[doc = "Field `IEWO` reader - Input Enable While Output enabled"] -pub struct IEWO_R(crate::FieldReader); -impl IEWO_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - IEWO_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for IEWO_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `IEWO` writer - Input Enable While Output enabled"] -pub struct IEWO_W<'a> { - w: &'a mut W, -} -impl<'a> IEWO_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); - self.w - } -} -#[doc = "Field `OPENDRN` reader - Output Open Drain Mode"] -pub struct OPENDRN_R(crate::FieldReader); -impl OPENDRN_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - OPENDRN_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for OPENDRN_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `OPENDRN` writer - Output Open Drain Mode"] -pub struct OPENDRN_W<'a> { - w: &'a mut W, -} -impl<'a> OPENDRN_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); - self.w - } -} -#[doc = "Field `INVOUT` reader - Output Invert Selection"] -pub struct INVOUT_R(crate::FieldReader); -impl INVOUT_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - INVOUT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for INVOUT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `INVOUT` writer - Output Invert Selection"] -pub struct INVOUT_W<'a> { - w: &'a mut W, -} -impl<'a> INVOUT_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); - self.w - } -} -#[doc = "Field `PLEVEL` reader - Internal Pull up/down level"] -pub struct PLEVEL_R(crate::FieldReader); -impl PLEVEL_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - PLEVEL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PLEVEL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `PLEVEL` writer - Internal Pull up/down level"] -pub struct PLEVEL_W<'a> { - w: &'a mut W, -} -impl<'a> PLEVEL_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); - self.w - } -} -#[doc = "Field `PEN` reader - Enable Internal Pull up/down"] -pub struct PEN_R(crate::FieldReader); -impl PEN_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - PEN_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PEN_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `PEN` writer - Enable Internal Pull up/down"] -pub struct PEN_W<'a> { - w: &'a mut W, -} -impl<'a> PEN_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); - self.w - } -} -#[doc = "Field `PWOA` reader - Enable Pull when output active"] -pub struct PWOA_R(crate::FieldReader); -impl PWOA_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - PWOA_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PWOA_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `PWOA` writer - Enable Pull when output active"] -pub struct PWOA_W<'a> { - w: &'a mut W, -} -impl<'a> PWOA_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); - self.w - } -} -#[doc = "Field `FUNSEL` reader - Pin Function Selection"] -pub struct FUNSEL_R(crate::FieldReader); -impl FUNSEL_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - FUNSEL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for FUNSEL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `FUNSEL` writer - Pin Function Selection"] -pub struct FUNSEL_W<'a> { - w: &'a mut W, -} -impl<'a> FUNSEL_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x07 << 13)) | ((value as u32 & 0x07) << 13); - self.w - } -} -#[doc = "Field `IODIS` reader - IO Pin Disable"] -pub struct IODIS_R(crate::FieldReader); -impl IODIS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - IODIS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for IODIS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `IODIS` writer - IO Pin Disable"] -pub struct IODIS_W<'a> { - w: &'a mut W, -} -impl<'a> IODIS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16); - self.w - } -} -impl R { - #[doc = "Bits 0:2 - Input Filter Selectoin"] - #[inline(always)] - pub fn flttype(&self) -> FLTTYPE_R { - FLTTYPE_R::new((self.bits & 0x07) as u8) - } - #[doc = "Bits 3:5 - Input Filter Clock Selection"] - #[inline(always)] - pub fn fltclk(&self) -> FLTCLK_R { - FLTCLK_R::new(((self.bits >> 3) & 0x07) as u8) - } - #[doc = "Bit 6 - Input Invert Selection"] - #[inline(always)] - pub fn invinp(&self) -> INVINP_R { - INVINP_R::new(((self.bits >> 6) & 0x01) != 0) - } - #[doc = "Bit 7 - Input Enable While Output enabled"] - #[inline(always)] - pub fn iewo(&self) -> IEWO_R { - IEWO_R::new(((self.bits >> 7) & 0x01) != 0) - } - #[doc = "Bit 8 - Output Open Drain Mode"] - #[inline(always)] - pub fn opendrn(&self) -> OPENDRN_R { - OPENDRN_R::new(((self.bits >> 8) & 0x01) != 0) - } - #[doc = "Bit 9 - Output Invert Selection"] - #[inline(always)] - pub fn invout(&self) -> INVOUT_R { - INVOUT_R::new(((self.bits >> 9) & 0x01) != 0) - } - #[doc = "Bit 10 - Internal Pull up/down level"] - #[inline(always)] - pub fn plevel(&self) -> PLEVEL_R { - PLEVEL_R::new(((self.bits >> 10) & 0x01) != 0) - } - #[doc = "Bit 11 - Enable Internal Pull up/down"] - #[inline(always)] - pub fn pen(&self) -> PEN_R { - PEN_R::new(((self.bits >> 11) & 0x01) != 0) - } - #[doc = "Bit 12 - Enable Pull when output active"] - #[inline(always)] - pub fn pwoa(&self) -> PWOA_R { - PWOA_R::new(((self.bits >> 12) & 0x01) != 0) - } - #[doc = "Bits 13:15 - Pin Function Selection"] - #[inline(always)] - pub fn funsel(&self) -> FUNSEL_R { - FUNSEL_R::new(((self.bits >> 13) & 0x07) as u8) - } - #[doc = "Bit 16 - IO Pin Disable"] - #[inline(always)] - pub fn iodis(&self) -> IODIS_R { - IODIS_R::new(((self.bits >> 16) & 0x01) != 0) - } -} -impl W { - #[doc = "Bits 0:2 - Input Filter Selectoin"] - #[inline(always)] - pub fn flttype(&mut self) -> FLTTYPE_W { - FLTTYPE_W { w: self } - } - #[doc = "Bits 3:5 - Input Filter Clock Selection"] - #[inline(always)] - pub fn fltclk(&mut self) -> FLTCLK_W { - FLTCLK_W { w: self } - } - #[doc = "Bit 6 - Input Invert Selection"] - #[inline(always)] - pub fn invinp(&mut self) -> INVINP_W { - INVINP_W { w: self } - } - #[doc = "Bit 7 - Input Enable While Output enabled"] - #[inline(always)] - pub fn iewo(&mut self) -> IEWO_W { - IEWO_W { w: self } - } - #[doc = "Bit 8 - Output Open Drain Mode"] - #[inline(always)] - pub fn opendrn(&mut self) -> OPENDRN_W { - OPENDRN_W { w: self } - } - #[doc = "Bit 9 - Output Invert Selection"] - #[inline(always)] - pub fn invout(&mut self) -> INVOUT_W { - INVOUT_W { w: self } - } - #[doc = "Bit 10 - Internal Pull up/down level"] - #[inline(always)] - pub fn plevel(&mut self) -> PLEVEL_W { - PLEVEL_W { w: self } - } - #[doc = "Bit 11 - Enable Internal Pull up/down"] - #[inline(always)] - pub fn pen(&mut self) -> PEN_W { - PEN_W { w: self } - } - #[doc = "Bit 12 - Enable Pull when output active"] - #[inline(always)] - pub fn pwoa(&mut self) -> PWOA_W { - PWOA_W { w: self } - } - #[doc = "Bits 13:15 - Pin Function Selection"] - #[inline(always)] - pub fn funsel(&mut self) -> FUNSEL_W { - FUNSEL_W { w: self } - } - #[doc = "Bit 16 - IO Pin Disable"] - #[inline(always)] - pub fn iodis(&mut self) -> IODIS_W { - IODIS_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "PORTC Pin Configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [portc](index.html) module"] -pub struct PORTC_SPEC; -impl crate::RegisterSpec for PORTC_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [portc::R](R) reader structure"] -impl crate::Readable for PORTC_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [portc::W](W) writer structure"] -impl crate::Writable for PORTC_SPEC { - type Writer = W; -} -#[doc = "`reset()` method sets PORTC[%s] -to value 0"] -impl crate::Resettable for PORTC_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } -} diff --git a/va416xx/src/ioconfig/portd.rs b/va416xx/src/ioconfig/portd.rs deleted file mode 100644 index 96e825b..0000000 --- a/va416xx/src/ioconfig/portd.rs +++ /dev/null @@ -1,655 +0,0 @@ -#[doc = "Register `PORTD[%s]` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Register `PORTD[%s]` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Input Filter Selectoin\n\nValue on reset: 0"] -#[derive(Clone, Copy, Debug, PartialEq)] -#[repr(u8)] -pub enum FLTTYPE_A { - #[doc = "0: Synchronize to system clock"] - SYNC = 0, - #[doc = "1: Direct input, no synchronization"] - DIRECT = 1, - #[doc = "2: Require 2 samples to have the same value"] - FILTER1 = 2, - #[doc = "3: Require 3 samples to have the same value"] - FILTER2 = 3, - #[doc = "4: Require 4 samples to have the same value"] - FILTER3 = 4, - #[doc = "5: Require 5 samples to have the same value"] - FILTER4 = 5, -} -impl From for u8 { - #[inline(always)] - fn from(variant: FLTTYPE_A) -> Self { - variant as _ - } -} -#[doc = "Field `FLTTYPE` reader - Input Filter Selectoin"] -pub struct FLTTYPE_R(crate::FieldReader); -impl FLTTYPE_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - FLTTYPE_R(crate::FieldReader::new(bits)) - } - #[doc = r"Get enumerated values variant"] - #[inline(always)] - pub fn variant(&self) -> Option { - match self.bits { - 0 => Some(FLTTYPE_A::SYNC), - 1 => Some(FLTTYPE_A::DIRECT), - 2 => Some(FLTTYPE_A::FILTER1), - 3 => Some(FLTTYPE_A::FILTER2), - 4 => Some(FLTTYPE_A::FILTER3), - 5 => Some(FLTTYPE_A::FILTER4), - _ => None, - } - } - #[doc = "Checks if the value of the field is `SYNC`"] - #[inline(always)] - pub fn is_sync(&self) -> bool { - **self == FLTTYPE_A::SYNC - } - #[doc = "Checks if the value of the field is `DIRECT`"] - #[inline(always)] - pub fn is_direct(&self) -> bool { - **self == FLTTYPE_A::DIRECT - } - #[doc = "Checks if the value of the field is `FILTER1`"] - #[inline(always)] - pub fn is_filter1(&self) -> bool { - **self == FLTTYPE_A::FILTER1 - } - #[doc = "Checks if the value of the field is `FILTER2`"] - #[inline(always)] - pub fn is_filter2(&self) -> bool { - **self == FLTTYPE_A::FILTER2 - } - #[doc = "Checks if the value of the field is `FILTER3`"] - #[inline(always)] - pub fn is_filter3(&self) -> bool { - **self == FLTTYPE_A::FILTER3 - } - #[doc = "Checks if the value of the field is `FILTER4`"] - #[inline(always)] - pub fn is_filter4(&self) -> bool { - **self == FLTTYPE_A::FILTER4 - } -} -impl core::ops::Deref for FLTTYPE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `FLTTYPE` writer - Input Filter Selectoin"] -pub struct FLTTYPE_W<'a> { - w: &'a mut W, -} -impl<'a> FLTTYPE_W<'a> { - #[doc = r"Writes `variant` to the field"] - #[inline(always)] - pub fn variant(self, variant: FLTTYPE_A) -> &'a mut W { - unsafe { self.bits(variant.into()) } - } - #[doc = "Synchronize to system clock"] - #[inline(always)] - pub fn sync(self) -> &'a mut W { - self.variant(FLTTYPE_A::SYNC) - } - #[doc = "Direct input, no synchronization"] - #[inline(always)] - pub fn direct(self) -> &'a mut W { - self.variant(FLTTYPE_A::DIRECT) - } - #[doc = "Require 2 samples to have the same value"] - #[inline(always)] - pub fn filter1(self) -> &'a mut W { - self.variant(FLTTYPE_A::FILTER1) - } - #[doc = "Require 3 samples to have the same value"] - #[inline(always)] - pub fn filter2(self) -> &'a mut W { - self.variant(FLTTYPE_A::FILTER2) - } - #[doc = "Require 4 samples to have the same value"] - #[inline(always)] - pub fn filter3(self) -> &'a mut W { - self.variant(FLTTYPE_A::FILTER3) - } - #[doc = "Require 5 samples to have the same value"] - #[inline(always)] - pub fn filter4(self) -> &'a mut W { - self.variant(FLTTYPE_A::FILTER4) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0x07) | (value as u32 & 0x07); - self.w - } -} -#[doc = "Field `FLTCLK` reader - Input Filter Clock Selection"] -pub struct FLTCLK_R(crate::FieldReader); -impl FLTCLK_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - FLTCLK_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for FLTCLK_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `FLTCLK` writer - Input Filter Clock Selection"] -pub struct FLTCLK_W<'a> { - w: &'a mut W, -} -impl<'a> FLTCLK_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x07 << 3)) | ((value as u32 & 0x07) << 3); - self.w - } -} -#[doc = "Field `INVINP` reader - Input Invert Selection"] -pub struct INVINP_R(crate::FieldReader); -impl INVINP_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - INVINP_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for INVINP_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `INVINP` writer - Input Invert Selection"] -pub struct INVINP_W<'a> { - w: &'a mut W, -} -impl<'a> INVINP_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); - self.w - } -} -#[doc = "Field `IEWO` reader - Input Enable While Output enabled"] -pub struct IEWO_R(crate::FieldReader); -impl IEWO_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - IEWO_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for IEWO_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `IEWO` writer - Input Enable While Output enabled"] -pub struct IEWO_W<'a> { - w: &'a mut W, -} -impl<'a> IEWO_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); - self.w - } -} -#[doc = "Field `OPENDRN` reader - Output Open Drain Mode"] -pub struct OPENDRN_R(crate::FieldReader); -impl OPENDRN_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - OPENDRN_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for OPENDRN_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `OPENDRN` writer - Output Open Drain Mode"] -pub struct OPENDRN_W<'a> { - w: &'a mut W, -} -impl<'a> OPENDRN_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); - self.w - } -} -#[doc = "Field `INVOUT` reader - Output Invert Selection"] -pub struct INVOUT_R(crate::FieldReader); -impl INVOUT_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - INVOUT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for INVOUT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `INVOUT` writer - Output Invert Selection"] -pub struct INVOUT_W<'a> { - w: &'a mut W, -} -impl<'a> INVOUT_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); - self.w - } -} -#[doc = "Field `PLEVEL` reader - Internal Pull up/down level"] -pub struct PLEVEL_R(crate::FieldReader); -impl PLEVEL_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - PLEVEL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PLEVEL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `PLEVEL` writer - Internal Pull up/down level"] -pub struct PLEVEL_W<'a> { - w: &'a mut W, -} -impl<'a> PLEVEL_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); - self.w - } -} -#[doc = "Field `PEN` reader - Enable Internal Pull up/down"] -pub struct PEN_R(crate::FieldReader); -impl PEN_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - PEN_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PEN_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `PEN` writer - Enable Internal Pull up/down"] -pub struct PEN_W<'a> { - w: &'a mut W, -} -impl<'a> PEN_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); - self.w - } -} -#[doc = "Field `PWOA` reader - Enable Pull when output active"] -pub struct PWOA_R(crate::FieldReader); -impl PWOA_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - PWOA_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PWOA_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `PWOA` writer - Enable Pull when output active"] -pub struct PWOA_W<'a> { - w: &'a mut W, -} -impl<'a> PWOA_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); - self.w - } -} -#[doc = "Field `FUNSEL` reader - Pin Function Selection"] -pub struct FUNSEL_R(crate::FieldReader); -impl FUNSEL_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - FUNSEL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for FUNSEL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `FUNSEL` writer - Pin Function Selection"] -pub struct FUNSEL_W<'a> { - w: &'a mut W, -} -impl<'a> FUNSEL_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x07 << 13)) | ((value as u32 & 0x07) << 13); - self.w - } -} -#[doc = "Field `IODIS` reader - IO Pin Disable"] -pub struct IODIS_R(crate::FieldReader); -impl IODIS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - IODIS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for IODIS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `IODIS` writer - IO Pin Disable"] -pub struct IODIS_W<'a> { - w: &'a mut W, -} -impl<'a> IODIS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16); - self.w - } -} -impl R { - #[doc = "Bits 0:2 - Input Filter Selectoin"] - #[inline(always)] - pub fn flttype(&self) -> FLTTYPE_R { - FLTTYPE_R::new((self.bits & 0x07) as u8) - } - #[doc = "Bits 3:5 - Input Filter Clock Selection"] - #[inline(always)] - pub fn fltclk(&self) -> FLTCLK_R { - FLTCLK_R::new(((self.bits >> 3) & 0x07) as u8) - } - #[doc = "Bit 6 - Input Invert Selection"] - #[inline(always)] - pub fn invinp(&self) -> INVINP_R { - INVINP_R::new(((self.bits >> 6) & 0x01) != 0) - } - #[doc = "Bit 7 - Input Enable While Output enabled"] - #[inline(always)] - pub fn iewo(&self) -> IEWO_R { - IEWO_R::new(((self.bits >> 7) & 0x01) != 0) - } - #[doc = "Bit 8 - Output Open Drain Mode"] - #[inline(always)] - pub fn opendrn(&self) -> OPENDRN_R { - OPENDRN_R::new(((self.bits >> 8) & 0x01) != 0) - } - #[doc = "Bit 9 - Output Invert Selection"] - #[inline(always)] - pub fn invout(&self) -> INVOUT_R { - INVOUT_R::new(((self.bits >> 9) & 0x01) != 0) - } - #[doc = "Bit 10 - Internal Pull up/down level"] - #[inline(always)] - pub fn plevel(&self) -> PLEVEL_R { - PLEVEL_R::new(((self.bits >> 10) & 0x01) != 0) - } - #[doc = "Bit 11 - Enable Internal Pull up/down"] - #[inline(always)] - pub fn pen(&self) -> PEN_R { - PEN_R::new(((self.bits >> 11) & 0x01) != 0) - } - #[doc = "Bit 12 - Enable Pull when output active"] - #[inline(always)] - pub fn pwoa(&self) -> PWOA_R { - PWOA_R::new(((self.bits >> 12) & 0x01) != 0) - } - #[doc = "Bits 13:15 - Pin Function Selection"] - #[inline(always)] - pub fn funsel(&self) -> FUNSEL_R { - FUNSEL_R::new(((self.bits >> 13) & 0x07) as u8) - } - #[doc = "Bit 16 - IO Pin Disable"] - #[inline(always)] - pub fn iodis(&self) -> IODIS_R { - IODIS_R::new(((self.bits >> 16) & 0x01) != 0) - } -} -impl W { - #[doc = "Bits 0:2 - Input Filter Selectoin"] - #[inline(always)] - pub fn flttype(&mut self) -> FLTTYPE_W { - FLTTYPE_W { w: self } - } - #[doc = "Bits 3:5 - Input Filter Clock Selection"] - #[inline(always)] - pub fn fltclk(&mut self) -> FLTCLK_W { - FLTCLK_W { w: self } - } - #[doc = "Bit 6 - Input Invert Selection"] - #[inline(always)] - pub fn invinp(&mut self) -> INVINP_W { - INVINP_W { w: self } - } - #[doc = "Bit 7 - Input Enable While Output enabled"] - #[inline(always)] - pub fn iewo(&mut self) -> IEWO_W { - IEWO_W { w: self } - } - #[doc = "Bit 8 - Output Open Drain Mode"] - #[inline(always)] - pub fn opendrn(&mut self) -> OPENDRN_W { - OPENDRN_W { w: self } - } - #[doc = "Bit 9 - Output Invert Selection"] - #[inline(always)] - pub fn invout(&mut self) -> INVOUT_W { - INVOUT_W { w: self } - } - #[doc = "Bit 10 - Internal Pull up/down level"] - #[inline(always)] - pub fn plevel(&mut self) -> PLEVEL_W { - PLEVEL_W { w: self } - } - #[doc = "Bit 11 - Enable Internal Pull up/down"] - #[inline(always)] - pub fn pen(&mut self) -> PEN_W { - PEN_W { w: self } - } - #[doc = "Bit 12 - Enable Pull when output active"] - #[inline(always)] - pub fn pwoa(&mut self) -> PWOA_W { - PWOA_W { w: self } - } - #[doc = "Bits 13:15 - Pin Function Selection"] - #[inline(always)] - pub fn funsel(&mut self) -> FUNSEL_W { - FUNSEL_W { w: self } - } - #[doc = "Bit 16 - IO Pin Disable"] - #[inline(always)] - pub fn iodis(&mut self) -> IODIS_W { - IODIS_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "PORTD Pin Configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [portd](index.html) module"] -pub struct PORTD_SPEC; -impl crate::RegisterSpec for PORTD_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [portd::R](R) reader structure"] -impl crate::Readable for PORTD_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [portd::W](W) writer structure"] -impl crate::Writable for PORTD_SPEC { - type Writer = W; -} -#[doc = "`reset()` method sets PORTD[%s] -to value 0"] -impl crate::Resettable for PORTD_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } -} diff --git a/va416xx/src/ioconfig/porte.rs b/va416xx/src/ioconfig/porte.rs deleted file mode 100644 index ef90faa..0000000 --- a/va416xx/src/ioconfig/porte.rs +++ /dev/null @@ -1,655 +0,0 @@ -#[doc = "Register `PORTE[%s]` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Register `PORTE[%s]` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Input Filter Selectoin\n\nValue on reset: 0"] -#[derive(Clone, Copy, Debug, PartialEq)] -#[repr(u8)] -pub enum FLTTYPE_A { - #[doc = "0: Synchronize to system clock"] - SYNC = 0, - #[doc = "1: Direct input, no synchronization"] - DIRECT = 1, - #[doc = "2: Require 2 samples to have the same value"] - FILTER1 = 2, - #[doc = "3: Require 3 samples to have the same value"] - FILTER2 = 3, - #[doc = "4: Require 4 samples to have the same value"] - FILTER3 = 4, - #[doc = "5: Require 5 samples to have the same value"] - FILTER4 = 5, -} -impl From for u8 { - #[inline(always)] - fn from(variant: FLTTYPE_A) -> Self { - variant as _ - } -} -#[doc = "Field `FLTTYPE` reader - Input Filter Selectoin"] -pub struct FLTTYPE_R(crate::FieldReader); -impl FLTTYPE_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - FLTTYPE_R(crate::FieldReader::new(bits)) - } - #[doc = r"Get enumerated values variant"] - #[inline(always)] - pub fn variant(&self) -> Option { - match self.bits { - 0 => Some(FLTTYPE_A::SYNC), - 1 => Some(FLTTYPE_A::DIRECT), - 2 => Some(FLTTYPE_A::FILTER1), - 3 => Some(FLTTYPE_A::FILTER2), - 4 => Some(FLTTYPE_A::FILTER3), - 5 => Some(FLTTYPE_A::FILTER4), - _ => None, - } - } - #[doc = "Checks if the value of the field is `SYNC`"] - #[inline(always)] - pub fn is_sync(&self) -> bool { - **self == FLTTYPE_A::SYNC - } - #[doc = "Checks if the value of the field is `DIRECT`"] - #[inline(always)] - pub fn is_direct(&self) -> bool { - **self == FLTTYPE_A::DIRECT - } - #[doc = "Checks if the value of the field is `FILTER1`"] - #[inline(always)] - pub fn is_filter1(&self) -> bool { - **self == FLTTYPE_A::FILTER1 - } - #[doc = "Checks if the value of the field is `FILTER2`"] - #[inline(always)] - pub fn is_filter2(&self) -> bool { - **self == FLTTYPE_A::FILTER2 - } - #[doc = "Checks if the value of the field is `FILTER3`"] - #[inline(always)] - pub fn is_filter3(&self) -> bool { - **self == FLTTYPE_A::FILTER3 - } - #[doc = "Checks if the value of the field is `FILTER4`"] - #[inline(always)] - pub fn is_filter4(&self) -> bool { - **self == FLTTYPE_A::FILTER4 - } -} -impl core::ops::Deref for FLTTYPE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `FLTTYPE` writer - Input Filter Selectoin"] -pub struct FLTTYPE_W<'a> { - w: &'a mut W, -} -impl<'a> FLTTYPE_W<'a> { - #[doc = r"Writes `variant` to the field"] - #[inline(always)] - pub fn variant(self, variant: FLTTYPE_A) -> &'a mut W { - unsafe { self.bits(variant.into()) } - } - #[doc = "Synchronize to system clock"] - #[inline(always)] - pub fn sync(self) -> &'a mut W { - self.variant(FLTTYPE_A::SYNC) - } - #[doc = "Direct input, no synchronization"] - #[inline(always)] - pub fn direct(self) -> &'a mut W { - self.variant(FLTTYPE_A::DIRECT) - } - #[doc = "Require 2 samples to have the same value"] - #[inline(always)] - pub fn filter1(self) -> &'a mut W { - self.variant(FLTTYPE_A::FILTER1) - } - #[doc = "Require 3 samples to have the same value"] - #[inline(always)] - pub fn filter2(self) -> &'a mut W { - self.variant(FLTTYPE_A::FILTER2) - } - #[doc = "Require 4 samples to have the same value"] - #[inline(always)] - pub fn filter3(self) -> &'a mut W { - self.variant(FLTTYPE_A::FILTER3) - } - #[doc = "Require 5 samples to have the same value"] - #[inline(always)] - pub fn filter4(self) -> &'a mut W { - self.variant(FLTTYPE_A::FILTER4) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0x07) | (value as u32 & 0x07); - self.w - } -} -#[doc = "Field `FLTCLK` reader - Input Filter Clock Selection"] -pub struct FLTCLK_R(crate::FieldReader); -impl FLTCLK_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - FLTCLK_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for FLTCLK_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `FLTCLK` writer - Input Filter Clock Selection"] -pub struct FLTCLK_W<'a> { - w: &'a mut W, -} -impl<'a> FLTCLK_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x07 << 3)) | ((value as u32 & 0x07) << 3); - self.w - } -} -#[doc = "Field `INVINP` reader - Input Invert Selection"] -pub struct INVINP_R(crate::FieldReader); -impl INVINP_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - INVINP_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for INVINP_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `INVINP` writer - Input Invert Selection"] -pub struct INVINP_W<'a> { - w: &'a mut W, -} -impl<'a> INVINP_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); - self.w - } -} -#[doc = "Field `IEWO` reader - Input Enable While Output enabled"] -pub struct IEWO_R(crate::FieldReader); -impl IEWO_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - IEWO_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for IEWO_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `IEWO` writer - Input Enable While Output enabled"] -pub struct IEWO_W<'a> { - w: &'a mut W, -} -impl<'a> IEWO_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); - self.w - } -} -#[doc = "Field `OPENDRN` reader - Output Open Drain Mode"] -pub struct OPENDRN_R(crate::FieldReader); -impl OPENDRN_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - OPENDRN_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for OPENDRN_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `OPENDRN` writer - Output Open Drain Mode"] -pub struct OPENDRN_W<'a> { - w: &'a mut W, -} -impl<'a> OPENDRN_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); - self.w - } -} -#[doc = "Field `INVOUT` reader - Output Invert Selection"] -pub struct INVOUT_R(crate::FieldReader); -impl INVOUT_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - INVOUT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for INVOUT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `INVOUT` writer - Output Invert Selection"] -pub struct INVOUT_W<'a> { - w: &'a mut W, -} -impl<'a> INVOUT_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); - self.w - } -} -#[doc = "Field `PLEVEL` reader - Internal Pull up/down level"] -pub struct PLEVEL_R(crate::FieldReader); -impl PLEVEL_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - PLEVEL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PLEVEL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `PLEVEL` writer - Internal Pull up/down level"] -pub struct PLEVEL_W<'a> { - w: &'a mut W, -} -impl<'a> PLEVEL_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); - self.w - } -} -#[doc = "Field `PEN` reader - Enable Internal Pull up/down"] -pub struct PEN_R(crate::FieldReader); -impl PEN_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - PEN_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PEN_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `PEN` writer - Enable Internal Pull up/down"] -pub struct PEN_W<'a> { - w: &'a mut W, -} -impl<'a> PEN_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); - self.w - } -} -#[doc = "Field `PWOA` reader - Enable Pull when output active"] -pub struct PWOA_R(crate::FieldReader); -impl PWOA_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - PWOA_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PWOA_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `PWOA` writer - Enable Pull when output active"] -pub struct PWOA_W<'a> { - w: &'a mut W, -} -impl<'a> PWOA_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); - self.w - } -} -#[doc = "Field `FUNSEL` reader - Pin Function Selection"] -pub struct FUNSEL_R(crate::FieldReader); -impl FUNSEL_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - FUNSEL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for FUNSEL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `FUNSEL` writer - Pin Function Selection"] -pub struct FUNSEL_W<'a> { - w: &'a mut W, -} -impl<'a> FUNSEL_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x07 << 13)) | ((value as u32 & 0x07) << 13); - self.w - } -} -#[doc = "Field `IODIS` reader - IO Pin Disable"] -pub struct IODIS_R(crate::FieldReader); -impl IODIS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - IODIS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for IODIS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `IODIS` writer - IO Pin Disable"] -pub struct IODIS_W<'a> { - w: &'a mut W, -} -impl<'a> IODIS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16); - self.w - } -} -impl R { - #[doc = "Bits 0:2 - Input Filter Selectoin"] - #[inline(always)] - pub fn flttype(&self) -> FLTTYPE_R { - FLTTYPE_R::new((self.bits & 0x07) as u8) - } - #[doc = "Bits 3:5 - Input Filter Clock Selection"] - #[inline(always)] - pub fn fltclk(&self) -> FLTCLK_R { - FLTCLK_R::new(((self.bits >> 3) & 0x07) as u8) - } - #[doc = "Bit 6 - Input Invert Selection"] - #[inline(always)] - pub fn invinp(&self) -> INVINP_R { - INVINP_R::new(((self.bits >> 6) & 0x01) != 0) - } - #[doc = "Bit 7 - Input Enable While Output enabled"] - #[inline(always)] - pub fn iewo(&self) -> IEWO_R { - IEWO_R::new(((self.bits >> 7) & 0x01) != 0) - } - #[doc = "Bit 8 - Output Open Drain Mode"] - #[inline(always)] - pub fn opendrn(&self) -> OPENDRN_R { - OPENDRN_R::new(((self.bits >> 8) & 0x01) != 0) - } - #[doc = "Bit 9 - Output Invert Selection"] - #[inline(always)] - pub fn invout(&self) -> INVOUT_R { - INVOUT_R::new(((self.bits >> 9) & 0x01) != 0) - } - #[doc = "Bit 10 - Internal Pull up/down level"] - #[inline(always)] - pub fn plevel(&self) -> PLEVEL_R { - PLEVEL_R::new(((self.bits >> 10) & 0x01) != 0) - } - #[doc = "Bit 11 - Enable Internal Pull up/down"] - #[inline(always)] - pub fn pen(&self) -> PEN_R { - PEN_R::new(((self.bits >> 11) & 0x01) != 0) - } - #[doc = "Bit 12 - Enable Pull when output active"] - #[inline(always)] - pub fn pwoa(&self) -> PWOA_R { - PWOA_R::new(((self.bits >> 12) & 0x01) != 0) - } - #[doc = "Bits 13:15 - Pin Function Selection"] - #[inline(always)] - pub fn funsel(&self) -> FUNSEL_R { - FUNSEL_R::new(((self.bits >> 13) & 0x07) as u8) - } - #[doc = "Bit 16 - IO Pin Disable"] - #[inline(always)] - pub fn iodis(&self) -> IODIS_R { - IODIS_R::new(((self.bits >> 16) & 0x01) != 0) - } -} -impl W { - #[doc = "Bits 0:2 - Input Filter Selectoin"] - #[inline(always)] - pub fn flttype(&mut self) -> FLTTYPE_W { - FLTTYPE_W { w: self } - } - #[doc = "Bits 3:5 - Input Filter Clock Selection"] - #[inline(always)] - pub fn fltclk(&mut self) -> FLTCLK_W { - FLTCLK_W { w: self } - } - #[doc = "Bit 6 - Input Invert Selection"] - #[inline(always)] - pub fn invinp(&mut self) -> INVINP_W { - INVINP_W { w: self } - } - #[doc = "Bit 7 - Input Enable While Output enabled"] - #[inline(always)] - pub fn iewo(&mut self) -> IEWO_W { - IEWO_W { w: self } - } - #[doc = "Bit 8 - Output Open Drain Mode"] - #[inline(always)] - pub fn opendrn(&mut self) -> OPENDRN_W { - OPENDRN_W { w: self } - } - #[doc = "Bit 9 - Output Invert Selection"] - #[inline(always)] - pub fn invout(&mut self) -> INVOUT_W { - INVOUT_W { w: self } - } - #[doc = "Bit 10 - Internal Pull up/down level"] - #[inline(always)] - pub fn plevel(&mut self) -> PLEVEL_W { - PLEVEL_W { w: self } - } - #[doc = "Bit 11 - Enable Internal Pull up/down"] - #[inline(always)] - pub fn pen(&mut self) -> PEN_W { - PEN_W { w: self } - } - #[doc = "Bit 12 - Enable Pull when output active"] - #[inline(always)] - pub fn pwoa(&mut self) -> PWOA_W { - PWOA_W { w: self } - } - #[doc = "Bits 13:15 - Pin Function Selection"] - #[inline(always)] - pub fn funsel(&mut self) -> FUNSEL_W { - FUNSEL_W { w: self } - } - #[doc = "Bit 16 - IO Pin Disable"] - #[inline(always)] - pub fn iodis(&mut self) -> IODIS_W { - IODIS_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "PORTE Pin Configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [porte](index.html) module"] -pub struct PORTE_SPEC; -impl crate::RegisterSpec for PORTE_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [porte::R](R) reader structure"] -impl crate::Readable for PORTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [porte::W](W) writer structure"] -impl crate::Writable for PORTE_SPEC { - type Writer = W; -} -#[doc = "`reset()` method sets PORTE[%s] -to value 0"] -impl crate::Resettable for PORTE_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } -} diff --git a/va416xx/src/ioconfig/portf.rs b/va416xx/src/ioconfig/portf.rs deleted file mode 100644 index 2eb8b43..0000000 --- a/va416xx/src/ioconfig/portf.rs +++ /dev/null @@ -1,655 +0,0 @@ -#[doc = "Register `PORTF[%s]` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Register `PORTF[%s]` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Input Filter Selectoin\n\nValue on reset: 0"] -#[derive(Clone, Copy, Debug, PartialEq)] -#[repr(u8)] -pub enum FLTTYPE_A { - #[doc = "0: Synchronize to system clock"] - SYNC = 0, - #[doc = "1: Direct input, no synchronization"] - DIRECT = 1, - #[doc = "2: Require 2 samples to have the same value"] - FILTER1 = 2, - #[doc = "3: Require 3 samples to have the same value"] - FILTER2 = 3, - #[doc = "4: Require 4 samples to have the same value"] - FILTER3 = 4, - #[doc = "5: Require 5 samples to have the same value"] - FILTER4 = 5, -} -impl From for u8 { - #[inline(always)] - fn from(variant: FLTTYPE_A) -> Self { - variant as _ - } -} -#[doc = "Field `FLTTYPE` reader - Input Filter Selectoin"] -pub struct FLTTYPE_R(crate::FieldReader); -impl FLTTYPE_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - FLTTYPE_R(crate::FieldReader::new(bits)) - } - #[doc = r"Get enumerated values variant"] - #[inline(always)] - pub fn variant(&self) -> Option { - match self.bits { - 0 => Some(FLTTYPE_A::SYNC), - 1 => Some(FLTTYPE_A::DIRECT), - 2 => Some(FLTTYPE_A::FILTER1), - 3 => Some(FLTTYPE_A::FILTER2), - 4 => Some(FLTTYPE_A::FILTER3), - 5 => Some(FLTTYPE_A::FILTER4), - _ => None, - } - } - #[doc = "Checks if the value of the field is `SYNC`"] - #[inline(always)] - pub fn is_sync(&self) -> bool { - **self == FLTTYPE_A::SYNC - } - #[doc = "Checks if the value of the field is `DIRECT`"] - #[inline(always)] - pub fn is_direct(&self) -> bool { - **self == FLTTYPE_A::DIRECT - } - #[doc = "Checks if the value of the field is `FILTER1`"] - #[inline(always)] - pub fn is_filter1(&self) -> bool { - **self == FLTTYPE_A::FILTER1 - } - #[doc = "Checks if the value of the field is `FILTER2`"] - #[inline(always)] - pub fn is_filter2(&self) -> bool { - **self == FLTTYPE_A::FILTER2 - } - #[doc = "Checks if the value of the field is `FILTER3`"] - #[inline(always)] - pub fn is_filter3(&self) -> bool { - **self == FLTTYPE_A::FILTER3 - } - #[doc = "Checks if the value of the field is `FILTER4`"] - #[inline(always)] - pub fn is_filter4(&self) -> bool { - **self == FLTTYPE_A::FILTER4 - } -} -impl core::ops::Deref for FLTTYPE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `FLTTYPE` writer - Input Filter Selectoin"] -pub struct FLTTYPE_W<'a> { - w: &'a mut W, -} -impl<'a> FLTTYPE_W<'a> { - #[doc = r"Writes `variant` to the field"] - #[inline(always)] - pub fn variant(self, variant: FLTTYPE_A) -> &'a mut W { - unsafe { self.bits(variant.into()) } - } - #[doc = "Synchronize to system clock"] - #[inline(always)] - pub fn sync(self) -> &'a mut W { - self.variant(FLTTYPE_A::SYNC) - } - #[doc = "Direct input, no synchronization"] - #[inline(always)] - pub fn direct(self) -> &'a mut W { - self.variant(FLTTYPE_A::DIRECT) - } - #[doc = "Require 2 samples to have the same value"] - #[inline(always)] - pub fn filter1(self) -> &'a mut W { - self.variant(FLTTYPE_A::FILTER1) - } - #[doc = "Require 3 samples to have the same value"] - #[inline(always)] - pub fn filter2(self) -> &'a mut W { - self.variant(FLTTYPE_A::FILTER2) - } - #[doc = "Require 4 samples to have the same value"] - #[inline(always)] - pub fn filter3(self) -> &'a mut W { - self.variant(FLTTYPE_A::FILTER3) - } - #[doc = "Require 5 samples to have the same value"] - #[inline(always)] - pub fn filter4(self) -> &'a mut W { - self.variant(FLTTYPE_A::FILTER4) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0x07) | (value as u32 & 0x07); - self.w - } -} -#[doc = "Field `FLTCLK` reader - Input Filter Clock Selection"] -pub struct FLTCLK_R(crate::FieldReader); -impl FLTCLK_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - FLTCLK_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for FLTCLK_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `FLTCLK` writer - Input Filter Clock Selection"] -pub struct FLTCLK_W<'a> { - w: &'a mut W, -} -impl<'a> FLTCLK_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x07 << 3)) | ((value as u32 & 0x07) << 3); - self.w - } -} -#[doc = "Field `INVINP` reader - Input Invert Selection"] -pub struct INVINP_R(crate::FieldReader); -impl INVINP_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - INVINP_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for INVINP_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `INVINP` writer - Input Invert Selection"] -pub struct INVINP_W<'a> { - w: &'a mut W, -} -impl<'a> INVINP_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); - self.w - } -} -#[doc = "Field `IEWO` reader - Input Enable While Output enabled"] -pub struct IEWO_R(crate::FieldReader); -impl IEWO_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - IEWO_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for IEWO_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `IEWO` writer - Input Enable While Output enabled"] -pub struct IEWO_W<'a> { - w: &'a mut W, -} -impl<'a> IEWO_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); - self.w - } -} -#[doc = "Field `OPENDRN` reader - Output Open Drain Mode"] -pub struct OPENDRN_R(crate::FieldReader); -impl OPENDRN_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - OPENDRN_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for OPENDRN_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `OPENDRN` writer - Output Open Drain Mode"] -pub struct OPENDRN_W<'a> { - w: &'a mut W, -} -impl<'a> OPENDRN_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); - self.w - } -} -#[doc = "Field `INVOUT` reader - Output Invert Selection"] -pub struct INVOUT_R(crate::FieldReader); -impl INVOUT_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - INVOUT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for INVOUT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `INVOUT` writer - Output Invert Selection"] -pub struct INVOUT_W<'a> { - w: &'a mut W, -} -impl<'a> INVOUT_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); - self.w - } -} -#[doc = "Field `PLEVEL` reader - Internal Pull up/down level"] -pub struct PLEVEL_R(crate::FieldReader); -impl PLEVEL_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - PLEVEL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PLEVEL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `PLEVEL` writer - Internal Pull up/down level"] -pub struct PLEVEL_W<'a> { - w: &'a mut W, -} -impl<'a> PLEVEL_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); - self.w - } -} -#[doc = "Field `PEN` reader - Enable Internal Pull up/down"] -pub struct PEN_R(crate::FieldReader); -impl PEN_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - PEN_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PEN_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `PEN` writer - Enable Internal Pull up/down"] -pub struct PEN_W<'a> { - w: &'a mut W, -} -impl<'a> PEN_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); - self.w - } -} -#[doc = "Field `PWOA` reader - Enable Pull when output active"] -pub struct PWOA_R(crate::FieldReader); -impl PWOA_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - PWOA_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PWOA_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `PWOA` writer - Enable Pull when output active"] -pub struct PWOA_W<'a> { - w: &'a mut W, -} -impl<'a> PWOA_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); - self.w - } -} -#[doc = "Field `FUNSEL` reader - Pin Function Selection"] -pub struct FUNSEL_R(crate::FieldReader); -impl FUNSEL_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - FUNSEL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for FUNSEL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `FUNSEL` writer - Pin Function Selection"] -pub struct FUNSEL_W<'a> { - w: &'a mut W, -} -impl<'a> FUNSEL_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x07 << 13)) | ((value as u32 & 0x07) << 13); - self.w - } -} -#[doc = "Field `IODIS` reader - IO Pin Disable"] -pub struct IODIS_R(crate::FieldReader); -impl IODIS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - IODIS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for IODIS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `IODIS` writer - IO Pin Disable"] -pub struct IODIS_W<'a> { - w: &'a mut W, -} -impl<'a> IODIS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16); - self.w - } -} -impl R { - #[doc = "Bits 0:2 - Input Filter Selectoin"] - #[inline(always)] - pub fn flttype(&self) -> FLTTYPE_R { - FLTTYPE_R::new((self.bits & 0x07) as u8) - } - #[doc = "Bits 3:5 - Input Filter Clock Selection"] - #[inline(always)] - pub fn fltclk(&self) -> FLTCLK_R { - FLTCLK_R::new(((self.bits >> 3) & 0x07) as u8) - } - #[doc = "Bit 6 - Input Invert Selection"] - #[inline(always)] - pub fn invinp(&self) -> INVINP_R { - INVINP_R::new(((self.bits >> 6) & 0x01) != 0) - } - #[doc = "Bit 7 - Input Enable While Output enabled"] - #[inline(always)] - pub fn iewo(&self) -> IEWO_R { - IEWO_R::new(((self.bits >> 7) & 0x01) != 0) - } - #[doc = "Bit 8 - Output Open Drain Mode"] - #[inline(always)] - pub fn opendrn(&self) -> OPENDRN_R { - OPENDRN_R::new(((self.bits >> 8) & 0x01) != 0) - } - #[doc = "Bit 9 - Output Invert Selection"] - #[inline(always)] - pub fn invout(&self) -> INVOUT_R { - INVOUT_R::new(((self.bits >> 9) & 0x01) != 0) - } - #[doc = "Bit 10 - Internal Pull up/down level"] - #[inline(always)] - pub fn plevel(&self) -> PLEVEL_R { - PLEVEL_R::new(((self.bits >> 10) & 0x01) != 0) - } - #[doc = "Bit 11 - Enable Internal Pull up/down"] - #[inline(always)] - pub fn pen(&self) -> PEN_R { - PEN_R::new(((self.bits >> 11) & 0x01) != 0) - } - #[doc = "Bit 12 - Enable Pull when output active"] - #[inline(always)] - pub fn pwoa(&self) -> PWOA_R { - PWOA_R::new(((self.bits >> 12) & 0x01) != 0) - } - #[doc = "Bits 13:15 - Pin Function Selection"] - #[inline(always)] - pub fn funsel(&self) -> FUNSEL_R { - FUNSEL_R::new(((self.bits >> 13) & 0x07) as u8) - } - #[doc = "Bit 16 - IO Pin Disable"] - #[inline(always)] - pub fn iodis(&self) -> IODIS_R { - IODIS_R::new(((self.bits >> 16) & 0x01) != 0) - } -} -impl W { - #[doc = "Bits 0:2 - Input Filter Selectoin"] - #[inline(always)] - pub fn flttype(&mut self) -> FLTTYPE_W { - FLTTYPE_W { w: self } - } - #[doc = "Bits 3:5 - Input Filter Clock Selection"] - #[inline(always)] - pub fn fltclk(&mut self) -> FLTCLK_W { - FLTCLK_W { w: self } - } - #[doc = "Bit 6 - Input Invert Selection"] - #[inline(always)] - pub fn invinp(&mut self) -> INVINP_W { - INVINP_W { w: self } - } - #[doc = "Bit 7 - Input Enable While Output enabled"] - #[inline(always)] - pub fn iewo(&mut self) -> IEWO_W { - IEWO_W { w: self } - } - #[doc = "Bit 8 - Output Open Drain Mode"] - #[inline(always)] - pub fn opendrn(&mut self) -> OPENDRN_W { - OPENDRN_W { w: self } - } - #[doc = "Bit 9 - Output Invert Selection"] - #[inline(always)] - pub fn invout(&mut self) -> INVOUT_W { - INVOUT_W { w: self } - } - #[doc = "Bit 10 - Internal Pull up/down level"] - #[inline(always)] - pub fn plevel(&mut self) -> PLEVEL_W { - PLEVEL_W { w: self } - } - #[doc = "Bit 11 - Enable Internal Pull up/down"] - #[inline(always)] - pub fn pen(&mut self) -> PEN_W { - PEN_W { w: self } - } - #[doc = "Bit 12 - Enable Pull when output active"] - #[inline(always)] - pub fn pwoa(&mut self) -> PWOA_W { - PWOA_W { w: self } - } - #[doc = "Bits 13:15 - Pin Function Selection"] - #[inline(always)] - pub fn funsel(&mut self) -> FUNSEL_W { - FUNSEL_W { w: self } - } - #[doc = "Bit 16 - IO Pin Disable"] - #[inline(always)] - pub fn iodis(&mut self) -> IODIS_W { - IODIS_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "PORTF Pin Configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [portf](index.html) module"] -pub struct PORTF_SPEC; -impl crate::RegisterSpec for PORTF_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [portf::R](R) reader structure"] -impl crate::Readable for PORTF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [portf::W](W) writer structure"] -impl crate::Writable for PORTF_SPEC { - type Writer = W; -} -#[doc = "`reset()` method sets PORTF[%s] -to value 0"] -impl crate::Resettable for PORTF_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } -} diff --git a/va416xx/src/ioconfig/portg.rs b/va416xx/src/ioconfig/portg.rs deleted file mode 100644 index 15f9738..0000000 --- a/va416xx/src/ioconfig/portg.rs +++ /dev/null @@ -1,655 +0,0 @@ -#[doc = "Register `PORTG[%s]` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Register `PORTG[%s]` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Input Filter Selectoin\n\nValue on reset: 0"] -#[derive(Clone, Copy, Debug, PartialEq)] -#[repr(u8)] -pub enum FLTTYPE_A { - #[doc = "0: Synchronize to system clock"] - SYNC = 0, - #[doc = "1: Direct input, no synchronization"] - DIRECT = 1, - #[doc = "2: Require 2 samples to have the same value"] - FILTER1 = 2, - #[doc = "3: Require 3 samples to have the same value"] - FILTER2 = 3, - #[doc = "4: Require 4 samples to have the same value"] - FILTER3 = 4, - #[doc = "5: Require 5 samples to have the same value"] - FILTER4 = 5, -} -impl From for u8 { - #[inline(always)] - fn from(variant: FLTTYPE_A) -> Self { - variant as _ - } -} -#[doc = "Field `FLTTYPE` reader - Input Filter Selectoin"] -pub struct FLTTYPE_R(crate::FieldReader); -impl FLTTYPE_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - FLTTYPE_R(crate::FieldReader::new(bits)) - } - #[doc = r"Get enumerated values variant"] - #[inline(always)] - pub fn variant(&self) -> Option { - match self.bits { - 0 => Some(FLTTYPE_A::SYNC), - 1 => Some(FLTTYPE_A::DIRECT), - 2 => Some(FLTTYPE_A::FILTER1), - 3 => Some(FLTTYPE_A::FILTER2), - 4 => Some(FLTTYPE_A::FILTER3), - 5 => Some(FLTTYPE_A::FILTER4), - _ => None, - } - } - #[doc = "Checks if the value of the field is `SYNC`"] - #[inline(always)] - pub fn is_sync(&self) -> bool { - **self == FLTTYPE_A::SYNC - } - #[doc = "Checks if the value of the field is `DIRECT`"] - #[inline(always)] - pub fn is_direct(&self) -> bool { - **self == FLTTYPE_A::DIRECT - } - #[doc = "Checks if the value of the field is `FILTER1`"] - #[inline(always)] - pub fn is_filter1(&self) -> bool { - **self == FLTTYPE_A::FILTER1 - } - #[doc = "Checks if the value of the field is `FILTER2`"] - #[inline(always)] - pub fn is_filter2(&self) -> bool { - **self == FLTTYPE_A::FILTER2 - } - #[doc = "Checks if the value of the field is `FILTER3`"] - #[inline(always)] - pub fn is_filter3(&self) -> bool { - **self == FLTTYPE_A::FILTER3 - } - #[doc = "Checks if the value of the field is `FILTER4`"] - #[inline(always)] - pub fn is_filter4(&self) -> bool { - **self == FLTTYPE_A::FILTER4 - } -} -impl core::ops::Deref for FLTTYPE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `FLTTYPE` writer - Input Filter Selectoin"] -pub struct FLTTYPE_W<'a> { - w: &'a mut W, -} -impl<'a> FLTTYPE_W<'a> { - #[doc = r"Writes `variant` to the field"] - #[inline(always)] - pub fn variant(self, variant: FLTTYPE_A) -> &'a mut W { - unsafe { self.bits(variant.into()) } - } - #[doc = "Synchronize to system clock"] - #[inline(always)] - pub fn sync(self) -> &'a mut W { - self.variant(FLTTYPE_A::SYNC) - } - #[doc = "Direct input, no synchronization"] - #[inline(always)] - pub fn direct(self) -> &'a mut W { - self.variant(FLTTYPE_A::DIRECT) - } - #[doc = "Require 2 samples to have the same value"] - #[inline(always)] - pub fn filter1(self) -> &'a mut W { - self.variant(FLTTYPE_A::FILTER1) - } - #[doc = "Require 3 samples to have the same value"] - #[inline(always)] - pub fn filter2(self) -> &'a mut W { - self.variant(FLTTYPE_A::FILTER2) - } - #[doc = "Require 4 samples to have the same value"] - #[inline(always)] - pub fn filter3(self) -> &'a mut W { - self.variant(FLTTYPE_A::FILTER3) - } - #[doc = "Require 5 samples to have the same value"] - #[inline(always)] - pub fn filter4(self) -> &'a mut W { - self.variant(FLTTYPE_A::FILTER4) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0x07) | (value as u32 & 0x07); - self.w - } -} -#[doc = "Field `FLTCLK` reader - Input Filter Clock Selection"] -pub struct FLTCLK_R(crate::FieldReader); -impl FLTCLK_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - FLTCLK_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for FLTCLK_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `FLTCLK` writer - Input Filter Clock Selection"] -pub struct FLTCLK_W<'a> { - w: &'a mut W, -} -impl<'a> FLTCLK_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x07 << 3)) | ((value as u32 & 0x07) << 3); - self.w - } -} -#[doc = "Field `INVINP` reader - Input Invert Selection"] -pub struct INVINP_R(crate::FieldReader); -impl INVINP_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - INVINP_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for INVINP_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `INVINP` writer - Input Invert Selection"] -pub struct INVINP_W<'a> { - w: &'a mut W, -} -impl<'a> INVINP_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); - self.w - } -} -#[doc = "Field `IEWO` reader - Input Enable While Output enabled"] -pub struct IEWO_R(crate::FieldReader); -impl IEWO_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - IEWO_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for IEWO_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `IEWO` writer - Input Enable While Output enabled"] -pub struct IEWO_W<'a> { - w: &'a mut W, -} -impl<'a> IEWO_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); - self.w - } -} -#[doc = "Field `OPENDRN` reader - Output Open Drain Mode"] -pub struct OPENDRN_R(crate::FieldReader); -impl OPENDRN_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - OPENDRN_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for OPENDRN_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `OPENDRN` writer - Output Open Drain Mode"] -pub struct OPENDRN_W<'a> { - w: &'a mut W, -} -impl<'a> OPENDRN_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); - self.w - } -} -#[doc = "Field `INVOUT` reader - Output Invert Selection"] -pub struct INVOUT_R(crate::FieldReader); -impl INVOUT_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - INVOUT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for INVOUT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `INVOUT` writer - Output Invert Selection"] -pub struct INVOUT_W<'a> { - w: &'a mut W, -} -impl<'a> INVOUT_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); - self.w - } -} -#[doc = "Field `PLEVEL` reader - Internal Pull up/down level"] -pub struct PLEVEL_R(crate::FieldReader); -impl PLEVEL_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - PLEVEL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PLEVEL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `PLEVEL` writer - Internal Pull up/down level"] -pub struct PLEVEL_W<'a> { - w: &'a mut W, -} -impl<'a> PLEVEL_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); - self.w - } -} -#[doc = "Field `PEN` reader - Enable Internal Pull up/down"] -pub struct PEN_R(crate::FieldReader); -impl PEN_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - PEN_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PEN_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `PEN` writer - Enable Internal Pull up/down"] -pub struct PEN_W<'a> { - w: &'a mut W, -} -impl<'a> PEN_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); - self.w - } -} -#[doc = "Field `PWOA` reader - Enable Pull when output active"] -pub struct PWOA_R(crate::FieldReader); -impl PWOA_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - PWOA_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PWOA_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `PWOA` writer - Enable Pull when output active"] -pub struct PWOA_W<'a> { - w: &'a mut W, -} -impl<'a> PWOA_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); - self.w - } -} -#[doc = "Field `FUNSEL` reader - Pin Function Selection"] -pub struct FUNSEL_R(crate::FieldReader); -impl FUNSEL_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - FUNSEL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for FUNSEL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `FUNSEL` writer - Pin Function Selection"] -pub struct FUNSEL_W<'a> { - w: &'a mut W, -} -impl<'a> FUNSEL_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x07 << 13)) | ((value as u32 & 0x07) << 13); - self.w - } -} -#[doc = "Field `IODIS` reader - IO Pin Disable"] -pub struct IODIS_R(crate::FieldReader); -impl IODIS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - IODIS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for IODIS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `IODIS` writer - IO Pin Disable"] -pub struct IODIS_W<'a> { - w: &'a mut W, -} -impl<'a> IODIS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16); - self.w - } -} -impl R { - #[doc = "Bits 0:2 - Input Filter Selectoin"] - #[inline(always)] - pub fn flttype(&self) -> FLTTYPE_R { - FLTTYPE_R::new((self.bits & 0x07) as u8) - } - #[doc = "Bits 3:5 - Input Filter Clock Selection"] - #[inline(always)] - pub fn fltclk(&self) -> FLTCLK_R { - FLTCLK_R::new(((self.bits >> 3) & 0x07) as u8) - } - #[doc = "Bit 6 - Input Invert Selection"] - #[inline(always)] - pub fn invinp(&self) -> INVINP_R { - INVINP_R::new(((self.bits >> 6) & 0x01) != 0) - } - #[doc = "Bit 7 - Input Enable While Output enabled"] - #[inline(always)] - pub fn iewo(&self) -> IEWO_R { - IEWO_R::new(((self.bits >> 7) & 0x01) != 0) - } - #[doc = "Bit 8 - Output Open Drain Mode"] - #[inline(always)] - pub fn opendrn(&self) -> OPENDRN_R { - OPENDRN_R::new(((self.bits >> 8) & 0x01) != 0) - } - #[doc = "Bit 9 - Output Invert Selection"] - #[inline(always)] - pub fn invout(&self) -> INVOUT_R { - INVOUT_R::new(((self.bits >> 9) & 0x01) != 0) - } - #[doc = "Bit 10 - Internal Pull up/down level"] - #[inline(always)] - pub fn plevel(&self) -> PLEVEL_R { - PLEVEL_R::new(((self.bits >> 10) & 0x01) != 0) - } - #[doc = "Bit 11 - Enable Internal Pull up/down"] - #[inline(always)] - pub fn pen(&self) -> PEN_R { - PEN_R::new(((self.bits >> 11) & 0x01) != 0) - } - #[doc = "Bit 12 - Enable Pull when output active"] - #[inline(always)] - pub fn pwoa(&self) -> PWOA_R { - PWOA_R::new(((self.bits >> 12) & 0x01) != 0) - } - #[doc = "Bits 13:15 - Pin Function Selection"] - #[inline(always)] - pub fn funsel(&self) -> FUNSEL_R { - FUNSEL_R::new(((self.bits >> 13) & 0x07) as u8) - } - #[doc = "Bit 16 - IO Pin Disable"] - #[inline(always)] - pub fn iodis(&self) -> IODIS_R { - IODIS_R::new(((self.bits >> 16) & 0x01) != 0) - } -} -impl W { - #[doc = "Bits 0:2 - Input Filter Selectoin"] - #[inline(always)] - pub fn flttype(&mut self) -> FLTTYPE_W { - FLTTYPE_W { w: self } - } - #[doc = "Bits 3:5 - Input Filter Clock Selection"] - #[inline(always)] - pub fn fltclk(&mut self) -> FLTCLK_W { - FLTCLK_W { w: self } - } - #[doc = "Bit 6 - Input Invert Selection"] - #[inline(always)] - pub fn invinp(&mut self) -> INVINP_W { - INVINP_W { w: self } - } - #[doc = "Bit 7 - Input Enable While Output enabled"] - #[inline(always)] - pub fn iewo(&mut self) -> IEWO_W { - IEWO_W { w: self } - } - #[doc = "Bit 8 - Output Open Drain Mode"] - #[inline(always)] - pub fn opendrn(&mut self) -> OPENDRN_W { - OPENDRN_W { w: self } - } - #[doc = "Bit 9 - Output Invert Selection"] - #[inline(always)] - pub fn invout(&mut self) -> INVOUT_W { - INVOUT_W { w: self } - } - #[doc = "Bit 10 - Internal Pull up/down level"] - #[inline(always)] - pub fn plevel(&mut self) -> PLEVEL_W { - PLEVEL_W { w: self } - } - #[doc = "Bit 11 - Enable Internal Pull up/down"] - #[inline(always)] - pub fn pen(&mut self) -> PEN_W { - PEN_W { w: self } - } - #[doc = "Bit 12 - Enable Pull when output active"] - #[inline(always)] - pub fn pwoa(&mut self) -> PWOA_W { - PWOA_W { w: self } - } - #[doc = "Bits 13:15 - Pin Function Selection"] - #[inline(always)] - pub fn funsel(&mut self) -> FUNSEL_W { - FUNSEL_W { w: self } - } - #[doc = "Bit 16 - IO Pin Disable"] - #[inline(always)] - pub fn iodis(&mut self) -> IODIS_W { - IODIS_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "PORTG Pin Configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [portg](index.html) module"] -pub struct PORTG_SPEC; -impl crate::RegisterSpec for PORTG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [portg::R](R) reader structure"] -impl crate::Readable for PORTG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [portg::W](W) writer structure"] -impl crate::Writable for PORTG_SPEC { - type Writer = W; -} -#[doc = "`reset()` method sets PORTG[%s] -to value 0"] -impl crate::Resettable for PORTG_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } -} diff --git a/va416xx/src/irq_router.rs b/va416xx/src/irq_router.rs index 08f5fd0..af90499 100644 --- a/va416xx/src/irq_router.rs +++ b/va416xx/src/irq_router.rs @@ -1,95 +1,187 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - #[doc = "0x00 - Interrupt select for DMA channel 0"] - pub dmasel0: crate::Reg, - #[doc = "0x04 - Interrupt select for DMA channel 1"] - pub dmasel1: crate::Reg, - #[doc = "0x08 - Interrupt select for DMA channel 2"] - pub dmasel2: crate::Reg, - #[doc = "0x0c - Interrupt select for DMA channel 3"] - pub dmasel3: crate::Reg, - #[doc = "0x10 - Trigger select for the DMA channels"] - pub dmattsel: crate::Reg, - #[doc = "0x14 - Interrupt select for ADC"] - pub adcsel: crate::Reg, - #[doc = "0x18 - Interrupt select for DAC0"] - pub dacsel0: crate::Reg, - #[doc = "0x1c - Interrupt select for DAC1"] - pub dacsel1: crate::Reg, - #[doc = "0x20 - DEBUG IRQ_OUT\\[31:0\\]"] - pub irq_out0: crate::Reg, - #[doc = "0x24 - DEBUG IRQ_OUT\\[63:32\\]"] - pub irq_out1: crate::Reg, - #[doc = "0x28 - DEBUG IRQ_OUT\\[95:64\\]"] - pub irq_out2: crate::Reg, - #[doc = "0x2c - DEBUG IRQ_OUT\\[127:96\\]"] - pub irq_out3: crate::Reg, - #[doc = "0x30 - DEBUG IRQ_OUT\\[159:128\\]"] - pub irq_out4: crate::Reg, - #[doc = "0x34 - DEBUG IRQ_OUT\\[179:160\\]"] - pub irq_out5: crate::Reg, + dmasel0: Dmasel0, + dmasel1: Dmasel1, + dmasel2: Dmasel2, + dmasel3: Dmasel3, + dmattsel: Dmattsel, + adcsel: Adcsel, + dacsel0: Dacsel0, + dacsel1: Dacsel1, + irq_out0: IrqOut0, + irq_out1: IrqOut1, + irq_out2: IrqOut2, + irq_out3: IrqOut3, + irq_out4: IrqOut4, + irq_out5: IrqOut5, _reserved14: [u8; 0x0fc4], - #[doc = "0xffc - Peripheral ID Register"] - pub perid: crate::Reg, + perid: Perid, } -#[doc = "DMASEL0 register accessor: an alias for `Reg`"] -pub type DMASEL0 = crate::Reg; +impl RegisterBlock { + #[doc = "0x00 - Interrupt select for DMA channel 0"] + #[inline(always)] + pub const fn dmasel0(&self) -> &Dmasel0 { + &self.dmasel0 + } + #[doc = "0x04 - Interrupt select for DMA channel 1"] + #[inline(always)] + pub const fn dmasel1(&self) -> &Dmasel1 { + &self.dmasel1 + } + #[doc = "0x08 - Interrupt select for DMA channel 2"] + #[inline(always)] + pub const fn dmasel2(&self) -> &Dmasel2 { + &self.dmasel2 + } + #[doc = "0x0c - Interrupt select for DMA channel 3"] + #[inline(always)] + pub const fn dmasel3(&self) -> &Dmasel3 { + &self.dmasel3 + } + #[doc = "0x10 - Trigger select for the DMA channels"] + #[inline(always)] + pub const fn dmattsel(&self) -> &Dmattsel { + &self.dmattsel + } + #[doc = "0x14 - Interrupt select for ADC"] + #[inline(always)] + pub const fn adcsel(&self) -> &Adcsel { + &self.adcsel + } + #[doc = "0x18 - Interrupt select for DAC0"] + #[inline(always)] + pub const fn dacsel0(&self) -> &Dacsel0 { + &self.dacsel0 + } + #[doc = "0x1c - Interrupt select for DAC1"] + #[inline(always)] + pub const fn dacsel1(&self) -> &Dacsel1 { + &self.dacsel1 + } + #[doc = "0x20 - DEBUG IRQ_OUT\\[31:0\\]"] + #[inline(always)] + pub const fn irq_out0(&self) -> &IrqOut0 { + &self.irq_out0 + } + #[doc = "0x24 - DEBUG IRQ_OUT\\[63:32\\]"] + #[inline(always)] + pub const fn irq_out1(&self) -> &IrqOut1 { + &self.irq_out1 + } + #[doc = "0x28 - DEBUG IRQ_OUT\\[95:64\\]"] + #[inline(always)] + pub const fn irq_out2(&self) -> &IrqOut2 { + &self.irq_out2 + } + #[doc = "0x2c - DEBUG IRQ_OUT\\[127:96\\]"] + #[inline(always)] + pub const fn irq_out3(&self) -> &IrqOut3 { + &self.irq_out3 + } + #[doc = "0x30 - DEBUG IRQ_OUT\\[159:128\\]"] + #[inline(always)] + pub const fn irq_out4(&self) -> &IrqOut4 { + &self.irq_out4 + } + #[doc = "0x34 - DEBUG IRQ_OUT\\[179:160\\]"] + #[inline(always)] + pub const fn irq_out5(&self) -> &IrqOut5 { + &self.irq_out5 + } + #[doc = "0xffc - Peripheral ID Register"] + #[inline(always)] + pub const fn perid(&self) -> &Perid { + &self.perid + } +} +#[doc = "DMASEL0 (rw) register accessor: Interrupt select for DMA channel 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dmasel0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dmasel0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmasel0`] +module"] +#[doc(alias = "DMASEL0")] +pub type Dmasel0 = crate::Reg; #[doc = "Interrupt select for DMA channel 0"] pub mod dmasel0; -#[doc = "DMASEL1 register accessor: an alias for `Reg`"] -pub type DMASEL1 = crate::Reg; +#[doc = "DMASEL1 (rw) register accessor: Interrupt select for DMA channel 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dmasel1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dmasel1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmasel1`] +module"] +#[doc(alias = "DMASEL1")] +pub type Dmasel1 = crate::Reg; #[doc = "Interrupt select for DMA channel 1"] pub mod dmasel1; -#[doc = "DMASEL2 register accessor: an alias for `Reg`"] -pub type DMASEL2 = crate::Reg; +#[doc = "DMASEL2 (rw) register accessor: Interrupt select for DMA channel 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dmasel2::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dmasel2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmasel2`] +module"] +#[doc(alias = "DMASEL2")] +pub type Dmasel2 = crate::Reg; #[doc = "Interrupt select for DMA channel 2"] pub mod dmasel2; -#[doc = "DMASEL3 register accessor: an alias for `Reg`"] -pub type DMASEL3 = crate::Reg; +#[doc = "DMASEL3 (rw) register accessor: Interrupt select for DMA channel 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dmasel3::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dmasel3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmasel3`] +module"] +#[doc(alias = "DMASEL3")] +pub type Dmasel3 = crate::Reg; #[doc = "Interrupt select for DMA channel 3"] pub mod dmasel3; -#[doc = "DMATTSEL register accessor: an alias for `Reg`"] -pub type DMATTSEL = crate::Reg; +#[doc = "DMATTSEL (rw) register accessor: Trigger select for the DMA channels\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dmattsel::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dmattsel::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmattsel`] +module"] +#[doc(alias = "DMATTSEL")] +pub type Dmattsel = crate::Reg; #[doc = "Trigger select for the DMA channels"] pub mod dmattsel; -#[doc = "ADCSEL register accessor: an alias for `Reg`"] -pub type ADCSEL = crate::Reg; +#[doc = "ADCSEL (rw) register accessor: Interrupt select for ADC\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`adcsel::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`adcsel::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@adcsel`] +module"] +#[doc(alias = "ADCSEL")] +pub type Adcsel = crate::Reg; #[doc = "Interrupt select for ADC"] pub mod adcsel; -#[doc = "DACSEL0 register accessor: an alias for `Reg`"] -pub type DACSEL0 = crate::Reg; +#[doc = "DACSEL0 (rw) register accessor: Interrupt select for DAC0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dacsel0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dacsel0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dacsel0`] +module"] +#[doc(alias = "DACSEL0")] +pub type Dacsel0 = crate::Reg; #[doc = "Interrupt select for DAC0"] pub mod dacsel0; -#[doc = "DACSEL1 register accessor: an alias for `Reg`"] -pub type DACSEL1 = crate::Reg; +#[doc = "DACSEL1 (rw) register accessor: Interrupt select for DAC1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dacsel1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dacsel1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dacsel1`] +module"] +#[doc(alias = "DACSEL1")] +pub type Dacsel1 = crate::Reg; #[doc = "Interrupt select for DAC1"] pub mod dacsel1; -#[doc = "IRQ_OUT0 register accessor: an alias for `Reg`"] -pub type IRQ_OUT0 = crate::Reg; +#[doc = "IRQ_OUT0 (r) register accessor: DEBUG IRQ_OUT\\[31:0\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_out0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_out0`] +module"] +#[doc(alias = "IRQ_OUT0")] +pub type IrqOut0 = crate::Reg; #[doc = "DEBUG IRQ_OUT\\[31:0\\]"] pub mod irq_out0; -#[doc = "IRQ_OUT1 register accessor: an alias for `Reg`"] -pub type IRQ_OUT1 = crate::Reg; +#[doc = "IRQ_OUT1 (r) register accessor: DEBUG IRQ_OUT\\[63:32\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_out1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_out1`] +module"] +#[doc(alias = "IRQ_OUT1")] +pub type IrqOut1 = crate::Reg; #[doc = "DEBUG IRQ_OUT\\[63:32\\]"] pub mod irq_out1; -#[doc = "IRQ_OUT2 register accessor: an alias for `Reg`"] -pub type IRQ_OUT2 = crate::Reg; +#[doc = "IRQ_OUT2 (r) register accessor: DEBUG IRQ_OUT\\[95:64\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_out2::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_out2`] +module"] +#[doc(alias = "IRQ_OUT2")] +pub type IrqOut2 = crate::Reg; #[doc = "DEBUG IRQ_OUT\\[95:64\\]"] pub mod irq_out2; -#[doc = "IRQ_OUT3 register accessor: an alias for `Reg`"] -pub type IRQ_OUT3 = crate::Reg; +#[doc = "IRQ_OUT3 (r) register accessor: DEBUG IRQ_OUT\\[127:96\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_out3::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_out3`] +module"] +#[doc(alias = "IRQ_OUT3")] +pub type IrqOut3 = crate::Reg; #[doc = "DEBUG IRQ_OUT\\[127:96\\]"] pub mod irq_out3; -#[doc = "IRQ_OUT4 register accessor: an alias for `Reg`"] -pub type IRQ_OUT4 = crate::Reg; +#[doc = "IRQ_OUT4 (r) register accessor: DEBUG IRQ_OUT\\[159:128\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_out4::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_out4`] +module"] +#[doc(alias = "IRQ_OUT4")] +pub type IrqOut4 = crate::Reg; #[doc = "DEBUG IRQ_OUT\\[159:128\\]"] pub mod irq_out4; -#[doc = "IRQ_OUT5 register accessor: an alias for `Reg`"] -pub type IRQ_OUT5 = crate::Reg; +#[doc = "IRQ_OUT5 (r) register accessor: DEBUG IRQ_OUT\\[179:160\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_out5::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_out5`] +module"] +#[doc(alias = "IRQ_OUT5")] +pub type IrqOut5 = crate::Reg; #[doc = "DEBUG IRQ_OUT\\[179:160\\]"] pub mod irq_out5; -#[doc = "PERID register accessor: an alias for `Reg`"] -pub type PERID = crate::Reg; +#[doc = "PERID (r) register accessor: Peripheral ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`perid::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@perid`] +module"] +#[doc(alias = "PERID")] +pub type Perid = crate::Reg; #[doc = "Peripheral ID Register"] pub mod perid; diff --git a/va416xx/src/irq_router/adcsel.rs b/va416xx/src/irq_router/adcsel.rs index 7aa1356..849fcdd 100644 --- a/va416xx/src/irq_router/adcsel.rs +++ b/va416xx/src/irq_router/adcsel.rs @@ -1,103 +1,40 @@ #[doc = "Register `ADCSEL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ADCSEL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `ADCSEL` reader - ADC trigger source selection value"] -pub struct ADCSEL_R(crate::FieldReader); -impl ADCSEL_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - ADCSEL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ADCSEL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type AdcselR = crate::FieldReader; #[doc = "Field `ADCSEL` writer - ADC trigger source selection value"] -pub struct ADCSEL_W<'a> { - w: &'a mut W, -} -impl<'a> ADCSEL_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0x1f) | (value as u32 & 0x1f); - self.w - } -} +pub type AdcselW<'a, REG> = crate::FieldWriter<'a, REG, 5>; impl R { #[doc = "Bits 0:4 - ADC trigger source selection value"] #[inline(always)] - pub fn adcsel(&self) -> ADCSEL_R { - ADCSEL_R::new((self.bits & 0x1f) as u8) + pub fn adcsel(&self) -> AdcselR { + AdcselR::new((self.bits & 0x1f) as u8) } } impl W { #[doc = "Bits 0:4 - ADC trigger source selection value"] #[inline(always)] - pub fn adcsel(&mut self) -> ADCSEL_W { - ADCSEL_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn adcsel(&mut self) -> AdcselW { + AdcselW::new(self, 0) } } -#[doc = "Interrupt select for ADC\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [adcsel](index.html) module"] -pub struct ADCSEL_SPEC; -impl crate::RegisterSpec for ADCSEL_SPEC { +#[doc = "Interrupt select for ADC\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`adcsel::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`adcsel::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct AdcselSpec; +impl crate::RegisterSpec for AdcselSpec { type Ux = u32; } -#[doc = "`read()` method returns [adcsel::R](R) reader structure"] -impl crate::Readable for ADCSEL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [adcsel::W](W) writer structure"] -impl crate::Writable for ADCSEL_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`adcsel::R`](R) reader structure"] +impl crate::Readable for AdcselSpec {} +#[doc = "`write(|w| ..)` method takes [`adcsel::W`](W) writer structure"] +impl crate::Writable for AdcselSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ADCSEL to value 0x1f"] -impl crate::Resettable for ADCSEL_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0x1f - } +impl crate::Resettable for AdcselSpec { + const RESET_VALUE: u32 = 0x1f; } diff --git a/va416xx/src/irq_router/dacsel0.rs b/va416xx/src/irq_router/dacsel0.rs index 4a247d7..4ca1863 100644 --- a/va416xx/src/irq_router/dacsel0.rs +++ b/va416xx/src/irq_router/dacsel0.rs @@ -1,103 +1,40 @@ #[doc = "Register `DACSEL0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DACSEL0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DACSEL` reader - DAC trigger source selection value"] -pub struct DACSEL_R(crate::FieldReader); -impl DACSEL_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - DACSEL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for DACSEL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type DacselR = crate::FieldReader; #[doc = "Field `DACSEL` writer - DAC trigger source selection value"] -pub struct DACSEL_W<'a> { - w: &'a mut W, -} -impl<'a> DACSEL_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0x1f) | (value as u32 & 0x1f); - self.w - } -} +pub type DacselW<'a, REG> = crate::FieldWriter<'a, REG, 5>; impl R { #[doc = "Bits 0:4 - DAC trigger source selection value"] #[inline(always)] - pub fn dacsel(&self) -> DACSEL_R { - DACSEL_R::new((self.bits & 0x1f) as u8) + pub fn dacsel(&self) -> DacselR { + DacselR::new((self.bits & 0x1f) as u8) } } impl W { #[doc = "Bits 0:4 - DAC trigger source selection value"] #[inline(always)] - pub fn dacsel(&mut self) -> DACSEL_W { - DACSEL_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn dacsel(&mut self) -> DacselW { + DacselW::new(self, 0) } } -#[doc = "Interrupt select for DAC0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dacsel0](index.html) module"] -pub struct DACSEL0_SPEC; -impl crate::RegisterSpec for DACSEL0_SPEC { +#[doc = "Interrupt select for DAC0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dacsel0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dacsel0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Dacsel0Spec; +impl crate::RegisterSpec for Dacsel0Spec { type Ux = u32; } -#[doc = "`read()` method returns [dacsel0::R](R) reader structure"] -impl crate::Readable for DACSEL0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dacsel0::W](W) writer structure"] -impl crate::Writable for DACSEL0_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`dacsel0::R`](R) reader structure"] +impl crate::Readable for Dacsel0Spec {} +#[doc = "`write(|w| ..)` method takes [`dacsel0::W`](W) writer structure"] +impl crate::Writable for Dacsel0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DACSEL0 to value 0x1f"] -impl crate::Resettable for DACSEL0_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0x1f - } +impl crate::Resettable for Dacsel0Spec { + const RESET_VALUE: u32 = 0x1f; } diff --git a/va416xx/src/irq_router/dacsel1.rs b/va416xx/src/irq_router/dacsel1.rs index 4c86e57..7142161 100644 --- a/va416xx/src/irq_router/dacsel1.rs +++ b/va416xx/src/irq_router/dacsel1.rs @@ -1,103 +1,40 @@ #[doc = "Register `DACSEL1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DACSEL1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DACSEL` reader - DAC trigger source selection value"] -pub struct DACSEL_R(crate::FieldReader); -impl DACSEL_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - DACSEL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for DACSEL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type DacselR = crate::FieldReader; #[doc = "Field `DACSEL` writer - DAC trigger source selection value"] -pub struct DACSEL_W<'a> { - w: &'a mut W, -} -impl<'a> DACSEL_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0x1f) | (value as u32 & 0x1f); - self.w - } -} +pub type DacselW<'a, REG> = crate::FieldWriter<'a, REG, 5>; impl R { #[doc = "Bits 0:4 - DAC trigger source selection value"] #[inline(always)] - pub fn dacsel(&self) -> DACSEL_R { - DACSEL_R::new((self.bits & 0x1f) as u8) + pub fn dacsel(&self) -> DacselR { + DacselR::new((self.bits & 0x1f) as u8) } } impl W { #[doc = "Bits 0:4 - DAC trigger source selection value"] #[inline(always)] - pub fn dacsel(&mut self) -> DACSEL_W { - DACSEL_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn dacsel(&mut self) -> DacselW { + DacselW::new(self, 0) } } -#[doc = "Interrupt select for DAC1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dacsel1](index.html) module"] -pub struct DACSEL1_SPEC; -impl crate::RegisterSpec for DACSEL1_SPEC { +#[doc = "Interrupt select for DAC1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dacsel1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dacsel1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Dacsel1Spec; +impl crate::RegisterSpec for Dacsel1Spec { type Ux = u32; } -#[doc = "`read()` method returns [dacsel1::R](R) reader structure"] -impl crate::Readable for DACSEL1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dacsel1::W](W) writer structure"] -impl crate::Writable for DACSEL1_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`dacsel1::R`](R) reader structure"] +impl crate::Readable for Dacsel1Spec {} +#[doc = "`write(|w| ..)` method takes [`dacsel1::W`](W) writer structure"] +impl crate::Writable for Dacsel1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DACSEL1 to value 0x1f"] -impl crate::Resettable for DACSEL1_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0x1f - } +impl crate::Resettable for Dacsel1Spec { + const RESET_VALUE: u32 = 0x1f; } diff --git a/va416xx/src/irq_router/dmasel0.rs b/va416xx/src/irq_router/dmasel0.rs index fd464df..870f94e 100644 --- a/va416xx/src/irq_router/dmasel0.rs +++ b/va416xx/src/irq_router/dmasel0.rs @@ -1,103 +1,40 @@ #[doc = "Register `DMASEL0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DMASEL0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DMASEL` reader - DMA trigger source selection value"] -pub struct DMASEL_R(crate::FieldReader); -impl DMASEL_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - DMASEL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for DMASEL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type DmaselR = crate::FieldReader; #[doc = "Field `DMASEL` writer - DMA trigger source selection value"] -pub struct DMASEL_W<'a> { - w: &'a mut W, -} -impl<'a> DMASEL_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0x7f) | (value as u32 & 0x7f); - self.w - } -} +pub type DmaselW<'a, REG> = crate::FieldWriter<'a, REG, 7>; impl R { #[doc = "Bits 0:6 - DMA trigger source selection value"] #[inline(always)] - pub fn dmasel(&self) -> DMASEL_R { - DMASEL_R::new((self.bits & 0x7f) as u8) + pub fn dmasel(&self) -> DmaselR { + DmaselR::new((self.bits & 0x7f) as u8) } } impl W { #[doc = "Bits 0:6 - DMA trigger source selection value"] #[inline(always)] - pub fn dmasel(&mut self) -> DMASEL_W { - DMASEL_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn dmasel(&mut self) -> DmaselW { + DmaselW::new(self, 0) } } -#[doc = "Interrupt select for DMA channel 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dmasel0](index.html) module"] -pub struct DMASEL0_SPEC; -impl crate::RegisterSpec for DMASEL0_SPEC { +#[doc = "Interrupt select for DMA channel 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dmasel0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dmasel0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Dmasel0Spec; +impl crate::RegisterSpec for Dmasel0Spec { type Ux = u32; } -#[doc = "`read()` method returns [dmasel0::R](R) reader structure"] -impl crate::Readable for DMASEL0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dmasel0::W](W) writer structure"] -impl crate::Writable for DMASEL0_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`dmasel0::R`](R) reader structure"] +impl crate::Readable for Dmasel0Spec {} +#[doc = "`write(|w| ..)` method takes [`dmasel0::W`](W) writer structure"] +impl crate::Writable for Dmasel0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DMASEL0 to value 0x7f"] -impl crate::Resettable for DMASEL0_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0x7f - } +impl crate::Resettable for Dmasel0Spec { + const RESET_VALUE: u32 = 0x7f; } diff --git a/va416xx/src/irq_router/dmasel1.rs b/va416xx/src/irq_router/dmasel1.rs index e3ce3aa..e9c43c3 100644 --- a/va416xx/src/irq_router/dmasel1.rs +++ b/va416xx/src/irq_router/dmasel1.rs @@ -1,103 +1,40 @@ #[doc = "Register `DMASEL1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DMASEL1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DMASEL` reader - DMA trigger source selection value"] -pub struct DMASEL_R(crate::FieldReader); -impl DMASEL_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - DMASEL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for DMASEL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type DmaselR = crate::FieldReader; #[doc = "Field `DMASEL` writer - DMA trigger source selection value"] -pub struct DMASEL_W<'a> { - w: &'a mut W, -} -impl<'a> DMASEL_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0x7f) | (value as u32 & 0x7f); - self.w - } -} +pub type DmaselW<'a, REG> = crate::FieldWriter<'a, REG, 7>; impl R { #[doc = "Bits 0:6 - DMA trigger source selection value"] #[inline(always)] - pub fn dmasel(&self) -> DMASEL_R { - DMASEL_R::new((self.bits & 0x7f) as u8) + pub fn dmasel(&self) -> DmaselR { + DmaselR::new((self.bits & 0x7f) as u8) } } impl W { #[doc = "Bits 0:6 - DMA trigger source selection value"] #[inline(always)] - pub fn dmasel(&mut self) -> DMASEL_W { - DMASEL_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn dmasel(&mut self) -> DmaselW { + DmaselW::new(self, 0) } } -#[doc = "Interrupt select for DMA channel 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dmasel1](index.html) module"] -pub struct DMASEL1_SPEC; -impl crate::RegisterSpec for DMASEL1_SPEC { +#[doc = "Interrupt select for DMA channel 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dmasel1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dmasel1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Dmasel1Spec; +impl crate::RegisterSpec for Dmasel1Spec { type Ux = u32; } -#[doc = "`read()` method returns [dmasel1::R](R) reader structure"] -impl crate::Readable for DMASEL1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dmasel1::W](W) writer structure"] -impl crate::Writable for DMASEL1_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`dmasel1::R`](R) reader structure"] +impl crate::Readable for Dmasel1Spec {} +#[doc = "`write(|w| ..)` method takes [`dmasel1::W`](W) writer structure"] +impl crate::Writable for Dmasel1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DMASEL1 to value 0x7f"] -impl crate::Resettable for DMASEL1_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0x7f - } +impl crate::Resettable for Dmasel1Spec { + const RESET_VALUE: u32 = 0x7f; } diff --git a/va416xx/src/irq_router/dmasel2.rs b/va416xx/src/irq_router/dmasel2.rs index d3467bd..02285a2 100644 --- a/va416xx/src/irq_router/dmasel2.rs +++ b/va416xx/src/irq_router/dmasel2.rs @@ -1,103 +1,40 @@ #[doc = "Register `DMASEL2` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DMASEL2` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DMASEL` reader - DMA trigger source selection value"] -pub struct DMASEL_R(crate::FieldReader); -impl DMASEL_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - DMASEL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for DMASEL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type DmaselR = crate::FieldReader; #[doc = "Field `DMASEL` writer - DMA trigger source selection value"] -pub struct DMASEL_W<'a> { - w: &'a mut W, -} -impl<'a> DMASEL_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0x7f) | (value as u32 & 0x7f); - self.w - } -} +pub type DmaselW<'a, REG> = crate::FieldWriter<'a, REG, 7>; impl R { #[doc = "Bits 0:6 - DMA trigger source selection value"] #[inline(always)] - pub fn dmasel(&self) -> DMASEL_R { - DMASEL_R::new((self.bits & 0x7f) as u8) + pub fn dmasel(&self) -> DmaselR { + DmaselR::new((self.bits & 0x7f) as u8) } } impl W { #[doc = "Bits 0:6 - DMA trigger source selection value"] #[inline(always)] - pub fn dmasel(&mut self) -> DMASEL_W { - DMASEL_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn dmasel(&mut self) -> DmaselW { + DmaselW::new(self, 0) } } -#[doc = "Interrupt select for DMA channel 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dmasel2](index.html) module"] -pub struct DMASEL2_SPEC; -impl crate::RegisterSpec for DMASEL2_SPEC { +#[doc = "Interrupt select for DMA channel 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dmasel2::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dmasel2::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Dmasel2Spec; +impl crate::RegisterSpec for Dmasel2Spec { type Ux = u32; } -#[doc = "`read()` method returns [dmasel2::R](R) reader structure"] -impl crate::Readable for DMASEL2_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dmasel2::W](W) writer structure"] -impl crate::Writable for DMASEL2_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`dmasel2::R`](R) reader structure"] +impl crate::Readable for Dmasel2Spec {} +#[doc = "`write(|w| ..)` method takes [`dmasel2::W`](W) writer structure"] +impl crate::Writable for Dmasel2Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DMASEL2 to value 0x7f"] -impl crate::Resettable for DMASEL2_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0x7f - } +impl crate::Resettable for Dmasel2Spec { + const RESET_VALUE: u32 = 0x7f; } diff --git a/va416xx/src/irq_router/dmasel3.rs b/va416xx/src/irq_router/dmasel3.rs index 99561c4..2d4d1e8 100644 --- a/va416xx/src/irq_router/dmasel3.rs +++ b/va416xx/src/irq_router/dmasel3.rs @@ -1,103 +1,40 @@ #[doc = "Register `DMASEL3` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DMASEL3` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DMASEL` reader - DMA trigger source selection value"] -pub struct DMASEL_R(crate::FieldReader); -impl DMASEL_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - DMASEL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for DMASEL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type DmaselR = crate::FieldReader; #[doc = "Field `DMASEL` writer - DMA trigger source selection value"] -pub struct DMASEL_W<'a> { - w: &'a mut W, -} -impl<'a> DMASEL_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0x7f) | (value as u32 & 0x7f); - self.w - } -} +pub type DmaselW<'a, REG> = crate::FieldWriter<'a, REG, 7>; impl R { #[doc = "Bits 0:6 - DMA trigger source selection value"] #[inline(always)] - pub fn dmasel(&self) -> DMASEL_R { - DMASEL_R::new((self.bits & 0x7f) as u8) + pub fn dmasel(&self) -> DmaselR { + DmaselR::new((self.bits & 0x7f) as u8) } } impl W { #[doc = "Bits 0:6 - DMA trigger source selection value"] #[inline(always)] - pub fn dmasel(&mut self) -> DMASEL_W { - DMASEL_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn dmasel(&mut self) -> DmaselW { + DmaselW::new(self, 0) } } -#[doc = "Interrupt select for DMA channel 3\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dmasel3](index.html) module"] -pub struct DMASEL3_SPEC; -impl crate::RegisterSpec for DMASEL3_SPEC { +#[doc = "Interrupt select for DMA channel 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dmasel3::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dmasel3::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Dmasel3Spec; +impl crate::RegisterSpec for Dmasel3Spec { type Ux = u32; } -#[doc = "`read()` method returns [dmasel3::R](R) reader structure"] -impl crate::Readable for DMASEL3_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dmasel3::W](W) writer structure"] -impl crate::Writable for DMASEL3_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`dmasel3::R`](R) reader structure"] +impl crate::Readable for Dmasel3Spec {} +#[doc = "`write(|w| ..)` method takes [`dmasel3::W`](W) writer structure"] +impl crate::Writable for Dmasel3Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DMASEL3 to value 0x7f"] -impl crate::Resettable for DMASEL3_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0x7f - } +impl crate::Resettable for Dmasel3Spec { + const RESET_VALUE: u32 = 0x7f; } diff --git a/va416xx/src/irq_router/dmattsel.rs b/va416xx/src/irq_router/dmattsel.rs index 43ad69a..76e73c4 100644 --- a/va416xx/src/irq_router/dmattsel.rs +++ b/va416xx/src/irq_router/dmattsel.rs @@ -1,103 +1,40 @@ #[doc = "Register `DMATTSEL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DMATTSEL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DMATTSEL` reader - DMA trigger type selection value"] -pub struct DMATTSEL_R(crate::FieldReader); -impl DMATTSEL_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - DMATTSEL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for DMATTSEL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type DmattselR = crate::FieldReader; #[doc = "Field `DMATTSEL` writer - DMA trigger type selection value"] -pub struct DMATTSEL_W<'a> { - w: &'a mut W, -} -impl<'a> DMATTSEL_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0x0f) | (value as u32 & 0x0f); - self.w - } -} +pub type DmattselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - DMA trigger type selection value"] #[inline(always)] - pub fn dmattsel(&self) -> DMATTSEL_R { - DMATTSEL_R::new((self.bits & 0x0f) as u8) + pub fn dmattsel(&self) -> DmattselR { + DmattselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - DMA trigger type selection value"] #[inline(always)] - pub fn dmattsel(&mut self) -> DMATTSEL_W { - DMATTSEL_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn dmattsel(&mut self) -> DmattselW { + DmattselW::new(self, 0) } } -#[doc = "Trigger select for the DMA channels\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dmattsel](index.html) module"] -pub struct DMATTSEL_SPEC; -impl crate::RegisterSpec for DMATTSEL_SPEC { +#[doc = "Trigger select for the DMA channels\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dmattsel::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dmattsel::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DmattselSpec; +impl crate::RegisterSpec for DmattselSpec { type Ux = u32; } -#[doc = "`read()` method returns [dmattsel::R](R) reader structure"] -impl crate::Readable for DMATTSEL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dmattsel::W](W) writer structure"] -impl crate::Writable for DMATTSEL_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`dmattsel::R`](R) reader structure"] +impl crate::Readable for DmattselSpec {} +#[doc = "`write(|w| ..)` method takes [`dmattsel::W`](W) writer structure"] +impl crate::Writable for DmattselSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DMATTSEL to value 0"] -impl crate::Resettable for DMATTSEL_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for DmattselSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/irq_router/irq_out0.rs b/va416xx/src/irq_router/irq_out0.rs index ed4b686..2fbde74 100644 --- a/va416xx/src/irq_router/irq_out0.rs +++ b/va416xx/src/irq_router/irq_out0.rs @@ -1,53 +1,22 @@ #[doc = "Register `IRQ_OUT0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IRQ_OUT0` reader - IRQ_OUT\\[31:0\\]"] -pub struct IRQ_OUT0_R(crate::FieldReader); -impl IRQ_OUT0_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - IRQ_OUT0_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for IRQ_OUT0_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type IrqOut0R = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IRQ_OUT\\[31:0\\]"] #[inline(always)] - pub fn irq_out0(&self) -> IRQ_OUT0_R { - IRQ_OUT0_R::new(self.bits as u32) + pub fn irq_out0(&self) -> IrqOut0R { + IrqOut0R::new(self.bits) } } -#[doc = "DEBUG IRQ_OUT\\[31:0\\]\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [irq_out0](index.html) module"] -pub struct IRQ_OUT0_SPEC; -impl crate::RegisterSpec for IRQ_OUT0_SPEC { +#[doc = "DEBUG IRQ_OUT\\[31:0\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_out0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IrqOut0Spec; +impl crate::RegisterSpec for IrqOut0Spec { type Ux = u32; } -#[doc = "`read()` method returns [irq_out0::R](R) reader structure"] -impl crate::Readable for IRQ_OUT0_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`irq_out0::R`](R) reader structure"] +impl crate::Readable for IrqOut0Spec {} #[doc = "`reset()` method sets IRQ_OUT0 to value 0"] -impl crate::Resettable for IRQ_OUT0_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for IrqOut0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/irq_router/irq_out1.rs b/va416xx/src/irq_router/irq_out1.rs index d3fd455..aff0f39 100644 --- a/va416xx/src/irq_router/irq_out1.rs +++ b/va416xx/src/irq_router/irq_out1.rs @@ -1,53 +1,22 @@ #[doc = "Register `IRQ_OUT1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IRQ_OUT1` reader - IRQ_OUT\\[63:32\\]"] -pub struct IRQ_OUT1_R(crate::FieldReader); -impl IRQ_OUT1_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - IRQ_OUT1_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for IRQ_OUT1_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type IrqOut1R = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IRQ_OUT\\[63:32\\]"] #[inline(always)] - pub fn irq_out1(&self) -> IRQ_OUT1_R { - IRQ_OUT1_R::new(self.bits as u32) + pub fn irq_out1(&self) -> IrqOut1R { + IrqOut1R::new(self.bits) } } -#[doc = "DEBUG IRQ_OUT\\[63:32\\]\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [irq_out1](index.html) module"] -pub struct IRQ_OUT1_SPEC; -impl crate::RegisterSpec for IRQ_OUT1_SPEC { +#[doc = "DEBUG IRQ_OUT\\[63:32\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_out1::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IrqOut1Spec; +impl crate::RegisterSpec for IrqOut1Spec { type Ux = u32; } -#[doc = "`read()` method returns [irq_out1::R](R) reader structure"] -impl crate::Readable for IRQ_OUT1_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`irq_out1::R`](R) reader structure"] +impl crate::Readable for IrqOut1Spec {} #[doc = "`reset()` method sets IRQ_OUT1 to value 0"] -impl crate::Resettable for IRQ_OUT1_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for IrqOut1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/irq_router/irq_out2.rs b/va416xx/src/irq_router/irq_out2.rs index 6cd84af..4f3275c 100644 --- a/va416xx/src/irq_router/irq_out2.rs +++ b/va416xx/src/irq_router/irq_out2.rs @@ -1,53 +1,22 @@ #[doc = "Register `IRQ_OUT2` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IRQ_OUT2` reader - IRQ_OUT\\[95:64\\]"] -pub struct IRQ_OUT2_R(crate::FieldReader); -impl IRQ_OUT2_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - IRQ_OUT2_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for IRQ_OUT2_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type IrqOut2R = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IRQ_OUT\\[95:64\\]"] #[inline(always)] - pub fn irq_out2(&self) -> IRQ_OUT2_R { - IRQ_OUT2_R::new(self.bits as u32) + pub fn irq_out2(&self) -> IrqOut2R { + IrqOut2R::new(self.bits) } } -#[doc = "DEBUG IRQ_OUT\\[95:64\\]\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [irq_out2](index.html) module"] -pub struct IRQ_OUT2_SPEC; -impl crate::RegisterSpec for IRQ_OUT2_SPEC { +#[doc = "DEBUG IRQ_OUT\\[95:64\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_out2::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IrqOut2Spec; +impl crate::RegisterSpec for IrqOut2Spec { type Ux = u32; } -#[doc = "`read()` method returns [irq_out2::R](R) reader structure"] -impl crate::Readable for IRQ_OUT2_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`irq_out2::R`](R) reader structure"] +impl crate::Readable for IrqOut2Spec {} #[doc = "`reset()` method sets IRQ_OUT2 to value 0"] -impl crate::Resettable for IRQ_OUT2_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for IrqOut2Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/irq_router/irq_out3.rs b/va416xx/src/irq_router/irq_out3.rs index aa97d0a..adb5998 100644 --- a/va416xx/src/irq_router/irq_out3.rs +++ b/va416xx/src/irq_router/irq_out3.rs @@ -1,53 +1,22 @@ #[doc = "Register `IRQ_OUT3` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IRQ_OUT3` reader - IRQ_OUT\\[127:96\\]"] -pub struct IRQ_OUT3_R(crate::FieldReader); -impl IRQ_OUT3_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - IRQ_OUT3_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for IRQ_OUT3_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type IrqOut3R = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IRQ_OUT\\[127:96\\]"] #[inline(always)] - pub fn irq_out3(&self) -> IRQ_OUT3_R { - IRQ_OUT3_R::new(self.bits as u32) + pub fn irq_out3(&self) -> IrqOut3R { + IrqOut3R::new(self.bits) } } -#[doc = "DEBUG IRQ_OUT\\[127:96\\]\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [irq_out3](index.html) module"] -pub struct IRQ_OUT3_SPEC; -impl crate::RegisterSpec for IRQ_OUT3_SPEC { +#[doc = "DEBUG IRQ_OUT\\[127:96\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_out3::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IrqOut3Spec; +impl crate::RegisterSpec for IrqOut3Spec { type Ux = u32; } -#[doc = "`read()` method returns [irq_out3::R](R) reader structure"] -impl crate::Readable for IRQ_OUT3_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`irq_out3::R`](R) reader structure"] +impl crate::Readable for IrqOut3Spec {} #[doc = "`reset()` method sets IRQ_OUT3 to value 0"] -impl crate::Resettable for IRQ_OUT3_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for IrqOut3Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/irq_router/irq_out4.rs b/va416xx/src/irq_router/irq_out4.rs index ff91a3a..2fd418a 100644 --- a/va416xx/src/irq_router/irq_out4.rs +++ b/va416xx/src/irq_router/irq_out4.rs @@ -1,53 +1,22 @@ #[doc = "Register `IRQ_OUT4` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IRQ_OUT4` reader - IRQ_OUT\\[159:128\\]"] -pub struct IRQ_OUT4_R(crate::FieldReader); -impl IRQ_OUT4_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - IRQ_OUT4_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for IRQ_OUT4_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type IrqOut4R = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IRQ_OUT\\[159:128\\]"] #[inline(always)] - pub fn irq_out4(&self) -> IRQ_OUT4_R { - IRQ_OUT4_R::new(self.bits as u32) + pub fn irq_out4(&self) -> IrqOut4R { + IrqOut4R::new(self.bits) } } -#[doc = "DEBUG IRQ_OUT\\[159:128\\]\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [irq_out4](index.html) module"] -pub struct IRQ_OUT4_SPEC; -impl crate::RegisterSpec for IRQ_OUT4_SPEC { +#[doc = "DEBUG IRQ_OUT\\[159:128\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_out4::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IrqOut4Spec; +impl crate::RegisterSpec for IrqOut4Spec { type Ux = u32; } -#[doc = "`read()` method returns [irq_out4::R](R) reader structure"] -impl crate::Readable for IRQ_OUT4_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`irq_out4::R`](R) reader structure"] +impl crate::Readable for IrqOut4Spec {} #[doc = "`reset()` method sets IRQ_OUT4 to value 0"] -impl crate::Resettable for IRQ_OUT4_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for IrqOut4Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/irq_router/irq_out5.rs b/va416xx/src/irq_router/irq_out5.rs index 2af1424..efb2f8c 100644 --- a/va416xx/src/irq_router/irq_out5.rs +++ b/va416xx/src/irq_router/irq_out5.rs @@ -1,53 +1,22 @@ #[doc = "Register `IRQ_OUT5` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IRQ_OUT5` reader - IRQ_OUT\\[179:160\\]"] -pub struct IRQ_OUT5_R(crate::FieldReader); -impl IRQ_OUT5_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - IRQ_OUT5_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for IRQ_OUT5_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type IrqOut5R = crate::FieldReader; impl R { #[doc = "Bits 0:19 - IRQ_OUT\\[179:160\\]"] #[inline(always)] - pub fn irq_out5(&self) -> IRQ_OUT5_R { - IRQ_OUT5_R::new((self.bits & 0x000f_ffff) as u32) + pub fn irq_out5(&self) -> IrqOut5R { + IrqOut5R::new(self.bits & 0x000f_ffff) } } -#[doc = "DEBUG IRQ_OUT\\[179:160\\]\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [irq_out5](index.html) module"] -pub struct IRQ_OUT5_SPEC; -impl crate::RegisterSpec for IRQ_OUT5_SPEC { +#[doc = "DEBUG IRQ_OUT\\[179:160\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_out5::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IrqOut5Spec; +impl crate::RegisterSpec for IrqOut5Spec { type Ux = u32; } -#[doc = "`read()` method returns [irq_out5::R](R) reader structure"] -impl crate::Readable for IRQ_OUT5_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`irq_out5::R`](R) reader structure"] +impl crate::Readable for IrqOut5Spec {} #[doc = "`reset()` method sets IRQ_OUT5 to value 0"] -impl crate::Resettable for IRQ_OUT5_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for IrqOut5Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/irq_router/perid.rs b/va416xx/src/irq_router/perid.rs index 7c79c88..4ad66bc 100644 --- a/va416xx/src/irq_router/perid.rs +++ b/va416xx/src/irq_router/perid.rs @@ -1,31 +1,18 @@ #[doc = "Register `PERID` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 +pub type R = crate::R; +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) } } -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Peripheral ID Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [perid](index.html) module"] -pub struct PERID_SPEC; -impl crate::RegisterSpec for PERID_SPEC { +#[doc = "Peripheral ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`perid::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PeridSpec; +impl crate::RegisterSpec for PeridSpec { type Ux = u32; } -#[doc = "`read()` method returns [perid::R](R) reader structure"] -impl crate::Readable for PERID_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`perid::R`](R) reader structure"] +impl crate::Readable for PeridSpec {} #[doc = "`reset()` method sets PERID to value 0x0281_07e9"] -impl crate::Resettable for PERID_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0x0281_07e9 - } +impl crate::Resettable for PeridSpec { + const RESET_VALUE: u32 = 0x0281_07e9; } diff --git a/va416xx/src/lib.rs b/va416xx/src/lib.rs index d64c992..2ee184f 100644 --- a/va416xx/src/lib.rs +++ b/va416xx/src/lib.rs @@ -1,20 +1,5 @@ -#![doc = "Peripheral access API for VA416XX microcontrollers (generated using svd2rust v0.20.0 (b9857c5 2021-12-10))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] -svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.20.0/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] -#![deny(const_err)] -#![deny(dead_code)] -#![deny(improper_ctypes)] -#![deny(missing_docs)] -#![deny(no_mangle_generic_items)] -#![deny(non_shorthand_field_patterns)] -#![deny(overflowing_literals)] -#![deny(path_statements)] -#![deny(patterns_in_fns_without_body)] -#![deny(private_in_public)] -#![deny(unconditional_recursion)] -#![deny(unused_allocation)] -#![deny(unused_comparisons)] -#![deny(unused_parens)] -#![deny(while_true)] +#![doc = "Peripheral access API for VA416XX microcontrollers (generated using svd2rust v0.33.3 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] +svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.33.3/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] #![allow(non_camel_case_types)] #![allow(non_snake_case)] #![no_std] @@ -22,12 +7,6 @@ use core::marker::PhantomData; use core::ops::Deref; #[doc = r"Number available in the NVIC for configuring priority"] pub const NVIC_PRIO_BITS: u8 = 4; -#[cfg(feature = "rt")] -pub use self::Interrupt as interrupt; -pub use cortex_m::peripheral::Peripherals as CorePeripherals; -pub use cortex_m::peripheral::{CBP, CPUID, DCB, DWT, FPB, FPU, ITM, MPU, NVIC, SCB, SYST, TPIU}; -#[cfg(feature = "rt")] -pub use cortex_m_rt::interrupt; #[allow(unused_imports)] use generic::*; #[doc = r"Common register and bit access and modify traits"] @@ -70,16 +49,16 @@ extern "C" { fn I2C1_SL(); fn I2C2_MS(); fn I2C2_SL(); - fn ETHERNET(); + fn Ethernet(); fn U37(); - fn SPW(); + fn SpW(); fn U39(); fn DAC0(); fn DAC1(); fn TRNG(); fn DMA_ERROR(); fn ADC(); - fn LOCLK(); + fn LoCLK(); fn LVD(); fn WATCHDOG(); fn TIM0(); @@ -232,6 +211,7 @@ extern "C" { fn TXEV(); } #[doc(hidden)] +#[repr(C)] pub union Vector { _handler: unsafe extern "C" fn(), _reserved: u32, @@ -277,9 +257,9 @@ pub static __INTERRUPTS: [Vector; 196] = [ Vector { _handler: I2C1_SL }, Vector { _handler: I2C2_MS }, Vector { _handler: I2C2_SL }, - Vector { _handler: ETHERNET }, + Vector { _handler: Ethernet }, Vector { _handler: U37 }, - Vector { _handler: SPW }, + Vector { _handler: SpW }, Vector { _handler: U39 }, Vector { _handler: DAC0 }, Vector { _handler: DAC1 }, @@ -288,7 +268,7 @@ pub static __INTERRUPTS: [Vector; 196] = [ _handler: DMA_ERROR, }, Vector { _handler: ADC }, - Vector { _handler: LOCLK }, + Vector { _handler: LoCLK }, Vector { _handler: LVD }, Vector { _handler: WATCHDOG }, Vector { _handler: TIM0 }, @@ -557,11 +537,11 @@ pub enum Interrupt { #[doc = "35 - I2C2_SL"] I2C2_SL = 35, #[doc = "36 - Ethernet"] - ETHERNET = 36, + Ethernet = 36, #[doc = "37 - U37"] U37 = 37, #[doc = "38 - SpW"] - SPW = 38, + SpW = 38, #[doc = "39 - U39"] U39 = 39, #[doc = "40 - DAC0"] @@ -575,7 +555,7 @@ pub enum Interrupt { #[doc = "44 - ADC"] ADC = 44, #[doc = "45 - LoCLK"] - LOCLK = 45, + LoCLK = 45, #[doc = "46 - LVD"] LVD = 46, #[doc = "47 - WATCHDOG"] @@ -884,11 +864,11 @@ unsafe impl cortex_m::interrupt::InterruptNumber for Interrupt { } } #[doc = "Clock Generation Peripheral"] -pub struct CLKGEN { +pub struct Clkgen { _marker: PhantomData<*const ()>, } -unsafe impl Send for CLKGEN {} -impl CLKGEN { +unsafe impl Send for Clkgen {} +impl Clkgen { #[doc = r"Pointer to the register block"] pub const PTR: *const clkgen::RegisterBlock = 0x4000_6000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -896,27 +876,45 @@ impl CLKGEN { pub const fn ptr() -> *const clkgen::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for CLKGEN { +impl Deref for Clkgen { type Target = clkgen::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CLKGEN { +impl core::fmt::Debug for Clkgen { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CLKGEN").finish() + f.debug_struct("Clkgen").finish() } } #[doc = "Clock Generation Peripheral"] pub mod clkgen; #[doc = "System Configuration Peripheral"] -pub struct SYSCONFIG { +pub struct Sysconfig { _marker: PhantomData<*const ()>, } -unsafe impl Send for SYSCONFIG {} -impl SYSCONFIG { +unsafe impl Send for Sysconfig {} +impl Sysconfig { #[doc = r"Pointer to the register block"] pub const PTR: *const sysconfig::RegisterBlock = 0x4001_0000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -924,27 +922,45 @@ impl SYSCONFIG { pub const fn ptr() -> *const sysconfig::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for SYSCONFIG { +impl Deref for Sysconfig { type Target = sysconfig::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for SYSCONFIG { +impl core::fmt::Debug for Sysconfig { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("SYSCONFIG").finish() + f.debug_struct("Sysconfig").finish() } } #[doc = "System Configuration Peripheral"] pub mod sysconfig; #[doc = "DMA Controller Block"] -pub struct DMA { +pub struct Dma { _marker: PhantomData<*const ()>, } -unsafe impl Send for DMA {} -impl DMA { +unsafe impl Send for Dma {} +impl Dma { #[doc = r"Pointer to the register block"] pub const PTR: *const dma::RegisterBlock = 0x4000_1000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -952,27 +968,45 @@ impl DMA { pub const fn ptr() -> *const dma::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for DMA { +impl Deref for Dma { type Target = dma::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for DMA { +impl core::fmt::Debug for Dma { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("DMA").finish() + f.debug_struct("Dma").finish() } } #[doc = "DMA Controller Block"] pub mod dma; #[doc = "IO Pin Configuration Peripheral"] -pub struct IOCONFIG { +pub struct Ioconfig { _marker: PhantomData<*const ()>, } -unsafe impl Send for IOCONFIG {} -impl IOCONFIG { +unsafe impl Send for Ioconfig {} +impl Ioconfig { #[doc = r"Pointer to the register block"] pub const PTR: *const ioconfig::RegisterBlock = 0x4001_1000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -980,27 +1014,45 @@ impl IOCONFIG { pub const fn ptr() -> *const ioconfig::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for IOCONFIG { +impl Deref for Ioconfig { type Target = ioconfig::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for IOCONFIG { +impl core::fmt::Debug for Ioconfig { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("IOCONFIG").finish() + f.debug_struct("Ioconfig").finish() } } #[doc = "IO Pin Configuration Peripheral"] pub mod ioconfig; #[doc = "Utility Peripheral"] -pub struct UTILITY { +pub struct Utility { _marker: PhantomData<*const ()>, } -unsafe impl Send for UTILITY {} -impl UTILITY { +unsafe impl Send for Utility {} +impl Utility { #[doc = r"Pointer to the register block"] pub const PTR: *const utility::RegisterBlock = 0x4002_0000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1008,27 +1060,45 @@ impl UTILITY { pub const fn ptr() -> *const utility::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for UTILITY { +impl Deref for Utility { type Target = utility::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for UTILITY { +impl core::fmt::Debug for Utility { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("UTILITY").finish() + f.debug_struct("Utility").finish() } } #[doc = "Utility Peripheral"] pub mod utility; #[doc = "GPIO Peripheral"] -pub struct PORTA { +pub struct Porta { _marker: PhantomData<*const ()>, } -unsafe impl Send for PORTA {} -impl PORTA { +unsafe impl Send for Porta {} +impl Porta { #[doc = r"Pointer to the register block"] pub const PTR: *const porta::RegisterBlock = 0x4001_2000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1036,27 +1106,45 @@ impl PORTA { pub const fn ptr() -> *const porta::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for PORTA { +impl Deref for Porta { type Target = porta::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for PORTA { +impl core::fmt::Debug for Porta { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("PORTA").finish() + f.debug_struct("Porta").finish() } } #[doc = "GPIO Peripheral"] pub mod porta; #[doc = "GPIO Peripheral"] -pub struct PORTB { +pub struct Portb { _marker: PhantomData<*const ()>, } -unsafe impl Send for PORTB {} -impl PORTB { +unsafe impl Send for Portb {} +impl Portb { #[doc = r"Pointer to the register block"] pub const PTR: *const porta::RegisterBlock = 0x4001_2400 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1064,27 +1152,45 @@ impl PORTB { pub const fn ptr() -> *const porta::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for PORTB { +impl Deref for Portb { type Target = porta::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for PORTB { +impl core::fmt::Debug for Portb { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("PORTB").finish() + f.debug_struct("Portb").finish() } } #[doc = "GPIO Peripheral"] -pub use porta as portb; +pub use self::porta as portb; #[doc = "GPIO Peripheral"] -pub struct PORTC { +pub struct Portc { _marker: PhantomData<*const ()>, } -unsafe impl Send for PORTC {} -impl PORTC { +unsafe impl Send for Portc {} +impl Portc { #[doc = r"Pointer to the register block"] pub const PTR: *const porta::RegisterBlock = 0x4001_2800 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1092,27 +1198,45 @@ impl PORTC { pub const fn ptr() -> *const porta::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for PORTC { +impl Deref for Portc { type Target = porta::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for PORTC { +impl core::fmt::Debug for Portc { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("PORTC").finish() + f.debug_struct("Portc").finish() } } #[doc = "GPIO Peripheral"] -pub use porta as portc; +pub use self::porta as portc; #[doc = "GPIO Peripheral"] -pub struct PORTD { +pub struct Portd { _marker: PhantomData<*const ()>, } -unsafe impl Send for PORTD {} -impl PORTD { +unsafe impl Send for Portd {} +impl Portd { #[doc = r"Pointer to the register block"] pub const PTR: *const porta::RegisterBlock = 0x4001_2c00 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1120,27 +1244,45 @@ impl PORTD { pub const fn ptr() -> *const porta::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for PORTD { +impl Deref for Portd { type Target = porta::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for PORTD { +impl core::fmt::Debug for Portd { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("PORTD").finish() + f.debug_struct("Portd").finish() } } #[doc = "GPIO Peripheral"] -pub use porta as portd; +pub use self::porta as portd; #[doc = "GPIO Peripheral"] -pub struct PORTE { +pub struct Porte { _marker: PhantomData<*const ()>, } -unsafe impl Send for PORTE {} -impl PORTE { +unsafe impl Send for Porte {} +impl Porte { #[doc = r"Pointer to the register block"] pub const PTR: *const porta::RegisterBlock = 0x4001_3000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1148,27 +1290,45 @@ impl PORTE { pub const fn ptr() -> *const porta::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for PORTE { +impl Deref for Porte { type Target = porta::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for PORTE { +impl core::fmt::Debug for Porte { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("PORTE").finish() + f.debug_struct("Porte").finish() } } #[doc = "GPIO Peripheral"] -pub use porta as porte; +pub use self::porta as porte; #[doc = "GPIO Peripheral"] -pub struct PORTF { +pub struct Portf { _marker: PhantomData<*const ()>, } -unsafe impl Send for PORTF {} -impl PORTF { +unsafe impl Send for Portf {} +impl Portf { #[doc = r"Pointer to the register block"] pub const PTR: *const porta::RegisterBlock = 0x4001_3400 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1176,27 +1336,45 @@ impl PORTF { pub const fn ptr() -> *const porta::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for PORTF { +impl Deref for Portf { type Target = porta::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for PORTF { +impl core::fmt::Debug for Portf { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("PORTF").finish() + f.debug_struct("Portf").finish() } } #[doc = "GPIO Peripheral"] -pub use porta as portf; +pub use self::porta as portf; #[doc = "GPIO Peripheral"] -pub struct PORTG { +pub struct Portg { _marker: PhantomData<*const ()>, } -unsafe impl Send for PORTG {} -impl PORTG { +unsafe impl Send for Portg {} +impl Portg { #[doc = r"Pointer to the register block"] pub const PTR: *const porta::RegisterBlock = 0x4001_3800 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1204,27 +1382,45 @@ impl PORTG { pub const fn ptr() -> *const porta::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for PORTG { +impl Deref for Portg { type Target = porta::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for PORTG { +impl core::fmt::Debug for Portg { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("PORTG").finish() + f.debug_struct("Portg").finish() } } #[doc = "GPIO Peripheral"] -pub use porta as portg; +pub use self::porta as portg; #[doc = "Timer/Counter Peripheral"] -pub struct TIM0 { +pub struct Tim0 { _marker: PhantomData<*const ()>, } -unsafe impl Send for TIM0 {} -impl TIM0 { +unsafe impl Send for Tim0 {} +impl Tim0 { #[doc = r"Pointer to the register block"] pub const PTR: *const tim0::RegisterBlock = 0x4001_8000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1232,27 +1428,45 @@ impl TIM0 { pub const fn ptr() -> *const tim0::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for TIM0 { +impl Deref for Tim0 { type Target = tim0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for TIM0 { +impl core::fmt::Debug for Tim0 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("TIM0").finish() + f.debug_struct("Tim0").finish() } } #[doc = "Timer/Counter Peripheral"] pub mod tim0; #[doc = "Timer/Counter Peripheral"] -pub struct TIM1 { +pub struct Tim1 { _marker: PhantomData<*const ()>, } -unsafe impl Send for TIM1 {} -impl TIM1 { +unsafe impl Send for Tim1 {} +impl Tim1 { #[doc = r"Pointer to the register block"] pub const PTR: *const tim0::RegisterBlock = 0x4001_8400 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1260,27 +1474,45 @@ impl TIM1 { pub const fn ptr() -> *const tim0::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for TIM1 { +impl Deref for Tim1 { type Target = tim0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for TIM1 { +impl core::fmt::Debug for Tim1 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("TIM1").finish() + f.debug_struct("Tim1").finish() } } #[doc = "Timer/Counter Peripheral"] -pub use tim0 as tim1; +pub use self::tim0 as tim1; #[doc = "Timer/Counter Peripheral"] -pub struct TIM2 { +pub struct Tim2 { _marker: PhantomData<*const ()>, } -unsafe impl Send for TIM2 {} -impl TIM2 { +unsafe impl Send for Tim2 {} +impl Tim2 { #[doc = r"Pointer to the register block"] pub const PTR: *const tim0::RegisterBlock = 0x4001_8800 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1288,27 +1520,45 @@ impl TIM2 { pub const fn ptr() -> *const tim0::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for TIM2 { +impl Deref for Tim2 { type Target = tim0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for TIM2 { +impl core::fmt::Debug for Tim2 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("TIM2").finish() + f.debug_struct("Tim2").finish() } } #[doc = "Timer/Counter Peripheral"] -pub use tim0 as tim2; +pub use self::tim0 as tim2; #[doc = "Timer/Counter Peripheral"] -pub struct TIM3 { +pub struct Tim3 { _marker: PhantomData<*const ()>, } -unsafe impl Send for TIM3 {} -impl TIM3 { +unsafe impl Send for Tim3 {} +impl Tim3 { #[doc = r"Pointer to the register block"] pub const PTR: *const tim0::RegisterBlock = 0x4001_8c00 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1316,27 +1566,45 @@ impl TIM3 { pub const fn ptr() -> *const tim0::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for TIM3 { +impl Deref for Tim3 { type Target = tim0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for TIM3 { +impl core::fmt::Debug for Tim3 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("TIM3").finish() + f.debug_struct("Tim3").finish() } } #[doc = "Timer/Counter Peripheral"] -pub use tim0 as tim3; +pub use self::tim0 as tim3; #[doc = "Timer/Counter Peripheral"] -pub struct TIM4 { +pub struct Tim4 { _marker: PhantomData<*const ()>, } -unsafe impl Send for TIM4 {} -impl TIM4 { +unsafe impl Send for Tim4 {} +impl Tim4 { #[doc = r"Pointer to the register block"] pub const PTR: *const tim0::RegisterBlock = 0x4001_9000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1344,27 +1612,45 @@ impl TIM4 { pub const fn ptr() -> *const tim0::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for TIM4 { +impl Deref for Tim4 { type Target = tim0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for TIM4 { +impl core::fmt::Debug for Tim4 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("TIM4").finish() + f.debug_struct("Tim4").finish() } } #[doc = "Timer/Counter Peripheral"] -pub use tim0 as tim4; +pub use self::tim0 as tim4; #[doc = "Timer/Counter Peripheral"] -pub struct TIM5 { +pub struct Tim5 { _marker: PhantomData<*const ()>, } -unsafe impl Send for TIM5 {} -impl TIM5 { +unsafe impl Send for Tim5 {} +impl Tim5 { #[doc = r"Pointer to the register block"] pub const PTR: *const tim0::RegisterBlock = 0x4001_9400 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1372,27 +1658,45 @@ impl TIM5 { pub const fn ptr() -> *const tim0::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for TIM5 { +impl Deref for Tim5 { type Target = tim0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for TIM5 { +impl core::fmt::Debug for Tim5 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("TIM5").finish() + f.debug_struct("Tim5").finish() } } #[doc = "Timer/Counter Peripheral"] -pub use tim0 as tim5; +pub use self::tim0 as tim5; #[doc = "Timer/Counter Peripheral"] -pub struct TIM6 { +pub struct Tim6 { _marker: PhantomData<*const ()>, } -unsafe impl Send for TIM6 {} -impl TIM6 { +unsafe impl Send for Tim6 {} +impl Tim6 { #[doc = r"Pointer to the register block"] pub const PTR: *const tim0::RegisterBlock = 0x4001_9800 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1400,27 +1704,45 @@ impl TIM6 { pub const fn ptr() -> *const tim0::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for TIM6 { +impl Deref for Tim6 { type Target = tim0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for TIM6 { +impl core::fmt::Debug for Tim6 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("TIM6").finish() + f.debug_struct("Tim6").finish() } } #[doc = "Timer/Counter Peripheral"] -pub use tim0 as tim6; +pub use self::tim0 as tim6; #[doc = "Timer/Counter Peripheral"] -pub struct TIM7 { +pub struct Tim7 { _marker: PhantomData<*const ()>, } -unsafe impl Send for TIM7 {} -impl TIM7 { +unsafe impl Send for Tim7 {} +impl Tim7 { #[doc = r"Pointer to the register block"] pub const PTR: *const tim0::RegisterBlock = 0x4001_9c00 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1428,27 +1750,45 @@ impl TIM7 { pub const fn ptr() -> *const tim0::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for TIM7 { +impl Deref for Tim7 { type Target = tim0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for TIM7 { +impl core::fmt::Debug for Tim7 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("TIM7").finish() + f.debug_struct("Tim7").finish() } } #[doc = "Timer/Counter Peripheral"] -pub use tim0 as tim7; +pub use self::tim0 as tim7; #[doc = "Timer/Counter Peripheral"] -pub struct TIM8 { +pub struct Tim8 { _marker: PhantomData<*const ()>, } -unsafe impl Send for TIM8 {} -impl TIM8 { +unsafe impl Send for Tim8 {} +impl Tim8 { #[doc = r"Pointer to the register block"] pub const PTR: *const tim0::RegisterBlock = 0x4001_a000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1456,27 +1796,45 @@ impl TIM8 { pub const fn ptr() -> *const tim0::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for TIM8 { +impl Deref for Tim8 { type Target = tim0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for TIM8 { +impl core::fmt::Debug for Tim8 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("TIM8").finish() + f.debug_struct("Tim8").finish() } } #[doc = "Timer/Counter Peripheral"] -pub use tim0 as tim8; +pub use self::tim0 as tim8; #[doc = "Timer/Counter Peripheral"] -pub struct TIM9 { +pub struct Tim9 { _marker: PhantomData<*const ()>, } -unsafe impl Send for TIM9 {} -impl TIM9 { +unsafe impl Send for Tim9 {} +impl Tim9 { #[doc = r"Pointer to the register block"] pub const PTR: *const tim0::RegisterBlock = 0x4001_a400 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1484,27 +1842,45 @@ impl TIM9 { pub const fn ptr() -> *const tim0::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for TIM9 { +impl Deref for Tim9 { type Target = tim0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for TIM9 { +impl core::fmt::Debug for Tim9 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("TIM9").finish() + f.debug_struct("Tim9").finish() } } #[doc = "Timer/Counter Peripheral"] -pub use tim0 as tim9; +pub use self::tim0 as tim9; #[doc = "Timer/Counter Peripheral"] -pub struct TIM10 { +pub struct Tim10 { _marker: PhantomData<*const ()>, } -unsafe impl Send for TIM10 {} -impl TIM10 { +unsafe impl Send for Tim10 {} +impl Tim10 { #[doc = r"Pointer to the register block"] pub const PTR: *const tim0::RegisterBlock = 0x4001_a800 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1512,27 +1888,45 @@ impl TIM10 { pub const fn ptr() -> *const tim0::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for TIM10 { +impl Deref for Tim10 { type Target = tim0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for TIM10 { +impl core::fmt::Debug for Tim10 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("TIM10").finish() + f.debug_struct("Tim10").finish() } } #[doc = "Timer/Counter Peripheral"] -pub use tim0 as tim10; +pub use self::tim0 as tim10; #[doc = "Timer/Counter Peripheral"] -pub struct TIM11 { +pub struct Tim11 { _marker: PhantomData<*const ()>, } -unsafe impl Send for TIM11 {} -impl TIM11 { +unsafe impl Send for Tim11 {} +impl Tim11 { #[doc = r"Pointer to the register block"] pub const PTR: *const tim0::RegisterBlock = 0x4001_ac00 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1540,27 +1934,45 @@ impl TIM11 { pub const fn ptr() -> *const tim0::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for TIM11 { +impl Deref for Tim11 { type Target = tim0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for TIM11 { +impl core::fmt::Debug for Tim11 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("TIM11").finish() + f.debug_struct("Tim11").finish() } } #[doc = "Timer/Counter Peripheral"] -pub use tim0 as tim11; +pub use self::tim0 as tim11; #[doc = "Timer/Counter Peripheral"] -pub struct TIM12 { +pub struct Tim12 { _marker: PhantomData<*const ()>, } -unsafe impl Send for TIM12 {} -impl TIM12 { +unsafe impl Send for Tim12 {} +impl Tim12 { #[doc = r"Pointer to the register block"] pub const PTR: *const tim0::RegisterBlock = 0x4001_b000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1568,27 +1980,45 @@ impl TIM12 { pub const fn ptr() -> *const tim0::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for TIM12 { +impl Deref for Tim12 { type Target = tim0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for TIM12 { +impl core::fmt::Debug for Tim12 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("TIM12").finish() + f.debug_struct("Tim12").finish() } } #[doc = "Timer/Counter Peripheral"] -pub use tim0 as tim12; +pub use self::tim0 as tim12; #[doc = "Timer/Counter Peripheral"] -pub struct TIM13 { +pub struct Tim13 { _marker: PhantomData<*const ()>, } -unsafe impl Send for TIM13 {} -impl TIM13 { +unsafe impl Send for Tim13 {} +impl Tim13 { #[doc = r"Pointer to the register block"] pub const PTR: *const tim0::RegisterBlock = 0x4001_b400 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1596,27 +2026,45 @@ impl TIM13 { pub const fn ptr() -> *const tim0::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for TIM13 { +impl Deref for Tim13 { type Target = tim0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for TIM13 { +impl core::fmt::Debug for Tim13 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("TIM13").finish() + f.debug_struct("Tim13").finish() } } #[doc = "Timer/Counter Peripheral"] -pub use tim0 as tim13; +pub use self::tim0 as tim13; #[doc = "Timer/Counter Peripheral"] -pub struct TIM14 { +pub struct Tim14 { _marker: PhantomData<*const ()>, } -unsafe impl Send for TIM14 {} -impl TIM14 { +unsafe impl Send for Tim14 {} +impl Tim14 { #[doc = r"Pointer to the register block"] pub const PTR: *const tim0::RegisterBlock = 0x4001_b800 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1624,27 +2072,45 @@ impl TIM14 { pub const fn ptr() -> *const tim0::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for TIM14 { +impl Deref for Tim14 { type Target = tim0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for TIM14 { +impl core::fmt::Debug for Tim14 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("TIM14").finish() + f.debug_struct("Tim14").finish() } } #[doc = "Timer/Counter Peripheral"] -pub use tim0 as tim14; +pub use self::tim0 as tim14; #[doc = "Timer/Counter Peripheral"] -pub struct TIM15 { +pub struct Tim15 { _marker: PhantomData<*const ()>, } -unsafe impl Send for TIM15 {} -impl TIM15 { +unsafe impl Send for Tim15 {} +impl Tim15 { #[doc = r"Pointer to the register block"] pub const PTR: *const tim0::RegisterBlock = 0x4001_bc00 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1652,27 +2118,45 @@ impl TIM15 { pub const fn ptr() -> *const tim0::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for TIM15 { +impl Deref for Tim15 { type Target = tim0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for TIM15 { +impl core::fmt::Debug for Tim15 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("TIM15").finish() + f.debug_struct("Tim15").finish() } } #[doc = "Timer/Counter Peripheral"] -pub use tim0 as tim15; +pub use self::tim0 as tim15; #[doc = "Timer/Counter Peripheral"] -pub struct TIM16 { +pub struct Tim16 { _marker: PhantomData<*const ()>, } -unsafe impl Send for TIM16 {} -impl TIM16 { +unsafe impl Send for Tim16 {} +impl Tim16 { #[doc = r"Pointer to the register block"] pub const PTR: *const tim0::RegisterBlock = 0x4002_8000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1680,27 +2164,45 @@ impl TIM16 { pub const fn ptr() -> *const tim0::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for TIM16 { +impl Deref for Tim16 { type Target = tim0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for TIM16 { +impl core::fmt::Debug for Tim16 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("TIM16").finish() + f.debug_struct("Tim16").finish() } } #[doc = "Timer/Counter Peripheral"] -pub use tim0 as tim16; +pub use self::tim0 as tim16; #[doc = "Timer/Counter Peripheral"] -pub struct TIM17 { +pub struct Tim17 { _marker: PhantomData<*const ()>, } -unsafe impl Send for TIM17 {} -impl TIM17 { +unsafe impl Send for Tim17 {} +impl Tim17 { #[doc = r"Pointer to the register block"] pub const PTR: *const tim0::RegisterBlock = 0x4002_8400 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1708,27 +2210,45 @@ impl TIM17 { pub const fn ptr() -> *const tim0::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for TIM17 { +impl Deref for Tim17 { type Target = tim0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for TIM17 { +impl core::fmt::Debug for Tim17 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("TIM17").finish() + f.debug_struct("Tim17").finish() } } #[doc = "Timer/Counter Peripheral"] -pub use tim0 as tim17; +pub use self::tim0 as tim17; #[doc = "Timer/Counter Peripheral"] -pub struct TIM18 { +pub struct Tim18 { _marker: PhantomData<*const ()>, } -unsafe impl Send for TIM18 {} -impl TIM18 { +unsafe impl Send for Tim18 {} +impl Tim18 { #[doc = r"Pointer to the register block"] pub const PTR: *const tim0::RegisterBlock = 0x4002_8800 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1736,27 +2256,45 @@ impl TIM18 { pub const fn ptr() -> *const tim0::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for TIM18 { +impl Deref for Tim18 { type Target = tim0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for TIM18 { +impl core::fmt::Debug for Tim18 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("TIM18").finish() + f.debug_struct("Tim18").finish() } } #[doc = "Timer/Counter Peripheral"] -pub use tim0 as tim18; +pub use self::tim0 as tim18; #[doc = "Timer/Counter Peripheral"] -pub struct TIM19 { +pub struct Tim19 { _marker: PhantomData<*const ()>, } -unsafe impl Send for TIM19 {} -impl TIM19 { +unsafe impl Send for Tim19 {} +impl Tim19 { #[doc = r"Pointer to the register block"] pub const PTR: *const tim0::RegisterBlock = 0x4002_8c00 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1764,27 +2302,45 @@ impl TIM19 { pub const fn ptr() -> *const tim0::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for TIM19 { +impl Deref for Tim19 { type Target = tim0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for TIM19 { +impl core::fmt::Debug for Tim19 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("TIM19").finish() + f.debug_struct("Tim19").finish() } } #[doc = "Timer/Counter Peripheral"] -pub use tim0 as tim19; +pub use self::tim0 as tim19; #[doc = "Timer/Counter Peripheral"] -pub struct TIM20 { +pub struct Tim20 { _marker: PhantomData<*const ()>, } -unsafe impl Send for TIM20 {} -impl TIM20 { +unsafe impl Send for Tim20 {} +impl Tim20 { #[doc = r"Pointer to the register block"] pub const PTR: *const tim0::RegisterBlock = 0x4002_9000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1792,27 +2348,45 @@ impl TIM20 { pub const fn ptr() -> *const tim0::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for TIM20 { +impl Deref for Tim20 { type Target = tim0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for TIM20 { +impl core::fmt::Debug for Tim20 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("TIM20").finish() + f.debug_struct("Tim20").finish() } } #[doc = "Timer/Counter Peripheral"] -pub use tim0 as tim20; +pub use self::tim0 as tim20; #[doc = "Timer/Counter Peripheral"] -pub struct TIM21 { +pub struct Tim21 { _marker: PhantomData<*const ()>, } -unsafe impl Send for TIM21 {} -impl TIM21 { +unsafe impl Send for Tim21 {} +impl Tim21 { #[doc = r"Pointer to the register block"] pub const PTR: *const tim0::RegisterBlock = 0x4002_9400 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1820,27 +2394,45 @@ impl TIM21 { pub const fn ptr() -> *const tim0::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for TIM21 { +impl Deref for Tim21 { type Target = tim0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for TIM21 { +impl core::fmt::Debug for Tim21 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("TIM21").finish() + f.debug_struct("Tim21").finish() } } #[doc = "Timer/Counter Peripheral"] -pub use tim0 as tim21; +pub use self::tim0 as tim21; #[doc = "Timer/Counter Peripheral"] -pub struct TIM22 { +pub struct Tim22 { _marker: PhantomData<*const ()>, } -unsafe impl Send for TIM22 {} -impl TIM22 { +unsafe impl Send for Tim22 {} +impl Tim22 { #[doc = r"Pointer to the register block"] pub const PTR: *const tim0::RegisterBlock = 0x4002_9800 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1848,27 +2440,45 @@ impl TIM22 { pub const fn ptr() -> *const tim0::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for TIM22 { +impl Deref for Tim22 { type Target = tim0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for TIM22 { +impl core::fmt::Debug for Tim22 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("TIM22").finish() + f.debug_struct("Tim22").finish() } } #[doc = "Timer/Counter Peripheral"] -pub use tim0 as tim22; +pub use self::tim0 as tim22; #[doc = "Timer/Counter Peripheral"] -pub struct TIM23 { +pub struct Tim23 { _marker: PhantomData<*const ()>, } -unsafe impl Send for TIM23 {} -impl TIM23 { +unsafe impl Send for Tim23 {} +impl Tim23 { #[doc = r"Pointer to the register block"] pub const PTR: *const tim0::RegisterBlock = 0x4002_9c00 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1876,27 +2486,45 @@ impl TIM23 { pub const fn ptr() -> *const tim0::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for TIM23 { +impl Deref for Tim23 { type Target = tim0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for TIM23 { +impl core::fmt::Debug for Tim23 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("TIM23").finish() + f.debug_struct("Tim23").finish() } } #[doc = "Timer/Counter Peripheral"] -pub use tim0 as tim23; +pub use self::tim0 as tim23; #[doc = "UART Peripheral"] -pub struct UART0 { +pub struct Uart0 { _marker: PhantomData<*const ()>, } -unsafe impl Send for UART0 {} -impl UART0 { +unsafe impl Send for Uart0 {} +impl Uart0 { #[doc = r"Pointer to the register block"] pub const PTR: *const uart0::RegisterBlock = 0x4002_4000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1904,27 +2532,45 @@ impl UART0 { pub const fn ptr() -> *const uart0::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for UART0 { +impl Deref for Uart0 { type Target = uart0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for UART0 { +impl core::fmt::Debug for Uart0 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("UART0").finish() + f.debug_struct("Uart0").finish() } } #[doc = "UART Peripheral"] pub mod uart0; #[doc = "UART Peripheral"] -pub struct UART1 { +pub struct Uart1 { _marker: PhantomData<*const ()>, } -unsafe impl Send for UART1 {} -impl UART1 { +unsafe impl Send for Uart1 {} +impl Uart1 { #[doc = r"Pointer to the register block"] pub const PTR: *const uart0::RegisterBlock = 0x4002_5000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1932,27 +2578,45 @@ impl UART1 { pub const fn ptr() -> *const uart0::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for UART1 { +impl Deref for Uart1 { type Target = uart0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for UART1 { +impl core::fmt::Debug for Uart1 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("UART1").finish() + f.debug_struct("Uart1").finish() } } #[doc = "UART Peripheral"] -pub use uart0 as uart1; +pub use self::uart0 as uart1; #[doc = "UART Peripheral"] -pub struct UART2 { +pub struct Uart2 { _marker: PhantomData<*const ()>, } -unsafe impl Send for UART2 {} -impl UART2 { +unsafe impl Send for Uart2 {} +impl Uart2 { #[doc = r"Pointer to the register block"] pub const PTR: *const uart0::RegisterBlock = 0x4001_7000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1960,27 +2624,45 @@ impl UART2 { pub const fn ptr() -> *const uart0::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for UART2 { +impl Deref for Uart2 { type Target = uart0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for UART2 { +impl core::fmt::Debug for Uart2 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("UART2").finish() + f.debug_struct("Uart2").finish() } } #[doc = "UART Peripheral"] -pub use uart0 as uart2; +pub use self::uart0 as uart2; #[doc = "SPI Peripheral"] -pub struct SPI0 { +pub struct Spi0 { _marker: PhantomData<*const ()>, } -unsafe impl Send for SPI0 {} -impl SPI0 { +unsafe impl Send for Spi0 {} +impl Spi0 { #[doc = r"Pointer to the register block"] pub const PTR: *const spi0::RegisterBlock = 0x4001_5000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1988,27 +2670,45 @@ impl SPI0 { pub const fn ptr() -> *const spi0::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for SPI0 { +impl Deref for Spi0 { type Target = spi0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for SPI0 { +impl core::fmt::Debug for Spi0 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("SPI0").finish() + f.debug_struct("Spi0").finish() } } #[doc = "SPI Peripheral"] pub mod spi0; #[doc = "SPI Peripheral"] -pub struct SPI1 { +pub struct Spi1 { _marker: PhantomData<*const ()>, } -unsafe impl Send for SPI1 {} -impl SPI1 { +unsafe impl Send for Spi1 {} +impl Spi1 { #[doc = r"Pointer to the register block"] pub const PTR: *const spi0::RegisterBlock = 0x4001_5400 as *const _; #[doc = r"Return the pointer to the register block"] @@ -2016,27 +2716,45 @@ impl SPI1 { pub const fn ptr() -> *const spi0::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for SPI1 { +impl Deref for Spi1 { type Target = spi0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for SPI1 { +impl core::fmt::Debug for Spi1 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("SPI1").finish() + f.debug_struct("Spi1").finish() } } #[doc = "SPI Peripheral"] -pub use spi0 as spi1; +pub use self::spi0 as spi1; #[doc = "SPI Peripheral"] -pub struct SPI2 { +pub struct Spi2 { _marker: PhantomData<*const ()>, } -unsafe impl Send for SPI2 {} -impl SPI2 { +unsafe impl Send for Spi2 {} +impl Spi2 { #[doc = r"Pointer to the register block"] pub const PTR: *const spi0::RegisterBlock = 0x4001_5800 as *const _; #[doc = r"Return the pointer to the register block"] @@ -2044,27 +2762,45 @@ impl SPI2 { pub const fn ptr() -> *const spi0::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for SPI2 { +impl Deref for Spi2 { type Target = spi0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for SPI2 { +impl core::fmt::Debug for Spi2 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("SPI2").finish() + f.debug_struct("Spi2").finish() } } #[doc = "SPI Peripheral"] -pub use spi0 as spi2; +pub use self::spi0 as spi2; #[doc = "SPI Peripheral"] -pub struct SPI3 { +pub struct Spi3 { _marker: PhantomData<*const ()>, } -unsafe impl Send for SPI3 {} -impl SPI3 { +unsafe impl Send for Spi3 {} +impl Spi3 { #[doc = r"Pointer to the register block"] pub const PTR: *const spi0::RegisterBlock = 0x4001_5c00 as *const _; #[doc = r"Return the pointer to the register block"] @@ -2072,27 +2808,45 @@ impl SPI3 { pub const fn ptr() -> *const spi0::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for SPI3 { +impl Deref for Spi3 { type Target = spi0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for SPI3 { +impl core::fmt::Debug for Spi3 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("SPI3").finish() + f.debug_struct("Spi3").finish() } } #[doc = "SPI Peripheral"] -pub use spi0 as spi3; +pub use self::spi0 as spi3; #[doc = "I2C Peripheral"] -pub struct I2C0 { +pub struct I2c0 { _marker: PhantomData<*const ()>, } -unsafe impl Send for I2C0 {} -impl I2C0 { +unsafe impl Send for I2c0 {} +impl I2c0 { #[doc = r"Pointer to the register block"] pub const PTR: *const i2c0::RegisterBlock = 0x4001_6000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -2100,27 +2854,45 @@ impl I2C0 { pub const fn ptr() -> *const i2c0::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for I2C0 { +impl Deref for I2c0 { type Target = i2c0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for I2C0 { +impl core::fmt::Debug for I2c0 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("I2C0").finish() + f.debug_struct("I2c0").finish() } } #[doc = "I2C Peripheral"] pub mod i2c0; #[doc = "I2C Peripheral"] -pub struct I2C1 { +pub struct I2c1 { _marker: PhantomData<*const ()>, } -unsafe impl Send for I2C1 {} -impl I2C1 { +unsafe impl Send for I2c1 {} +impl I2c1 { #[doc = r"Pointer to the register block"] pub const PTR: *const i2c0::RegisterBlock = 0x4001_6400 as *const _; #[doc = r"Return the pointer to the register block"] @@ -2128,27 +2900,45 @@ impl I2C1 { pub const fn ptr() -> *const i2c0::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for I2C1 { +impl Deref for I2c1 { type Target = i2c0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for I2C1 { +impl core::fmt::Debug for I2c1 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("I2C1").finish() + f.debug_struct("I2c1").finish() } } #[doc = "I2C Peripheral"] -pub use i2c0 as i2c1; +pub use self::i2c0 as i2c1; #[doc = "I2C Peripheral"] -pub struct I2C2 { +pub struct I2c2 { _marker: PhantomData<*const ()>, } -unsafe impl Send for I2C2 {} -impl I2C2 { +unsafe impl Send for I2c2 {} +impl I2c2 { #[doc = r"Pointer to the register block"] pub const PTR: *const i2c0::RegisterBlock = 0x4001_6800 as *const _; #[doc = r"Return the pointer to the register block"] @@ -2156,27 +2946,45 @@ impl I2C2 { pub const fn ptr() -> *const i2c0::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for I2C2 { +impl Deref for I2c2 { type Target = i2c0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for I2C2 { +impl core::fmt::Debug for I2c2 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("I2C2").finish() + f.debug_struct("I2c2").finish() } } #[doc = "I2C Peripheral"] -pub use i2c0 as i2c2; +pub use self::i2c0 as i2c2; #[doc = "CAN Peripheral"] -pub struct CAN0 { +pub struct Can0 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CAN0 {} -impl CAN0 { +unsafe impl Send for Can0 {} +impl Can0 { #[doc = r"Pointer to the register block"] pub const PTR: *const can0::RegisterBlock = 0x4001_4000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -2184,27 +2992,45 @@ impl CAN0 { pub const fn ptr() -> *const can0::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for CAN0 { +impl Deref for Can0 { type Target = can0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CAN0 { +impl core::fmt::Debug for Can0 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CAN0").finish() + f.debug_struct("Can0").finish() } } #[doc = "CAN Peripheral"] pub mod can0; #[doc = "CAN Peripheral"] -pub struct CAN1 { +pub struct Can1 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CAN1 {} -impl CAN1 { +unsafe impl Send for Can1 {} +impl Can1 { #[doc = r"Pointer to the register block"] pub const PTR: *const can0::RegisterBlock = 0x4001_4400 as *const _; #[doc = r"Return the pointer to the register block"] @@ -2212,27 +3038,45 @@ impl CAN1 { pub const fn ptr() -> *const can0::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for CAN1 { +impl Deref for Can1 { type Target = can0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CAN1 { +impl core::fmt::Debug for Can1 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CAN1").finish() + f.debug_struct("Can1").finish() } } #[doc = "CAN Peripheral"] -pub use can0 as can1; +pub use self::can0 as can1; #[doc = "Analog to Digital Converter Peripheral"] -pub struct ADC { +pub struct Adc { _marker: PhantomData<*const ()>, } -unsafe impl Send for ADC {} -impl ADC { +unsafe impl Send for Adc {} +impl Adc { #[doc = r"Pointer to the register block"] pub const PTR: *const adc::RegisterBlock = 0x4002_2000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -2240,27 +3084,45 @@ impl ADC { pub const fn ptr() -> *const adc::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for ADC { +impl Deref for Adc { type Target = adc::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for ADC { +impl core::fmt::Debug for Adc { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("ADC").finish() + f.debug_struct("Adc").finish() } } #[doc = "Analog to Digital Converter Peripheral"] pub mod adc; #[doc = "Digital to Analog Converter Peripheral"] -pub struct DAC0 { +pub struct Dac0 { _marker: PhantomData<*const ()>, } -unsafe impl Send for DAC0 {} -impl DAC0 { +unsafe impl Send for Dac0 {} +impl Dac0 { #[doc = r"Pointer to the register block"] pub const PTR: *const dac0::RegisterBlock = 0x4002_3000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -2268,27 +3130,45 @@ impl DAC0 { pub const fn ptr() -> *const dac0::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for DAC0 { +impl Deref for Dac0 { type Target = dac0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for DAC0 { +impl core::fmt::Debug for Dac0 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("DAC0").finish() + f.debug_struct("Dac0").finish() } } #[doc = "Digital to Analog Converter Peripheral"] pub mod dac0; #[doc = "Digital to Analog Converter Peripheral"] -pub struct DAC1 { +pub struct Dac1 { _marker: PhantomData<*const ()>, } -unsafe impl Send for DAC1 {} -impl DAC1 { +unsafe impl Send for Dac1 {} +impl Dac1 { #[doc = r"Pointer to the register block"] pub const PTR: *const dac0::RegisterBlock = 0x4002_3800 as *const _; #[doc = r"Return the pointer to the register block"] @@ -2296,27 +3176,45 @@ impl DAC1 { pub const fn ptr() -> *const dac0::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for DAC1 { +impl Deref for Dac1 { type Target = dac0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for DAC1 { +impl core::fmt::Debug for Dac1 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("DAC1").finish() + f.debug_struct("Dac1").finish() } } #[doc = "Digital to Analog Converter Peripheral"] -pub use dac0 as dac1; +pub use self::dac0 as dac1; #[doc = "SpaceWire Peripheral"] -pub struct SPW { +pub struct Spw { _marker: PhantomData<*const ()>, } -unsafe impl Send for SPW {} -impl SPW { +unsafe impl Send for Spw {} +impl Spw { #[doc = r"Pointer to the register block"] pub const PTR: *const spw::RegisterBlock = 0x4000_3000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -2324,27 +3222,45 @@ impl SPW { pub const fn ptr() -> *const spw::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for SPW { +impl Deref for Spw { type Target = spw::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for SPW { +impl core::fmt::Debug for Spw { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("SPW").finish() + f.debug_struct("Spw").finish() } } #[doc = "SpaceWire Peripheral"] pub mod spw; #[doc = "Interrupt Router Peripheral"] -pub struct IRQ_ROUTER { +pub struct IrqRouter { _marker: PhantomData<*const ()>, } -unsafe impl Send for IRQ_ROUTER {} -impl IRQ_ROUTER { +unsafe impl Send for IrqRouter {} +impl IrqRouter { #[doc = r"Pointer to the register block"] pub const PTR: *const irq_router::RegisterBlock = 0x4000_2000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -2352,27 +3268,45 @@ impl IRQ_ROUTER { pub const fn ptr() -> *const irq_router::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for IRQ_ROUTER { +impl Deref for IrqRouter { type Target = irq_router::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for IRQ_ROUTER { +impl core::fmt::Debug for IrqRouter { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("IRQ_ROUTER").finish() + f.debug_struct("IrqRouter").finish() } } #[doc = "Interrupt Router Peripheral"] pub mod irq_router; #[doc = "Watchdog Block Peripheral"] -pub struct WATCH_DOG { +pub struct WatchDog { _marker: PhantomData<*const ()>, } -unsafe impl Send for WATCH_DOG {} -impl WATCH_DOG { +unsafe impl Send for WatchDog {} +impl WatchDog { #[doc = r"Pointer to the register block"] pub const PTR: *const watch_dog::RegisterBlock = 0x4002_1000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -2380,27 +3314,45 @@ impl WATCH_DOG { pub const fn ptr() -> *const watch_dog::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for WATCH_DOG { +impl Deref for WatchDog { type Target = watch_dog::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for WATCH_DOG { +impl core::fmt::Debug for WatchDog { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("WATCH_DOG").finish() + f.debug_struct("WatchDog").finish() } } #[doc = "Watchdog Block Peripheral"] pub mod watch_dog; #[doc = "True Random Number Generator"] -pub struct TRNG { +pub struct Trng { _marker: PhantomData<*const ()>, } -unsafe impl Send for TRNG {} -impl TRNG { +unsafe impl Send for Trng {} +impl Trng { #[doc = r"Pointer to the register block"] pub const PTR: *const trng::RegisterBlock = 0x4002_7000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -2408,27 +3360,45 @@ impl TRNG { pub const fn ptr() -> *const trng::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for TRNG { +impl Deref for Trng { type Target = trng::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for TRNG { +impl core::fmt::Debug for Trng { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("TRNG").finish() + f.debug_struct("Trng").finish() } } #[doc = "True Random Number Generator"] pub mod trng; #[doc = "Ethernet Block"] -pub struct ETH { +pub struct Eth { _marker: PhantomData<*const ()>, } -unsafe impl Send for ETH {} -impl ETH { +unsafe impl Send for Eth {} +impl Eth { #[doc = r"Pointer to the register block"] pub const PTR: *const eth::RegisterBlock = 0x4000_4000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -2436,322 +3406,344 @@ impl ETH { pub const fn ptr() -> *const eth::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for ETH { +impl Deref for Eth { type Target = eth::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for ETH { +impl core::fmt::Debug for Eth { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("ETH").finish() + f.debug_struct("Eth").finish() } } #[doc = "Ethernet Block"] pub mod eth; #[no_mangle] static mut DEVICE_PERIPHERALS: bool = false; -#[doc = r"All the peripherals"] +#[doc = r" All the peripherals."] #[allow(non_snake_case)] pub struct Peripherals { #[doc = "CLKGEN"] - pub CLKGEN: CLKGEN, + pub clkgen: Clkgen, #[doc = "SYSCONFIG"] - pub SYSCONFIG: SYSCONFIG, + pub sysconfig: Sysconfig, #[doc = "DMA"] - pub DMA: DMA, + pub dma: Dma, #[doc = "IOCONFIG"] - pub IOCONFIG: IOCONFIG, + pub ioconfig: Ioconfig, #[doc = "UTILITY"] - pub UTILITY: UTILITY, + pub utility: Utility, #[doc = "PORTA"] - pub PORTA: PORTA, + pub porta: Porta, #[doc = "PORTB"] - pub PORTB: PORTB, + pub portb: Portb, #[doc = "PORTC"] - pub PORTC: PORTC, + pub portc: Portc, #[doc = "PORTD"] - pub PORTD: PORTD, + pub portd: Portd, #[doc = "PORTE"] - pub PORTE: PORTE, + pub porte: Porte, #[doc = "PORTF"] - pub PORTF: PORTF, + pub portf: Portf, #[doc = "PORTG"] - pub PORTG: PORTG, + pub portg: Portg, #[doc = "TIM0"] - pub TIM0: TIM0, + pub tim0: Tim0, #[doc = "TIM1"] - pub TIM1: TIM1, + pub tim1: Tim1, #[doc = "TIM2"] - pub TIM2: TIM2, + pub tim2: Tim2, #[doc = "TIM3"] - pub TIM3: TIM3, + pub tim3: Tim3, #[doc = "TIM4"] - pub TIM4: TIM4, + pub tim4: Tim4, #[doc = "TIM5"] - pub TIM5: TIM5, + pub tim5: Tim5, #[doc = "TIM6"] - pub TIM6: TIM6, + pub tim6: Tim6, #[doc = "TIM7"] - pub TIM7: TIM7, + pub tim7: Tim7, #[doc = "TIM8"] - pub TIM8: TIM8, + pub tim8: Tim8, #[doc = "TIM9"] - pub TIM9: TIM9, + pub tim9: Tim9, #[doc = "TIM10"] - pub TIM10: TIM10, + pub tim10: Tim10, #[doc = "TIM11"] - pub TIM11: TIM11, + pub tim11: Tim11, #[doc = "TIM12"] - pub TIM12: TIM12, + pub tim12: Tim12, #[doc = "TIM13"] - pub TIM13: TIM13, + pub tim13: Tim13, #[doc = "TIM14"] - pub TIM14: TIM14, + pub tim14: Tim14, #[doc = "TIM15"] - pub TIM15: TIM15, + pub tim15: Tim15, #[doc = "TIM16"] - pub TIM16: TIM16, + pub tim16: Tim16, #[doc = "TIM17"] - pub TIM17: TIM17, + pub tim17: Tim17, #[doc = "TIM18"] - pub TIM18: TIM18, + pub tim18: Tim18, #[doc = "TIM19"] - pub TIM19: TIM19, + pub tim19: Tim19, #[doc = "TIM20"] - pub TIM20: TIM20, + pub tim20: Tim20, #[doc = "TIM21"] - pub TIM21: TIM21, + pub tim21: Tim21, #[doc = "TIM22"] - pub TIM22: TIM22, + pub tim22: Tim22, #[doc = "TIM23"] - pub TIM23: TIM23, + pub tim23: Tim23, #[doc = "UART0"] - pub UART0: UART0, + pub uart0: Uart0, #[doc = "UART1"] - pub UART1: UART1, + pub uart1: Uart1, #[doc = "UART2"] - pub UART2: UART2, + pub uart2: Uart2, #[doc = "SPI0"] - pub SPI0: SPI0, + pub spi0: Spi0, #[doc = "SPI1"] - pub SPI1: SPI1, + pub spi1: Spi1, #[doc = "SPI2"] - pub SPI2: SPI2, + pub spi2: Spi2, #[doc = "SPI3"] - pub SPI3: SPI3, + pub spi3: Spi3, #[doc = "I2C0"] - pub I2C0: I2C0, + pub i2c0: I2c0, #[doc = "I2C1"] - pub I2C1: I2C1, + pub i2c1: I2c1, #[doc = "I2C2"] - pub I2C2: I2C2, + pub i2c2: I2c2, #[doc = "CAN0"] - pub CAN0: CAN0, + pub can0: Can0, #[doc = "CAN1"] - pub CAN1: CAN1, + pub can1: Can1, #[doc = "ADC"] - pub ADC: ADC, + pub adc: Adc, #[doc = "DAC0"] - pub DAC0: DAC0, + pub dac0: Dac0, #[doc = "DAC1"] - pub DAC1: DAC1, + pub dac1: Dac1, #[doc = "SPW"] - pub SPW: SPW, + pub spw: Spw, #[doc = "IRQ_ROUTER"] - pub IRQ_ROUTER: IRQ_ROUTER, + pub irq_router: IrqRouter, #[doc = "WATCH_DOG"] - pub WATCH_DOG: WATCH_DOG, + pub watch_dog: WatchDog, #[doc = "TRNG"] - pub TRNG: TRNG, + pub trng: Trng, #[doc = "ETH"] - pub ETH: ETH, + pub eth: Eth, } impl Peripherals { - #[doc = r"Returns all the peripherals *once*"] + #[doc = r" Returns all the peripherals *once*."] + #[cfg(feature = "critical-section")] #[inline] pub fn take() -> Option { - cortex_m::interrupt::free(|_| { + critical_section::with(|_| { if unsafe { DEVICE_PERIPHERALS } { - None - } else { - Some(unsafe { Peripherals::steal() }) + return None; } + Some(unsafe { Peripherals::steal() }) }) } - #[doc = r"Unchecked version of `Peripherals::take`"] + #[doc = r" Unchecked version of `Peripherals::take`."] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Each of the returned peripherals must be used at most once."] #[inline] pub unsafe fn steal() -> Self { DEVICE_PERIPHERALS = true; Peripherals { - CLKGEN: CLKGEN { + clkgen: Clkgen { _marker: PhantomData, }, - SYSCONFIG: SYSCONFIG { + sysconfig: Sysconfig { _marker: PhantomData, }, - DMA: DMA { + dma: Dma { _marker: PhantomData, }, - IOCONFIG: IOCONFIG { + ioconfig: Ioconfig { _marker: PhantomData, }, - UTILITY: UTILITY { + utility: Utility { _marker: PhantomData, }, - PORTA: PORTA { + porta: Porta { _marker: PhantomData, }, - PORTB: PORTB { + portb: Portb { _marker: PhantomData, }, - PORTC: PORTC { + portc: Portc { _marker: PhantomData, }, - PORTD: PORTD { + portd: Portd { _marker: PhantomData, }, - PORTE: PORTE { + porte: Porte { _marker: PhantomData, }, - PORTF: PORTF { + portf: Portf { _marker: PhantomData, }, - PORTG: PORTG { + portg: Portg { _marker: PhantomData, }, - TIM0: TIM0 { + tim0: Tim0 { _marker: PhantomData, }, - TIM1: TIM1 { + tim1: Tim1 { _marker: PhantomData, }, - TIM2: TIM2 { + tim2: Tim2 { _marker: PhantomData, }, - TIM3: TIM3 { + tim3: Tim3 { _marker: PhantomData, }, - TIM4: TIM4 { + tim4: Tim4 { _marker: PhantomData, }, - TIM5: TIM5 { + tim5: Tim5 { _marker: PhantomData, }, - TIM6: TIM6 { + tim6: Tim6 { _marker: PhantomData, }, - TIM7: TIM7 { + tim7: Tim7 { _marker: PhantomData, }, - TIM8: TIM8 { + tim8: Tim8 { _marker: PhantomData, }, - TIM9: TIM9 { + tim9: Tim9 { _marker: PhantomData, }, - TIM10: TIM10 { + tim10: Tim10 { _marker: PhantomData, }, - TIM11: TIM11 { + tim11: Tim11 { _marker: PhantomData, }, - TIM12: TIM12 { + tim12: Tim12 { _marker: PhantomData, }, - TIM13: TIM13 { + tim13: Tim13 { _marker: PhantomData, }, - TIM14: TIM14 { + tim14: Tim14 { _marker: PhantomData, }, - TIM15: TIM15 { + tim15: Tim15 { _marker: PhantomData, }, - TIM16: TIM16 { + tim16: Tim16 { _marker: PhantomData, }, - TIM17: TIM17 { + tim17: Tim17 { _marker: PhantomData, }, - TIM18: TIM18 { + tim18: Tim18 { _marker: PhantomData, }, - TIM19: TIM19 { + tim19: Tim19 { _marker: PhantomData, }, - TIM20: TIM20 { + tim20: Tim20 { _marker: PhantomData, }, - TIM21: TIM21 { + tim21: Tim21 { _marker: PhantomData, }, - TIM22: TIM22 { + tim22: Tim22 { _marker: PhantomData, }, - TIM23: TIM23 { + tim23: Tim23 { _marker: PhantomData, }, - UART0: UART0 { + uart0: Uart0 { _marker: PhantomData, }, - UART1: UART1 { + uart1: Uart1 { _marker: PhantomData, }, - UART2: UART2 { + uart2: Uart2 { _marker: PhantomData, }, - SPI0: SPI0 { + spi0: Spi0 { _marker: PhantomData, }, - SPI1: SPI1 { + spi1: Spi1 { _marker: PhantomData, }, - SPI2: SPI2 { + spi2: Spi2 { _marker: PhantomData, }, - SPI3: SPI3 { + spi3: Spi3 { _marker: PhantomData, }, - I2C0: I2C0 { + i2c0: I2c0 { _marker: PhantomData, }, - I2C1: I2C1 { + i2c1: I2c1 { _marker: PhantomData, }, - I2C2: I2C2 { + i2c2: I2c2 { _marker: PhantomData, }, - CAN0: CAN0 { + can0: Can0 { _marker: PhantomData, }, - CAN1: CAN1 { + can1: Can1 { _marker: PhantomData, }, - ADC: ADC { + adc: Adc { _marker: PhantomData, }, - DAC0: DAC0 { + dac0: Dac0 { _marker: PhantomData, }, - DAC1: DAC1 { + dac1: Dac1 { _marker: PhantomData, }, - SPW: SPW { + spw: Spw { _marker: PhantomData, }, - IRQ_ROUTER: IRQ_ROUTER { + irq_router: IrqRouter { _marker: PhantomData, }, - WATCH_DOG: WATCH_DOG { + watch_dog: WatchDog { _marker: PhantomData, }, - TRNG: TRNG { + trng: Trng { _marker: PhantomData, }, - ETH: ETH { + eth: Eth { _marker: PhantomData, }, } diff --git a/va416xx/src/porta.rs b/va416xx/src/porta.rs index d0a4207..99b21b6 100644 --- a/va416xx/src/porta.rs +++ b/va416xx/src/porta.rs @@ -1,5 +1,5 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { _reserved_0_datain: [u8; 0x04], _reserved_1_datainraw: [u8; 0x04], @@ -14,367 +14,426 @@ pub struct RegisterBlock { _reserved_10_pulsebase: [u8; 0x04], _reserved_11_delay: [u8; 0x04], _reserved_12_delay: [u8; 0x04], - #[doc = "0x34 - Interrupt Sense Register (1:Level Sensitive, 0:Edge Sensitive)"] - pub irq_sen: crate::Reg, - #[doc = "0x38 - Interrupt Both Edge Register (1:Both Edges, 0:Single Edge)"] - pub irq_edge: crate::Reg, - #[doc = "0x3c - Interrupt Event Register (1:HighLevel/L->H Edge, 0:LowLevel/H->L Edge)"] - pub irq_evt: crate::Reg, - #[doc = "0x40 - Interrupt Enable Register"] - pub irq_enb: crate::Reg, - #[doc = "0x44 - Raw Interrupt Status"] - pub irq_raw: crate::Reg, - #[doc = "0x48 - Masked Interrupt Status"] - pub irq_end: crate::Reg, - #[doc = "0x4c - Edge Status Register"] - pub edge_status: crate::Reg, + irq_sen: IrqSen, + irq_edge: IrqEdge, + irq_evt: IrqEvt, + irq_enb: IrqEnb, + irq_raw: IrqRaw, + irq_end: IrqEnd, + edge_status: EdgeStatus, _reserved20: [u8; 0x03ac], - #[doc = "0x3fc - Peripheral ID Register"] - pub perid: crate::Reg, + perid: Perid, } impl RegisterBlock { #[doc = "0x00 - Data In Register by Byte"] #[inline(always)] - pub fn datainbyte(&self) -> &[crate::Reg; 4] { - unsafe { - &*(((self as *const Self) as *const u8).add(0usize) - as *const [crate::Reg; 4]) - } + pub const fn datainbyte(&self, n: usize) -> &Datainbyte { + #[allow(clippy::no_effect)] + [(); 4][n]; + unsafe { &*(self as *const Self).cast::().add(0).add(1 * n).cast() } + } + #[doc = "Iterator for array of:"] + #[doc = "0x00 - Data In Register by Byte"] + #[inline(always)] + pub fn datainbyte_iter(&self) -> impl Iterator { + (0..4) + .map(move |n| unsafe { &*(self as *const Self).cast::().add(0).add(1 * n).cast() }) } #[doc = "0x00 - Data In Register"] #[inline(always)] - pub fn datain(&self) -> &crate::Reg { - unsafe { - &*(((self as *const Self) as *const u8).add(0usize) - as *const crate::Reg) - } + pub const fn datain(&self) -> &Datain { + unsafe { &*(self as *const Self).cast::().add(0).cast() } } #[doc = "0x04 - Data In Raw Register by Byte"] #[inline(always)] - pub fn datainrawbyte(&self) -> &[crate::Reg; 4] { - unsafe { - &*(((self as *const Self) as *const u8).add(4usize) - as *const [crate::Reg; 4]) - } + pub const fn datainrawbyte0(&self, n: usize) -> &Datainrawbyte { + #[allow(clippy::no_effect)] + [(); 4][n]; + unsafe { &*(self as *const Self).cast::().add(4).add(1 * n).cast() } + } + #[doc = "Iterator for array of:"] + #[doc = "0x04 - Data In Raw Register by Byte"] + #[inline(always)] + pub fn datainrawbyte0_iter(&self) -> impl Iterator { + (0..4) + .map(move |n| unsafe { &*(self as *const Self).cast::().add(4).add(1 * n).cast() }) } #[doc = "0x04 - Data In Raw Register"] #[inline(always)] - pub fn datainraw(&self) -> &crate::Reg { - unsafe { - &*(((self as *const Self) as *const u8).add(4usize) - as *const crate::Reg) - } + pub const fn datainraw(&self) -> &Datainraw { + unsafe { &*(self as *const Self).cast::().add(4).cast() } } #[doc = "0x08 - Data Out Register by Byte"] #[inline(always)] - pub fn dataoutbyte(&self) -> &[crate::Reg; 4] { - unsafe { - &*(((self as *const Self) as *const u8).add(8usize) - as *const [crate::Reg; 4]) - } + pub const fn dataoutbyte(&self, n: usize) -> &Dataoutbyte { + #[allow(clippy::no_effect)] + [(); 4][n]; + unsafe { &*(self as *const Self).cast::().add(8).add(1 * n).cast() } + } + #[doc = "Iterator for array of:"] + #[doc = "0x08 - Data Out Register by Byte"] + #[inline(always)] + pub fn dataoutbyte_iter(&self) -> impl Iterator { + (0..4) + .map(move |n| unsafe { &*(self as *const Self).cast::().add(8).add(1 * n).cast() }) } #[doc = "0x08 - Data Out Register"] #[inline(always)] - pub fn dataout(&self) -> &crate::Reg { - unsafe { - &*(((self as *const Self) as *const u8).add(8usize) - as *const crate::Reg) - } + pub const fn dataout(&self) -> &Dataout { + unsafe { &*(self as *const Self).cast::().add(8).cast() } } #[doc = "0x0c - Data Out Register by Byte"] #[inline(always)] - pub fn dataoutrawbyte(&self) -> &[crate::Reg; 4] { - unsafe { - &*(((self as *const Self) as *const u8).add(12usize) - as *const [crate::Reg; 4]) - } + pub const fn dataoutrawbyte0(&self, n: usize) -> &Dataoutrawbyte { + #[allow(clippy::no_effect)] + [(); 4][n]; + unsafe { &*(self as *const Self).cast::().add(12).add(1 * n).cast() } + } + #[doc = "Iterator for array of:"] + #[doc = "0x0c - Data Out Register by Byte"] + #[inline(always)] + pub fn dataoutrawbyte0_iter(&self) -> impl Iterator { + (0..4) + .map(move |n| unsafe { &*(self as *const Self).cast::().add(12).add(1 * n).cast() }) } #[doc = "0x0c - Data Out Register"] #[inline(always)] - pub fn dataoutraw(&self) -> &crate::Reg { - unsafe { - &*(((self as *const Self) as *const u8).add(12usize) - as *const crate::Reg) - } + pub const fn dataoutraw(&self) -> &Dataoutraw { + unsafe { &*(self as *const Self).cast::().add(12).cast() } } #[doc = "0x10 - Set Out Register by Byte"] #[inline(always)] - pub fn setoutbyte(&self) -> &[crate::Reg; 4] { - unsafe { - &*(((self as *const Self) as *const u8).add(16usize) - as *const [crate::Reg; 4]) - } + pub const fn setoutbyte0(&self, n: usize) -> &Setoutbyte { + #[allow(clippy::no_effect)] + [(); 4][n]; + unsafe { &*(self as *const Self).cast::().add(16).add(1 * n).cast() } + } + #[doc = "Iterator for array of:"] + #[doc = "0x10 - Set Out Register by Byte"] + #[inline(always)] + pub fn setoutbyte0_iter(&self) -> impl Iterator { + (0..4) + .map(move |n| unsafe { &*(self as *const Self).cast::().add(16).add(1 * n).cast() }) } #[doc = "0x10 - Set Out Register"] #[inline(always)] - pub fn setout(&self) -> &crate::Reg { - unsafe { - &*(((self as *const Self) as *const u8).add(16usize) - as *const crate::Reg) - } + pub const fn setout(&self) -> &Setout { + unsafe { &*(self as *const Self).cast::().add(16).cast() } } #[doc = "0x14 - Clear Out Register by Byte"] #[inline(always)] - pub fn clroutbyte(&self) -> &[crate::Reg; 4] { - unsafe { - &*(((self as *const Self) as *const u8).add(20usize) - as *const [crate::Reg; 4]) - } + pub const fn clroutbyte0(&self, n: usize) -> &Clroutbyte { + #[allow(clippy::no_effect)] + [(); 4][n]; + unsafe { &*(self as *const Self).cast::().add(20).add(1 * n).cast() } + } + #[doc = "Iterator for array of:"] + #[doc = "0x14 - Clear Out Register by Byte"] + #[inline(always)] + pub fn clroutbyte0_iter(&self) -> impl Iterator { + (0..4) + .map(move |n| unsafe { &*(self as *const Self).cast::().add(20).add(1 * n).cast() }) } #[doc = "0x14 - Clear Out Register"] #[inline(always)] - pub fn clrout(&self) -> &crate::Reg { - unsafe { - &*(((self as *const Self) as *const u8).add(20usize) - as *const crate::Reg) - } + pub const fn clrout(&self) -> &Clrout { + unsafe { &*(self as *const Self).cast::().add(20).cast() } } #[doc = "0x18 - Toggle Out Register by Byte"] #[inline(always)] - pub fn togoutbyte(&self) -> &[crate::Reg; 4] { - unsafe { - &*(((self as *const Self) as *const u8).add(24usize) - as *const [crate::Reg; 4]) - } + pub const fn togoutbyte0(&self, n: usize) -> &Togoutbyte { + #[allow(clippy::no_effect)] + [(); 4][n]; + unsafe { &*(self as *const Self).cast::().add(24).add(1 * n).cast() } + } + #[doc = "Iterator for array of:"] + #[doc = "0x18 - Toggle Out Register by Byte"] + #[inline(always)] + pub fn togoutbyte0_iter(&self) -> impl Iterator { + (0..4) + .map(move |n| unsafe { &*(self as *const Self).cast::().add(24).add(1 * n).cast() }) } #[doc = "0x18 - Toggle Out Register"] #[inline(always)] - pub fn togout(&self) -> &crate::Reg { - unsafe { - &*(((self as *const Self) as *const u8).add(24usize) - as *const crate::Reg) - } + pub const fn togout(&self) -> &Togout { + unsafe { &*(self as *const Self).cast::().add(24).cast() } } #[doc = "0x1c - Data Out Register by Byte"] #[inline(always)] - pub fn datamaskbyte(&self) -> &[crate::Reg; 4] { - unsafe { - &*(((self as *const Self) as *const u8).add(28usize) - as *const [crate::Reg; 4]) - } + pub const fn datamaskbyte(&self, n: usize) -> &Datamaskbyte { + #[allow(clippy::no_effect)] + [(); 4][n]; + unsafe { &*(self as *const Self).cast::().add(28).add(1 * n).cast() } + } + #[doc = "Iterator for array of:"] + #[doc = "0x1c - Data Out Register by Byte"] + #[inline(always)] + pub fn datamaskbyte_iter(&self) -> impl Iterator { + (0..4) + .map(move |n| unsafe { &*(self as *const Self).cast::().add(28).add(1 * n).cast() }) } #[doc = "0x1c - Data mask Register"] #[inline(always)] - pub fn datamask(&self) -> &crate::Reg { - unsafe { - &*(((self as *const Self) as *const u8).add(28usize) - as *const crate::Reg) - } + pub const fn datamask(&self) -> &Datamask { + unsafe { &*(self as *const Self).cast::().add(28).cast() } } #[doc = "0x20 - Direction Register by Byte"] #[inline(always)] - pub fn dirbyte(&self) -> &[crate::Reg; 4] { - unsafe { - &*(((self as *const Self) as *const u8).add(32usize) - as *const [crate::Reg; 4]) - } + pub const fn dirbyte0(&self, n: usize) -> &Dirbyte { + #[allow(clippy::no_effect)] + [(); 4][n]; + unsafe { &*(self as *const Self).cast::().add(32).add(1 * n).cast() } + } + #[doc = "Iterator for array of:"] + #[doc = "0x20 - Direction Register by Byte"] + #[inline(always)] + pub fn dirbyte0_iter(&self) -> impl Iterator { + (0..4) + .map(move |n| unsafe { &*(self as *const Self).cast::().add(32).add(1 * n).cast() }) } #[doc = "0x20 - Direction Register (1:Output, 0:Input)"] #[inline(always)] - pub fn dir(&self) -> &crate::Reg { - unsafe { - &*(((self as *const Self) as *const u8).add(32usize) - as *const crate::Reg) - } + pub const fn dir(&self) -> &Dir { + unsafe { &*(self as *const Self).cast::().add(32).cast() } } #[doc = "0x24 - Pulse Mode Register by Byte"] #[inline(always)] - pub fn pulsebyte(&self) -> &[crate::Reg; 4] { - unsafe { - &*(((self as *const Self) as *const u8).add(36usize) - as *const [crate::Reg; 4]) - } + pub const fn pulsebyte0(&self, n: usize) -> &Pulsebyte { + #[allow(clippy::no_effect)] + [(); 4][n]; + unsafe { &*(self as *const Self).cast::().add(36).add(1 * n).cast() } + } + #[doc = "Iterator for array of:"] + #[doc = "0x24 - Pulse Mode Register by Byte"] + #[inline(always)] + pub fn pulsebyte0_iter(&self) -> impl Iterator { + (0..4) + .map(move |n| unsafe { &*(self as *const Self).cast::().add(36).add(1 * n).cast() }) } #[doc = "0x24 - Pulse Mode Register"] #[inline(always)] - pub fn pulse(&self) -> &crate::Reg { - unsafe { - &*(((self as *const Self) as *const u8).add(36usize) - as *const crate::Reg) - } + pub const fn pulse(&self) -> &Pulse { + unsafe { &*(self as *const Self).cast::().add(36).cast() } } #[doc = "0x28 - Pulse Base Mode Register by Byte"] #[inline(always)] - pub fn pulsebasebyte(&self) -> &[crate::Reg; 4] { - unsafe { - &*(((self as *const Self) as *const u8).add(40usize) - as *const [crate::Reg; 4]) - } + pub const fn pulsebasebyte0(&self, n: usize) -> &Pulsebasebyte { + #[allow(clippy::no_effect)] + [(); 4][n]; + unsafe { &*(self as *const Self).cast::().add(40).add(1 * n).cast() } + } + #[doc = "Iterator for array of:"] + #[doc = "0x28 - Pulse Base Mode Register by Byte"] + #[inline(always)] + pub fn pulsebasebyte0_iter(&self) -> impl Iterator { + (0..4) + .map(move |n| unsafe { &*(self as *const Self).cast::().add(40).add(1 * n).cast() }) } #[doc = "0x28 - Pulse Base Value Register"] #[inline(always)] - pub fn pulsebase(&self) -> &crate::Reg { - unsafe { - &*(((self as *const Self) as *const u8).add(40usize) - as *const crate::Reg) - } + pub const fn pulsebase(&self) -> &Pulsebase { + unsafe { &*(self as *const Self).cast::().add(40).cast() } } #[doc = "0x2c - Delay1 Register by Byte"] #[inline(always)] - pub fn delay1byte(&self) -> &[crate::Reg; 4] { - unsafe { - &*(((self as *const Self) as *const u8).add(44usize) - as *const [crate::Reg; 4]) - } + pub const fn delay1byte0(&self, n: usize) -> &Delay1byte { + #[allow(clippy::no_effect)] + [(); 4][n]; + unsafe { &*(self as *const Self).cast::().add(44).add(1 * n).cast() } + } + #[doc = "Iterator for array of:"] + #[doc = "0x2c - Delay1 Register by Byte"] + #[inline(always)] + pub fn delay1byte0_iter(&self) -> impl Iterator { + (0..4) + .map(move |n| unsafe { &*(self as *const Self).cast::().add(44).add(1 * n).cast() }) } #[doc = "0x2c - Delay1 Register"] #[inline(always)] - pub fn delay1(&self) -> &crate::Reg { - unsafe { - &*(((self as *const Self) as *const u8).add(44usize) - as *const crate::Reg) - } + pub const fn delay1(&self) -> &Delay1 { + unsafe { &*(self as *const Self).cast::().add(44).cast() } } #[doc = "0x30 - Delay2 Register by Byte"] #[inline(always)] - pub fn delay2byte(&self) -> &[crate::Reg; 4] { - unsafe { - &*(((self as *const Self) as *const u8).add(48usize) - as *const [crate::Reg; 4]) - } + pub const fn delay2byte0(&self, n: usize) -> &Delay2byte { + #[allow(clippy::no_effect)] + [(); 4][n]; + unsafe { &*(self as *const Self).cast::().add(48).add(1 * n).cast() } + } + #[doc = "Iterator for array of:"] + #[doc = "0x30 - Delay2 Register by Byte"] + #[inline(always)] + pub fn delay2byte0_iter(&self) -> impl Iterator { + (0..4) + .map(move |n| unsafe { &*(self as *const Self).cast::().add(48).add(1 * n).cast() }) } #[doc = "0x30 - Delay2 Register"] #[inline(always)] - pub fn delay2(&self) -> &crate::Reg { - unsafe { - &*(((self as *const Self) as *const u8).add(48usize) - as *const crate::Reg) - } + pub const fn delay2(&self) -> &Delay2 { + unsafe { &*(self as *const Self).cast::().add(48).cast() } + } + #[doc = "0x34 - Interrupt Sense Register (1:Level Sensitive, 0:Edge Sensitive)"] + #[inline(always)] + pub const fn irq_sen(&self) -> &IrqSen { + &self.irq_sen + } + #[doc = "0x38 - Interrupt Both Edge Register (1:Both Edges, 0:Single Edge)"] + #[inline(always)] + pub const fn irq_edge(&self) -> &IrqEdge { + &self.irq_edge + } + #[doc = "0x3c - Interrupt Event Register (1:HighLevel/L->H Edge, 0:LowLevel/H->L Edge)"] + #[inline(always)] + pub const fn irq_evt(&self) -> &IrqEvt { + &self.irq_evt + } + #[doc = "0x40 - Interrupt Enable Register"] + #[inline(always)] + pub const fn irq_enb(&self) -> &IrqEnb { + &self.irq_enb + } + #[doc = "0x44 - Raw Interrupt Status"] + #[inline(always)] + pub const fn irq_raw(&self) -> &IrqRaw { + &self.irq_raw + } + #[doc = "0x48 - Masked Interrupt Status"] + #[inline(always)] + pub const fn irq_end(&self) -> &IrqEnd { + &self.irq_end + } + #[doc = "0x4c - Edge Status Register"] + #[inline(always)] + pub const fn edge_status(&self) -> &EdgeStatus { + &self.edge_status + } + #[doc = "0x3fc - Peripheral ID Register"] + #[inline(always)] + pub const fn perid(&self) -> &Perid { + &self.perid } } -#[doc = "DATAIN register accessor: an alias for `Reg`"] -pub type DATAIN = crate::Reg; +#[doc = "DATAIN (r) register accessor: Data In Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`datain::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@datain`] +module"] +#[doc(alias = "DATAIN")] +pub type Datain = crate::Reg; #[doc = "Data In Register"] pub mod datain; -#[doc = "DATAINBYTE register accessor: an alias for `Reg`"] -pub type DATAINBYTE = crate::Reg; +#[doc = "DATAINBYTE (r) register accessor: Data In Register by Byte\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`datainbyte::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@datainbyte`] +module"] +#[doc(alias = "DATAINBYTE")] +pub type Datainbyte = crate::Reg; #[doc = "Data In Register by Byte"] pub mod datainbyte; -#[doc = "DATAINRAW register accessor: an alias for `Reg`"] -pub type DATAINRAW = crate::Reg; -#[doc = "Data In Raw Register"] -pub mod datainraw; -#[doc = "DATAINRAWBYTE register accessor: an alias for `Reg`"] -pub type DATAINRAWBYTE = crate::Reg; -#[doc = "Data In Raw Register by Byte"] -pub mod datainrawbyte; -#[doc = "DATAOUT register accessor: an alias for `Reg`"] -pub type DATAOUT = crate::Reg; +pub use datain as datainraw; +pub use datainbyte as datainrawbyte; +pub use Datain as Datainraw; +pub use Datainbyte as Datainrawbyte; +#[doc = "DATAOUT (w) register accessor: Data Out Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dataout::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dataout`] +module"] +#[doc(alias = "DATAOUT")] +pub type Dataout = crate::Reg; #[doc = "Data Out Register"] pub mod dataout; -#[doc = "DATAOUTBYTE register accessor: an alias for `Reg`"] -pub type DATAOUTBYTE = crate::Reg; +#[doc = "DATAOUTBYTE (w) register accessor: Data Out Register by Byte\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dataoutbyte::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dataoutbyte`] +module"] +#[doc(alias = "DATAOUTBYTE")] +pub type Dataoutbyte = crate::Reg; #[doc = "Data Out Register by Byte"] pub mod dataoutbyte; -#[doc = "DATAOUTRAW register accessor: an alias for `Reg`"] -pub type DATAOUTRAW = crate::Reg; -#[doc = "Data Out Register"] -pub mod dataoutraw; -#[doc = "DATAOUTRAWBYTE register accessor: an alias for `Reg`"] -pub type DATAOUTRAWBYTE = crate::Reg; -#[doc = "Data Out Register by Byte"] -pub mod dataoutrawbyte; -#[doc = "SETOUT register accessor: an alias for `Reg`"] -pub type SETOUT = crate::Reg; -#[doc = "Set Out Register"] -pub mod setout; -#[doc = "SETOUTBYTE register accessor: an alias for `Reg`"] -pub type SETOUTBYTE = crate::Reg; -#[doc = "Set Out Register by Byte"] -pub mod setoutbyte; -#[doc = "CLROUT register accessor: an alias for `Reg`"] -pub type CLROUT = crate::Reg; -#[doc = "Clear Out Register"] -pub mod clrout; -#[doc = "CLROUTBYTE register accessor: an alias for `Reg`"] -pub type CLROUTBYTE = crate::Reg; -#[doc = "Clear Out Register by Byte"] -pub mod clroutbyte; -#[doc = "TOGOUT register accessor: an alias for `Reg`"] -pub type TOGOUT = crate::Reg; -#[doc = "Toggle Out Register"] -pub mod togout; -#[doc = "TOGOUTBYTE register accessor: an alias for `Reg`"] -pub type TOGOUTBYTE = crate::Reg; -#[doc = "Toggle Out Register by Byte"] -pub mod togoutbyte; -#[doc = "DATAMASK register accessor: an alias for `Reg`"] -pub type DATAMASK = crate::Reg; +pub use dataout as dataoutraw; +pub use dataout as setout; +pub use dataout as clrout; +pub use dataout as togout; +pub use dataoutbyte as dataoutrawbyte; +pub use dataoutbyte as setoutbyte; +pub use dataoutbyte as clroutbyte; +pub use dataoutbyte as togoutbyte; +pub use Dataout as Dataoutraw; +pub use Dataout as Setout; +pub use Dataout as Clrout; +pub use Dataout as Togout; +pub use Dataoutbyte as Dataoutrawbyte; +pub use Dataoutbyte as Setoutbyte; +pub use Dataoutbyte as Clroutbyte; +pub use Dataoutbyte as Togoutbyte; +#[doc = "DATAMASK (rw) register accessor: Data mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`datamask::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`datamask::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@datamask`] +module"] +#[doc(alias = "DATAMASK")] +pub type Datamask = crate::Reg; #[doc = "Data mask Register"] pub mod datamask; -#[doc = "DATAMASKBYTE register accessor: an alias for `Reg`"] -pub type DATAMASKBYTE = crate::Reg; +#[doc = "DATAMASKBYTE (rw) register accessor: Data Out Register by Byte\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`datamaskbyte::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`datamaskbyte::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@datamaskbyte`] +module"] +#[doc(alias = "DATAMASKBYTE")] +pub type Datamaskbyte = crate::Reg; #[doc = "Data Out Register by Byte"] pub mod datamaskbyte; -#[doc = "DIR register accessor: an alias for `Reg`"] -pub type DIR = crate::Reg; -#[doc = "Direction Register (1:Output, 0:Input)"] -pub mod dir; -#[doc = "DIRBYTE register accessor: an alias for `Reg`"] -pub type DIRBYTE = crate::Reg; -#[doc = "Direction Register by Byte"] -pub mod dirbyte; -#[doc = "PULSE register accessor: an alias for `Reg`"] -pub type PULSE = crate::Reg; -#[doc = "Pulse Mode Register"] -pub mod pulse; -#[doc = "PULSEBYTE register accessor: an alias for `Reg`"] -pub type PULSEBYTE = crate::Reg; -#[doc = "Pulse Mode Register by Byte"] -pub mod pulsebyte; -#[doc = "PULSEBASE register accessor: an alias for `Reg`"] -pub type PULSEBASE = crate::Reg; -#[doc = "Pulse Base Value Register"] -pub mod pulsebase; -#[doc = "PULSEBASEBYTE register accessor: an alias for `Reg`"] -pub type PULSEBASEBYTE = crate::Reg; -#[doc = "Pulse Base Mode Register by Byte"] -pub mod pulsebasebyte; -#[doc = "DELAY1 register accessor: an alias for `Reg`"] -pub type DELAY1 = crate::Reg; -#[doc = "Delay1 Register"] -pub mod delay1; -#[doc = "DELAY1BYTE register accessor: an alias for `Reg`"] -pub type DELAY1BYTE = crate::Reg; -#[doc = "Delay1 Register by Byte"] -pub mod delay1byte; -#[doc = "DELAY2 register accessor: an alias for `Reg`"] -pub type DELAY2 = crate::Reg; -#[doc = "Delay2 Register"] -pub mod delay2; -#[doc = "DELAY2BYTE register accessor: an alias for `Reg`"] -pub type DELAY2BYTE = crate::Reg; -#[doc = "Delay2 Register by Byte"] -pub mod delay2byte; -#[doc = "IRQ_SEN register accessor: an alias for `Reg`"] -pub type IRQ_SEN = crate::Reg; +pub use datamask as dir; +pub use datamask as pulse; +pub use datamask as pulsebase; +pub use datamask as delay1; +pub use datamask as delay2; +pub use datamaskbyte as dirbyte; +pub use datamaskbyte as pulsebyte; +pub use datamaskbyte as pulsebasebyte; +pub use datamaskbyte as delay1byte; +pub use datamaskbyte as delay2byte; +pub use Datamask as Dir; +pub use Datamask as Pulse; +pub use Datamask as Pulsebase; +pub use Datamask as Delay1; +pub use Datamask as Delay2; +pub use Datamaskbyte as Dirbyte; +pub use Datamaskbyte as Pulsebyte; +pub use Datamaskbyte as Pulsebasebyte; +pub use Datamaskbyte as Delay1byte; +pub use Datamaskbyte as Delay2byte; +#[doc = "IRQ_SEN (rw) register accessor: Interrupt Sense Register (1:Level Sensitive, 0:Edge Sensitive)\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_sen::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`irq_sen::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_sen`] +module"] +#[doc(alias = "IRQ_SEN")] +pub type IrqSen = crate::Reg; #[doc = "Interrupt Sense Register (1:Level Sensitive, 0:Edge Sensitive)"] pub mod irq_sen; -#[doc = "IRQ_EDGE register accessor: an alias for `Reg`"] -pub type IRQ_EDGE = crate::Reg; +#[doc = "IRQ_EDGE (rw) register accessor: Interrupt Both Edge Register (1:Both Edges, 0:Single Edge)\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_edge::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`irq_edge::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_edge`] +module"] +#[doc(alias = "IRQ_EDGE")] +pub type IrqEdge = crate::Reg; #[doc = "Interrupt Both Edge Register (1:Both Edges, 0:Single Edge)"] pub mod irq_edge; -#[doc = "IRQ_EVT register accessor: an alias for `Reg`"] -pub type IRQ_EVT = crate::Reg; +#[doc = "IRQ_EVT (rw) register accessor: Interrupt Event Register (1:HighLevel/L->H Edge, 0:LowLevel/H->L Edge)\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_evt::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`irq_evt::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_evt`] +module"] +#[doc(alias = "IRQ_EVT")] +pub type IrqEvt = crate::Reg; #[doc = "Interrupt Event Register (1:HighLevel/L->H Edge, 0:LowLevel/H->L Edge)"] pub mod irq_evt; -#[doc = "IRQ_ENB register accessor: an alias for `Reg`"] -pub type IRQ_ENB = crate::Reg; +#[doc = "IRQ_ENB (rw) register accessor: Interrupt Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_enb::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`irq_enb::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_enb`] +module"] +#[doc(alias = "IRQ_ENB")] +pub type IrqEnb = crate::Reg; #[doc = "Interrupt Enable Register"] pub mod irq_enb; -#[doc = "IRQ_RAW register accessor: an alias for `Reg`"] -pub type IRQ_RAW = crate::Reg; +#[doc = "IRQ_RAW (r) register accessor: Raw Interrupt Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_raw::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_raw`] +module"] +#[doc(alias = "IRQ_RAW")] +pub type IrqRaw = crate::Reg; #[doc = "Raw Interrupt Status"] pub mod irq_raw; -#[doc = "IRQ_END register accessor: an alias for `Reg`"] -pub type IRQ_END = crate::Reg; +#[doc = "IRQ_END (r) register accessor: Masked Interrupt Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_end::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_end`] +module"] +#[doc(alias = "IRQ_END")] +pub type IrqEnd = crate::Reg; #[doc = "Masked Interrupt Status"] pub mod irq_end; -#[doc = "EDGE_STATUS register accessor: an alias for `Reg`"] -pub type EDGE_STATUS = crate::Reg; +#[doc = "EDGE_STATUS (rw) register accessor: Edge Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`edge_status::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`edge_status::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@edge_status`] +module"] +#[doc(alias = "EDGE_STATUS")] +pub type EdgeStatus = crate::Reg; #[doc = "Edge Status Register"] pub mod edge_status; -#[doc = "PERID register accessor: an alias for `Reg`"] -pub type PERID = crate::Reg; +#[doc = "PERID (r) register accessor: Peripheral ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`perid::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@perid`] +module"] +#[doc(alias = "PERID")] +pub type Perid = crate::Reg; #[doc = "Peripheral ID Register"] pub mod perid; diff --git a/va416xx/src/porta/clrout.rs b/va416xx/src/porta/clrout.rs deleted file mode 100644 index 5403a54..0000000 --- a/va416xx/src/porta/clrout.rs +++ /dev/null @@ -1,45 +0,0 @@ -#[doc = "Register `CLROUT` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -impl W { - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "Clear Out Register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [clrout](index.html) module"] -pub struct CLROUT_SPEC; -impl crate::RegisterSpec for CLROUT_SPEC { - type Ux = u32; -} -#[doc = "`write(|w| ..)` method takes [clrout::W](W) writer structure"] -impl crate::Writable for CLROUT_SPEC { - type Writer = W; -} -#[doc = "`reset()` method sets CLROUT to value 0"] -impl crate::Resettable for CLROUT_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } -} diff --git a/va416xx/src/porta/clroutbyte.rs b/va416xx/src/porta/clroutbyte.rs deleted file mode 100644 index 37425a8..0000000 --- a/va416xx/src/porta/clroutbyte.rs +++ /dev/null @@ -1,46 +0,0 @@ -#[doc = "Register `CLROUTBYTE[%s]` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -impl W { - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u8) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "Clear Out Register by Byte\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [clroutbyte](index.html) module"] -pub struct CLROUTBYTE_SPEC; -impl crate::RegisterSpec for CLROUTBYTE_SPEC { - type Ux = u8; -} -#[doc = "`write(|w| ..)` method takes [clroutbyte::W](W) writer structure"] -impl crate::Writable for CLROUTBYTE_SPEC { - type Writer = W; -} -#[doc = "`reset()` method sets CLROUTBYTE[%s] -to value 0"] -impl crate::Resettable for CLROUTBYTE_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } -} diff --git a/va416xx/src/porta/datain.rs b/va416xx/src/porta/datain.rs index 0516acf..5f6a720 100644 --- a/va416xx/src/porta/datain.rs +++ b/va416xx/src/porta/datain.rs @@ -1,31 +1,18 @@ #[doc = "Register `DATAIN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 +pub type R = crate::R; +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) } } -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Data In Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [datain](index.html) module"] -pub struct DATAIN_SPEC; -impl crate::RegisterSpec for DATAIN_SPEC { +#[doc = "Data In Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`datain::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DatainSpec; +impl crate::RegisterSpec for DatainSpec { type Ux = u32; } -#[doc = "`read()` method returns [datain::R](R) reader structure"] -impl crate::Readable for DATAIN_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`datain::R`](R) reader structure"] +impl crate::Readable for DatainSpec {} #[doc = "`reset()` method sets DATAIN to value 0"] -impl crate::Resettable for DATAIN_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for DatainSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/porta/datainbyte.rs b/va416xx/src/porta/datainbyte.rs index f738545..06d7f67 100644 --- a/va416xx/src/porta/datainbyte.rs +++ b/va416xx/src/porta/datainbyte.rs @@ -1,32 +1,19 @@ #[doc = "Register `DATAINBYTE[%s]` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 +pub type R = crate::R; +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) } } -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Data In Register by Byte\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [datainbyte](index.html) module"] -pub struct DATAINBYTE_SPEC; -impl crate::RegisterSpec for DATAINBYTE_SPEC { +#[doc = "Data In Register by Byte\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`datainbyte::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DatainbyteSpec; +impl crate::RegisterSpec for DatainbyteSpec { type Ux = u8; } -#[doc = "`read()` method returns [datainbyte::R](R) reader structure"] -impl crate::Readable for DATAINBYTE_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`datainbyte::R`](R) reader structure"] +impl crate::Readable for DatainbyteSpec {} #[doc = "`reset()` method sets DATAINBYTE[%s] to value 0"] -impl crate::Resettable for DATAINBYTE_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for DatainbyteSpec { + const RESET_VALUE: u8 = 0; } diff --git a/va416xx/src/porta/datainraw.rs b/va416xx/src/porta/datainraw.rs deleted file mode 100644 index 5956914..0000000 --- a/va416xx/src/porta/datainraw.rs +++ /dev/null @@ -1,31 +0,0 @@ -#[doc = "Register `DATAINRAW` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Data In Raw Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [datainraw](index.html) module"] -pub struct DATAINRAW_SPEC; -impl crate::RegisterSpec for DATAINRAW_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [datainraw::R](R) reader structure"] -impl crate::Readable for DATAINRAW_SPEC { - type Reader = R; -} -#[doc = "`reset()` method sets DATAINRAW to value 0"] -impl crate::Resettable for DATAINRAW_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } -} diff --git a/va416xx/src/porta/datainrawbyte.rs b/va416xx/src/porta/datainrawbyte.rs deleted file mode 100644 index f88f98f..0000000 --- a/va416xx/src/porta/datainrawbyte.rs +++ /dev/null @@ -1,32 +0,0 @@ -#[doc = "Register `DATAINRAWBYTE[%s]` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Data In Raw Register by Byte\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [datainrawbyte](index.html) module"] -pub struct DATAINRAWBYTE_SPEC; -impl crate::RegisterSpec for DATAINRAWBYTE_SPEC { - type Ux = u8; -} -#[doc = "`read()` method returns [datainrawbyte::R](R) reader structure"] -impl crate::Readable for DATAINRAWBYTE_SPEC { - type Reader = R; -} -#[doc = "`reset()` method sets DATAINRAWBYTE[%s] -to value 0"] -impl crate::Resettable for DATAINRAWBYTE_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } -} diff --git a/va416xx/src/porta/datamask.rs b/va416xx/src/porta/datamask.rs index c40ee37..6df9aac 100644 --- a/va416xx/src/porta/datamask.rs +++ b/va416xx/src/porta/datamask.rs @@ -1,64 +1,27 @@ #[doc = "Register `DATAMASK` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DATAMASK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 +pub type W = crate::W; +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) } } -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -impl W { - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "Data mask Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [datamask](index.html) module"] -pub struct DATAMASK_SPEC; -impl crate::RegisterSpec for DATAMASK_SPEC { +impl W {} +#[doc = "Data mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`datamask::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`datamask::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DatamaskSpec; +impl crate::RegisterSpec for DatamaskSpec { type Ux = u32; } -#[doc = "`read()` method returns [datamask::R](R) reader structure"] -impl crate::Readable for DATAMASK_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [datamask::W](W) writer structure"] -impl crate::Writable for DATAMASK_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`datamask::R`](R) reader structure"] +impl crate::Readable for DatamaskSpec {} +#[doc = "`write(|w| ..)` method takes [`datamask::W`](W) writer structure"] +impl crate::Writable for DatamaskSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATAMASK to value 0"] -impl crate::Resettable for DATAMASK_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for DatamaskSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/porta/datamaskbyte.rs b/va416xx/src/porta/datamaskbyte.rs index 7f31ded..29ecd88 100644 --- a/va416xx/src/porta/datamaskbyte.rs +++ b/va416xx/src/porta/datamaskbyte.rs @@ -1,65 +1,28 @@ #[doc = "Register `DATAMASKBYTE[%s]` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DATAMASKBYTE[%s]` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 +pub type W = crate::W; +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) } } -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -impl W { - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u8) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "Data Out Register by Byte\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [datamaskbyte](index.html) module"] -pub struct DATAMASKBYTE_SPEC; -impl crate::RegisterSpec for DATAMASKBYTE_SPEC { +impl W {} +#[doc = "Data Out Register by Byte\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`datamaskbyte::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`datamaskbyte::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DatamaskbyteSpec; +impl crate::RegisterSpec for DatamaskbyteSpec { type Ux = u8; } -#[doc = "`read()` method returns [datamaskbyte::R](R) reader structure"] -impl crate::Readable for DATAMASKBYTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [datamaskbyte::W](W) writer structure"] -impl crate::Writable for DATAMASKBYTE_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`datamaskbyte::R`](R) reader structure"] +impl crate::Readable for DatamaskbyteSpec {} +#[doc = "`write(|w| ..)` method takes [`datamaskbyte::W`](W) writer structure"] +impl crate::Writable for DatamaskbyteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u8 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u8 = 0; } #[doc = "`reset()` method sets DATAMASKBYTE[%s] to value 0"] -impl crate::Resettable for DATAMASKBYTE_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for DatamaskbyteSpec { + const RESET_VALUE: u8 = 0; } diff --git a/va416xx/src/porta/dataout.rs b/va416xx/src/porta/dataout.rs index c1f270f..6250016 100644 --- a/va416xx/src/porta/dataout.rs +++ b/va416xx/src/porta/dataout.rs @@ -1,45 +1,23 @@ #[doc = "Register `DATAOUT` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 +pub type W = crate::W; +impl core::fmt::Debug for crate::generic::Reg { + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { + write!(f, "(not readable)") } } -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -impl W { - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "Data Out Register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dataout](index.html) module"] -pub struct DATAOUT_SPEC; -impl crate::RegisterSpec for DATAOUT_SPEC { +impl W {} +#[doc = "Data Out Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dataout::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DataoutSpec; +impl crate::RegisterSpec for DataoutSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [dataout::W](W) writer structure"] -impl crate::Writable for DATAOUT_SPEC { - type Writer = W; +#[doc = "`write(|w| ..)` method takes [`dataout::W`](W) writer structure"] +impl crate::Writable for DataoutSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATAOUT to value 0"] -impl crate::Resettable for DATAOUT_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for DataoutSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/porta/dataoutbyte.rs b/va416xx/src/porta/dataoutbyte.rs index df478cd..a712f13 100644 --- a/va416xx/src/porta/dataoutbyte.rs +++ b/va416xx/src/porta/dataoutbyte.rs @@ -1,46 +1,24 @@ #[doc = "Register `DATAOUTBYTE[%s]` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 +pub type W = crate::W; +impl core::fmt::Debug for crate::generic::Reg { + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { + write!(f, "(not readable)") } } -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -impl W { - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u8) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "Data Out Register by Byte\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dataoutbyte](index.html) module"] -pub struct DATAOUTBYTE_SPEC; -impl crate::RegisterSpec for DATAOUTBYTE_SPEC { +impl W {} +#[doc = "Data Out Register by Byte\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dataoutbyte::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DataoutbyteSpec; +impl crate::RegisterSpec for DataoutbyteSpec { type Ux = u8; } -#[doc = "`write(|w| ..)` method takes [dataoutbyte::W](W) writer structure"] -impl crate::Writable for DATAOUTBYTE_SPEC { - type Writer = W; +#[doc = "`write(|w| ..)` method takes [`dataoutbyte::W`](W) writer structure"] +impl crate::Writable for DataoutbyteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u8 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u8 = 0; } #[doc = "`reset()` method sets DATAOUTBYTE[%s] to value 0"] -impl crate::Resettable for DATAOUTBYTE_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for DataoutbyteSpec { + const RESET_VALUE: u8 = 0; } diff --git a/va416xx/src/porta/dataoutraw.rs b/va416xx/src/porta/dataoutraw.rs deleted file mode 100644 index f0535c6..0000000 --- a/va416xx/src/porta/dataoutraw.rs +++ /dev/null @@ -1,45 +0,0 @@ -#[doc = "Register `DATAOUTRAW` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -impl W { - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "Data Out Register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dataoutraw](index.html) module"] -pub struct DATAOUTRAW_SPEC; -impl crate::RegisterSpec for DATAOUTRAW_SPEC { - type Ux = u32; -} -#[doc = "`write(|w| ..)` method takes [dataoutraw::W](W) writer structure"] -impl crate::Writable for DATAOUTRAW_SPEC { - type Writer = W; -} -#[doc = "`reset()` method sets DATAOUTRAW to value 0"] -impl crate::Resettable for DATAOUTRAW_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } -} diff --git a/va416xx/src/porta/dataoutrawbyte.rs b/va416xx/src/porta/dataoutrawbyte.rs deleted file mode 100644 index 09b971d..0000000 --- a/va416xx/src/porta/dataoutrawbyte.rs +++ /dev/null @@ -1,46 +0,0 @@ -#[doc = "Register `DATAOUTRAWBYTE[%s]` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -impl W { - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u8) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "Data Out Register by Byte\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dataoutrawbyte](index.html) module"] -pub struct DATAOUTRAWBYTE_SPEC; -impl crate::RegisterSpec for DATAOUTRAWBYTE_SPEC { - type Ux = u8; -} -#[doc = "`write(|w| ..)` method takes [dataoutrawbyte::W](W) writer structure"] -impl crate::Writable for DATAOUTRAWBYTE_SPEC { - type Writer = W; -} -#[doc = "`reset()` method sets DATAOUTRAWBYTE[%s] -to value 0"] -impl crate::Resettable for DATAOUTRAWBYTE_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } -} diff --git a/va416xx/src/porta/delay1.rs b/va416xx/src/porta/delay1.rs deleted file mode 100644 index 643c113..0000000 --- a/va416xx/src/porta/delay1.rs +++ /dev/null @@ -1,64 +0,0 @@ -#[doc = "Register `DELAY1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Register `DELAY1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -impl W { - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "Delay1 Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [delay1](index.html) module"] -pub struct DELAY1_SPEC; -impl crate::RegisterSpec for DELAY1_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [delay1::R](R) reader structure"] -impl crate::Readable for DELAY1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [delay1::W](W) writer structure"] -impl crate::Writable for DELAY1_SPEC { - type Writer = W; -} -#[doc = "`reset()` method sets DELAY1 to value 0"] -impl crate::Resettable for DELAY1_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } -} diff --git a/va416xx/src/porta/delay1byte.rs b/va416xx/src/porta/delay1byte.rs deleted file mode 100644 index 4d3324e..0000000 --- a/va416xx/src/porta/delay1byte.rs +++ /dev/null @@ -1,65 +0,0 @@ -#[doc = "Register `DELAY1BYTE[%s]` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Register `DELAY1BYTE[%s]` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -impl W { - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u8) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "Delay1 Register by Byte\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [delay1byte](index.html) module"] -pub struct DELAY1BYTE_SPEC; -impl crate::RegisterSpec for DELAY1BYTE_SPEC { - type Ux = u8; -} -#[doc = "`read()` method returns [delay1byte::R](R) reader structure"] -impl crate::Readable for DELAY1BYTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [delay1byte::W](W) writer structure"] -impl crate::Writable for DELAY1BYTE_SPEC { - type Writer = W; -} -#[doc = "`reset()` method sets DELAY1BYTE[%s] -to value 0"] -impl crate::Resettable for DELAY1BYTE_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } -} diff --git a/va416xx/src/porta/delay2.rs b/va416xx/src/porta/delay2.rs deleted file mode 100644 index adc7a7c..0000000 --- a/va416xx/src/porta/delay2.rs +++ /dev/null @@ -1,64 +0,0 @@ -#[doc = "Register `DELAY2` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Register `DELAY2` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -impl W { - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "Delay2 Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [delay2](index.html) module"] -pub struct DELAY2_SPEC; -impl crate::RegisterSpec for DELAY2_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [delay2::R](R) reader structure"] -impl crate::Readable for DELAY2_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [delay2::W](W) writer structure"] -impl crate::Writable for DELAY2_SPEC { - type Writer = W; -} -#[doc = "`reset()` method sets DELAY2 to value 0"] -impl crate::Resettable for DELAY2_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } -} diff --git a/va416xx/src/porta/delay2byte.rs b/va416xx/src/porta/delay2byte.rs deleted file mode 100644 index f4025dc..0000000 --- a/va416xx/src/porta/delay2byte.rs +++ /dev/null @@ -1,65 +0,0 @@ -#[doc = "Register `DELAY2BYTE[%s]` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Register `DELAY2BYTE[%s]` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -impl W { - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u8) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "Delay2 Register by Byte\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [delay2byte](index.html) module"] -pub struct DELAY2BYTE_SPEC; -impl crate::RegisterSpec for DELAY2BYTE_SPEC { - type Ux = u8; -} -#[doc = "`read()` method returns [delay2byte::R](R) reader structure"] -impl crate::Readable for DELAY2BYTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [delay2byte::W](W) writer structure"] -impl crate::Writable for DELAY2BYTE_SPEC { - type Writer = W; -} -#[doc = "`reset()` method sets DELAY2BYTE[%s] -to value 0"] -impl crate::Resettable for DELAY2BYTE_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } -} diff --git a/va416xx/src/porta/dir.rs b/va416xx/src/porta/dir.rs deleted file mode 100644 index eff9075..0000000 --- a/va416xx/src/porta/dir.rs +++ /dev/null @@ -1,64 +0,0 @@ -#[doc = "Register `DIR` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Register `DIR` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -impl W { - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "Direction Register (1:Output, 0:Input)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dir](index.html) module"] -pub struct DIR_SPEC; -impl crate::RegisterSpec for DIR_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [dir::R](R) reader structure"] -impl crate::Readable for DIR_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dir::W](W) writer structure"] -impl crate::Writable for DIR_SPEC { - type Writer = W; -} -#[doc = "`reset()` method sets DIR to value 0"] -impl crate::Resettable for DIR_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } -} diff --git a/va416xx/src/porta/dirbyte.rs b/va416xx/src/porta/dirbyte.rs deleted file mode 100644 index 1f161b4..0000000 --- a/va416xx/src/porta/dirbyte.rs +++ /dev/null @@ -1,65 +0,0 @@ -#[doc = "Register `DIRBYTE[%s]` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Register `DIRBYTE[%s]` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -impl W { - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u8) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "Direction Register by Byte\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dirbyte](index.html) module"] -pub struct DIRBYTE_SPEC; -impl crate::RegisterSpec for DIRBYTE_SPEC { - type Ux = u8; -} -#[doc = "`read()` method returns [dirbyte::R](R) reader structure"] -impl crate::Readable for DIRBYTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dirbyte::W](W) writer structure"] -impl crate::Writable for DIRBYTE_SPEC { - type Writer = W; -} -#[doc = "`reset()` method sets DIRBYTE[%s] -to value 0"] -impl crate::Resettable for DIRBYTE_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } -} diff --git a/va416xx/src/porta/edge_status.rs b/va416xx/src/porta/edge_status.rs index 775bef3..0a90d70 100644 --- a/va416xx/src/porta/edge_status.rs +++ b/va416xx/src/porta/edge_status.rs @@ -1,64 +1,27 @@ #[doc = "Register `EDGE_STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EDGE_STATUS` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 +pub type W = crate::W; +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) } } -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -impl W { - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "Edge Status Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [edge_status](index.html) module"] -pub struct EDGE_STATUS_SPEC; -impl crate::RegisterSpec for EDGE_STATUS_SPEC { +impl W {} +#[doc = "Edge Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`edge_status::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`edge_status::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct EdgeStatusSpec; +impl crate::RegisterSpec for EdgeStatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [edge_status::R](R) reader structure"] -impl crate::Readable for EDGE_STATUS_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [edge_status::W](W) writer structure"] -impl crate::Writable for EDGE_STATUS_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`edge_status::R`](R) reader structure"] +impl crate::Readable for EdgeStatusSpec {} +#[doc = "`write(|w| ..)` method takes [`edge_status::W`](W) writer structure"] +impl crate::Writable for EdgeStatusSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EDGE_STATUS to value 0"] -impl crate::Resettable for EDGE_STATUS_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for EdgeStatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/porta/irq_edge.rs b/va416xx/src/porta/irq_edge.rs index bfe3e68..fddfc1c 100644 --- a/va416xx/src/porta/irq_edge.rs +++ b/va416xx/src/porta/irq_edge.rs @@ -1,64 +1,27 @@ #[doc = "Register `IRQ_EDGE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IRQ_EDGE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 +pub type W = crate::W; +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) } } -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -impl W { - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "Interrupt Both Edge Register (1:Both Edges, 0:Single Edge)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [irq_edge](index.html) module"] -pub struct IRQ_EDGE_SPEC; -impl crate::RegisterSpec for IRQ_EDGE_SPEC { +impl W {} +#[doc = "Interrupt Both Edge Register (1:Both Edges, 0:Single Edge)\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_edge::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`irq_edge::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IrqEdgeSpec; +impl crate::RegisterSpec for IrqEdgeSpec { type Ux = u32; } -#[doc = "`read()` method returns [irq_edge::R](R) reader structure"] -impl crate::Readable for IRQ_EDGE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [irq_edge::W](W) writer structure"] -impl crate::Writable for IRQ_EDGE_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`irq_edge::R`](R) reader structure"] +impl crate::Readable for IrqEdgeSpec {} +#[doc = "`write(|w| ..)` method takes [`irq_edge::W`](W) writer structure"] +impl crate::Writable for IrqEdgeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IRQ_EDGE to value 0"] -impl crate::Resettable for IRQ_EDGE_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for IrqEdgeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/porta/irq_enb.rs b/va416xx/src/porta/irq_enb.rs index b915348..2696b81 100644 --- a/va416xx/src/porta/irq_enb.rs +++ b/va416xx/src/porta/irq_enb.rs @@ -1,64 +1,27 @@ #[doc = "Register `IRQ_ENB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IRQ_ENB` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 +pub type W = crate::W; +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) } } -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -impl W { - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "Interrupt Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [irq_enb](index.html) module"] -pub struct IRQ_ENB_SPEC; -impl crate::RegisterSpec for IRQ_ENB_SPEC { +impl W {} +#[doc = "Interrupt Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_enb::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`irq_enb::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IrqEnbSpec; +impl crate::RegisterSpec for IrqEnbSpec { type Ux = u32; } -#[doc = "`read()` method returns [irq_enb::R](R) reader structure"] -impl crate::Readable for IRQ_ENB_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [irq_enb::W](W) writer structure"] -impl crate::Writable for IRQ_ENB_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`irq_enb::R`](R) reader structure"] +impl crate::Readable for IrqEnbSpec {} +#[doc = "`write(|w| ..)` method takes [`irq_enb::W`](W) writer structure"] +impl crate::Writable for IrqEnbSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IRQ_ENB to value 0"] -impl crate::Resettable for IRQ_ENB_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for IrqEnbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/porta/irq_end.rs b/va416xx/src/porta/irq_end.rs index 8afdac5..cf88a8a 100644 --- a/va416xx/src/porta/irq_end.rs +++ b/va416xx/src/porta/irq_end.rs @@ -1,31 +1,18 @@ #[doc = "Register `IRQ_END` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 +pub type R = crate::R; +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) } } -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Masked Interrupt Status\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [irq_end](index.html) module"] -pub struct IRQ_END_SPEC; -impl crate::RegisterSpec for IRQ_END_SPEC { +#[doc = "Masked Interrupt Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_end::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IrqEndSpec; +impl crate::RegisterSpec for IrqEndSpec { type Ux = u32; } -#[doc = "`read()` method returns [irq_end::R](R) reader structure"] -impl crate::Readable for IRQ_END_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`irq_end::R`](R) reader structure"] +impl crate::Readable for IrqEndSpec {} #[doc = "`reset()` method sets IRQ_END to value 0"] -impl crate::Resettable for IRQ_END_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for IrqEndSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/porta/irq_evt.rs b/va416xx/src/porta/irq_evt.rs index a42470e..1e98fa4 100644 --- a/va416xx/src/porta/irq_evt.rs +++ b/va416xx/src/porta/irq_evt.rs @@ -1,64 +1,27 @@ #[doc = "Register `IRQ_EVT` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IRQ_EVT` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 +pub type W = crate::W; +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) } } -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -impl W { - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "Interrupt Event Register (1:HighLevel/L->H Edge, 0:LowLevel/H->L Edge)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [irq_evt](index.html) module"] -pub struct IRQ_EVT_SPEC; -impl crate::RegisterSpec for IRQ_EVT_SPEC { +impl W {} +#[doc = "Interrupt Event Register (1:HighLevel/L->H Edge, 0:LowLevel/H->L Edge)\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_evt::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`irq_evt::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IrqEvtSpec; +impl crate::RegisterSpec for IrqEvtSpec { type Ux = u32; } -#[doc = "`read()` method returns [irq_evt::R](R) reader structure"] -impl crate::Readable for IRQ_EVT_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [irq_evt::W](W) writer structure"] -impl crate::Writable for IRQ_EVT_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`irq_evt::R`](R) reader structure"] +impl crate::Readable for IrqEvtSpec {} +#[doc = "`write(|w| ..)` method takes [`irq_evt::W`](W) writer structure"] +impl crate::Writable for IrqEvtSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IRQ_EVT to value 0"] -impl crate::Resettable for IRQ_EVT_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for IrqEvtSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/porta/irq_raw.rs b/va416xx/src/porta/irq_raw.rs index bbcaafe..0e153ef 100644 --- a/va416xx/src/porta/irq_raw.rs +++ b/va416xx/src/porta/irq_raw.rs @@ -1,31 +1,18 @@ #[doc = "Register `IRQ_RAW` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 +pub type R = crate::R; +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) } } -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Raw Interrupt Status\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [irq_raw](index.html) module"] -pub struct IRQ_RAW_SPEC; -impl crate::RegisterSpec for IRQ_RAW_SPEC { +#[doc = "Raw Interrupt Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_raw::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IrqRawSpec; +impl crate::RegisterSpec for IrqRawSpec { type Ux = u32; } -#[doc = "`read()` method returns [irq_raw::R](R) reader structure"] -impl crate::Readable for IRQ_RAW_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`irq_raw::R`](R) reader structure"] +impl crate::Readable for IrqRawSpec {} #[doc = "`reset()` method sets IRQ_RAW to value 0"] -impl crate::Resettable for IRQ_RAW_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for IrqRawSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/porta/irq_sen.rs b/va416xx/src/porta/irq_sen.rs index dc0e9c8..5b4c44a 100644 --- a/va416xx/src/porta/irq_sen.rs +++ b/va416xx/src/porta/irq_sen.rs @@ -1,64 +1,27 @@ #[doc = "Register `IRQ_SEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IRQ_SEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 +pub type W = crate::W; +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) } } -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -impl W { - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "Interrupt Sense Register (1:Level Sensitive, 0:Edge Sensitive)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [irq_sen](index.html) module"] -pub struct IRQ_SEN_SPEC; -impl crate::RegisterSpec for IRQ_SEN_SPEC { +impl W {} +#[doc = "Interrupt Sense Register (1:Level Sensitive, 0:Edge Sensitive)\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_sen::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`irq_sen::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IrqSenSpec; +impl crate::RegisterSpec for IrqSenSpec { type Ux = u32; } -#[doc = "`read()` method returns [irq_sen::R](R) reader structure"] -impl crate::Readable for IRQ_SEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [irq_sen::W](W) writer structure"] -impl crate::Writable for IRQ_SEN_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`irq_sen::R`](R) reader structure"] +impl crate::Readable for IrqSenSpec {} +#[doc = "`write(|w| ..)` method takes [`irq_sen::W`](W) writer structure"] +impl crate::Writable for IrqSenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IRQ_SEN to value 0"] -impl crate::Resettable for IRQ_SEN_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for IrqSenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/porta/perid.rs b/va416xx/src/porta/perid.rs index edc93e2..a5e57df 100644 --- a/va416xx/src/porta/perid.rs +++ b/va416xx/src/porta/perid.rs @@ -1,31 +1,18 @@ #[doc = "Register `PERID` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 +pub type R = crate::R; +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) } } -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Peripheral ID Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [perid](index.html) module"] -pub struct PERID_SPEC; -impl crate::RegisterSpec for PERID_SPEC { +#[doc = "Peripheral ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`perid::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PeridSpec; +impl crate::RegisterSpec for PeridSpec { type Ux = u32; } -#[doc = "`read()` method returns [perid::R](R) reader structure"] -impl crate::Readable for PERID_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`perid::R`](R) reader structure"] +impl crate::Readable for PeridSpec {} #[doc = "`reset()` method sets PERID to value 0x0210_07e9"] -impl crate::Resettable for PERID_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0x0210_07e9 - } +impl crate::Resettable for PeridSpec { + const RESET_VALUE: u32 = 0x0210_07e9; } diff --git a/va416xx/src/porta/pulse.rs b/va416xx/src/porta/pulse.rs deleted file mode 100644 index a9ac046..0000000 --- a/va416xx/src/porta/pulse.rs +++ /dev/null @@ -1,64 +0,0 @@ -#[doc = "Register `PULSE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Register `PULSE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -impl W { - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "Pulse Mode Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pulse](index.html) module"] -pub struct PULSE_SPEC; -impl crate::RegisterSpec for PULSE_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [pulse::R](R) reader structure"] -impl crate::Readable for PULSE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [pulse::W](W) writer structure"] -impl crate::Writable for PULSE_SPEC { - type Writer = W; -} -#[doc = "`reset()` method sets PULSE to value 0"] -impl crate::Resettable for PULSE_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } -} diff --git a/va416xx/src/porta/pulsebase.rs b/va416xx/src/porta/pulsebase.rs deleted file mode 100644 index ce11f86..0000000 --- a/va416xx/src/porta/pulsebase.rs +++ /dev/null @@ -1,64 +0,0 @@ -#[doc = "Register `PULSEBASE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Register `PULSEBASE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -impl W { - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "Pulse Base Value Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pulsebase](index.html) module"] -pub struct PULSEBASE_SPEC; -impl crate::RegisterSpec for PULSEBASE_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [pulsebase::R](R) reader structure"] -impl crate::Readable for PULSEBASE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [pulsebase::W](W) writer structure"] -impl crate::Writable for PULSEBASE_SPEC { - type Writer = W; -} -#[doc = "`reset()` method sets PULSEBASE to value 0"] -impl crate::Resettable for PULSEBASE_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } -} diff --git a/va416xx/src/porta/pulsebasebyte.rs b/va416xx/src/porta/pulsebasebyte.rs deleted file mode 100644 index db18ec8..0000000 --- a/va416xx/src/porta/pulsebasebyte.rs +++ /dev/null @@ -1,65 +0,0 @@ -#[doc = "Register `PULSEBASEBYTE[%s]` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Register `PULSEBASEBYTE[%s]` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -impl W { - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u8) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "Pulse Base Mode Register by Byte\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pulsebasebyte](index.html) module"] -pub struct PULSEBASEBYTE_SPEC; -impl crate::RegisterSpec for PULSEBASEBYTE_SPEC { - type Ux = u8; -} -#[doc = "`read()` method returns [pulsebasebyte::R](R) reader structure"] -impl crate::Readable for PULSEBASEBYTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [pulsebasebyte::W](W) writer structure"] -impl crate::Writable for PULSEBASEBYTE_SPEC { - type Writer = W; -} -#[doc = "`reset()` method sets PULSEBASEBYTE[%s] -to value 0"] -impl crate::Resettable for PULSEBASEBYTE_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } -} diff --git a/va416xx/src/porta/pulsebyte.rs b/va416xx/src/porta/pulsebyte.rs deleted file mode 100644 index ce9fe16..0000000 --- a/va416xx/src/porta/pulsebyte.rs +++ /dev/null @@ -1,65 +0,0 @@ -#[doc = "Register `PULSEBYTE[%s]` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Register `PULSEBYTE[%s]` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -impl W { - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u8) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "Pulse Mode Register by Byte\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pulsebyte](index.html) module"] -pub struct PULSEBYTE_SPEC; -impl crate::RegisterSpec for PULSEBYTE_SPEC { - type Ux = u8; -} -#[doc = "`read()` method returns [pulsebyte::R](R) reader structure"] -impl crate::Readable for PULSEBYTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [pulsebyte::W](W) writer structure"] -impl crate::Writable for PULSEBYTE_SPEC { - type Writer = W; -} -#[doc = "`reset()` method sets PULSEBYTE[%s] -to value 0"] -impl crate::Resettable for PULSEBYTE_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } -} diff --git a/va416xx/src/porta/setout.rs b/va416xx/src/porta/setout.rs deleted file mode 100644 index ada3742..0000000 --- a/va416xx/src/porta/setout.rs +++ /dev/null @@ -1,45 +0,0 @@ -#[doc = "Register `SETOUT` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -impl W { - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "Set Out Register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [setout](index.html) module"] -pub struct SETOUT_SPEC; -impl crate::RegisterSpec for SETOUT_SPEC { - type Ux = u32; -} -#[doc = "`write(|w| ..)` method takes [setout::W](W) writer structure"] -impl crate::Writable for SETOUT_SPEC { - type Writer = W; -} -#[doc = "`reset()` method sets SETOUT to value 0"] -impl crate::Resettable for SETOUT_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } -} diff --git a/va416xx/src/porta/setoutbyte.rs b/va416xx/src/porta/setoutbyte.rs deleted file mode 100644 index 5cb0d7f..0000000 --- a/va416xx/src/porta/setoutbyte.rs +++ /dev/null @@ -1,46 +0,0 @@ -#[doc = "Register `SETOUTBYTE[%s]` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -impl W { - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u8) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "Set Out Register by Byte\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [setoutbyte](index.html) module"] -pub struct SETOUTBYTE_SPEC; -impl crate::RegisterSpec for SETOUTBYTE_SPEC { - type Ux = u8; -} -#[doc = "`write(|w| ..)` method takes [setoutbyte::W](W) writer structure"] -impl crate::Writable for SETOUTBYTE_SPEC { - type Writer = W; -} -#[doc = "`reset()` method sets SETOUTBYTE[%s] -to value 0"] -impl crate::Resettable for SETOUTBYTE_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } -} diff --git a/va416xx/src/porta/togout.rs b/va416xx/src/porta/togout.rs deleted file mode 100644 index bfad5d5..0000000 --- a/va416xx/src/porta/togout.rs +++ /dev/null @@ -1,45 +0,0 @@ -#[doc = "Register `TOGOUT` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -impl W { - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "Toggle Out Register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [togout](index.html) module"] -pub struct TOGOUT_SPEC; -impl crate::RegisterSpec for TOGOUT_SPEC { - type Ux = u32; -} -#[doc = "`write(|w| ..)` method takes [togout::W](W) writer structure"] -impl crate::Writable for TOGOUT_SPEC { - type Writer = W; -} -#[doc = "`reset()` method sets TOGOUT to value 0"] -impl crate::Resettable for TOGOUT_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } -} diff --git a/va416xx/src/porta/togoutbyte.rs b/va416xx/src/porta/togoutbyte.rs deleted file mode 100644 index 4ca0528..0000000 --- a/va416xx/src/porta/togoutbyte.rs +++ /dev/null @@ -1,46 +0,0 @@ -#[doc = "Register `TOGOUTBYTE[%s]` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -impl W { - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u8) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "Toggle Out Register by Byte\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [togoutbyte](index.html) module"] -pub struct TOGOUTBYTE_SPEC; -impl crate::RegisterSpec for TOGOUTBYTE_SPEC { - type Ux = u8; -} -#[doc = "`write(|w| ..)` method takes [togoutbyte::W](W) writer structure"] -impl crate::Writable for TOGOUTBYTE_SPEC { - type Writer = W; -} -#[doc = "`reset()` method sets TOGOUTBYTE[%s] -to value 0"] -impl crate::Resettable for TOGOUTBYTE_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } -} diff --git a/va416xx/src/spi0.rs b/va416xx/src/spi0.rs index 8b7607e..e8f0c47 100644 --- a/va416xx/src/spi0.rs +++ b/va416xx/src/spi0.rs @@ -1,89 +1,163 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - #[doc = "0x00 - Control Register 0"] - pub ctrl0: crate::Reg, - #[doc = "0x04 - Control Register 1"] - pub ctrl1: crate::Reg, - #[doc = "0x08 - Data Input/Output"] - pub data: crate::Reg, - #[doc = "0x0c - Status Register"] - pub status: crate::Reg, - #[doc = "0x10 - Clock Pre Scale divide value"] - pub clkprescale: crate::Reg, - #[doc = "0x14 - Interrupt Enable Register"] - pub irq_enb: crate::Reg, - #[doc = "0x18 - Raw Interrupt Status Register"] - pub irq_raw: crate::Reg, - #[doc = "0x1c - Enabled Interrupt Status Register"] - pub irq_end: crate::Reg, - #[doc = "0x20 - Clear Interrupt Status Register"] - pub irq_clr: crate::Reg, - #[doc = "0x24 - Rx FIFO IRQ Trigger Level"] - pub rxfifoirqtrg: crate::Reg, - #[doc = "0x28 - Tx FIFO IRQ Trigger Level"] - pub txfifoirqtrg: crate::Reg, - #[doc = "0x2c - Clear FIFO Register"] - pub fifo_clr: crate::Reg, - #[doc = "0x30 - Internal STATE of SPI Controller"] - pub state: crate::Reg, + ctrl0: Ctrl0, + ctrl1: Ctrl1, + data: Data, + status: Status, + clkprescale: Clkprescale, + irq_enb: IrqEnb, + irq_raw: IrqRaw, + irq_end: IrqEnd, + irq_clr: IrqClr, + rxfifoirqtrg: Rxfifoirqtrg, + txfifoirqtrg: Txfifoirqtrg, + fifo_clr: FifoClr, + state: State, _reserved13: [u8; 0x03c8], - #[doc = "0x3fc - Peripheral ID Register"] - pub perid: crate::Reg, + perid: Perid, } -#[doc = "CTRL0 register accessor: an alias for `Reg`"] -pub type CTRL0 = crate::Reg; +impl RegisterBlock { + #[doc = "0x00 - Control Register 0"] + #[inline(always)] + pub const fn ctrl0(&self) -> &Ctrl0 { + &self.ctrl0 + } + #[doc = "0x04 - Control Register 1"] + #[inline(always)] + pub const fn ctrl1(&self) -> &Ctrl1 { + &self.ctrl1 + } + #[doc = "0x08 - Data Input/Output"] + #[inline(always)] + pub const fn data(&self) -> &Data { + &self.data + } + #[doc = "0x0c - Status Register"] + #[inline(always)] + pub const fn status(&self) -> &Status { + &self.status + } + #[doc = "0x10 - Clock Pre Scale divide value"] + #[inline(always)] + pub const fn clkprescale(&self) -> &Clkprescale { + &self.clkprescale + } + #[doc = "0x14 - Interrupt Enable Register"] + #[inline(always)] + pub const fn irq_enb(&self) -> &IrqEnb { + &self.irq_enb + } + #[doc = "0x18 - Raw Interrupt Status Register"] + #[inline(always)] + pub const fn irq_raw(&self) -> &IrqRaw { + &self.irq_raw + } + #[doc = "0x1c - Enabled Interrupt Status Register"] + #[inline(always)] + pub const fn irq_end(&self) -> &IrqEnd { + &self.irq_end + } + #[doc = "0x20 - Clear Interrupt Status Register"] + #[inline(always)] + pub const fn irq_clr(&self) -> &IrqClr { + &self.irq_clr + } + #[doc = "0x24 - Rx FIFO IRQ Trigger Level"] + #[inline(always)] + pub const fn rxfifoirqtrg(&self) -> &Rxfifoirqtrg { + &self.rxfifoirqtrg + } + #[doc = "0x28 - Tx FIFO IRQ Trigger Level"] + #[inline(always)] + pub const fn txfifoirqtrg(&self) -> &Txfifoirqtrg { + &self.txfifoirqtrg + } + #[doc = "0x2c - Clear FIFO Register"] + #[inline(always)] + pub const fn fifo_clr(&self) -> &FifoClr { + &self.fifo_clr + } + #[doc = "0x30 - Internal STATE of SPI Controller"] + #[inline(always)] + pub const fn state(&self) -> &State { + &self.state + } + #[doc = "0x3fc - Peripheral ID Register"] + #[inline(always)] + pub const fn perid(&self) -> &Perid { + &self.perid + } +} +#[doc = "CTRL0 (rw) register accessor: Control Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctrl0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctrl0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl0`] +module"] +#[doc(alias = "CTRL0")] +pub type Ctrl0 = crate::Reg; #[doc = "Control Register 0"] pub mod ctrl0; -#[doc = "CTRL1 register accessor: an alias for `Reg`"] -pub type CTRL1 = crate::Reg; +#[doc = "CTRL1 (rw) register accessor: Control Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctrl1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctrl1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl1`] +module"] +#[doc(alias = "CTRL1")] +pub type Ctrl1 = crate::Reg; #[doc = "Control Register 1"] pub mod ctrl1; -#[doc = "DATA register accessor: an alias for `Reg`"] -pub type DATA = crate::Reg; +#[doc = "DATA (rw) register accessor: Data Input/Output\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data`] +module"] +#[doc(alias = "DATA")] +pub type Data = crate::Reg; #[doc = "Data Input/Output"] pub mod data; -#[doc = "STATUS register accessor: an alias for `Reg`"] -pub type STATUS = crate::Reg; +#[doc = "STATUS (r) register accessor: Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] +module"] +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "Status Register"] pub mod status; -#[doc = "CLKPRESCALE register accessor: an alias for `Reg`"] -pub type CLKPRESCALE = crate::Reg; +#[doc = "CLKPRESCALE (rw) register accessor: Clock Pre Scale divide value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clkprescale::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clkprescale::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkprescale`] +module"] +#[doc(alias = "CLKPRESCALE")] +pub type Clkprescale = crate::Reg; #[doc = "Clock Pre Scale divide value"] pub mod clkprescale; -#[doc = "IRQ_ENB register accessor: an alias for `Reg`"] -pub type IRQ_ENB = crate::Reg; +#[doc = "IRQ_ENB (rw) register accessor: Interrupt Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_enb::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`irq_enb::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_enb`] +module"] +#[doc(alias = "IRQ_ENB")] +pub type IrqEnb = crate::Reg; #[doc = "Interrupt Enable Register"] pub mod irq_enb; -#[doc = "IRQ_RAW register accessor: an alias for `Reg`"] -pub type IRQ_RAW = crate::Reg; -#[doc = "Raw Interrupt Status Register"] -pub mod irq_raw; -#[doc = "IRQ_END register accessor: an alias for `Reg`"] -pub type IRQ_END = crate::Reg; -#[doc = "Enabled Interrupt Status Register"] -pub mod irq_end; -#[doc = "IRQ_CLR register accessor: an alias for `Reg`"] -pub type IRQ_CLR = crate::Reg; -#[doc = "Clear Interrupt Status Register"] -pub mod irq_clr; -#[doc = "RXFIFOIRQTRG register accessor: an alias for `Reg`"] -pub type RXFIFOIRQTRG = crate::Reg; +pub use irq_enb as irq_raw; +pub use irq_enb as irq_end; +pub use irq_enb as irq_clr; +pub use IrqEnb as IrqRaw; +pub use IrqEnb as IrqEnd; +pub use IrqEnb as IrqClr; +#[doc = "RXFIFOIRQTRG (rw) register accessor: Rx FIFO IRQ Trigger Level\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxfifoirqtrg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rxfifoirqtrg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxfifoirqtrg`] +module"] +#[doc(alias = "RXFIFOIRQTRG")] +pub type Rxfifoirqtrg = crate::Reg; #[doc = "Rx FIFO IRQ Trigger Level"] pub mod rxfifoirqtrg; -#[doc = "TXFIFOIRQTRG register accessor: an alias for `Reg`"] -pub type TXFIFOIRQTRG = crate::Reg; +#[doc = "TXFIFOIRQTRG (rw) register accessor: Tx FIFO IRQ Trigger Level\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txfifoirqtrg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`txfifoirqtrg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txfifoirqtrg`] +module"] +#[doc(alias = "TXFIFOIRQTRG")] +pub type Txfifoirqtrg = crate::Reg; #[doc = "Tx FIFO IRQ Trigger Level"] pub mod txfifoirqtrg; -#[doc = "FIFO_CLR register accessor: an alias for `Reg`"] -pub type FIFO_CLR = crate::Reg; +#[doc = "FIFO_CLR (w) register accessor: Clear FIFO Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fifo_clr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fifo_clr`] +module"] +#[doc(alias = "FIFO_CLR")] +pub type FifoClr = crate::Reg; #[doc = "Clear FIFO Register"] pub mod fifo_clr; -#[doc = "STATE register accessor: an alias for `Reg`"] -pub type STATE = crate::Reg; +#[doc = "STATE (r) register accessor: Internal STATE of SPI Controller\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`state::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@state`] +module"] +#[doc(alias = "STATE")] +pub type State = crate::Reg; #[doc = "Internal STATE of SPI Controller"] pub mod state; -#[doc = "PERID register accessor: an alias for `Reg`"] -pub type PERID = crate::Reg; +#[doc = "PERID (r) register accessor: Peripheral ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`perid::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@perid`] +module"] +#[doc(alias = "PERID")] +pub type Perid = crate::Reg; #[doc = "Peripheral ID Register"] pub mod perid; diff --git a/va416xx/src/spi0/clkprescale.rs b/va416xx/src/spi0/clkprescale.rs index 7159517..ea5249f 100644 --- a/va416xx/src/spi0/clkprescale.rs +++ b/va416xx/src/spi0/clkprescale.rs @@ -1,64 +1,27 @@ #[doc = "Register `CLKPRESCALE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CLKPRESCALE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 +pub type W = crate::W; +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) } } -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -impl W { - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "Clock Pre Scale divide value\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [clkprescale](index.html) module"] -pub struct CLKPRESCALE_SPEC; -impl crate::RegisterSpec for CLKPRESCALE_SPEC { +impl W {} +#[doc = "Clock Pre Scale divide value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clkprescale::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clkprescale::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ClkprescaleSpec; +impl crate::RegisterSpec for ClkprescaleSpec { type Ux = u32; } -#[doc = "`read()` method returns [clkprescale::R](R) reader structure"] -impl crate::Readable for CLKPRESCALE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [clkprescale::W](W) writer structure"] -impl crate::Writable for CLKPRESCALE_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`clkprescale::R`](R) reader structure"] +impl crate::Readable for ClkprescaleSpec {} +#[doc = "`write(|w| ..)` method takes [`clkprescale::W`](W) writer structure"] +impl crate::Writable for ClkprescaleSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CLKPRESCALE to value 0"] -impl crate::Resettable for CLKPRESCALE_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for ClkprescaleSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/spi0/ctrl0.rs b/va416xx/src/spi0/ctrl0.rs index 143e388..4e41012 100644 --- a/va416xx/src/spi0/ctrl0.rs +++ b/va416xx/src/spi0/ctrl0.rs @@ -1,234 +1,85 @@ #[doc = "Register `CTRL0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CTRL0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SIZE` reader - Data Size(0x3=>4, 0xf=>16)"] -pub struct SIZE_R(crate::FieldReader); -impl SIZE_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - SIZE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for SIZE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type SizeR = crate::FieldReader; #[doc = "Field `SIZE` writer - Data Size(0x3=>4, 0xf=>16)"] -pub struct SIZE_W<'a> { - w: &'a mut W, -} -impl<'a> SIZE_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0x0f) | (value as u32 & 0x0f); - self.w - } -} +pub type SizeW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `SPO` reader - SPI Clock Polarity"] -pub struct SPO_R(crate::FieldReader); -impl SPO_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - SPO_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for SPO_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type SpoR = crate::BitReader; #[doc = "Field `SPO` writer - SPI Clock Polarity"] -pub struct SPO_W<'a> { - w: &'a mut W, -} -impl<'a> SPO_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); - self.w - } -} +pub type SpoW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPH` reader - SPI Clock Phase"] -pub struct SPH_R(crate::FieldReader); -impl SPH_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - SPH_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for SPH_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type SphR = crate::BitReader; #[doc = "Field `SPH` writer - SPI Clock Phase"] -pub struct SPH_W<'a> { - w: &'a mut W, -} -impl<'a> SPH_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); - self.w - } -} +pub type SphW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SCRDV` reader - Serial Clock Rate divide+1 value"] -pub struct SCRDV_R(crate::FieldReader); -impl SCRDV_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - SCRDV_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for SCRDV_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type ScrdvR = crate::FieldReader; #[doc = "Field `SCRDV` writer - Serial Clock Rate divide+1 value"] -pub struct SCRDV_W<'a> { - w: &'a mut W, -} -impl<'a> SCRDV_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0xff << 8)) | ((value as u32 & 0xff) << 8); - self.w - } -} +pub type ScrdvW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:3 - Data Size(0x3=>4, 0xf=>16)"] #[inline(always)] - pub fn size(&self) -> SIZE_R { - SIZE_R::new((self.bits & 0x0f) as u8) + pub fn size(&self) -> SizeR { + SizeR::new((self.bits & 0x0f) as u8) } #[doc = "Bit 6 - SPI Clock Polarity"] #[inline(always)] - pub fn spo(&self) -> SPO_R { - SPO_R::new(((self.bits >> 6) & 0x01) != 0) + pub fn spo(&self) -> SpoR { + SpoR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - SPI Clock Phase"] #[inline(always)] - pub fn sph(&self) -> SPH_R { - SPH_R::new(((self.bits >> 7) & 0x01) != 0) + pub fn sph(&self) -> SphR { + SphR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bits 8:15 - Serial Clock Rate divide+1 value"] #[inline(always)] - pub fn scrdv(&self) -> SCRDV_R { - SCRDV_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn scrdv(&self) -> ScrdvR { + ScrdvR::new(((self.bits >> 8) & 0xff) as u8) } } impl W { #[doc = "Bits 0:3 - Data Size(0x3=>4, 0xf=>16)"] #[inline(always)] - pub fn size(&mut self) -> SIZE_W { - SIZE_W { w: self } + #[must_use] + pub fn size(&mut self) -> SizeW { + SizeW::new(self, 0) } #[doc = "Bit 6 - SPI Clock Polarity"] #[inline(always)] - pub fn spo(&mut self) -> SPO_W { - SPO_W { w: self } + #[must_use] + pub fn spo(&mut self) -> SpoW { + SpoW::new(self, 6) } #[doc = "Bit 7 - SPI Clock Phase"] #[inline(always)] - pub fn sph(&mut self) -> SPH_W { - SPH_W { w: self } + #[must_use] + pub fn sph(&mut self) -> SphW { + SphW::new(self, 7) } #[doc = "Bits 8:15 - Serial Clock Rate divide+1 value"] #[inline(always)] - pub fn scrdv(&mut self) -> SCRDV_W { - SCRDV_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn scrdv(&mut self) -> ScrdvW { + ScrdvW::new(self, 8) } } -#[doc = "Control Register 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl0](index.html) module"] -pub struct CTRL0_SPEC; -impl crate::RegisterSpec for CTRL0_SPEC { +#[doc = "Control Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctrl0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctrl0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ctrl0Spec; +impl crate::RegisterSpec for Ctrl0Spec { type Ux = u32; } -#[doc = "`read()` method returns [ctrl0::R](R) reader structure"] -impl crate::Readable for CTRL0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ctrl0::W](W) writer structure"] -impl crate::Writable for CTRL0_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`ctrl0::R`](R) reader structure"] +impl crate::Readable for Ctrl0Spec {} +#[doc = "`write(|w| ..)` method takes [`ctrl0::W`](W) writer structure"] +impl crate::Writable for Ctrl0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTRL0 to value 0"] -impl crate::Resettable for CTRL0_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Ctrl0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/spi0/ctrl1.rs b/va416xx/src/spi0/ctrl1.rs index fca0c46..45d9ec8 100644 --- a/va416xx/src/spi0/ctrl1.rs +++ b/va416xx/src/spi0/ctrl1.rs @@ -1,526 +1,175 @@ #[doc = "Register `CTRL1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CTRL1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `LBM` reader - Loop Back"] -pub struct LBM_R(crate::FieldReader); -impl LBM_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - LBM_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for LBM_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type LbmR = crate::BitReader; #[doc = "Field `LBM` writer - Loop Back"] -pub struct LBM_W<'a> { - w: &'a mut W, -} -impl<'a> LBM_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} +pub type LbmW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ENABLE` reader - Enable"] -pub struct ENABLE_R(crate::FieldReader); -impl ENABLE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - ENABLE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ENABLE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type EnableR = crate::BitReader; #[doc = "Field `ENABLE` writer - Enable"] -pub struct ENABLE_W<'a> { - w: &'a mut W, -} -impl<'a> ENABLE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); - self.w - } -} +pub type EnableW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MS` reader - Master/Slave (0:Master, 1:Slave)"] -pub struct MS_R(crate::FieldReader); -impl MS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - MS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for MS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type MsR = crate::BitReader; #[doc = "Field `MS` writer - Master/Slave (0:Master, 1:Slave)"] -pub struct MS_W<'a> { - w: &'a mut W, -} -impl<'a> MS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); - self.w - } -} +pub type MsW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SOD` reader - Slave output Disable"] -pub struct SOD_R(crate::FieldReader); -impl SOD_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - SOD_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for SOD_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type SodR = crate::BitReader; #[doc = "Field `SOD` writer - Slave output Disable"] -pub struct SOD_W<'a> { - w: &'a mut W, -} -impl<'a> SOD_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); - self.w - } -} +pub type SodW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SS` reader - Slave Select"] -pub struct SS_R(crate::FieldReader); -impl SS_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - SS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for SS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type SsR = crate::FieldReader; #[doc = "Field `SS` writer - Slave Select"] -pub struct SS_W<'a> { - w: &'a mut W, -} -impl<'a> SS_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x07 << 4)) | ((value as u32 & 0x07) << 4); - self.w - } -} +pub type SsW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `BLOCKMODE` reader - Block Mode Enable"] -pub struct BLOCKMODE_R(crate::FieldReader); -impl BLOCKMODE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - BLOCKMODE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BLOCKMODE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type BlockmodeR = crate::BitReader; #[doc = "Field `BLOCKMODE` writer - Block Mode Enable"] -pub struct BLOCKMODE_W<'a> { - w: &'a mut W, -} -impl<'a> BLOCKMODE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); - self.w - } -} +pub type BlockmodeW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BMSTART` reader - Block Mode Start Status Enable"] -pub struct BMSTART_R(crate::FieldReader); -impl BMSTART_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - BMSTART_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BMSTART_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type BmstartR = crate::BitReader; #[doc = "Field `BMSTART` writer - Block Mode Start Status Enable"] -pub struct BMSTART_W<'a> { - w: &'a mut W, -} -impl<'a> BMSTART_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); - self.w - } -} +pub type BmstartW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BMSTALL` reader - Block Mode Stall Enable"] -pub struct BMSTALL_R(crate::FieldReader); -impl BMSTALL_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - BMSTALL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BMSTALL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type BmstallR = crate::BitReader; #[doc = "Field `BMSTALL` writer - Block Mode Stall Enable"] -pub struct BMSTALL_W<'a> { - w: &'a mut W, -} -impl<'a> BMSTALL_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); - self.w - } -} +pub type BmstallW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MDLYCAP` reader - Master Delayed Capture Enable"] -pub struct MDLYCAP_R(crate::FieldReader); -impl MDLYCAP_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - MDLYCAP_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for MDLYCAP_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type MdlycapR = crate::BitReader; #[doc = "Field `MDLYCAP` writer - Master Delayed Capture Enable"] -pub struct MDLYCAP_W<'a> { - w: &'a mut W, -} -impl<'a> MDLYCAP_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); - self.w - } -} +pub type MdlycapW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MTXPAUSE` reader - Master Tx Pause Enable"] -pub struct MTXPAUSE_R(crate::FieldReader); -impl MTXPAUSE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - MTXPAUSE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for MTXPAUSE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type MtxpauseR = crate::BitReader; #[doc = "Field `MTXPAUSE` writer - Master Tx Pause Enable"] -pub struct MTXPAUSE_W<'a> { - w: &'a mut W, -} -impl<'a> MTXPAUSE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); - self.w - } -} +pub type MtxpauseW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Loop Back"] #[inline(always)] - pub fn lbm(&self) -> LBM_R { - LBM_R::new((self.bits & 0x01) != 0) + pub fn lbm(&self) -> LbmR { + LbmR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Enable"] #[inline(always)] - pub fn enable(&self) -> ENABLE_R { - ENABLE_R::new(((self.bits >> 1) & 0x01) != 0) + pub fn enable(&self) -> EnableR { + EnableR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Master/Slave (0:Master, 1:Slave)"] #[inline(always)] - pub fn ms(&self) -> MS_R { - MS_R::new(((self.bits >> 2) & 0x01) != 0) + pub fn ms(&self) -> MsR { + MsR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Slave output Disable"] #[inline(always)] - pub fn sod(&self) -> SOD_R { - SOD_R::new(((self.bits >> 3) & 0x01) != 0) + pub fn sod(&self) -> SodR { + SodR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bits 4:6 - Slave Select"] #[inline(always)] - pub fn ss(&self) -> SS_R { - SS_R::new(((self.bits >> 4) & 0x07) as u8) + pub fn ss(&self) -> SsR { + SsR::new(((self.bits >> 4) & 7) as u8) } #[doc = "Bit 7 - Block Mode Enable"] #[inline(always)] - pub fn blockmode(&self) -> BLOCKMODE_R { - BLOCKMODE_R::new(((self.bits >> 7) & 0x01) != 0) + pub fn blockmode(&self) -> BlockmodeR { + BlockmodeR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Block Mode Start Status Enable"] #[inline(always)] - pub fn bmstart(&self) -> BMSTART_R { - BMSTART_R::new(((self.bits >> 8) & 0x01) != 0) + pub fn bmstart(&self) -> BmstartR { + BmstartR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Block Mode Stall Enable"] #[inline(always)] - pub fn bmstall(&self) -> BMSTALL_R { - BMSTALL_R::new(((self.bits >> 9) & 0x01) != 0) + pub fn bmstall(&self) -> BmstallR { + BmstallR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Master Delayed Capture Enable"] #[inline(always)] - pub fn mdlycap(&self) -> MDLYCAP_R { - MDLYCAP_R::new(((self.bits >> 10) & 0x01) != 0) + pub fn mdlycap(&self) -> MdlycapR { + MdlycapR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Master Tx Pause Enable"] #[inline(always)] - pub fn mtxpause(&self) -> MTXPAUSE_R { - MTXPAUSE_R::new(((self.bits >> 11) & 0x01) != 0) + pub fn mtxpause(&self) -> MtxpauseR { + MtxpauseR::new(((self.bits >> 11) & 1) != 0) } } impl W { #[doc = "Bit 0 - Loop Back"] #[inline(always)] - pub fn lbm(&mut self) -> LBM_W { - LBM_W { w: self } + #[must_use] + pub fn lbm(&mut self) -> LbmW { + LbmW::new(self, 0) } #[doc = "Bit 1 - Enable"] #[inline(always)] - pub fn enable(&mut self) -> ENABLE_W { - ENABLE_W { w: self } + #[must_use] + pub fn enable(&mut self) -> EnableW { + EnableW::new(self, 1) } #[doc = "Bit 2 - Master/Slave (0:Master, 1:Slave)"] #[inline(always)] - pub fn ms(&mut self) -> MS_W { - MS_W { w: self } + #[must_use] + pub fn ms(&mut self) -> MsW { + MsW::new(self, 2) } #[doc = "Bit 3 - Slave output Disable"] #[inline(always)] - pub fn sod(&mut self) -> SOD_W { - SOD_W { w: self } + #[must_use] + pub fn sod(&mut self) -> SodW { + SodW::new(self, 3) } #[doc = "Bits 4:6 - Slave Select"] #[inline(always)] - pub fn ss(&mut self) -> SS_W { - SS_W { w: self } + #[must_use] + pub fn ss(&mut self) -> SsW { + SsW::new(self, 4) } #[doc = "Bit 7 - Block Mode Enable"] #[inline(always)] - pub fn blockmode(&mut self) -> BLOCKMODE_W { - BLOCKMODE_W { w: self } + #[must_use] + pub fn blockmode(&mut self) -> BlockmodeW { + BlockmodeW::new(self, 7) } #[doc = "Bit 8 - Block Mode Start Status Enable"] #[inline(always)] - pub fn bmstart(&mut self) -> BMSTART_W { - BMSTART_W { w: self } + #[must_use] + pub fn bmstart(&mut self) -> BmstartW { + BmstartW::new(self, 8) } #[doc = "Bit 9 - Block Mode Stall Enable"] #[inline(always)] - pub fn bmstall(&mut self) -> BMSTALL_W { - BMSTALL_W { w: self } + #[must_use] + pub fn bmstall(&mut self) -> BmstallW { + BmstallW::new(self, 9) } #[doc = "Bit 10 - Master Delayed Capture Enable"] #[inline(always)] - pub fn mdlycap(&mut self) -> MDLYCAP_W { - MDLYCAP_W { w: self } + #[must_use] + pub fn mdlycap(&mut self) -> MdlycapW { + MdlycapW::new(self, 10) } #[doc = "Bit 11 - Master Tx Pause Enable"] #[inline(always)] - pub fn mtxpause(&mut self) -> MTXPAUSE_W { - MTXPAUSE_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn mtxpause(&mut self) -> MtxpauseW { + MtxpauseW::new(self, 11) } } -#[doc = "Control Register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl1](index.html) module"] -pub struct CTRL1_SPEC; -impl crate::RegisterSpec for CTRL1_SPEC { +#[doc = "Control Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctrl1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctrl1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ctrl1Spec; +impl crate::RegisterSpec for Ctrl1Spec { type Ux = u32; } -#[doc = "`read()` method returns [ctrl1::R](R) reader structure"] -impl crate::Readable for CTRL1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ctrl1::W](W) writer structure"] -impl crate::Writable for CTRL1_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`ctrl1::R`](R) reader structure"] +impl crate::Readable for Ctrl1Spec {} +#[doc = "`write(|w| ..)` method takes [`ctrl1::W`](W) writer structure"] +impl crate::Writable for Ctrl1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTRL1 to value 0"] -impl crate::Resettable for CTRL1_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Ctrl1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/spi0/data.rs b/va416xx/src/spi0/data.rs index 31777b9..30b85c9 100644 --- a/va416xx/src/spi0/data.rs +++ b/va416xx/src/spi0/data.rs @@ -1,64 +1,27 @@ #[doc = "Register `DATA` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DATA` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 +pub type W = crate::W; +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) } } -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -impl W { - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "Data Input/Output\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data](index.html) module"] -pub struct DATA_SPEC; -impl crate::RegisterSpec for DATA_SPEC { +impl W {} +#[doc = "Data Input/Output\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DataSpec; +impl crate::RegisterSpec for DataSpec { type Ux = u32; } -#[doc = "`read()` method returns [data::R](R) reader structure"] -impl crate::Readable for DATA_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [data::W](W) writer structure"] -impl crate::Writable for DATA_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`data::R`](R) reader structure"] +impl crate::Readable for DataSpec {} +#[doc = "`write(|w| ..)` method takes [`data::W`](W) writer structure"] +impl crate::Writable for DataSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA to value 0"] -impl crate::Resettable for DATA_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for DataSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/spi0/fifo_clr.rs b/va416xx/src/spi0/fifo_clr.rs index 3d95fdd..156da87 100644 --- a/va416xx/src/spi0/fifo_clr.rs +++ b/va416xx/src/spi0/fifo_clr.rs @@ -1,99 +1,35 @@ #[doc = "Register `FIFO_CLR` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RXFIFO` writer - Clear Rx FIFO"] -pub struct RXFIFO_W<'a> { - w: &'a mut W, -} -impl<'a> RXFIFO_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} +pub type RxfifoW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXFIFO` writer - Clear Tx FIFO"] -pub struct TXFIFO_W<'a> { - w: &'a mut W, -} -impl<'a> TXFIFO_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); - self.w - } -} +pub type TxfifoW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Clear Rx FIFO"] #[inline(always)] - pub fn rxfifo(&mut self) -> RXFIFO_W { - RXFIFO_W { w: self } + #[must_use] + pub fn rxfifo(&mut self) -> RxfifoW { + RxfifoW::new(self, 0) } #[doc = "Bit 1 - Clear Tx FIFO"] #[inline(always)] - pub fn txfifo(&mut self) -> TXFIFO_W { - TXFIFO_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn txfifo(&mut self) -> TxfifoW { + TxfifoW::new(self, 1) } } -#[doc = "Clear FIFO Register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [fifo_clr](index.html) module"] -pub struct FIFO_CLR_SPEC; -impl crate::RegisterSpec for FIFO_CLR_SPEC { +#[doc = "Clear FIFO Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fifo_clr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct FifoClrSpec; +impl crate::RegisterSpec for FifoClrSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [fifo_clr::W](W) writer structure"] -impl crate::Writable for FIFO_CLR_SPEC { - type Writer = W; +#[doc = "`write(|w| ..)` method takes [`fifo_clr::W`](W) writer structure"] +impl crate::Writable for FifoClrSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets FIFO_CLR to value 0"] -impl crate::Resettable for FIFO_CLR_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for FifoClrSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/spi0/irq_clr.rs b/va416xx/src/spi0/irq_clr.rs deleted file mode 100644 index 14ca32b..0000000 --- a/va416xx/src/spi0/irq_clr.rs +++ /dev/null @@ -1,153 +0,0 @@ -#[doc = "Register `IRQ_CLR` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `RORIM` writer - RX Overrun"] -pub struct RORIM_W<'a> { - w: &'a mut W, -} -impl<'a> RORIM_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} -#[doc = "Field `RTIM` writer - RX Timeout"] -pub struct RTIM_W<'a> { - w: &'a mut W, -} -impl<'a> RTIM_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); - self.w - } -} -#[doc = "Field `RXIM` writer - RX Fifo is at least half full"] -pub struct RXIM_W<'a> { - w: &'a mut W, -} -impl<'a> RXIM_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); - self.w - } -} -#[doc = "Field `TXIM` writer - TX Fifo is at least half empty"] -pub struct TXIM_W<'a> { - w: &'a mut W, -} -impl<'a> TXIM_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); - self.w - } -} -impl W { - #[doc = "Bit 0 - RX Overrun"] - #[inline(always)] - pub fn rorim(&mut self) -> RORIM_W { - RORIM_W { w: self } - } - #[doc = "Bit 1 - RX Timeout"] - #[inline(always)] - pub fn rtim(&mut self) -> RTIM_W { - RTIM_W { w: self } - } - #[doc = "Bit 2 - RX Fifo is at least half full"] - #[inline(always)] - pub fn rxim(&mut self) -> RXIM_W { - RXIM_W { w: self } - } - #[doc = "Bit 3 - TX Fifo is at least half empty"] - #[inline(always)] - pub fn txim(&mut self) -> TXIM_W { - TXIM_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "Clear Interrupt Status Register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [irq_clr](index.html) module"] -pub struct IRQ_CLR_SPEC; -impl crate::RegisterSpec for IRQ_CLR_SPEC { - type Ux = u32; -} -#[doc = "`write(|w| ..)` method takes [irq_clr::W](W) writer structure"] -impl crate::Writable for IRQ_CLR_SPEC { - type Writer = W; -} -#[doc = "`reset()` method sets IRQ_CLR to value 0"] -impl crate::Resettable for IRQ_CLR_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } -} diff --git a/va416xx/src/spi0/irq_enb.rs b/va416xx/src/spi0/irq_enb.rs index ebe47c6..68d93bc 100644 --- a/va416xx/src/spi0/irq_enb.rs +++ b/va416xx/src/spi0/irq_enb.rs @@ -1,254 +1,85 @@ #[doc = "Register `IRQ_ENB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IRQ_ENB` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RORIM` reader - RX Overrun"] -pub struct RORIM_R(crate::FieldReader); -impl RORIM_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RORIM_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RORIM_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type RorimR = crate::BitReader; #[doc = "Field `RORIM` writer - RX Overrun"] -pub struct RORIM_W<'a> { - w: &'a mut W, -} -impl<'a> RORIM_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} +pub type RorimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RTIM` reader - RX Timeout"] -pub struct RTIM_R(crate::FieldReader); -impl RTIM_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RTIM_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RTIM_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type RtimR = crate::BitReader; #[doc = "Field `RTIM` writer - RX Timeout"] -pub struct RTIM_W<'a> { - w: &'a mut W, -} -impl<'a> RTIM_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); - self.w - } -} +pub type RtimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXIM` reader - RX Fifo is at least half full"] -pub struct RXIM_R(crate::FieldReader); -impl RXIM_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXIM_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXIM_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type RximR = crate::BitReader; #[doc = "Field `RXIM` writer - RX Fifo is at least half full"] -pub struct RXIM_W<'a> { - w: &'a mut W, -} -impl<'a> RXIM_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); - self.w - } -} +pub type RximW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXIM` reader - TX Fifo is at least half empty"] -pub struct TXIM_R(crate::FieldReader); -impl TXIM_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXIM_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXIM_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type TximR = crate::BitReader; #[doc = "Field `TXIM` writer - TX Fifo is at least half empty"] -pub struct TXIM_W<'a> { - w: &'a mut W, -} -impl<'a> TXIM_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); - self.w - } -} +pub type TximW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - RX Overrun"] #[inline(always)] - pub fn rorim(&self) -> RORIM_R { - RORIM_R::new((self.bits & 0x01) != 0) + pub fn rorim(&self) -> RorimR { + RorimR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - RX Timeout"] #[inline(always)] - pub fn rtim(&self) -> RTIM_R { - RTIM_R::new(((self.bits >> 1) & 0x01) != 0) + pub fn rtim(&self) -> RtimR { + RtimR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - RX Fifo is at least half full"] #[inline(always)] - pub fn rxim(&self) -> RXIM_R { - RXIM_R::new(((self.bits >> 2) & 0x01) != 0) + pub fn rxim(&self) -> RximR { + RximR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - TX Fifo is at least half empty"] #[inline(always)] - pub fn txim(&self) -> TXIM_R { - TXIM_R::new(((self.bits >> 3) & 0x01) != 0) + pub fn txim(&self) -> TximR { + TximR::new(((self.bits >> 3) & 1) != 0) } } impl W { #[doc = "Bit 0 - RX Overrun"] #[inline(always)] - pub fn rorim(&mut self) -> RORIM_W { - RORIM_W { w: self } + #[must_use] + pub fn rorim(&mut self) -> RorimW { + RorimW::new(self, 0) } #[doc = "Bit 1 - RX Timeout"] #[inline(always)] - pub fn rtim(&mut self) -> RTIM_W { - RTIM_W { w: self } + #[must_use] + pub fn rtim(&mut self) -> RtimW { + RtimW::new(self, 1) } #[doc = "Bit 2 - RX Fifo is at least half full"] #[inline(always)] - pub fn rxim(&mut self) -> RXIM_W { - RXIM_W { w: self } + #[must_use] + pub fn rxim(&mut self) -> RximW { + RximW::new(self, 2) } #[doc = "Bit 3 - TX Fifo is at least half empty"] #[inline(always)] - pub fn txim(&mut self) -> TXIM_W { - TXIM_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn txim(&mut self) -> TximW { + TximW::new(self, 3) } } -#[doc = "Interrupt Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [irq_enb](index.html) module"] -pub struct IRQ_ENB_SPEC; -impl crate::RegisterSpec for IRQ_ENB_SPEC { +#[doc = "Interrupt Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_enb::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`irq_enb::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IrqEnbSpec; +impl crate::RegisterSpec for IrqEnbSpec { type Ux = u32; } -#[doc = "`read()` method returns [irq_enb::R](R) reader structure"] -impl crate::Readable for IRQ_ENB_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [irq_enb::W](W) writer structure"] -impl crate::Writable for IRQ_ENB_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`irq_enb::R`](R) reader structure"] +impl crate::Readable for IrqEnbSpec {} +#[doc = "`write(|w| ..)` method takes [`irq_enb::W`](W) writer structure"] +impl crate::Writable for IrqEnbSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IRQ_ENB to value 0"] -impl crate::Resettable for IRQ_ENB_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for IrqEnbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/spi0/irq_end.rs b/va416xx/src/spi0/irq_end.rs deleted file mode 100644 index 22b34dc..0000000 --- a/va416xx/src/spi0/irq_end.rs +++ /dev/null @@ -1,113 +0,0 @@ -#[doc = "Register `IRQ_END` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Field `RORIM` reader - RX Overrun"] -pub struct RORIM_R(crate::FieldReader); -impl RORIM_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RORIM_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RORIM_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RTIM` reader - RX Timeout"] -pub struct RTIM_R(crate::FieldReader); -impl RTIM_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RTIM_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RTIM_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RXIM` reader - RX Fifo is at least half full"] -pub struct RXIM_R(crate::FieldReader); -impl RXIM_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXIM_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXIM_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TXIM` reader - TX Fifo is at least half empty"] -pub struct TXIM_R(crate::FieldReader); -impl TXIM_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXIM_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXIM_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl R { - #[doc = "Bit 0 - RX Overrun"] - #[inline(always)] - pub fn rorim(&self) -> RORIM_R { - RORIM_R::new((self.bits & 0x01) != 0) - } - #[doc = "Bit 1 - RX Timeout"] - #[inline(always)] - pub fn rtim(&self) -> RTIM_R { - RTIM_R::new(((self.bits >> 1) & 0x01) != 0) - } - #[doc = "Bit 2 - RX Fifo is at least half full"] - #[inline(always)] - pub fn rxim(&self) -> RXIM_R { - RXIM_R::new(((self.bits >> 2) & 0x01) != 0) - } - #[doc = "Bit 3 - TX Fifo is at least half empty"] - #[inline(always)] - pub fn txim(&self) -> TXIM_R { - TXIM_R::new(((self.bits >> 3) & 0x01) != 0) - } -} -#[doc = "Enabled Interrupt Status Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [irq_end](index.html) module"] -pub struct IRQ_END_SPEC; -impl crate::RegisterSpec for IRQ_END_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [irq_end::R](R) reader structure"] -impl crate::Readable for IRQ_END_SPEC { - type Reader = R; -} -#[doc = "`reset()` method sets IRQ_END to value 0"] -impl crate::Resettable for IRQ_END_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } -} diff --git a/va416xx/src/spi0/irq_raw.rs b/va416xx/src/spi0/irq_raw.rs deleted file mode 100644 index bc608c7..0000000 --- a/va416xx/src/spi0/irq_raw.rs +++ /dev/null @@ -1,113 +0,0 @@ -#[doc = "Register `IRQ_RAW` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Field `RORIM` reader - RX Overrun"] -pub struct RORIM_R(crate::FieldReader); -impl RORIM_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RORIM_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RORIM_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RTIM` reader - RX Timeout"] -pub struct RTIM_R(crate::FieldReader); -impl RTIM_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RTIM_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RTIM_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RXIM` reader - RX Fifo is at least half full"] -pub struct RXIM_R(crate::FieldReader); -impl RXIM_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXIM_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXIM_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TXIM` reader - TX Fifo is at least half empty"] -pub struct TXIM_R(crate::FieldReader); -impl TXIM_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXIM_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXIM_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl R { - #[doc = "Bit 0 - RX Overrun"] - #[inline(always)] - pub fn rorim(&self) -> RORIM_R { - RORIM_R::new((self.bits & 0x01) != 0) - } - #[doc = "Bit 1 - RX Timeout"] - #[inline(always)] - pub fn rtim(&self) -> RTIM_R { - RTIM_R::new(((self.bits >> 1) & 0x01) != 0) - } - #[doc = "Bit 2 - RX Fifo is at least half full"] - #[inline(always)] - pub fn rxim(&self) -> RXIM_R { - RXIM_R::new(((self.bits >> 2) & 0x01) != 0) - } - #[doc = "Bit 3 - TX Fifo is at least half empty"] - #[inline(always)] - pub fn txim(&self) -> TXIM_R { - TXIM_R::new(((self.bits >> 3) & 0x01) != 0) - } -} -#[doc = "Raw Interrupt Status Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [irq_raw](index.html) module"] -pub struct IRQ_RAW_SPEC; -impl crate::RegisterSpec for IRQ_RAW_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [irq_raw::R](R) reader structure"] -impl crate::Readable for IRQ_RAW_SPEC { - type Reader = R; -} -#[doc = "`reset()` method sets IRQ_RAW to value 0"] -impl crate::Resettable for IRQ_RAW_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } -} diff --git a/va416xx/src/spi0/perid.rs b/va416xx/src/spi0/perid.rs index 080145f..9d82261 100644 --- a/va416xx/src/spi0/perid.rs +++ b/va416xx/src/spi0/perid.rs @@ -1,31 +1,18 @@ #[doc = "Register `PERID` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 +pub type R = crate::R; +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) } } -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Peripheral ID Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [perid](index.html) module"] -pub struct PERID_SPEC; -impl crate::RegisterSpec for PERID_SPEC { +#[doc = "Peripheral ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`perid::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PeridSpec; +impl crate::RegisterSpec for PeridSpec { type Ux = u32; } -#[doc = "`read()` method returns [perid::R](R) reader structure"] -impl crate::Readable for PERID_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`perid::R`](R) reader structure"] +impl crate::Readable for PeridSpec {} #[doc = "`reset()` method sets PERID to value 0x0213_07e9"] -impl crate::Resettable for PERID_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0x0213_07e9 - } +impl crate::Resettable for PeridSpec { + const RESET_VALUE: u32 = 0x0213_07e9; } diff --git a/va416xx/src/spi0/rxfifoirqtrg.rs b/va416xx/src/spi0/rxfifoirqtrg.rs index fb4d239..46124d5 100644 --- a/va416xx/src/spi0/rxfifoirqtrg.rs +++ b/va416xx/src/spi0/rxfifoirqtrg.rs @@ -1,64 +1,27 @@ #[doc = "Register `RXFIFOIRQTRG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RXFIFOIRQTRG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 +pub type W = crate::W; +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) } } -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -impl W { - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "Rx FIFO IRQ Trigger Level\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxfifoirqtrg](index.html) module"] -pub struct RXFIFOIRQTRG_SPEC; -impl crate::RegisterSpec for RXFIFOIRQTRG_SPEC { +impl W {} +#[doc = "Rx FIFO IRQ Trigger Level\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxfifoirqtrg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rxfifoirqtrg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RxfifoirqtrgSpec; +impl crate::RegisterSpec for RxfifoirqtrgSpec { type Ux = u32; } -#[doc = "`read()` method returns [rxfifoirqtrg::R](R) reader structure"] -impl crate::Readable for RXFIFOIRQTRG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [rxfifoirqtrg::W](W) writer structure"] -impl crate::Writable for RXFIFOIRQTRG_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`rxfifoirqtrg::R`](R) reader structure"] +impl crate::Readable for RxfifoirqtrgSpec {} +#[doc = "`write(|w| ..)` method takes [`rxfifoirqtrg::W`](W) writer structure"] +impl crate::Writable for RxfifoirqtrgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RXFIFOIRQTRG to value 0"] -impl crate::Resettable for RXFIFOIRQTRG_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for RxfifoirqtrgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/spi0/state.rs b/va416xx/src/spi0/state.rs index 266b71a..aaa69d0 100644 --- a/va416xx/src/spi0/state.rs +++ b/va416xx/src/spi0/state.rs @@ -1,31 +1,18 @@ #[doc = "Register `STATE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 +pub type R = crate::R; +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) } } -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Internal STATE of SPI Controller\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [state](index.html) module"] -pub struct STATE_SPEC; -impl crate::RegisterSpec for STATE_SPEC { +#[doc = "Internal STATE of SPI Controller\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`state::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StateSpec; +impl crate::RegisterSpec for StateSpec { type Ux = u32; } -#[doc = "`read()` method returns [state::R](R) reader structure"] -impl crate::Readable for STATE_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`state::R`](R) reader structure"] +impl crate::Readable for StateSpec {} #[doc = "`reset()` method sets STATE to value 0"] -impl crate::Resettable for STATE_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for StateSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/spi0/status.rs b/va416xx/src/spi0/status.rs index 916b025..d076d06 100644 --- a/va416xx/src/spi0/status.rs +++ b/va416xx/src/spi0/status.rs @@ -1,193 +1,71 @@ #[doc = "Register `STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `TFE` reader - Transmit FIFO empty"] -pub struct TFE_R(crate::FieldReader); -impl TFE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TFE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TFE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type TfeR = crate::BitReader; #[doc = "Field `TNF` reader - Transmit FIFO not full"] -pub struct TNF_R(crate::FieldReader); -impl TNF_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TNF_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TNF_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type TnfR = crate::BitReader; #[doc = "Field `RNE` reader - Receive FIFO not empty"] -pub struct RNE_R(crate::FieldReader); -impl RNE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RNE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RNE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type RneR = crate::BitReader; #[doc = "Field `RFF` reader - Receive FIFO Full"] -pub struct RFF_R(crate::FieldReader); -impl RFF_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RFF_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RFF_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type RffR = crate::BitReader; #[doc = "Field `BUSY` reader - Busy"] -pub struct BUSY_R(crate::FieldReader); -impl BUSY_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - BUSY_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BUSY_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type BusyR = crate::BitReader; #[doc = "Field `RXDATAFIRST` reader - Pending Data is first Byte in BLOCKMODE"] -pub struct RXDATAFIRST_R(crate::FieldReader); -impl RXDATAFIRST_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXDATAFIRST_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXDATAFIRST_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type RxdatafirstR = crate::BitReader; #[doc = "Field `RXTRIGGER` reader - RX FIFO Above Trigger Level"] -pub struct RXTRIGGER_R(crate::FieldReader); -impl RXTRIGGER_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXTRIGGER_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXTRIGGER_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type RxtriggerR = crate::BitReader; #[doc = "Field `TXTRIGGER` reader - TX FIFO Below Trigger Level"] -pub struct TXTRIGGER_R(crate::FieldReader); -impl TXTRIGGER_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXTRIGGER_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXTRIGGER_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type TxtriggerR = crate::BitReader; impl R { #[doc = "Bit 0 - Transmit FIFO empty"] #[inline(always)] - pub fn tfe(&self) -> TFE_R { - TFE_R::new((self.bits & 0x01) != 0) + pub fn tfe(&self) -> TfeR { + TfeR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Transmit FIFO not full"] #[inline(always)] - pub fn tnf(&self) -> TNF_R { - TNF_R::new(((self.bits >> 1) & 0x01) != 0) + pub fn tnf(&self) -> TnfR { + TnfR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Receive FIFO not empty"] #[inline(always)] - pub fn rne(&self) -> RNE_R { - RNE_R::new(((self.bits >> 2) & 0x01) != 0) + pub fn rne(&self) -> RneR { + RneR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Receive FIFO Full"] #[inline(always)] - pub fn rff(&self) -> RFF_R { - RFF_R::new(((self.bits >> 3) & 0x01) != 0) + pub fn rff(&self) -> RffR { + RffR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Busy"] #[inline(always)] - pub fn busy(&self) -> BUSY_R { - BUSY_R::new(((self.bits >> 4) & 0x01) != 0) + pub fn busy(&self) -> BusyR { + BusyR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Pending Data is first Byte in BLOCKMODE"] #[inline(always)] - pub fn rxdatafirst(&self) -> RXDATAFIRST_R { - RXDATAFIRST_R::new(((self.bits >> 5) & 0x01) != 0) + pub fn rxdatafirst(&self) -> RxdatafirstR { + RxdatafirstR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - RX FIFO Above Trigger Level"] #[inline(always)] - pub fn rxtrigger(&self) -> RXTRIGGER_R { - RXTRIGGER_R::new(((self.bits >> 6) & 0x01) != 0) + pub fn rxtrigger(&self) -> RxtriggerR { + RxtriggerR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - TX FIFO Below Trigger Level"] #[inline(always)] - pub fn txtrigger(&self) -> TXTRIGGER_R { - TXTRIGGER_R::new(((self.bits >> 7) & 0x01) != 0) + pub fn txtrigger(&self) -> TxtriggerR { + TxtriggerR::new(((self.bits >> 7) & 1) != 0) } } -#[doc = "Status Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +#[doc = "Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [status::R](R) reader structure"] -impl crate::Readable for STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`status::R`](R) reader structure"] +impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0"] -impl crate::Resettable for STATUS_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for StatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/spi0/txfifoirqtrg.rs b/va416xx/src/spi0/txfifoirqtrg.rs index a88c823..0d13e54 100644 --- a/va416xx/src/spi0/txfifoirqtrg.rs +++ b/va416xx/src/spi0/txfifoirqtrg.rs @@ -1,64 +1,27 @@ #[doc = "Register `TXFIFOIRQTRG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TXFIFOIRQTRG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 +pub type W = crate::W; +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) } } -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -impl W { - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "Tx FIFO IRQ Trigger Level\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txfifoirqtrg](index.html) module"] -pub struct TXFIFOIRQTRG_SPEC; -impl crate::RegisterSpec for TXFIFOIRQTRG_SPEC { +impl W {} +#[doc = "Tx FIFO IRQ Trigger Level\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txfifoirqtrg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`txfifoirqtrg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TxfifoirqtrgSpec; +impl crate::RegisterSpec for TxfifoirqtrgSpec { type Ux = u32; } -#[doc = "`read()` method returns [txfifoirqtrg::R](R) reader structure"] -impl crate::Readable for TXFIFOIRQTRG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [txfifoirqtrg::W](W) writer structure"] -impl crate::Writable for TXFIFOIRQTRG_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`txfifoirqtrg::R`](R) reader structure"] +impl crate::Readable for TxfifoirqtrgSpec {} +#[doc = "`write(|w| ..)` method takes [`txfifoirqtrg::W`](W) writer structure"] +impl crate::Writable for TxfifoirqtrgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TXFIFOIRQTRG to value 0"] -impl crate::Resettable for TXFIFOIRQTRG_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for TxfifoirqtrgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/spw.rs b/va416xx/src/spw.rs index 480153d..5e89f66 100644 --- a/va416xx/src/spw.rs +++ b/va416xx/src/spw.rs @@ -1,77 +1,151 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - #[doc = "0x00 - Control Register"] - pub ctrl: crate::Reg, - #[doc = "0x04 - Status/Interrupt Source Register"] - pub sts: crate::Reg, - #[doc = "0x08 - Node Address Register"] - pub defaddr: crate::Reg, - #[doc = "0x0c - Clock Divisor Register"] - pub clkdiv: crate::Reg, - #[doc = "0x10 - Destination Key"] - pub dkey: crate::Reg, - #[doc = "0x14 - Time Code Register"] - pub tc: crate::Reg, - #[doc = "0x18 - Timer and Disconnect Register"] - pub tdr: crate::Reg, + ctrl: Ctrl, + sts: Sts, + defaddr: Defaddr, + clkdiv: Clkdiv, + dkey: Dkey, + tc: Tc, + tdr: Tdr, _reserved7: [u8; 0x04], - #[doc = "0x20 - DMA Control Register"] - pub dmactrl0: crate::Reg, - #[doc = "0x24 - DMA RX Maximum Length Register"] - pub dmamaxlen0: crate::Reg, - #[doc = "0x28 - DMA Transmitter Descriptor Table Address Register"] - pub dmatxdesc0: crate::Reg, - #[doc = "0x2c - DMA Receiver Table Destination Register"] - pub dmarxdesc0: crate::Reg, - #[doc = "0x30 - DMA Receiver Table Address Register"] - pub dmaaddr0: crate::Reg, + dmactrl0: Dmactrl0, + dmamaxlen0: Dmamaxlen0, + dmatxdesc0: Dmatxdesc0, + dmarxdesc0: Dmarxdesc0, + dmaaddr0: Dmaaddr0, } -#[doc = "CTRL register accessor: an alias for `Reg`"] -pub type CTRL = crate::Reg; +impl RegisterBlock { + #[doc = "0x00 - Control Register"] + #[inline(always)] + pub const fn ctrl(&self) -> &Ctrl { + &self.ctrl + } + #[doc = "0x04 - Status/Interrupt Source Register"] + #[inline(always)] + pub const fn sts(&self) -> &Sts { + &self.sts + } + #[doc = "0x08 - Node Address Register"] + #[inline(always)] + pub const fn defaddr(&self) -> &Defaddr { + &self.defaddr + } + #[doc = "0x0c - Clock Divisor Register"] + #[inline(always)] + pub const fn clkdiv(&self) -> &Clkdiv { + &self.clkdiv + } + #[doc = "0x10 - Destination Key"] + #[inline(always)] + pub const fn dkey(&self) -> &Dkey { + &self.dkey + } + #[doc = "0x14 - Time Code Register"] + #[inline(always)] + pub const fn tc(&self) -> &Tc { + &self.tc + } + #[doc = "0x18 - Timer and Disconnect Register"] + #[inline(always)] + pub const fn tdr(&self) -> &Tdr { + &self.tdr + } + #[doc = "0x20 - DMA Control Register"] + #[inline(always)] + pub const fn dmactrl0(&self) -> &Dmactrl0 { + &self.dmactrl0 + } + #[doc = "0x24 - DMA RX Maximum Length Register"] + #[inline(always)] + pub const fn dmamaxlen0(&self) -> &Dmamaxlen0 { + &self.dmamaxlen0 + } + #[doc = "0x28 - DMA Transmitter Descriptor Table Address Register"] + #[inline(always)] + pub const fn dmatxdesc0(&self) -> &Dmatxdesc0 { + &self.dmatxdesc0 + } + #[doc = "0x2c - DMA Receiver Table Destination Register"] + #[inline(always)] + pub const fn dmarxdesc0(&self) -> &Dmarxdesc0 { + &self.dmarxdesc0 + } + #[doc = "0x30 - DMA Receiver Table Address Register"] + #[inline(always)] + pub const fn dmaaddr0(&self) -> &Dmaaddr0 { + &self.dmaaddr0 + } +} +#[doc = "CTRL (rw) register accessor: Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`] +module"] +#[doc(alias = "CTRL")] +pub type Ctrl = crate::Reg; #[doc = "Control Register"] pub mod ctrl; -#[doc = "STS register accessor: an alias for `Reg`"] -pub type STS = crate::Reg; +#[doc = "STS (rw) register accessor: Status/Interrupt Source Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sts::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sts::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sts`] +module"] +#[doc(alias = "STS")] +pub type Sts = crate::Reg; #[doc = "Status/Interrupt Source Register"] pub mod sts; -#[doc = "DEFADDR register accessor: an alias for `Reg`"] -pub type DEFADDR = crate::Reg; +#[doc = "DEFADDR (rw) register accessor: Node Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`defaddr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`defaddr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@defaddr`] +module"] +#[doc(alias = "DEFADDR")] +pub type Defaddr = crate::Reg; #[doc = "Node Address Register"] pub mod defaddr; -#[doc = "CLKDIV register accessor: an alias for `Reg`"] -pub type CLKDIV = crate::Reg; +#[doc = "CLKDIV (rw) register accessor: Clock Divisor Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clkdiv::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clkdiv::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkdiv`] +module"] +#[doc(alias = "CLKDIV")] +pub type Clkdiv = crate::Reg; #[doc = "Clock Divisor Register"] pub mod clkdiv; -#[doc = "DKEY register accessor: an alias for `Reg`"] -pub type DKEY = crate::Reg; +#[doc = "DKEY (rw) register accessor: Destination Key\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dkey::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dkey::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dkey`] +module"] +#[doc(alias = "DKEY")] +pub type Dkey = crate::Reg; #[doc = "Destination Key"] pub mod dkey; -#[doc = "TC register accessor: an alias for `Reg`"] -pub type TC = crate::Reg; +#[doc = "TC (rw) register accessor: Time Code Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tc`] +module"] +#[doc(alias = "TC")] +pub type Tc = crate::Reg; #[doc = "Time Code Register"] pub mod tc; -#[doc = "TDR register accessor: an alias for `Reg`"] -pub type TDR = crate::Reg; +#[doc = "TDR (r) register accessor: Timer and Disconnect Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tdr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tdr`] +module"] +#[doc(alias = "TDR")] +pub type Tdr = crate::Reg; #[doc = "Timer and Disconnect Register"] pub mod tdr; -#[doc = "DMACTRL0 register accessor: an alias for `Reg`"] -pub type DMACTRL0 = crate::Reg; +#[doc = "DMACTRL0 (rw) register accessor: DMA Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dmactrl0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dmactrl0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmactrl0`] +module"] +#[doc(alias = "DMACTRL0")] +pub type Dmactrl0 = crate::Reg; #[doc = "DMA Control Register"] pub mod dmactrl0; -#[doc = "DMAMAXLEN0 register accessor: an alias for `Reg`"] -pub type DMAMAXLEN0 = crate::Reg; +#[doc = "DMAMAXLEN0 (rw) register accessor: DMA RX Maximum Length Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dmamaxlen0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dmamaxlen0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmamaxlen0`] +module"] +#[doc(alias = "DMAMAXLEN0")] +pub type Dmamaxlen0 = crate::Reg; #[doc = "DMA RX Maximum Length Register"] pub mod dmamaxlen0; -#[doc = "DMATXDESC0 register accessor: an alias for `Reg`"] -pub type DMATXDESC0 = crate::Reg; +#[doc = "DMATXDESC0 (rw) register accessor: DMA Transmitter Descriptor Table Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dmatxdesc0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dmatxdesc0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmatxdesc0`] +module"] +#[doc(alias = "DMATXDESC0")] +pub type Dmatxdesc0 = crate::Reg; #[doc = "DMA Transmitter Descriptor Table Address Register"] pub mod dmatxdesc0; -#[doc = "DMARXDESC0 register accessor: an alias for `Reg`"] -pub type DMARXDESC0 = crate::Reg; +#[doc = "DMARXDESC0 (rw) register accessor: DMA Receiver Table Destination Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dmarxdesc0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dmarxdesc0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmarxdesc0`] +module"] +#[doc(alias = "DMARXDESC0")] +pub type Dmarxdesc0 = crate::Reg; #[doc = "DMA Receiver Table Destination Register"] pub mod dmarxdesc0; -#[doc = "DMAADDR0 register accessor: an alias for `Reg`"] -pub type DMAADDR0 = crate::Reg; +#[doc = "DMAADDR0 (rw) register accessor: DMA Receiver Table Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dmaaddr0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dmaaddr0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmaaddr0`] +module"] +#[doc(alias = "DMAADDR0")] +pub type Dmaaddr0 = crate::Reg; #[doc = "DMA Receiver Table Address Register"] pub mod dmaaddr0; diff --git a/va416xx/src/spw/clkdiv.rs b/va416xx/src/spw/clkdiv.rs index 3fa3603..ab8ee77 100644 --- a/va416xx/src/spw/clkdiv.rs +++ b/va416xx/src/spw/clkdiv.rs @@ -1,140 +1,55 @@ #[doc = "Register `CLKDIV` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CLKDIV` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `CLKDIVSTART` reader - 8-bit Clock divisor value used for the clock-divider during startup"] -pub struct CLKDIVSTART_R(crate::FieldReader); -impl CLKDIVSTART_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - CLKDIVSTART_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CLKDIVSTART_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CLKDIVSTART` writer - 8-bit Clock divisor value used for the clock-divider during startup"] -pub struct CLKDIVSTART_W<'a> { - w: &'a mut W, -} -impl<'a> CLKDIVSTART_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0xff << 8)) | ((value as u32 & 0xff) << 8); - self.w - } -} +pub type W = crate::W; #[doc = "Field `CLKDIVRUN` reader - 8-bit Clock divisor value used for the clock-divider when the link-interface is in the run-state"] -pub struct CLKDIVRUN_R(crate::FieldReader); -impl CLKDIVRUN_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - CLKDIVRUN_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CLKDIVRUN_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type ClkdivrunR = crate::FieldReader; #[doc = "Field `CLKDIVRUN` writer - 8-bit Clock divisor value used for the clock-divider when the link-interface is in the run-state"] -pub struct CLKDIVRUN_W<'a> { - w: &'a mut W, -} -impl<'a> CLKDIVRUN_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type ClkdivrunW<'a, REG> = crate::FieldWriter<'a, REG, 8>; +#[doc = "Field `CLKDIVSTART` reader - 8-bit Clock divisor value used for the clock-divider during startup"] +pub type ClkdivstartR = crate::FieldReader; +#[doc = "Field `CLKDIVSTART` writer - 8-bit Clock divisor value used for the clock-divider during startup"] +pub type ClkdivstartW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { - #[doc = "Bits 8:15 - 8-bit Clock divisor value used for the clock-divider during startup"] - #[inline(always)] - pub fn clkdivstart(&self) -> CLKDIVSTART_R { - CLKDIVSTART_R::new(((self.bits >> 8) & 0xff) as u8) - } #[doc = "Bits 0:7 - 8-bit Clock divisor value used for the clock-divider when the link-interface is in the run-state"] #[inline(always)] - pub fn clkdivrun(&self) -> CLKDIVRUN_R { - CLKDIVRUN_R::new((self.bits & 0xff) as u8) + pub fn clkdivrun(&self) -> ClkdivrunR { + ClkdivrunR::new((self.bits & 0xff) as u8) + } + #[doc = "Bits 8:15 - 8-bit Clock divisor value used for the clock-divider during startup"] + #[inline(always)] + pub fn clkdivstart(&self) -> ClkdivstartR { + ClkdivstartR::new(((self.bits >> 8) & 0xff) as u8) } } impl W { - #[doc = "Bits 8:15 - 8-bit Clock divisor value used for the clock-divider during startup"] - #[inline(always)] - pub fn clkdivstart(&mut self) -> CLKDIVSTART_W { - CLKDIVSTART_W { w: self } - } #[doc = "Bits 0:7 - 8-bit Clock divisor value used for the clock-divider when the link-interface is in the run-state"] #[inline(always)] - pub fn clkdivrun(&mut self) -> CLKDIVRUN_W { - CLKDIVRUN_W { w: self } + #[must_use] + pub fn clkdivrun(&mut self) -> ClkdivrunW { + ClkdivrunW::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 8:15 - 8-bit Clock divisor value used for the clock-divider during startup"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn clkdivstart(&mut self) -> ClkdivstartW { + ClkdivstartW::new(self, 8) } } -#[doc = "Clock Divisor Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [clkdiv](index.html) module"] -pub struct CLKDIV_SPEC; -impl crate::RegisterSpec for CLKDIV_SPEC { +#[doc = "Clock Divisor Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clkdiv::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clkdiv::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ClkdivSpec; +impl crate::RegisterSpec for ClkdivSpec { type Ux = u32; } -#[doc = "`read()` method returns [clkdiv::R](R) reader structure"] -impl crate::Readable for CLKDIV_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [clkdiv::W](W) writer structure"] -impl crate::Writable for CLKDIV_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`clkdiv::R`](R) reader structure"] +impl crate::Readable for ClkdivSpec {} +#[doc = "`write(|w| ..)` method takes [`clkdiv::W`](W) writer structure"] +impl crate::Writable for ClkdivSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CLKDIV to value 0x0909"] -impl crate::Resettable for CLKDIV_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0x0909 - } +impl crate::Resettable for ClkdivSpec { + const RESET_VALUE: u32 = 0x0909; } diff --git a/va416xx/src/spw/ctrl.rs b/va416xx/src/spw/ctrl.rs index cd00e1b..097fdd5 100644 --- a/va416xx/src/spw/ctrl.rs +++ b/va416xx/src/spw/ctrl.rs @@ -1,1119 +1,366 @@ #[doc = "Register `CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `RA` reader - Reads as 1 if the RMAP command handler is available"] -pub struct RA_R(crate::FieldReader); -impl RA_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RA_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RA_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RX` reader - Reads as 1 if unaligned writes are available for the receiver"] -pub struct RX_R(crate::FieldReader); -impl RX_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RX_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RX_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RC` reader - Reads as 1 if RMAP CRC is enabled in the core"] -pub struct RC_R(crate::FieldReader); -impl RC_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RC_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RC_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `NCH` reader - Number of DMA Channels minus one"] -pub struct NCH_R(crate::FieldReader); -impl NCH_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - NCH_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for NCH_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `PO` reader - The number of available SpaceWire ports minus one"] -pub struct PO_R(crate::FieldReader); -impl PO_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - PO_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PO_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CC` reader - CCSDS/CCITT CRC-16"] -pub struct CC_R(crate::FieldReader); -impl CC_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CC_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CC_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `ID` reader - Interrupt distribution available"] -pub struct ID_R(crate::FieldReader); -impl ID_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - ID_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ID_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `LE` reader - Loop-back Enable"] -pub struct LE_R(crate::FieldReader); -impl LE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - LE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for LE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `LE` writer - Loop-back Enable"] -pub struct LE_W<'a> { - w: &'a mut W, -} -impl<'a> LE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 22)) | ((value as u32 & 0x01) << 22); - self.w - } -} -#[doc = "Field `PS` reader - Selects the active port when the no port force bit is zero"] -pub struct PS_R(crate::FieldReader); -impl PS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - PS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `PS` writer - Selects the active port when the no port force bit is zero"] -pub struct PS_W<'a> { - w: &'a mut W, -} -impl<'a> PS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 21)) | ((value as u32 & 0x01) << 21); - self.w - } -} -#[doc = "Field `NP` reader - Disable port force"] -pub struct NP_R(crate::FieldReader); -impl NP_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - NP_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for NP_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `NP` writer - Disable port force"] -pub struct NP_W<'a> { - w: &'a mut W, -} -impl<'a> NP_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 20)) | ((value as u32 & 0x01) << 20); - self.w - } -} -#[doc = "Field `PNPA` reader - SpW Plug-and-Play Available"] -pub struct PNPA_R(crate::FieldReader); -impl PNPA_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - PNPA_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PNPA_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RD` reader - If set only one RMAP buffer is used"] -pub struct RD_R(crate::FieldReader); -impl RD_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RD_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RD_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RD` writer - If set only one RMAP buffer is used"] -pub struct RD_W<'a> { - w: &'a mut W, -} -impl<'a> RD_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 17)) | ((value as u32 & 0x01) << 17); - self.w - } -} -#[doc = "Field `RE` reader - Enable RMAP command handler"] -pub struct RE_R(crate::FieldReader); -impl RE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RE` writer - Enable RMAP command handler"] -pub struct RE_W<'a> { - w: &'a mut W, -} -impl<'a> RE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16); - self.w - } -} -#[doc = "Field `PE` reader - SpW Plug-and-Play Enable"] -pub struct PE_R(crate::FieldReader); -impl PE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - PE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `PE` writer - SpW Plug-and-Play Enable"] -pub struct PE_W<'a> { - w: &'a mut W, -} -impl<'a> PE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); - self.w - } -} -#[doc = "Field `TL` reader - Transmitter Enable Lock Control"] -pub struct TL_R(crate::FieldReader); -impl TL_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TL` writer - Transmitter Enable Lock Control"] -pub struct TL_W<'a> { - w: &'a mut W, -} -impl<'a> TL_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); - self.w - } -} -#[doc = "Field `TF` reader - Time-code Flag Filter"] -pub struct TF_R(crate::FieldReader); -impl TF_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TF_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TF_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TF` writer - Time-code Flag Filter"] -pub struct TF_W<'a> { - w: &'a mut W, -} -impl<'a> TF_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); - self.w - } -} -#[doc = "Field `TR` reader - Enable time-code receptions"] -pub struct TR_R(crate::FieldReader); -impl TR_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TR_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TR_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TR` writer - Enable time-code receptions"] -pub struct TR_W<'a> { - w: &'a mut W, -} -impl<'a> TR_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); - self.w - } -} -#[doc = "Field `TT` reader - Enable time-code transmissions"] -pub struct TT_R(crate::FieldReader); -impl TT_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TT` writer - Enable time-code transmissions"] -pub struct TT_W<'a> { - w: &'a mut W, -} -impl<'a> TT_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); - self.w - } -} -#[doc = "Field `LI` reader - Generate interrupt when link error occurs"] -pub struct LI_R(crate::FieldReader); -impl LI_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - LI_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for LI_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `LI` writer - Generate interrupt when link error occurs"] -pub struct LI_W<'a> { - w: &'a mut W, -} -impl<'a> LI_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); - self.w - } -} -#[doc = "Field `TQ` reader - Generate interrupt when a valid time-code is received"] -pub struct TQ_R(crate::FieldReader); -impl TQ_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TQ_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TQ_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TQ` writer - Generate interrupt when a valid time-code is received"] -pub struct TQ_W<'a> { - w: &'a mut W, -} -impl<'a> TQ_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); - self.w - } -} -#[doc = "Field `RS` reader - Make complete reset of the SpaceWire node. Self-clearing"] -pub struct RS_R(crate::FieldReader); -impl RS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RS` writer - Make complete reset of the SpaceWire node. Self-clearing"] -pub struct RS_W<'a> { - w: &'a mut W, -} -impl<'a> RS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); - self.w - } -} -#[doc = "Field `PM` reader - Enable Promiscuous mode"] -pub struct PM_R(crate::FieldReader); -impl PM_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - PM_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PM_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `PM` writer - Enable Promiscuous mode"] -pub struct PM_W<'a> { - w: &'a mut W, -} -impl<'a> PM_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); - self.w - } -} -#[doc = "Field `TI` reader - The host can generate a tick by writing a one to this field"] -pub struct TI_R(crate::FieldReader); -impl TI_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TI_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TI_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TI` writer - The host can generate a tick by writing a one to this field"] -pub struct TI_W<'a> { - w: &'a mut W, -} -impl<'a> TI_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); - self.w - } -} -#[doc = "Field `IE` reader - If set, an interrupt is generated when one or both of bit 8 to 9 is set and its corresponding event occurs"] -pub struct IE_R(crate::FieldReader); -impl IE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - IE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for IE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `IE` writer - If set, an interrupt is generated when one or both of bit 8 to 9 is set and its corresponding event occurs"] -pub struct IE_W<'a> { - w: &'a mut W, -} -impl<'a> IE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); - self.w - } -} -#[doc = "Field `AS` reader - Automatically start the link when a NULL has been received"] -pub struct AS_R(crate::FieldReader); -impl AS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - AS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for AS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `AS` writer - Automatically start the link when a NULL has been received"] -pub struct AS_W<'a> { - w: &'a mut W, -} -impl<'a> AS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); - self.w - } -} -#[doc = "Field `LS` reader - Start the link"] -pub struct LS_R(crate::FieldReader); -impl LS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - LS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for LS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `LS` writer - Start the link"] -pub struct LS_W<'a> { - w: &'a mut W, -} -impl<'a> LS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); - self.w - } -} +pub type W = crate::W; #[doc = "Field `LD` reader - Disable the SpaceWire CODEC"] -pub struct LD_R(crate::FieldReader); -impl LD_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - LD_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for LD_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type LdR = crate::BitReader; #[doc = "Field `LD` writer - Disable the SpaceWire CODEC"] -pub struct LD_W<'a> { - w: &'a mut W, -} -impl<'a> LD_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} +pub type LdW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `LS` reader - Start the link"] +pub type LsR = crate::BitReader; +#[doc = "Field `LS` writer - Start the link"] +pub type LsW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `AS` reader - Automatically start the link when a NULL has been received"] +pub type AsR = crate::BitReader; +#[doc = "Field `AS` writer - Automatically start the link when a NULL has been received"] +pub type AsW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `IE` reader - If set, an interrupt is generated when one or both of bit 8 to 9 is set and its corresponding event occurs"] +pub type IeR = crate::BitReader; +#[doc = "Field `IE` writer - If set, an interrupt is generated when one or both of bit 8 to 9 is set and its corresponding event occurs"] +pub type IeW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TI` reader - The host can generate a tick by writing a one to this field"] +pub type TiR = crate::BitReader; +#[doc = "Field `TI` writer - The host can generate a tick by writing a one to this field"] +pub type TiW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `PM` reader - Enable Promiscuous mode"] +pub type PmR = crate::BitReader; +#[doc = "Field `PM` writer - Enable Promiscuous mode"] +pub type PmW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `RS` reader - Make complete reset of the SpaceWire node. Self-clearing"] +pub type RsR = crate::BitReader; +#[doc = "Field `RS` writer - Make complete reset of the SpaceWire node. Self-clearing"] +pub type RsW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TQ` reader - Generate interrupt when a valid time-code is received"] +pub type TqR = crate::BitReader; +#[doc = "Field `TQ` writer - Generate interrupt when a valid time-code is received"] +pub type TqW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `LI` reader - Generate interrupt when link error occurs"] +pub type LiR = crate::BitReader; +#[doc = "Field `LI` writer - Generate interrupt when link error occurs"] +pub type LiW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TT` reader - Enable time-code transmissions"] +pub type TtR = crate::BitReader; +#[doc = "Field `TT` writer - Enable time-code transmissions"] +pub type TtW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TR` reader - Enable time-code receptions"] +pub type TrR = crate::BitReader; +#[doc = "Field `TR` writer - Enable time-code receptions"] +pub type TrW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TF` reader - Time-code Flag Filter"] +pub type TfR = crate::BitReader; +#[doc = "Field `TF` writer - Time-code Flag Filter"] +pub type TfW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TL` reader - Transmitter Enable Lock Control"] +pub type TlR = crate::BitReader; +#[doc = "Field `TL` writer - Transmitter Enable Lock Control"] +pub type TlW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `PE` reader - SpW Plug-and-Play Enable"] +pub type PeR = crate::BitReader; +#[doc = "Field `PE` writer - SpW Plug-and-Play Enable"] +pub type PeW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `RE` reader - Enable RMAP command handler"] +pub type ReR = crate::BitReader; +#[doc = "Field `RE` writer - Enable RMAP command handler"] +pub type ReW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `RD` reader - If set only one RMAP buffer is used"] +pub type RdR = crate::BitReader; +#[doc = "Field `RD` writer - If set only one RMAP buffer is used"] +pub type RdW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `PNPA` reader - SpW Plug-and-Play Available"] +pub type PnpaR = crate::FieldReader; +#[doc = "Field `NP` reader - Disable port force"] +pub type NpR = crate::BitReader; +#[doc = "Field `NP` writer - Disable port force"] +pub type NpW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `PS` reader - Selects the active port when the no port force bit is zero"] +pub type PsR = crate::BitReader; +#[doc = "Field `PS` writer - Selects the active port when the no port force bit is zero"] +pub type PsW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `LE` reader - Loop-back Enable"] +pub type LeR = crate::BitReader; +#[doc = "Field `LE` writer - Loop-back Enable"] +pub type LeW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `ID` reader - Interrupt distribution available"] +pub type IdR = crate::BitReader; +#[doc = "Field `CC` reader - CCSDS/CCITT CRC-16"] +pub type CcR = crate::BitReader; +#[doc = "Field `PO` reader - The number of available SpaceWire ports minus one"] +pub type PoR = crate::BitReader; +#[doc = "Field `NCH` reader - Number of DMA Channels minus one"] +pub type NchR = crate::FieldReader; +#[doc = "Field `RC` reader - Reads as 1 if RMAP CRC is enabled in the core"] +pub type RcR = crate::BitReader; +#[doc = "Field `RX` reader - Reads as 1 if unaligned writes are available for the receiver"] +pub type RxR = crate::BitReader; +#[doc = "Field `RA` reader - Reads as 1 if the RMAP command handler is available"] +pub type RaR = crate::BitReader; impl R { - #[doc = "Bit 31 - Reads as 1 if the RMAP command handler is available"] + #[doc = "Bit 0 - Disable the SpaceWire CODEC"] #[inline(always)] - pub fn ra(&self) -> RA_R { - RA_R::new(((self.bits >> 31) & 0x01) != 0) + pub fn ld(&self) -> LdR { + LdR::new((self.bits & 1) != 0) } - #[doc = "Bit 30 - Reads as 1 if unaligned writes are available for the receiver"] + #[doc = "Bit 1 - Start the link"] #[inline(always)] - pub fn rx(&self) -> RX_R { - RX_R::new(((self.bits >> 30) & 0x01) != 0) + pub fn ls(&self) -> LsR { + LsR::new(((self.bits >> 1) & 1) != 0) } - #[doc = "Bit 29 - Reads as 1 if RMAP CRC is enabled in the core"] + #[doc = "Bit 2 - Automatically start the link when a NULL has been received"] #[inline(always)] - pub fn rc(&self) -> RC_R { - RC_R::new(((self.bits >> 29) & 0x01) != 0) + pub fn as_(&self) -> AsR { + AsR::new(((self.bits >> 2) & 1) != 0) } - #[doc = "Bits 27:28 - Number of DMA Channels minus one"] + #[doc = "Bit 3 - If set, an interrupt is generated when one or both of bit 8 to 9 is set and its corresponding event occurs"] #[inline(always)] - pub fn nch(&self) -> NCH_R { - NCH_R::new(((self.bits >> 27) & 0x03) as u8) + pub fn ie(&self) -> IeR { + IeR::new(((self.bits >> 3) & 1) != 0) } - #[doc = "Bit 26 - The number of available SpaceWire ports minus one"] + #[doc = "Bit 4 - The host can generate a tick by writing a one to this field"] #[inline(always)] - pub fn po(&self) -> PO_R { - PO_R::new(((self.bits >> 26) & 0x01) != 0) + pub fn ti(&self) -> TiR { + TiR::new(((self.bits >> 4) & 1) != 0) } - #[doc = "Bit 25 - CCSDS/CCITT CRC-16"] + #[doc = "Bit 5 - Enable Promiscuous mode"] #[inline(always)] - pub fn cc(&self) -> CC_R { - CC_R::new(((self.bits >> 25) & 0x01) != 0) + pub fn pm(&self) -> PmR { + PmR::new(((self.bits >> 5) & 1) != 0) } - #[doc = "Bit 24 - Interrupt distribution available"] + #[doc = "Bit 6 - Make complete reset of the SpaceWire node. Self-clearing"] #[inline(always)] - pub fn id(&self) -> ID_R { - ID_R::new(((self.bits >> 24) & 0x01) != 0) + pub fn rs(&self) -> RsR { + RsR::new(((self.bits >> 6) & 1) != 0) } - #[doc = "Bit 22 - Loop-back Enable"] + #[doc = "Bit 8 - Generate interrupt when a valid time-code is received"] #[inline(always)] - pub fn le(&self) -> LE_R { - LE_R::new(((self.bits >> 22) & 0x01) != 0) + pub fn tq(&self) -> TqR { + TqR::new(((self.bits >> 8) & 1) != 0) } - #[doc = "Bit 21 - Selects the active port when the no port force bit is zero"] + #[doc = "Bit 9 - Generate interrupt when link error occurs"] #[inline(always)] - pub fn ps(&self) -> PS_R { - PS_R::new(((self.bits >> 21) & 0x01) != 0) + pub fn li(&self) -> LiR { + LiR::new(((self.bits >> 9) & 1) != 0) } - #[doc = "Bit 20 - Disable port force"] + #[doc = "Bit 10 - Enable time-code transmissions"] #[inline(always)] - pub fn np(&self) -> NP_R { - NP_R::new(((self.bits >> 20) & 0x01) != 0) + pub fn tt(&self) -> TtR { + TtR::new(((self.bits >> 10) & 1) != 0) + } + #[doc = "Bit 11 - Enable time-code receptions"] + #[inline(always)] + pub fn tr(&self) -> TrR { + TrR::new(((self.bits >> 11) & 1) != 0) + } + #[doc = "Bit 12 - Time-code Flag Filter"] + #[inline(always)] + pub fn tf(&self) -> TfR { + TfR::new(((self.bits >> 12) & 1) != 0) + } + #[doc = "Bit 13 - Transmitter Enable Lock Control"] + #[inline(always)] + pub fn tl(&self) -> TlR { + TlR::new(((self.bits >> 13) & 1) != 0) + } + #[doc = "Bit 15 - SpW Plug-and-Play Enable"] + #[inline(always)] + pub fn pe(&self) -> PeR { + PeR::new(((self.bits >> 15) & 1) != 0) + } + #[doc = "Bit 16 - Enable RMAP command handler"] + #[inline(always)] + pub fn re(&self) -> ReR { + ReR::new(((self.bits >> 16) & 1) != 0) + } + #[doc = "Bit 17 - If set only one RMAP buffer is used"] + #[inline(always)] + pub fn rd(&self) -> RdR { + RdR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bits 18:19 - SpW Plug-and-Play Available"] #[inline(always)] - pub fn pnpa(&self) -> PNPA_R { - PNPA_R::new(((self.bits >> 18) & 0x03) as u8) - } - #[doc = "Bit 17 - If set only one RMAP buffer is used"] - #[inline(always)] - pub fn rd(&self) -> RD_R { - RD_R::new(((self.bits >> 17) & 0x01) != 0) - } - #[doc = "Bit 16 - Enable RMAP command handler"] - #[inline(always)] - pub fn re(&self) -> RE_R { - RE_R::new(((self.bits >> 16) & 0x01) != 0) - } - #[doc = "Bit 15 - SpW Plug-and-Play Enable"] - #[inline(always)] - pub fn pe(&self) -> PE_R { - PE_R::new(((self.bits >> 15) & 0x01) != 0) - } - #[doc = "Bit 13 - Transmitter Enable Lock Control"] - #[inline(always)] - pub fn tl(&self) -> TL_R { - TL_R::new(((self.bits >> 13) & 0x01) != 0) - } - #[doc = "Bit 12 - Time-code Flag Filter"] - #[inline(always)] - pub fn tf(&self) -> TF_R { - TF_R::new(((self.bits >> 12) & 0x01) != 0) - } - #[doc = "Bit 11 - Enable time-code receptions"] - #[inline(always)] - pub fn tr(&self) -> TR_R { - TR_R::new(((self.bits >> 11) & 0x01) != 0) - } - #[doc = "Bit 10 - Enable time-code transmissions"] - #[inline(always)] - pub fn tt(&self) -> TT_R { - TT_R::new(((self.bits >> 10) & 0x01) != 0) - } - #[doc = "Bit 9 - Generate interrupt when link error occurs"] - #[inline(always)] - pub fn li(&self) -> LI_R { - LI_R::new(((self.bits >> 9) & 0x01) != 0) - } - #[doc = "Bit 8 - Generate interrupt when a valid time-code is received"] - #[inline(always)] - pub fn tq(&self) -> TQ_R { - TQ_R::new(((self.bits >> 8) & 0x01) != 0) - } - #[doc = "Bit 6 - Make complete reset of the SpaceWire node. Self-clearing"] - #[inline(always)] - pub fn rs(&self) -> RS_R { - RS_R::new(((self.bits >> 6) & 0x01) != 0) - } - #[doc = "Bit 5 - Enable Promiscuous mode"] - #[inline(always)] - pub fn pm(&self) -> PM_R { - PM_R::new(((self.bits >> 5) & 0x01) != 0) - } - #[doc = "Bit 4 - The host can generate a tick by writing a one to this field"] - #[inline(always)] - pub fn ti(&self) -> TI_R { - TI_R::new(((self.bits >> 4) & 0x01) != 0) - } - #[doc = "Bit 3 - If set, an interrupt is generated when one or both of bit 8 to 9 is set and its corresponding event occurs"] - #[inline(always)] - pub fn ie(&self) -> IE_R { - IE_R::new(((self.bits >> 3) & 0x01) != 0) - } - #[doc = "Bit 2 - Automatically start the link when a NULL has been received"] - #[inline(always)] - pub fn as_(&self) -> AS_R { - AS_R::new(((self.bits >> 2) & 0x01) != 0) - } - #[doc = "Bit 1 - Start the link"] - #[inline(always)] - pub fn ls(&self) -> LS_R { - LS_R::new(((self.bits >> 1) & 0x01) != 0) - } - #[doc = "Bit 0 - Disable the SpaceWire CODEC"] - #[inline(always)] - pub fn ld(&self) -> LD_R { - LD_R::new((self.bits & 0x01) != 0) - } -} -impl W { - #[doc = "Bit 22 - Loop-back Enable"] - #[inline(always)] - pub fn le(&mut self) -> LE_W { - LE_W { w: self } - } - #[doc = "Bit 21 - Selects the active port when the no port force bit is zero"] - #[inline(always)] - pub fn ps(&mut self) -> PS_W { - PS_W { w: self } + pub fn pnpa(&self) -> PnpaR { + PnpaR::new(((self.bits >> 18) & 3) as u8) } #[doc = "Bit 20 - Disable port force"] #[inline(always)] - pub fn np(&mut self) -> NP_W { - NP_W { w: self } + pub fn np(&self) -> NpR { + NpR::new(((self.bits >> 20) & 1) != 0) } - #[doc = "Bit 17 - If set only one RMAP buffer is used"] + #[doc = "Bit 21 - Selects the active port when the no port force bit is zero"] #[inline(always)] - pub fn rd(&mut self) -> RD_W { - RD_W { w: self } + pub fn ps(&self) -> PsR { + PsR::new(((self.bits >> 21) & 1) != 0) } - #[doc = "Bit 16 - Enable RMAP command handler"] + #[doc = "Bit 22 - Loop-back Enable"] #[inline(always)] - pub fn re(&mut self) -> RE_W { - RE_W { w: self } + pub fn le(&self) -> LeR { + LeR::new(((self.bits >> 22) & 1) != 0) } - #[doc = "Bit 15 - SpW Plug-and-Play Enable"] + #[doc = "Bit 24 - Interrupt distribution available"] #[inline(always)] - pub fn pe(&mut self) -> PE_W { - PE_W { w: self } + pub fn id(&self) -> IdR { + IdR::new(((self.bits >> 24) & 1) != 0) } - #[doc = "Bit 13 - Transmitter Enable Lock Control"] + #[doc = "Bit 25 - CCSDS/CCITT CRC-16"] #[inline(always)] - pub fn tl(&mut self) -> TL_W { - TL_W { w: self } + pub fn cc(&self) -> CcR { + CcR::new(((self.bits >> 25) & 1) != 0) } - #[doc = "Bit 12 - Time-code Flag Filter"] + #[doc = "Bit 26 - The number of available SpaceWire ports minus one"] #[inline(always)] - pub fn tf(&mut self) -> TF_W { - TF_W { w: self } + pub fn po(&self) -> PoR { + PoR::new(((self.bits >> 26) & 1) != 0) } - #[doc = "Bit 11 - Enable time-code receptions"] + #[doc = "Bits 27:28 - Number of DMA Channels minus one"] #[inline(always)] - pub fn tr(&mut self) -> TR_W { - TR_W { w: self } + pub fn nch(&self) -> NchR { + NchR::new(((self.bits >> 27) & 3) as u8) } - #[doc = "Bit 10 - Enable time-code transmissions"] + #[doc = "Bit 29 - Reads as 1 if RMAP CRC is enabled in the core"] #[inline(always)] - pub fn tt(&mut self) -> TT_W { - TT_W { w: self } + pub fn rc(&self) -> RcR { + RcR::new(((self.bits >> 29) & 1) != 0) } - #[doc = "Bit 9 - Generate interrupt when link error occurs"] + #[doc = "Bit 30 - Reads as 1 if unaligned writes are available for the receiver"] #[inline(always)] - pub fn li(&mut self) -> LI_W { - LI_W { w: self } + pub fn rx(&self) -> RxR { + RxR::new(((self.bits >> 30) & 1) != 0) } - #[doc = "Bit 8 - Generate interrupt when a valid time-code is received"] + #[doc = "Bit 31 - Reads as 1 if the RMAP command handler is available"] #[inline(always)] - pub fn tq(&mut self) -> TQ_W { - TQ_W { w: self } + pub fn ra(&self) -> RaR { + RaR::new(((self.bits >> 31) & 1) != 0) } - #[doc = "Bit 6 - Make complete reset of the SpaceWire node. Self-clearing"] +} +impl W { + #[doc = "Bit 0 - Disable the SpaceWire CODEC"] #[inline(always)] - pub fn rs(&mut self) -> RS_W { - RS_W { w: self } - } - #[doc = "Bit 5 - Enable Promiscuous mode"] - #[inline(always)] - pub fn pm(&mut self) -> PM_W { - PM_W { w: self } - } - #[doc = "Bit 4 - The host can generate a tick by writing a one to this field"] - #[inline(always)] - pub fn ti(&mut self) -> TI_W { - TI_W { w: self } - } - #[doc = "Bit 3 - If set, an interrupt is generated when one or both of bit 8 to 9 is set and its corresponding event occurs"] - #[inline(always)] - pub fn ie(&mut self) -> IE_W { - IE_W { w: self } - } - #[doc = "Bit 2 - Automatically start the link when a NULL has been received"] - #[inline(always)] - pub fn as_(&mut self) -> AS_W { - AS_W { w: self } + #[must_use] + pub fn ld(&mut self) -> LdW { + LdW::new(self, 0) } #[doc = "Bit 1 - Start the link"] #[inline(always)] - pub fn ls(&mut self) -> LS_W { - LS_W { w: self } + #[must_use] + pub fn ls(&mut self) -> LsW { + LsW::new(self, 1) } - #[doc = "Bit 0 - Disable the SpaceWire CODEC"] + #[doc = "Bit 2 - Automatically start the link when a NULL has been received"] #[inline(always)] - pub fn ld(&mut self) -> LD_W { - LD_W { w: self } + #[must_use] + pub fn as_(&mut self) -> AsW { + AsW::new(self, 2) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bit 3 - If set, an interrupt is generated when one or both of bit 8 to 9 is set and its corresponding event occurs"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn ie(&mut self) -> IeW { + IeW::new(self, 3) + } + #[doc = "Bit 4 - The host can generate a tick by writing a one to this field"] + #[inline(always)] + #[must_use] + pub fn ti(&mut self) -> TiW { + TiW::new(self, 4) + } + #[doc = "Bit 5 - Enable Promiscuous mode"] + #[inline(always)] + #[must_use] + pub fn pm(&mut self) -> PmW { + PmW::new(self, 5) + } + #[doc = "Bit 6 - Make complete reset of the SpaceWire node. Self-clearing"] + #[inline(always)] + #[must_use] + pub fn rs(&mut self) -> RsW { + RsW::new(self, 6) + } + #[doc = "Bit 8 - Generate interrupt when a valid time-code is received"] + #[inline(always)] + #[must_use] + pub fn tq(&mut self) -> TqW { + TqW::new(self, 8) + } + #[doc = "Bit 9 - Generate interrupt when link error occurs"] + #[inline(always)] + #[must_use] + pub fn li(&mut self) -> LiW { + LiW::new(self, 9) + } + #[doc = "Bit 10 - Enable time-code transmissions"] + #[inline(always)] + #[must_use] + pub fn tt(&mut self) -> TtW { + TtW::new(self, 10) + } + #[doc = "Bit 11 - Enable time-code receptions"] + #[inline(always)] + #[must_use] + pub fn tr(&mut self) -> TrW { + TrW::new(self, 11) + } + #[doc = "Bit 12 - Time-code Flag Filter"] + #[inline(always)] + #[must_use] + pub fn tf(&mut self) -> TfW { + TfW::new(self, 12) + } + #[doc = "Bit 13 - Transmitter Enable Lock Control"] + #[inline(always)] + #[must_use] + pub fn tl(&mut self) -> TlW { + TlW::new(self, 13) + } + #[doc = "Bit 15 - SpW Plug-and-Play Enable"] + #[inline(always)] + #[must_use] + pub fn pe(&mut self) -> PeW { + PeW::new(self, 15) + } + #[doc = "Bit 16 - Enable RMAP command handler"] + #[inline(always)] + #[must_use] + pub fn re(&mut self) -> ReW { + ReW::new(self, 16) + } + #[doc = "Bit 17 - If set only one RMAP buffer is used"] + #[inline(always)] + #[must_use] + pub fn rd(&mut self) -> RdW { + RdW::new(self, 17) + } + #[doc = "Bit 20 - Disable port force"] + #[inline(always)] + #[must_use] + pub fn np(&mut self) -> NpW { + NpW::new(self, 20) + } + #[doc = "Bit 21 - Selects the active port when the no port force bit is zero"] + #[inline(always)] + #[must_use] + pub fn ps(&mut self) -> PsW { + PsW::new(self, 21) + } + #[doc = "Bit 22 - Loop-back Enable"] + #[inline(always)] + #[must_use] + pub fn le(&mut self) -> LeW { + LeW::new(self, 22) } } -#[doc = "Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](index.html) module"] -pub struct CTRL_SPEC; -impl crate::RegisterSpec for CTRL_SPEC { +#[doc = "Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctrl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctrl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CtrlSpec; +impl crate::RegisterSpec for CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [ctrl::R](R) reader structure"] -impl crate::Readable for CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ctrl::W](W) writer structure"] -impl crate::Writable for CTRL_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`ctrl::R`](R) reader structure"] +impl crate::Readable for CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`ctrl::W`](W) writer structure"] +impl crate::Writable for CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTRL to value 0xa201_0004"] -impl crate::Resettable for CTRL_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0xa201_0004 - } +impl crate::Resettable for CtrlSpec { + const RESET_VALUE: u32 = 0xa201_0004; } diff --git a/va416xx/src/spw/defaddr.rs b/va416xx/src/spw/defaddr.rs index a746c11..3231286 100644 --- a/va416xx/src/spw/defaddr.rs +++ b/va416xx/src/spw/defaddr.rs @@ -1,140 +1,55 @@ #[doc = "Register `DEFADDR` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DEFADDR` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `DEFMASK` reader - 8-bit default mask used for node identification on the SpaceWire network"] -pub struct DEFMASK_R(crate::FieldReader); -impl DEFMASK_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - DEFMASK_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for DEFMASK_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `DEFMASK` writer - 8-bit default mask used for node identification on the SpaceWire network"] -pub struct DEFMASK_W<'a> { - w: &'a mut W, -} -impl<'a> DEFMASK_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0xff << 8)) | ((value as u32 & 0xff) << 8); - self.w - } -} +pub type W = crate::W; #[doc = "Field `DEFADDR` reader - 8-bit node address used for node identification on the SpaceWire network"] -pub struct DEFADDR_R(crate::FieldReader); -impl DEFADDR_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - DEFADDR_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for DEFADDR_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type DefaddrR = crate::FieldReader; #[doc = "Field `DEFADDR` writer - 8-bit node address used for node identification on the SpaceWire network"] -pub struct DEFADDR_W<'a> { - w: &'a mut W, -} -impl<'a> DEFADDR_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type DefaddrW<'a, REG> = crate::FieldWriter<'a, REG, 8>; +#[doc = "Field `DEFMASK` reader - 8-bit default mask used for node identification on the SpaceWire network"] +pub type DefmaskR = crate::FieldReader; +#[doc = "Field `DEFMASK` writer - 8-bit default mask used for node identification on the SpaceWire network"] +pub type DefmaskW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { - #[doc = "Bits 8:15 - 8-bit default mask used for node identification on the SpaceWire network"] - #[inline(always)] - pub fn defmask(&self) -> DEFMASK_R { - DEFMASK_R::new(((self.bits >> 8) & 0xff) as u8) - } #[doc = "Bits 0:7 - 8-bit node address used for node identification on the SpaceWire network"] #[inline(always)] - pub fn defaddr(&self) -> DEFADDR_R { - DEFADDR_R::new((self.bits & 0xff) as u8) + pub fn defaddr(&self) -> DefaddrR { + DefaddrR::new((self.bits & 0xff) as u8) + } + #[doc = "Bits 8:15 - 8-bit default mask used for node identification on the SpaceWire network"] + #[inline(always)] + pub fn defmask(&self) -> DefmaskR { + DefmaskR::new(((self.bits >> 8) & 0xff) as u8) } } impl W { - #[doc = "Bits 8:15 - 8-bit default mask used for node identification on the SpaceWire network"] - #[inline(always)] - pub fn defmask(&mut self) -> DEFMASK_W { - DEFMASK_W { w: self } - } #[doc = "Bits 0:7 - 8-bit node address used for node identification on the SpaceWire network"] #[inline(always)] - pub fn defaddr(&mut self) -> DEFADDR_W { - DEFADDR_W { w: self } + #[must_use] + pub fn defaddr(&mut self) -> DefaddrW { + DefaddrW::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 8:15 - 8-bit default mask used for node identification on the SpaceWire network"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn defmask(&mut self) -> DefmaskW { + DefmaskW::new(self, 8) } } -#[doc = "Node Address Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [defaddr](index.html) module"] -pub struct DEFADDR_SPEC; -impl crate::RegisterSpec for DEFADDR_SPEC { +#[doc = "Node Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`defaddr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`defaddr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DefaddrSpec; +impl crate::RegisterSpec for DefaddrSpec { type Ux = u32; } -#[doc = "`read()` method returns [defaddr::R](R) reader structure"] -impl crate::Readable for DEFADDR_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [defaddr::W](W) writer structure"] -impl crate::Writable for DEFADDR_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`defaddr::R`](R) reader structure"] +impl crate::Readable for DefaddrSpec {} +#[doc = "`write(|w| ..)` method takes [`defaddr::W`](W) writer structure"] +impl crate::Writable for DefaddrSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DEFADDR to value 0xfe"] -impl crate::Resettable for DEFADDR_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0xfe - } +impl crate::Resettable for DefaddrSpec { + const RESET_VALUE: u32 = 0xfe; } diff --git a/va416xx/src/spw/dkey.rs b/va416xx/src/spw/dkey.rs index a9543e3..8b6dec4 100644 --- a/va416xx/src/spw/dkey.rs +++ b/va416xx/src/spw/dkey.rs @@ -1,103 +1,40 @@ #[doc = "Register `DKEY` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DKEY` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DESTKEY` reader - RMAP destination key"] -pub struct DESTKEY_R(crate::FieldReader); -impl DESTKEY_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - DESTKEY_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for DESTKEY_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type DestkeyR = crate::FieldReader; #[doc = "Field `DESTKEY` writer - RMAP destination key"] -pub struct DESTKEY_W<'a> { - w: &'a mut W, -} -impl<'a> DESTKEY_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type DestkeyW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - RMAP destination key"] #[inline(always)] - pub fn destkey(&self) -> DESTKEY_R { - DESTKEY_R::new((self.bits & 0xff) as u8) + pub fn destkey(&self) -> DestkeyR { + DestkeyR::new((self.bits & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - RMAP destination key"] #[inline(always)] - pub fn destkey(&mut self) -> DESTKEY_W { - DESTKEY_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn destkey(&mut self) -> DestkeyW { + DestkeyW::new(self, 0) } } -#[doc = "Destination Key\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dkey](index.html) module"] -pub struct DKEY_SPEC; -impl crate::RegisterSpec for DKEY_SPEC { +#[doc = "Destination Key\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dkey::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dkey::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DkeySpec; +impl crate::RegisterSpec for DkeySpec { type Ux = u32; } -#[doc = "`read()` method returns [dkey::R](R) reader structure"] -impl crate::Readable for DKEY_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dkey::W](W) writer structure"] -impl crate::Writable for DKEY_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`dkey::R`](R) reader structure"] +impl crate::Readable for DkeySpec {} +#[doc = "`write(|w| ..)` method takes [`dkey::W`](W) writer structure"] +impl crate::Writable for DkeySpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DKEY to value 0"] -impl crate::Resettable for DKEY_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for DkeySpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/spw/dmaaddr0.rs b/va416xx/src/spw/dmaaddr0.rs index b783df4..321fb26 100644 --- a/va416xx/src/spw/dmaaddr0.rs +++ b/va416xx/src/spw/dmaaddr0.rs @@ -1,140 +1,55 @@ #[doc = "Register `DMAADDR0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DMAADDR0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `MASK` reader - Mask"] -pub struct MASK_R(crate::FieldReader); -impl MASK_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - MASK_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for MASK_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `MASK` writer - Mask"] -pub struct MASK_W<'a> { - w: &'a mut W, -} -impl<'a> MASK_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0xff << 8)) | ((value as u32 & 0xff) << 8); - self.w - } -} +pub type W = crate::W; #[doc = "Field `ADDR` reader - Address"] -pub struct ADDR_R(crate::FieldReader); -impl ADDR_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - ADDR_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ADDR_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type AddrR = crate::FieldReader; #[doc = "Field `ADDR` writer - Address"] -pub struct ADDR_W<'a> { - w: &'a mut W, -} -impl<'a> ADDR_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type AddrW<'a, REG> = crate::FieldWriter<'a, REG, 8>; +#[doc = "Field `MASK` reader - Mask"] +pub type MaskR = crate::FieldReader; +#[doc = "Field `MASK` writer - Mask"] +pub type MaskW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { - #[doc = "Bits 8:15 - Mask"] - #[inline(always)] - pub fn mask(&self) -> MASK_R { - MASK_R::new(((self.bits >> 8) & 0xff) as u8) - } #[doc = "Bits 0:7 - Address"] #[inline(always)] - pub fn addr(&self) -> ADDR_R { - ADDR_R::new((self.bits & 0xff) as u8) + pub fn addr(&self) -> AddrR { + AddrR::new((self.bits & 0xff) as u8) + } + #[doc = "Bits 8:15 - Mask"] + #[inline(always)] + pub fn mask(&self) -> MaskR { + MaskR::new(((self.bits >> 8) & 0xff) as u8) } } impl W { - #[doc = "Bits 8:15 - Mask"] - #[inline(always)] - pub fn mask(&mut self) -> MASK_W { - MASK_W { w: self } - } #[doc = "Bits 0:7 - Address"] #[inline(always)] - pub fn addr(&mut self) -> ADDR_W { - ADDR_W { w: self } + #[must_use] + pub fn addr(&mut self) -> AddrW { + AddrW::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 8:15 - Mask"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn mask(&mut self) -> MaskW { + MaskW::new(self, 8) } } -#[doc = "DMA Receiver Table Address Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dmaaddr0](index.html) module"] -pub struct DMAADDR0_SPEC; -impl crate::RegisterSpec for DMAADDR0_SPEC { +#[doc = "DMA Receiver Table Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dmaaddr0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dmaaddr0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Dmaaddr0Spec; +impl crate::RegisterSpec for Dmaaddr0Spec { type Ux = u32; } -#[doc = "`read()` method returns [dmaaddr0::R](R) reader structure"] -impl crate::Readable for DMAADDR0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dmaaddr0::W](W) writer structure"] -impl crate::Writable for DMAADDR0_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`dmaaddr0::R`](R) reader structure"] +impl crate::Readable for Dmaaddr0Spec {} +#[doc = "`write(|w| ..)` method takes [`dmaaddr0::W`](W) writer structure"] +impl crate::Writable for Dmaaddr0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DMAADDR0 to value 0"] -impl crate::Resettable for DMAADDR0_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Dmaaddr0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/spw/dmactrl0.rs b/va416xx/src/spw/dmactrl0.rs index 5a76a63..583e94f 100644 --- a/va416xx/src/spw/dmactrl0.rs +++ b/va416xx/src/spw/dmactrl0.rs @@ -1,1177 +1,384 @@ #[doc = "Register `DMACTRL0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DMACTRL0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `INTNUM` reader - Interrupt number used for this channel"] -pub struct INTNUM_R(crate::FieldReader); -impl INTNUM_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - INTNUM_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for INTNUM_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `INTNUM` writer - Interrupt number used for this channel"] -pub struct INTNUM_W<'a> { - w: &'a mut W, -} -impl<'a> INTNUM_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x3f << 26)) | ((value as u32 & 0x3f) << 26); - self.w - } -} -#[doc = "Field `EP` reader - EEP Termination"] -pub struct EP_R(crate::FieldReader); -impl EP_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - EP_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for EP_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `EP` writer - EEP Termination"] -pub struct EP_W<'a> { - w: &'a mut W, -} -impl<'a> EP_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 23)) | ((value as u32 & 0x01) << 23); - self.w - } -} -#[doc = "Field `TR` reader - Truncated"] -pub struct TR_R(crate::FieldReader); -impl TR_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TR_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TR_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TR` writer - Truncated"] -pub struct TR_W<'a> { - w: &'a mut W, -} -impl<'a> TR_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 22)) | ((value as u32 & 0x01) << 22); - self.w - } -} -#[doc = "Field `IE` reader - Interrupt code transmit enable on EEP"] -pub struct IE_R(crate::FieldReader); -impl IE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - IE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for IE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `IE` writer - Interrupt code transmit enable on EEP"] -pub struct IE_W<'a> { - w: &'a mut W, -} -impl<'a> IE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 21)) | ((value as u32 & 0x01) << 21); - self.w - } -} -#[doc = "Field `IT` reader - Interrupt code transmit enable on truncation"] -pub struct IT_R(crate::FieldReader); -impl IT_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - IT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for IT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `IT` writer - Interrupt code transmit enable on truncation"] -pub struct IT_W<'a> { - w: &'a mut W, -} -impl<'a> IT_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 20)) | ((value as u32 & 0x01) << 20); - self.w - } -} -#[doc = "Field `RP` reader - Receive Packet IRQ"] -pub struct RP_R(crate::FieldReader); -impl RP_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RP_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RP_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RP` writer - Receive Packet IRQ"] -pub struct RP_W<'a> { - w: &'a mut W, -} -impl<'a> RP_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 19)) | ((value as u32 & 0x01) << 19); - self.w - } -} -#[doc = "Field `TP` reader - Transmit Packet IRQ"] -pub struct TP_R(crate::FieldReader); -impl TP_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TP_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TP_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TP` writer - Transmit Packet IRQ"] -pub struct TP_W<'a> { - w: &'a mut W, -} -impl<'a> TP_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 18)) | ((value as u32 & 0x01) << 18); - self.w - } -} -#[doc = "Field `TL` reader - Transmit Enable Lock"] -pub struct TL_R(crate::FieldReader); -impl TL_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TL` writer - Transmit Enable Lock"] -pub struct TL_W<'a> { - w: &'a mut W, -} -impl<'a> TL_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 17)) | ((value as u32 & 0x01) << 17); - self.w - } -} -#[doc = "Field `LE` reader - Disable transmitter when a link error occurs"] -pub struct LE_R(crate::FieldReader); -impl LE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - LE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for LE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `LE` writer - Disable transmitter when a link error occurs"] -pub struct LE_W<'a> { - w: &'a mut W, -} -impl<'a> LE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16); - self.w - } -} -#[doc = "Field `SP` reader - Strip PID"] -pub struct SP_R(crate::FieldReader); -impl SP_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - SP_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for SP_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `SP` writer - Strip PID"] -pub struct SP_W<'a> { - w: &'a mut W, -} -impl<'a> SP_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); - self.w - } -} -#[doc = "Field `SA` reader - Strip Address"] -pub struct SA_R(crate::FieldReader); -impl SA_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - SA_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for SA_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `SA` writer - Strip Address"] -pub struct SA_W<'a> { - w: &'a mut W, -} -impl<'a> SA_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); - self.w - } -} -#[doc = "Field `EN` reader - Enable Address"] -pub struct EN_R(crate::FieldReader); -impl EN_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - EN_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for EN_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `EN` writer - Enable Address"] -pub struct EN_W<'a> { - w: &'a mut W, -} -impl<'a> EN_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); - self.w - } -} -#[doc = "Field `NS` reader - If cleared, packets will be discarded when a packet is arriving and there are no active descriptors. If set, the GRSPW will wait for a descriptor to be activated"] -pub struct NS_R(crate::FieldReader); -impl NS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - NS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for NS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `NS` writer - If cleared, packets will be discarded when a packet is arriving and there are no active descriptors. If set, the GRSPW will wait for a descriptor to be activated"] -pub struct NS_W<'a> { - w: &'a mut W, -} -impl<'a> NS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); - self.w - } -} -#[doc = "Field `RD` reader - Indicates to the GRSPW that there are enabled descriptors in the descriptor table"] -pub struct RD_R(crate::FieldReader); -impl RD_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RD_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RD_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RD` writer - Indicates to the GRSPW that there are enabled descriptors in the descriptor table"] -pub struct RD_W<'a> { - w: &'a mut W, -} -impl<'a> RD_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); - self.w - } -} -#[doc = "Field `RX` reader - Reception to the DMA channel is currently active"] -pub struct RX_R(crate::FieldReader); -impl RX_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RX_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RX_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `AT` reader - Abort the currently transmitting packet and disable transmissions"] -pub struct AT_R(crate::FieldReader); -impl AT_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - AT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for AT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RA` reader - An error response was detected on the AHB bus - DMA receive"] -pub struct RA_R(crate::FieldReader); -impl RA_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RA_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RA_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RA` writer - An error response was detected on the AHB bus - DMA receive"] -pub struct RA_W<'a> { - w: &'a mut W, -} -impl<'a> RA_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); - self.w - } -} -#[doc = "Field `TA` reader - An error response was detected on the AHB bus - DMA transmit"] -pub struct TA_R(crate::FieldReader); -impl TA_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TA_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TA_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TA` writer - An error response was detected on the AHB bus - DMA transmit"] -pub struct TA_W<'a> { - w: &'a mut W, -} -impl<'a> TA_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); - self.w - } -} -#[doc = "Field `PR` reader - Set each time a packet has been received"] -pub struct PR_R(crate::FieldReader); -impl PR_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - PR_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PR_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `PR` writer - Set each time a packet has been received"] -pub struct PR_W<'a> { - w: &'a mut W, -} -impl<'a> PR_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); - self.w - } -} -#[doc = "Field `PS` reader - Set each time a packet has been sent"] -pub struct PS_R(crate::FieldReader); -impl PS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - PS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `PS` writer - Set each time a packet has been sent"] -pub struct PS_W<'a> { - w: &'a mut W, -} -impl<'a> PS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); - self.w - } -} -#[doc = "Field `AI` reader - An interrupt will be generated each time an AHB error occurs when this DMA channel is accessing the bus"] -pub struct AI_R(crate::FieldReader); -impl AI_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - AI_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for AI_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `AI` writer - An interrupt will be generated each time an AHB error occurs when this DMA channel is accessing the bus"] -pub struct AI_W<'a> { - w: &'a mut W, -} -impl<'a> AI_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); - self.w - } -} -#[doc = "Field `RI` reader - An interrupt will be generated each time a packet has been received"] -pub struct RI_R(crate::FieldReader); -impl RI_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RI_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RI_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RI` writer - An interrupt will be generated each time a packet has been received"] -pub struct RI_W<'a> { - w: &'a mut W, -} -impl<'a> RI_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); - self.w - } -} -#[doc = "Field `TI` reader - An interrupt will be generated each time a packet is transmitted"] -pub struct TI_R(crate::FieldReader); -impl TI_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TI_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TI_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TI` writer - An interrupt will be generated each time a packet is transmitted"] -pub struct TI_W<'a> { - w: &'a mut W, -} -impl<'a> TI_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); - self.w - } -} -#[doc = "Field `RE` reader - Packets are allowed to be received to this channel"] -pub struct RE_R(crate::FieldReader); -impl RE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RE` writer - Packets are allowed to be received to this channel"] -pub struct RE_W<'a> { - w: &'a mut W, -} -impl<'a> RE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); - self.w - } -} +pub type W = crate::W; #[doc = "Field `TE` reader - Write a one to this bit each time new descriptors are activated in the table"] -pub struct TE_R(crate::FieldReader); -impl TE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type TeR = crate::BitReader; #[doc = "Field `TE` writer - Write a one to this bit each time new descriptors are activated in the table"] -pub struct TE_W<'a> { - w: &'a mut W, -} -impl<'a> TE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} +pub type TeW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `RE` reader - Packets are allowed to be received to this channel"] +pub type ReR = crate::BitReader; +#[doc = "Field `RE` writer - Packets are allowed to be received to this channel"] +pub type ReW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TI` reader - An interrupt will be generated each time a packet is transmitted"] +pub type TiR = crate::BitReader; +#[doc = "Field `TI` writer - An interrupt will be generated each time a packet is transmitted"] +pub type TiW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `RI` reader - An interrupt will be generated each time a packet has been received"] +pub type RiR = crate::BitReader; +#[doc = "Field `RI` writer - An interrupt will be generated each time a packet has been received"] +pub type RiW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `AI` reader - An interrupt will be generated each time an AHB error occurs when this DMA channel is accessing the bus"] +pub type AiR = crate::BitReader; +#[doc = "Field `AI` writer - An interrupt will be generated each time an AHB error occurs when this DMA channel is accessing the bus"] +pub type AiW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `PS` reader - Set each time a packet has been sent"] +pub type PsR = crate::BitReader; +#[doc = "Field `PS` writer - Set each time a packet has been sent"] +pub type PsW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `PR` reader - Set each time a packet has been received"] +pub type PrR = crate::BitReader; +#[doc = "Field `PR` writer - Set each time a packet has been received"] +pub type PrW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TA` reader - An error response was detected on the AHB bus - DMA transmit"] +pub type TaR = crate::BitReader; +#[doc = "Field `TA` writer - An error response was detected on the AHB bus - DMA transmit"] +pub type TaW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `RA` reader - An error response was detected on the AHB bus - DMA receive"] +pub type RaR = crate::BitReader; +#[doc = "Field `RA` writer - An error response was detected on the AHB bus - DMA receive"] +pub type RaW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `AT` reader - Abort the currently transmitting packet and disable transmissions"] +pub type AtR = crate::BitReader; +#[doc = "Field `RX` reader - Reception to the DMA channel is currently active"] +pub type RxR = crate::BitReader; +#[doc = "Field `RD` reader - Indicates to the GRSPW that there are enabled descriptors in the descriptor table"] +pub type RdR = crate::BitReader; +#[doc = "Field `RD` writer - Indicates to the GRSPW that there are enabled descriptors in the descriptor table"] +pub type RdW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `NS` reader - If cleared, packets will be discarded when a packet is arriving and there are no active descriptors. If set, the GRSPW will wait for a descriptor to be activated"] +pub type NsR = crate::BitReader; +#[doc = "Field `NS` writer - If cleared, packets will be discarded when a packet is arriving and there are no active descriptors. If set, the GRSPW will wait for a descriptor to be activated"] +pub type NsW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `EN` reader - Enable Address"] +pub type EnR = crate::BitReader; +#[doc = "Field `EN` writer - Enable Address"] +pub type EnW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `SA` reader - Strip Address"] +pub type SaR = crate::BitReader; +#[doc = "Field `SA` writer - Strip Address"] +pub type SaW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `SP` reader - Strip PID"] +pub type SpR = crate::BitReader; +#[doc = "Field `SP` writer - Strip PID"] +pub type SpW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `LE` reader - Disable transmitter when a link error occurs"] +pub type LeR = crate::BitReader; +#[doc = "Field `LE` writer - Disable transmitter when a link error occurs"] +pub type LeW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TL` reader - Transmit Enable Lock"] +pub type TlR = crate::BitReader; +#[doc = "Field `TL` writer - Transmit Enable Lock"] +pub type TlW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TP` reader - Transmit Packet IRQ"] +pub type TpR = crate::BitReader; +#[doc = "Field `TP` writer - Transmit Packet IRQ"] +pub type TpW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `RP` reader - Receive Packet IRQ"] +pub type RpR = crate::BitReader; +#[doc = "Field `RP` writer - Receive Packet IRQ"] +pub type RpW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `IT` reader - Interrupt code transmit enable on truncation"] +pub type ItR = crate::BitReader; +#[doc = "Field `IT` writer - Interrupt code transmit enable on truncation"] +pub type ItW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `IE` reader - Interrupt code transmit enable on EEP"] +pub type IeR = crate::BitReader; +#[doc = "Field `IE` writer - Interrupt code transmit enable on EEP"] +pub type IeW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TR` reader - Truncated"] +pub type TrR = crate::BitReader; +#[doc = "Field `TR` writer - Truncated"] +pub type TrW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `EP` reader - EEP Termination"] +pub type EpR = crate::BitReader; +#[doc = "Field `EP` writer - EEP Termination"] +pub type EpW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `INTNUM` reader - Interrupt number used for this channel"] +pub type IntnumR = crate::FieldReader; +#[doc = "Field `INTNUM` writer - Interrupt number used for this channel"] +pub type IntnumW<'a, REG> = crate::FieldWriter<'a, REG, 6>; impl R { - #[doc = "Bits 26:31 - Interrupt number used for this channel"] + #[doc = "Bit 0 - Write a one to this bit each time new descriptors are activated in the table"] #[inline(always)] - pub fn intnum(&self) -> INTNUM_R { - INTNUM_R::new(((self.bits >> 26) & 0x3f) as u8) + pub fn te(&self) -> TeR { + TeR::new((self.bits & 1) != 0) } - #[doc = "Bit 23 - EEP Termination"] + #[doc = "Bit 1 - Packets are allowed to be received to this channel"] #[inline(always)] - pub fn ep(&self) -> EP_R { - EP_R::new(((self.bits >> 23) & 0x01) != 0) + pub fn re(&self) -> ReR { + ReR::new(((self.bits >> 1) & 1) != 0) } - #[doc = "Bit 22 - Truncated"] + #[doc = "Bit 2 - An interrupt will be generated each time a packet is transmitted"] #[inline(always)] - pub fn tr(&self) -> TR_R { - TR_R::new(((self.bits >> 22) & 0x01) != 0) + pub fn ti(&self) -> TiR { + TiR::new(((self.bits >> 2) & 1) != 0) } - #[doc = "Bit 21 - Interrupt code transmit enable on EEP"] + #[doc = "Bit 3 - An interrupt will be generated each time a packet has been received"] #[inline(always)] - pub fn ie(&self) -> IE_R { - IE_R::new(((self.bits >> 21) & 0x01) != 0) + pub fn ri(&self) -> RiR { + RiR::new(((self.bits >> 3) & 1) != 0) } - #[doc = "Bit 20 - Interrupt code transmit enable on truncation"] + #[doc = "Bit 4 - An interrupt will be generated each time an AHB error occurs when this DMA channel is accessing the bus"] #[inline(always)] - pub fn it(&self) -> IT_R { - IT_R::new(((self.bits >> 20) & 0x01) != 0) + pub fn ai(&self) -> AiR { + AiR::new(((self.bits >> 4) & 1) != 0) } - #[doc = "Bit 19 - Receive Packet IRQ"] + #[doc = "Bit 5 - Set each time a packet has been sent"] #[inline(always)] - pub fn rp(&self) -> RP_R { - RP_R::new(((self.bits >> 19) & 0x01) != 0) + pub fn ps(&self) -> PsR { + PsR::new(((self.bits >> 5) & 1) != 0) } - #[doc = "Bit 18 - Transmit Packet IRQ"] + #[doc = "Bit 6 - Set each time a packet has been received"] #[inline(always)] - pub fn tp(&self) -> TP_R { - TP_R::new(((self.bits >> 18) & 0x01) != 0) + pub fn pr(&self) -> PrR { + PrR::new(((self.bits >> 6) & 1) != 0) } - #[doc = "Bit 17 - Transmit Enable Lock"] + #[doc = "Bit 7 - An error response was detected on the AHB bus - DMA transmit"] #[inline(always)] - pub fn tl(&self) -> TL_R { - TL_R::new(((self.bits >> 17) & 0x01) != 0) + pub fn ta(&self) -> TaR { + TaR::new(((self.bits >> 7) & 1) != 0) } - #[doc = "Bit 16 - Disable transmitter when a link error occurs"] + #[doc = "Bit 8 - An error response was detected on the AHB bus - DMA receive"] #[inline(always)] - pub fn le(&self) -> LE_R { - LE_R::new(((self.bits >> 16) & 0x01) != 0) - } - #[doc = "Bit 15 - Strip PID"] - #[inline(always)] - pub fn sp(&self) -> SP_R { - SP_R::new(((self.bits >> 15) & 0x01) != 0) - } - #[doc = "Bit 14 - Strip Address"] - #[inline(always)] - pub fn sa(&self) -> SA_R { - SA_R::new(((self.bits >> 14) & 0x01) != 0) - } - #[doc = "Bit 13 - Enable Address"] - #[inline(always)] - pub fn en(&self) -> EN_R { - EN_R::new(((self.bits >> 13) & 0x01) != 0) - } - #[doc = "Bit 12 - If cleared, packets will be discarded when a packet is arriving and there are no active descriptors. If set, the GRSPW will wait for a descriptor to be activated"] - #[inline(always)] - pub fn ns(&self) -> NS_R { - NS_R::new(((self.bits >> 12) & 0x01) != 0) - } - #[doc = "Bit 11 - Indicates to the GRSPW that there are enabled descriptors in the descriptor table"] - #[inline(always)] - pub fn rd(&self) -> RD_R { - RD_R::new(((self.bits >> 11) & 0x01) != 0) - } - #[doc = "Bit 10 - Reception to the DMA channel is currently active"] - #[inline(always)] - pub fn rx(&self) -> RX_R { - RX_R::new(((self.bits >> 10) & 0x01) != 0) + pub fn ra(&self) -> RaR { + RaR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Abort the currently transmitting packet and disable transmissions"] #[inline(always)] - pub fn at(&self) -> AT_R { - AT_R::new(((self.bits >> 9) & 0x01) != 0) + pub fn at(&self) -> AtR { + AtR::new(((self.bits >> 9) & 1) != 0) } - #[doc = "Bit 8 - An error response was detected on the AHB bus - DMA receive"] + #[doc = "Bit 10 - Reception to the DMA channel is currently active"] #[inline(always)] - pub fn ra(&self) -> RA_R { - RA_R::new(((self.bits >> 8) & 0x01) != 0) - } - #[doc = "Bit 7 - An error response was detected on the AHB bus - DMA transmit"] - #[inline(always)] - pub fn ta(&self) -> TA_R { - TA_R::new(((self.bits >> 7) & 0x01) != 0) - } - #[doc = "Bit 6 - Set each time a packet has been received"] - #[inline(always)] - pub fn pr(&self) -> PR_R { - PR_R::new(((self.bits >> 6) & 0x01) != 0) - } - #[doc = "Bit 5 - Set each time a packet has been sent"] - #[inline(always)] - pub fn ps(&self) -> PS_R { - PS_R::new(((self.bits >> 5) & 0x01) != 0) - } - #[doc = "Bit 4 - An interrupt will be generated each time an AHB error occurs when this DMA channel is accessing the bus"] - #[inline(always)] - pub fn ai(&self) -> AI_R { - AI_R::new(((self.bits >> 4) & 0x01) != 0) - } - #[doc = "Bit 3 - An interrupt will be generated each time a packet has been received"] - #[inline(always)] - pub fn ri(&self) -> RI_R { - RI_R::new(((self.bits >> 3) & 0x01) != 0) - } - #[doc = "Bit 2 - An interrupt will be generated each time a packet is transmitted"] - #[inline(always)] - pub fn ti(&self) -> TI_R { - TI_R::new(((self.bits >> 2) & 0x01) != 0) - } - #[doc = "Bit 1 - Packets are allowed to be received to this channel"] - #[inline(always)] - pub fn re(&self) -> RE_R { - RE_R::new(((self.bits >> 1) & 0x01) != 0) - } - #[doc = "Bit 0 - Write a one to this bit each time new descriptors are activated in the table"] - #[inline(always)] - pub fn te(&self) -> TE_R { - TE_R::new((self.bits & 0x01) != 0) - } -} -impl W { - #[doc = "Bits 26:31 - Interrupt number used for this channel"] - #[inline(always)] - pub fn intnum(&mut self) -> INTNUM_W { - INTNUM_W { w: self } - } - #[doc = "Bit 23 - EEP Termination"] - #[inline(always)] - pub fn ep(&mut self) -> EP_W { - EP_W { w: self } - } - #[doc = "Bit 22 - Truncated"] - #[inline(always)] - pub fn tr(&mut self) -> TR_W { - TR_W { w: self } - } - #[doc = "Bit 21 - Interrupt code transmit enable on EEP"] - #[inline(always)] - pub fn ie(&mut self) -> IE_W { - IE_W { w: self } - } - #[doc = "Bit 20 - Interrupt code transmit enable on truncation"] - #[inline(always)] - pub fn it(&mut self) -> IT_W { - IT_W { w: self } - } - #[doc = "Bit 19 - Receive Packet IRQ"] - #[inline(always)] - pub fn rp(&mut self) -> RP_W { - RP_W { w: self } - } - #[doc = "Bit 18 - Transmit Packet IRQ"] - #[inline(always)] - pub fn tp(&mut self) -> TP_W { - TP_W { w: self } - } - #[doc = "Bit 17 - Transmit Enable Lock"] - #[inline(always)] - pub fn tl(&mut self) -> TL_W { - TL_W { w: self } - } - #[doc = "Bit 16 - Disable transmitter when a link error occurs"] - #[inline(always)] - pub fn le(&mut self) -> LE_W { - LE_W { w: self } - } - #[doc = "Bit 15 - Strip PID"] - #[inline(always)] - pub fn sp(&mut self) -> SP_W { - SP_W { w: self } - } - #[doc = "Bit 14 - Strip Address"] - #[inline(always)] - pub fn sa(&mut self) -> SA_W { - SA_W { w: self } - } - #[doc = "Bit 13 - Enable Address"] - #[inline(always)] - pub fn en(&mut self) -> EN_W { - EN_W { w: self } - } - #[doc = "Bit 12 - If cleared, packets will be discarded when a packet is arriving and there are no active descriptors. If set, the GRSPW will wait for a descriptor to be activated"] - #[inline(always)] - pub fn ns(&mut self) -> NS_W { - NS_W { w: self } + pub fn rx(&self) -> RxR { + RxR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Indicates to the GRSPW that there are enabled descriptors in the descriptor table"] #[inline(always)] - pub fn rd(&mut self) -> RD_W { - RD_W { w: self } + pub fn rd(&self) -> RdR { + RdR::new(((self.bits >> 11) & 1) != 0) } - #[doc = "Bit 8 - An error response was detected on the AHB bus - DMA receive"] + #[doc = "Bit 12 - If cleared, packets will be discarded when a packet is arriving and there are no active descriptors. If set, the GRSPW will wait for a descriptor to be activated"] #[inline(always)] - pub fn ra(&mut self) -> RA_W { - RA_W { w: self } + pub fn ns(&self) -> NsR { + NsR::new(((self.bits >> 12) & 1) != 0) } - #[doc = "Bit 7 - An error response was detected on the AHB bus - DMA transmit"] + #[doc = "Bit 13 - Enable Address"] #[inline(always)] - pub fn ta(&mut self) -> TA_W { - TA_W { w: self } + pub fn en(&self) -> EnR { + EnR::new(((self.bits >> 13) & 1) != 0) } - #[doc = "Bit 6 - Set each time a packet has been received"] + #[doc = "Bit 14 - Strip Address"] #[inline(always)] - pub fn pr(&mut self) -> PR_W { - PR_W { w: self } + pub fn sa(&self) -> SaR { + SaR::new(((self.bits >> 14) & 1) != 0) } - #[doc = "Bit 5 - Set each time a packet has been sent"] + #[doc = "Bit 15 - Strip PID"] #[inline(always)] - pub fn ps(&mut self) -> PS_W { - PS_W { w: self } + pub fn sp(&self) -> SpR { + SpR::new(((self.bits >> 15) & 1) != 0) } - #[doc = "Bit 4 - An interrupt will be generated each time an AHB error occurs when this DMA channel is accessing the bus"] + #[doc = "Bit 16 - Disable transmitter when a link error occurs"] #[inline(always)] - pub fn ai(&mut self) -> AI_W { - AI_W { w: self } + pub fn le(&self) -> LeR { + LeR::new(((self.bits >> 16) & 1) != 0) } - #[doc = "Bit 3 - An interrupt will be generated each time a packet has been received"] + #[doc = "Bit 17 - Transmit Enable Lock"] #[inline(always)] - pub fn ri(&mut self) -> RI_W { - RI_W { w: self } + pub fn tl(&self) -> TlR { + TlR::new(((self.bits >> 17) & 1) != 0) } - #[doc = "Bit 2 - An interrupt will be generated each time a packet is transmitted"] + #[doc = "Bit 18 - Transmit Packet IRQ"] #[inline(always)] - pub fn ti(&mut self) -> TI_W { - TI_W { w: self } + pub fn tp(&self) -> TpR { + TpR::new(((self.bits >> 18) & 1) != 0) + } + #[doc = "Bit 19 - Receive Packet IRQ"] + #[inline(always)] + pub fn rp(&self) -> RpR { + RpR::new(((self.bits >> 19) & 1) != 0) + } + #[doc = "Bit 20 - Interrupt code transmit enable on truncation"] + #[inline(always)] + pub fn it(&self) -> ItR { + ItR::new(((self.bits >> 20) & 1) != 0) + } + #[doc = "Bit 21 - Interrupt code transmit enable on EEP"] + #[inline(always)] + pub fn ie(&self) -> IeR { + IeR::new(((self.bits >> 21) & 1) != 0) + } + #[doc = "Bit 22 - Truncated"] + #[inline(always)] + pub fn tr(&self) -> TrR { + TrR::new(((self.bits >> 22) & 1) != 0) + } + #[doc = "Bit 23 - EEP Termination"] + #[inline(always)] + pub fn ep(&self) -> EpR { + EpR::new(((self.bits >> 23) & 1) != 0) + } + #[doc = "Bits 26:31 - Interrupt number used for this channel"] + #[inline(always)] + pub fn intnum(&self) -> IntnumR { + IntnumR::new(((self.bits >> 26) & 0x3f) as u8) + } +} +impl W { + #[doc = "Bit 0 - Write a one to this bit each time new descriptors are activated in the table"] + #[inline(always)] + #[must_use] + pub fn te(&mut self) -> TeW { + TeW::new(self, 0) } #[doc = "Bit 1 - Packets are allowed to be received to this channel"] #[inline(always)] - pub fn re(&mut self) -> RE_W { - RE_W { w: self } + #[must_use] + pub fn re(&mut self) -> ReW { + ReW::new(self, 1) } - #[doc = "Bit 0 - Write a one to this bit each time new descriptors are activated in the table"] + #[doc = "Bit 2 - An interrupt will be generated each time a packet is transmitted"] #[inline(always)] - pub fn te(&mut self) -> TE_W { - TE_W { w: self } + #[must_use] + pub fn ti(&mut self) -> TiW { + TiW::new(self, 2) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bit 3 - An interrupt will be generated each time a packet has been received"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn ri(&mut self) -> RiW { + RiW::new(self, 3) + } + #[doc = "Bit 4 - An interrupt will be generated each time an AHB error occurs when this DMA channel is accessing the bus"] + #[inline(always)] + #[must_use] + pub fn ai(&mut self) -> AiW { + AiW::new(self, 4) + } + #[doc = "Bit 5 - Set each time a packet has been sent"] + #[inline(always)] + #[must_use] + pub fn ps(&mut self) -> PsW { + PsW::new(self, 5) + } + #[doc = "Bit 6 - Set each time a packet has been received"] + #[inline(always)] + #[must_use] + pub fn pr(&mut self) -> PrW { + PrW::new(self, 6) + } + #[doc = "Bit 7 - An error response was detected on the AHB bus - DMA transmit"] + #[inline(always)] + #[must_use] + pub fn ta(&mut self) -> TaW { + TaW::new(self, 7) + } + #[doc = "Bit 8 - An error response was detected on the AHB bus - DMA receive"] + #[inline(always)] + #[must_use] + pub fn ra(&mut self) -> RaW { + RaW::new(self, 8) + } + #[doc = "Bit 11 - Indicates to the GRSPW that there are enabled descriptors in the descriptor table"] + #[inline(always)] + #[must_use] + pub fn rd(&mut self) -> RdW { + RdW::new(self, 11) + } + #[doc = "Bit 12 - If cleared, packets will be discarded when a packet is arriving and there are no active descriptors. If set, the GRSPW will wait for a descriptor to be activated"] + #[inline(always)] + #[must_use] + pub fn ns(&mut self) -> NsW { + NsW::new(self, 12) + } + #[doc = "Bit 13 - Enable Address"] + #[inline(always)] + #[must_use] + pub fn en(&mut self) -> EnW { + EnW::new(self, 13) + } + #[doc = "Bit 14 - Strip Address"] + #[inline(always)] + #[must_use] + pub fn sa(&mut self) -> SaW { + SaW::new(self, 14) + } + #[doc = "Bit 15 - Strip PID"] + #[inline(always)] + #[must_use] + pub fn sp(&mut self) -> SpW { + SpW::new(self, 15) + } + #[doc = "Bit 16 - Disable transmitter when a link error occurs"] + #[inline(always)] + #[must_use] + pub fn le(&mut self) -> LeW { + LeW::new(self, 16) + } + #[doc = "Bit 17 - Transmit Enable Lock"] + #[inline(always)] + #[must_use] + pub fn tl(&mut self) -> TlW { + TlW::new(self, 17) + } + #[doc = "Bit 18 - Transmit Packet IRQ"] + #[inline(always)] + #[must_use] + pub fn tp(&mut self) -> TpW { + TpW::new(self, 18) + } + #[doc = "Bit 19 - Receive Packet IRQ"] + #[inline(always)] + #[must_use] + pub fn rp(&mut self) -> RpW { + RpW::new(self, 19) + } + #[doc = "Bit 20 - Interrupt code transmit enable on truncation"] + #[inline(always)] + #[must_use] + pub fn it(&mut self) -> ItW { + ItW::new(self, 20) + } + #[doc = "Bit 21 - Interrupt code transmit enable on EEP"] + #[inline(always)] + #[must_use] + pub fn ie(&mut self) -> IeW { + IeW::new(self, 21) + } + #[doc = "Bit 22 - Truncated"] + #[inline(always)] + #[must_use] + pub fn tr(&mut self) -> TrW { + TrW::new(self, 22) + } + #[doc = "Bit 23 - EEP Termination"] + #[inline(always)] + #[must_use] + pub fn ep(&mut self) -> EpW { + EpW::new(self, 23) + } + #[doc = "Bits 26:31 - Interrupt number used for this channel"] + #[inline(always)] + #[must_use] + pub fn intnum(&mut self) -> IntnumW { + IntnumW::new(self, 26) } } -#[doc = "DMA Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dmactrl0](index.html) module"] -pub struct DMACTRL0_SPEC; -impl crate::RegisterSpec for DMACTRL0_SPEC { +#[doc = "DMA Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dmactrl0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dmactrl0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Dmactrl0Spec; +impl crate::RegisterSpec for Dmactrl0Spec { type Ux = u32; } -#[doc = "`read()` method returns [dmactrl0::R](R) reader structure"] -impl crate::Readable for DMACTRL0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dmactrl0::W](W) writer structure"] -impl crate::Writable for DMACTRL0_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`dmactrl0::R`](R) reader structure"] +impl crate::Readable for Dmactrl0Spec {} +#[doc = "`write(|w| ..)` method takes [`dmactrl0::W`](W) writer structure"] +impl crate::Writable for Dmactrl0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DMACTRL0 to value 0"] -impl crate::Resettable for DMACTRL0_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Dmactrl0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/spw/dmamaxlen0.rs b/va416xx/src/spw/dmamaxlen0.rs index 0905abf..d809bbf 100644 --- a/va416xx/src/spw/dmamaxlen0.rs +++ b/va416xx/src/spw/dmamaxlen0.rs @@ -1,103 +1,40 @@ #[doc = "Register `DMAMAXLEN0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DMAMAXLEN0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RXMAXLEN` reader - Receiver packet maximum length in bytes"] -pub struct RXMAXLEN_R(crate::FieldReader); -impl RXMAXLEN_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - RXMAXLEN_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXMAXLEN_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type RxmaxlenR = crate::FieldReader; #[doc = "Field `RXMAXLEN` writer - Receiver packet maximum length in bytes"] -pub struct RXMAXLEN_W<'a> { - w: &'a mut W, -} -impl<'a> RXMAXLEN_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x007f_ffff << 2)) | ((value as u32 & 0x007f_ffff) << 2); - self.w - } -} +pub type RxmaxlenW<'a, REG> = crate::FieldWriter<'a, REG, 23, u32>; impl R { #[doc = "Bits 2:24 - Receiver packet maximum length in bytes"] #[inline(always)] - pub fn rxmaxlen(&self) -> RXMAXLEN_R { - RXMAXLEN_R::new(((self.bits >> 2) & 0x007f_ffff) as u32) + pub fn rxmaxlen(&self) -> RxmaxlenR { + RxmaxlenR::new((self.bits >> 2) & 0x007f_ffff) } } impl W { #[doc = "Bits 2:24 - Receiver packet maximum length in bytes"] #[inline(always)] - pub fn rxmaxlen(&mut self) -> RXMAXLEN_W { - RXMAXLEN_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn rxmaxlen(&mut self) -> RxmaxlenW { + RxmaxlenW::new(self, 2) } } -#[doc = "DMA RX Maximum Length Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dmamaxlen0](index.html) module"] -pub struct DMAMAXLEN0_SPEC; -impl crate::RegisterSpec for DMAMAXLEN0_SPEC { +#[doc = "DMA RX Maximum Length Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dmamaxlen0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dmamaxlen0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Dmamaxlen0Spec; +impl crate::RegisterSpec for Dmamaxlen0Spec { type Ux = u32; } -#[doc = "`read()` method returns [dmamaxlen0::R](R) reader structure"] -impl crate::Readable for DMAMAXLEN0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dmamaxlen0::W](W) writer structure"] -impl crate::Writable for DMAMAXLEN0_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`dmamaxlen0::R`](R) reader structure"] +impl crate::Readable for Dmamaxlen0Spec {} +#[doc = "`write(|w| ..)` method takes [`dmamaxlen0::W`](W) writer structure"] +impl crate::Writable for Dmamaxlen0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DMAMAXLEN0 to value 0"] -impl crate::Resettable for DMAMAXLEN0_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Dmamaxlen0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/spw/dmarxdesc0.rs b/va416xx/src/spw/dmarxdesc0.rs index c9d564b..50b31d3 100644 --- a/va416xx/src/spw/dmarxdesc0.rs +++ b/va416xx/src/spw/dmarxdesc0.rs @@ -1,140 +1,55 @@ #[doc = "Register `DMARXDESC0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DMARXDESC0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `DESCBASEADDR` reader - Sets the base address of the descriptor table"] -pub struct DESCBASEADDR_R(crate::FieldReader); -impl DESCBASEADDR_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - DESCBASEADDR_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for DESCBASEADDR_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `DESCBASEADDR` writer - Sets the base address of the descriptor table"] -pub struct DESCBASEADDR_W<'a> { - w: &'a mut W, -} -impl<'a> DESCBASEADDR_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x003f_ffff << 10)) | ((value as u32 & 0x003f_ffff) << 10); - self.w - } -} +pub type W = crate::W; #[doc = "Field `DESCSEL` reader - Offset into the descriptor table"] -pub struct DESCSEL_R(crate::FieldReader); -impl DESCSEL_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - DESCSEL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for DESCSEL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type DescselR = crate::FieldReader; #[doc = "Field `DESCSEL` writer - Offset into the descriptor table"] -pub struct DESCSEL_W<'a> { - w: &'a mut W, -} -impl<'a> DESCSEL_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x7f << 3)) | ((value as u32 & 0x7f) << 3); - self.w - } -} +pub type DescselW<'a, REG> = crate::FieldWriter<'a, REG, 7>; +#[doc = "Field `DESCBASEADDR` reader - Sets the base address of the descriptor table"] +pub type DescbaseaddrR = crate::FieldReader; +#[doc = "Field `DESCBASEADDR` writer - Sets the base address of the descriptor table"] +pub type DescbaseaddrW<'a, REG> = crate::FieldWriter<'a, REG, 22, u32>; impl R { - #[doc = "Bits 10:31 - Sets the base address of the descriptor table"] - #[inline(always)] - pub fn descbaseaddr(&self) -> DESCBASEADDR_R { - DESCBASEADDR_R::new(((self.bits >> 10) & 0x003f_ffff) as u32) - } #[doc = "Bits 3:9 - Offset into the descriptor table"] #[inline(always)] - pub fn descsel(&self) -> DESCSEL_R { - DESCSEL_R::new(((self.bits >> 3) & 0x7f) as u8) + pub fn descsel(&self) -> DescselR { + DescselR::new(((self.bits >> 3) & 0x7f) as u8) + } + #[doc = "Bits 10:31 - Sets the base address of the descriptor table"] + #[inline(always)] + pub fn descbaseaddr(&self) -> DescbaseaddrR { + DescbaseaddrR::new((self.bits >> 10) & 0x003f_ffff) } } impl W { - #[doc = "Bits 10:31 - Sets the base address of the descriptor table"] - #[inline(always)] - pub fn descbaseaddr(&mut self) -> DESCBASEADDR_W { - DESCBASEADDR_W { w: self } - } #[doc = "Bits 3:9 - Offset into the descriptor table"] #[inline(always)] - pub fn descsel(&mut self) -> DESCSEL_W { - DESCSEL_W { w: self } + #[must_use] + pub fn descsel(&mut self) -> DescselW { + DescselW::new(self, 3) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 10:31 - Sets the base address of the descriptor table"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn descbaseaddr(&mut self) -> DescbaseaddrW { + DescbaseaddrW::new(self, 10) } } -#[doc = "DMA Receiver Table Destination Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dmarxdesc0](index.html) module"] -pub struct DMARXDESC0_SPEC; -impl crate::RegisterSpec for DMARXDESC0_SPEC { +#[doc = "DMA Receiver Table Destination Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dmarxdesc0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dmarxdesc0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Dmarxdesc0Spec; +impl crate::RegisterSpec for Dmarxdesc0Spec { type Ux = u32; } -#[doc = "`read()` method returns [dmarxdesc0::R](R) reader structure"] -impl crate::Readable for DMARXDESC0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dmarxdesc0::W](W) writer structure"] -impl crate::Writable for DMARXDESC0_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`dmarxdesc0::R`](R) reader structure"] +impl crate::Readable for Dmarxdesc0Spec {} +#[doc = "`write(|w| ..)` method takes [`dmarxdesc0::W`](W) writer structure"] +impl crate::Writable for Dmarxdesc0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DMARXDESC0 to value 0"] -impl crate::Resettable for DMARXDESC0_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Dmarxdesc0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/spw/dmatxdesc0.rs b/va416xx/src/spw/dmatxdesc0.rs index 0de1960..baf9a6d 100644 --- a/va416xx/src/spw/dmatxdesc0.rs +++ b/va416xx/src/spw/dmatxdesc0.rs @@ -1,140 +1,55 @@ #[doc = "Register `DMATXDESC0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DMATXDESC0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `DESCBASEADDR` reader - Sets the base address of the descriptor table"] -pub struct DESCBASEADDR_R(crate::FieldReader); -impl DESCBASEADDR_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - DESCBASEADDR_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for DESCBASEADDR_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `DESCBASEADDR` writer - Sets the base address of the descriptor table"] -pub struct DESCBASEADDR_W<'a> { - w: &'a mut W, -} -impl<'a> DESCBASEADDR_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x003f_ffff << 10)) | ((value as u32 & 0x003f_ffff) << 10); - self.w - } -} +pub type W = crate::W; #[doc = "Field `DESCSEL` reader - Offset into the descriptor table"] -pub struct DESCSEL_R(crate::FieldReader); -impl DESCSEL_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - DESCSEL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for DESCSEL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type DescselR = crate::FieldReader; #[doc = "Field `DESCSEL` writer - Offset into the descriptor table"] -pub struct DESCSEL_W<'a> { - w: &'a mut W, -} -impl<'a> DESCSEL_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x3f << 4)) | ((value as u32 & 0x3f) << 4); - self.w - } -} +pub type DescselW<'a, REG> = crate::FieldWriter<'a, REG, 6>; +#[doc = "Field `DESCBASEADDR` reader - Sets the base address of the descriptor table"] +pub type DescbaseaddrR = crate::FieldReader; +#[doc = "Field `DESCBASEADDR` writer - Sets the base address of the descriptor table"] +pub type DescbaseaddrW<'a, REG> = crate::FieldWriter<'a, REG, 22, u32>; impl R { - #[doc = "Bits 10:31 - Sets the base address of the descriptor table"] - #[inline(always)] - pub fn descbaseaddr(&self) -> DESCBASEADDR_R { - DESCBASEADDR_R::new(((self.bits >> 10) & 0x003f_ffff) as u32) - } #[doc = "Bits 4:9 - Offset into the descriptor table"] #[inline(always)] - pub fn descsel(&self) -> DESCSEL_R { - DESCSEL_R::new(((self.bits >> 4) & 0x3f) as u8) + pub fn descsel(&self) -> DescselR { + DescselR::new(((self.bits >> 4) & 0x3f) as u8) + } + #[doc = "Bits 10:31 - Sets the base address of the descriptor table"] + #[inline(always)] + pub fn descbaseaddr(&self) -> DescbaseaddrR { + DescbaseaddrR::new((self.bits >> 10) & 0x003f_ffff) } } impl W { - #[doc = "Bits 10:31 - Sets the base address of the descriptor table"] - #[inline(always)] - pub fn descbaseaddr(&mut self) -> DESCBASEADDR_W { - DESCBASEADDR_W { w: self } - } #[doc = "Bits 4:9 - Offset into the descriptor table"] #[inline(always)] - pub fn descsel(&mut self) -> DESCSEL_W { - DESCSEL_W { w: self } + #[must_use] + pub fn descsel(&mut self) -> DescselW { + DescselW::new(self, 4) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 10:31 - Sets the base address of the descriptor table"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn descbaseaddr(&mut self) -> DescbaseaddrW { + DescbaseaddrW::new(self, 10) } } -#[doc = "DMA Transmitter Descriptor Table Address Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dmatxdesc0](index.html) module"] -pub struct DMATXDESC0_SPEC; -impl crate::RegisterSpec for DMATXDESC0_SPEC { +#[doc = "DMA Transmitter Descriptor Table Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dmatxdesc0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dmatxdesc0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Dmatxdesc0Spec; +impl crate::RegisterSpec for Dmatxdesc0Spec { type Ux = u32; } -#[doc = "`read()` method returns [dmatxdesc0::R](R) reader structure"] -impl crate::Readable for DMATXDESC0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dmatxdesc0::W](W) writer structure"] -impl crate::Writable for DMATXDESC0_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`dmatxdesc0::R`](R) reader structure"] +impl crate::Readable for Dmatxdesc0Spec {} +#[doc = "`write(|w| ..)` method takes [`dmatxdesc0::W`](W) writer structure"] +impl crate::Writable for Dmatxdesc0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DMATXDESC0 to value 0"] -impl crate::Resettable for DMATXDESC0_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Dmatxdesc0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/spw/sts.rs b/va416xx/src/spw/sts.rs index 930f6ba..1dc5074 100644 --- a/va416xx/src/spw/sts.rs +++ b/va416xx/src/spw/sts.rs @@ -1,600 +1,205 @@ #[doc = "Register `STS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `STS` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `NRXD` reader - Number of Receive Descriptors"] -pub struct NRXD_R(crate::FieldReader); -impl NRXD_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - NRXD_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for NRXD_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `NRXD` writer - Number of Receive Descriptors"] -pub struct NRXD_W<'a> { - w: &'a mut W, -} -impl<'a> NRXD_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x03 << 26)) | ((value as u32 & 0x03) << 26); - self.w - } -} -#[doc = "Field `NTXD` reader - Number of Transmit Descriptors"] -pub struct NTXD_R(crate::FieldReader); -impl NTXD_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - NTXD_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for NTXD_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `NTXD` writer - Number of Transmit Descriptors"] -pub struct NTXD_W<'a> { - w: &'a mut W, -} -impl<'a> NTXD_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x03 << 24)) | ((value as u32 & 0x03) << 24); - self.w - } -} -#[doc = "Field `LS` reader - Link State"] -pub struct LS_R(crate::FieldReader); -impl LS_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - LS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for LS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `LS` writer - Link State"] -pub struct LS_W<'a> { - w: &'a mut W, -} -impl<'a> LS_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x07 << 21)) | ((value as u32 & 0x07) << 21); - self.w - } -} -#[doc = "Field `AP` reader - Active port"] -pub struct AP_R(crate::FieldReader); -impl AP_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - AP_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for AP_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `AP` writer - Active port"] -pub struct AP_W<'a> { - w: &'a mut W, -} -impl<'a> AP_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); - self.w - } -} -#[doc = "Field `EE` reader - Set to one when a packet is received with an EOP after the first byte for a non-RMAP packet and after the second byte for a RMAP packet"] -pub struct EE_R(crate::FieldReader); -impl EE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - EE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for EE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `EE` writer - Set to one when a packet is received with an EOP after the first byte for a non-RMAP packet and after the second byte for a RMAP packet"] -pub struct EE_W<'a> { - w: &'a mut W, -} -impl<'a> EE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); - self.w - } -} -#[doc = "Field `IA` reader - Packet is received with an invalid destination address field"] -pub struct IA_R(crate::FieldReader); -impl IA_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - IA_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for IA_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `IA` writer - Packet is received with an invalid destination address field"] -pub struct IA_W<'a> { - w: &'a mut W, -} -impl<'a> IA_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); - self.w - } -} -#[doc = "Field `WE` reader - A synchronization problem has occurred when receiving NChars"] -pub struct WE_R(crate::FieldReader); -impl WE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - WE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for WE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `WE` writer - A synchronization problem has occurred when receiving NChars"] -pub struct WE_W<'a> { - w: &'a mut W, -} -impl<'a> WE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); - self.w - } -} -#[doc = "Field `PE` reader - Parity error has occurred"] -pub struct PE_R(crate::FieldReader); -impl PE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - PE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `PE` writer - Parity error has occurred"] -pub struct PE_W<'a> { - w: &'a mut W, -} -impl<'a> PE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); - self.w - } -} -#[doc = "Field `DE` reader - Disconnection error has occurred"] -pub struct DE_R(crate::FieldReader); -impl DE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - DE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for DE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `DE` writer - Disconnection error has occurred"] -pub struct DE_W<'a> { - w: &'a mut W, -} -impl<'a> DE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); - self.w - } -} -#[doc = "Field `ER` reader - Escape error has occurred"] -pub struct ER_R(crate::FieldReader); -impl ER_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - ER_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ER_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `ER` writer - Escape error has occurred"] -pub struct ER_W<'a> { - w: &'a mut W, -} -impl<'a> ER_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); - self.w - } -} -#[doc = "Field `CE` reader - Credit has occurred"] -pub struct CE_R(crate::FieldReader); -impl CE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CE` writer - Credit has occurred"] -pub struct CE_W<'a> { - w: &'a mut W, -} -impl<'a> CE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); - self.w - } -} +pub type W = crate::W; #[doc = "Field `TO` reader - A new time count value was received"] -pub struct TO_R(crate::FieldReader); -impl TO_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TO_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TO_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type ToR = crate::BitReader; #[doc = "Field `TO` writer - A new time count value was received"] -pub struct TO_W<'a> { - w: &'a mut W, -} -impl<'a> TO_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} +pub type ToW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `CE` reader - Credit has occurred"] +pub type CeR = crate::BitReader; +#[doc = "Field `CE` writer - Credit has occurred"] +pub type CeW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `ER` reader - Escape error has occurred"] +pub type ErR = crate::BitReader; +#[doc = "Field `ER` writer - Escape error has occurred"] +pub type ErW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `DE` reader - Disconnection error has occurred"] +pub type DeR = crate::BitReader; +#[doc = "Field `DE` writer - Disconnection error has occurred"] +pub type DeW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `PE` reader - Parity error has occurred"] +pub type PeR = crate::BitReader; +#[doc = "Field `PE` writer - Parity error has occurred"] +pub type PeW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `WE` reader - A synchronization problem has occurred when receiving NChars"] +pub type WeR = crate::BitReader; +#[doc = "Field `WE` writer - A synchronization problem has occurred when receiving NChars"] +pub type WeW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `IA` reader - Packet is received with an invalid destination address field"] +pub type IaR = crate::BitReader; +#[doc = "Field `IA` writer - Packet is received with an invalid destination address field"] +pub type IaW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `EE` reader - Set to one when a packet is received with an EOP after the first byte for a non-RMAP packet and after the second byte for a RMAP packet"] +pub type EeR = crate::BitReader; +#[doc = "Field `EE` writer - Set to one when a packet is received with an EOP after the first byte for a non-RMAP packet and after the second byte for a RMAP packet"] +pub type EeW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `AP` reader - Active port"] +pub type ApR = crate::BitReader; +#[doc = "Field `AP` writer - Active port"] +pub type ApW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `LS` reader - Link State"] +pub type LsR = crate::FieldReader; +#[doc = "Field `LS` writer - Link State"] +pub type LsW<'a, REG> = crate::FieldWriter<'a, REG, 3>; +#[doc = "Field `NTXD` reader - Number of Transmit Descriptors"] +pub type NtxdR = crate::FieldReader; +#[doc = "Field `NTXD` writer - Number of Transmit Descriptors"] +pub type NtxdW<'a, REG> = crate::FieldWriter<'a, REG, 2>; +#[doc = "Field `NRXD` reader - Number of Receive Descriptors"] +pub type NrxdR = crate::FieldReader; +#[doc = "Field `NRXD` writer - Number of Receive Descriptors"] +pub type NrxdW<'a, REG> = crate::FieldWriter<'a, REG, 2>; impl R { - #[doc = "Bits 26:27 - Number of Receive Descriptors"] + #[doc = "Bit 0 - A new time count value was received"] #[inline(always)] - pub fn nrxd(&self) -> NRXD_R { - NRXD_R::new(((self.bits >> 26) & 0x03) as u8) - } - #[doc = "Bits 24:25 - Number of Transmit Descriptors"] - #[inline(always)] - pub fn ntxd(&self) -> NTXD_R { - NTXD_R::new(((self.bits >> 24) & 0x03) as u8) - } - #[doc = "Bits 21:23 - Link State"] - #[inline(always)] - pub fn ls(&self) -> LS_R { - LS_R::new(((self.bits >> 21) & 0x07) as u8) - } - #[doc = "Bit 9 - Active port"] - #[inline(always)] - pub fn ap(&self) -> AP_R { - AP_R::new(((self.bits >> 9) & 0x01) != 0) - } - #[doc = "Bit 8 - Set to one when a packet is received with an EOP after the first byte for a non-RMAP packet and after the second byte for a RMAP packet"] - #[inline(always)] - pub fn ee(&self) -> EE_R { - EE_R::new(((self.bits >> 8) & 0x01) != 0) - } - #[doc = "Bit 7 - Packet is received with an invalid destination address field"] - #[inline(always)] - pub fn ia(&self) -> IA_R { - IA_R::new(((self.bits >> 7) & 0x01) != 0) - } - #[doc = "Bit 6 - A synchronization problem has occurred when receiving NChars"] - #[inline(always)] - pub fn we(&self) -> WE_R { - WE_R::new(((self.bits >> 6) & 0x01) != 0) - } - #[doc = "Bit 4 - Parity error has occurred"] - #[inline(always)] - pub fn pe(&self) -> PE_R { - PE_R::new(((self.bits >> 4) & 0x01) != 0) - } - #[doc = "Bit 3 - Disconnection error has occurred"] - #[inline(always)] - pub fn de(&self) -> DE_R { - DE_R::new(((self.bits >> 3) & 0x01) != 0) - } - #[doc = "Bit 2 - Escape error has occurred"] - #[inline(always)] - pub fn er(&self) -> ER_R { - ER_R::new(((self.bits >> 2) & 0x01) != 0) + pub fn to(&self) -> ToR { + ToR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Credit has occurred"] #[inline(always)] - pub fn ce(&self) -> CE_R { - CE_R::new(((self.bits >> 1) & 0x01) != 0) + pub fn ce(&self) -> CeR { + CeR::new(((self.bits >> 1) & 1) != 0) } - #[doc = "Bit 0 - A new time count value was received"] + #[doc = "Bit 2 - Escape error has occurred"] #[inline(always)] - pub fn to(&self) -> TO_R { - TO_R::new((self.bits & 0x01) != 0) + pub fn er(&self) -> ErR { + ErR::new(((self.bits >> 2) & 1) != 0) + } + #[doc = "Bit 3 - Disconnection error has occurred"] + #[inline(always)] + pub fn de(&self) -> DeR { + DeR::new(((self.bits >> 3) & 1) != 0) + } + #[doc = "Bit 4 - Parity error has occurred"] + #[inline(always)] + pub fn pe(&self) -> PeR { + PeR::new(((self.bits >> 4) & 1) != 0) + } + #[doc = "Bit 6 - A synchronization problem has occurred when receiving NChars"] + #[inline(always)] + pub fn we(&self) -> WeR { + WeR::new(((self.bits >> 6) & 1) != 0) + } + #[doc = "Bit 7 - Packet is received with an invalid destination address field"] + #[inline(always)] + pub fn ia(&self) -> IaR { + IaR::new(((self.bits >> 7) & 1) != 0) + } + #[doc = "Bit 8 - Set to one when a packet is received with an EOP after the first byte for a non-RMAP packet and after the second byte for a RMAP packet"] + #[inline(always)] + pub fn ee(&self) -> EeR { + EeR::new(((self.bits >> 8) & 1) != 0) + } + #[doc = "Bit 9 - Active port"] + #[inline(always)] + pub fn ap(&self) -> ApR { + ApR::new(((self.bits >> 9) & 1) != 0) + } + #[doc = "Bits 21:23 - Link State"] + #[inline(always)] + pub fn ls(&self) -> LsR { + LsR::new(((self.bits >> 21) & 7) as u8) + } + #[doc = "Bits 24:25 - Number of Transmit Descriptors"] + #[inline(always)] + pub fn ntxd(&self) -> NtxdR { + NtxdR::new(((self.bits >> 24) & 3) as u8) + } + #[doc = "Bits 26:27 - Number of Receive Descriptors"] + #[inline(always)] + pub fn nrxd(&self) -> NrxdR { + NrxdR::new(((self.bits >> 26) & 3) as u8) } } impl W { - #[doc = "Bits 26:27 - Number of Receive Descriptors"] + #[doc = "Bit 0 - A new time count value was received"] #[inline(always)] - pub fn nrxd(&mut self) -> NRXD_W { - NRXD_W { w: self } - } - #[doc = "Bits 24:25 - Number of Transmit Descriptors"] - #[inline(always)] - pub fn ntxd(&mut self) -> NTXD_W { - NTXD_W { w: self } - } - #[doc = "Bits 21:23 - Link State"] - #[inline(always)] - pub fn ls(&mut self) -> LS_W { - LS_W { w: self } - } - #[doc = "Bit 9 - Active port"] - #[inline(always)] - pub fn ap(&mut self) -> AP_W { - AP_W { w: self } - } - #[doc = "Bit 8 - Set to one when a packet is received with an EOP after the first byte for a non-RMAP packet and after the second byte for a RMAP packet"] - #[inline(always)] - pub fn ee(&mut self) -> EE_W { - EE_W { w: self } - } - #[doc = "Bit 7 - Packet is received with an invalid destination address field"] - #[inline(always)] - pub fn ia(&mut self) -> IA_W { - IA_W { w: self } - } - #[doc = "Bit 6 - A synchronization problem has occurred when receiving NChars"] - #[inline(always)] - pub fn we(&mut self) -> WE_W { - WE_W { w: self } - } - #[doc = "Bit 4 - Parity error has occurred"] - #[inline(always)] - pub fn pe(&mut self) -> PE_W { - PE_W { w: self } - } - #[doc = "Bit 3 - Disconnection error has occurred"] - #[inline(always)] - pub fn de(&mut self) -> DE_W { - DE_W { w: self } - } - #[doc = "Bit 2 - Escape error has occurred"] - #[inline(always)] - pub fn er(&mut self) -> ER_W { - ER_W { w: self } + #[must_use] + pub fn to(&mut self) -> ToW { + ToW::new(self, 0) } #[doc = "Bit 1 - Credit has occurred"] #[inline(always)] - pub fn ce(&mut self) -> CE_W { - CE_W { w: self } + #[must_use] + pub fn ce(&mut self) -> CeW { + CeW::new(self, 1) } - #[doc = "Bit 0 - A new time count value was received"] + #[doc = "Bit 2 - Escape error has occurred"] #[inline(always)] - pub fn to(&mut self) -> TO_W { - TO_W { w: self } + #[must_use] + pub fn er(&mut self) -> ErW { + ErW::new(self, 2) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bit 3 - Disconnection error has occurred"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn de(&mut self) -> DeW { + DeW::new(self, 3) + } + #[doc = "Bit 4 - Parity error has occurred"] + #[inline(always)] + #[must_use] + pub fn pe(&mut self) -> PeW { + PeW::new(self, 4) + } + #[doc = "Bit 6 - A synchronization problem has occurred when receiving NChars"] + #[inline(always)] + #[must_use] + pub fn we(&mut self) -> WeW { + WeW::new(self, 6) + } + #[doc = "Bit 7 - Packet is received with an invalid destination address field"] + #[inline(always)] + #[must_use] + pub fn ia(&mut self) -> IaW { + IaW::new(self, 7) + } + #[doc = "Bit 8 - Set to one when a packet is received with an EOP after the first byte for a non-RMAP packet and after the second byte for a RMAP packet"] + #[inline(always)] + #[must_use] + pub fn ee(&mut self) -> EeW { + EeW::new(self, 8) + } + #[doc = "Bit 9 - Active port"] + #[inline(always)] + #[must_use] + pub fn ap(&mut self) -> ApW { + ApW::new(self, 9) + } + #[doc = "Bits 21:23 - Link State"] + #[inline(always)] + #[must_use] + pub fn ls(&mut self) -> LsW { + LsW::new(self, 21) + } + #[doc = "Bits 24:25 - Number of Transmit Descriptors"] + #[inline(always)] + #[must_use] + pub fn ntxd(&mut self) -> NtxdW { + NtxdW::new(self, 24) + } + #[doc = "Bits 26:27 - Number of Receive Descriptors"] + #[inline(always)] + #[must_use] + pub fn nrxd(&mut self) -> NrxdW { + NrxdW::new(self, 26) } } -#[doc = "Status/Interrupt Source Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sts](index.html) module"] -pub struct STS_SPEC; -impl crate::RegisterSpec for STS_SPEC { +#[doc = "Status/Interrupt Source Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sts::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sts::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StsSpec; +impl crate::RegisterSpec for StsSpec { type Ux = u32; } -#[doc = "`read()` method returns [sts::R](R) reader structure"] -impl crate::Readable for STS_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [sts::W](W) writer structure"] -impl crate::Writable for STS_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`sts::R`](R) reader structure"] +impl crate::Readable for StsSpec {} +#[doc = "`write(|w| ..)` method takes [`sts::W`](W) writer structure"] +impl crate::Writable for StsSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets STS to value 0x0640_0000"] -impl crate::Resettable for STS_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0x0640_0000 - } +impl crate::Resettable for StsSpec { + const RESET_VALUE: u32 = 0x0640_0000; } diff --git a/va416xx/src/spw/tc.rs b/va416xx/src/spw/tc.rs index b3987cb..5f44ccb 100644 --- a/va416xx/src/spw/tc.rs +++ b/va416xx/src/spw/tc.rs @@ -1,140 +1,55 @@ #[doc = "Register `TC` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TC` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `TIRQ_END` reader - The current value of the time control flags"] -pub struct TIRQ_END_R(crate::FieldReader); -impl TIRQ_END_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - TIRQ_END_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TIRQ_END_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TIRQ_END` writer - The current value of the time control flags"] -pub struct TIRQ_END_W<'a> { - w: &'a mut W, -} -impl<'a> TIRQ_END_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x03 << 6)) | ((value as u32 & 0x03) << 6); - self.w - } -} +pub type W = crate::W; #[doc = "Field `TIMECNT` reader - The current value of the system time counter"] -pub struct TIMECNT_R(crate::FieldReader); -impl TIMECNT_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - TIMECNT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TIMECNT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type TimecntR = crate::FieldReader; #[doc = "Field `TIMECNT` writer - The current value of the system time counter"] -pub struct TIMECNT_W<'a> { - w: &'a mut W, -} -impl<'a> TIMECNT_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0x3f) | (value as u32 & 0x3f); - self.w - } -} +pub type TimecntW<'a, REG> = crate::FieldWriter<'a, REG, 6>; +#[doc = "Field `TIRQ_END` reader - The current value of the time control flags"] +pub type TirqEndR = crate::FieldReader; +#[doc = "Field `TIRQ_END` writer - The current value of the time control flags"] +pub type TirqEndW<'a, REG> = crate::FieldWriter<'a, REG, 2>; impl R { - #[doc = "Bits 6:7 - The current value of the time control flags"] - #[inline(always)] - pub fn tirq_end(&self) -> TIRQ_END_R { - TIRQ_END_R::new(((self.bits >> 6) & 0x03) as u8) - } #[doc = "Bits 0:5 - The current value of the system time counter"] #[inline(always)] - pub fn timecnt(&self) -> TIMECNT_R { - TIMECNT_R::new((self.bits & 0x3f) as u8) + pub fn timecnt(&self) -> TimecntR { + TimecntR::new((self.bits & 0x3f) as u8) + } + #[doc = "Bits 6:7 - The current value of the time control flags"] + #[inline(always)] + pub fn tirq_end(&self) -> TirqEndR { + TirqEndR::new(((self.bits >> 6) & 3) as u8) } } impl W { - #[doc = "Bits 6:7 - The current value of the time control flags"] - #[inline(always)] - pub fn tirq_end(&mut self) -> TIRQ_END_W { - TIRQ_END_W { w: self } - } #[doc = "Bits 0:5 - The current value of the system time counter"] #[inline(always)] - pub fn timecnt(&mut self) -> TIMECNT_W { - TIMECNT_W { w: self } + #[must_use] + pub fn timecnt(&mut self) -> TimecntW { + TimecntW::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 6:7 - The current value of the time control flags"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn tirq_end(&mut self) -> TirqEndW { + TirqEndW::new(self, 6) } } -#[doc = "Time Code Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tc](index.html) module"] -pub struct TC_SPEC; -impl crate::RegisterSpec for TC_SPEC { +#[doc = "Time Code Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TcSpec; +impl crate::RegisterSpec for TcSpec { type Ux = u32; } -#[doc = "`read()` method returns [tc::R](R) reader structure"] -impl crate::Readable for TC_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [tc::W](W) writer structure"] -impl crate::Writable for TC_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`tc::R`](R) reader structure"] +impl crate::Readable for TcSpec {} +#[doc = "`write(|w| ..)` method takes [`tc::W`](W) writer structure"] +impl crate::Writable for TcSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TC to value 0"] -impl crate::Resettable for TC_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for TcSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/spw/tdr.rs b/va416xx/src/spw/tdr.rs index 7b4e378..9945a45 100644 --- a/va416xx/src/spw/tdr.rs +++ b/va416xx/src/spw/tdr.rs @@ -1,73 +1,29 @@ #[doc = "Register `TDR` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Field `DISCONNECT` reader - Used to generate the 850 ns disconnect time period"] -pub struct DISCONNECT_R(crate::FieldReader); -impl DISCONNECT_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - DISCONNECT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for DISCONNECT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type R = crate::R; #[doc = "Field `TIMER64` reader - Used to generate the 6.4 and 12.8 us time periods"] -pub struct TIMER64_R(crate::FieldReader); -impl TIMER64_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - TIMER64_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TIMER64_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Timer64R = crate::FieldReader; +#[doc = "Field `DISCONNECT` reader - Used to generate the 850 ns disconnect time period"] +pub type DisconnectR = crate::FieldReader; impl R { - #[doc = "Bits 12:21 - Used to generate the 850 ns disconnect time period"] - #[inline(always)] - pub fn disconnect(&self) -> DISCONNECT_R { - DISCONNECT_R::new(((self.bits >> 12) & 0x03ff) as u16) - } #[doc = "Bits 0:11 - Used to generate the 6.4 and 12.8 us time periods"] #[inline(always)] - pub fn timer64(&self) -> TIMER64_R { - TIMER64_R::new((self.bits & 0x0fff) as u16) + pub fn timer64(&self) -> Timer64R { + Timer64R::new((self.bits & 0x0fff) as u16) + } + #[doc = "Bits 12:21 - Used to generate the 850 ns disconnect time period"] + #[inline(always)] + pub fn disconnect(&self) -> DisconnectR { + DisconnectR::new(((self.bits >> 12) & 0x03ff) as u16) } } -#[doc = "Timer and Disconnect Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tdr](index.html) module"] -pub struct TDR_SPEC; -impl crate::RegisterSpec for TDR_SPEC { +#[doc = "Timer and Disconnect Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tdr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TdrSpec; +impl crate::RegisterSpec for TdrSpec { type Ux = u32; } -#[doc = "`read()` method returns [tdr::R](R) reader structure"] -impl crate::Readable for TDR_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`tdr::R`](R) reader structure"] +impl crate::Readable for TdrSpec {} #[doc = "`reset()` method sets TDR to value 0"] -impl crate::Resettable for TDR_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for TdrSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/sysconfig.rs b/va416xx/src/sysconfig.rs index 9ebae59..52d41fa 100644 --- a/va416xx/src/sysconfig.rs +++ b/va416xx/src/sysconfig.rs @@ -1,281 +1,495 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - #[doc = "0x00 - System Reset Status"] - pub rst_stat: crate::Reg, - #[doc = "0x04 - ROM Reset Control"] - pub rst_cntl_rom: crate::Reg, - #[doc = "0x08 - RAM Reset Control"] - pub rst_cntl_ram0: crate::Reg, - #[doc = "0x0c - RAM Reset Control"] - pub rst_cntl_ram1: crate::Reg, - #[doc = "0x10 - ROM Protection Configuration"] - pub rom_prot: crate::Reg, - #[doc = "0x14 - ROM Scrub Period Configuration"] - pub rom_scrub: crate::Reg, - #[doc = "0x18 - RAM0 Scrub Period Configuration"] - pub ram0_scrub: crate::Reg, - #[doc = "0x1c - RAM1 Scrub Period Configuration"] - pub ram1_scrub: crate::Reg, - #[doc = "0x20 - Enable EDAC Error Interrupt Register"] - pub irq_enb: crate::Reg, - #[doc = "0x24 - Raw EDAC Error Interrupt Status"] - pub irq_raw: crate::Reg, - #[doc = "0x28 - Enabled EDAC Error Interrupt Status"] - pub irq_end: crate::Reg, - #[doc = "0x2c - Clear EDAC Error Interrupt Status"] - pub irq_clr: crate::Reg, - #[doc = "0x30 - Count of RAM0 EDAC Single Bit Errors"] - pub ram0_sbe: crate::Reg, - #[doc = "0x34 - Count of RAM1 EDAC Single Bit Errors"] - pub ram1_sbe: crate::Reg, - #[doc = "0x38 - Count of RAM0 EDAC Multi Bit Errors"] - pub ram0_mbe: crate::Reg, - #[doc = "0x3c - Count of RAM1 EDAC Multi Bit Errors"] - pub ram1_mbe: crate::Reg, - #[doc = "0x40 - Count of ROM EDAC Single Bit Errors"] - pub rom_sbe: crate::Reg, - #[doc = "0x44 - Count of ROM EDAC Multi Bit Errors"] - pub rom_mbe: crate::Reg, - #[doc = "0x48 - ROM BOOT Retry count"] - pub rom_retries: crate::Reg, - #[doc = "0x4c - Register Refresh Rate for TMR registers"] - pub refresh_config_h: crate::Reg, - #[doc = "0x50 - TIM Reset Control"] - pub tim_reset: crate::Reg, - #[doc = "0x54 - TIM Enable Control"] - pub tim_clk_enable: crate::Reg, - #[doc = "0x58 - Peripheral Reset Control"] - pub peripheral_reset: crate::Reg, - #[doc = "0x5c - Peripheral Enable Control"] - pub peripheral_clk_enable: crate::Reg, - #[doc = "0x60 - SPW M4 control register"] - pub spw_m4_ctrl: crate::Reg, - #[doc = "0x64 - PMU Control Register"] - pub pmu_ctrl: crate::Reg, - #[doc = "0x68 - Wakeup Control"] - pub wakeup_cnt: crate::Reg, - #[doc = "0x6c - EBI Config Register 0"] - pub ebi_cfg0: crate::Reg, - #[doc = "0x70 - EBI Config Register 1"] - pub ebi_cfg1: crate::Reg, - #[doc = "0x74 - EBI Config Register 2"] - pub ebi_cfg2: crate::Reg, - #[doc = "0x78 - EBI Config Register 3"] - pub ebi_cfg3: crate::Reg, - #[doc = "0x7c - Analog Control Register"] - pub analog_cntl: crate::Reg, - #[doc = "0x80 - Initial SpW Clock Divider Value"] - pub sw_clkdiv10: crate::Reg, - #[doc = "0x84 - Register Refresh Rate for TMR registers"] - pub refresh_config_l: crate::Reg, + rst_stat: RstStat, + rst_cntl_rom: RstCntlRom, + rst_cntl_ram0: RstCntlRam0, + rst_cntl_ram1: RstCntlRam1, + rom_prot: RomProt, + rom_scrub: RomScrub, + ram0_scrub: Ram0Scrub, + ram1_scrub: Ram1Scrub, + irq_enb: IrqEnb, + irq_raw: IrqRaw, + irq_end: IrqEnd, + irq_clr: IrqClr, + ram0_sbe: Ram0Sbe, + ram1_sbe: Ram1Sbe, + ram0_mbe: Ram0Mbe, + ram1_mbe: Ram1Mbe, + rom_sbe: RomSbe, + rom_mbe: RomMbe, + rom_retries: RomRetries, + refresh_config_h: RefreshConfigH, + tim_reset: TimReset, + tim_clk_enable: TimClkEnable, + peripheral_reset: PeripheralReset, + peripheral_clk_enable: PeripheralClkEnable, + spw_m4_ctrl: SpwM4Ctrl, + pmu_ctrl: PmuCtrl, + wakeup_cnt: WakeupCnt, + ebi_cfg0: EbiCfg0, + ebi_cfg1: EbiCfg1, + ebi_cfg2: EbiCfg2, + ebi_cfg3: EbiCfg3, + analog_cntl: AnalogCntl, + sw_clkdiv10: SwClkdiv10, + refresh_config_l: RefreshConfigL, _reserved34: [u8; 0x0f48], - #[doc = "0xfd0 - DAC0 Calibration Register"] - pub dac0_cal: crate::Reg, - #[doc = "0xfd4 - DAC1 Calibration Register"] - pub dac1_cal: crate::Reg, - #[doc = "0xfd8 - ADC Calibration Register"] - pub adc_cal: crate::Reg, - #[doc = "0xfdc - Bandgap Calibration Register"] - pub bg_cal: crate::Reg, - #[doc = "0xfe0 - Digital LDO Regulator Calibration Register"] - pub dreg_cal: crate::Reg, - #[doc = "0xfe4 - Analog LDO Regulator Calibration Register"] - pub areg_cal: crate::Reg, - #[doc = "0xfe8 - Heart Beat OSC Calibration Register"] - pub hbo_cal: crate::Reg, - #[doc = "0xfec - EFuse Config Register"] - pub ef_config: crate::Reg, - #[doc = "0xff0 - EFuse ID0 Register"] - pub ef_id0: crate::Reg, - #[doc = "0xff4 - EFuse ID1 Register"] - pub ef_id1: crate::Reg, - #[doc = "0xff8 - Processor ID Register"] - pub procid: crate::Reg, - #[doc = "0xffc - Peripheral ID Register"] - pub perid: crate::Reg, + dac0_cal: Dac0Cal, + dac1_cal: Dac1Cal, + adc_cal: AdcCal, + bg_cal: BgCal, + dreg_cal: DregCal, + areg_cal: AregCal, + hbo_cal: HboCal, + ef_config: EfConfig, + ef_id0: EfId0, + ef_id1: EfId1, + procid: Procid, + perid: Perid, } -#[doc = "RST_STAT register accessor: an alias for `Reg`"] -pub type RST_STAT = crate::Reg; +impl RegisterBlock { + #[doc = "0x00 - System Reset Status"] + #[inline(always)] + pub const fn rst_stat(&self) -> &RstStat { + &self.rst_stat + } + #[doc = "0x04 - ROM Reset Control"] + #[inline(always)] + pub const fn rst_cntl_rom(&self) -> &RstCntlRom { + &self.rst_cntl_rom + } + #[doc = "0x08 - RAM Reset Control"] + #[inline(always)] + pub const fn rst_cntl_ram0(&self) -> &RstCntlRam0 { + &self.rst_cntl_ram0 + } + #[doc = "0x0c - RAM Reset Control"] + #[inline(always)] + pub const fn rst_cntl_ram1(&self) -> &RstCntlRam1 { + &self.rst_cntl_ram1 + } + #[doc = "0x10 - ROM Protection Configuration"] + #[inline(always)] + pub const fn rom_prot(&self) -> &RomProt { + &self.rom_prot + } + #[doc = "0x14 - ROM Scrub Period Configuration"] + #[inline(always)] + pub const fn rom_scrub(&self) -> &RomScrub { + &self.rom_scrub + } + #[doc = "0x18 - RAM0 Scrub Period Configuration"] + #[inline(always)] + pub const fn ram0_scrub(&self) -> &Ram0Scrub { + &self.ram0_scrub + } + #[doc = "0x1c - RAM1 Scrub Period Configuration"] + #[inline(always)] + pub const fn ram1_scrub(&self) -> &Ram1Scrub { + &self.ram1_scrub + } + #[doc = "0x20 - Enable EDAC Error Interrupt Register"] + #[inline(always)] + pub const fn irq_enb(&self) -> &IrqEnb { + &self.irq_enb + } + #[doc = "0x24 - Raw EDAC Error Interrupt Status"] + #[inline(always)] + pub const fn irq_raw(&self) -> &IrqRaw { + &self.irq_raw + } + #[doc = "0x28 - Enabled EDAC Error Interrupt Status"] + #[inline(always)] + pub const fn irq_end(&self) -> &IrqEnd { + &self.irq_end + } + #[doc = "0x2c - Clear EDAC Error Interrupt Status"] + #[inline(always)] + pub const fn irq_clr(&self) -> &IrqClr { + &self.irq_clr + } + #[doc = "0x30 - Count of RAM0 EDAC Single Bit Errors"] + #[inline(always)] + pub const fn ram0_sbe(&self) -> &Ram0Sbe { + &self.ram0_sbe + } + #[doc = "0x34 - Count of RAM1 EDAC Single Bit Errors"] + #[inline(always)] + pub const fn ram1_sbe(&self) -> &Ram1Sbe { + &self.ram1_sbe + } + #[doc = "0x38 - Count of RAM0 EDAC Multi Bit Errors"] + #[inline(always)] + pub const fn ram0_mbe(&self) -> &Ram0Mbe { + &self.ram0_mbe + } + #[doc = "0x3c - Count of RAM1 EDAC Multi Bit Errors"] + #[inline(always)] + pub const fn ram1_mbe(&self) -> &Ram1Mbe { + &self.ram1_mbe + } + #[doc = "0x40 - Count of ROM EDAC Single Bit Errors"] + #[inline(always)] + pub const fn rom_sbe(&self) -> &RomSbe { + &self.rom_sbe + } + #[doc = "0x44 - Count of ROM EDAC Multi Bit Errors"] + #[inline(always)] + pub const fn rom_mbe(&self) -> &RomMbe { + &self.rom_mbe + } + #[doc = "0x48 - ROM BOOT Retry count"] + #[inline(always)] + pub const fn rom_retries(&self) -> &RomRetries { + &self.rom_retries + } + #[doc = "0x4c - Register Refresh Rate for TMR registers"] + #[inline(always)] + pub const fn refresh_config_h(&self) -> &RefreshConfigH { + &self.refresh_config_h + } + #[doc = "0x50 - TIM Reset Control"] + #[inline(always)] + pub const fn tim_reset(&self) -> &TimReset { + &self.tim_reset + } + #[doc = "0x54 - TIM Enable Control"] + #[inline(always)] + pub const fn tim_clk_enable(&self) -> &TimClkEnable { + &self.tim_clk_enable + } + #[doc = "0x58 - Peripheral Reset Control"] + #[inline(always)] + pub const fn peripheral_reset(&self) -> &PeripheralReset { + &self.peripheral_reset + } + #[doc = "0x5c - Peripheral Enable Control"] + #[inline(always)] + pub const fn peripheral_clk_enable(&self) -> &PeripheralClkEnable { + &self.peripheral_clk_enable + } + #[doc = "0x60 - SPW M4 control register"] + #[inline(always)] + pub const fn spw_m4_ctrl(&self) -> &SpwM4Ctrl { + &self.spw_m4_ctrl + } + #[doc = "0x64 - PMU Control Register"] + #[inline(always)] + pub const fn pmu_ctrl(&self) -> &PmuCtrl { + &self.pmu_ctrl + } + #[doc = "0x68 - Wakeup Control"] + #[inline(always)] + pub const fn wakeup_cnt(&self) -> &WakeupCnt { + &self.wakeup_cnt + } + #[doc = "0x6c - EBI Config Register 0"] + #[inline(always)] + pub const fn ebi_cfg0(&self) -> &EbiCfg0 { + &self.ebi_cfg0 + } + #[doc = "0x70 - EBI Config Register 1"] + #[inline(always)] + pub const fn ebi_cfg1(&self) -> &EbiCfg1 { + &self.ebi_cfg1 + } + #[doc = "0x74 - EBI Config Register 2"] + #[inline(always)] + pub const fn ebi_cfg2(&self) -> &EbiCfg2 { + &self.ebi_cfg2 + } + #[doc = "0x78 - EBI Config Register 3"] + #[inline(always)] + pub const fn ebi_cfg3(&self) -> &EbiCfg3 { + &self.ebi_cfg3 + } + #[doc = "0x7c - Analog Control Register"] + #[inline(always)] + pub const fn analog_cntl(&self) -> &AnalogCntl { + &self.analog_cntl + } + #[doc = "0x80 - Initial SpW Clock Divider Value"] + #[inline(always)] + pub const fn sw_clkdiv10(&self) -> &SwClkdiv10 { + &self.sw_clkdiv10 + } + #[doc = "0x84 - Register Refresh Rate for TMR registers"] + #[inline(always)] + pub const fn refresh_config_l(&self) -> &RefreshConfigL { + &self.refresh_config_l + } + #[doc = "0xfd0 - DAC0 Calibration Register"] + #[inline(always)] + pub const fn dac0_cal(&self) -> &Dac0Cal { + &self.dac0_cal + } + #[doc = "0xfd4 - DAC1 Calibration Register"] + #[inline(always)] + pub const fn dac1_cal(&self) -> &Dac1Cal { + &self.dac1_cal + } + #[doc = "0xfd8 - ADC Calibration Register"] + #[inline(always)] + pub const fn adc_cal(&self) -> &AdcCal { + &self.adc_cal + } + #[doc = "0xfdc - Bandgap Calibration Register"] + #[inline(always)] + pub const fn bg_cal(&self) -> &BgCal { + &self.bg_cal + } + #[doc = "0xfe0 - Digital LDO Regulator Calibration Register"] + #[inline(always)] + pub const fn dreg_cal(&self) -> &DregCal { + &self.dreg_cal + } + #[doc = "0xfe4 - Analog LDO Regulator Calibration Register"] + #[inline(always)] + pub const fn areg_cal(&self) -> &AregCal { + &self.areg_cal + } + #[doc = "0xfe8 - Heart Beat OSC Calibration Register"] + #[inline(always)] + pub const fn hbo_cal(&self) -> &HboCal { + &self.hbo_cal + } + #[doc = "0xfec - EFuse Config Register"] + #[inline(always)] + pub const fn ef_config(&self) -> &EfConfig { + &self.ef_config + } + #[doc = "0xff0 - EFuse ID0 Register"] + #[inline(always)] + pub const fn ef_id0(&self) -> &EfId0 { + &self.ef_id0 + } + #[doc = "0xff4 - EFuse ID1 Register"] + #[inline(always)] + pub const fn ef_id1(&self) -> &EfId1 { + &self.ef_id1 + } + #[doc = "0xff8 - Processor ID Register"] + #[inline(always)] + pub const fn procid(&self) -> &Procid { + &self.procid + } + #[doc = "0xffc - Peripheral ID Register"] + #[inline(always)] + pub const fn perid(&self) -> &Perid { + &self.perid + } +} +#[doc = "RST_STAT (rw) register accessor: System Reset Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rst_stat::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rst_stat::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rst_stat`] +module"] +#[doc(alias = "RST_STAT")] +pub type RstStat = crate::Reg; #[doc = "System Reset Status"] pub mod rst_stat; -#[doc = "RST_CNTL_ROM register accessor: an alias for `Reg`"] -pub type RST_CNTL_ROM = crate::Reg; -#[doc = "ROM Reset Control"] -pub mod rst_cntl_rom; -#[doc = "RST_CNTL_RAM0 register accessor: an alias for `Reg`"] -pub type RST_CNTL_RAM0 = crate::Reg; -#[doc = "RAM Reset Control"] -pub mod rst_cntl_ram0; -#[doc = "RST_CNTL_RAM1 register accessor: an alias for `Reg`"] -pub type RST_CNTL_RAM1 = crate::Reg; -#[doc = "RAM Reset Control"] -pub mod rst_cntl_ram1; -#[doc = "ROM_PROT register accessor: an alias for `Reg`"] -pub type ROM_PROT = crate::Reg; +pub use rst_stat as rst_cntl_rom; +pub use rst_stat as rst_cntl_ram0; +pub use rst_stat as rst_cntl_ram1; +pub use RstStat as RstCntlRom; +pub use RstStat as RstCntlRam0; +pub use RstStat as RstCntlRam1; +#[doc = "ROM_PROT (rw) register accessor: ROM Protection Configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rom_prot::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rom_prot::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rom_prot`] +module"] +#[doc(alias = "ROM_PROT")] +pub type RomProt = crate::Reg; #[doc = "ROM Protection Configuration"] pub mod rom_prot; -#[doc = "ROM_SCRUB register accessor: an alias for `Reg`"] -pub type ROM_SCRUB = crate::Reg; +#[doc = "ROM_SCRUB (rw) register accessor: ROM Scrub Period Configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rom_scrub::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rom_scrub::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rom_scrub`] +module"] +#[doc(alias = "ROM_SCRUB")] +pub type RomScrub = crate::Reg; #[doc = "ROM Scrub Period Configuration"] pub mod rom_scrub; -#[doc = "RAM0_SCRUB register accessor: an alias for `Reg`"] -pub type RAM0_SCRUB = crate::Reg; -#[doc = "RAM0 Scrub Period Configuration"] -pub mod ram0_scrub; -#[doc = "RAM1_SCRUB register accessor: an alias for `Reg`"] -pub type RAM1_SCRUB = crate::Reg; -#[doc = "RAM1 Scrub Period Configuration"] -pub mod ram1_scrub; -#[doc = "IRQ_ENB register accessor: an alias for `Reg`"] -pub type IRQ_ENB = crate::Reg; +pub use rom_scrub as ram0_scrub; +pub use rom_scrub as ram1_scrub; +pub use RomScrub as Ram0Scrub; +pub use RomScrub as Ram1Scrub; +#[doc = "IRQ_ENB (rw) register accessor: Enable EDAC Error Interrupt Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_enb::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`irq_enb::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_enb`] +module"] +#[doc(alias = "IRQ_ENB")] +pub type IrqEnb = crate::Reg; #[doc = "Enable EDAC Error Interrupt Register"] pub mod irq_enb; -#[doc = "IRQ_RAW register accessor: an alias for `Reg`"] -pub type IRQ_RAW = crate::Reg; -#[doc = "Raw EDAC Error Interrupt Status"] -pub mod irq_raw; -#[doc = "IRQ_END register accessor: an alias for `Reg`"] -pub type IRQ_END = crate::Reg; -#[doc = "Enabled EDAC Error Interrupt Status"] -pub mod irq_end; -#[doc = "IRQ_CLR register accessor: an alias for `Reg`"] -pub type IRQ_CLR = crate::Reg; -#[doc = "Clear EDAC Error Interrupt Status"] -pub mod irq_clr; -#[doc = "RAM0_SBE register accessor: an alias for `Reg`"] -pub type RAM0_SBE = crate::Reg; +pub use irq_enb as irq_raw; +pub use irq_enb as irq_end; +pub use irq_enb as irq_clr; +pub use IrqEnb as IrqRaw; +pub use IrqEnb as IrqEnd; +pub use IrqEnb as IrqClr; +#[doc = "RAM0_SBE (rw) register accessor: Count of RAM0 EDAC Single Bit Errors\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ram0_sbe::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ram0_sbe::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ram0_sbe`] +module"] +#[doc(alias = "RAM0_SBE")] +pub type Ram0Sbe = crate::Reg; #[doc = "Count of RAM0 EDAC Single Bit Errors"] pub mod ram0_sbe; -#[doc = "RAM1_SBE register accessor: an alias for `Reg`"] -pub type RAM1_SBE = crate::Reg; -#[doc = "Count of RAM1 EDAC Single Bit Errors"] -pub mod ram1_sbe; -#[doc = "RAM0_MBE register accessor: an alias for `Reg`"] -pub type RAM0_MBE = crate::Reg; +pub use ram0_sbe as ram1_sbe; +pub use Ram0Sbe as Ram1Sbe; +#[doc = "RAM0_MBE (rw) register accessor: Count of RAM0 EDAC Multi Bit Errors\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ram0_mbe::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ram0_mbe::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ram0_mbe`] +module"] +#[doc(alias = "RAM0_MBE")] +pub type Ram0Mbe = crate::Reg; #[doc = "Count of RAM0 EDAC Multi Bit Errors"] pub mod ram0_mbe; -#[doc = "RAM1_MBE register accessor: an alias for `Reg`"] -pub type RAM1_MBE = crate::Reg; -#[doc = "Count of RAM1 EDAC Multi Bit Errors"] -pub mod ram1_mbe; -#[doc = "ROM_SBE register accessor: an alias for `Reg`"] -pub type ROM_SBE = crate::Reg; -#[doc = "Count of ROM EDAC Single Bit Errors"] -pub mod rom_sbe; -#[doc = "ROM_MBE register accessor: an alias for `Reg`"] -pub type ROM_MBE = crate::Reg; -#[doc = "Count of ROM EDAC Multi Bit Errors"] -pub mod rom_mbe; -#[doc = "ROM_RETRIES register accessor: an alias for `Reg`"] -pub type ROM_RETRIES = crate::Reg; +pub use ram0_mbe as ram1_mbe; +pub use ram0_mbe as rom_mbe; +pub use ram0_sbe as rom_sbe; +pub use Ram0Mbe as Ram1Mbe; +pub use Ram0Mbe as RomMbe; +pub use Ram0Sbe as RomSbe; +#[doc = "ROM_RETRIES (r) register accessor: ROM BOOT Retry count\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rom_retries::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rom_retries`] +module"] +#[doc(alias = "ROM_RETRIES")] +pub type RomRetries = crate::Reg; #[doc = "ROM BOOT Retry count"] pub mod rom_retries; -#[doc = "REFRESH_CONFIG_H register accessor: an alias for `Reg`"] -pub type REFRESH_CONFIG_H = crate::Reg; +#[doc = "REFRESH_CONFIG_H (rw) register accessor: Register Refresh Rate for TMR registers\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`refresh_config_h::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`refresh_config_h::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@refresh_config_h`] +module"] +#[doc(alias = "REFRESH_CONFIG_H")] +pub type RefreshConfigH = crate::Reg; #[doc = "Register Refresh Rate for TMR registers"] pub mod refresh_config_h; -#[doc = "TIM_RESET register accessor: an alias for `Reg`"] -pub type TIM_RESET = crate::Reg; +#[doc = "TIM_RESET (rw) register accessor: TIM Reset Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tim_reset::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tim_reset::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tim_reset`] +module"] +#[doc(alias = "TIM_RESET")] +pub type TimReset = crate::Reg; #[doc = "TIM Reset Control"] pub mod tim_reset; -#[doc = "TIM_CLK_ENABLE register accessor: an alias for `Reg`"] -pub type TIM_CLK_ENABLE = crate::Reg; +#[doc = "TIM_CLK_ENABLE (rw) register accessor: TIM Enable Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tim_clk_enable::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tim_clk_enable::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tim_clk_enable`] +module"] +#[doc(alias = "TIM_CLK_ENABLE")] +pub type TimClkEnable = crate::Reg; #[doc = "TIM Enable Control"] pub mod tim_clk_enable; -#[doc = "PERIPHERAL_RESET register accessor: an alias for `Reg`"] -pub type PERIPHERAL_RESET = crate::Reg; +#[doc = "PERIPHERAL_RESET (rw) register accessor: Peripheral Reset Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`peripheral_reset::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`peripheral_reset::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@peripheral_reset`] +module"] +#[doc(alias = "PERIPHERAL_RESET")] +pub type PeripheralReset = crate::Reg; #[doc = "Peripheral Reset Control"] pub mod peripheral_reset; -#[doc = "PERIPHERAL_CLK_ENABLE register accessor: an alias for `Reg`"] -pub type PERIPHERAL_CLK_ENABLE = crate::Reg; -#[doc = "Peripheral Enable Control"] -pub mod peripheral_clk_enable; -#[doc = "SPW_M4_CTRL register accessor: an alias for `Reg`"] -pub type SPW_M4_CTRL = crate::Reg; +pub use peripheral_reset as peripheral_clk_enable; +pub use PeripheralReset as PeripheralClkEnable; +#[doc = "SPW_M4_CTRL (rw) register accessor: SPW M4 control register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`spw_m4_ctrl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`spw_m4_ctrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@spw_m4_ctrl`] +module"] +#[doc(alias = "SPW_M4_CTRL")] +pub type SpwM4Ctrl = crate::Reg; #[doc = "SPW M4 control register"] pub mod spw_m4_ctrl; -#[doc = "PMU_CTRL register accessor: an alias for `Reg`"] -pub type PMU_CTRL = crate::Reg; +#[doc = "PMU_CTRL (rw) register accessor: PMU Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pmu_ctrl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pmu_ctrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pmu_ctrl`] +module"] +#[doc(alias = "PMU_CTRL")] +pub type PmuCtrl = crate::Reg; #[doc = "PMU Control Register"] pub mod pmu_ctrl; -#[doc = "WAKEUP_CNT register accessor: an alias for `Reg`"] -pub type WAKEUP_CNT = crate::Reg; +#[doc = "WAKEUP_CNT (rw) register accessor: Wakeup Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wakeup_cnt::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`wakeup_cnt::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wakeup_cnt`] +module"] +#[doc(alias = "WAKEUP_CNT")] +pub type WakeupCnt = crate::Reg; #[doc = "Wakeup Control"] pub mod wakeup_cnt; -#[doc = "EBI_CFG0 register accessor: an alias for `Reg`"] -pub type EBI_CFG0 = crate::Reg; +#[doc = "EBI_CFG0 (rw) register accessor: EBI Config Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ebi_cfg0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ebi_cfg0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ebi_cfg0`] +module"] +#[doc(alias = "EBI_CFG0")] +pub type EbiCfg0 = crate::Reg; #[doc = "EBI Config Register 0"] pub mod ebi_cfg0; -#[doc = "EBI_CFG1 register accessor: an alias for `Reg`"] -pub type EBI_CFG1 = crate::Reg; -#[doc = "EBI Config Register 1"] -pub mod ebi_cfg1; -#[doc = "EBI_CFG2 register accessor: an alias for `Reg`"] -pub type EBI_CFG2 = crate::Reg; -#[doc = "EBI Config Register 2"] -pub mod ebi_cfg2; -#[doc = "EBI_CFG3 register accessor: an alias for `Reg`"] -pub type EBI_CFG3 = crate::Reg; -#[doc = "EBI Config Register 3"] -pub mod ebi_cfg3; -#[doc = "ANALOG_CNTL register accessor: an alias for `Reg`"] -pub type ANALOG_CNTL = crate::Reg; +pub use ebi_cfg0 as ebi_cfg1; +pub use ebi_cfg0 as ebi_cfg2; +pub use ebi_cfg0 as ebi_cfg3; +pub use EbiCfg0 as EbiCfg1; +pub use EbiCfg0 as EbiCfg2; +pub use EbiCfg0 as EbiCfg3; +#[doc = "ANALOG_CNTL (rw) register accessor: Analog Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`analog_cntl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`analog_cntl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@analog_cntl`] +module"] +#[doc(alias = "ANALOG_CNTL")] +pub type AnalogCntl = crate::Reg; #[doc = "Analog Control Register"] pub mod analog_cntl; -#[doc = "SW_CLKDIV10 register accessor: an alias for `Reg`"] -pub type SW_CLKDIV10 = crate::Reg; +#[doc = "SW_CLKDIV10 (rw) register accessor: Initial SpW Clock Divider Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sw_clkdiv10::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sw_clkdiv10::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sw_clkdiv10`] +module"] +#[doc(alias = "SW_CLKDIV10")] +pub type SwClkdiv10 = crate::Reg; #[doc = "Initial SpW Clock Divider Value"] pub mod sw_clkdiv10; -#[doc = "REFRESH_CONFIG_L register accessor: an alias for `Reg`"] -pub type REFRESH_CONFIG_L = crate::Reg; +#[doc = "REFRESH_CONFIG_L (rw) register accessor: Register Refresh Rate for TMR registers\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`refresh_config_l::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`refresh_config_l::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@refresh_config_l`] +module"] +#[doc(alias = "REFRESH_CONFIG_L")] +pub type RefreshConfigL = crate::Reg; #[doc = "Register Refresh Rate for TMR registers"] pub mod refresh_config_l; -#[doc = "DAC0_CAL register accessor: an alias for `Reg`"] -pub type DAC0_CAL = crate::Reg; +#[doc = "DAC0_CAL (r) register accessor: DAC0 Calibration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dac0_cal::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dac0_cal`] +module"] +#[doc(alias = "DAC0_CAL")] +pub type Dac0Cal = crate::Reg; #[doc = "DAC0 Calibration Register"] pub mod dac0_cal; -#[doc = "DAC1_CAL register accessor: an alias for `Reg`"] -pub type DAC1_CAL = crate::Reg; +#[doc = "DAC1_CAL (r) register accessor: DAC1 Calibration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dac1_cal::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dac1_cal`] +module"] +#[doc(alias = "DAC1_CAL")] +pub type Dac1Cal = crate::Reg; #[doc = "DAC1 Calibration Register"] pub mod dac1_cal; -#[doc = "ADC_CAL register accessor: an alias for `Reg`"] -pub type ADC_CAL = crate::Reg; +#[doc = "ADC_CAL (r) register accessor: ADC Calibration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`adc_cal::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@adc_cal`] +module"] +#[doc(alias = "ADC_CAL")] +pub type AdcCal = crate::Reg; #[doc = "ADC Calibration Register"] pub mod adc_cal; -#[doc = "BG_CAL register accessor: an alias for `Reg`"] -pub type BG_CAL = crate::Reg; +#[doc = "BG_CAL (r) register accessor: Bandgap Calibration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`bg_cal::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bg_cal`] +module"] +#[doc(alias = "BG_CAL")] +pub type BgCal = crate::Reg; #[doc = "Bandgap Calibration Register"] pub mod bg_cal; -#[doc = "DREG_CAL register accessor: an alias for `Reg`"] -pub type DREG_CAL = crate::Reg; +#[doc = "DREG_CAL (r) register accessor: Digital LDO Regulator Calibration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dreg_cal::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dreg_cal`] +module"] +#[doc(alias = "DREG_CAL")] +pub type DregCal = crate::Reg; #[doc = "Digital LDO Regulator Calibration Register"] pub mod dreg_cal; -#[doc = "AREG_CAL register accessor: an alias for `Reg`"] -pub type AREG_CAL = crate::Reg; +#[doc = "AREG_CAL (r) register accessor: Analog LDO Regulator Calibration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`areg_cal::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@areg_cal`] +module"] +#[doc(alias = "AREG_CAL")] +pub type AregCal = crate::Reg; #[doc = "Analog LDO Regulator Calibration Register"] pub mod areg_cal; -#[doc = "HBO_CAL register accessor: an alias for `Reg`"] -pub type HBO_CAL = crate::Reg; +#[doc = "HBO_CAL (r) register accessor: Heart Beat OSC Calibration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hbo_cal::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hbo_cal`] +module"] +#[doc(alias = "HBO_CAL")] +pub type HboCal = crate::Reg; #[doc = "Heart Beat OSC Calibration Register"] pub mod hbo_cal; -#[doc = "EF_CONFIG register accessor: an alias for `Reg`"] -pub type EF_CONFIG = crate::Reg; +#[doc = "EF_CONFIG (r) register accessor: EFuse Config Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ef_config::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ef_config`] +module"] +#[doc(alias = "EF_CONFIG")] +pub type EfConfig = crate::Reg; #[doc = "EFuse Config Register"] pub mod ef_config; -#[doc = "EF_ID0 register accessor: an alias for `Reg`"] -pub type EF_ID0 = crate::Reg; +#[doc = "EF_ID0 (r) register accessor: EFuse ID0 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ef_id0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ef_id0`] +module"] +#[doc(alias = "EF_ID0")] +pub type EfId0 = crate::Reg; #[doc = "EFuse ID0 Register"] pub mod ef_id0; -#[doc = "EF_ID1 register accessor: an alias for `Reg`"] -pub type EF_ID1 = crate::Reg; +#[doc = "EF_ID1 (r) register accessor: EFuse ID1 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ef_id1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ef_id1`] +module"] +#[doc(alias = "EF_ID1")] +pub type EfId1 = crate::Reg; #[doc = "EFuse ID1 Register"] pub mod ef_id1; -#[doc = "PROCID register accessor: an alias for `Reg`"] -pub type PROCID = crate::Reg; +#[doc = "PROCID (r) register accessor: Processor ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`procid::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@procid`] +module"] +#[doc(alias = "PROCID")] +pub type Procid = crate::Reg; #[doc = "Processor ID Register"] pub mod procid; -#[doc = "PERID register accessor: an alias for `Reg`"] -pub type PERID = crate::Reg; +#[doc = "PERID (r) register accessor: Peripheral ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`perid::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@perid`] +module"] +#[doc(alias = "PERID")] +pub type Perid = crate::Reg; #[doc = "Peripheral ID Register"] pub mod perid; diff --git a/va416xx/src/sysconfig/adc_cal.rs b/va416xx/src/sysconfig/adc_cal.rs index 4ba12f1..c06c3e1 100644 --- a/va416xx/src/sysconfig/adc_cal.rs +++ b/va416xx/src/sysconfig/adc_cal.rs @@ -1,53 +1,22 @@ #[doc = "Register `ADC_CAL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `ADC_CAL` reader - ADC Calibration bits"] -pub struct ADC_CAL_R(crate::FieldReader); -impl ADC_CAL_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - ADC_CAL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ADC_CAL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type AdcCalR = crate::FieldReader; impl R { #[doc = "Bits 0:4 - ADC Calibration bits"] #[inline(always)] - pub fn adc_cal(&self) -> ADC_CAL_R { - ADC_CAL_R::new((self.bits & 0x1f) as u8) + pub fn adc_cal(&self) -> AdcCalR { + AdcCalR::new((self.bits & 0x1f) as u8) } } -#[doc = "ADC Calibration Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [adc_cal](index.html) module"] -pub struct ADC_CAL_SPEC; -impl crate::RegisterSpec for ADC_CAL_SPEC { +#[doc = "ADC Calibration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`adc_cal::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct AdcCalSpec; +impl crate::RegisterSpec for AdcCalSpec { type Ux = u32; } -#[doc = "`read()` method returns [adc_cal::R](R) reader structure"] -impl crate::Readable for ADC_CAL_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`adc_cal::R`](R) reader structure"] +impl crate::Readable for AdcCalSpec {} #[doc = "`reset()` method sets ADC_CAL to value 0"] -impl crate::Resettable for ADC_CAL_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for AdcCalSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/sysconfig/analog_cntl.rs b/va416xx/src/sysconfig/analog_cntl.rs index 08ff33e..6001d88 100644 --- a/va416xx/src/sysconfig/analog_cntl.rs +++ b/va416xx/src/sysconfig/analog_cntl.rs @@ -1,704 +1,235 @@ #[doc = "Register `ANALOG_CNTL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ANALOG_CNTL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TMOSC` reader - Test Mode"] -pub struct TMOSC_R(crate::FieldReader); -impl TMOSC_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TMOSC_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TMOSC_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type TmoscR = crate::BitReader; #[doc = "Field `TMOSC` writer - Test Mode"] -pub struct TMOSC_W<'a> { - w: &'a mut W, -} -impl<'a> TMOSC_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} +pub type TmoscW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TMPOKDIS` reader - Test Mode"] -pub struct TMPOKDIS_R(crate::FieldReader); -impl TMPOKDIS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TMPOKDIS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TMPOKDIS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type TmpokdisR = crate::BitReader; #[doc = "Field `TMPOKDIS` writer - Test Mode"] -pub struct TMPOKDIS_W<'a> { - w: &'a mut W, -} -impl<'a> TMPOKDIS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); - self.w - } -} +pub type TmpokdisW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TM_ADCMUX_N` reader - Test Mode"] -pub struct TM_ADCMUX_N_R(crate::FieldReader); -impl TM_ADCMUX_N_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TM_ADCMUX_N_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TM_ADCMUX_N_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type TmAdcmuxNR = crate::BitReader; #[doc = "Field `TM_ADCMUX_N` writer - Test Mode"] -pub struct TM_ADCMUX_N_W<'a> { - w: &'a mut W, -} -impl<'a> TM_ADCMUX_N_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); - self.w - } -} +pub type TmAdcmuxNW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TM_ADCMUX_P` reader - Test Mode"] -pub struct TM_ADCMUX_P_R(crate::FieldReader); -impl TM_ADCMUX_P_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TM_ADCMUX_P_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TM_ADCMUX_P_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type TmAdcmuxPR = crate::BitReader; #[doc = "Field `TM_ADCMUX_P` writer - Test Mode"] -pub struct TM_ADCMUX_P_W<'a> { - w: &'a mut W, -} -impl<'a> TM_ADCMUX_P_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); - self.w - } -} +pub type TmAdcmuxPW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TMRATIO` reader - Test Mode"] -pub struct TMRATIO_R(crate::FieldReader); -impl TMRATIO_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TMRATIO_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TMRATIO_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type TmratioR = crate::BitReader; #[doc = "Field `TMRATIO` writer - Test Mode"] -pub struct TMRATIO_W<'a> { - w: &'a mut W, -} -impl<'a> TMRATIO_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); - self.w - } -} +pub type TmratioW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TMATOMUX` reader - Test Mode"] -pub struct TMATOMUX_R(crate::FieldReader); -impl TMATOMUX_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - TMATOMUX_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TMATOMUX_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type TmatomuxR = crate::FieldReader; #[doc = "Field `TMATOMUX` writer - Test Mode"] -pub struct TMATOMUX_W<'a> { - w: &'a mut W, -} -impl<'a> TMATOMUX_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x03 << 5)) | ((value as u32 & 0x03) << 5); - self.w - } -} +pub type TmatomuxW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `ADC_STEST` reader - Number of clocks for sample time"] -pub struct ADC_STEST_R(crate::FieldReader); -impl ADC_STEST_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - ADC_STEST_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ADC_STEST_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type AdcStestR = crate::FieldReader; #[doc = "Field `ADC_STEST` writer - Number of clocks for sample time"] -pub struct ADC_STEST_W<'a> { - w: &'a mut W, -} -impl<'a> ADC_STEST_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x0f << 9)) | ((value as u32 & 0x0f) << 9); - self.w - } -} +pub type AdcStestW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `RCLK_POS_EN` reader - Enable normal test clock"] -pub struct RCLK_POS_EN_R(crate::FieldReader); -impl RCLK_POS_EN_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RCLK_POS_EN_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RCLK_POS_EN_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type RclkPosEnR = crate::BitReader; #[doc = "Field `RCLK_POS_EN` writer - Enable normal test clock"] -pub struct RCLK_POS_EN_W<'a> { - w: &'a mut W, -} -impl<'a> RCLK_POS_EN_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); - self.w - } -} +pub type RclkPosEnW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RCLK_NEG_EN` reader - Enable inverted test clock"] -pub struct RCLK_NEG_EN_R(crate::FieldReader); -impl RCLK_NEG_EN_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RCLK_NEG_EN_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RCLK_NEG_EN_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type RclkNegEnR = crate::BitReader; #[doc = "Field `RCLK_NEG_EN` writer - Enable inverted test clock"] -pub struct RCLK_NEG_EN_W<'a> { - w: &'a mut W, -} -impl<'a> RCLK_NEG_EN_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); - self.w - } -} +pub type RclkNegEnW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `APB2CLK_POS_EN` reader - Enable normal APB2CLK for test output"] -pub struct APB2CLK_POS_EN_R(crate::FieldReader); -impl APB2CLK_POS_EN_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - APB2CLK_POS_EN_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for APB2CLK_POS_EN_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Apb2clkPosEnR = crate::BitReader; #[doc = "Field `APB2CLK_POS_EN` writer - Enable normal APB2CLK for test output"] -pub struct APB2CLK_POS_EN_W<'a> { - w: &'a mut W, -} -impl<'a> APB2CLK_POS_EN_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16); - self.w - } -} +pub type Apb2clkPosEnW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `APB2CLK_NEG_EN` reader - Enable inverted APB2CLK for test output"] -pub struct APB2CLK_NEG_EN_R(crate::FieldReader); -impl APB2CLK_NEG_EN_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - APB2CLK_NEG_EN_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for APB2CLK_NEG_EN_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Apb2clkNegEnR = crate::BitReader; #[doc = "Field `APB2CLK_NEG_EN` writer - Enable inverted APB2CLK for test output"] -pub struct APB2CLK_NEG_EN_W<'a> { - w: &'a mut W, -} -impl<'a> APB2CLK_NEG_EN_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 17)) | ((value as u32 & 0x01) << 17); - self.w - } -} +pub type Apb2clkNegEnW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TM_ANALOG_PD_EN` reader - Enables pull down on analog pads"] -pub struct TM_ANALOG_PD_EN_R(crate::FieldReader); -impl TM_ANALOG_PD_EN_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TM_ANALOG_PD_EN_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TM_ANALOG_PD_EN_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type TmAnalogPdEnR = crate::BitReader; #[doc = "Field `TM_ANALOG_PD_EN` writer - Enables pull down on analog pads"] -pub struct TM_ANALOG_PD_EN_W<'a> { - w: &'a mut W, -} -impl<'a> TM_ANALOG_PD_EN_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 18)) | ((value as u32 & 0x01) << 18); - self.w - } -} +pub type TmAnalogPdEnW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `JMP2BOOT` reader - Enables a skip of all delay counters and eFuse read"] -pub struct JMP2BOOT_R(crate::FieldReader); -impl JMP2BOOT_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - JMP2BOOT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for JMP2BOOT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Jmp2bootR = crate::BitReader; #[doc = "Field `JMP2BOOT` writer - Enables a skip of all delay counters and eFuse read"] -pub struct JMP2BOOT_W<'a> { - w: &'a mut W, -} -impl<'a> JMP2BOOT_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 19)) | ((value as u32 & 0x01) << 19); - self.w - } -} +pub type Jmp2bootW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SKIPBOOT` reader - Enables a skip of all delay counters, eFuse read, and boot"] -pub struct SKIPBOOT_R(crate::FieldReader); -impl SKIPBOOT_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - SKIPBOOT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for SKIPBOOT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type SkipbootR = crate::BitReader; #[doc = "Field `SKIPBOOT` writer - Enables a skip of all delay counters, eFuse read, and boot"] -pub struct SKIPBOOT_W<'a> { - w: &'a mut W, -} -impl<'a> SKIPBOOT_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 20)) | ((value as u32 & 0x01) << 20); - self.w - } -} +pub type SkipbootW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Test Mode"] #[inline(always)] - pub fn tmosc(&self) -> TMOSC_R { - TMOSC_R::new((self.bits & 0x01) != 0) + pub fn tmosc(&self) -> TmoscR { + TmoscR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Test Mode"] #[inline(always)] - pub fn tmpokdis(&self) -> TMPOKDIS_R { - TMPOKDIS_R::new(((self.bits >> 1) & 0x01) != 0) + pub fn tmpokdis(&self) -> TmpokdisR { + TmpokdisR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Test Mode"] #[inline(always)] - pub fn tm_adcmux_n(&self) -> TM_ADCMUX_N_R { - TM_ADCMUX_N_R::new(((self.bits >> 2) & 0x01) != 0) + pub fn tm_adcmux_n(&self) -> TmAdcmuxNR { + TmAdcmuxNR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Test Mode"] #[inline(always)] - pub fn tm_adcmux_p(&self) -> TM_ADCMUX_P_R { - TM_ADCMUX_P_R::new(((self.bits >> 3) & 0x01) != 0) + pub fn tm_adcmux_p(&self) -> TmAdcmuxPR { + TmAdcmuxPR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Test Mode"] #[inline(always)] - pub fn tmratio(&self) -> TMRATIO_R { - TMRATIO_R::new(((self.bits >> 4) & 0x01) != 0) + pub fn tmratio(&self) -> TmratioR { + TmratioR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bits 5:6 - Test Mode"] #[inline(always)] - pub fn tmatomux(&self) -> TMATOMUX_R { - TMATOMUX_R::new(((self.bits >> 5) & 0x03) as u8) + pub fn tmatomux(&self) -> TmatomuxR { + TmatomuxR::new(((self.bits >> 5) & 3) as u8) } #[doc = "Bits 9:12 - Number of clocks for sample time"] #[inline(always)] - pub fn adc_stest(&self) -> ADC_STEST_R { - ADC_STEST_R::new(((self.bits >> 9) & 0x0f) as u8) + pub fn adc_stest(&self) -> AdcStestR { + AdcStestR::new(((self.bits >> 9) & 0x0f) as u8) } #[doc = "Bit 14 - Enable normal test clock"] #[inline(always)] - pub fn rclk_pos_en(&self) -> RCLK_POS_EN_R { - RCLK_POS_EN_R::new(((self.bits >> 14) & 0x01) != 0) + pub fn rclk_pos_en(&self) -> RclkPosEnR { + RclkPosEnR::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Enable inverted test clock"] #[inline(always)] - pub fn rclk_neg_en(&self) -> RCLK_NEG_EN_R { - RCLK_NEG_EN_R::new(((self.bits >> 15) & 0x01) != 0) + pub fn rclk_neg_en(&self) -> RclkNegEnR { + RclkNegEnR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - Enable normal APB2CLK for test output"] #[inline(always)] - pub fn apb2clk_pos_en(&self) -> APB2CLK_POS_EN_R { - APB2CLK_POS_EN_R::new(((self.bits >> 16) & 0x01) != 0) + pub fn apb2clk_pos_en(&self) -> Apb2clkPosEnR { + Apb2clkPosEnR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Enable inverted APB2CLK for test output"] #[inline(always)] - pub fn apb2clk_neg_en(&self) -> APB2CLK_NEG_EN_R { - APB2CLK_NEG_EN_R::new(((self.bits >> 17) & 0x01) != 0) + pub fn apb2clk_neg_en(&self) -> Apb2clkNegEnR { + Apb2clkNegEnR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Enables pull down on analog pads"] #[inline(always)] - pub fn tm_analog_pd_en(&self) -> TM_ANALOG_PD_EN_R { - TM_ANALOG_PD_EN_R::new(((self.bits >> 18) & 0x01) != 0) + pub fn tm_analog_pd_en(&self) -> TmAnalogPdEnR { + TmAnalogPdEnR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - Enables a skip of all delay counters and eFuse read"] #[inline(always)] - pub fn jmp2boot(&self) -> JMP2BOOT_R { - JMP2BOOT_R::new(((self.bits >> 19) & 0x01) != 0) + pub fn jmp2boot(&self) -> Jmp2bootR { + Jmp2bootR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - Enables a skip of all delay counters, eFuse read, and boot"] #[inline(always)] - pub fn skipboot(&self) -> SKIPBOOT_R { - SKIPBOOT_R::new(((self.bits >> 20) & 0x01) != 0) + pub fn skipboot(&self) -> SkipbootR { + SkipbootR::new(((self.bits >> 20) & 1) != 0) } } impl W { #[doc = "Bit 0 - Test Mode"] #[inline(always)] - pub fn tmosc(&mut self) -> TMOSC_W { - TMOSC_W { w: self } + #[must_use] + pub fn tmosc(&mut self) -> TmoscW { + TmoscW::new(self, 0) } #[doc = "Bit 1 - Test Mode"] #[inline(always)] - pub fn tmpokdis(&mut self) -> TMPOKDIS_W { - TMPOKDIS_W { w: self } + #[must_use] + pub fn tmpokdis(&mut self) -> TmpokdisW { + TmpokdisW::new(self, 1) } #[doc = "Bit 2 - Test Mode"] #[inline(always)] - pub fn tm_adcmux_n(&mut self) -> TM_ADCMUX_N_W { - TM_ADCMUX_N_W { w: self } + #[must_use] + pub fn tm_adcmux_n(&mut self) -> TmAdcmuxNW { + TmAdcmuxNW::new(self, 2) } #[doc = "Bit 3 - Test Mode"] #[inline(always)] - pub fn tm_adcmux_p(&mut self) -> TM_ADCMUX_P_W { - TM_ADCMUX_P_W { w: self } + #[must_use] + pub fn tm_adcmux_p(&mut self) -> TmAdcmuxPW { + TmAdcmuxPW::new(self, 3) } #[doc = "Bit 4 - Test Mode"] #[inline(always)] - pub fn tmratio(&mut self) -> TMRATIO_W { - TMRATIO_W { w: self } + #[must_use] + pub fn tmratio(&mut self) -> TmratioW { + TmratioW::new(self, 4) } #[doc = "Bits 5:6 - Test Mode"] #[inline(always)] - pub fn tmatomux(&mut self) -> TMATOMUX_W { - TMATOMUX_W { w: self } + #[must_use] + pub fn tmatomux(&mut self) -> TmatomuxW { + TmatomuxW::new(self, 5) } #[doc = "Bits 9:12 - Number of clocks for sample time"] #[inline(always)] - pub fn adc_stest(&mut self) -> ADC_STEST_W { - ADC_STEST_W { w: self } + #[must_use] + pub fn adc_stest(&mut self) -> AdcStestW { + AdcStestW::new(self, 9) } #[doc = "Bit 14 - Enable normal test clock"] #[inline(always)] - pub fn rclk_pos_en(&mut self) -> RCLK_POS_EN_W { - RCLK_POS_EN_W { w: self } + #[must_use] + pub fn rclk_pos_en(&mut self) -> RclkPosEnW { + RclkPosEnW::new(self, 14) } #[doc = "Bit 15 - Enable inverted test clock"] #[inline(always)] - pub fn rclk_neg_en(&mut self) -> RCLK_NEG_EN_W { - RCLK_NEG_EN_W { w: self } + #[must_use] + pub fn rclk_neg_en(&mut self) -> RclkNegEnW { + RclkNegEnW::new(self, 15) } #[doc = "Bit 16 - Enable normal APB2CLK for test output"] #[inline(always)] - pub fn apb2clk_pos_en(&mut self) -> APB2CLK_POS_EN_W { - APB2CLK_POS_EN_W { w: self } + #[must_use] + pub fn apb2clk_pos_en(&mut self) -> Apb2clkPosEnW { + Apb2clkPosEnW::new(self, 16) } #[doc = "Bit 17 - Enable inverted APB2CLK for test output"] #[inline(always)] - pub fn apb2clk_neg_en(&mut self) -> APB2CLK_NEG_EN_W { - APB2CLK_NEG_EN_W { w: self } + #[must_use] + pub fn apb2clk_neg_en(&mut self) -> Apb2clkNegEnW { + Apb2clkNegEnW::new(self, 17) } #[doc = "Bit 18 - Enables pull down on analog pads"] #[inline(always)] - pub fn tm_analog_pd_en(&mut self) -> TM_ANALOG_PD_EN_W { - TM_ANALOG_PD_EN_W { w: self } + #[must_use] + pub fn tm_analog_pd_en(&mut self) -> TmAnalogPdEnW { + TmAnalogPdEnW::new(self, 18) } #[doc = "Bit 19 - Enables a skip of all delay counters and eFuse read"] #[inline(always)] - pub fn jmp2boot(&mut self) -> JMP2BOOT_W { - JMP2BOOT_W { w: self } + #[must_use] + pub fn jmp2boot(&mut self) -> Jmp2bootW { + Jmp2bootW::new(self, 19) } #[doc = "Bit 20 - Enables a skip of all delay counters, eFuse read, and boot"] #[inline(always)] - pub fn skipboot(&mut self) -> SKIPBOOT_W { - SKIPBOOT_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn skipboot(&mut self) -> SkipbootW { + SkipbootW::new(self, 20) } } -#[doc = "Analog Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [analog_cntl](index.html) module"] -pub struct ANALOG_CNTL_SPEC; -impl crate::RegisterSpec for ANALOG_CNTL_SPEC { +#[doc = "Analog Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`analog_cntl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`analog_cntl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct AnalogCntlSpec; +impl crate::RegisterSpec for AnalogCntlSpec { type Ux = u32; } -#[doc = "`read()` method returns [analog_cntl::R](R) reader structure"] -impl crate::Readable for ANALOG_CNTL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [analog_cntl::W](W) writer structure"] -impl crate::Writable for ANALOG_CNTL_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`analog_cntl::R`](R) reader structure"] +impl crate::Readable for AnalogCntlSpec {} +#[doc = "`write(|w| ..)` method takes [`analog_cntl::W`](W) writer structure"] +impl crate::Writable for AnalogCntlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ANALOG_CNTL to value 0"] -impl crate::Resettable for ANALOG_CNTL_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for AnalogCntlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/sysconfig/areg_cal.rs b/va416xx/src/sysconfig/areg_cal.rs index 7ebbcb2..afc4b2f 100644 --- a/va416xx/src/sysconfig/areg_cal.rs +++ b/va416xx/src/sysconfig/areg_cal.rs @@ -1,53 +1,22 @@ #[doc = "Register `AREG_CAL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `AREG_CAL` reader - Analog LDO Regulator Calibration bits"] -pub struct AREG_CAL_R(crate::FieldReader); -impl AREG_CAL_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - AREG_CAL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for AREG_CAL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type AregCalR = crate::FieldReader; impl R { #[doc = "Bits 0:8 - Analog LDO Regulator Calibration bits"] #[inline(always)] - pub fn areg_cal(&self) -> AREG_CAL_R { - AREG_CAL_R::new((self.bits & 0x01ff) as u16) + pub fn areg_cal(&self) -> AregCalR { + AregCalR::new((self.bits & 0x01ff) as u16) } } -#[doc = "Analog LDO Regulator Calibration Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [areg_cal](index.html) module"] -pub struct AREG_CAL_SPEC; -impl crate::RegisterSpec for AREG_CAL_SPEC { +#[doc = "Analog LDO Regulator Calibration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`areg_cal::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct AregCalSpec; +impl crate::RegisterSpec for AregCalSpec { type Ux = u32; } -#[doc = "`read()` method returns [areg_cal::R](R) reader structure"] -impl crate::Readable for AREG_CAL_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`areg_cal::R`](R) reader structure"] +impl crate::Readable for AregCalSpec {} #[doc = "`reset()` method sets AREG_CAL to value 0"] -impl crate::Resettable for AREG_CAL_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for AregCalSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/sysconfig/bg_cal.rs b/va416xx/src/sysconfig/bg_cal.rs index a71569b..8e21f23 100644 --- a/va416xx/src/sysconfig/bg_cal.rs +++ b/va416xx/src/sysconfig/bg_cal.rs @@ -1,53 +1,22 @@ #[doc = "Register `BG_CAL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `BG_CAL` reader - Bandgap Calibration bits"] -pub struct BG_CAL_R(crate::FieldReader); -impl BG_CAL_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BG_CAL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BG_CAL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type BgCalR = crate::FieldReader; impl R { #[doc = "Bits 0:2 - Bandgap Calibration bits"] #[inline(always)] - pub fn bg_cal(&self) -> BG_CAL_R { - BG_CAL_R::new((self.bits & 0x07) as u8) + pub fn bg_cal(&self) -> BgCalR { + BgCalR::new((self.bits & 7) as u8) } } -#[doc = "Bandgap Calibration Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [bg_cal](index.html) module"] -pub struct BG_CAL_SPEC; -impl crate::RegisterSpec for BG_CAL_SPEC { +#[doc = "Bandgap Calibration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`bg_cal::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct BgCalSpec; +impl crate::RegisterSpec for BgCalSpec { type Ux = u32; } -#[doc = "`read()` method returns [bg_cal::R](R) reader structure"] -impl crate::Readable for BG_CAL_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`bg_cal::R`](R) reader structure"] +impl crate::Readable for BgCalSpec {} #[doc = "`reset()` method sets BG_CAL to value 0"] -impl crate::Resettable for BG_CAL_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for BgCalSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/sysconfig/dac0_cal.rs b/va416xx/src/sysconfig/dac0_cal.rs index fdb5d14..ba817c9 100644 --- a/va416xx/src/sysconfig/dac0_cal.rs +++ b/va416xx/src/sysconfig/dac0_cal.rs @@ -1,53 +1,22 @@ #[doc = "Register `DAC0_CAL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `DAC0_CAL` reader - DAC0 Calibration bits"] -pub struct DAC0_CAL_R(crate::FieldReader); -impl DAC0_CAL_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - DAC0_CAL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for DAC0_CAL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Dac0CalR = crate::FieldReader; impl R { #[doc = "Bits 0:4 - DAC0 Calibration bits"] #[inline(always)] - pub fn dac0_cal(&self) -> DAC0_CAL_R { - DAC0_CAL_R::new((self.bits & 0x1f) as u8) + pub fn dac0_cal(&self) -> Dac0CalR { + Dac0CalR::new((self.bits & 0x1f) as u8) } } -#[doc = "DAC0 Calibration Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dac0_cal](index.html) module"] -pub struct DAC0_CAL_SPEC; -impl crate::RegisterSpec for DAC0_CAL_SPEC { +#[doc = "DAC0 Calibration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dac0_cal::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Dac0CalSpec; +impl crate::RegisterSpec for Dac0CalSpec { type Ux = u32; } -#[doc = "`read()` method returns [dac0_cal::R](R) reader structure"] -impl crate::Readable for DAC0_CAL_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`dac0_cal::R`](R) reader structure"] +impl crate::Readable for Dac0CalSpec {} #[doc = "`reset()` method sets DAC0_CAL to value 0"] -impl crate::Resettable for DAC0_CAL_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Dac0CalSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/sysconfig/dac1_cal.rs b/va416xx/src/sysconfig/dac1_cal.rs index 90de722..28d6dcc 100644 --- a/va416xx/src/sysconfig/dac1_cal.rs +++ b/va416xx/src/sysconfig/dac1_cal.rs @@ -1,53 +1,22 @@ #[doc = "Register `DAC1_CAL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `DAC1_CAL` reader - DAC1 Calibration bits"] -pub struct DAC1_CAL_R(crate::FieldReader); -impl DAC1_CAL_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - DAC1_CAL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for DAC1_CAL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Dac1CalR = crate::FieldReader; impl R { #[doc = "Bits 0:4 - DAC1 Calibration bits"] #[inline(always)] - pub fn dac1_cal(&self) -> DAC1_CAL_R { - DAC1_CAL_R::new((self.bits & 0x1f) as u8) + pub fn dac1_cal(&self) -> Dac1CalR { + Dac1CalR::new((self.bits & 0x1f) as u8) } } -#[doc = "DAC1 Calibration Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dac1_cal](index.html) module"] -pub struct DAC1_CAL_SPEC; -impl crate::RegisterSpec for DAC1_CAL_SPEC { +#[doc = "DAC1 Calibration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dac1_cal::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Dac1CalSpec; +impl crate::RegisterSpec for Dac1CalSpec { type Ux = u32; } -#[doc = "`read()` method returns [dac1_cal::R](R) reader structure"] -impl crate::Readable for DAC1_CAL_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`dac1_cal::R`](R) reader structure"] +impl crate::Readable for Dac1CalSpec {} #[doc = "`reset()` method sets DAC1_CAL to value 0"] -impl crate::Resettable for DAC1_CAL_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Dac1CalSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/sysconfig/dreg_cal.rs b/va416xx/src/sysconfig/dreg_cal.rs index 538152c..c6778db 100644 --- a/va416xx/src/sysconfig/dreg_cal.rs +++ b/va416xx/src/sysconfig/dreg_cal.rs @@ -1,53 +1,22 @@ #[doc = "Register `DREG_CAL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `DREG_CAL` reader - Digital LDO Regulator Calibration bits"] -pub struct DREG_CAL_R(crate::FieldReader); -impl DREG_CAL_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - DREG_CAL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for DREG_CAL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type DregCalR = crate::FieldReader; impl R { #[doc = "Bits 0:8 - Digital LDO Regulator Calibration bits"] #[inline(always)] - pub fn dreg_cal(&self) -> DREG_CAL_R { - DREG_CAL_R::new((self.bits & 0x01ff) as u16) + pub fn dreg_cal(&self) -> DregCalR { + DregCalR::new((self.bits & 0x01ff) as u16) } } -#[doc = "Digital LDO Regulator Calibration Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dreg_cal](index.html) module"] -pub struct DREG_CAL_SPEC; -impl crate::RegisterSpec for DREG_CAL_SPEC { +#[doc = "Digital LDO Regulator Calibration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dreg_cal::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DregCalSpec; +impl crate::RegisterSpec for DregCalSpec { type Ux = u32; } -#[doc = "`read()` method returns [dreg_cal::R](R) reader structure"] -impl crate::Readable for DREG_CAL_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`dreg_cal::R`](R) reader structure"] +impl crate::Readable for DregCalSpec {} #[doc = "`reset()` method sets DREG_CAL to value 0"] -impl crate::Resettable for DREG_CAL_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for DregCalSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/sysconfig/ebi_cfg0.rs b/va416xx/src/sysconfig/ebi_cfg0.rs index 688a1d3..08bb521 100644 --- a/va416xx/src/sysconfig/ebi_cfg0.rs +++ b/va416xx/src/sysconfig/ebi_cfg0.rs @@ -1,298 +1,115 @@ #[doc = "Register `EBI_CFG0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EBI_CFG0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `ADDRLOW0` reader - Lower bound address for CEN0"] -pub struct ADDRLOW0_R(crate::FieldReader); -impl ADDRLOW0_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - ADDRLOW0_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ADDRLOW0_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Addrlow0R = crate::FieldReader; #[doc = "Field `ADDRLOW0` writer - Lower bound address for CEN0"] -pub struct ADDRLOW0_W<'a> { - w: &'a mut W, -} -impl<'a> ADDRLOW0_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type Addrlow0W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `ADDRHIGH0` reader - Upper bound address for CEN0"] -pub struct ADDRHIGH0_R(crate::FieldReader); -impl ADDRHIGH0_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - ADDRHIGH0_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ADDRHIGH0_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Addrhigh0R = crate::FieldReader; #[doc = "Field `ADDRHIGH0` writer - Upper bound address for CEN0"] -pub struct ADDRHIGH0_W<'a> { - w: &'a mut W, -} -impl<'a> ADDRHIGH0_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0xff << 8)) | ((value as u32 & 0xff) << 8); - self.w - } -} +pub type Addrhigh0W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `CFGREADCYCLE` reader - Number of cycles for a read - N plus 1"] -pub struct CFGREADCYCLE_R(crate::FieldReader); -impl CFGREADCYCLE_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - CFGREADCYCLE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CFGREADCYCLE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type CfgreadcycleR = crate::FieldReader; #[doc = "Field `CFGREADCYCLE` writer - Number of cycles for a read - N plus 1"] -pub struct CFGREADCYCLE_W<'a> { - w: &'a mut W, -} -impl<'a> CFGREADCYCLE_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x07 << 16)) | ((value as u32 & 0x07) << 16); - self.w - } -} +pub type CfgreadcycleW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `CFGWRITECYCLE` reader - Number of cycles for a write - N plus 1"] -pub struct CFGWRITECYCLE_R(crate::FieldReader); -impl CFGWRITECYCLE_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - CFGWRITECYCLE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CFGWRITECYCLE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type CfgwritecycleR = crate::FieldReader; #[doc = "Field `CFGWRITECYCLE` writer - Number of cycles for a write - N plus 1"] -pub struct CFGWRITECYCLE_W<'a> { - w: &'a mut W, -} -impl<'a> CFGWRITECYCLE_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x07 << 19)) | ((value as u32 & 0x07) << 19); - self.w - } -} +pub type CfgwritecycleW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `CFGTURNAROUNDCYCLE` reader - Number of cycles for turnaround - N plus 1"] -pub struct CFGTURNAROUNDCYCLE_R(crate::FieldReader); -impl CFGTURNAROUNDCYCLE_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - CFGTURNAROUNDCYCLE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CFGTURNAROUNDCYCLE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type CfgturnaroundcycleR = crate::FieldReader; #[doc = "Field `CFGTURNAROUNDCYCLE` writer - Number of cycles for turnaround - N plus 1"] -pub struct CFGTURNAROUNDCYCLE_W<'a> { - w: &'a mut W, -} -impl<'a> CFGTURNAROUNDCYCLE_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x07 << 22)) | ((value as u32 & 0x07) << 22); - self.w - } -} +pub type CfgturnaroundcycleW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `CFGSIZE` reader - 8 bit (0) or 16 bit (1) port size"] -pub struct CFGSIZE_R(crate::FieldReader); -impl CFGSIZE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CFGSIZE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CFGSIZE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type CfgsizeR = crate::BitReader; #[doc = "Field `CFGSIZE` writer - 8 bit (0) or 16 bit (1) port size"] -pub struct CFGSIZE_W<'a> { - w: &'a mut W, -} -impl<'a> CFGSIZE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 25)) | ((value as u32 & 0x01) << 25); - self.w - } -} +pub type CfgsizeW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:7 - Lower bound address for CEN0"] #[inline(always)] - pub fn addrlow0(&self) -> ADDRLOW0_R { - ADDRLOW0_R::new((self.bits & 0xff) as u8) + pub fn addrlow0(&self) -> Addrlow0R { + Addrlow0R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Upper bound address for CEN0"] #[inline(always)] - pub fn addrhigh0(&self) -> ADDRHIGH0_R { - ADDRHIGH0_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn addrhigh0(&self) -> Addrhigh0R { + Addrhigh0R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:18 - Number of cycles for a read - N plus 1"] #[inline(always)] - pub fn cfgreadcycle(&self) -> CFGREADCYCLE_R { - CFGREADCYCLE_R::new(((self.bits >> 16) & 0x07) as u8) + pub fn cfgreadcycle(&self) -> CfgreadcycleR { + CfgreadcycleR::new(((self.bits >> 16) & 7) as u8) } #[doc = "Bits 19:21 - Number of cycles for a write - N plus 1"] #[inline(always)] - pub fn cfgwritecycle(&self) -> CFGWRITECYCLE_R { - CFGWRITECYCLE_R::new(((self.bits >> 19) & 0x07) as u8) + pub fn cfgwritecycle(&self) -> CfgwritecycleR { + CfgwritecycleR::new(((self.bits >> 19) & 7) as u8) } #[doc = "Bits 22:24 - Number of cycles for turnaround - N plus 1"] #[inline(always)] - pub fn cfgturnaroundcycle(&self) -> CFGTURNAROUNDCYCLE_R { - CFGTURNAROUNDCYCLE_R::new(((self.bits >> 22) & 0x07) as u8) + pub fn cfgturnaroundcycle(&self) -> CfgturnaroundcycleR { + CfgturnaroundcycleR::new(((self.bits >> 22) & 7) as u8) } #[doc = "Bit 25 - 8 bit (0) or 16 bit (1) port size"] #[inline(always)] - pub fn cfgsize(&self) -> CFGSIZE_R { - CFGSIZE_R::new(((self.bits >> 25) & 0x01) != 0) + pub fn cfgsize(&self) -> CfgsizeR { + CfgsizeR::new(((self.bits >> 25) & 1) != 0) } } impl W { #[doc = "Bits 0:7 - Lower bound address for CEN0"] #[inline(always)] - pub fn addrlow0(&mut self) -> ADDRLOW0_W { - ADDRLOW0_W { w: self } + #[must_use] + pub fn addrlow0(&mut self) -> Addrlow0W { + Addrlow0W::new(self, 0) } #[doc = "Bits 8:15 - Upper bound address for CEN0"] #[inline(always)] - pub fn addrhigh0(&mut self) -> ADDRHIGH0_W { - ADDRHIGH0_W { w: self } + #[must_use] + pub fn addrhigh0(&mut self) -> Addrhigh0W { + Addrhigh0W::new(self, 8) } #[doc = "Bits 16:18 - Number of cycles for a read - N plus 1"] #[inline(always)] - pub fn cfgreadcycle(&mut self) -> CFGREADCYCLE_W { - CFGREADCYCLE_W { w: self } + #[must_use] + pub fn cfgreadcycle(&mut self) -> CfgreadcycleW { + CfgreadcycleW::new(self, 16) } #[doc = "Bits 19:21 - Number of cycles for a write - N plus 1"] #[inline(always)] - pub fn cfgwritecycle(&mut self) -> CFGWRITECYCLE_W { - CFGWRITECYCLE_W { w: self } + #[must_use] + pub fn cfgwritecycle(&mut self) -> CfgwritecycleW { + CfgwritecycleW::new(self, 19) } #[doc = "Bits 22:24 - Number of cycles for turnaround - N plus 1"] #[inline(always)] - pub fn cfgturnaroundcycle(&mut self) -> CFGTURNAROUNDCYCLE_W { - CFGTURNAROUNDCYCLE_W { w: self } + #[must_use] + pub fn cfgturnaroundcycle(&mut self) -> CfgturnaroundcycleW { + CfgturnaroundcycleW::new(self, 22) } #[doc = "Bit 25 - 8 bit (0) or 16 bit (1) port size"] #[inline(always)] - pub fn cfgsize(&mut self) -> CFGSIZE_W { - CFGSIZE_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn cfgsize(&mut self) -> CfgsizeW { + CfgsizeW::new(self, 25) } } -#[doc = "EBI Config Register 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ebi_cfg0](index.html) module"] -pub struct EBI_CFG0_SPEC; -impl crate::RegisterSpec for EBI_CFG0_SPEC { +#[doc = "EBI Config Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ebi_cfg0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ebi_cfg0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct EbiCfg0Spec; +impl crate::RegisterSpec for EbiCfg0Spec { type Ux = u32; } -#[doc = "`read()` method returns [ebi_cfg0::R](R) reader structure"] -impl crate::Readable for EBI_CFG0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ebi_cfg0::W](W) writer structure"] -impl crate::Writable for EBI_CFG0_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`ebi_cfg0::R`](R) reader structure"] +impl crate::Readable for EbiCfg0Spec {} +#[doc = "`write(|w| ..)` method takes [`ebi_cfg0::W`](W) writer structure"] +impl crate::Writable for EbiCfg0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EBI_CFG0 to value 0"] -impl crate::Resettable for EBI_CFG0_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for EbiCfg0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/sysconfig/ebi_cfg1.rs b/va416xx/src/sysconfig/ebi_cfg1.rs deleted file mode 100644 index a6f8595..0000000 --- a/va416xx/src/sysconfig/ebi_cfg1.rs +++ /dev/null @@ -1,298 +0,0 @@ -#[doc = "Register `EBI_CFG1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Register `EBI_CFG1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `ADDRLOW0` reader - Lower bound address for CEN0"] -pub struct ADDRLOW0_R(crate::FieldReader); -impl ADDRLOW0_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - ADDRLOW0_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ADDRLOW0_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `ADDRLOW0` writer - Lower bound address for CEN0"] -pub struct ADDRLOW0_W<'a> { - w: &'a mut W, -} -impl<'a> ADDRLOW0_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} -#[doc = "Field `ADDRHIGH0` reader - Upper bound address for CEN0"] -pub struct ADDRHIGH0_R(crate::FieldReader); -impl ADDRHIGH0_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - ADDRHIGH0_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ADDRHIGH0_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `ADDRHIGH0` writer - Upper bound address for CEN0"] -pub struct ADDRHIGH0_W<'a> { - w: &'a mut W, -} -impl<'a> ADDRHIGH0_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0xff << 8)) | ((value as u32 & 0xff) << 8); - self.w - } -} -#[doc = "Field `CFGREADCYCLE` reader - Number of cycles for a read - N plus 1"] -pub struct CFGREADCYCLE_R(crate::FieldReader); -impl CFGREADCYCLE_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - CFGREADCYCLE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CFGREADCYCLE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CFGREADCYCLE` writer - Number of cycles for a read - N plus 1"] -pub struct CFGREADCYCLE_W<'a> { - w: &'a mut W, -} -impl<'a> CFGREADCYCLE_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x07 << 16)) | ((value as u32 & 0x07) << 16); - self.w - } -} -#[doc = "Field `CFGWRITECYCLE` reader - Number of cycles for a write - N plus 1"] -pub struct CFGWRITECYCLE_R(crate::FieldReader); -impl CFGWRITECYCLE_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - CFGWRITECYCLE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CFGWRITECYCLE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CFGWRITECYCLE` writer - Number of cycles for a write - N plus 1"] -pub struct CFGWRITECYCLE_W<'a> { - w: &'a mut W, -} -impl<'a> CFGWRITECYCLE_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x07 << 19)) | ((value as u32 & 0x07) << 19); - self.w - } -} -#[doc = "Field `CFGTURNAROUNDCYCLE` reader - Number of cycles for turnaround - N plus 1"] -pub struct CFGTURNAROUNDCYCLE_R(crate::FieldReader); -impl CFGTURNAROUNDCYCLE_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - CFGTURNAROUNDCYCLE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CFGTURNAROUNDCYCLE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CFGTURNAROUNDCYCLE` writer - Number of cycles for turnaround - N plus 1"] -pub struct CFGTURNAROUNDCYCLE_W<'a> { - w: &'a mut W, -} -impl<'a> CFGTURNAROUNDCYCLE_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x07 << 22)) | ((value as u32 & 0x07) << 22); - self.w - } -} -#[doc = "Field `CFGSIZE` reader - 8 bit (0) or 16 bit (1) port size"] -pub struct CFGSIZE_R(crate::FieldReader); -impl CFGSIZE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CFGSIZE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CFGSIZE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CFGSIZE` writer - 8 bit (0) or 16 bit (1) port size"] -pub struct CFGSIZE_W<'a> { - w: &'a mut W, -} -impl<'a> CFGSIZE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 25)) | ((value as u32 & 0x01) << 25); - self.w - } -} -impl R { - #[doc = "Bits 0:7 - Lower bound address for CEN0"] - #[inline(always)] - pub fn addrlow0(&self) -> ADDRLOW0_R { - ADDRLOW0_R::new((self.bits & 0xff) as u8) - } - #[doc = "Bits 8:15 - Upper bound address for CEN0"] - #[inline(always)] - pub fn addrhigh0(&self) -> ADDRHIGH0_R { - ADDRHIGH0_R::new(((self.bits >> 8) & 0xff) as u8) - } - #[doc = "Bits 16:18 - Number of cycles for a read - N plus 1"] - #[inline(always)] - pub fn cfgreadcycle(&self) -> CFGREADCYCLE_R { - CFGREADCYCLE_R::new(((self.bits >> 16) & 0x07) as u8) - } - #[doc = "Bits 19:21 - Number of cycles for a write - N plus 1"] - #[inline(always)] - pub fn cfgwritecycle(&self) -> CFGWRITECYCLE_R { - CFGWRITECYCLE_R::new(((self.bits >> 19) & 0x07) as u8) - } - #[doc = "Bits 22:24 - Number of cycles for turnaround - N plus 1"] - #[inline(always)] - pub fn cfgturnaroundcycle(&self) -> CFGTURNAROUNDCYCLE_R { - CFGTURNAROUNDCYCLE_R::new(((self.bits >> 22) & 0x07) as u8) - } - #[doc = "Bit 25 - 8 bit (0) or 16 bit (1) port size"] - #[inline(always)] - pub fn cfgsize(&self) -> CFGSIZE_R { - CFGSIZE_R::new(((self.bits >> 25) & 0x01) != 0) - } -} -impl W { - #[doc = "Bits 0:7 - Lower bound address for CEN0"] - #[inline(always)] - pub fn addrlow0(&mut self) -> ADDRLOW0_W { - ADDRLOW0_W { w: self } - } - #[doc = "Bits 8:15 - Upper bound address for CEN0"] - #[inline(always)] - pub fn addrhigh0(&mut self) -> ADDRHIGH0_W { - ADDRHIGH0_W { w: self } - } - #[doc = "Bits 16:18 - Number of cycles for a read - N plus 1"] - #[inline(always)] - pub fn cfgreadcycle(&mut self) -> CFGREADCYCLE_W { - CFGREADCYCLE_W { w: self } - } - #[doc = "Bits 19:21 - Number of cycles for a write - N plus 1"] - #[inline(always)] - pub fn cfgwritecycle(&mut self) -> CFGWRITECYCLE_W { - CFGWRITECYCLE_W { w: self } - } - #[doc = "Bits 22:24 - Number of cycles for turnaround - N plus 1"] - #[inline(always)] - pub fn cfgturnaroundcycle(&mut self) -> CFGTURNAROUNDCYCLE_W { - CFGTURNAROUNDCYCLE_W { w: self } - } - #[doc = "Bit 25 - 8 bit (0) or 16 bit (1) port size"] - #[inline(always)] - pub fn cfgsize(&mut self) -> CFGSIZE_W { - CFGSIZE_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "EBI Config Register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ebi_cfg1](index.html) module"] -pub struct EBI_CFG1_SPEC; -impl crate::RegisterSpec for EBI_CFG1_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [ebi_cfg1::R](R) reader structure"] -impl crate::Readable for EBI_CFG1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ebi_cfg1::W](W) writer structure"] -impl crate::Writable for EBI_CFG1_SPEC { - type Writer = W; -} -#[doc = "`reset()` method sets EBI_CFG1 to value 0"] -impl crate::Resettable for EBI_CFG1_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } -} diff --git a/va416xx/src/sysconfig/ebi_cfg2.rs b/va416xx/src/sysconfig/ebi_cfg2.rs deleted file mode 100644 index 165bdff..0000000 --- a/va416xx/src/sysconfig/ebi_cfg2.rs +++ /dev/null @@ -1,298 +0,0 @@ -#[doc = "Register `EBI_CFG2` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Register `EBI_CFG2` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `ADDRLOW0` reader - Lower bound address for CEN0"] -pub struct ADDRLOW0_R(crate::FieldReader); -impl ADDRLOW0_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - ADDRLOW0_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ADDRLOW0_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `ADDRLOW0` writer - Lower bound address for CEN0"] -pub struct ADDRLOW0_W<'a> { - w: &'a mut W, -} -impl<'a> ADDRLOW0_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} -#[doc = "Field `ADDRHIGH0` reader - Upper bound address for CEN0"] -pub struct ADDRHIGH0_R(crate::FieldReader); -impl ADDRHIGH0_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - ADDRHIGH0_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ADDRHIGH0_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `ADDRHIGH0` writer - Upper bound address for CEN0"] -pub struct ADDRHIGH0_W<'a> { - w: &'a mut W, -} -impl<'a> ADDRHIGH0_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0xff << 8)) | ((value as u32 & 0xff) << 8); - self.w - } -} -#[doc = "Field `CFGREADCYCLE` reader - Number of cycles for a read - N plus 1"] -pub struct CFGREADCYCLE_R(crate::FieldReader); -impl CFGREADCYCLE_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - CFGREADCYCLE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CFGREADCYCLE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CFGREADCYCLE` writer - Number of cycles for a read - N plus 1"] -pub struct CFGREADCYCLE_W<'a> { - w: &'a mut W, -} -impl<'a> CFGREADCYCLE_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x07 << 16)) | ((value as u32 & 0x07) << 16); - self.w - } -} -#[doc = "Field `CFGWRITECYCLE` reader - Number of cycles for a write - N plus 1"] -pub struct CFGWRITECYCLE_R(crate::FieldReader); -impl CFGWRITECYCLE_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - CFGWRITECYCLE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CFGWRITECYCLE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CFGWRITECYCLE` writer - Number of cycles for a write - N plus 1"] -pub struct CFGWRITECYCLE_W<'a> { - w: &'a mut W, -} -impl<'a> CFGWRITECYCLE_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x07 << 19)) | ((value as u32 & 0x07) << 19); - self.w - } -} -#[doc = "Field `CFGTURNAROUNDCYCLE` reader - Number of cycles for turnaround - N plus 1"] -pub struct CFGTURNAROUNDCYCLE_R(crate::FieldReader); -impl CFGTURNAROUNDCYCLE_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - CFGTURNAROUNDCYCLE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CFGTURNAROUNDCYCLE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CFGTURNAROUNDCYCLE` writer - Number of cycles for turnaround - N plus 1"] -pub struct CFGTURNAROUNDCYCLE_W<'a> { - w: &'a mut W, -} -impl<'a> CFGTURNAROUNDCYCLE_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x07 << 22)) | ((value as u32 & 0x07) << 22); - self.w - } -} -#[doc = "Field `CFGSIZE` reader - 8 bit (0) or 16 bit (1) port size"] -pub struct CFGSIZE_R(crate::FieldReader); -impl CFGSIZE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CFGSIZE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CFGSIZE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CFGSIZE` writer - 8 bit (0) or 16 bit (1) port size"] -pub struct CFGSIZE_W<'a> { - w: &'a mut W, -} -impl<'a> CFGSIZE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 25)) | ((value as u32 & 0x01) << 25); - self.w - } -} -impl R { - #[doc = "Bits 0:7 - Lower bound address for CEN0"] - #[inline(always)] - pub fn addrlow0(&self) -> ADDRLOW0_R { - ADDRLOW0_R::new((self.bits & 0xff) as u8) - } - #[doc = "Bits 8:15 - Upper bound address for CEN0"] - #[inline(always)] - pub fn addrhigh0(&self) -> ADDRHIGH0_R { - ADDRHIGH0_R::new(((self.bits >> 8) & 0xff) as u8) - } - #[doc = "Bits 16:18 - Number of cycles for a read - N plus 1"] - #[inline(always)] - pub fn cfgreadcycle(&self) -> CFGREADCYCLE_R { - CFGREADCYCLE_R::new(((self.bits >> 16) & 0x07) as u8) - } - #[doc = "Bits 19:21 - Number of cycles for a write - N plus 1"] - #[inline(always)] - pub fn cfgwritecycle(&self) -> CFGWRITECYCLE_R { - CFGWRITECYCLE_R::new(((self.bits >> 19) & 0x07) as u8) - } - #[doc = "Bits 22:24 - Number of cycles for turnaround - N plus 1"] - #[inline(always)] - pub fn cfgturnaroundcycle(&self) -> CFGTURNAROUNDCYCLE_R { - CFGTURNAROUNDCYCLE_R::new(((self.bits >> 22) & 0x07) as u8) - } - #[doc = "Bit 25 - 8 bit (0) or 16 bit (1) port size"] - #[inline(always)] - pub fn cfgsize(&self) -> CFGSIZE_R { - CFGSIZE_R::new(((self.bits >> 25) & 0x01) != 0) - } -} -impl W { - #[doc = "Bits 0:7 - Lower bound address for CEN0"] - #[inline(always)] - pub fn addrlow0(&mut self) -> ADDRLOW0_W { - ADDRLOW0_W { w: self } - } - #[doc = "Bits 8:15 - Upper bound address for CEN0"] - #[inline(always)] - pub fn addrhigh0(&mut self) -> ADDRHIGH0_W { - ADDRHIGH0_W { w: self } - } - #[doc = "Bits 16:18 - Number of cycles for a read - N plus 1"] - #[inline(always)] - pub fn cfgreadcycle(&mut self) -> CFGREADCYCLE_W { - CFGREADCYCLE_W { w: self } - } - #[doc = "Bits 19:21 - Number of cycles for a write - N plus 1"] - #[inline(always)] - pub fn cfgwritecycle(&mut self) -> CFGWRITECYCLE_W { - CFGWRITECYCLE_W { w: self } - } - #[doc = "Bits 22:24 - Number of cycles for turnaround - N plus 1"] - #[inline(always)] - pub fn cfgturnaroundcycle(&mut self) -> CFGTURNAROUNDCYCLE_W { - CFGTURNAROUNDCYCLE_W { w: self } - } - #[doc = "Bit 25 - 8 bit (0) or 16 bit (1) port size"] - #[inline(always)] - pub fn cfgsize(&mut self) -> CFGSIZE_W { - CFGSIZE_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "EBI Config Register 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ebi_cfg2](index.html) module"] -pub struct EBI_CFG2_SPEC; -impl crate::RegisterSpec for EBI_CFG2_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [ebi_cfg2::R](R) reader structure"] -impl crate::Readable for EBI_CFG2_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ebi_cfg2::W](W) writer structure"] -impl crate::Writable for EBI_CFG2_SPEC { - type Writer = W; -} -#[doc = "`reset()` method sets EBI_CFG2 to value 0"] -impl crate::Resettable for EBI_CFG2_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } -} diff --git a/va416xx/src/sysconfig/ebi_cfg3.rs b/va416xx/src/sysconfig/ebi_cfg3.rs deleted file mode 100644 index 9b8a2c1..0000000 --- a/va416xx/src/sysconfig/ebi_cfg3.rs +++ /dev/null @@ -1,298 +0,0 @@ -#[doc = "Register `EBI_CFG3` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Register `EBI_CFG3` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `ADDRLOW0` reader - Lower bound address for CEN0"] -pub struct ADDRLOW0_R(crate::FieldReader); -impl ADDRLOW0_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - ADDRLOW0_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ADDRLOW0_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `ADDRLOW0` writer - Lower bound address for CEN0"] -pub struct ADDRLOW0_W<'a> { - w: &'a mut W, -} -impl<'a> ADDRLOW0_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} -#[doc = "Field `ADDRHIGH0` reader - Upper bound address for CEN0"] -pub struct ADDRHIGH0_R(crate::FieldReader); -impl ADDRHIGH0_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - ADDRHIGH0_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ADDRHIGH0_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `ADDRHIGH0` writer - Upper bound address for CEN0"] -pub struct ADDRHIGH0_W<'a> { - w: &'a mut W, -} -impl<'a> ADDRHIGH0_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0xff << 8)) | ((value as u32 & 0xff) << 8); - self.w - } -} -#[doc = "Field `CFGREADCYCLE` reader - Number of cycles for a read - N plus 1"] -pub struct CFGREADCYCLE_R(crate::FieldReader); -impl CFGREADCYCLE_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - CFGREADCYCLE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CFGREADCYCLE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CFGREADCYCLE` writer - Number of cycles for a read - N plus 1"] -pub struct CFGREADCYCLE_W<'a> { - w: &'a mut W, -} -impl<'a> CFGREADCYCLE_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x07 << 16)) | ((value as u32 & 0x07) << 16); - self.w - } -} -#[doc = "Field `CFGWRITECYCLE` reader - Number of cycles for a write - N plus 1"] -pub struct CFGWRITECYCLE_R(crate::FieldReader); -impl CFGWRITECYCLE_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - CFGWRITECYCLE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CFGWRITECYCLE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CFGWRITECYCLE` writer - Number of cycles for a write - N plus 1"] -pub struct CFGWRITECYCLE_W<'a> { - w: &'a mut W, -} -impl<'a> CFGWRITECYCLE_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x07 << 19)) | ((value as u32 & 0x07) << 19); - self.w - } -} -#[doc = "Field `CFGTURNAROUNDCYCLE` reader - Number of cycles for turnaround - N plus 1"] -pub struct CFGTURNAROUNDCYCLE_R(crate::FieldReader); -impl CFGTURNAROUNDCYCLE_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - CFGTURNAROUNDCYCLE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CFGTURNAROUNDCYCLE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CFGTURNAROUNDCYCLE` writer - Number of cycles for turnaround - N plus 1"] -pub struct CFGTURNAROUNDCYCLE_W<'a> { - w: &'a mut W, -} -impl<'a> CFGTURNAROUNDCYCLE_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x07 << 22)) | ((value as u32 & 0x07) << 22); - self.w - } -} -#[doc = "Field `CFGSIZE` reader - 8 bit (0) or 16 bit (1) port size"] -pub struct CFGSIZE_R(crate::FieldReader); -impl CFGSIZE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CFGSIZE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CFGSIZE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CFGSIZE` writer - 8 bit (0) or 16 bit (1) port size"] -pub struct CFGSIZE_W<'a> { - w: &'a mut W, -} -impl<'a> CFGSIZE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 25)) | ((value as u32 & 0x01) << 25); - self.w - } -} -impl R { - #[doc = "Bits 0:7 - Lower bound address for CEN0"] - #[inline(always)] - pub fn addrlow0(&self) -> ADDRLOW0_R { - ADDRLOW0_R::new((self.bits & 0xff) as u8) - } - #[doc = "Bits 8:15 - Upper bound address for CEN0"] - #[inline(always)] - pub fn addrhigh0(&self) -> ADDRHIGH0_R { - ADDRHIGH0_R::new(((self.bits >> 8) & 0xff) as u8) - } - #[doc = "Bits 16:18 - Number of cycles for a read - N plus 1"] - #[inline(always)] - pub fn cfgreadcycle(&self) -> CFGREADCYCLE_R { - CFGREADCYCLE_R::new(((self.bits >> 16) & 0x07) as u8) - } - #[doc = "Bits 19:21 - Number of cycles for a write - N plus 1"] - #[inline(always)] - pub fn cfgwritecycle(&self) -> CFGWRITECYCLE_R { - CFGWRITECYCLE_R::new(((self.bits >> 19) & 0x07) as u8) - } - #[doc = "Bits 22:24 - Number of cycles for turnaround - N plus 1"] - #[inline(always)] - pub fn cfgturnaroundcycle(&self) -> CFGTURNAROUNDCYCLE_R { - CFGTURNAROUNDCYCLE_R::new(((self.bits >> 22) & 0x07) as u8) - } - #[doc = "Bit 25 - 8 bit (0) or 16 bit (1) port size"] - #[inline(always)] - pub fn cfgsize(&self) -> CFGSIZE_R { - CFGSIZE_R::new(((self.bits >> 25) & 0x01) != 0) - } -} -impl W { - #[doc = "Bits 0:7 - Lower bound address for CEN0"] - #[inline(always)] - pub fn addrlow0(&mut self) -> ADDRLOW0_W { - ADDRLOW0_W { w: self } - } - #[doc = "Bits 8:15 - Upper bound address for CEN0"] - #[inline(always)] - pub fn addrhigh0(&mut self) -> ADDRHIGH0_W { - ADDRHIGH0_W { w: self } - } - #[doc = "Bits 16:18 - Number of cycles for a read - N plus 1"] - #[inline(always)] - pub fn cfgreadcycle(&mut self) -> CFGREADCYCLE_W { - CFGREADCYCLE_W { w: self } - } - #[doc = "Bits 19:21 - Number of cycles for a write - N plus 1"] - #[inline(always)] - pub fn cfgwritecycle(&mut self) -> CFGWRITECYCLE_W { - CFGWRITECYCLE_W { w: self } - } - #[doc = "Bits 22:24 - Number of cycles for turnaround - N plus 1"] - #[inline(always)] - pub fn cfgturnaroundcycle(&mut self) -> CFGTURNAROUNDCYCLE_W { - CFGTURNAROUNDCYCLE_W { w: self } - } - #[doc = "Bit 25 - 8 bit (0) or 16 bit (1) port size"] - #[inline(always)] - pub fn cfgsize(&mut self) -> CFGSIZE_W { - CFGSIZE_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "EBI Config Register 3\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ebi_cfg3](index.html) module"] -pub struct EBI_CFG3_SPEC; -impl crate::RegisterSpec for EBI_CFG3_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [ebi_cfg3::R](R) reader structure"] -impl crate::Readable for EBI_CFG3_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ebi_cfg3::W](W) writer structure"] -impl crate::Writable for EBI_CFG3_SPEC { - type Writer = W; -} -#[doc = "`reset()` method sets EBI_CFG3 to value 0"] -impl crate::Resettable for EBI_CFG3_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } -} diff --git a/va416xx/src/sysconfig/ef_config.rs b/va416xx/src/sysconfig/ef_config.rs index 95a6587..462b89e 100644 --- a/va416xx/src/sysconfig/ef_config.rs +++ b/va416xx/src/sysconfig/ef_config.rs @@ -1,253 +1,92 @@ #[doc = "Register `EF_CONFIG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `ROM_SPEED` reader - Specifies the speed of ROM_SCK"] -pub struct ROM_SPEED_R(crate::FieldReader); -impl ROM_SPEED_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - ROM_SPEED_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ROM_SPEED_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type RomSpeedR = crate::FieldReader; #[doc = "Field `ROM_SIZE` reader - Specifies how much of the full 128K byte address space is loaded from the external SPI memory after a reset"] -pub struct ROM_SIZE_R(crate::FieldReader); -impl ROM_SIZE_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - ROM_SIZE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ROM_SIZE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type RomSizeR = crate::FieldReader; #[doc = "Field `ROM_NOCHECK` reader - When set to 1, the ROM check is skipped"] -pub struct ROM_NOCHECK_R(crate::FieldReader); -impl ROM_NOCHECK_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - ROM_NOCHECK_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ROM_NOCHECK_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type RomNocheckR = crate::BitReader; #[doc = "Field `BOOT_DELAY` reader - Specifies the boot delay from the end of the Power-On-Sequence to the release of Reset"] -pub struct BOOT_DELAY_R(crate::FieldReader); -impl BOOT_DELAY_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - BOOT_DELAY_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BOOT_DELAY_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type BootDelayR = crate::FieldReader; #[doc = "Field `ROM_READ` reader - SPI ROM read instruction code"] -pub struct ROM_READ_R(crate::FieldReader); -impl ROM_READ_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - ROM_READ_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ROM_READ_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type RomReadR = crate::FieldReader; #[doc = "Field `ROM_LATENCY` reader - Number of bits of latency from Address until data from the SPI ROM"] -pub struct ROM_LATENCY_R(crate::FieldReader); -impl ROM_LATENCY_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - ROM_LATENCY_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ROM_LATENCY_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type RomLatencyR = crate::FieldReader; #[doc = "Field `ROM_ADDRESS` reader - ROM Address Mode"] -pub struct ROM_ADDRESS_R(crate::FieldReader); -impl ROM_ADDRESS_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - ROM_ADDRESS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ROM_ADDRESS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type RomAddressR = crate::FieldReader; #[doc = "Field `ROM_DLYCAP` reader - ROM SPI Delayed capture"] -pub struct ROM_DLYCAP_R(crate::FieldReader); -impl ROM_DLYCAP_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - ROM_DLYCAP_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ROM_DLYCAP_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type RomDlycapR = crate::BitReader; #[doc = "Field `ROM_STATUS` reader - The first data byte from the SPI ROM following an address is taken as a status byte"] -pub struct ROM_STATUS_R(crate::FieldReader); -impl ROM_STATUS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - ROM_STATUS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ROM_STATUS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type RomStatusR = crate::BitReader; #[doc = "Field `RM` reader - This bit controls the internal RAM read timing and must be maintained at this value"] -pub struct RM_R(crate::FieldReader); -impl RM_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RM_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RM_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type RmR = crate::BitReader; #[doc = "Field `WM` reader - This bit controls the internal RAM write timing and must be maintained at this value"] -pub struct WM_R(crate::FieldReader); -impl WM_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - WM_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for WM_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type WmR = crate::BitReader; impl R { #[doc = "Bits 0:1 - Specifies the speed of ROM_SCK"] #[inline(always)] - pub fn rom_speed(&self) -> ROM_SPEED_R { - ROM_SPEED_R::new((self.bits & 0x03) as u8) + pub fn rom_speed(&self) -> RomSpeedR { + RomSpeedR::new((self.bits & 3) as u8) } #[doc = "Bits 2:5 - Specifies how much of the full 128K byte address space is loaded from the external SPI memory after a reset"] #[inline(always)] - pub fn rom_size(&self) -> ROM_SIZE_R { - ROM_SIZE_R::new(((self.bits >> 2) & 0x0f) as u8) + pub fn rom_size(&self) -> RomSizeR { + RomSizeR::new(((self.bits >> 2) & 0x0f) as u8) } #[doc = "Bit 6 - When set to 1, the ROM check is skipped"] #[inline(always)] - pub fn rom_nocheck(&self) -> ROM_NOCHECK_R { - ROM_NOCHECK_R::new(((self.bits >> 6) & 0x01) != 0) + pub fn rom_nocheck(&self) -> RomNocheckR { + RomNocheckR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bits 7:9 - Specifies the boot delay from the end of the Power-On-Sequence to the release of Reset"] #[inline(always)] - pub fn boot_delay(&self) -> BOOT_DELAY_R { - BOOT_DELAY_R::new(((self.bits >> 7) & 0x07) as u8) + pub fn boot_delay(&self) -> BootDelayR { + BootDelayR::new(((self.bits >> 7) & 7) as u8) } #[doc = "Bits 10:17 - SPI ROM read instruction code"] #[inline(always)] - pub fn rom_read(&self) -> ROM_READ_R { - ROM_READ_R::new(((self.bits >> 10) & 0xff) as u8) + pub fn rom_read(&self) -> RomReadR { + RomReadR::new(((self.bits >> 10) & 0xff) as u8) } #[doc = "Bits 18:22 - Number of bits of latency from Address until data from the SPI ROM"] #[inline(always)] - pub fn rom_latency(&self) -> ROM_LATENCY_R { - ROM_LATENCY_R::new(((self.bits >> 18) & 0x1f) as u8) + pub fn rom_latency(&self) -> RomLatencyR { + RomLatencyR::new(((self.bits >> 18) & 0x1f) as u8) } #[doc = "Bits 23:24 - ROM Address Mode"] #[inline(always)] - pub fn rom_address(&self) -> ROM_ADDRESS_R { - ROM_ADDRESS_R::new(((self.bits >> 23) & 0x03) as u8) + pub fn rom_address(&self) -> RomAddressR { + RomAddressR::new(((self.bits >> 23) & 3) as u8) } #[doc = "Bit 25 - ROM SPI Delayed capture"] #[inline(always)] - pub fn rom_dlycap(&self) -> ROM_DLYCAP_R { - ROM_DLYCAP_R::new(((self.bits >> 25) & 0x01) != 0) + pub fn rom_dlycap(&self) -> RomDlycapR { + RomDlycapR::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - The first data byte from the SPI ROM following an address is taken as a status byte"] #[inline(always)] - pub fn rom_status(&self) -> ROM_STATUS_R { - ROM_STATUS_R::new(((self.bits >> 26) & 0x01) != 0) + pub fn rom_status(&self) -> RomStatusR { + RomStatusR::new(((self.bits >> 26) & 1) != 0) } #[doc = "Bit 27 - This bit controls the internal RAM read timing and must be maintained at this value"] #[inline(always)] - pub fn rm(&self) -> RM_R { - RM_R::new(((self.bits >> 27) & 0x01) != 0) + pub fn rm(&self) -> RmR { + RmR::new(((self.bits >> 27) & 1) != 0) } #[doc = "Bit 28 - This bit controls the internal RAM write timing and must be maintained at this value"] #[inline(always)] - pub fn wm(&self) -> WM_R { - WM_R::new(((self.bits >> 28) & 0x01) != 0) + pub fn wm(&self) -> WmR { + WmR::new(((self.bits >> 28) & 1) != 0) } } -#[doc = "EFuse Config Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ef_config](index.html) module"] -pub struct EF_CONFIG_SPEC; -impl crate::RegisterSpec for EF_CONFIG_SPEC { +#[doc = "EFuse Config Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ef_config::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct EfConfigSpec; +impl crate::RegisterSpec for EfConfigSpec { type Ux = u32; } -#[doc = "`read()` method returns [ef_config::R](R) reader structure"] -impl crate::Readable for EF_CONFIG_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ef_config::R`](R) reader structure"] +impl crate::Readable for EfConfigSpec {} #[doc = "`reset()` method sets EF_CONFIG to value 0x0a80_0c40"] -impl crate::Resettable for EF_CONFIG_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0x0a80_0c40 - } +impl crate::Resettable for EfConfigSpec { + const RESET_VALUE: u32 = 0x0a80_0c40; } diff --git a/va416xx/src/sysconfig/ef_id0.rs b/va416xx/src/sysconfig/ef_id0.rs index 9e37764..1cc8166 100644 --- a/va416xx/src/sysconfig/ef_id0.rs +++ b/va416xx/src/sysconfig/ef_id0.rs @@ -1,31 +1,18 @@ #[doc = "Register `EF_ID0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 +pub type R = crate::R; +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) } } -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "EFuse ID0 Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ef_id0](index.html) module"] -pub struct EF_ID0_SPEC; -impl crate::RegisterSpec for EF_ID0_SPEC { +#[doc = "EFuse ID0 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ef_id0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct EfId0Spec; +impl crate::RegisterSpec for EfId0Spec { type Ux = u32; } -#[doc = "`read()` method returns [ef_id0::R](R) reader structure"] -impl crate::Readable for EF_ID0_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ef_id0::R`](R) reader structure"] +impl crate::Readable for EfId0Spec {} #[doc = "`reset()` method sets EF_ID0 to value 0"] -impl crate::Resettable for EF_ID0_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for EfId0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/sysconfig/ef_id1.rs b/va416xx/src/sysconfig/ef_id1.rs index 23b00d8..4470af5 100644 --- a/va416xx/src/sysconfig/ef_id1.rs +++ b/va416xx/src/sysconfig/ef_id1.rs @@ -1,31 +1,18 @@ #[doc = "Register `EF_ID1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 +pub type R = crate::R; +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) } } -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "EFuse ID1 Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ef_id1](index.html) module"] -pub struct EF_ID1_SPEC; -impl crate::RegisterSpec for EF_ID1_SPEC { +#[doc = "EFuse ID1 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ef_id1::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct EfId1Spec; +impl crate::RegisterSpec for EfId1Spec { type Ux = u32; } -#[doc = "`read()` method returns [ef_id1::R](R) reader structure"] -impl crate::Readable for EF_ID1_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ef_id1::R`](R) reader structure"] +impl crate::Readable for EfId1Spec {} #[doc = "`reset()` method sets EF_ID1 to value 0"] -impl crate::Resettable for EF_ID1_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for EfId1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/sysconfig/hbo_cal.rs b/va416xx/src/sysconfig/hbo_cal.rs index 9ab463a..6817d67 100644 --- a/va416xx/src/sysconfig/hbo_cal.rs +++ b/va416xx/src/sysconfig/hbo_cal.rs @@ -1,73 +1,29 @@ #[doc = "Register `HBO_CAL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Field `OSC_CAL` reader - 1MHz OSC Calibration bit"] -pub struct OSC_CAL_R(crate::FieldReader); -impl OSC_CAL_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - OSC_CAL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for OSC_CAL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type R = crate::R; #[doc = "Field `HBO_CAL` reader - Heart Beat OSC Calibration bits"] -pub struct HBO_CAL_R(crate::FieldReader); -impl HBO_CAL_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - HBO_CAL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for HBO_CAL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type HboCalR = crate::FieldReader; +#[doc = "Field `OSC_CAL` reader - 1MHz OSC Calibration bit"] +pub type OscCalR = crate::BitReader; impl R { - #[doc = "Bit 3 - 1MHz OSC Calibration bit"] - #[inline(always)] - pub fn osc_cal(&self) -> OSC_CAL_R { - OSC_CAL_R::new(((self.bits >> 3) & 0x01) != 0) - } #[doc = "Bits 0:2 - Heart Beat OSC Calibration bits"] #[inline(always)] - pub fn hbo_cal(&self) -> HBO_CAL_R { - HBO_CAL_R::new((self.bits & 0x07) as u8) + pub fn hbo_cal(&self) -> HboCalR { + HboCalR::new((self.bits & 7) as u8) + } + #[doc = "Bit 3 - 1MHz OSC Calibration bit"] + #[inline(always)] + pub fn osc_cal(&self) -> OscCalR { + OscCalR::new(((self.bits >> 3) & 1) != 0) } } -#[doc = "Heart Beat OSC Calibration Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hbo_cal](index.html) module"] -pub struct HBO_CAL_SPEC; -impl crate::RegisterSpec for HBO_CAL_SPEC { +#[doc = "Heart Beat OSC Calibration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hbo_cal::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct HboCalSpec; +impl crate::RegisterSpec for HboCalSpec { type Ux = u32; } -#[doc = "`read()` method returns [hbo_cal::R](R) reader structure"] -impl crate::Readable for HBO_CAL_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`hbo_cal::R`](R) reader structure"] +impl crate::Readable for HboCalSpec {} #[doc = "`reset()` method sets HBO_CAL to value 0"] -impl crate::Resettable for HBO_CAL_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for HboCalSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/sysconfig/irq_clr.rs b/va416xx/src/sysconfig/irq_clr.rs deleted file mode 100644 index 705daf0..0000000 --- a/va416xx/src/sysconfig/irq_clr.rs +++ /dev/null @@ -1,207 +0,0 @@ -#[doc = "Register `IRQ_CLR` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `ROMMBE` writer - ROM Multi Bit Interrupt"] -pub struct ROMMBE_W<'a> { - w: &'a mut W, -} -impl<'a> ROMMBE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} -#[doc = "Field `ROMSBE` writer - ROM Single Bit Interrupt"] -pub struct ROMSBE_W<'a> { - w: &'a mut W, -} -impl<'a> ROMSBE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); - self.w - } -} -#[doc = "Field `RAM0MBE` writer - RAM0 Multi Bit Interrupt"] -pub struct RAM0MBE_W<'a> { - w: &'a mut W, -} -impl<'a> RAM0MBE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); - self.w - } -} -#[doc = "Field `RAM0SBE` writer - RAM0 Single Bit Interrupt"] -pub struct RAM0SBE_W<'a> { - w: &'a mut W, -} -impl<'a> RAM0SBE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); - self.w - } -} -#[doc = "Field `RAM1MBE` writer - RAM1 Multi Bit Interrupt"] -pub struct RAM1MBE_W<'a> { - w: &'a mut W, -} -impl<'a> RAM1MBE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); - self.w - } -} -#[doc = "Field `RAM1SBE` writer - RAM1 Single Bit Interrupt"] -pub struct RAM1SBE_W<'a> { - w: &'a mut W, -} -impl<'a> RAM1SBE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); - self.w - } -} -impl W { - #[doc = "Bit 0 - ROM Multi Bit Interrupt"] - #[inline(always)] - pub fn rommbe(&mut self) -> ROMMBE_W { - ROMMBE_W { w: self } - } - #[doc = "Bit 1 - ROM Single Bit Interrupt"] - #[inline(always)] - pub fn romsbe(&mut self) -> ROMSBE_W { - ROMSBE_W { w: self } - } - #[doc = "Bit 2 - RAM0 Multi Bit Interrupt"] - #[inline(always)] - pub fn ram0mbe(&mut self) -> RAM0MBE_W { - RAM0MBE_W { w: self } - } - #[doc = "Bit 3 - RAM0 Single Bit Interrupt"] - #[inline(always)] - pub fn ram0sbe(&mut self) -> RAM0SBE_W { - RAM0SBE_W { w: self } - } - #[doc = "Bit 4 - RAM1 Multi Bit Interrupt"] - #[inline(always)] - pub fn ram1mbe(&mut self) -> RAM1MBE_W { - RAM1MBE_W { w: self } - } - #[doc = "Bit 5 - RAM1 Single Bit Interrupt"] - #[inline(always)] - pub fn ram1sbe(&mut self) -> RAM1SBE_W { - RAM1SBE_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "Clear EDAC Error Interrupt Status\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [irq_clr](index.html) module"] -pub struct IRQ_CLR_SPEC; -impl crate::RegisterSpec for IRQ_CLR_SPEC { - type Ux = u32; -} -#[doc = "`write(|w| ..)` method takes [irq_clr::W](W) writer structure"] -impl crate::Writable for IRQ_CLR_SPEC { - type Writer = W; -} -#[doc = "`reset()` method sets IRQ_CLR to value 0"] -impl crate::Resettable for IRQ_CLR_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } -} diff --git a/va416xx/src/sysconfig/irq_enb.rs b/va416xx/src/sysconfig/irq_enb.rs index 0eb2556..2f4635f 100644 --- a/va416xx/src/sysconfig/irq_enb.rs +++ b/va416xx/src/sysconfig/irq_enb.rs @@ -1,348 +1,115 @@ #[doc = "Register `IRQ_ENB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IRQ_ENB` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `ROMMBE` reader - ROM Multi Bit Interrupt"] -pub struct ROMMBE_R(crate::FieldReader); -impl ROMMBE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - ROMMBE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ROMMBE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type RommbeR = crate::BitReader; #[doc = "Field `ROMMBE` writer - ROM Multi Bit Interrupt"] -pub struct ROMMBE_W<'a> { - w: &'a mut W, -} -impl<'a> ROMMBE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} +pub type RommbeW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ROMSBE` reader - ROM Single Bit Interrupt"] -pub struct ROMSBE_R(crate::FieldReader); -impl ROMSBE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - ROMSBE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ROMSBE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type RomsbeR = crate::BitReader; #[doc = "Field `ROMSBE` writer - ROM Single Bit Interrupt"] -pub struct ROMSBE_W<'a> { - w: &'a mut W, -} -impl<'a> ROMSBE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); - self.w - } -} +pub type RomsbeW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RAM0MBE` reader - RAM0 Multi Bit Interrupt"] -pub struct RAM0MBE_R(crate::FieldReader); -impl RAM0MBE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RAM0MBE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RAM0MBE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Ram0mbeR = crate::BitReader; #[doc = "Field `RAM0MBE` writer - RAM0 Multi Bit Interrupt"] -pub struct RAM0MBE_W<'a> { - w: &'a mut W, -} -impl<'a> RAM0MBE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); - self.w - } -} +pub type Ram0mbeW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RAM0SBE` reader - RAM0 Single Bit Interrupt"] -pub struct RAM0SBE_R(crate::FieldReader); -impl RAM0SBE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RAM0SBE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RAM0SBE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Ram0sbeR = crate::BitReader; #[doc = "Field `RAM0SBE` writer - RAM0 Single Bit Interrupt"] -pub struct RAM0SBE_W<'a> { - w: &'a mut W, -} -impl<'a> RAM0SBE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); - self.w - } -} +pub type Ram0sbeW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RAM1MBE` reader - RAM1 Multi Bit Interrupt"] -pub struct RAM1MBE_R(crate::FieldReader); -impl RAM1MBE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RAM1MBE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RAM1MBE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Ram1mbeR = crate::BitReader; #[doc = "Field `RAM1MBE` writer - RAM1 Multi Bit Interrupt"] -pub struct RAM1MBE_W<'a> { - w: &'a mut W, -} -impl<'a> RAM1MBE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); - self.w - } -} +pub type Ram1mbeW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RAM1SBE` reader - RAM1 Single Bit Interrupt"] -pub struct RAM1SBE_R(crate::FieldReader); -impl RAM1SBE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RAM1SBE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RAM1SBE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Ram1sbeR = crate::BitReader; #[doc = "Field `RAM1SBE` writer - RAM1 Single Bit Interrupt"] -pub struct RAM1SBE_W<'a> { - w: &'a mut W, -} -impl<'a> RAM1SBE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); - self.w - } -} +pub type Ram1sbeW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - ROM Multi Bit Interrupt"] #[inline(always)] - pub fn rommbe(&self) -> ROMMBE_R { - ROMMBE_R::new((self.bits & 0x01) != 0) + pub fn rommbe(&self) -> RommbeR { + RommbeR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - ROM Single Bit Interrupt"] #[inline(always)] - pub fn romsbe(&self) -> ROMSBE_R { - ROMSBE_R::new(((self.bits >> 1) & 0x01) != 0) + pub fn romsbe(&self) -> RomsbeR { + RomsbeR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - RAM0 Multi Bit Interrupt"] #[inline(always)] - pub fn ram0mbe(&self) -> RAM0MBE_R { - RAM0MBE_R::new(((self.bits >> 2) & 0x01) != 0) + pub fn ram0mbe(&self) -> Ram0mbeR { + Ram0mbeR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - RAM0 Single Bit Interrupt"] #[inline(always)] - pub fn ram0sbe(&self) -> RAM0SBE_R { - RAM0SBE_R::new(((self.bits >> 3) & 0x01) != 0) + pub fn ram0sbe(&self) -> Ram0sbeR { + Ram0sbeR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - RAM1 Multi Bit Interrupt"] #[inline(always)] - pub fn ram1mbe(&self) -> RAM1MBE_R { - RAM1MBE_R::new(((self.bits >> 4) & 0x01) != 0) + pub fn ram1mbe(&self) -> Ram1mbeR { + Ram1mbeR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - RAM1 Single Bit Interrupt"] #[inline(always)] - pub fn ram1sbe(&self) -> RAM1SBE_R { - RAM1SBE_R::new(((self.bits >> 5) & 0x01) != 0) + pub fn ram1sbe(&self) -> Ram1sbeR { + Ram1sbeR::new(((self.bits >> 5) & 1) != 0) } } impl W { #[doc = "Bit 0 - ROM Multi Bit Interrupt"] #[inline(always)] - pub fn rommbe(&mut self) -> ROMMBE_W { - ROMMBE_W { w: self } + #[must_use] + pub fn rommbe(&mut self) -> RommbeW { + RommbeW::new(self, 0) } #[doc = "Bit 1 - ROM Single Bit Interrupt"] #[inline(always)] - pub fn romsbe(&mut self) -> ROMSBE_W { - ROMSBE_W { w: self } + #[must_use] + pub fn romsbe(&mut self) -> RomsbeW { + RomsbeW::new(self, 1) } #[doc = "Bit 2 - RAM0 Multi Bit Interrupt"] #[inline(always)] - pub fn ram0mbe(&mut self) -> RAM0MBE_W { - RAM0MBE_W { w: self } + #[must_use] + pub fn ram0mbe(&mut self) -> Ram0mbeW { + Ram0mbeW::new(self, 2) } #[doc = "Bit 3 - RAM0 Single Bit Interrupt"] #[inline(always)] - pub fn ram0sbe(&mut self) -> RAM0SBE_W { - RAM0SBE_W { w: self } + #[must_use] + pub fn ram0sbe(&mut self) -> Ram0sbeW { + Ram0sbeW::new(self, 3) } #[doc = "Bit 4 - RAM1 Multi Bit Interrupt"] #[inline(always)] - pub fn ram1mbe(&mut self) -> RAM1MBE_W { - RAM1MBE_W { w: self } + #[must_use] + pub fn ram1mbe(&mut self) -> Ram1mbeW { + Ram1mbeW::new(self, 4) } #[doc = "Bit 5 - RAM1 Single Bit Interrupt"] #[inline(always)] - pub fn ram1sbe(&mut self) -> RAM1SBE_W { - RAM1SBE_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn ram1sbe(&mut self) -> Ram1sbeW { + Ram1sbeW::new(self, 5) } } -#[doc = "Enable EDAC Error Interrupt Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [irq_enb](index.html) module"] -pub struct IRQ_ENB_SPEC; -impl crate::RegisterSpec for IRQ_ENB_SPEC { +#[doc = "Enable EDAC Error Interrupt Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_enb::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`irq_enb::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IrqEnbSpec; +impl crate::RegisterSpec for IrqEnbSpec { type Ux = u32; } -#[doc = "`read()` method returns [irq_enb::R](R) reader structure"] -impl crate::Readable for IRQ_ENB_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [irq_enb::W](W) writer structure"] -impl crate::Writable for IRQ_ENB_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`irq_enb::R`](R) reader structure"] +impl crate::Readable for IrqEnbSpec {} +#[doc = "`write(|w| ..)` method takes [`irq_enb::W`](W) writer structure"] +impl crate::Writable for IrqEnbSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IRQ_ENB to value 0"] -impl crate::Resettable for IRQ_ENB_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for IrqEnbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/sysconfig/irq_end.rs b/va416xx/src/sysconfig/irq_end.rs deleted file mode 100644 index 443bb3f..0000000 --- a/va416xx/src/sysconfig/irq_end.rs +++ /dev/null @@ -1,153 +0,0 @@ -#[doc = "Register `IRQ_END` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Field `ROMMBE` reader - ROM Multi Bit Interrupt"] -pub struct ROMMBE_R(crate::FieldReader); -impl ROMMBE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - ROMMBE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ROMMBE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `ROMSBE` reader - ROM Single Bit Interrupt"] -pub struct ROMSBE_R(crate::FieldReader); -impl ROMSBE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - ROMSBE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ROMSBE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RAM0MBE` reader - RAM0 Multi Bit Interrupt"] -pub struct RAM0MBE_R(crate::FieldReader); -impl RAM0MBE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RAM0MBE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RAM0MBE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RAM0SBE` reader - RAM0 Single Bit Interrupt"] -pub struct RAM0SBE_R(crate::FieldReader); -impl RAM0SBE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RAM0SBE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RAM0SBE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RAM1MBE` reader - RAM1 Multi Bit Interrupt"] -pub struct RAM1MBE_R(crate::FieldReader); -impl RAM1MBE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RAM1MBE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RAM1MBE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RAM1SBE` reader - RAM1 Single Bit Interrupt"] -pub struct RAM1SBE_R(crate::FieldReader); -impl RAM1SBE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RAM1SBE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RAM1SBE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl R { - #[doc = "Bit 0 - ROM Multi Bit Interrupt"] - #[inline(always)] - pub fn rommbe(&self) -> ROMMBE_R { - ROMMBE_R::new((self.bits & 0x01) != 0) - } - #[doc = "Bit 1 - ROM Single Bit Interrupt"] - #[inline(always)] - pub fn romsbe(&self) -> ROMSBE_R { - ROMSBE_R::new(((self.bits >> 1) & 0x01) != 0) - } - #[doc = "Bit 2 - RAM0 Multi Bit Interrupt"] - #[inline(always)] - pub fn ram0mbe(&self) -> RAM0MBE_R { - RAM0MBE_R::new(((self.bits >> 2) & 0x01) != 0) - } - #[doc = "Bit 3 - RAM0 Single Bit Interrupt"] - #[inline(always)] - pub fn ram0sbe(&self) -> RAM0SBE_R { - RAM0SBE_R::new(((self.bits >> 3) & 0x01) != 0) - } - #[doc = "Bit 4 - RAM1 Multi Bit Interrupt"] - #[inline(always)] - pub fn ram1mbe(&self) -> RAM1MBE_R { - RAM1MBE_R::new(((self.bits >> 4) & 0x01) != 0) - } - #[doc = "Bit 5 - RAM1 Single Bit Interrupt"] - #[inline(always)] - pub fn ram1sbe(&self) -> RAM1SBE_R { - RAM1SBE_R::new(((self.bits >> 5) & 0x01) != 0) - } -} -#[doc = "Enabled EDAC Error Interrupt Status\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [irq_end](index.html) module"] -pub struct IRQ_END_SPEC; -impl crate::RegisterSpec for IRQ_END_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [irq_end::R](R) reader structure"] -impl crate::Readable for IRQ_END_SPEC { - type Reader = R; -} -#[doc = "`reset()` method sets IRQ_END to value 0"] -impl crate::Resettable for IRQ_END_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } -} diff --git a/va416xx/src/sysconfig/irq_raw.rs b/va416xx/src/sysconfig/irq_raw.rs deleted file mode 100644 index 83aa039..0000000 --- a/va416xx/src/sysconfig/irq_raw.rs +++ /dev/null @@ -1,153 +0,0 @@ -#[doc = "Register `IRQ_RAW` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Field `ROMMBE` reader - ROM Multi Bit Interrupt"] -pub struct ROMMBE_R(crate::FieldReader); -impl ROMMBE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - ROMMBE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ROMMBE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `ROMSBE` reader - ROM Single Bit Interrupt"] -pub struct ROMSBE_R(crate::FieldReader); -impl ROMSBE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - ROMSBE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ROMSBE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RAM0MBE` reader - RAM0 Multi Bit Interrupt"] -pub struct RAM0MBE_R(crate::FieldReader); -impl RAM0MBE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RAM0MBE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RAM0MBE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RAM0SBE` reader - RAM0 Single Bit Interrupt"] -pub struct RAM0SBE_R(crate::FieldReader); -impl RAM0SBE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RAM0SBE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RAM0SBE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RAM1MBE` reader - RAM1 Multi Bit Interrupt"] -pub struct RAM1MBE_R(crate::FieldReader); -impl RAM1MBE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RAM1MBE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RAM1MBE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RAM1SBE` reader - RAM1 Single Bit Interrupt"] -pub struct RAM1SBE_R(crate::FieldReader); -impl RAM1SBE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RAM1SBE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RAM1SBE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl R { - #[doc = "Bit 0 - ROM Multi Bit Interrupt"] - #[inline(always)] - pub fn rommbe(&self) -> ROMMBE_R { - ROMMBE_R::new((self.bits & 0x01) != 0) - } - #[doc = "Bit 1 - ROM Single Bit Interrupt"] - #[inline(always)] - pub fn romsbe(&self) -> ROMSBE_R { - ROMSBE_R::new(((self.bits >> 1) & 0x01) != 0) - } - #[doc = "Bit 2 - RAM0 Multi Bit Interrupt"] - #[inline(always)] - pub fn ram0mbe(&self) -> RAM0MBE_R { - RAM0MBE_R::new(((self.bits >> 2) & 0x01) != 0) - } - #[doc = "Bit 3 - RAM0 Single Bit Interrupt"] - #[inline(always)] - pub fn ram0sbe(&self) -> RAM0SBE_R { - RAM0SBE_R::new(((self.bits >> 3) & 0x01) != 0) - } - #[doc = "Bit 4 - RAM1 Multi Bit Interrupt"] - #[inline(always)] - pub fn ram1mbe(&self) -> RAM1MBE_R { - RAM1MBE_R::new(((self.bits >> 4) & 0x01) != 0) - } - #[doc = "Bit 5 - RAM1 Single Bit Interrupt"] - #[inline(always)] - pub fn ram1sbe(&self) -> RAM1SBE_R { - RAM1SBE_R::new(((self.bits >> 5) & 0x01) != 0) - } -} -#[doc = "Raw EDAC Error Interrupt Status\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [irq_raw](index.html) module"] -pub struct IRQ_RAW_SPEC; -impl crate::RegisterSpec for IRQ_RAW_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [irq_raw::R](R) reader structure"] -impl crate::Readable for IRQ_RAW_SPEC { - type Reader = R; -} -#[doc = "`reset()` method sets IRQ_RAW to value 0"] -impl crate::Resettable for IRQ_RAW_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } -} diff --git a/va416xx/src/sysconfig/perid.rs b/va416xx/src/sysconfig/perid.rs index 1003e2d..5ba23b5 100644 --- a/va416xx/src/sysconfig/perid.rs +++ b/va416xx/src/sysconfig/perid.rs @@ -1,93 +1,36 @@ #[doc = "Register `PERID` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `MANUFACTURER_ID` reader - MANUFACTURER_ID"] -pub struct MANUFACTURER_ID_R(crate::FieldReader); -impl MANUFACTURER_ID_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - MANUFACTURER_ID_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for MANUFACTURER_ID_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type ManufacturerIdR = crate::FieldReader; #[doc = "Field `PERIPHERAL_ID` reader - PERIPHERAL_ID"] -pub struct PERIPHERAL_ID_R(crate::FieldReader); -impl PERIPHERAL_ID_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - PERIPHERAL_ID_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PERIPHERAL_ID_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type PeripheralIdR = crate::FieldReader; #[doc = "Field `PERIPHERAL_VER` reader - PERIPHERAL_VER"] -pub struct PERIPHERAL_VER_R(crate::FieldReader); -impl PERIPHERAL_VER_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - PERIPHERAL_VER_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PERIPHERAL_VER_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type PeripheralVerR = crate::FieldReader; impl R { #[doc = "Bits 0:11 - MANUFACTURER_ID"] #[inline(always)] - pub fn manufacturer_id(&self) -> MANUFACTURER_ID_R { - MANUFACTURER_ID_R::new((self.bits & 0x0fff) as u16) + pub fn manufacturer_id(&self) -> ManufacturerIdR { + ManufacturerIdR::new((self.bits & 0x0fff) as u16) } #[doc = "Bits 16:23 - PERIPHERAL_ID"] #[inline(always)] - pub fn peripheral_id(&self) -> PERIPHERAL_ID_R { - PERIPHERAL_ID_R::new(((self.bits >> 16) & 0xff) as u8) + pub fn peripheral_id(&self) -> PeripheralIdR { + PeripheralIdR::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - PERIPHERAL_VER"] #[inline(always)] - pub fn peripheral_ver(&self) -> PERIPHERAL_VER_R { - PERIPHERAL_VER_R::new(((self.bits >> 24) & 0xff) as u8) + pub fn peripheral_ver(&self) -> PeripheralVerR { + PeripheralVerR::new(((self.bits >> 24) & 0xff) as u8) } } -#[doc = "Peripheral ID Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [perid](index.html) module"] -pub struct PERID_SPEC; -impl crate::RegisterSpec for PERID_SPEC { +#[doc = "Peripheral ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`perid::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PeridSpec; +impl crate::RegisterSpec for PeridSpec { type Ux = u32; } -#[doc = "`read()` method returns [perid::R](R) reader structure"] -impl crate::Readable for PERID_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`perid::R`](R) reader structure"] +impl crate::Readable for PeridSpec {} #[doc = "`reset()` method sets PERID to value 0x0280_07e9"] -impl crate::Resettable for PERID_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0x0280_07e9 - } +impl crate::Resettable for PeridSpec { + const RESET_VALUE: u32 = 0x0280_07e9; } diff --git a/va416xx/src/sysconfig/peripheral_clk_enable.rs b/va416xx/src/sysconfig/peripheral_clk_enable.rs deleted file mode 100644 index cc6c96b..0000000 --- a/va416xx/src/sysconfig/peripheral_clk_enable.rs +++ /dev/null @@ -1,1523 +0,0 @@ -#[doc = "Register `PERIPHERAL_CLK_ENABLE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Register `PERIPHERAL_CLK_ENABLE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `SPI0` reader - Resetn of SPI0"] -pub struct SPI0_R(crate::FieldReader); -impl SPI0_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - SPI0_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for SPI0_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `SPI0` writer - Resetn of SPI0"] -pub struct SPI0_W<'a> { - w: &'a mut W, -} -impl<'a> SPI0_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} -#[doc = "Field `SPI1` reader - Resetn of SPI1"] -pub struct SPI1_R(crate::FieldReader); -impl SPI1_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - SPI1_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for SPI1_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `SPI1` writer - Resetn of SPI1"] -pub struct SPI1_W<'a> { - w: &'a mut W, -} -impl<'a> SPI1_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); - self.w - } -} -#[doc = "Field `SPI2` reader - Resetn of SPI2"] -pub struct SPI2_R(crate::FieldReader); -impl SPI2_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - SPI2_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for SPI2_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `SPI2` writer - Resetn of SPI2"] -pub struct SPI2_W<'a> { - w: &'a mut W, -} -impl<'a> SPI2_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); - self.w - } -} -#[doc = "Field `SPI3` reader - Resetn of SPI3"] -pub struct SPI3_R(crate::FieldReader); -impl SPI3_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - SPI3_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for SPI3_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `SPI3` writer - Resetn of SPI3"] -pub struct SPI3_W<'a> { - w: &'a mut W, -} -impl<'a> SPI3_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); - self.w - } -} -#[doc = "Field `UART0` reader - Resetn of UART0"] -pub struct UART0_R(crate::FieldReader); -impl UART0_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - UART0_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for UART0_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `UART0` writer - Resetn of UART0"] -pub struct UART0_W<'a> { - w: &'a mut W, -} -impl<'a> UART0_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); - self.w - } -} -#[doc = "Field `UART1` reader - Resetn of UART1"] -pub struct UART1_R(crate::FieldReader); -impl UART1_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - UART1_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for UART1_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `UART1` writer - Resetn of UART1"] -pub struct UART1_W<'a> { - w: &'a mut W, -} -impl<'a> UART1_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); - self.w - } -} -#[doc = "Field `UART2` reader - Resetn of UART2"] -pub struct UART2_R(crate::FieldReader); -impl UART2_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - UART2_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for UART2_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `UART2` writer - Resetn of UART2"] -pub struct UART2_W<'a> { - w: &'a mut W, -} -impl<'a> UART2_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); - self.w - } -} -#[doc = "Field `I2C0` reader - Resetn of I2C0"] -pub struct I2C0_R(crate::FieldReader); -impl I2C0_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - I2C0_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for I2C0_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `I2C0` writer - Resetn of I2C0"] -pub struct I2C0_W<'a> { - w: &'a mut W, -} -impl<'a> I2C0_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); - self.w - } -} -#[doc = "Field `I2C1` reader - Resetn of I2C1"] -pub struct I2C1_R(crate::FieldReader); -impl I2C1_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - I2C1_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for I2C1_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `I2C1` writer - Resetn of I2C1"] -pub struct I2C1_W<'a> { - w: &'a mut W, -} -impl<'a> I2C1_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); - self.w - } -} -#[doc = "Field `I2C2` reader - Resetn of I2C2"] -pub struct I2C2_R(crate::FieldReader); -impl I2C2_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - I2C2_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for I2C2_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `I2C2` writer - Resetn of I2C2"] -pub struct I2C2_W<'a> { - w: &'a mut W, -} -impl<'a> I2C2_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); - self.w - } -} -#[doc = "Field `CAN0` reader - Resetn of CAN0"] -pub struct CAN0_R(crate::FieldReader); -impl CAN0_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CAN0_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CAN0_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CAN0` writer - Resetn of CAN0"] -pub struct CAN0_W<'a> { - w: &'a mut W, -} -impl<'a> CAN0_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); - self.w - } -} -#[doc = "Field `CAN1` reader - Resetn of CAN1"] -pub struct CAN1_R(crate::FieldReader); -impl CAN1_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CAN1_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CAN1_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CAN1` writer - Resetn of CAN1"] -pub struct CAN1_W<'a> { - w: &'a mut W, -} -impl<'a> CAN1_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); - self.w - } -} -#[doc = "Field `TRNG` reader - Resetn of TRNG"] -pub struct TRNG_R(crate::FieldReader); -impl TRNG_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TRNG_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TRNG_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `TRNG` writer - Resetn of TRNG"] -pub struct TRNG_W<'a> { - w: &'a mut W, -} -impl<'a> TRNG_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); - self.w - } -} -#[doc = "Field `ADC` reader - Resetn of ADC"] -pub struct ADC_R(crate::FieldReader); -impl ADC_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - ADC_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ADC_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `ADC` writer - Resetn of ADC"] -pub struct ADC_W<'a> { - w: &'a mut W, -} -impl<'a> ADC_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); - self.w - } -} -#[doc = "Field `DAC` reader - Resetn of DAC"] -pub struct DAC_R(crate::FieldReader); -impl DAC_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - DAC_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for DAC_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `DAC` writer - Resetn of DAC"] -pub struct DAC_W<'a> { - w: &'a mut W, -} -impl<'a> DAC_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); - self.w - } -} -#[doc = "Field `DMA` reader - Resetn of DMA"] -pub struct DMA_R(crate::FieldReader); -impl DMA_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - DMA_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for DMA_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `DMA` writer - Resetn of DMA"] -pub struct DMA_W<'a> { - w: &'a mut W, -} -impl<'a> DMA_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); - self.w - } -} -#[doc = "Field `EBI` reader - Resetn of EBI"] -pub struct EBI_R(crate::FieldReader); -impl EBI_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - EBI_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for EBI_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `EBI` writer - Resetn of EBI"] -pub struct EBI_W<'a> { - w: &'a mut W, -} -impl<'a> EBI_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16); - self.w - } -} -#[doc = "Field `ETH` reader - Resetn of Ethernet"] -pub struct ETH_R(crate::FieldReader); -impl ETH_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - ETH_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ETH_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `ETH` writer - Resetn of Ethernet"] -pub struct ETH_W<'a> { - w: &'a mut W, -} -impl<'a> ETH_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 17)) | ((value as u32 & 0x01) << 17); - self.w - } -} -#[doc = "Field `SPW` reader - Resetn of SpaceWire"] -pub struct SPW_R(crate::FieldReader); -impl SPW_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - SPW_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for SPW_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `SPW` writer - Resetn of SpaceWire"] -pub struct SPW_W<'a> { - w: &'a mut W, -} -impl<'a> SPW_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 18)) | ((value as u32 & 0x01) << 18); - self.w - } -} -#[doc = "Field `CLKGEN` reader - RESETn of PLL in Clock Generation Module"] -pub struct CLKGEN_R(crate::FieldReader); -impl CLKGEN_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CLKGEN_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CLKGEN_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CLKGEN` writer - RESETn of PLL in Clock Generation Module"] -pub struct CLKGEN_W<'a> { - w: &'a mut W, -} -impl<'a> CLKGEN_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 19)) | ((value as u32 & 0x01) << 19); - self.w - } -} -#[doc = "Field `IRQ` reader - Resetn of IRQ Router"] -pub struct IRQ_R(crate::FieldReader); -impl IRQ_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - IRQ_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for IRQ_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `IRQ` writer - Resetn of IRQ Router"] -pub struct IRQ_W<'a> { - w: &'a mut W, -} -impl<'a> IRQ_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 20)) | ((value as u32 & 0x01) << 20); - self.w - } -} -#[doc = "Field `IOCONFIG` reader - Resetn of IO CONFIG"] -pub struct IOCONFIG_R(crate::FieldReader); -impl IOCONFIG_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - IOCONFIG_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for IOCONFIG_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `IOCONFIG` writer - Resetn of IO CONFIG"] -pub struct IOCONFIG_W<'a> { - w: &'a mut W, -} -impl<'a> IOCONFIG_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 21)) | ((value as u32 & 0x01) << 21); - self.w - } -} -#[doc = "Field `UTILITY` reader - Resetn of UTILITY peripheral"] -pub struct UTILITY_R(crate::FieldReader); -impl UTILITY_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - UTILITY_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for UTILITY_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `UTILITY` writer - Resetn of UTILITY peripheral"] -pub struct UTILITY_W<'a> { - w: &'a mut W, -} -impl<'a> UTILITY_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 22)) | ((value as u32 & 0x01) << 22); - self.w - } -} -#[doc = "Field `WDOG` reader - Resetn of WDOG"] -pub struct WDOG_R(crate::FieldReader); -impl WDOG_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - WDOG_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for WDOG_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `WDOG` writer - Resetn of WDOG"] -pub struct WDOG_W<'a> { - w: &'a mut W, -} -impl<'a> WDOG_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 23)) | ((value as u32 & 0x01) << 23); - self.w - } -} -#[doc = "Field `PORTA` reader - Resetn of PORTA"] -pub struct PORTA_R(crate::FieldReader); -impl PORTA_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - PORTA_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PORTA_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `PORTA` writer - Resetn of PORTA"] -pub struct PORTA_W<'a> { - w: &'a mut W, -} -impl<'a> PORTA_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 24)) | ((value as u32 & 0x01) << 24); - self.w - } -} -#[doc = "Field `PORTB` reader - Resetn of PORTB"] -pub struct PORTB_R(crate::FieldReader); -impl PORTB_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - PORTB_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PORTB_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `PORTB` writer - Resetn of PORTB"] -pub struct PORTB_W<'a> { - w: &'a mut W, -} -impl<'a> PORTB_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 25)) | ((value as u32 & 0x01) << 25); - self.w - } -} -#[doc = "Field `PORTC` reader - Resetn of PORTC"] -pub struct PORTC_R(crate::FieldReader); -impl PORTC_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - PORTC_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PORTC_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `PORTC` writer - Resetn of PORTC"] -pub struct PORTC_W<'a> { - w: &'a mut W, -} -impl<'a> PORTC_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 26)) | ((value as u32 & 0x01) << 26); - self.w - } -} -#[doc = "Field `PORTD` reader - Resetn of PORTD"] -pub struct PORTD_R(crate::FieldReader); -impl PORTD_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - PORTD_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PORTD_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `PORTD` writer - Resetn of PORTD"] -pub struct PORTD_W<'a> { - w: &'a mut W, -} -impl<'a> PORTD_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 27)) | ((value as u32 & 0x01) << 27); - self.w - } -} -#[doc = "Field `PORTE` reader - Resetn of PORTE"] -pub struct PORTE_R(crate::FieldReader); -impl PORTE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - PORTE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PORTE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `PORTE` writer - Resetn of PORTE"] -pub struct PORTE_W<'a> { - w: &'a mut W, -} -impl<'a> PORTE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 28)) | ((value as u32 & 0x01) << 28); - self.w - } -} -#[doc = "Field `PORTF` reader - Resetn of PORTF"] -pub struct PORTF_R(crate::FieldReader); -impl PORTF_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - PORTF_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PORTF_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `PORTF` writer - Resetn of PORTF"] -pub struct PORTF_W<'a> { - w: &'a mut W, -} -impl<'a> PORTF_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 29)) | ((value as u32 & 0x01) << 29); - self.w - } -} -#[doc = "Field `PORTG` reader - Resetn of PORTG"] -pub struct PORTG_R(crate::FieldReader); -impl PORTG_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - PORTG_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PORTG_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `PORTG` writer - Resetn of PORTG"] -pub struct PORTG_W<'a> { - w: &'a mut W, -} -impl<'a> PORTG_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 30)) | ((value as u32 & 0x01) << 30); - self.w - } -} -impl R { - #[doc = "Bit 0 - Resetn of SPI0"] - #[inline(always)] - pub fn spi0(&self) -> SPI0_R { - SPI0_R::new((self.bits & 0x01) != 0) - } - #[doc = "Bit 1 - Resetn of SPI1"] - #[inline(always)] - pub fn spi1(&self) -> SPI1_R { - SPI1_R::new(((self.bits >> 1) & 0x01) != 0) - } - #[doc = "Bit 2 - Resetn of SPI2"] - #[inline(always)] - pub fn spi2(&self) -> SPI2_R { - SPI2_R::new(((self.bits >> 2) & 0x01) != 0) - } - #[doc = "Bit 3 - Resetn of SPI3"] - #[inline(always)] - pub fn spi3(&self) -> SPI3_R { - SPI3_R::new(((self.bits >> 3) & 0x01) != 0) - } - #[doc = "Bit 4 - Resetn of UART0"] - #[inline(always)] - pub fn uart0(&self) -> UART0_R { - UART0_R::new(((self.bits >> 4) & 0x01) != 0) - } - #[doc = "Bit 5 - Resetn of UART1"] - #[inline(always)] - pub fn uart1(&self) -> UART1_R { - UART1_R::new(((self.bits >> 5) & 0x01) != 0) - } - #[doc = "Bit 6 - Resetn of UART2"] - #[inline(always)] - pub fn uart2(&self) -> UART2_R { - UART2_R::new(((self.bits >> 6) & 0x01) != 0) - } - #[doc = "Bit 7 - Resetn of I2C0"] - #[inline(always)] - pub fn i2c0(&self) -> I2C0_R { - I2C0_R::new(((self.bits >> 7) & 0x01) != 0) - } - #[doc = "Bit 8 - Resetn of I2C1"] - #[inline(always)] - pub fn i2c1(&self) -> I2C1_R { - I2C1_R::new(((self.bits >> 8) & 0x01) != 0) - } - #[doc = "Bit 9 - Resetn of I2C2"] - #[inline(always)] - pub fn i2c2(&self) -> I2C2_R { - I2C2_R::new(((self.bits >> 9) & 0x01) != 0) - } - #[doc = "Bit 10 - Resetn of CAN0"] - #[inline(always)] - pub fn can0(&self) -> CAN0_R { - CAN0_R::new(((self.bits >> 10) & 0x01) != 0) - } - #[doc = "Bit 11 - Resetn of CAN1"] - #[inline(always)] - pub fn can1(&self) -> CAN1_R { - CAN1_R::new(((self.bits >> 11) & 0x01) != 0) - } - #[doc = "Bit 12 - Resetn of TRNG"] - #[inline(always)] - pub fn trng(&self) -> TRNG_R { - TRNG_R::new(((self.bits >> 12) & 0x01) != 0) - } - #[doc = "Bit 13 - Resetn of ADC"] - #[inline(always)] - pub fn adc(&self) -> ADC_R { - ADC_R::new(((self.bits >> 13) & 0x01) != 0) - } - #[doc = "Bit 14 - Resetn of DAC"] - #[inline(always)] - pub fn dac(&self) -> DAC_R { - DAC_R::new(((self.bits >> 14) & 0x01) != 0) - } - #[doc = "Bit 15 - Resetn of DMA"] - #[inline(always)] - pub fn dma(&self) -> DMA_R { - DMA_R::new(((self.bits >> 15) & 0x01) != 0) - } - #[doc = "Bit 16 - Resetn of EBI"] - #[inline(always)] - pub fn ebi(&self) -> EBI_R { - EBI_R::new(((self.bits >> 16) & 0x01) != 0) - } - #[doc = "Bit 17 - Resetn of Ethernet"] - #[inline(always)] - pub fn eth(&self) -> ETH_R { - ETH_R::new(((self.bits >> 17) & 0x01) != 0) - } - #[doc = "Bit 18 - Resetn of SpaceWire"] - #[inline(always)] - pub fn spw(&self) -> SPW_R { - SPW_R::new(((self.bits >> 18) & 0x01) != 0) - } - #[doc = "Bit 19 - RESETn of PLL in Clock Generation Module"] - #[inline(always)] - pub fn clkgen(&self) -> CLKGEN_R { - CLKGEN_R::new(((self.bits >> 19) & 0x01) != 0) - } - #[doc = "Bit 20 - Resetn of IRQ Router"] - #[inline(always)] - pub fn irq(&self) -> IRQ_R { - IRQ_R::new(((self.bits >> 20) & 0x01) != 0) - } - #[doc = "Bit 21 - Resetn of IO CONFIG"] - #[inline(always)] - pub fn ioconfig(&self) -> IOCONFIG_R { - IOCONFIG_R::new(((self.bits >> 21) & 0x01) != 0) - } - #[doc = "Bit 22 - Resetn of UTILITY peripheral"] - #[inline(always)] - pub fn utility(&self) -> UTILITY_R { - UTILITY_R::new(((self.bits >> 22) & 0x01) != 0) - } - #[doc = "Bit 23 - Resetn of WDOG"] - #[inline(always)] - pub fn wdog(&self) -> WDOG_R { - WDOG_R::new(((self.bits >> 23) & 0x01) != 0) - } - #[doc = "Bit 24 - Resetn of PORTA"] - #[inline(always)] - pub fn porta(&self) -> PORTA_R { - PORTA_R::new(((self.bits >> 24) & 0x01) != 0) - } - #[doc = "Bit 25 - Resetn of PORTB"] - #[inline(always)] - pub fn portb(&self) -> PORTB_R { - PORTB_R::new(((self.bits >> 25) & 0x01) != 0) - } - #[doc = "Bit 26 - Resetn of PORTC"] - #[inline(always)] - pub fn portc(&self) -> PORTC_R { - PORTC_R::new(((self.bits >> 26) & 0x01) != 0) - } - #[doc = "Bit 27 - Resetn of PORTD"] - #[inline(always)] - pub fn portd(&self) -> PORTD_R { - PORTD_R::new(((self.bits >> 27) & 0x01) != 0) - } - #[doc = "Bit 28 - Resetn of PORTE"] - #[inline(always)] - pub fn porte(&self) -> PORTE_R { - PORTE_R::new(((self.bits >> 28) & 0x01) != 0) - } - #[doc = "Bit 29 - Resetn of PORTF"] - #[inline(always)] - pub fn portf(&self) -> PORTF_R { - PORTF_R::new(((self.bits >> 29) & 0x01) != 0) - } - #[doc = "Bit 30 - Resetn of PORTG"] - #[inline(always)] - pub fn portg(&self) -> PORTG_R { - PORTG_R::new(((self.bits >> 30) & 0x01) != 0) - } -} -impl W { - #[doc = "Bit 0 - Resetn of SPI0"] - #[inline(always)] - pub fn spi0(&mut self) -> SPI0_W { - SPI0_W { w: self } - } - #[doc = "Bit 1 - Resetn of SPI1"] - #[inline(always)] - pub fn spi1(&mut self) -> SPI1_W { - SPI1_W { w: self } - } - #[doc = "Bit 2 - Resetn of SPI2"] - #[inline(always)] - pub fn spi2(&mut self) -> SPI2_W { - SPI2_W { w: self } - } - #[doc = "Bit 3 - Resetn of SPI3"] - #[inline(always)] - pub fn spi3(&mut self) -> SPI3_W { - SPI3_W { w: self } - } - #[doc = "Bit 4 - Resetn of UART0"] - #[inline(always)] - pub fn uart0(&mut self) -> UART0_W { - UART0_W { w: self } - } - #[doc = "Bit 5 - Resetn of UART1"] - #[inline(always)] - pub fn uart1(&mut self) -> UART1_W { - UART1_W { w: self } - } - #[doc = "Bit 6 - Resetn of UART2"] - #[inline(always)] - pub fn uart2(&mut self) -> UART2_W { - UART2_W { w: self } - } - #[doc = "Bit 7 - Resetn of I2C0"] - #[inline(always)] - pub fn i2c0(&mut self) -> I2C0_W { - I2C0_W { w: self } - } - #[doc = "Bit 8 - Resetn of I2C1"] - #[inline(always)] - pub fn i2c1(&mut self) -> I2C1_W { - I2C1_W { w: self } - } - #[doc = "Bit 9 - Resetn of I2C2"] - #[inline(always)] - pub fn i2c2(&mut self) -> I2C2_W { - I2C2_W { w: self } - } - #[doc = "Bit 10 - Resetn of CAN0"] - #[inline(always)] - pub fn can0(&mut self) -> CAN0_W { - CAN0_W { w: self } - } - #[doc = "Bit 11 - Resetn of CAN1"] - #[inline(always)] - pub fn can1(&mut self) -> CAN1_W { - CAN1_W { w: self } - } - #[doc = "Bit 12 - Resetn of TRNG"] - #[inline(always)] - pub fn trng(&mut self) -> TRNG_W { - TRNG_W { w: self } - } - #[doc = "Bit 13 - Resetn of ADC"] - #[inline(always)] - pub fn adc(&mut self) -> ADC_W { - ADC_W { w: self } - } - #[doc = "Bit 14 - Resetn of DAC"] - #[inline(always)] - pub fn dac(&mut self) -> DAC_W { - DAC_W { w: self } - } - #[doc = "Bit 15 - Resetn of DMA"] - #[inline(always)] - pub fn dma(&mut self) -> DMA_W { - DMA_W { w: self } - } - #[doc = "Bit 16 - Resetn of EBI"] - #[inline(always)] - pub fn ebi(&mut self) -> EBI_W { - EBI_W { w: self } - } - #[doc = "Bit 17 - Resetn of Ethernet"] - #[inline(always)] - pub fn eth(&mut self) -> ETH_W { - ETH_W { w: self } - } - #[doc = "Bit 18 - Resetn of SpaceWire"] - #[inline(always)] - pub fn spw(&mut self) -> SPW_W { - SPW_W { w: self } - } - #[doc = "Bit 19 - RESETn of PLL in Clock Generation Module"] - #[inline(always)] - pub fn clkgen(&mut self) -> CLKGEN_W { - CLKGEN_W { w: self } - } - #[doc = "Bit 20 - Resetn of IRQ Router"] - #[inline(always)] - pub fn irq(&mut self) -> IRQ_W { - IRQ_W { w: self } - } - #[doc = "Bit 21 - Resetn of IO CONFIG"] - #[inline(always)] - pub fn ioconfig(&mut self) -> IOCONFIG_W { - IOCONFIG_W { w: self } - } - #[doc = "Bit 22 - Resetn of UTILITY peripheral"] - #[inline(always)] - pub fn utility(&mut self) -> UTILITY_W { - UTILITY_W { w: self } - } - #[doc = "Bit 23 - Resetn of WDOG"] - #[inline(always)] - pub fn wdog(&mut self) -> WDOG_W { - WDOG_W { w: self } - } - #[doc = "Bit 24 - Resetn of PORTA"] - #[inline(always)] - pub fn porta(&mut self) -> PORTA_W { - PORTA_W { w: self } - } - #[doc = "Bit 25 - Resetn of PORTB"] - #[inline(always)] - pub fn portb(&mut self) -> PORTB_W { - PORTB_W { w: self } - } - #[doc = "Bit 26 - Resetn of PORTC"] - #[inline(always)] - pub fn portc(&mut self) -> PORTC_W { - PORTC_W { w: self } - } - #[doc = "Bit 27 - Resetn of PORTD"] - #[inline(always)] - pub fn portd(&mut self) -> PORTD_W { - PORTD_W { w: self } - } - #[doc = "Bit 28 - Resetn of PORTE"] - #[inline(always)] - pub fn porte(&mut self) -> PORTE_W { - PORTE_W { w: self } - } - #[doc = "Bit 29 - Resetn of PORTF"] - #[inline(always)] - pub fn portf(&mut self) -> PORTF_W { - PORTF_W { w: self } - } - #[doc = "Bit 30 - Resetn of PORTG"] - #[inline(always)] - pub fn portg(&mut self) -> PORTG_W { - PORTG_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "Peripheral Enable Control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [peripheral_clk_enable](index.html) module"] -pub struct PERIPHERAL_CLK_ENABLE_SPEC; -impl crate::RegisterSpec for PERIPHERAL_CLK_ENABLE_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [peripheral_clk_enable::R](R) reader structure"] -impl crate::Readable for PERIPHERAL_CLK_ENABLE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [peripheral_clk_enable::W](W) writer structure"] -impl crate::Writable for PERIPHERAL_CLK_ENABLE_SPEC { - type Writer = W; -} -#[doc = "`reset()` method sets PERIPHERAL_CLK_ENABLE to value 0x0088_0000"] -impl crate::Resettable for PERIPHERAL_CLK_ENABLE_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0x0088_0000 - } -} diff --git a/va416xx/src/sysconfig/peripheral_reset.rs b/va416xx/src/sysconfig/peripheral_reset.rs index 4ba3ac8..ae813cc 100644 --- a/va416xx/src/sysconfig/peripheral_reset.rs +++ b/va416xx/src/sysconfig/peripheral_reset.rs @@ -1,1523 +1,490 @@ #[doc = "Register `PERIPHERAL_RESET` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PERIPHERAL_RESET` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SPI0` reader - Resetn of SPI0"] -pub struct SPI0_R(crate::FieldReader); -impl SPI0_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - SPI0_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for SPI0_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Spi0R = crate::BitReader; #[doc = "Field `SPI0` writer - Resetn of SPI0"] -pub struct SPI0_W<'a> { - w: &'a mut W, -} -impl<'a> SPI0_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} +pub type Spi0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI1` reader - Resetn of SPI1"] -pub struct SPI1_R(crate::FieldReader); -impl SPI1_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - SPI1_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for SPI1_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Spi1R = crate::BitReader; #[doc = "Field `SPI1` writer - Resetn of SPI1"] -pub struct SPI1_W<'a> { - w: &'a mut W, -} -impl<'a> SPI1_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); - self.w - } -} +pub type Spi1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI2` reader - Resetn of SPI2"] -pub struct SPI2_R(crate::FieldReader); -impl SPI2_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - SPI2_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for SPI2_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Spi2R = crate::BitReader; #[doc = "Field `SPI2` writer - Resetn of SPI2"] -pub struct SPI2_W<'a> { - w: &'a mut W, -} -impl<'a> SPI2_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); - self.w - } -} +pub type Spi2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPI3` reader - Resetn of SPI3"] -pub struct SPI3_R(crate::FieldReader); -impl SPI3_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - SPI3_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for SPI3_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Spi3R = crate::BitReader; #[doc = "Field `SPI3` writer - Resetn of SPI3"] -pub struct SPI3_W<'a> { - w: &'a mut W, -} -impl<'a> SPI3_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); - self.w - } -} +pub type Spi3W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `UART0` reader - Resetn of UART0"] -pub struct UART0_R(crate::FieldReader); -impl UART0_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - UART0_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for UART0_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Uart0R = crate::BitReader; #[doc = "Field `UART0` writer - Resetn of UART0"] -pub struct UART0_W<'a> { - w: &'a mut W, -} -impl<'a> UART0_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); - self.w - } -} +pub type Uart0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `UART1` reader - Resetn of UART1"] -pub struct UART1_R(crate::FieldReader); -impl UART1_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - UART1_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for UART1_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Uart1R = crate::BitReader; #[doc = "Field `UART1` writer - Resetn of UART1"] -pub struct UART1_W<'a> { - w: &'a mut W, -} -impl<'a> UART1_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); - self.w - } -} +pub type Uart1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `UART2` reader - Resetn of UART2"] -pub struct UART2_R(crate::FieldReader); -impl UART2_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - UART2_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for UART2_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Uart2R = crate::BitReader; #[doc = "Field `UART2` writer - Resetn of UART2"] -pub struct UART2_W<'a> { - w: &'a mut W, -} -impl<'a> UART2_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); - self.w - } -} +pub type Uart2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `I2C0` reader - Resetn of I2C0"] -pub struct I2C0_R(crate::FieldReader); -impl I2C0_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - I2C0_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for I2C0_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type I2c0R = crate::BitReader; #[doc = "Field `I2C0` writer - Resetn of I2C0"] -pub struct I2C0_W<'a> { - w: &'a mut W, -} -impl<'a> I2C0_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); - self.w - } -} +pub type I2c0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `I2C1` reader - Resetn of I2C1"] -pub struct I2C1_R(crate::FieldReader); -impl I2C1_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - I2C1_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for I2C1_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type I2c1R = crate::BitReader; #[doc = "Field `I2C1` writer - Resetn of I2C1"] -pub struct I2C1_W<'a> { - w: &'a mut W, -} -impl<'a> I2C1_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); - self.w - } -} +pub type I2c1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `I2C2` reader - Resetn of I2C2"] -pub struct I2C2_R(crate::FieldReader); -impl I2C2_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - I2C2_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for I2C2_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type I2c2R = crate::BitReader; #[doc = "Field `I2C2` writer - Resetn of I2C2"] -pub struct I2C2_W<'a> { - w: &'a mut W, -} -impl<'a> I2C2_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); - self.w - } -} +pub type I2c2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CAN0` reader - Resetn of CAN0"] -pub struct CAN0_R(crate::FieldReader); -impl CAN0_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CAN0_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CAN0_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Can0R = crate::BitReader; #[doc = "Field `CAN0` writer - Resetn of CAN0"] -pub struct CAN0_W<'a> { - w: &'a mut W, -} -impl<'a> CAN0_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); - self.w - } -} +pub type Can0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CAN1` reader - Resetn of CAN1"] -pub struct CAN1_R(crate::FieldReader); -impl CAN1_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CAN1_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CAN1_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Can1R = crate::BitReader; #[doc = "Field `CAN1` writer - Resetn of CAN1"] -pub struct CAN1_W<'a> { - w: &'a mut W, -} -impl<'a> CAN1_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); - self.w - } -} +pub type Can1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TRNG` reader - Resetn of TRNG"] -pub struct TRNG_R(crate::FieldReader); -impl TRNG_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TRNG_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TRNG_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type TrngR = crate::BitReader; #[doc = "Field `TRNG` writer - Resetn of TRNG"] -pub struct TRNG_W<'a> { - w: &'a mut W, -} -impl<'a> TRNG_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); - self.w - } -} +pub type TrngW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ADC` reader - Resetn of ADC"] -pub struct ADC_R(crate::FieldReader); -impl ADC_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - ADC_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ADC_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type AdcR = crate::BitReader; #[doc = "Field `ADC` writer - Resetn of ADC"] -pub struct ADC_W<'a> { - w: &'a mut W, -} -impl<'a> ADC_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); - self.w - } -} +pub type AdcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DAC` reader - Resetn of DAC"] -pub struct DAC_R(crate::FieldReader); -impl DAC_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - DAC_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for DAC_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type DacR = crate::BitReader; #[doc = "Field `DAC` writer - Resetn of DAC"] -pub struct DAC_W<'a> { - w: &'a mut W, -} -impl<'a> DAC_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); - self.w - } -} +pub type DacW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DMA` reader - Resetn of DMA"] -pub struct DMA_R(crate::FieldReader); -impl DMA_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - DMA_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for DMA_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type DmaR = crate::BitReader; #[doc = "Field `DMA` writer - Resetn of DMA"] -pub struct DMA_W<'a> { - w: &'a mut W, -} -impl<'a> DMA_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); - self.w - } -} +pub type DmaW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EBI` reader - Resetn of EBI"] -pub struct EBI_R(crate::FieldReader); -impl EBI_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - EBI_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for EBI_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type EbiR = crate::BitReader; #[doc = "Field `EBI` writer - Resetn of EBI"] -pub struct EBI_W<'a> { - w: &'a mut W, -} -impl<'a> EBI_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16); - self.w - } -} +pub type EbiW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ETH` reader - Resetn of Ethernet"] -pub struct ETH_R(crate::FieldReader); -impl ETH_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - ETH_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ETH_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type EthR = crate::BitReader; #[doc = "Field `ETH` writer - Resetn of Ethernet"] -pub struct ETH_W<'a> { - w: &'a mut W, -} -impl<'a> ETH_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 17)) | ((value as u32 & 0x01) << 17); - self.w - } -} +pub type EthW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPW` reader - Resetn of SpaceWire"] -pub struct SPW_R(crate::FieldReader); -impl SPW_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - SPW_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for SPW_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type SpwR = crate::BitReader; #[doc = "Field `SPW` writer - Resetn of SpaceWire"] -pub struct SPW_W<'a> { - w: &'a mut W, -} -impl<'a> SPW_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 18)) | ((value as u32 & 0x01) << 18); - self.w - } -} +pub type SpwW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CLKGEN` reader - RESETn of PLL in Clock Generation Module"] -pub struct CLKGEN_R(crate::FieldReader); -impl CLKGEN_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CLKGEN_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CLKGEN_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type ClkgenR = crate::BitReader; #[doc = "Field `CLKGEN` writer - RESETn of PLL in Clock Generation Module"] -pub struct CLKGEN_W<'a> { - w: &'a mut W, -} -impl<'a> CLKGEN_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 19)) | ((value as u32 & 0x01) << 19); - self.w - } -} +pub type ClkgenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `IRQ` reader - Resetn of IRQ Router"] -pub struct IRQ_R(crate::FieldReader); -impl IRQ_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - IRQ_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for IRQ_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type IrqR = crate::BitReader; #[doc = "Field `IRQ` writer - Resetn of IRQ Router"] -pub struct IRQ_W<'a> { - w: &'a mut W, -} -impl<'a> IRQ_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 20)) | ((value as u32 & 0x01) << 20); - self.w - } -} +pub type IrqW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `IOCONFIG` reader - Resetn of IO CONFIG"] -pub struct IOCONFIG_R(crate::FieldReader); -impl IOCONFIG_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - IOCONFIG_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for IOCONFIG_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type IoconfigR = crate::BitReader; #[doc = "Field `IOCONFIG` writer - Resetn of IO CONFIG"] -pub struct IOCONFIG_W<'a> { - w: &'a mut W, -} -impl<'a> IOCONFIG_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 21)) | ((value as u32 & 0x01) << 21); - self.w - } -} +pub type IoconfigW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `UTILITY` reader - Resetn of UTILITY peripheral"] -pub struct UTILITY_R(crate::FieldReader); -impl UTILITY_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - UTILITY_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for UTILITY_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type UtilityR = crate::BitReader; #[doc = "Field `UTILITY` writer - Resetn of UTILITY peripheral"] -pub struct UTILITY_W<'a> { - w: &'a mut W, -} -impl<'a> UTILITY_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 22)) | ((value as u32 & 0x01) << 22); - self.w - } -} +pub type UtilityW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WDOG` reader - Resetn of WDOG"] -pub struct WDOG_R(crate::FieldReader); -impl WDOG_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - WDOG_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for WDOG_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type WdogR = crate::BitReader; #[doc = "Field `WDOG` writer - Resetn of WDOG"] -pub struct WDOG_W<'a> { - w: &'a mut W, -} -impl<'a> WDOG_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 23)) | ((value as u32 & 0x01) << 23); - self.w - } -} +pub type WdogW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PORTA` reader - Resetn of PORTA"] -pub struct PORTA_R(crate::FieldReader); -impl PORTA_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - PORTA_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PORTA_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type PortaR = crate::BitReader; #[doc = "Field `PORTA` writer - Resetn of PORTA"] -pub struct PORTA_W<'a> { - w: &'a mut W, -} -impl<'a> PORTA_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 24)) | ((value as u32 & 0x01) << 24); - self.w - } -} +pub type PortaW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PORTB` reader - Resetn of PORTB"] -pub struct PORTB_R(crate::FieldReader); -impl PORTB_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - PORTB_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PORTB_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type PortbR = crate::BitReader; #[doc = "Field `PORTB` writer - Resetn of PORTB"] -pub struct PORTB_W<'a> { - w: &'a mut W, -} -impl<'a> PORTB_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 25)) | ((value as u32 & 0x01) << 25); - self.w - } -} +pub type PortbW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PORTC` reader - Resetn of PORTC"] -pub struct PORTC_R(crate::FieldReader); -impl PORTC_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - PORTC_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PORTC_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type PortcR = crate::BitReader; #[doc = "Field `PORTC` writer - Resetn of PORTC"] -pub struct PORTC_W<'a> { - w: &'a mut W, -} -impl<'a> PORTC_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 26)) | ((value as u32 & 0x01) << 26); - self.w - } -} +pub type PortcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PORTD` reader - Resetn of PORTD"] -pub struct PORTD_R(crate::FieldReader); -impl PORTD_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - PORTD_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PORTD_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type PortdR = crate::BitReader; #[doc = "Field `PORTD` writer - Resetn of PORTD"] -pub struct PORTD_W<'a> { - w: &'a mut W, -} -impl<'a> PORTD_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 27)) | ((value as u32 & 0x01) << 27); - self.w - } -} +pub type PortdW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PORTE` reader - Resetn of PORTE"] -pub struct PORTE_R(crate::FieldReader); -impl PORTE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - PORTE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PORTE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type PorteR = crate::BitReader; #[doc = "Field `PORTE` writer - Resetn of PORTE"] -pub struct PORTE_W<'a> { - w: &'a mut W, -} -impl<'a> PORTE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 28)) | ((value as u32 & 0x01) << 28); - self.w - } -} +pub type PorteW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PORTF` reader - Resetn of PORTF"] -pub struct PORTF_R(crate::FieldReader); -impl PORTF_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - PORTF_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PORTF_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type PortfR = crate::BitReader; #[doc = "Field `PORTF` writer - Resetn of PORTF"] -pub struct PORTF_W<'a> { - w: &'a mut W, -} -impl<'a> PORTF_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 29)) | ((value as u32 & 0x01) << 29); - self.w - } -} +pub type PortfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PORTG` reader - Resetn of PORTG"] -pub struct PORTG_R(crate::FieldReader); -impl PORTG_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - PORTG_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PORTG_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type PortgR = crate::BitReader; #[doc = "Field `PORTG` writer - Resetn of PORTG"] -pub struct PORTG_W<'a> { - w: &'a mut W, -} -impl<'a> PORTG_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 30)) | ((value as u32 & 0x01) << 30); - self.w - } -} +pub type PortgW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Resetn of SPI0"] #[inline(always)] - pub fn spi0(&self) -> SPI0_R { - SPI0_R::new((self.bits & 0x01) != 0) + pub fn spi0(&self) -> Spi0R { + Spi0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Resetn of SPI1"] #[inline(always)] - pub fn spi1(&self) -> SPI1_R { - SPI1_R::new(((self.bits >> 1) & 0x01) != 0) + pub fn spi1(&self) -> Spi1R { + Spi1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Resetn of SPI2"] #[inline(always)] - pub fn spi2(&self) -> SPI2_R { - SPI2_R::new(((self.bits >> 2) & 0x01) != 0) + pub fn spi2(&self) -> Spi2R { + Spi2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Resetn of SPI3"] #[inline(always)] - pub fn spi3(&self) -> SPI3_R { - SPI3_R::new(((self.bits >> 3) & 0x01) != 0) + pub fn spi3(&self) -> Spi3R { + Spi3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Resetn of UART0"] #[inline(always)] - pub fn uart0(&self) -> UART0_R { - UART0_R::new(((self.bits >> 4) & 0x01) != 0) + pub fn uart0(&self) -> Uart0R { + Uart0R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Resetn of UART1"] #[inline(always)] - pub fn uart1(&self) -> UART1_R { - UART1_R::new(((self.bits >> 5) & 0x01) != 0) + pub fn uart1(&self) -> Uart1R { + Uart1R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Resetn of UART2"] #[inline(always)] - pub fn uart2(&self) -> UART2_R { - UART2_R::new(((self.bits >> 6) & 0x01) != 0) + pub fn uart2(&self) -> Uart2R { + Uart2R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Resetn of I2C0"] #[inline(always)] - pub fn i2c0(&self) -> I2C0_R { - I2C0_R::new(((self.bits >> 7) & 0x01) != 0) + pub fn i2c0(&self) -> I2c0R { + I2c0R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Resetn of I2C1"] #[inline(always)] - pub fn i2c1(&self) -> I2C1_R { - I2C1_R::new(((self.bits >> 8) & 0x01) != 0) + pub fn i2c1(&self) -> I2c1R { + I2c1R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Resetn of I2C2"] #[inline(always)] - pub fn i2c2(&self) -> I2C2_R { - I2C2_R::new(((self.bits >> 9) & 0x01) != 0) + pub fn i2c2(&self) -> I2c2R { + I2c2R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Resetn of CAN0"] #[inline(always)] - pub fn can0(&self) -> CAN0_R { - CAN0_R::new(((self.bits >> 10) & 0x01) != 0) + pub fn can0(&self) -> Can0R { + Can0R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Resetn of CAN1"] #[inline(always)] - pub fn can1(&self) -> CAN1_R { - CAN1_R::new(((self.bits >> 11) & 0x01) != 0) + pub fn can1(&self) -> Can1R { + Can1R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Resetn of TRNG"] #[inline(always)] - pub fn trng(&self) -> TRNG_R { - TRNG_R::new(((self.bits >> 12) & 0x01) != 0) + pub fn trng(&self) -> TrngR { + TrngR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Resetn of ADC"] #[inline(always)] - pub fn adc(&self) -> ADC_R { - ADC_R::new(((self.bits >> 13) & 0x01) != 0) + pub fn adc(&self) -> AdcR { + AdcR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Resetn of DAC"] #[inline(always)] - pub fn dac(&self) -> DAC_R { - DAC_R::new(((self.bits >> 14) & 0x01) != 0) + pub fn dac(&self) -> DacR { + DacR::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Resetn of DMA"] #[inline(always)] - pub fn dma(&self) -> DMA_R { - DMA_R::new(((self.bits >> 15) & 0x01) != 0) + pub fn dma(&self) -> DmaR { + DmaR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - Resetn of EBI"] #[inline(always)] - pub fn ebi(&self) -> EBI_R { - EBI_R::new(((self.bits >> 16) & 0x01) != 0) + pub fn ebi(&self) -> EbiR { + EbiR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Resetn of Ethernet"] #[inline(always)] - pub fn eth(&self) -> ETH_R { - ETH_R::new(((self.bits >> 17) & 0x01) != 0) + pub fn eth(&self) -> EthR { + EthR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Resetn of SpaceWire"] #[inline(always)] - pub fn spw(&self) -> SPW_R { - SPW_R::new(((self.bits >> 18) & 0x01) != 0) + pub fn spw(&self) -> SpwR { + SpwR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - RESETn of PLL in Clock Generation Module"] #[inline(always)] - pub fn clkgen(&self) -> CLKGEN_R { - CLKGEN_R::new(((self.bits >> 19) & 0x01) != 0) + pub fn clkgen(&self) -> ClkgenR { + ClkgenR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - Resetn of IRQ Router"] #[inline(always)] - pub fn irq(&self) -> IRQ_R { - IRQ_R::new(((self.bits >> 20) & 0x01) != 0) + pub fn irq(&self) -> IrqR { + IrqR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Resetn of IO CONFIG"] #[inline(always)] - pub fn ioconfig(&self) -> IOCONFIG_R { - IOCONFIG_R::new(((self.bits >> 21) & 0x01) != 0) + pub fn ioconfig(&self) -> IoconfigR { + IoconfigR::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - Resetn of UTILITY peripheral"] #[inline(always)] - pub fn utility(&self) -> UTILITY_R { - UTILITY_R::new(((self.bits >> 22) & 0x01) != 0) + pub fn utility(&self) -> UtilityR { + UtilityR::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - Resetn of WDOG"] #[inline(always)] - pub fn wdog(&self) -> WDOG_R { - WDOG_R::new(((self.bits >> 23) & 0x01) != 0) + pub fn wdog(&self) -> WdogR { + WdogR::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bit 24 - Resetn of PORTA"] #[inline(always)] - pub fn porta(&self) -> PORTA_R { - PORTA_R::new(((self.bits >> 24) & 0x01) != 0) + pub fn porta(&self) -> PortaR { + PortaR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - Resetn of PORTB"] #[inline(always)] - pub fn portb(&self) -> PORTB_R { - PORTB_R::new(((self.bits >> 25) & 0x01) != 0) + pub fn portb(&self) -> PortbR { + PortbR::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - Resetn of PORTC"] #[inline(always)] - pub fn portc(&self) -> PORTC_R { - PORTC_R::new(((self.bits >> 26) & 0x01) != 0) + pub fn portc(&self) -> PortcR { + PortcR::new(((self.bits >> 26) & 1) != 0) } #[doc = "Bit 27 - Resetn of PORTD"] #[inline(always)] - pub fn portd(&self) -> PORTD_R { - PORTD_R::new(((self.bits >> 27) & 0x01) != 0) + pub fn portd(&self) -> PortdR { + PortdR::new(((self.bits >> 27) & 1) != 0) } #[doc = "Bit 28 - Resetn of PORTE"] #[inline(always)] - pub fn porte(&self) -> PORTE_R { - PORTE_R::new(((self.bits >> 28) & 0x01) != 0) + pub fn porte(&self) -> PorteR { + PorteR::new(((self.bits >> 28) & 1) != 0) } #[doc = "Bit 29 - Resetn of PORTF"] #[inline(always)] - pub fn portf(&self) -> PORTF_R { - PORTF_R::new(((self.bits >> 29) & 0x01) != 0) + pub fn portf(&self) -> PortfR { + PortfR::new(((self.bits >> 29) & 1) != 0) } #[doc = "Bit 30 - Resetn of PORTG"] #[inline(always)] - pub fn portg(&self) -> PORTG_R { - PORTG_R::new(((self.bits >> 30) & 0x01) != 0) + pub fn portg(&self) -> PortgR { + PortgR::new(((self.bits >> 30) & 1) != 0) } } impl W { #[doc = "Bit 0 - Resetn of SPI0"] #[inline(always)] - pub fn spi0(&mut self) -> SPI0_W { - SPI0_W { w: self } + #[must_use] + pub fn spi0(&mut self) -> Spi0W { + Spi0W::new(self, 0) } #[doc = "Bit 1 - Resetn of SPI1"] #[inline(always)] - pub fn spi1(&mut self) -> SPI1_W { - SPI1_W { w: self } + #[must_use] + pub fn spi1(&mut self) -> Spi1W { + Spi1W::new(self, 1) } #[doc = "Bit 2 - Resetn of SPI2"] #[inline(always)] - pub fn spi2(&mut self) -> SPI2_W { - SPI2_W { w: self } + #[must_use] + pub fn spi2(&mut self) -> Spi2W { + Spi2W::new(self, 2) } #[doc = "Bit 3 - Resetn of SPI3"] #[inline(always)] - pub fn spi3(&mut self) -> SPI3_W { - SPI3_W { w: self } + #[must_use] + pub fn spi3(&mut self) -> Spi3W { + Spi3W::new(self, 3) } #[doc = "Bit 4 - Resetn of UART0"] #[inline(always)] - pub fn uart0(&mut self) -> UART0_W { - UART0_W { w: self } + #[must_use] + pub fn uart0(&mut self) -> Uart0W { + Uart0W::new(self, 4) } #[doc = "Bit 5 - Resetn of UART1"] #[inline(always)] - pub fn uart1(&mut self) -> UART1_W { - UART1_W { w: self } + #[must_use] + pub fn uart1(&mut self) -> Uart1W { + Uart1W::new(self, 5) } #[doc = "Bit 6 - Resetn of UART2"] #[inline(always)] - pub fn uart2(&mut self) -> UART2_W { - UART2_W { w: self } + #[must_use] + pub fn uart2(&mut self) -> Uart2W { + Uart2W::new(self, 6) } #[doc = "Bit 7 - Resetn of I2C0"] #[inline(always)] - pub fn i2c0(&mut self) -> I2C0_W { - I2C0_W { w: self } + #[must_use] + pub fn i2c0(&mut self) -> I2c0W { + I2c0W::new(self, 7) } #[doc = "Bit 8 - Resetn of I2C1"] #[inline(always)] - pub fn i2c1(&mut self) -> I2C1_W { - I2C1_W { w: self } + #[must_use] + pub fn i2c1(&mut self) -> I2c1W { + I2c1W::new(self, 8) } #[doc = "Bit 9 - Resetn of I2C2"] #[inline(always)] - pub fn i2c2(&mut self) -> I2C2_W { - I2C2_W { w: self } + #[must_use] + pub fn i2c2(&mut self) -> I2c2W { + I2c2W::new(self, 9) } #[doc = "Bit 10 - Resetn of CAN0"] #[inline(always)] - pub fn can0(&mut self) -> CAN0_W { - CAN0_W { w: self } + #[must_use] + pub fn can0(&mut self) -> Can0W { + Can0W::new(self, 10) } #[doc = "Bit 11 - Resetn of CAN1"] #[inline(always)] - pub fn can1(&mut self) -> CAN1_W { - CAN1_W { w: self } + #[must_use] + pub fn can1(&mut self) -> Can1W { + Can1W::new(self, 11) } #[doc = "Bit 12 - Resetn of TRNG"] #[inline(always)] - pub fn trng(&mut self) -> TRNG_W { - TRNG_W { w: self } + #[must_use] + pub fn trng(&mut self) -> TrngW { + TrngW::new(self, 12) } #[doc = "Bit 13 - Resetn of ADC"] #[inline(always)] - pub fn adc(&mut self) -> ADC_W { - ADC_W { w: self } + #[must_use] + pub fn adc(&mut self) -> AdcW { + AdcW::new(self, 13) } #[doc = "Bit 14 - Resetn of DAC"] #[inline(always)] - pub fn dac(&mut self) -> DAC_W { - DAC_W { w: self } + #[must_use] + pub fn dac(&mut self) -> DacW { + DacW::new(self, 14) } #[doc = "Bit 15 - Resetn of DMA"] #[inline(always)] - pub fn dma(&mut self) -> DMA_W { - DMA_W { w: self } + #[must_use] + pub fn dma(&mut self) -> DmaW { + DmaW::new(self, 15) } #[doc = "Bit 16 - Resetn of EBI"] #[inline(always)] - pub fn ebi(&mut self) -> EBI_W { - EBI_W { w: self } + #[must_use] + pub fn ebi(&mut self) -> EbiW { + EbiW::new(self, 16) } #[doc = "Bit 17 - Resetn of Ethernet"] #[inline(always)] - pub fn eth(&mut self) -> ETH_W { - ETH_W { w: self } + #[must_use] + pub fn eth(&mut self) -> EthW { + EthW::new(self, 17) } #[doc = "Bit 18 - Resetn of SpaceWire"] #[inline(always)] - pub fn spw(&mut self) -> SPW_W { - SPW_W { w: self } + #[must_use] + pub fn spw(&mut self) -> SpwW { + SpwW::new(self, 18) } #[doc = "Bit 19 - RESETn of PLL in Clock Generation Module"] #[inline(always)] - pub fn clkgen(&mut self) -> CLKGEN_W { - CLKGEN_W { w: self } + #[must_use] + pub fn clkgen(&mut self) -> ClkgenW { + ClkgenW::new(self, 19) } #[doc = "Bit 20 - Resetn of IRQ Router"] #[inline(always)] - pub fn irq(&mut self) -> IRQ_W { - IRQ_W { w: self } + #[must_use] + pub fn irq(&mut self) -> IrqW { + IrqW::new(self, 20) } #[doc = "Bit 21 - Resetn of IO CONFIG"] #[inline(always)] - pub fn ioconfig(&mut self) -> IOCONFIG_W { - IOCONFIG_W { w: self } + #[must_use] + pub fn ioconfig(&mut self) -> IoconfigW { + IoconfigW::new(self, 21) } #[doc = "Bit 22 - Resetn of UTILITY peripheral"] #[inline(always)] - pub fn utility(&mut self) -> UTILITY_W { - UTILITY_W { w: self } + #[must_use] + pub fn utility(&mut self) -> UtilityW { + UtilityW::new(self, 22) } #[doc = "Bit 23 - Resetn of WDOG"] #[inline(always)] - pub fn wdog(&mut self) -> WDOG_W { - WDOG_W { w: self } + #[must_use] + pub fn wdog(&mut self) -> WdogW { + WdogW::new(self, 23) } #[doc = "Bit 24 - Resetn of PORTA"] #[inline(always)] - pub fn porta(&mut self) -> PORTA_W { - PORTA_W { w: self } + #[must_use] + pub fn porta(&mut self) -> PortaW { + PortaW::new(self, 24) } #[doc = "Bit 25 - Resetn of PORTB"] #[inline(always)] - pub fn portb(&mut self) -> PORTB_W { - PORTB_W { w: self } + #[must_use] + pub fn portb(&mut self) -> PortbW { + PortbW::new(self, 25) } #[doc = "Bit 26 - Resetn of PORTC"] #[inline(always)] - pub fn portc(&mut self) -> PORTC_W { - PORTC_W { w: self } + #[must_use] + pub fn portc(&mut self) -> PortcW { + PortcW::new(self, 26) } #[doc = "Bit 27 - Resetn of PORTD"] #[inline(always)] - pub fn portd(&mut self) -> PORTD_W { - PORTD_W { w: self } + #[must_use] + pub fn portd(&mut self) -> PortdW { + PortdW::new(self, 27) } #[doc = "Bit 28 - Resetn of PORTE"] #[inline(always)] - pub fn porte(&mut self) -> PORTE_W { - PORTE_W { w: self } + #[must_use] + pub fn porte(&mut self) -> PorteW { + PorteW::new(self, 28) } #[doc = "Bit 29 - Resetn of PORTF"] #[inline(always)] - pub fn portf(&mut self) -> PORTF_W { - PORTF_W { w: self } + #[must_use] + pub fn portf(&mut self) -> PortfW { + PortfW::new(self, 29) } #[doc = "Bit 30 - Resetn of PORTG"] #[inline(always)] - pub fn portg(&mut self) -> PORTG_W { - PORTG_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn portg(&mut self) -> PortgW { + PortgW::new(self, 30) } } -#[doc = "Peripheral Reset Control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [peripheral_reset](index.html) module"] -pub struct PERIPHERAL_RESET_SPEC; -impl crate::RegisterSpec for PERIPHERAL_RESET_SPEC { +#[doc = "Peripheral Reset Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`peripheral_reset::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`peripheral_reset::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PeripheralResetSpec; +impl crate::RegisterSpec for PeripheralResetSpec { type Ux = u32; } -#[doc = "`read()` method returns [peripheral_reset::R](R) reader structure"] -impl crate::Readable for PERIPHERAL_RESET_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [peripheral_reset::W](W) writer structure"] -impl crate::Writable for PERIPHERAL_RESET_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`peripheral_reset::R`](R) reader structure"] +impl crate::Readable for PeripheralResetSpec {} +#[doc = "`write(|w| ..)` method takes [`peripheral_reset::W`](W) writer structure"] +impl crate::Writable for PeripheralResetSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PERIPHERAL_RESET to value 0x7f7b_efff"] -impl crate::Resettable for PERIPHERAL_RESET_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0x7f7b_efff - } +impl crate::Resettable for PeripheralResetSpec { + const RESET_VALUE: u32 = 0x7f7b_efff; } diff --git a/va416xx/src/sysconfig/pmu_ctrl.rs b/va416xx/src/sysconfig/pmu_ctrl.rs index 1dae155..6fae35d 100644 --- a/va416xx/src/sysconfig/pmu_ctrl.rs +++ b/va416xx/src/sysconfig/pmu_ctrl.rs @@ -1,103 +1,40 @@ #[doc = "Register `PMU_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PMU_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `LVL_SLCT` reader - Select the POK detect level"] -pub struct LVL_SLCT_R(crate::FieldReader); -impl LVL_SLCT_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - LVL_SLCT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for LVL_SLCT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type LvlSlctR = crate::FieldReader; #[doc = "Field `LVL_SLCT` writer - Select the POK detect level"] -pub struct LVL_SLCT_W<'a> { - w: &'a mut W, -} -impl<'a> LVL_SLCT_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0x03) | (value as u32 & 0x03); - self.w - } -} +pub type LvlSlctW<'a, REG> = crate::FieldWriter<'a, REG, 2>; impl R { #[doc = "Bits 0:1 - Select the POK detect level"] #[inline(always)] - pub fn lvl_slct(&self) -> LVL_SLCT_R { - LVL_SLCT_R::new((self.bits & 0x03) as u8) + pub fn lvl_slct(&self) -> LvlSlctR { + LvlSlctR::new((self.bits & 3) as u8) } } impl W { #[doc = "Bits 0:1 - Select the POK detect level"] #[inline(always)] - pub fn lvl_slct(&mut self) -> LVL_SLCT_W { - LVL_SLCT_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn lvl_slct(&mut self) -> LvlSlctW { + LvlSlctW::new(self, 0) } } -#[doc = "PMU Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pmu_ctrl](index.html) module"] -pub struct PMU_CTRL_SPEC; -impl crate::RegisterSpec for PMU_CTRL_SPEC { +#[doc = "PMU Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pmu_ctrl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pmu_ctrl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PmuCtrlSpec; +impl crate::RegisterSpec for PmuCtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [pmu_ctrl::R](R) reader structure"] -impl crate::Readable for PMU_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [pmu_ctrl::W](W) writer structure"] -impl crate::Writable for PMU_CTRL_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`pmu_ctrl::R`](R) reader structure"] +impl crate::Readable for PmuCtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`pmu_ctrl::W`](W) writer structure"] +impl crate::Writable for PmuCtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PMU_CTRL to value 0"] -impl crate::Resettable for PMU_CTRL_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for PmuCtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/sysconfig/procid.rs b/va416xx/src/sysconfig/procid.rs index b72b68c..ae1cf1b 100644 --- a/va416xx/src/sysconfig/procid.rs +++ b/va416xx/src/sysconfig/procid.rs @@ -1,31 +1,18 @@ #[doc = "Register `PROCID` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 +pub type R = crate::R; +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) } } -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Processor ID Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [procid](index.html) module"] -pub struct PROCID_SPEC; -impl crate::RegisterSpec for PROCID_SPEC { +#[doc = "Processor ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`procid::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ProcidSpec; +impl crate::RegisterSpec for ProcidSpec { type Ux = u32; } -#[doc = "`read()` method returns [procid::R](R) reader structure"] -impl crate::Readable for PROCID_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`procid::R`](R) reader structure"] +impl crate::Readable for ProcidSpec {} #[doc = "`reset()` method sets PROCID to value 0x0400_57e3"] -impl crate::Resettable for PROCID_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0x0400_57e3 - } +impl crate::Resettable for ProcidSpec { + const RESET_VALUE: u32 = 0x0400_57e3; } diff --git a/va416xx/src/sysconfig/ram0_mbe.rs b/va416xx/src/sysconfig/ram0_mbe.rs index 689a280..d6d6207 100644 --- a/va416xx/src/sysconfig/ram0_mbe.rs +++ b/va416xx/src/sysconfig/ram0_mbe.rs @@ -1,103 +1,40 @@ #[doc = "Register `RAM0_MBE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RAM0_MBE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `COUNT` reader - RAM0 Multi Bit Errors"] -pub struct COUNT_R(crate::FieldReader); -impl COUNT_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - COUNT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for COUNT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type CountR = crate::FieldReader; #[doc = "Field `COUNT` writer - RAM0 Multi Bit Errors"] -pub struct COUNT_W<'a> { - w: &'a mut W, -} -impl<'a> COUNT_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); - self.w - } -} +pub type CountW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - RAM0 Multi Bit Errors"] #[inline(always)] - pub fn count(&self) -> COUNT_R { - COUNT_R::new((self.bits & 0xffff) as u16) + pub fn count(&self) -> CountR { + CountR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - RAM0 Multi Bit Errors"] #[inline(always)] - pub fn count(&mut self) -> COUNT_W { - COUNT_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn count(&mut self) -> CountW { + CountW::new(self, 0) } } -#[doc = "Count of RAM0 EDAC Multi Bit Errors\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ram0_mbe](index.html) module"] -pub struct RAM0_MBE_SPEC; -impl crate::RegisterSpec for RAM0_MBE_SPEC { +#[doc = "Count of RAM0 EDAC Multi Bit Errors\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ram0_mbe::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ram0_mbe::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ram0MbeSpec; +impl crate::RegisterSpec for Ram0MbeSpec { type Ux = u32; } -#[doc = "`read()` method returns [ram0_mbe::R](R) reader structure"] -impl crate::Readable for RAM0_MBE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ram0_mbe::W](W) writer structure"] -impl crate::Writable for RAM0_MBE_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`ram0_mbe::R`](R) reader structure"] +impl crate::Readable for Ram0MbeSpec {} +#[doc = "`write(|w| ..)` method takes [`ram0_mbe::W`](W) writer structure"] +impl crate::Writable for Ram0MbeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RAM0_MBE to value 0"] -impl crate::Resettable for RAM0_MBE_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Ram0MbeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/sysconfig/ram0_sbe.rs b/va416xx/src/sysconfig/ram0_sbe.rs index 50f9c54..c84d091 100644 --- a/va416xx/src/sysconfig/ram0_sbe.rs +++ b/va416xx/src/sysconfig/ram0_sbe.rs @@ -1,103 +1,40 @@ #[doc = "Register `RAM0_SBE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RAM0_SBE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `COUNT` reader - RAM0 EDAC Single Bit Errors"] -pub struct COUNT_R(crate::FieldReader); -impl COUNT_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - COUNT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for COUNT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type CountR = crate::FieldReader; #[doc = "Field `COUNT` writer - RAM0 EDAC Single Bit Errors"] -pub struct COUNT_W<'a> { - w: &'a mut W, -} -impl<'a> COUNT_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); - self.w - } -} +pub type CountW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - RAM0 EDAC Single Bit Errors"] #[inline(always)] - pub fn count(&self) -> COUNT_R { - COUNT_R::new((self.bits & 0xffff) as u16) + pub fn count(&self) -> CountR { + CountR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - RAM0 EDAC Single Bit Errors"] #[inline(always)] - pub fn count(&mut self) -> COUNT_W { - COUNT_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn count(&mut self) -> CountW { + CountW::new(self, 0) } } -#[doc = "Count of RAM0 EDAC Single Bit Errors\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ram0_sbe](index.html) module"] -pub struct RAM0_SBE_SPEC; -impl crate::RegisterSpec for RAM0_SBE_SPEC { +#[doc = "Count of RAM0 EDAC Single Bit Errors\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ram0_sbe::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ram0_sbe::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ram0SbeSpec; +impl crate::RegisterSpec for Ram0SbeSpec { type Ux = u32; } -#[doc = "`read()` method returns [ram0_sbe::R](R) reader structure"] -impl crate::Readable for RAM0_SBE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ram0_sbe::W](W) writer structure"] -impl crate::Writable for RAM0_SBE_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`ram0_sbe::R`](R) reader structure"] +impl crate::Readable for Ram0SbeSpec {} +#[doc = "`write(|w| ..)` method takes [`ram0_sbe::W`](W) writer structure"] +impl crate::Writable for Ram0SbeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RAM0_SBE to value 0"] -impl crate::Resettable for RAM0_SBE_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Ram0SbeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/sysconfig/ram0_scrub.rs b/va416xx/src/sysconfig/ram0_scrub.rs deleted file mode 100644 index 0c2d96d..0000000 --- a/va416xx/src/sysconfig/ram0_scrub.rs +++ /dev/null @@ -1,130 +0,0 @@ -#[doc = "Register `RAM0_SCRUB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Register `RAM0_SCRUB` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `VALUE` reader - Counter divide value"] -pub struct VALUE_R(crate::FieldReader); -impl VALUE_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - VALUE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for VALUE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `VALUE` writer - Counter divide value"] -pub struct VALUE_W<'a> { - w: &'a mut W, -} -impl<'a> VALUE_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - self.w.bits = (self.w.bits & !0x00ff_ffff) | (value as u32 & 0x00ff_ffff); - self.w - } -} -#[doc = "Field `RESET` writer - Reset Counter"] -pub struct RESET_W<'a> { - w: &'a mut W, -} -impl<'a> RESET_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 31)) | ((value as u32 & 0x01) << 31); - self.w - } -} -impl R { - #[doc = "Bits 0:23 - Counter divide value"] - #[inline(always)] - pub fn value(&self) -> VALUE_R { - VALUE_R::new((self.bits & 0x00ff_ffff) as u32) - } -} -impl W { - #[doc = "Bits 0:23 - Counter divide value"] - #[inline(always)] - pub fn value(&mut self) -> VALUE_W { - VALUE_W { w: self } - } - #[doc = "Bit 31 - Reset Counter"] - #[inline(always)] - pub fn reset(&mut self) -> RESET_W { - RESET_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "RAM0 Scrub Period Configuration\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ram0_scrub](index.html) module"] -pub struct RAM0_SCRUB_SPEC; -impl crate::RegisterSpec for RAM0_SCRUB_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [ram0_scrub::R](R) reader structure"] -impl crate::Readable for RAM0_SCRUB_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ram0_scrub::W](W) writer structure"] -impl crate::Writable for RAM0_SCRUB_SPEC { - type Writer = W; -} -#[doc = "`reset()` method sets RAM0_SCRUB to value 0"] -impl crate::Resettable for RAM0_SCRUB_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } -} diff --git a/va416xx/src/sysconfig/ram1_mbe.rs b/va416xx/src/sysconfig/ram1_mbe.rs deleted file mode 100644 index 2721916..0000000 --- a/va416xx/src/sysconfig/ram1_mbe.rs +++ /dev/null @@ -1,103 +0,0 @@ -#[doc = "Register `RAM1_MBE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Register `RAM1_MBE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `COUNT` reader - RAM0 Multi Bit Errors"] -pub struct COUNT_R(crate::FieldReader); -impl COUNT_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - COUNT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for COUNT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `COUNT` writer - RAM0 Multi Bit Errors"] -pub struct COUNT_W<'a> { - w: &'a mut W, -} -impl<'a> COUNT_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); - self.w - } -} -impl R { - #[doc = "Bits 0:15 - RAM0 Multi Bit Errors"] - #[inline(always)] - pub fn count(&self) -> COUNT_R { - COUNT_R::new((self.bits & 0xffff) as u16) - } -} -impl W { - #[doc = "Bits 0:15 - RAM0 Multi Bit Errors"] - #[inline(always)] - pub fn count(&mut self) -> COUNT_W { - COUNT_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "Count of RAM1 EDAC Multi Bit Errors\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ram1_mbe](index.html) module"] -pub struct RAM1_MBE_SPEC; -impl crate::RegisterSpec for RAM1_MBE_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [ram1_mbe::R](R) reader structure"] -impl crate::Readable for RAM1_MBE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ram1_mbe::W](W) writer structure"] -impl crate::Writable for RAM1_MBE_SPEC { - type Writer = W; -} -#[doc = "`reset()` method sets RAM1_MBE to value 0"] -impl crate::Resettable for RAM1_MBE_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } -} diff --git a/va416xx/src/sysconfig/ram1_sbe.rs b/va416xx/src/sysconfig/ram1_sbe.rs deleted file mode 100644 index 72a043b..0000000 --- a/va416xx/src/sysconfig/ram1_sbe.rs +++ /dev/null @@ -1,103 +0,0 @@ -#[doc = "Register `RAM1_SBE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Register `RAM1_SBE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `COUNT` reader - RAM0 EDAC Single Bit Errors"] -pub struct COUNT_R(crate::FieldReader); -impl COUNT_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - COUNT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for COUNT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `COUNT` writer - RAM0 EDAC Single Bit Errors"] -pub struct COUNT_W<'a> { - w: &'a mut W, -} -impl<'a> COUNT_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); - self.w - } -} -impl R { - #[doc = "Bits 0:15 - RAM0 EDAC Single Bit Errors"] - #[inline(always)] - pub fn count(&self) -> COUNT_R { - COUNT_R::new((self.bits & 0xffff) as u16) - } -} -impl W { - #[doc = "Bits 0:15 - RAM0 EDAC Single Bit Errors"] - #[inline(always)] - pub fn count(&mut self) -> COUNT_W { - COUNT_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "Count of RAM1 EDAC Single Bit Errors\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ram1_sbe](index.html) module"] -pub struct RAM1_SBE_SPEC; -impl crate::RegisterSpec for RAM1_SBE_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [ram1_sbe::R](R) reader structure"] -impl crate::Readable for RAM1_SBE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ram1_sbe::W](W) writer structure"] -impl crate::Writable for RAM1_SBE_SPEC { - type Writer = W; -} -#[doc = "`reset()` method sets RAM1_SBE to value 0"] -impl crate::Resettable for RAM1_SBE_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } -} diff --git a/va416xx/src/sysconfig/ram1_scrub.rs b/va416xx/src/sysconfig/ram1_scrub.rs deleted file mode 100644 index 057c889..0000000 --- a/va416xx/src/sysconfig/ram1_scrub.rs +++ /dev/null @@ -1,130 +0,0 @@ -#[doc = "Register `RAM1_SCRUB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Register `RAM1_SCRUB` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `VALUE` reader - Counter divide value"] -pub struct VALUE_R(crate::FieldReader); -impl VALUE_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - VALUE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for VALUE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `VALUE` writer - Counter divide value"] -pub struct VALUE_W<'a> { - w: &'a mut W, -} -impl<'a> VALUE_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - self.w.bits = (self.w.bits & !0x00ff_ffff) | (value as u32 & 0x00ff_ffff); - self.w - } -} -#[doc = "Field `RESET` writer - Reset Counter"] -pub struct RESET_W<'a> { - w: &'a mut W, -} -impl<'a> RESET_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 31)) | ((value as u32 & 0x01) << 31); - self.w - } -} -impl R { - #[doc = "Bits 0:23 - Counter divide value"] - #[inline(always)] - pub fn value(&self) -> VALUE_R { - VALUE_R::new((self.bits & 0x00ff_ffff) as u32) - } -} -impl W { - #[doc = "Bits 0:23 - Counter divide value"] - #[inline(always)] - pub fn value(&mut self) -> VALUE_W { - VALUE_W { w: self } - } - #[doc = "Bit 31 - Reset Counter"] - #[inline(always)] - pub fn reset(&mut self) -> RESET_W { - RESET_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "RAM1 Scrub Period Configuration\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ram1_scrub](index.html) module"] -pub struct RAM1_SCRUB_SPEC; -impl crate::RegisterSpec for RAM1_SCRUB_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [ram1_scrub::R](R) reader structure"] -impl crate::Readable for RAM1_SCRUB_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ram1_scrub::W](W) writer structure"] -impl crate::Writable for RAM1_SCRUB_SPEC { - type Writer = W; -} -#[doc = "`reset()` method sets RAM1_SCRUB to value 0"] -impl crate::Resettable for RAM1_SCRUB_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } -} diff --git a/va416xx/src/sysconfig/refresh_config_h.rs b/va416xx/src/sysconfig/refresh_config_h.rs index 59c2b6f..6573d77 100644 --- a/va416xx/src/sysconfig/refresh_config_h.rs +++ b/va416xx/src/sysconfig/refresh_config_h.rs @@ -1,140 +1,55 @@ #[doc = "Register `REFRESH_CONFIG_H` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `REFRESH_CONFIG_H` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DIVCOUNT` reader - Upper 8-bits of the Refresh Rate Counter. Registers are refreshed every DIVCOUNT+1 cycles"] -pub struct DIVCOUNT_R(crate::FieldReader); -impl DIVCOUNT_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - DIVCOUNT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for DIVCOUNT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type DivcountR = crate::FieldReader; #[doc = "Field `DIVCOUNT` writer - Upper 8-bits of the Refresh Rate Counter. Registers are refreshed every DIVCOUNT+1 cycles"] -pub struct DIVCOUNT_W<'a> { - w: &'a mut W, -} -impl<'a> DIVCOUNT_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type DivcountW<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `TESTMODE` reader - Special Test Mode Configuration. 00/01=normal. 10=Force refresh off. 11=Force refresh on constantly."] -pub struct TESTMODE_R(crate::FieldReader); -impl TESTMODE_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - TESTMODE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TESTMODE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type TestmodeR = crate::FieldReader; #[doc = "Field `TESTMODE` writer - Special Test Mode Configuration. 00/01=normal. 10=Force refresh off. 11=Force refresh on constantly."] -pub struct TESTMODE_W<'a> { - w: &'a mut W, -} -impl<'a> TESTMODE_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x03 << 30)) | ((value as u32 & 0x03) << 30); - self.w - } -} +pub type TestmodeW<'a, REG> = crate::FieldWriter<'a, REG, 2>; impl R { #[doc = "Bits 0:7 - Upper 8-bits of the Refresh Rate Counter. Registers are refreshed every DIVCOUNT+1 cycles"] #[inline(always)] - pub fn divcount(&self) -> DIVCOUNT_R { - DIVCOUNT_R::new((self.bits & 0xff) as u8) + pub fn divcount(&self) -> DivcountR { + DivcountR::new((self.bits & 0xff) as u8) } #[doc = "Bits 30:31 - Special Test Mode Configuration. 00/01=normal. 10=Force refresh off. 11=Force refresh on constantly."] #[inline(always)] - pub fn testmode(&self) -> TESTMODE_R { - TESTMODE_R::new(((self.bits >> 30) & 0x03) as u8) + pub fn testmode(&self) -> TestmodeR { + TestmodeR::new(((self.bits >> 30) & 3) as u8) } } impl W { #[doc = "Bits 0:7 - Upper 8-bits of the Refresh Rate Counter. Registers are refreshed every DIVCOUNT+1 cycles"] #[inline(always)] - pub fn divcount(&mut self) -> DIVCOUNT_W { - DIVCOUNT_W { w: self } + #[must_use] + pub fn divcount(&mut self) -> DivcountW { + DivcountW::new(self, 0) } #[doc = "Bits 30:31 - Special Test Mode Configuration. 00/01=normal. 10=Force refresh off. 11=Force refresh on constantly."] #[inline(always)] - pub fn testmode(&mut self) -> TESTMODE_W { - TESTMODE_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn testmode(&mut self) -> TestmodeW { + TestmodeW::new(self, 30) } } -#[doc = "Register Refresh Rate for TMR registers\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [refresh_config_h](index.html) module"] -pub struct REFRESH_CONFIG_H_SPEC; -impl crate::RegisterSpec for REFRESH_CONFIG_H_SPEC { +#[doc = "Register Refresh Rate for TMR registers\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`refresh_config_h::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`refresh_config_h::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RefreshConfigHSpec; +impl crate::RegisterSpec for RefreshConfigHSpec { type Ux = u32; } -#[doc = "`read()` method returns [refresh_config_h::R](R) reader structure"] -impl crate::Readable for REFRESH_CONFIG_H_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [refresh_config_h::W](W) writer structure"] -impl crate::Writable for REFRESH_CONFIG_H_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`refresh_config_h::R`](R) reader structure"] +impl crate::Readable for RefreshConfigHSpec {} +#[doc = "`write(|w| ..)` method takes [`refresh_config_h::W`](W) writer structure"] +impl crate::Writable for RefreshConfigHSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets REFRESH_CONFIG_H to value 0"] -impl crate::Resettable for REFRESH_CONFIG_H_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for RefreshConfigHSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/sysconfig/refresh_config_l.rs b/va416xx/src/sysconfig/refresh_config_l.rs index 8241ce8..c8d1367 100644 --- a/va416xx/src/sysconfig/refresh_config_l.rs +++ b/va416xx/src/sysconfig/refresh_config_l.rs @@ -1,103 +1,40 @@ #[doc = "Register `REFRESH_CONFIG_L` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `REFRESH_CONFIG_L` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DIVCOUNT` reader - Lower 32-bits of the Refresh Rate Counter. Registers are refreshed every DIVCOUNT+1 cycles"] -pub struct DIVCOUNT_R(crate::FieldReader); -impl DIVCOUNT_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - DIVCOUNT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for DIVCOUNT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type DivcountR = crate::FieldReader; #[doc = "Field `DIVCOUNT` writer - Lower 32-bits of the Refresh Rate Counter. Registers are refreshed every DIVCOUNT+1 cycles"] -pub struct DIVCOUNT_W<'a> { - w: &'a mut W, -} -impl<'a> DIVCOUNT_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - self.w.bits = value as u32; - self.w - } -} +pub type DivcountW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Lower 32-bits of the Refresh Rate Counter. Registers are refreshed every DIVCOUNT+1 cycles"] #[inline(always)] - pub fn divcount(&self) -> DIVCOUNT_R { - DIVCOUNT_R::new(self.bits as u32) + pub fn divcount(&self) -> DivcountR { + DivcountR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Lower 32-bits of the Refresh Rate Counter. Registers are refreshed every DIVCOUNT+1 cycles"] #[inline(always)] - pub fn divcount(&mut self) -> DIVCOUNT_W { - DIVCOUNT_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn divcount(&mut self) -> DivcountW { + DivcountW::new(self, 0) } } -#[doc = "Register Refresh Rate for TMR registers\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [refresh_config_l](index.html) module"] -pub struct REFRESH_CONFIG_L_SPEC; -impl crate::RegisterSpec for REFRESH_CONFIG_L_SPEC { +#[doc = "Register Refresh Rate for TMR registers\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`refresh_config_l::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`refresh_config_l::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RefreshConfigLSpec; +impl crate::RegisterSpec for RefreshConfigLSpec { type Ux = u32; } -#[doc = "`read()` method returns [refresh_config_l::R](R) reader structure"] -impl crate::Readable for REFRESH_CONFIG_L_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [refresh_config_l::W](W) writer structure"] -impl crate::Writable for REFRESH_CONFIG_L_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`refresh_config_l::R`](R) reader structure"] +impl crate::Readable for RefreshConfigLSpec {} +#[doc = "`write(|w| ..)` method takes [`refresh_config_l::W`](W) writer structure"] +impl crate::Writable for RefreshConfigLSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets REFRESH_CONFIG_L to value 0x0f"] -impl crate::Resettable for REFRESH_CONFIG_L_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0x0f - } +impl crate::Resettable for RefreshConfigLSpec { + const RESET_VALUE: u32 = 0x0f; } diff --git a/va416xx/src/sysconfig/rom_mbe.rs b/va416xx/src/sysconfig/rom_mbe.rs deleted file mode 100644 index 4cc0a61..0000000 --- a/va416xx/src/sysconfig/rom_mbe.rs +++ /dev/null @@ -1,103 +0,0 @@ -#[doc = "Register `ROM_MBE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Register `ROM_MBE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `COUNT` reader - RAM0 Multi Bit Errors"] -pub struct COUNT_R(crate::FieldReader); -impl COUNT_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - COUNT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for COUNT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `COUNT` writer - RAM0 Multi Bit Errors"] -pub struct COUNT_W<'a> { - w: &'a mut W, -} -impl<'a> COUNT_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); - self.w - } -} -impl R { - #[doc = "Bits 0:15 - RAM0 Multi Bit Errors"] - #[inline(always)] - pub fn count(&self) -> COUNT_R { - COUNT_R::new((self.bits & 0xffff) as u16) - } -} -impl W { - #[doc = "Bits 0:15 - RAM0 Multi Bit Errors"] - #[inline(always)] - pub fn count(&mut self) -> COUNT_W { - COUNT_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "Count of ROM EDAC Multi Bit Errors\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rom_mbe](index.html) module"] -pub struct ROM_MBE_SPEC; -impl crate::RegisterSpec for ROM_MBE_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [rom_mbe::R](R) reader structure"] -impl crate::Readable for ROM_MBE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [rom_mbe::W](W) writer structure"] -impl crate::Writable for ROM_MBE_SPEC { - type Writer = W; -} -#[doc = "`reset()` method sets ROM_MBE to value 0"] -impl crate::Resettable for ROM_MBE_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } -} diff --git a/va416xx/src/sysconfig/rom_prot.rs b/va416xx/src/sysconfig/rom_prot.rs index 60a550e..657c3ab 100644 --- a/va416xx/src/sysconfig/rom_prot.rs +++ b/va416xx/src/sysconfig/rom_prot.rs @@ -1,113 +1,40 @@ #[doc = "Register `ROM_PROT` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ROM_PROT` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `WREN` reader - ROM Write Enable Bit"] -pub struct WREN_R(crate::FieldReader); -impl WREN_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - WREN_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for WREN_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type WrenR = crate::BitReader; #[doc = "Field `WREN` writer - ROM Write Enable Bit"] -pub struct WREN_W<'a> { - w: &'a mut W, -} -impl<'a> WREN_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} +pub type WrenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - ROM Write Enable Bit"] #[inline(always)] - pub fn wren(&self) -> WREN_R { - WREN_R::new((self.bits & 0x01) != 0) + pub fn wren(&self) -> WrenR { + WrenR::new((self.bits & 1) != 0) } } impl W { #[doc = "Bit 0 - ROM Write Enable Bit"] #[inline(always)] - pub fn wren(&mut self) -> WREN_W { - WREN_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn wren(&mut self) -> WrenW { + WrenW::new(self, 0) } } -#[doc = "ROM Protection Configuration\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rom_prot](index.html) module"] -pub struct ROM_PROT_SPEC; -impl crate::RegisterSpec for ROM_PROT_SPEC { +#[doc = "ROM Protection Configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rom_prot::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rom_prot::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RomProtSpec; +impl crate::RegisterSpec for RomProtSpec { type Ux = u32; } -#[doc = "`read()` method returns [rom_prot::R](R) reader structure"] -impl crate::Readable for ROM_PROT_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [rom_prot::W](W) writer structure"] -impl crate::Writable for ROM_PROT_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`rom_prot::R`](R) reader structure"] +impl crate::Readable for RomProtSpec {} +#[doc = "`write(|w| ..)` method takes [`rom_prot::W`](W) writer structure"] +impl crate::Writable for RomProtSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ROM_PROT to value 0"] -impl crate::Resettable for ROM_PROT_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for RomProtSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/sysconfig/rom_retries.rs b/va416xx/src/sysconfig/rom_retries.rs index 3f89688..8f60e8a 100644 --- a/va416xx/src/sysconfig/rom_retries.rs +++ b/va416xx/src/sysconfig/rom_retries.rs @@ -1,53 +1,22 @@ #[doc = "Register `ROM_RETRIES` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `COUNT` reader - Count of ROM block Retries"] -pub struct COUNT_R(crate::FieldReader); -impl COUNT_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - COUNT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for COUNT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type CountR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - Count of ROM block Retries"] #[inline(always)] - pub fn count(&self) -> COUNT_R { - COUNT_R::new((self.bits & 0xff) as u8) + pub fn count(&self) -> CountR { + CountR::new((self.bits & 0xff) as u8) } } -#[doc = "ROM BOOT Retry count\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rom_retries](index.html) module"] -pub struct ROM_RETRIES_SPEC; -impl crate::RegisterSpec for ROM_RETRIES_SPEC { +#[doc = "ROM BOOT Retry count\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rom_retries::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RomRetriesSpec; +impl crate::RegisterSpec for RomRetriesSpec { type Ux = u32; } -#[doc = "`read()` method returns [rom_retries::R](R) reader structure"] -impl crate::Readable for ROM_RETRIES_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`rom_retries::R`](R) reader structure"] +impl crate::Readable for RomRetriesSpec {} #[doc = "`reset()` method sets ROM_RETRIES to value 0"] -impl crate::Resettable for ROM_RETRIES_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for RomRetriesSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/sysconfig/rom_sbe.rs b/va416xx/src/sysconfig/rom_sbe.rs deleted file mode 100644 index 9b9ac5c..0000000 --- a/va416xx/src/sysconfig/rom_sbe.rs +++ /dev/null @@ -1,103 +0,0 @@ -#[doc = "Register `ROM_SBE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Register `ROM_SBE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `COUNT` reader - RAM0 EDAC Single Bit Errors"] -pub struct COUNT_R(crate::FieldReader); -impl COUNT_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - COUNT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for COUNT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `COUNT` writer - RAM0 EDAC Single Bit Errors"] -pub struct COUNT_W<'a> { - w: &'a mut W, -} -impl<'a> COUNT_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); - self.w - } -} -impl R { - #[doc = "Bits 0:15 - RAM0 EDAC Single Bit Errors"] - #[inline(always)] - pub fn count(&self) -> COUNT_R { - COUNT_R::new((self.bits & 0xffff) as u16) - } -} -impl W { - #[doc = "Bits 0:15 - RAM0 EDAC Single Bit Errors"] - #[inline(always)] - pub fn count(&mut self) -> COUNT_W { - COUNT_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "Count of ROM EDAC Single Bit Errors\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rom_sbe](index.html) module"] -pub struct ROM_SBE_SPEC; -impl crate::RegisterSpec for ROM_SBE_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [rom_sbe::R](R) reader structure"] -impl crate::Readable for ROM_SBE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [rom_sbe::W](W) writer structure"] -impl crate::Writable for ROM_SBE_SPEC { - type Writer = W; -} -#[doc = "`reset()` method sets ROM_SBE to value 0"] -impl crate::Resettable for ROM_SBE_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } -} diff --git a/va416xx/src/sysconfig/rom_scrub.rs b/va416xx/src/sysconfig/rom_scrub.rs index ba17dbb..20d5262 100644 --- a/va416xx/src/sysconfig/rom_scrub.rs +++ b/va416xx/src/sysconfig/rom_scrub.rs @@ -1,130 +1,48 @@ #[doc = "Register `ROM_SCRUB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ROM_SCRUB` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `VALUE` reader - Counter divide value"] -pub struct VALUE_R(crate::FieldReader); -impl VALUE_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - VALUE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for VALUE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type ValueR = crate::FieldReader; #[doc = "Field `VALUE` writer - Counter divide value"] -pub struct VALUE_W<'a> { - w: &'a mut W, -} -impl<'a> VALUE_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - self.w.bits = (self.w.bits & !0x00ff_ffff) | (value as u32 & 0x00ff_ffff); - self.w - } -} +pub type ValueW<'a, REG> = crate::FieldWriter<'a, REG, 24, u32>; #[doc = "Field `RESET` writer - Reset Counter"] -pub struct RESET_W<'a> { - w: &'a mut W, -} -impl<'a> RESET_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 31)) | ((value as u32 & 0x01) << 31); - self.w - } -} +pub type ResetW<'a, REG> = crate::BitWriter1C<'a, REG>; impl R { #[doc = "Bits 0:23 - Counter divide value"] #[inline(always)] - pub fn value(&self) -> VALUE_R { - VALUE_R::new((self.bits & 0x00ff_ffff) as u32) + pub fn value(&self) -> ValueR { + ValueR::new(self.bits & 0x00ff_ffff) } } impl W { #[doc = "Bits 0:23 - Counter divide value"] #[inline(always)] - pub fn value(&mut self) -> VALUE_W { - VALUE_W { w: self } + #[must_use] + pub fn value(&mut self) -> ValueW { + ValueW::new(self, 0) } #[doc = "Bit 31 - Reset Counter"] #[inline(always)] - pub fn reset(&mut self) -> RESET_W { - RESET_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn reset(&mut self) -> ResetW { + ResetW::new(self, 31) } } -#[doc = "ROM Scrub Period Configuration\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rom_scrub](index.html) module"] -pub struct ROM_SCRUB_SPEC; -impl crate::RegisterSpec for ROM_SCRUB_SPEC { +#[doc = "ROM Scrub Period Configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rom_scrub::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rom_scrub::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RomScrubSpec; +impl crate::RegisterSpec for RomScrubSpec { type Ux = u32; } -#[doc = "`read()` method returns [rom_scrub::R](R) reader structure"] -impl crate::Readable for ROM_SCRUB_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [rom_scrub::W](W) writer structure"] -impl crate::Writable for ROM_SCRUB_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`rom_scrub::R`](R) reader structure"] +impl crate::Readable for RomScrubSpec {} +#[doc = "`write(|w| ..)` method takes [`rom_scrub::W`](W) writer structure"] +impl crate::Writable for RomScrubSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0x8000_0000; } #[doc = "`reset()` method sets ROM_SCRUB to value 0"] -impl crate::Resettable for ROM_SCRUB_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for RomScrubSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/sysconfig/rst_cntl_ram0.rs b/va416xx/src/sysconfig/rst_cntl_ram0.rs deleted file mode 100644 index 40b483c..0000000 --- a/va416xx/src/sysconfig/rst_cntl_ram0.rs +++ /dev/null @@ -1,321 +0,0 @@ -#[doc = "Register `RST_CNTL_RAM0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Register `RST_CNTL_RAM0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `POR` reader - Power On Reset Status"] -pub struct POR_R(crate::FieldReader); -impl POR_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - POR_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for POR_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `POR` writer - Power On Reset Status"] -pub struct POR_W<'a> { - w: &'a mut W, -} -impl<'a> POR_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} -#[doc = "Field `EXTRST` reader - External Reset Status"] -pub struct EXTRST_R(crate::FieldReader); -impl EXTRST_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - EXTRST_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for EXTRST_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `EXTRST` writer - External Reset Status"] -pub struct EXTRST_W<'a> { - w: &'a mut W, -} -impl<'a> EXTRST_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); - self.w - } -} -#[doc = "Field `SYSRSTREQ` reader - SYSRESETREQ Reset Status"] -pub struct SYSRSTREQ_R(crate::FieldReader); -impl SYSRSTREQ_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - SYSRSTREQ_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for SYSRSTREQ_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `SYSRSTREQ` writer - SYSRESETREQ Reset Status"] -pub struct SYSRSTREQ_W<'a> { - w: &'a mut W, -} -impl<'a> SYSRSTREQ_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); - self.w - } -} -#[doc = "Field `LOOKUP` reader - LOOKUP Reset Status"] -pub struct LOOKUP_R(crate::FieldReader); -impl LOOKUP_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - LOOKUP_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for LOOKUP_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `LOOKUP` writer - LOOKUP Reset Status"] -pub struct LOOKUP_W<'a> { - w: &'a mut W, -} -impl<'a> LOOKUP_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); - self.w - } -} -#[doc = "Field `WATCHDOG` reader - WATCHDOG Reset Status"] -pub struct WATCHDOG_R(crate::FieldReader); -impl WATCHDOG_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - WATCHDOG_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for WATCHDOG_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `WATCHDOG` writer - WATCHDOG Reset Status"] -pub struct WATCHDOG_W<'a> { - w: &'a mut W, -} -impl<'a> WATCHDOG_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); - self.w - } -} -#[doc = "Field `MEMERR` reader - Memory Error Reset Status"] -pub struct MEMERR_R(crate::FieldReader); -impl MEMERR_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - MEMERR_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for MEMERR_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl R { - #[doc = "Bit 0 - Power On Reset Status"] - #[inline(always)] - pub fn por(&self) -> POR_R { - POR_R::new((self.bits & 0x01) != 0) - } - #[doc = "Bit 1 - External Reset Status"] - #[inline(always)] - pub fn extrst(&self) -> EXTRST_R { - EXTRST_R::new(((self.bits >> 1) & 0x01) != 0) - } - #[doc = "Bit 2 - SYSRESETREQ Reset Status"] - #[inline(always)] - pub fn sysrstreq(&self) -> SYSRSTREQ_R { - SYSRSTREQ_R::new(((self.bits >> 2) & 0x01) != 0) - } - #[doc = "Bit 3 - LOOKUP Reset Status"] - #[inline(always)] - pub fn lookup(&self) -> LOOKUP_R { - LOOKUP_R::new(((self.bits >> 3) & 0x01) != 0) - } - #[doc = "Bit 4 - WATCHDOG Reset Status"] - #[inline(always)] - pub fn watchdog(&self) -> WATCHDOG_R { - WATCHDOG_R::new(((self.bits >> 4) & 0x01) != 0) - } - #[doc = "Bit 5 - Memory Error Reset Status"] - #[inline(always)] - pub fn memerr(&self) -> MEMERR_R { - MEMERR_R::new(((self.bits >> 5) & 0x01) != 0) - } -} -impl W { - #[doc = "Bit 0 - Power On Reset Status"] - #[inline(always)] - pub fn por(&mut self) -> POR_W { - POR_W { w: self } - } - #[doc = "Bit 1 - External Reset Status"] - #[inline(always)] - pub fn extrst(&mut self) -> EXTRST_W { - EXTRST_W { w: self } - } - #[doc = "Bit 2 - SYSRESETREQ Reset Status"] - #[inline(always)] - pub fn sysrstreq(&mut self) -> SYSRSTREQ_W { - SYSRSTREQ_W { w: self } - } - #[doc = "Bit 3 - LOOKUP Reset Status"] - #[inline(always)] - pub fn lookup(&mut self) -> LOOKUP_W { - LOOKUP_W { w: self } - } - #[doc = "Bit 4 - WATCHDOG Reset Status"] - #[inline(always)] - pub fn watchdog(&mut self) -> WATCHDOG_W { - WATCHDOG_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "RAM Reset Control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rst_cntl_ram0](index.html) module"] -pub struct RST_CNTL_RAM0_SPEC; -impl crate::RegisterSpec for RST_CNTL_RAM0_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [rst_cntl_ram0::R](R) reader structure"] -impl crate::Readable for RST_CNTL_RAM0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [rst_cntl_ram0::W](W) writer structure"] -impl crate::Writable for RST_CNTL_RAM0_SPEC { - type Writer = W; -} -#[doc = "`reset()` method sets RST_CNTL_RAM0 to value 0x3f"] -impl crate::Resettable for RST_CNTL_RAM0_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0x3f - } -} diff --git a/va416xx/src/sysconfig/rst_cntl_ram1.rs b/va416xx/src/sysconfig/rst_cntl_ram1.rs deleted file mode 100644 index 354e361..0000000 --- a/va416xx/src/sysconfig/rst_cntl_ram1.rs +++ /dev/null @@ -1,321 +0,0 @@ -#[doc = "Register `RST_CNTL_RAM1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Register `RST_CNTL_RAM1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `POR` reader - Power On Reset Status"] -pub struct POR_R(crate::FieldReader); -impl POR_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - POR_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for POR_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `POR` writer - Power On Reset Status"] -pub struct POR_W<'a> { - w: &'a mut W, -} -impl<'a> POR_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} -#[doc = "Field `EXTRST` reader - External Reset Status"] -pub struct EXTRST_R(crate::FieldReader); -impl EXTRST_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - EXTRST_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for EXTRST_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `EXTRST` writer - External Reset Status"] -pub struct EXTRST_W<'a> { - w: &'a mut W, -} -impl<'a> EXTRST_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); - self.w - } -} -#[doc = "Field `SYSRSTREQ` reader - SYSRESETREQ Reset Status"] -pub struct SYSRSTREQ_R(crate::FieldReader); -impl SYSRSTREQ_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - SYSRSTREQ_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for SYSRSTREQ_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `SYSRSTREQ` writer - SYSRESETREQ Reset Status"] -pub struct SYSRSTREQ_W<'a> { - w: &'a mut W, -} -impl<'a> SYSRSTREQ_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); - self.w - } -} -#[doc = "Field `LOOKUP` reader - LOOKUP Reset Status"] -pub struct LOOKUP_R(crate::FieldReader); -impl LOOKUP_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - LOOKUP_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for LOOKUP_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `LOOKUP` writer - LOOKUP Reset Status"] -pub struct LOOKUP_W<'a> { - w: &'a mut W, -} -impl<'a> LOOKUP_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); - self.w - } -} -#[doc = "Field `WATCHDOG` reader - WATCHDOG Reset Status"] -pub struct WATCHDOG_R(crate::FieldReader); -impl WATCHDOG_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - WATCHDOG_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for WATCHDOG_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `WATCHDOG` writer - WATCHDOG Reset Status"] -pub struct WATCHDOG_W<'a> { - w: &'a mut W, -} -impl<'a> WATCHDOG_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); - self.w - } -} -#[doc = "Field `MEMERR` reader - Memory Error Reset Status"] -pub struct MEMERR_R(crate::FieldReader); -impl MEMERR_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - MEMERR_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for MEMERR_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl R { - #[doc = "Bit 0 - Power On Reset Status"] - #[inline(always)] - pub fn por(&self) -> POR_R { - POR_R::new((self.bits & 0x01) != 0) - } - #[doc = "Bit 1 - External Reset Status"] - #[inline(always)] - pub fn extrst(&self) -> EXTRST_R { - EXTRST_R::new(((self.bits >> 1) & 0x01) != 0) - } - #[doc = "Bit 2 - SYSRESETREQ Reset Status"] - #[inline(always)] - pub fn sysrstreq(&self) -> SYSRSTREQ_R { - SYSRSTREQ_R::new(((self.bits >> 2) & 0x01) != 0) - } - #[doc = "Bit 3 - LOOKUP Reset Status"] - #[inline(always)] - pub fn lookup(&self) -> LOOKUP_R { - LOOKUP_R::new(((self.bits >> 3) & 0x01) != 0) - } - #[doc = "Bit 4 - WATCHDOG Reset Status"] - #[inline(always)] - pub fn watchdog(&self) -> WATCHDOG_R { - WATCHDOG_R::new(((self.bits >> 4) & 0x01) != 0) - } - #[doc = "Bit 5 - Memory Error Reset Status"] - #[inline(always)] - pub fn memerr(&self) -> MEMERR_R { - MEMERR_R::new(((self.bits >> 5) & 0x01) != 0) - } -} -impl W { - #[doc = "Bit 0 - Power On Reset Status"] - #[inline(always)] - pub fn por(&mut self) -> POR_W { - POR_W { w: self } - } - #[doc = "Bit 1 - External Reset Status"] - #[inline(always)] - pub fn extrst(&mut self) -> EXTRST_W { - EXTRST_W { w: self } - } - #[doc = "Bit 2 - SYSRESETREQ Reset Status"] - #[inline(always)] - pub fn sysrstreq(&mut self) -> SYSRSTREQ_W { - SYSRSTREQ_W { w: self } - } - #[doc = "Bit 3 - LOOKUP Reset Status"] - #[inline(always)] - pub fn lookup(&mut self) -> LOOKUP_W { - LOOKUP_W { w: self } - } - #[doc = "Bit 4 - WATCHDOG Reset Status"] - #[inline(always)] - pub fn watchdog(&mut self) -> WATCHDOG_W { - WATCHDOG_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "RAM Reset Control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rst_cntl_ram1](index.html) module"] -pub struct RST_CNTL_RAM1_SPEC; -impl crate::RegisterSpec for RST_CNTL_RAM1_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [rst_cntl_ram1::R](R) reader structure"] -impl crate::Readable for RST_CNTL_RAM1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [rst_cntl_ram1::W](W) writer structure"] -impl crate::Writable for RST_CNTL_RAM1_SPEC { - type Writer = W; -} -#[doc = "`reset()` method sets RST_CNTL_RAM1 to value 0x3f"] -impl crate::Resettable for RST_CNTL_RAM1_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0x3f - } -} diff --git a/va416xx/src/sysconfig/rst_cntl_rom.rs b/va416xx/src/sysconfig/rst_cntl_rom.rs deleted file mode 100644 index aee59df..0000000 --- a/va416xx/src/sysconfig/rst_cntl_rom.rs +++ /dev/null @@ -1,321 +0,0 @@ -#[doc = "Register `RST_CNTL_ROM` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Register `RST_CNTL_ROM` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `POR` reader - Power On Reset Status"] -pub struct POR_R(crate::FieldReader); -impl POR_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - POR_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for POR_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `POR` writer - Power On Reset Status"] -pub struct POR_W<'a> { - w: &'a mut W, -} -impl<'a> POR_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} -#[doc = "Field `EXTRST` reader - External Reset Status"] -pub struct EXTRST_R(crate::FieldReader); -impl EXTRST_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - EXTRST_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for EXTRST_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `EXTRST` writer - External Reset Status"] -pub struct EXTRST_W<'a> { - w: &'a mut W, -} -impl<'a> EXTRST_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); - self.w - } -} -#[doc = "Field `SYSRSTREQ` reader - SYSRESETREQ Reset Status"] -pub struct SYSRSTREQ_R(crate::FieldReader); -impl SYSRSTREQ_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - SYSRSTREQ_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for SYSRSTREQ_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `SYSRSTREQ` writer - SYSRESETREQ Reset Status"] -pub struct SYSRSTREQ_W<'a> { - w: &'a mut W, -} -impl<'a> SYSRSTREQ_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); - self.w - } -} -#[doc = "Field `LOOKUP` reader - LOOKUP Reset Status"] -pub struct LOOKUP_R(crate::FieldReader); -impl LOOKUP_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - LOOKUP_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for LOOKUP_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `LOOKUP` writer - LOOKUP Reset Status"] -pub struct LOOKUP_W<'a> { - w: &'a mut W, -} -impl<'a> LOOKUP_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); - self.w - } -} -#[doc = "Field `WATCHDOG` reader - WATCHDOG Reset Status"] -pub struct WATCHDOG_R(crate::FieldReader); -impl WATCHDOG_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - WATCHDOG_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for WATCHDOG_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `WATCHDOG` writer - WATCHDOG Reset Status"] -pub struct WATCHDOG_W<'a> { - w: &'a mut W, -} -impl<'a> WATCHDOG_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); - self.w - } -} -#[doc = "Field `MEMERR` reader - Memory Error Reset Status"] -pub struct MEMERR_R(crate::FieldReader); -impl MEMERR_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - MEMERR_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for MEMERR_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl R { - #[doc = "Bit 0 - Power On Reset Status"] - #[inline(always)] - pub fn por(&self) -> POR_R { - POR_R::new((self.bits & 0x01) != 0) - } - #[doc = "Bit 1 - External Reset Status"] - #[inline(always)] - pub fn extrst(&self) -> EXTRST_R { - EXTRST_R::new(((self.bits >> 1) & 0x01) != 0) - } - #[doc = "Bit 2 - SYSRESETREQ Reset Status"] - #[inline(always)] - pub fn sysrstreq(&self) -> SYSRSTREQ_R { - SYSRSTREQ_R::new(((self.bits >> 2) & 0x01) != 0) - } - #[doc = "Bit 3 - LOOKUP Reset Status"] - #[inline(always)] - pub fn lookup(&self) -> LOOKUP_R { - LOOKUP_R::new(((self.bits >> 3) & 0x01) != 0) - } - #[doc = "Bit 4 - WATCHDOG Reset Status"] - #[inline(always)] - pub fn watchdog(&self) -> WATCHDOG_R { - WATCHDOG_R::new(((self.bits >> 4) & 0x01) != 0) - } - #[doc = "Bit 5 - Memory Error Reset Status"] - #[inline(always)] - pub fn memerr(&self) -> MEMERR_R { - MEMERR_R::new(((self.bits >> 5) & 0x01) != 0) - } -} -impl W { - #[doc = "Bit 0 - Power On Reset Status"] - #[inline(always)] - pub fn por(&mut self) -> POR_W { - POR_W { w: self } - } - #[doc = "Bit 1 - External Reset Status"] - #[inline(always)] - pub fn extrst(&mut self) -> EXTRST_W { - EXTRST_W { w: self } - } - #[doc = "Bit 2 - SYSRESETREQ Reset Status"] - #[inline(always)] - pub fn sysrstreq(&mut self) -> SYSRSTREQ_W { - SYSRSTREQ_W { w: self } - } - #[doc = "Bit 3 - LOOKUP Reset Status"] - #[inline(always)] - pub fn lookup(&mut self) -> LOOKUP_W { - LOOKUP_W { w: self } - } - #[doc = "Bit 4 - WATCHDOG Reset Status"] - #[inline(always)] - pub fn watchdog(&mut self) -> WATCHDOG_W { - WATCHDOG_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "ROM Reset Control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rst_cntl_rom](index.html) module"] -pub struct RST_CNTL_ROM_SPEC; -impl crate::RegisterSpec for RST_CNTL_ROM_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [rst_cntl_rom::R](R) reader structure"] -impl crate::Readable for RST_CNTL_ROM_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [rst_cntl_rom::W](W) writer structure"] -impl crate::Writable for RST_CNTL_ROM_SPEC { - type Writer = W; -} -#[doc = "`reset()` method sets RST_CNTL_ROM to value 0x3f"] -impl crate::Resettable for RST_CNTL_ROM_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0x3f - } -} diff --git a/va416xx/src/sysconfig/rst_stat.rs b/va416xx/src/sysconfig/rst_stat.rs index d744136..2424cab 100644 --- a/va416xx/src/sysconfig/rst_stat.rs +++ b/va416xx/src/sysconfig/rst_stat.rs @@ -1,321 +1,107 @@ #[doc = "Register `RST_STAT` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RST_STAT` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `POR` reader - Power On Reset Status"] -pub struct POR_R(crate::FieldReader); -impl POR_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - POR_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for POR_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type PorR = crate::BitReader; #[doc = "Field `POR` writer - Power On Reset Status"] -pub struct POR_W<'a> { - w: &'a mut W, -} -impl<'a> POR_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} +pub type PorW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EXTRST` reader - External Reset Status"] -pub struct EXTRST_R(crate::FieldReader); -impl EXTRST_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - EXTRST_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for EXTRST_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type ExtrstR = crate::BitReader; #[doc = "Field `EXTRST` writer - External Reset Status"] -pub struct EXTRST_W<'a> { - w: &'a mut W, -} -impl<'a> EXTRST_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); - self.w - } -} +pub type ExtrstW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SYSRSTREQ` reader - SYSRESETREQ Reset Status"] -pub struct SYSRSTREQ_R(crate::FieldReader); -impl SYSRSTREQ_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - SYSRSTREQ_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for SYSRSTREQ_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type SysrstreqR = crate::BitReader; #[doc = "Field `SYSRSTREQ` writer - SYSRESETREQ Reset Status"] -pub struct SYSRSTREQ_W<'a> { - w: &'a mut W, -} -impl<'a> SYSRSTREQ_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); - self.w - } -} +pub type SysrstreqW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LOOKUP` reader - LOOKUP Reset Status"] -pub struct LOOKUP_R(crate::FieldReader); -impl LOOKUP_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - LOOKUP_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for LOOKUP_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type LookupR = crate::BitReader; #[doc = "Field `LOOKUP` writer - LOOKUP Reset Status"] -pub struct LOOKUP_W<'a> { - w: &'a mut W, -} -impl<'a> LOOKUP_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); - self.w - } -} +pub type LookupW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WATCHDOG` reader - WATCHDOG Reset Status"] -pub struct WATCHDOG_R(crate::FieldReader); -impl WATCHDOG_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - WATCHDOG_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for WATCHDOG_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type WatchdogR = crate::BitReader; #[doc = "Field `WATCHDOG` writer - WATCHDOG Reset Status"] -pub struct WATCHDOG_W<'a> { - w: &'a mut W, -} -impl<'a> WATCHDOG_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); - self.w - } -} +pub type WatchdogW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MEMERR` reader - Memory Error Reset Status"] -pub struct MEMERR_R(crate::FieldReader); -impl MEMERR_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - MEMERR_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for MEMERR_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type MemerrR = crate::BitReader; impl R { #[doc = "Bit 0 - Power On Reset Status"] #[inline(always)] - pub fn por(&self) -> POR_R { - POR_R::new((self.bits & 0x01) != 0) + pub fn por(&self) -> PorR { + PorR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - External Reset Status"] #[inline(always)] - pub fn extrst(&self) -> EXTRST_R { - EXTRST_R::new(((self.bits >> 1) & 0x01) != 0) + pub fn extrst(&self) -> ExtrstR { + ExtrstR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - SYSRESETREQ Reset Status"] #[inline(always)] - pub fn sysrstreq(&self) -> SYSRSTREQ_R { - SYSRSTREQ_R::new(((self.bits >> 2) & 0x01) != 0) + pub fn sysrstreq(&self) -> SysrstreqR { + SysrstreqR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - LOOKUP Reset Status"] #[inline(always)] - pub fn lookup(&self) -> LOOKUP_R { - LOOKUP_R::new(((self.bits >> 3) & 0x01) != 0) + pub fn lookup(&self) -> LookupR { + LookupR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - WATCHDOG Reset Status"] #[inline(always)] - pub fn watchdog(&self) -> WATCHDOG_R { - WATCHDOG_R::new(((self.bits >> 4) & 0x01) != 0) + pub fn watchdog(&self) -> WatchdogR { + WatchdogR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Memory Error Reset Status"] #[inline(always)] - pub fn memerr(&self) -> MEMERR_R { - MEMERR_R::new(((self.bits >> 5) & 0x01) != 0) + pub fn memerr(&self) -> MemerrR { + MemerrR::new(((self.bits >> 5) & 1) != 0) } } impl W { #[doc = "Bit 0 - Power On Reset Status"] #[inline(always)] - pub fn por(&mut self) -> POR_W { - POR_W { w: self } + #[must_use] + pub fn por(&mut self) -> PorW { + PorW::new(self, 0) } #[doc = "Bit 1 - External Reset Status"] #[inline(always)] - pub fn extrst(&mut self) -> EXTRST_W { - EXTRST_W { w: self } + #[must_use] + pub fn extrst(&mut self) -> ExtrstW { + ExtrstW::new(self, 1) } #[doc = "Bit 2 - SYSRESETREQ Reset Status"] #[inline(always)] - pub fn sysrstreq(&mut self) -> SYSRSTREQ_W { - SYSRSTREQ_W { w: self } + #[must_use] + pub fn sysrstreq(&mut self) -> SysrstreqW { + SysrstreqW::new(self, 2) } #[doc = "Bit 3 - LOOKUP Reset Status"] #[inline(always)] - pub fn lookup(&mut self) -> LOOKUP_W { - LOOKUP_W { w: self } + #[must_use] + pub fn lookup(&mut self) -> LookupW { + LookupW::new(self, 3) } #[doc = "Bit 4 - WATCHDOG Reset Status"] #[inline(always)] - pub fn watchdog(&mut self) -> WATCHDOG_W { - WATCHDOG_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn watchdog(&mut self) -> WatchdogW { + WatchdogW::new(self, 4) } } -#[doc = "System Reset Status\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rst_stat](index.html) module"] -pub struct RST_STAT_SPEC; -impl crate::RegisterSpec for RST_STAT_SPEC { +#[doc = "System Reset Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rst_stat::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rst_stat::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RstStatSpec; +impl crate::RegisterSpec for RstStatSpec { type Ux = u32; } -#[doc = "`read()` method returns [rst_stat::R](R) reader structure"] -impl crate::Readable for RST_STAT_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [rst_stat::W](W) writer structure"] -impl crate::Writable for RST_STAT_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`rst_stat::R`](R) reader structure"] +impl crate::Readable for RstStatSpec {} +#[doc = "`write(|w| ..)` method takes [`rst_stat::W`](W) writer structure"] +impl crate::Writable for RstStatSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RST_STAT to value 0"] -impl crate::Resettable for RST_STAT_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for RstStatSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/sysconfig/spw_m4_ctrl.rs b/va416xx/src/sysconfig/spw_m4_ctrl.rs index 7e4494d..98b6e0e 100644 --- a/va416xx/src/sysconfig/spw_m4_ctrl.rs +++ b/va416xx/src/sysconfig/spw_m4_ctrl.rs @@ -1,197 +1,70 @@ #[doc = "Register `SPW_M4_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SPW_M4_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `LREN` reader - Lockup reset enable"] -pub struct LREN_R(crate::FieldReader); -impl LREN_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - LREN_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for LREN_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `LREN` writer - Lockup reset enable"] -pub struct LREN_W<'a> { - w: &'a mut W, -} -impl<'a> LREN_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 17)) | ((value as u32 & 0x01) << 17); - self.w - } -} -#[doc = "Field `SPW_PAD_EN` reader - SPW pad enable"] -pub struct SPW_PAD_EN_R(crate::FieldReader); -impl SPW_PAD_EN_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - SPW_PAD_EN_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for SPW_PAD_EN_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `SPW_PAD_EN` writer - SPW pad enable"] -pub struct SPW_PAD_EN_W<'a> { - w: &'a mut W, -} -impl<'a> SPW_PAD_EN_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16); - self.w - } -} +pub type W = crate::W; #[doc = "Field `REG_WR_KEY` reader - Fuse-analog register writes enabled when key = 0xfeed"] -pub struct REG_WR_KEY_R(crate::FieldReader); -impl REG_WR_KEY_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - REG_WR_KEY_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for REG_WR_KEY_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type RegWrKeyR = crate::FieldReader; #[doc = "Field `REG_WR_KEY` writer - Fuse-analog register writes enabled when key = 0xfeed"] -pub struct REG_WR_KEY_W<'a> { - w: &'a mut W, -} -impl<'a> REG_WR_KEY_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); - self.w - } -} +pub type RegWrKeyW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +#[doc = "Field `SPW_PAD_EN` reader - SPW pad enable"] +pub type SpwPadEnR = crate::BitReader; +#[doc = "Field `SPW_PAD_EN` writer - SPW pad enable"] +pub type SpwPadEnW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `LREN` reader - Lockup reset enable"] +pub type LrenR = crate::BitReader; +#[doc = "Field `LREN` writer - Lockup reset enable"] +pub type LrenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { - #[doc = "Bit 17 - Lockup reset enable"] + #[doc = "Bits 0:15 - Fuse-analog register writes enabled when key = 0xfeed"] #[inline(always)] - pub fn lren(&self) -> LREN_R { - LREN_R::new(((self.bits >> 17) & 0x01) != 0) + pub fn reg_wr_key(&self) -> RegWrKeyR { + RegWrKeyR::new((self.bits & 0xffff) as u16) } #[doc = "Bit 16 - SPW pad enable"] #[inline(always)] - pub fn spw_pad_en(&self) -> SPW_PAD_EN_R { - SPW_PAD_EN_R::new(((self.bits >> 16) & 0x01) != 0) + pub fn spw_pad_en(&self) -> SpwPadEnR { + SpwPadEnR::new(((self.bits >> 16) & 1) != 0) } - #[doc = "Bits 0:15 - Fuse-analog register writes enabled when key = 0xfeed"] + #[doc = "Bit 17 - Lockup reset enable"] #[inline(always)] - pub fn reg_wr_key(&self) -> REG_WR_KEY_R { - REG_WR_KEY_R::new((self.bits & 0xffff) as u16) + pub fn lren(&self) -> LrenR { + LrenR::new(((self.bits >> 17) & 1) != 0) } } impl W { - #[doc = "Bit 17 - Lockup reset enable"] + #[doc = "Bits 0:15 - Fuse-analog register writes enabled when key = 0xfeed"] #[inline(always)] - pub fn lren(&mut self) -> LREN_W { - LREN_W { w: self } + #[must_use] + pub fn reg_wr_key(&mut self) -> RegWrKeyW { + RegWrKeyW::new(self, 0) } #[doc = "Bit 16 - SPW pad enable"] #[inline(always)] - pub fn spw_pad_en(&mut self) -> SPW_PAD_EN_W { - SPW_PAD_EN_W { w: self } + #[must_use] + pub fn spw_pad_en(&mut self) -> SpwPadEnW { + SpwPadEnW::new(self, 16) } - #[doc = "Bits 0:15 - Fuse-analog register writes enabled when key = 0xfeed"] + #[doc = "Bit 17 - Lockup reset enable"] #[inline(always)] - pub fn reg_wr_key(&mut self) -> REG_WR_KEY_W { - REG_WR_KEY_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn lren(&mut self) -> LrenW { + LrenW::new(self, 17) } } -#[doc = "SPW M4 control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [spw_m4_ctrl](index.html) module"] -pub struct SPW_M4_CTRL_SPEC; -impl crate::RegisterSpec for SPW_M4_CTRL_SPEC { +#[doc = "SPW M4 control register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`spw_m4_ctrl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`spw_m4_ctrl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SpwM4CtrlSpec; +impl crate::RegisterSpec for SpwM4CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [spw_m4_ctrl::R](R) reader structure"] -impl crate::Readable for SPW_M4_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [spw_m4_ctrl::W](W) writer structure"] -impl crate::Writable for SPW_M4_CTRL_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`spw_m4_ctrl::R`](R) reader structure"] +impl crate::Readable for SpwM4CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`spw_m4_ctrl::W`](W) writer structure"] +impl crate::Writable for SpwM4CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SPW_M4_CTRL to value 0x0003_0000"] -impl crate::Resettable for SPW_M4_CTRL_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0x0003_0000 - } +impl crate::Resettable for SpwM4CtrlSpec { + const RESET_VALUE: u32 = 0x0003_0000; } diff --git a/va416xx/src/sysconfig/sw_clkdiv10.rs b/va416xx/src/sysconfig/sw_clkdiv10.rs index 6182166..966c53e 100644 --- a/va416xx/src/sysconfig/sw_clkdiv10.rs +++ b/va416xx/src/sysconfig/sw_clkdiv10.rs @@ -1,103 +1,40 @@ #[doc = "Register `SW_CLKDIV10` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SW_CLKDIV10` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SW_CLKDIV10` reader - Defines the initial value for the SpW clock, defaults to divide by ten"] -pub struct SW_CLKDIV10_R(crate::FieldReader); -impl SW_CLKDIV10_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - SW_CLKDIV10_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for SW_CLKDIV10_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type SwClkdiv10R = crate::FieldReader; #[doc = "Field `SW_CLKDIV10` writer - Defines the initial value for the SpW clock, defaults to divide by ten"] -pub struct SW_CLKDIV10_W<'a> { - w: &'a mut W, -} -impl<'a> SW_CLKDIV10_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type SwClkdiv10W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Defines the initial value for the SpW clock, defaults to divide by ten"] #[inline(always)] - pub fn sw_clkdiv10(&self) -> SW_CLKDIV10_R { - SW_CLKDIV10_R::new((self.bits & 0xff) as u8) + pub fn sw_clkdiv10(&self) -> SwClkdiv10R { + SwClkdiv10R::new((self.bits & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Defines the initial value for the SpW clock, defaults to divide by ten"] #[inline(always)] - pub fn sw_clkdiv10(&mut self) -> SW_CLKDIV10_W { - SW_CLKDIV10_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn sw_clkdiv10(&mut self) -> SwClkdiv10W { + SwClkdiv10W::new(self, 0) } } -#[doc = "Initial SpW Clock Divider Value\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sw_clkdiv10](index.html) module"] -pub struct SW_CLKDIV10_SPEC; -impl crate::RegisterSpec for SW_CLKDIV10_SPEC { +#[doc = "Initial SpW Clock Divider Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sw_clkdiv10::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sw_clkdiv10::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SwClkdiv10Spec; +impl crate::RegisterSpec for SwClkdiv10Spec { type Ux = u32; } -#[doc = "`read()` method returns [sw_clkdiv10::R](R) reader structure"] -impl crate::Readable for SW_CLKDIV10_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [sw_clkdiv10::W](W) writer structure"] -impl crate::Writable for SW_CLKDIV10_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`sw_clkdiv10::R`](R) reader structure"] +impl crate::Readable for SwClkdiv10Spec {} +#[doc = "`write(|w| ..)` method takes [`sw_clkdiv10::W`](W) writer structure"] +impl crate::Writable for SwClkdiv10Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SW_CLKDIV10 to value 0x09"] -impl crate::Resettable for SW_CLKDIV10_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0x09 - } +impl crate::Resettable for SwClkdiv10Spec { + const RESET_VALUE: u32 = 0x09; } diff --git a/va416xx/src/sysconfig/tim_clk_enable.rs b/va416xx/src/sysconfig/tim_clk_enable.rs index 2396067..20fbf6d 100644 --- a/va416xx/src/sysconfig/tim_clk_enable.rs +++ b/va416xx/src/sysconfig/tim_clk_enable.rs @@ -1,103 +1,40 @@ #[doc = "Register `TIM_CLK_ENABLE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIM_CLK_ENABLE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TIMERS` reader - Clock enable of a given TIMER"] -pub struct TIMERS_R(crate::FieldReader); -impl TIMERS_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - TIMERS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TIMERS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type TimersR = crate::FieldReader; #[doc = "Field `TIMERS` writer - Clock enable of a given TIMER"] -pub struct TIMERS_W<'a> { - w: &'a mut W, -} -impl<'a> TIMERS_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - self.w.bits = (self.w.bits & !0x00ff_ffff) | (value as u32 & 0x00ff_ffff); - self.w - } -} +pub type TimersW<'a, REG> = crate::FieldWriter<'a, REG, 24, u32>; impl R { #[doc = "Bits 0:23 - Clock enable of a given TIMER"] #[inline(always)] - pub fn timers(&self) -> TIMERS_R { - TIMERS_R::new((self.bits & 0x00ff_ffff) as u32) + pub fn timers(&self) -> TimersR { + TimersR::new(self.bits & 0x00ff_ffff) } } impl W { #[doc = "Bits 0:23 - Clock enable of a given TIMER"] #[inline(always)] - pub fn timers(&mut self) -> TIMERS_W { - TIMERS_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn timers(&mut self) -> TimersW { + TimersW::new(self, 0) } } -#[doc = "TIM Enable Control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tim_clk_enable](index.html) module"] -pub struct TIM_CLK_ENABLE_SPEC; -impl crate::RegisterSpec for TIM_CLK_ENABLE_SPEC { +#[doc = "TIM Enable Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tim_clk_enable::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tim_clk_enable::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TimClkEnableSpec; +impl crate::RegisterSpec for TimClkEnableSpec { type Ux = u32; } -#[doc = "`read()` method returns [tim_clk_enable::R](R) reader structure"] -impl crate::Readable for TIM_CLK_ENABLE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [tim_clk_enable::W](W) writer structure"] -impl crate::Writable for TIM_CLK_ENABLE_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`tim_clk_enable::R`](R) reader structure"] +impl crate::Readable for TimClkEnableSpec {} +#[doc = "`write(|w| ..)` method takes [`tim_clk_enable::W`](W) writer structure"] +impl crate::Writable for TimClkEnableSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIM_CLK_ENABLE to value 0"] -impl crate::Resettable for TIM_CLK_ENABLE_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for TimClkEnableSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/sysconfig/tim_reset.rs b/va416xx/src/sysconfig/tim_reset.rs index f757e09..dee7acf 100644 --- a/va416xx/src/sysconfig/tim_reset.rs +++ b/va416xx/src/sysconfig/tim_reset.rs @@ -1,103 +1,40 @@ #[doc = "Register `TIM_RESET` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIM_RESET` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TIM_RESET` reader - Reset of a given TIMER"] -pub struct TIM_RESET_R(crate::FieldReader); -impl TIM_RESET_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - TIM_RESET_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TIM_RESET_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type TimResetR = crate::FieldReader; #[doc = "Field `TIM_RESET` writer - Reset of a given TIMER"] -pub struct TIM_RESET_W<'a> { - w: &'a mut W, -} -impl<'a> TIM_RESET_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - self.w.bits = (self.w.bits & !0x00ff_ffff) | (value as u32 & 0x00ff_ffff); - self.w - } -} +pub type TimResetW<'a, REG> = crate::FieldWriter<'a, REG, 24, u32>; impl R { #[doc = "Bits 0:23 - Reset of a given TIMER"] #[inline(always)] - pub fn tim_reset(&self) -> TIM_RESET_R { - TIM_RESET_R::new((self.bits & 0x00ff_ffff) as u32) + pub fn tim_reset(&self) -> TimResetR { + TimResetR::new(self.bits & 0x00ff_ffff) } } impl W { #[doc = "Bits 0:23 - Reset of a given TIMER"] #[inline(always)] - pub fn tim_reset(&mut self) -> TIM_RESET_W { - TIM_RESET_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn tim_reset(&mut self) -> TimResetW { + TimResetW::new(self, 0) } } -#[doc = "TIM Reset Control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tim_reset](index.html) module"] -pub struct TIM_RESET_SPEC; -impl crate::RegisterSpec for TIM_RESET_SPEC { +#[doc = "TIM Reset Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tim_reset::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tim_reset::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TimResetSpec; +impl crate::RegisterSpec for TimResetSpec { type Ux = u32; } -#[doc = "`read()` method returns [tim_reset::R](R) reader structure"] -impl crate::Readable for TIM_RESET_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [tim_reset::W](W) writer structure"] -impl crate::Writable for TIM_RESET_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`tim_reset::R`](R) reader structure"] +impl crate::Readable for TimResetSpec {} +#[doc = "`write(|w| ..)` method takes [`tim_reset::W`](W) writer structure"] +impl crate::Writable for TimResetSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIM_RESET to value 0xffff_ffff"] -impl crate::Resettable for TIM_RESET_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0xffff_ffff - } +impl crate::Resettable for TimResetSpec { + const RESET_VALUE: u32 = 0xffff_ffff; } diff --git a/va416xx/src/sysconfig/wakeup_cnt.rs b/va416xx/src/sysconfig/wakeup_cnt.rs index f64edfd..d83ae80 100644 --- a/va416xx/src/sysconfig/wakeup_cnt.rs +++ b/va416xx/src/sysconfig/wakeup_cnt.rs @@ -1,150 +1,55 @@ #[doc = "Register `WAKEUP_CNT` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `WAKEUP_CNT` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `CNTSTRT` reader - Launch SLP mode in analog block"] -pub struct CNTSTRT_R(crate::FieldReader); -impl CNTSTRT_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CNTSTRT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CNTSTRT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CNTSTRT` writer - Launch SLP mode in analog block"] -pub struct CNTSTRT_W<'a> { - w: &'a mut W, -} -impl<'a> CNTSTRT_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); - self.w - } -} +pub type W = crate::W; #[doc = "Field `WKUP_CNT` reader - Used to set a time to wake up the processor after the device has been put in a low power state"] -pub struct WKUP_CNT_R(crate::FieldReader); -impl WKUP_CNT_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - WKUP_CNT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for WKUP_CNT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type WkupCntR = crate::FieldReader; #[doc = "Field `WKUP_CNT` writer - Used to set a time to wake up the processor after the device has been put in a low power state"] -pub struct WKUP_CNT_W<'a> { - w: &'a mut W, -} -impl<'a> WKUP_CNT_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0x07) | (value as u32 & 0x07); - self.w - } -} +pub type WkupCntW<'a, REG> = crate::FieldWriter<'a, REG, 3>; +#[doc = "Field `CNTSTRT` reader - Launch SLP mode in analog block"] +pub type CntstrtR = crate::BitReader; +#[doc = "Field `CNTSTRT` writer - Launch SLP mode in analog block"] +pub type CntstrtW<'a, REG> = crate::BitWriter<'a, REG>; impl R { - #[doc = "Bit 3 - Launch SLP mode in analog block"] - #[inline(always)] - pub fn cntstrt(&self) -> CNTSTRT_R { - CNTSTRT_R::new(((self.bits >> 3) & 0x01) != 0) - } #[doc = "Bits 0:2 - Used to set a time to wake up the processor after the device has been put in a low power state"] #[inline(always)] - pub fn wkup_cnt(&self) -> WKUP_CNT_R { - WKUP_CNT_R::new((self.bits & 0x07) as u8) + pub fn wkup_cnt(&self) -> WkupCntR { + WkupCntR::new((self.bits & 7) as u8) + } + #[doc = "Bit 3 - Launch SLP mode in analog block"] + #[inline(always)] + pub fn cntstrt(&self) -> CntstrtR { + CntstrtR::new(((self.bits >> 3) & 1) != 0) } } impl W { - #[doc = "Bit 3 - Launch SLP mode in analog block"] - #[inline(always)] - pub fn cntstrt(&mut self) -> CNTSTRT_W { - CNTSTRT_W { w: self } - } #[doc = "Bits 0:2 - Used to set a time to wake up the processor after the device has been put in a low power state"] #[inline(always)] - pub fn wkup_cnt(&mut self) -> WKUP_CNT_W { - WKUP_CNT_W { w: self } + #[must_use] + pub fn wkup_cnt(&mut self) -> WkupCntW { + WkupCntW::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bit 3 - Launch SLP mode in analog block"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn cntstrt(&mut self) -> CntstrtW { + CntstrtW::new(self, 3) } } -#[doc = "Wakeup Control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [wakeup_cnt](index.html) module"] -pub struct WAKEUP_CNT_SPEC; -impl crate::RegisterSpec for WAKEUP_CNT_SPEC { +#[doc = "Wakeup Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wakeup_cnt::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`wakeup_cnt::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct WakeupCntSpec; +impl crate::RegisterSpec for WakeupCntSpec { type Ux = u32; } -#[doc = "`read()` method returns [wakeup_cnt::R](R) reader structure"] -impl crate::Readable for WAKEUP_CNT_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [wakeup_cnt::W](W) writer structure"] -impl crate::Writable for WAKEUP_CNT_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`wakeup_cnt::R`](R) reader structure"] +impl crate::Readable for WakeupCntSpec {} +#[doc = "`write(|w| ..)` method takes [`wakeup_cnt::W`](W) writer structure"] +impl crate::Writable for WakeupCntSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets WAKEUP_CNT to value 0x07"] -impl crate::Resettable for WAKEUP_CNT_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0x07 - } +impl crate::Resettable for WakeupCntSpec { + const RESET_VALUE: u32 = 0x07; } diff --git a/va416xx/src/tim0.rs b/va416xx/src/tim0.rs index cf035f6..2423944 100644 --- a/va416xx/src/tim0.rs +++ b/va416xx/src/tim0.rs @@ -1,92 +1,142 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - #[doc = "0x00 - Control Register"] - pub ctrl: crate::Reg, - #[doc = "0x04 - The value that counter start from after reaching 0."] - pub rst_value: crate::Reg, - #[doc = "0x08 - The current value of the counter"] - pub cnt_value: crate::Reg, - #[doc = "0x0c - Alternate access to the Counter ENABLE bit in the CTRL Register"] - pub enable: crate::Reg, - #[doc = "0x10 - The Cascade Control Register. Controls the counter external enable signals"] - pub csd_ctrl: crate::Reg, - #[doc = "0x14 - Cascade Enable Selection"] - pub cascade0: crate::Reg, - #[doc = "0x18 - Cascade Enable Selection"] - pub cascade1: crate::Reg, - #[doc = "0x1c - Cascade Enable Selection"] - pub cascade2: crate::Reg, + ctrl: Ctrl, + rst_value: RstValue, + cnt_value: CntValue, + enable: Enable, + csd_ctrl: CsdCtrl, + cascade0: Cascade0, + cascade1: Cascade1, + cascade2: Cascade2, _reserved_8_pwm_value: [u8; 0x04], - #[doc = "0x24 - The Pulse Width Modulation ValueB"] - pub pwmb_value: crate::Reg, + pwmb_value: PwmbValue, _reserved10: [u8; 0x03d4], - #[doc = "0x3fc - Peripheral ID Register"] - pub perid: crate::Reg, + perid: Perid, } impl RegisterBlock { + #[doc = "0x00 - Control Register"] + #[inline(always)] + pub const fn ctrl(&self) -> &Ctrl { + &self.ctrl + } + #[doc = "0x04 - The value that counter start from after reaching 0."] + #[inline(always)] + pub const fn rst_value(&self) -> &RstValue { + &self.rst_value + } + #[doc = "0x08 - The current value of the counter"] + #[inline(always)] + pub const fn cnt_value(&self) -> &CntValue { + &self.cnt_value + } + #[doc = "0x0c - Alternate access to the Counter ENABLE bit in the CTRL Register"] + #[inline(always)] + pub const fn enable(&self) -> &Enable { + &self.enable + } + #[doc = "0x10 - The Cascade Control Register. Controls the counter external enable signals"] + #[inline(always)] + pub const fn csd_ctrl(&self) -> &CsdCtrl { + &self.csd_ctrl + } + #[doc = "0x14 - Cascade Enable Selection"] + #[inline(always)] + pub const fn cascade0(&self) -> &Cascade0 { + &self.cascade0 + } + #[doc = "0x18 - Cascade Enable Selection"] + #[inline(always)] + pub const fn cascade1(&self) -> &Cascade1 { + &self.cascade1 + } + #[doc = "0x1c - Cascade Enable Selection"] + #[inline(always)] + pub const fn cascade2(&self) -> &Cascade2 { + &self.cascade2 + } #[doc = "0x20 - The Pulse Width Modulation ValueA"] #[inline(always)] - pub fn pwma_value(&self) -> &crate::Reg { - unsafe { - &*(((self as *const Self) as *const u8).add(32usize) - as *const crate::Reg) - } + pub const fn pwma_value(&self) -> &PwmaValue { + unsafe { &*(self as *const Self).cast::().add(32).cast() } } #[doc = "0x20 - The Pulse Width Modulation Value"] #[inline(always)] - pub fn pwm_value(&self) -> &crate::Reg { - unsafe { - &*(((self as *const Self) as *const u8).add(32usize) - as *const crate::Reg) - } + pub const fn pwm_value(&self) -> &PwmValue { + unsafe { &*(self as *const Self).cast::().add(32).cast() } + } + #[doc = "0x24 - The Pulse Width Modulation ValueB"] + #[inline(always)] + pub const fn pwmb_value(&self) -> &PwmbValue { + &self.pwmb_value + } + #[doc = "0x3fc - Peripheral ID Register"] + #[inline(always)] + pub const fn perid(&self) -> &Perid { + &self.perid } } -#[doc = "CTRL register accessor: an alias for `Reg`"] -pub type CTRL = crate::Reg; +#[doc = "CTRL (rw) register accessor: Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`] +module"] +#[doc(alias = "CTRL")] +pub type Ctrl = crate::Reg; #[doc = "Control Register"] pub mod ctrl; -#[doc = "RST_VALUE register accessor: an alias for `Reg`"] -pub type RST_VALUE = crate::Reg; +#[doc = "RST_VALUE (rw) register accessor: The value that counter start from after reaching 0.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rst_value::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rst_value::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rst_value`] +module"] +#[doc(alias = "RST_VALUE")] +pub type RstValue = crate::Reg; #[doc = "The value that counter start from after reaching 0."] pub mod rst_value; -#[doc = "CNT_VALUE register accessor: an alias for `Reg`"] -pub type CNT_VALUE = crate::Reg; +#[doc = "CNT_VALUE (rw) register accessor: The current value of the counter\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cnt_value::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cnt_value::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnt_value`] +module"] +#[doc(alias = "CNT_VALUE")] +pub type CntValue = crate::Reg; #[doc = "The current value of the counter"] pub mod cnt_value; -#[doc = "ENABLE register accessor: an alias for `Reg`"] -pub type ENABLE = crate::Reg; +#[doc = "ENABLE (rw) register accessor: Alternate access to the Counter ENABLE bit in the CTRL Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`enable::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`enable::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@enable`] +module"] +#[doc(alias = "ENABLE")] +pub type Enable = crate::Reg; #[doc = "Alternate access to the Counter ENABLE bit in the CTRL Register"] pub mod enable; -#[doc = "CSD_CTRL register accessor: an alias for `Reg`"] -pub type CSD_CTRL = crate::Reg; +#[doc = "CSD_CTRL (rw) register accessor: The Cascade Control Register. Controls the counter external enable signals\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`csd_ctrl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`csd_ctrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@csd_ctrl`] +module"] +#[doc(alias = "CSD_CTRL")] +pub type CsdCtrl = crate::Reg; #[doc = "The Cascade Control Register. Controls the counter external enable signals"] pub mod csd_ctrl; -#[doc = "CASCADE0 register accessor: an alias for `Reg`"] -pub type CASCADE0 = crate::Reg; +#[doc = "CASCADE0 (rw) register accessor: Cascade Enable Selection\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cascade0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cascade0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cascade0`] +module"] +#[doc(alias = "CASCADE0")] +pub type Cascade0 = crate::Reg; #[doc = "Cascade Enable Selection"] pub mod cascade0; -#[doc = "CASCADE1 register accessor: an alias for `Reg`"] -pub type CASCADE1 = crate::Reg; -#[doc = "Cascade Enable Selection"] -pub mod cascade1; -#[doc = "CASCADE2 register accessor: an alias for `Reg`"] -pub type CASCADE2 = crate::Reg; -#[doc = "Cascade Enable Selection"] -pub mod cascade2; -#[doc = "PWM_VALUE register accessor: an alias for `Reg`"] -pub type PWM_VALUE = crate::Reg; +pub use cascade0 as cascade1; +pub use cascade0 as cascade2; +pub use Cascade0 as Cascade1; +pub use Cascade0 as Cascade2; +#[doc = "PWM_VALUE (rw) register accessor: The Pulse Width Modulation Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pwm_value::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pwm_value::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pwm_value`] +module"] +#[doc(alias = "PWM_VALUE")] +pub type PwmValue = crate::Reg; #[doc = "The Pulse Width Modulation Value"] pub mod pwm_value; -#[doc = "PWMA_VALUE register accessor: an alias for `Reg`"] -pub type PWMA_VALUE = crate::Reg; +#[doc = "PWMA_VALUE (rw) register accessor: The Pulse Width Modulation ValueA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pwma_value::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pwma_value::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pwma_value`] +module"] +#[doc(alias = "PWMA_VALUE")] +pub type PwmaValue = crate::Reg; #[doc = "The Pulse Width Modulation ValueA"] pub mod pwma_value; -#[doc = "PWMB_VALUE register accessor: an alias for `Reg`"] -pub type PWMB_VALUE = crate::Reg; +#[doc = "PWMB_VALUE (rw) register accessor: The Pulse Width Modulation ValueB\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pwmb_value::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pwmb_value::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pwmb_value`] +module"] +#[doc(alias = "PWMB_VALUE")] +pub type PwmbValue = crate::Reg; #[doc = "The Pulse Width Modulation ValueB"] pub mod pwmb_value; -#[doc = "PERID register accessor: an alias for `Reg`"] -pub type PERID = crate::Reg; +#[doc = "PERID (r) register accessor: Peripheral ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`perid::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@perid`] +module"] +#[doc(alias = "PERID")] +pub type Perid = crate::Reg; #[doc = "Peripheral ID Register"] pub mod perid; diff --git a/va416xx/src/tim0/cascade0.rs b/va416xx/src/tim0/cascade0.rs index b3a8955..984dd73 100644 --- a/va416xx/src/tim0/cascade0.rs +++ b/va416xx/src/tim0/cascade0.rs @@ -1,103 +1,40 @@ #[doc = "Register `CASCADE0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CASCADE0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CASSEL` reader - Cascade Selection"] -pub struct CASSEL_R(crate::FieldReader); -impl CASSEL_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - CASSEL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CASSEL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type CasselR = crate::FieldReader; #[doc = "Field `CASSEL` writer - Cascade Selection"] -pub struct CASSEL_W<'a> { - w: &'a mut W, -} -impl<'a> CASSEL_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} +pub type CasselW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Cascade Selection"] #[inline(always)] - pub fn cassel(&self) -> CASSEL_R { - CASSEL_R::new((self.bits & 0xff) as u8) + pub fn cassel(&self) -> CasselR { + CasselR::new((self.bits & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Cascade Selection"] #[inline(always)] - pub fn cassel(&mut self) -> CASSEL_W { - CASSEL_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn cassel(&mut self) -> CasselW { + CasselW::new(self, 0) } } -#[doc = "Cascade Enable Selection\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cascade0](index.html) module"] -pub struct CASCADE0_SPEC; -impl crate::RegisterSpec for CASCADE0_SPEC { +#[doc = "Cascade Enable Selection\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cascade0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cascade0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cascade0Spec; +impl crate::RegisterSpec for Cascade0Spec { type Ux = u32; } -#[doc = "`read()` method returns [cascade0::R](R) reader structure"] -impl crate::Readable for CASCADE0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cascade0::W](W) writer structure"] -impl crate::Writable for CASCADE0_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`cascade0::R`](R) reader structure"] +impl crate::Readable for Cascade0Spec {} +#[doc = "`write(|w| ..)` method takes [`cascade0::W`](W) writer structure"] +impl crate::Writable for Cascade0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CASCADE0 to value 0"] -impl crate::Resettable for CASCADE0_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Cascade0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/tim0/cascade1.rs b/va416xx/src/tim0/cascade1.rs deleted file mode 100644 index 6a962c0..0000000 --- a/va416xx/src/tim0/cascade1.rs +++ /dev/null @@ -1,103 +0,0 @@ -#[doc = "Register `CASCADE1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Register `CASCADE1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `CASSEL` reader - Cascade Selection"] -pub struct CASSEL_R(crate::FieldReader); -impl CASSEL_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - CASSEL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CASSEL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CASSEL` writer - Cascade Selection"] -pub struct CASSEL_W<'a> { - w: &'a mut W, -} -impl<'a> CASSEL_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} -impl R { - #[doc = "Bits 0:7 - Cascade Selection"] - #[inline(always)] - pub fn cassel(&self) -> CASSEL_R { - CASSEL_R::new((self.bits & 0xff) as u8) - } -} -impl W { - #[doc = "Bits 0:7 - Cascade Selection"] - #[inline(always)] - pub fn cassel(&mut self) -> CASSEL_W { - CASSEL_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "Cascade Enable Selection\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cascade1](index.html) module"] -pub struct CASCADE1_SPEC; -impl crate::RegisterSpec for CASCADE1_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [cascade1::R](R) reader structure"] -impl crate::Readable for CASCADE1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cascade1::W](W) writer structure"] -impl crate::Writable for CASCADE1_SPEC { - type Writer = W; -} -#[doc = "`reset()` method sets CASCADE1 to value 0"] -impl crate::Resettable for CASCADE1_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } -} diff --git a/va416xx/src/tim0/cascade2.rs b/va416xx/src/tim0/cascade2.rs deleted file mode 100644 index 905d693..0000000 --- a/va416xx/src/tim0/cascade2.rs +++ /dev/null @@ -1,103 +0,0 @@ -#[doc = "Register `CASCADE2` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Register `CASCADE2` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `CASSEL` reader - Cascade Selection"] -pub struct CASSEL_R(crate::FieldReader); -impl CASSEL_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - CASSEL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CASSEL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CASSEL` writer - Cascade Selection"] -pub struct CASSEL_W<'a> { - w: &'a mut W, -} -impl<'a> CASSEL_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); - self.w - } -} -impl R { - #[doc = "Bits 0:7 - Cascade Selection"] - #[inline(always)] - pub fn cassel(&self) -> CASSEL_R { - CASSEL_R::new((self.bits & 0xff) as u8) - } -} -impl W { - #[doc = "Bits 0:7 - Cascade Selection"] - #[inline(always)] - pub fn cassel(&mut self) -> CASSEL_W { - CASSEL_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "Cascade Enable Selection\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cascade2](index.html) module"] -pub struct CASCADE2_SPEC; -impl crate::RegisterSpec for CASCADE2_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [cascade2::R](R) reader structure"] -impl crate::Readable for CASCADE2_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cascade2::W](W) writer structure"] -impl crate::Writable for CASCADE2_SPEC { - type Writer = W; -} -#[doc = "`reset()` method sets CASCADE2 to value 0"] -impl crate::Resettable for CASCADE2_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } -} diff --git a/va416xx/src/tim0/cnt_value.rs b/va416xx/src/tim0/cnt_value.rs index cd498bb..f5ee38a 100644 --- a/va416xx/src/tim0/cnt_value.rs +++ b/va416xx/src/tim0/cnt_value.rs @@ -1,64 +1,27 @@ #[doc = "Register `CNT_VALUE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CNT_VALUE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 +pub type W = crate::W; +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) } } -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -impl W { - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "The current value of the counter\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cnt_value](index.html) module"] -pub struct CNT_VALUE_SPEC; -impl crate::RegisterSpec for CNT_VALUE_SPEC { +impl W {} +#[doc = "The current value of the counter\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cnt_value::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cnt_value::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CntValueSpec; +impl crate::RegisterSpec for CntValueSpec { type Ux = u32; } -#[doc = "`read()` method returns [cnt_value::R](R) reader structure"] -impl crate::Readable for CNT_VALUE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cnt_value::W](W) writer structure"] -impl crate::Writable for CNT_VALUE_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`cnt_value::R`](R) reader structure"] +impl crate::Readable for CntValueSpec {} +#[doc = "`write(|w| ..)` method takes [`cnt_value::W`](W) writer structure"] +impl crate::Writable for CntValueSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CNT_VALUE to value 0"] -impl crate::Resettable for CNT_VALUE_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for CntValueSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/tim0/csd_ctrl.rs b/va416xx/src/tim0/csd_ctrl.rs index 7b2f36d..d7827ed 100644 --- a/va416xx/src/tim0/csd_ctrl.rs +++ b/va416xx/src/tim0/csd_ctrl.rs @@ -1,536 +1,175 @@ #[doc = "Register `CSD_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CSD_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CSDEN0` reader - Cascade 0 Enable"] -pub struct CSDEN0_R(crate::FieldReader); -impl CSDEN0_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CSDEN0_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CSDEN0_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Csden0R = crate::BitReader; #[doc = "Field `CSDEN0` writer - Cascade 0 Enable"] -pub struct CSDEN0_W<'a> { - w: &'a mut W, -} -impl<'a> CSDEN0_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} +pub type Csden0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CSDINV0` reader - Cascade 0 Invert"] -pub struct CSDINV0_R(crate::FieldReader); -impl CSDINV0_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CSDINV0_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CSDINV0_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Csdinv0R = crate::BitReader; #[doc = "Field `CSDINV0` writer - Cascade 0 Invert"] -pub struct CSDINV0_W<'a> { - w: &'a mut W, -} -impl<'a> CSDINV0_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); - self.w - } -} +pub type Csdinv0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CSDEN1` reader - Cascade 1 Enable"] -pub struct CSDEN1_R(crate::FieldReader); -impl CSDEN1_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CSDEN1_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CSDEN1_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Csden1R = crate::BitReader; #[doc = "Field `CSDEN1` writer - Cascade 1 Enable"] -pub struct CSDEN1_W<'a> { - w: &'a mut W, -} -impl<'a> CSDEN1_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); - self.w - } -} +pub type Csden1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CSDINV1` reader - Cascade 1 Invert"] -pub struct CSDINV1_R(crate::FieldReader); -impl CSDINV1_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CSDINV1_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CSDINV1_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Csdinv1R = crate::BitReader; #[doc = "Field `CSDINV1` writer - Cascade 1 Invert"] -pub struct CSDINV1_W<'a> { - w: &'a mut W, -} -impl<'a> CSDINV1_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); - self.w - } -} +pub type Csdinv1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DCASOP` reader - Dual Cascade Operation (0:AND, 1:OR)"] -pub struct DCASOP_R(crate::FieldReader); -impl DCASOP_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - DCASOP_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for DCASOP_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type DcasopR = crate::BitReader; #[doc = "Field `DCASOP` writer - Dual Cascade Operation (0:AND, 1:OR)"] -pub struct DCASOP_W<'a> { - w: &'a mut W, -} -impl<'a> DCASOP_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); - self.w - } -} +pub type DcasopW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CSDTRG0` reader - Cascade 0 Enabled as Trigger"] -pub struct CSDTRG0_R(crate::FieldReader); -impl CSDTRG0_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CSDTRG0_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CSDTRG0_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Csdtrg0R = crate::BitReader; #[doc = "Field `CSDTRG0` writer - Cascade 0 Enabled as Trigger"] -pub struct CSDTRG0_W<'a> { - w: &'a mut W, -} -impl<'a> CSDTRG0_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); - self.w - } -} +pub type Csdtrg0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CSDTRG1` reader - Cascade 1 Enabled as Trigger"] -pub struct CSDTRG1_R(crate::FieldReader); -impl CSDTRG1_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CSDTRG1_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CSDTRG1_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Csdtrg1R = crate::BitReader; #[doc = "Field `CSDTRG1` writer - Cascade 1 Enabled as Trigger"] -pub struct CSDTRG1_W<'a> { - w: &'a mut W, -} -impl<'a> CSDTRG1_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); - self.w - } -} +pub type Csdtrg1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CSDEN2` reader - Cascade 2 Enable"] -pub struct CSDEN2_R(crate::FieldReader); -impl CSDEN2_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CSDEN2_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CSDEN2_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Csden2R = crate::BitReader; #[doc = "Field `CSDEN2` writer - Cascade 2 Enable"] -pub struct CSDEN2_W<'a> { - w: &'a mut W, -} -impl<'a> CSDEN2_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); - self.w - } -} +pub type Csden2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CSDINV2` reader - Cascade 2 Invert"] -pub struct CSDINV2_R(crate::FieldReader); -impl CSDINV2_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CSDINV2_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CSDINV2_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Csdinv2R = crate::BitReader; #[doc = "Field `CSDINV2` writer - Cascade 2 Invert"] -pub struct CSDINV2_W<'a> { - w: &'a mut W, -} -impl<'a> CSDINV2_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); - self.w - } -} +pub type Csdinv2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CSDTRG2` reader - Cascade 2 Trigger mode"] -pub struct CSDTRG2_R(crate::FieldReader); -impl CSDTRG2_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CSDTRG2_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CSDTRG2_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Csdtrg2R = crate::BitReader; #[doc = "Field `CSDTRG2` writer - Cascade 2 Trigger mode"] -pub struct CSDTRG2_W<'a> { - w: &'a mut W, -} -impl<'a> CSDTRG2_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); - self.w - } -} +pub type Csdtrg2W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Cascade 0 Enable"] #[inline(always)] - pub fn csden0(&self) -> CSDEN0_R { - CSDEN0_R::new((self.bits & 0x01) != 0) + pub fn csden0(&self) -> Csden0R { + Csden0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Cascade 0 Invert"] #[inline(always)] - pub fn csdinv0(&self) -> CSDINV0_R { - CSDINV0_R::new(((self.bits >> 1) & 0x01) != 0) + pub fn csdinv0(&self) -> Csdinv0R { + Csdinv0R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Cascade 1 Enable"] #[inline(always)] - pub fn csden1(&self) -> CSDEN1_R { - CSDEN1_R::new(((self.bits >> 2) & 0x01) != 0) + pub fn csden1(&self) -> Csden1R { + Csden1R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Cascade 1 Invert"] #[inline(always)] - pub fn csdinv1(&self) -> CSDINV1_R { - CSDINV1_R::new(((self.bits >> 3) & 0x01) != 0) + pub fn csdinv1(&self) -> Csdinv1R { + Csdinv1R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Dual Cascade Operation (0:AND, 1:OR)"] #[inline(always)] - pub fn dcasop(&self) -> DCASOP_R { - DCASOP_R::new(((self.bits >> 4) & 0x01) != 0) + pub fn dcasop(&self) -> DcasopR { + DcasopR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 6 - Cascade 0 Enabled as Trigger"] #[inline(always)] - pub fn csdtrg0(&self) -> CSDTRG0_R { - CSDTRG0_R::new(((self.bits >> 6) & 0x01) != 0) + pub fn csdtrg0(&self) -> Csdtrg0R { + Csdtrg0R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Cascade 1 Enabled as Trigger"] #[inline(always)] - pub fn csdtrg1(&self) -> CSDTRG1_R { - CSDTRG1_R::new(((self.bits >> 7) & 0x01) != 0) + pub fn csdtrg1(&self) -> Csdtrg1R { + Csdtrg1R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Cascade 2 Enable"] #[inline(always)] - pub fn csden2(&self) -> CSDEN2_R { - CSDEN2_R::new(((self.bits >> 8) & 0x01) != 0) + pub fn csden2(&self) -> Csden2R { + Csden2R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Cascade 2 Invert"] #[inline(always)] - pub fn csdinv2(&self) -> CSDINV2_R { - CSDINV2_R::new(((self.bits >> 9) & 0x01) != 0) + pub fn csdinv2(&self) -> Csdinv2R { + Csdinv2R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Cascade 2 Trigger mode"] #[inline(always)] - pub fn csdtrg2(&self) -> CSDTRG2_R { - CSDTRG2_R::new(((self.bits >> 10) & 0x01) != 0) + pub fn csdtrg2(&self) -> Csdtrg2R { + Csdtrg2R::new(((self.bits >> 10) & 1) != 0) } } impl W { #[doc = "Bit 0 - Cascade 0 Enable"] #[inline(always)] - pub fn csden0(&mut self) -> CSDEN0_W { - CSDEN0_W { w: self } + #[must_use] + pub fn csden0(&mut self) -> Csden0W { + Csden0W::new(self, 0) } #[doc = "Bit 1 - Cascade 0 Invert"] #[inline(always)] - pub fn csdinv0(&mut self) -> CSDINV0_W { - CSDINV0_W { w: self } + #[must_use] + pub fn csdinv0(&mut self) -> Csdinv0W { + Csdinv0W::new(self, 1) } #[doc = "Bit 2 - Cascade 1 Enable"] #[inline(always)] - pub fn csden1(&mut self) -> CSDEN1_W { - CSDEN1_W { w: self } + #[must_use] + pub fn csden1(&mut self) -> Csden1W { + Csden1W::new(self, 2) } #[doc = "Bit 3 - Cascade 1 Invert"] #[inline(always)] - pub fn csdinv1(&mut self) -> CSDINV1_W { - CSDINV1_W { w: self } + #[must_use] + pub fn csdinv1(&mut self) -> Csdinv1W { + Csdinv1W::new(self, 3) } #[doc = "Bit 4 - Dual Cascade Operation (0:AND, 1:OR)"] #[inline(always)] - pub fn dcasop(&mut self) -> DCASOP_W { - DCASOP_W { w: self } + #[must_use] + pub fn dcasop(&mut self) -> DcasopW { + DcasopW::new(self, 4) } #[doc = "Bit 6 - Cascade 0 Enabled as Trigger"] #[inline(always)] - pub fn csdtrg0(&mut self) -> CSDTRG0_W { - CSDTRG0_W { w: self } + #[must_use] + pub fn csdtrg0(&mut self) -> Csdtrg0W { + Csdtrg0W::new(self, 6) } #[doc = "Bit 7 - Cascade 1 Enabled as Trigger"] #[inline(always)] - pub fn csdtrg1(&mut self) -> CSDTRG1_W { - CSDTRG1_W { w: self } + #[must_use] + pub fn csdtrg1(&mut self) -> Csdtrg1W { + Csdtrg1W::new(self, 7) } #[doc = "Bit 8 - Cascade 2 Enable"] #[inline(always)] - pub fn csden2(&mut self) -> CSDEN2_W { - CSDEN2_W { w: self } + #[must_use] + pub fn csden2(&mut self) -> Csden2W { + Csden2W::new(self, 8) } #[doc = "Bit 9 - Cascade 2 Invert"] #[inline(always)] - pub fn csdinv2(&mut self) -> CSDINV2_W { - CSDINV2_W { w: self } + #[must_use] + pub fn csdinv2(&mut self) -> Csdinv2W { + Csdinv2W::new(self, 9) } #[doc = "Bit 10 - Cascade 2 Trigger mode"] #[inline(always)] - pub fn csdtrg2(&mut self) -> CSDTRG2_W { - CSDTRG2_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn csdtrg2(&mut self) -> Csdtrg2W { + Csdtrg2W::new(self, 10) } } -#[doc = "The Cascade Control Register. Controls the counter external enable signals\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [csd_ctrl](index.html) module"] -pub struct CSD_CTRL_SPEC; -impl crate::RegisterSpec for CSD_CTRL_SPEC { +#[doc = "The Cascade Control Register. Controls the counter external enable signals\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`csd_ctrl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`csd_ctrl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CsdCtrlSpec; +impl crate::RegisterSpec for CsdCtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [csd_ctrl::R](R) reader structure"] -impl crate::Readable for CSD_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [csd_ctrl::W](W) writer structure"] -impl crate::Writable for CSD_CTRL_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`csd_ctrl::R`](R) reader structure"] +impl crate::Readable for CsdCtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`csd_ctrl::W`](W) writer structure"] +impl crate::Writable for CsdCtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CSD_CTRL to value 0"] -impl crate::Resettable for CSD_CTRL_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for CsdCtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/tim0/ctrl.rs b/va416xx/src/tim0/ctrl.rs index 1d7f569..32b2b66 100644 --- a/va416xx/src/tim0/ctrl.rs +++ b/va416xx/src/tim0/ctrl.rs @@ -1,519 +1,258 @@ #[doc = "Register `CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `ENABLE` reader - Counter Enable"] -pub struct ENABLE_R(crate::FieldReader); -impl ENABLE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - ENABLE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ENABLE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type EnableR = crate::BitReader; #[doc = "Field `ENABLE` writer - Counter Enable"] -pub struct ENABLE_W<'a> { - w: &'a mut W, -} -impl<'a> ENABLE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} +pub type EnableW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ACTIVE` reader - Counter Active"] -pub struct ACTIVE_R(crate::FieldReader); -impl ACTIVE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - ACTIVE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ACTIVE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type ActiveR = crate::BitReader; #[doc = "Field `AUTO_DISABLE` reader - Auto Disables the counter (set ENABLE to 0) when the count reaches 0"] -pub struct AUTO_DISABLE_R(crate::FieldReader); -impl AUTO_DISABLE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - AUTO_DISABLE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for AUTO_DISABLE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type AutoDisableR = crate::BitReader; #[doc = "Field `AUTO_DISABLE` writer - Auto Disables the counter (set ENABLE to 0) when the count reaches 0"] -pub struct AUTO_DISABLE_W<'a> { - w: &'a mut W, -} -impl<'a> AUTO_DISABLE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); - self.w - } -} +pub type AutoDisableW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AUTO_DEACTIVATE` reader - Auto Deactivate the counter (set ACTIVE to 0) when the count reaches 0"] -pub struct AUTO_DEACTIVATE_R(crate::FieldReader); -impl AUTO_DEACTIVATE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - AUTO_DEACTIVATE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for AUTO_DEACTIVATE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type AutoDeactivateR = crate::BitReader; #[doc = "Field `AUTO_DEACTIVATE` writer - Auto Deactivate the counter (set ACTIVE to 0) when the count reaches 0"] -pub struct AUTO_DEACTIVATE_W<'a> { - w: &'a mut W, -} -impl<'a> AUTO_DEACTIVATE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); - self.w - } -} +pub type AutoDeactivateW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `IRQ_ENB` reader - Interrupt Enable"] -pub struct IRQ_ENB_R(crate::FieldReader); -impl IRQ_ENB_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - IRQ_ENB_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for IRQ_ENB_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type IrqEnbR = crate::BitReader; #[doc = "Field `IRQ_ENB` writer - Interrupt Enable"] -pub struct IRQ_ENB_W<'a> { - w: &'a mut W, -} -impl<'a> IRQ_ENB_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); - self.w - } -} +pub type IrqEnbW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Counter Status Selection\n\nValue on reset: 0"] -#[derive(Clone, Copy, Debug, PartialEq)] +#[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum STATUS_SEL_A { +pub enum StatusSel { #[doc = "0: Single cycle pulse when the counter reaches 0"] - DONE = 0, + Done = 0, #[doc = "1: Returns the counter ACTIVE bit"] - ACTIVE = 1, + Active = 1, #[doc = "2: Toggles the STATUS bit everytime the counter reaches 0. Basically a divide by 2 counter output."] - TOGGLE = 2, + Toggle = 2, #[doc = "3: Selects the Pulse Width Modulated output. It 1 when the counter value is >= the PWMA_VALUE"] - PWMA = 3, - #[doc = "4: Selects the Pulse Width Modulated output. It 1 when the counter value is < the PWMA_VALUE and value is > PWMA_VALUE"] - PWMB = 4, + Pwma = 3, + #[doc = "4: Selects the Pulse Width Modulated output. It 1 when the counter value is < the PWMA_VALUE and value is > PWMA_VALUE"] + Pwmb = 4, #[doc = "5: Returns the counter ENABLED bit"] - ENABLED = 5, - #[doc = "6: Selects the Pulse Width Modulated output. It 1 when the counter value is <= the PWMA_VALUE and value is >= 0"] - PWMA_ACTIVE = 6, + Enabled = 5, + #[doc = "6: Selects the Pulse Width Modulated output. It 1 when the counter value is <= the PWMA_VALUE and value is >= 0"] + PwmaActive = 6, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: STATUS_SEL_A) -> Self { + fn from(variant: StatusSel) -> Self { variant as _ } } +impl crate::FieldSpec for StatusSel { + type Ux = u8; +} +impl crate::IsEnum for StatusSel {} #[doc = "Field `STATUS_SEL` reader - Counter Status Selection"] -pub struct STATUS_SEL_R(crate::FieldReader); -impl STATUS_SEL_R { +pub type StatusSelR = crate::FieldReader; +impl StatusSelR { + #[doc = "Get enumerated values variant"] #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - STATUS_SEL_R(crate::FieldReader::new(bits)) - } - #[doc = r"Get enumerated values variant"] - #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(STATUS_SEL_A::DONE), - 1 => Some(STATUS_SEL_A::ACTIVE), - 2 => Some(STATUS_SEL_A::TOGGLE), - 3 => Some(STATUS_SEL_A::PWMA), - 4 => Some(STATUS_SEL_A::PWMB), - 5 => Some(STATUS_SEL_A::ENABLED), - 6 => Some(STATUS_SEL_A::PWMA_ACTIVE), + 0 => Some(StatusSel::Done), + 1 => Some(StatusSel::Active), + 2 => Some(StatusSel::Toggle), + 3 => Some(StatusSel::Pwma), + 4 => Some(StatusSel::Pwmb), + 5 => Some(StatusSel::Enabled), + 6 => Some(StatusSel::PwmaActive), _ => None, } } - #[doc = "Checks if the value of the field is `DONE`"] - #[inline(always)] - pub fn is_done(&self) -> bool { - **self == STATUS_SEL_A::DONE - } - #[doc = "Checks if the value of the field is `ACTIVE`"] - #[inline(always)] - pub fn is_active(&self) -> bool { - **self == STATUS_SEL_A::ACTIVE - } - #[doc = "Checks if the value of the field is `TOGGLE`"] - #[inline(always)] - pub fn is_toggle(&self) -> bool { - **self == STATUS_SEL_A::TOGGLE - } - #[doc = "Checks if the value of the field is `PWMA`"] - #[inline(always)] - pub fn is_pwma(&self) -> bool { - **self == STATUS_SEL_A::PWMA - } - #[doc = "Checks if the value of the field is `PWMB`"] - #[inline(always)] - pub fn is_pwmb(&self) -> bool { - **self == STATUS_SEL_A::PWMB - } - #[doc = "Checks if the value of the field is `ENABLED`"] - #[inline(always)] - pub fn is_enabled(&self) -> bool { - **self == STATUS_SEL_A::ENABLED - } - #[doc = "Checks if the value of the field is `PWMA_ACTIVE`"] - #[inline(always)] - pub fn is_pwma_active(&self) -> bool { - **self == STATUS_SEL_A::PWMA_ACTIVE - } -} -impl core::ops::Deref for STATUS_SEL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `STATUS_SEL` writer - Counter Status Selection"] -pub struct STATUS_SEL_W<'a> { - w: &'a mut W, -} -impl<'a> STATUS_SEL_W<'a> { - #[doc = r"Writes `variant` to the field"] - #[inline(always)] - pub fn variant(self, variant: STATUS_SEL_A) -> &'a mut W { - unsafe { self.bits(variant.into()) } - } #[doc = "Single cycle pulse when the counter reaches 0"] #[inline(always)] - pub fn done(self) -> &'a mut W { - self.variant(STATUS_SEL_A::DONE) + pub fn is_done(&self) -> bool { + *self == StatusSel::Done } #[doc = "Returns the counter ACTIVE bit"] #[inline(always)] - pub fn active(self) -> &'a mut W { - self.variant(STATUS_SEL_A::ACTIVE) + pub fn is_active(&self) -> bool { + *self == StatusSel::Active } #[doc = "Toggles the STATUS bit everytime the counter reaches 0. Basically a divide by 2 counter output."] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(STATUS_SEL_A::TOGGLE) + pub fn is_toggle(&self) -> bool { + *self == StatusSel::Toggle } #[doc = "Selects the Pulse Width Modulated output. It 1 when the counter value is >= the PWMA_VALUE"] #[inline(always)] - pub fn pwma(self) -> &'a mut W { - self.variant(STATUS_SEL_A::PWMA) + pub fn is_pwma(&self) -> bool { + *self == StatusSel::Pwma } - #[doc = "Selects the Pulse Width Modulated output. It 1 when the counter value is < the PWMA_VALUE and value is > PWMA_VALUE"] + #[doc = "Selects the Pulse Width Modulated output. It 1 when the counter value is < the PWMA_VALUE and value is > PWMA_VALUE"] #[inline(always)] - pub fn pwmb(self) -> &'a mut W { - self.variant(STATUS_SEL_A::PWMB) + pub fn is_pwmb(&self) -> bool { + *self == StatusSel::Pwmb } #[doc = "Returns the counter ENABLED bit"] #[inline(always)] - pub fn enabled(self) -> &'a mut W { - self.variant(STATUS_SEL_A::ENABLED) + pub fn is_enabled(&self) -> bool { + *self == StatusSel::Enabled } - #[doc = "Selects the Pulse Width Modulated output. It 1 when the counter value is <= the PWMA_VALUE and value is >= 0"] + #[doc = "Selects the Pulse Width Modulated output. It 1 when the counter value is <= the PWMA_VALUE and value is >= 0"] #[inline(always)] - pub fn pwma_active(self) -> &'a mut W { - self.variant(STATUS_SEL_A::PWMA_ACTIVE) + pub fn is_pwma_active(&self) -> bool { + *self == StatusSel::PwmaActive } - #[doc = r"Writes raw bits to the field"] +} +#[doc = "Field `STATUS_SEL` writer - Counter Status Selection"] +pub type StatusSelW<'a, REG> = crate::FieldWriter<'a, REG, 3, StatusSel>; +impl<'a, REG> StatusSelW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ + #[doc = "Single cycle pulse when the counter reaches 0"] #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x07 << 5)) | ((value as u32 & 0x07) << 5); - self.w + pub fn done(self) -> &'a mut crate::W { + self.variant(StatusSel::Done) + } + #[doc = "Returns the counter ACTIVE bit"] + #[inline(always)] + pub fn active(self) -> &'a mut crate::W { + self.variant(StatusSel::Active) + } + #[doc = "Toggles the STATUS bit everytime the counter reaches 0. Basically a divide by 2 counter output."] + #[inline(always)] + pub fn toggle(self) -> &'a mut crate::W { + self.variant(StatusSel::Toggle) + } + #[doc = "Selects the Pulse Width Modulated output. It 1 when the counter value is >= the PWMA_VALUE"] + #[inline(always)] + pub fn pwma(self) -> &'a mut crate::W { + self.variant(StatusSel::Pwma) + } + #[doc = "Selects the Pulse Width Modulated output. It 1 when the counter value is < the PWMA_VALUE and value is > PWMA_VALUE"] + #[inline(always)] + pub fn pwmb(self) -> &'a mut crate::W { + self.variant(StatusSel::Pwmb) + } + #[doc = "Returns the counter ENABLED bit"] + #[inline(always)] + pub fn enabled(self) -> &'a mut crate::W { + self.variant(StatusSel::Enabled) + } + #[doc = "Selects the Pulse Width Modulated output. It 1 when the counter value is <= the PWMA_VALUE and value is >= 0"] + #[inline(always)] + pub fn pwma_active(self) -> &'a mut crate::W { + self.variant(StatusSel::PwmaActive) } } #[doc = "Field `STATUS_INV` reader - Invert the Output Status"] -pub struct STATUS_INV_R(crate::FieldReader); -impl STATUS_INV_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - STATUS_INV_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for STATUS_INV_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type StatusInvR = crate::BitReader; #[doc = "Field `STATUS_INV` writer - Invert the Output Status"] -pub struct STATUS_INV_W<'a> { - w: &'a mut W, -} -impl<'a> STATUS_INV_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); - self.w - } -} +pub type StatusInvW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REQ_STOP` reader - Stop Request"] -pub struct REQ_STOP_R(crate::FieldReader); -impl REQ_STOP_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - REQ_STOP_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for REQ_STOP_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type ReqStopR = crate::BitReader; #[doc = "Field `REQ_STOP` writer - Stop Request"] -pub struct REQ_STOP_W<'a> { - w: &'a mut W, -} -impl<'a> REQ_STOP_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); - self.w - } -} +pub type ReqStopW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Counter Enable"] #[inline(always)] - pub fn enable(&self) -> ENABLE_R { - ENABLE_R::new((self.bits & 0x01) != 0) + pub fn enable(&self) -> EnableR { + EnableR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Counter Active"] #[inline(always)] - pub fn active(&self) -> ACTIVE_R { - ACTIVE_R::new(((self.bits >> 1) & 0x01) != 0) + pub fn active(&self) -> ActiveR { + ActiveR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Auto Disables the counter (set ENABLE to 0) when the count reaches 0"] #[inline(always)] - pub fn auto_disable(&self) -> AUTO_DISABLE_R { - AUTO_DISABLE_R::new(((self.bits >> 2) & 0x01) != 0) + pub fn auto_disable(&self) -> AutoDisableR { + AutoDisableR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Auto Deactivate the counter (set ACTIVE to 0) when the count reaches 0"] #[inline(always)] - pub fn auto_deactivate(&self) -> AUTO_DEACTIVATE_R { - AUTO_DEACTIVATE_R::new(((self.bits >> 3) & 0x01) != 0) + pub fn auto_deactivate(&self) -> AutoDeactivateR { + AutoDeactivateR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Interrupt Enable"] #[inline(always)] - pub fn irq_enb(&self) -> IRQ_ENB_R { - IRQ_ENB_R::new(((self.bits >> 4) & 0x01) != 0) + pub fn irq_enb(&self) -> IrqEnbR { + IrqEnbR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bits 5:7 - Counter Status Selection"] #[inline(always)] - pub fn status_sel(&self) -> STATUS_SEL_R { - STATUS_SEL_R::new(((self.bits >> 5) & 0x07) as u8) + pub fn status_sel(&self) -> StatusSelR { + StatusSelR::new(((self.bits >> 5) & 7) as u8) } #[doc = "Bit 8 - Invert the Output Status"] #[inline(always)] - pub fn status_inv(&self) -> STATUS_INV_R { - STATUS_INV_R::new(((self.bits >> 8) & 0x01) != 0) + pub fn status_inv(&self) -> StatusInvR { + StatusInvR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Stop Request"] #[inline(always)] - pub fn req_stop(&self) -> REQ_STOP_R { - REQ_STOP_R::new(((self.bits >> 9) & 0x01) != 0) + pub fn req_stop(&self) -> ReqStopR { + ReqStopR::new(((self.bits >> 9) & 1) != 0) } } impl W { #[doc = "Bit 0 - Counter Enable"] #[inline(always)] - pub fn enable(&mut self) -> ENABLE_W { - ENABLE_W { w: self } + #[must_use] + pub fn enable(&mut self) -> EnableW { + EnableW::new(self, 0) } #[doc = "Bit 2 - Auto Disables the counter (set ENABLE to 0) when the count reaches 0"] #[inline(always)] - pub fn auto_disable(&mut self) -> AUTO_DISABLE_W { - AUTO_DISABLE_W { w: self } + #[must_use] + pub fn auto_disable(&mut self) -> AutoDisableW { + AutoDisableW::new(self, 2) } #[doc = "Bit 3 - Auto Deactivate the counter (set ACTIVE to 0) when the count reaches 0"] #[inline(always)] - pub fn auto_deactivate(&mut self) -> AUTO_DEACTIVATE_W { - AUTO_DEACTIVATE_W { w: self } + #[must_use] + pub fn auto_deactivate(&mut self) -> AutoDeactivateW { + AutoDeactivateW::new(self, 3) } #[doc = "Bit 4 - Interrupt Enable"] #[inline(always)] - pub fn irq_enb(&mut self) -> IRQ_ENB_W { - IRQ_ENB_W { w: self } + #[must_use] + pub fn irq_enb(&mut self) -> IrqEnbW { + IrqEnbW::new(self, 4) } #[doc = "Bits 5:7 - Counter Status Selection"] #[inline(always)] - pub fn status_sel(&mut self) -> STATUS_SEL_W { - STATUS_SEL_W { w: self } + #[must_use] + pub fn status_sel(&mut self) -> StatusSelW { + StatusSelW::new(self, 5) } #[doc = "Bit 8 - Invert the Output Status"] #[inline(always)] - pub fn status_inv(&mut self) -> STATUS_INV_W { - STATUS_INV_W { w: self } + #[must_use] + pub fn status_inv(&mut self) -> StatusInvW { + StatusInvW::new(self, 8) } #[doc = "Bit 9 - Stop Request"] #[inline(always)] - pub fn req_stop(&mut self) -> REQ_STOP_W { - REQ_STOP_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn req_stop(&mut self) -> ReqStopW { + ReqStopW::new(self, 9) } } -#[doc = "Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](index.html) module"] -pub struct CTRL_SPEC; -impl crate::RegisterSpec for CTRL_SPEC { +#[doc = "Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctrl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctrl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CtrlSpec; +impl crate::RegisterSpec for CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [ctrl::R](R) reader structure"] -impl crate::Readable for CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ctrl::W](W) writer structure"] -impl crate::Writable for CTRL_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`ctrl::R`](R) reader structure"] +impl crate::Readable for CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`ctrl::W`](W) writer structure"] +impl crate::Writable for CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTRL to value 0"] -impl crate::Resettable for CTRL_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/tim0/enable.rs b/va416xx/src/tim0/enable.rs index 90b8636..2064cab 100644 --- a/va416xx/src/tim0/enable.rs +++ b/va416xx/src/tim0/enable.rs @@ -1,113 +1,40 @@ #[doc = "Register `ENABLE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ENABLE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `ENABLE` reader - Counter Enable"] -pub struct ENABLE_R(crate::FieldReader); -impl ENABLE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - ENABLE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ENABLE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type EnableR = crate::BitReader; #[doc = "Field `ENABLE` writer - Counter Enable"] -pub struct ENABLE_W<'a> { - w: &'a mut W, -} -impl<'a> ENABLE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} +pub type EnableW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Counter Enable"] #[inline(always)] - pub fn enable(&self) -> ENABLE_R { - ENABLE_R::new((self.bits & 0x01) != 0) + pub fn enable(&self) -> EnableR { + EnableR::new((self.bits & 1) != 0) } } impl W { #[doc = "Bit 0 - Counter Enable"] #[inline(always)] - pub fn enable(&mut self) -> ENABLE_W { - ENABLE_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn enable(&mut self) -> EnableW { + EnableW::new(self, 0) } } -#[doc = "Alternate access to the Counter ENABLE bit in the CTRL Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [enable](index.html) module"] -pub struct ENABLE_SPEC; -impl crate::RegisterSpec for ENABLE_SPEC { +#[doc = "Alternate access to the Counter ENABLE bit in the CTRL Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`enable::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`enable::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct EnableSpec; +impl crate::RegisterSpec for EnableSpec { type Ux = u32; } -#[doc = "`read()` method returns [enable::R](R) reader structure"] -impl crate::Readable for ENABLE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [enable::W](W) writer structure"] -impl crate::Writable for ENABLE_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`enable::R`](R) reader structure"] +impl crate::Readable for EnableSpec {} +#[doc = "`write(|w| ..)` method takes [`enable::W`](W) writer structure"] +impl crate::Writable for EnableSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ENABLE to value 0"] -impl crate::Resettable for ENABLE_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for EnableSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/tim0/perid.rs b/va416xx/src/tim0/perid.rs index d856042..9266a0a 100644 --- a/va416xx/src/tim0/perid.rs +++ b/va416xx/src/tim0/perid.rs @@ -1,31 +1,18 @@ #[doc = "Register `PERID` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 +pub type R = crate::R; +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) } } -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Peripheral ID Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [perid](index.html) module"] -pub struct PERID_SPEC; -impl crate::RegisterSpec for PERID_SPEC { +#[doc = "Peripheral ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`perid::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PeridSpec; +impl crate::RegisterSpec for PeridSpec { type Ux = u32; } -#[doc = "`read()` method returns [perid::R](R) reader structure"] -impl crate::Readable for PERID_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`perid::R`](R) reader structure"] +impl crate::Readable for PeridSpec {} #[doc = "`reset()` method sets PERID to value 0x0211_07e9"] -impl crate::Resettable for PERID_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0x0211_07e9 - } +impl crate::Resettable for PeridSpec { + const RESET_VALUE: u32 = 0x0211_07e9; } diff --git a/va416xx/src/tim0/pwm_value.rs b/va416xx/src/tim0/pwm_value.rs index 53907ff..b3b1480 100644 --- a/va416xx/src/tim0/pwm_value.rs +++ b/va416xx/src/tim0/pwm_value.rs @@ -1,64 +1,27 @@ #[doc = "Register `PWM_VALUE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PWM_VALUE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 +pub type W = crate::W; +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) } } -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -impl W { - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "The Pulse Width Modulation Value\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pwm_value](index.html) module"] -pub struct PWM_VALUE_SPEC; -impl crate::RegisterSpec for PWM_VALUE_SPEC { +impl W {} +#[doc = "The Pulse Width Modulation Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pwm_value::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pwm_value::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PwmValueSpec; +impl crate::RegisterSpec for PwmValueSpec { type Ux = u32; } -#[doc = "`read()` method returns [pwm_value::R](R) reader structure"] -impl crate::Readable for PWM_VALUE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [pwm_value::W](W) writer structure"] -impl crate::Writable for PWM_VALUE_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`pwm_value::R`](R) reader structure"] +impl crate::Readable for PwmValueSpec {} +#[doc = "`write(|w| ..)` method takes [`pwm_value::W`](W) writer structure"] +impl crate::Writable for PwmValueSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PWM_VALUE to value 0"] -impl crate::Resettable for PWM_VALUE_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for PwmValueSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/tim0/pwma_value.rs b/va416xx/src/tim0/pwma_value.rs index 90752f9..ec26532 100644 --- a/va416xx/src/tim0/pwma_value.rs +++ b/va416xx/src/tim0/pwma_value.rs @@ -1,64 +1,27 @@ #[doc = "Register `PWMA_VALUE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PWMA_VALUE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 +pub type W = crate::W; +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) } } -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -impl W { - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "The Pulse Width Modulation ValueA\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pwma_value](index.html) module"] -pub struct PWMA_VALUE_SPEC; -impl crate::RegisterSpec for PWMA_VALUE_SPEC { +impl W {} +#[doc = "The Pulse Width Modulation ValueA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pwma_value::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pwma_value::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PwmaValueSpec; +impl crate::RegisterSpec for PwmaValueSpec { type Ux = u32; } -#[doc = "`read()` method returns [pwma_value::R](R) reader structure"] -impl crate::Readable for PWMA_VALUE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [pwma_value::W](W) writer structure"] -impl crate::Writable for PWMA_VALUE_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`pwma_value::R`](R) reader structure"] +impl crate::Readable for PwmaValueSpec {} +#[doc = "`write(|w| ..)` method takes [`pwma_value::W`](W) writer structure"] +impl crate::Writable for PwmaValueSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PWMA_VALUE to value 0"] -impl crate::Resettable for PWMA_VALUE_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for PwmaValueSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/tim0/pwmb_value.rs b/va416xx/src/tim0/pwmb_value.rs index ac2f4ed..587cb50 100644 --- a/va416xx/src/tim0/pwmb_value.rs +++ b/va416xx/src/tim0/pwmb_value.rs @@ -1,64 +1,27 @@ #[doc = "Register `PWMB_VALUE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PWMB_VALUE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 +pub type W = crate::W; +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) } } -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -impl W { - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "The Pulse Width Modulation ValueB\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pwmb_value](index.html) module"] -pub struct PWMB_VALUE_SPEC; -impl crate::RegisterSpec for PWMB_VALUE_SPEC { +impl W {} +#[doc = "The Pulse Width Modulation ValueB\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pwmb_value::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pwmb_value::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PwmbValueSpec; +impl crate::RegisterSpec for PwmbValueSpec { type Ux = u32; } -#[doc = "`read()` method returns [pwmb_value::R](R) reader structure"] -impl crate::Readable for PWMB_VALUE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [pwmb_value::W](W) writer structure"] -impl crate::Writable for PWMB_VALUE_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`pwmb_value::R`](R) reader structure"] +impl crate::Readable for PwmbValueSpec {} +#[doc = "`write(|w| ..)` method takes [`pwmb_value::W`](W) writer structure"] +impl crate::Writable for PwmbValueSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PWMB_VALUE to value 0"] -impl crate::Resettable for PWMB_VALUE_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for PwmbValueSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/tim0/rst_value.rs b/va416xx/src/tim0/rst_value.rs index c5823b7..2dfa5b4 100644 --- a/va416xx/src/tim0/rst_value.rs +++ b/va416xx/src/tim0/rst_value.rs @@ -1,64 +1,27 @@ #[doc = "Register `RST_VALUE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RST_VALUE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 +pub type W = crate::W; +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) } } -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -impl W { - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "The value that counter start from after reaching 0.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rst_value](index.html) module"] -pub struct RST_VALUE_SPEC; -impl crate::RegisterSpec for RST_VALUE_SPEC { +impl W {} +#[doc = "The value that counter start from after reaching 0.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rst_value::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rst_value::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RstValueSpec; +impl crate::RegisterSpec for RstValueSpec { type Ux = u32; } -#[doc = "`read()` method returns [rst_value::R](R) reader structure"] -impl crate::Readable for RST_VALUE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [rst_value::W](W) writer structure"] -impl crate::Writable for RST_VALUE_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`rst_value::R`](R) reader structure"] +impl crate::Readable for RstValueSpec {} +#[doc = "`write(|w| ..)` method takes [`rst_value::W`](W) writer structure"] +impl crate::Writable for RstValueSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RST_VALUE to value 0"] -impl crate::Resettable for RST_VALUE_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for RstValueSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/trng.rs b/va416xx/src/trng.rs index 7dde357..c748ffd 100644 --- a/va416xx/src/trng.rs +++ b/va416xx/src/trng.rs @@ -1,134 +1,234 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { _reserved0: [u8; 0x0100], - #[doc = "0x100 - Interrupt Mask Register"] - pub imr: crate::Reg, - #[doc = "0x104 - Interrupt Status Register"] - pub isr: crate::Reg, - #[doc = "0x108 - Interrupt Clear Register"] - pub icr: crate::Reg, - #[doc = "0x10c - Configuration Register"] - pub config: crate::Reg, - #[doc = "0x110 - Valid Register"] - pub valid: crate::Reg, - #[doc = "0x114 - Entropy Holding Register Data Register"] - pub ehr_data0: crate::Reg, - #[doc = "0x118 - Entropy Holding Register Data Register"] - pub ehr_data1: crate::Reg, - #[doc = "0x11c - Entropy Holding Register Data Register"] - pub ehr_data2: crate::Reg, - #[doc = "0x120 - Entropy Holding Register Data Register"] - pub ehr_data3: crate::Reg, - #[doc = "0x124 - Entropy Holding Register Data Register"] - pub ehr_data4: crate::Reg, - #[doc = "0x128 - Entropy Holding Register Data Register"] - pub ehr_data5: crate::Reg, - #[doc = "0x12c - Random Source Enable Register"] - pub rnd_source_enable: crate::Reg, - #[doc = "0x130 - Section TBD"] - pub sample_cnt1: crate::Reg, - #[doc = "0x134 - Auto-correlator Statistic Register"] - pub autocorr_statistic: crate::Reg, - #[doc = "0x138 - Section TBD"] - pub debug_control: crate::Reg, + imr: Imr, + isr: Isr, + icr: Icr, + config: Config, + valid: Valid, + ehr_data0: EhrData0, + ehr_data1: EhrData1, + ehr_data2: EhrData2, + ehr_data3: EhrData3, + ehr_data4: EhrData4, + ehr_data5: EhrData5, + rnd_source_enable: RndSourceEnable, + sample_cnt1: SampleCnt1, + autocorr_statistic: AutocorrStatistic, + debug_control: DebugControl, _reserved15: [u8; 0x04], - #[doc = "0x140 - Reset Register"] - pub sw_reset: crate::Reg, + sw_reset: SwReset, _reserved16: [u8; 0x74], - #[doc = "0x1b8 - Busy Register"] - pub busy: crate::Reg, - #[doc = "0x1bc - Reset Bits Counter Register"] - pub rst_bits_counter: crate::Reg, + busy: Busy, + rst_bits_counter: RstBitsCounter, _reserved18: [u8; 0x20], - #[doc = "0x1e0 - BIST Counter Register"] - pub bist_cntr0: crate::Reg, - #[doc = "0x1e4 - BIST Counter Register"] - pub bist_cntr1: crate::Reg, - #[doc = "0x1e8 - BIST Counter Register"] - pub bist_cntr2: crate::Reg, + bist_cntr0: BistCntr0, + bist_cntr1: BistCntr1, + bist_cntr2: BistCntr2, } -#[doc = "IMR register accessor: an alias for `Reg`"] -pub type IMR = crate::Reg; +impl RegisterBlock { + #[doc = "0x100 - Interrupt Mask Register"] + #[inline(always)] + pub const fn imr(&self) -> &Imr { + &self.imr + } + #[doc = "0x104 - Interrupt Status Register"] + #[inline(always)] + pub const fn isr(&self) -> &Isr { + &self.isr + } + #[doc = "0x108 - Interrupt Clear Register"] + #[inline(always)] + pub const fn icr(&self) -> &Icr { + &self.icr + } + #[doc = "0x10c - Configuration Register"] + #[inline(always)] + pub const fn config(&self) -> &Config { + &self.config + } + #[doc = "0x110 - Valid Register"] + #[inline(always)] + pub const fn valid(&self) -> &Valid { + &self.valid + } + #[doc = "0x114 - Entropy Holding Register Data Register"] + #[inline(always)] + pub const fn ehr_data0(&self) -> &EhrData0 { + &self.ehr_data0 + } + #[doc = "0x118 - Entropy Holding Register Data Register"] + #[inline(always)] + pub const fn ehr_data1(&self) -> &EhrData1 { + &self.ehr_data1 + } + #[doc = "0x11c - Entropy Holding Register Data Register"] + #[inline(always)] + pub const fn ehr_data2(&self) -> &EhrData2 { + &self.ehr_data2 + } + #[doc = "0x120 - Entropy Holding Register Data Register"] + #[inline(always)] + pub const fn ehr_data3(&self) -> &EhrData3 { + &self.ehr_data3 + } + #[doc = "0x124 - Entropy Holding Register Data Register"] + #[inline(always)] + pub const fn ehr_data4(&self) -> &EhrData4 { + &self.ehr_data4 + } + #[doc = "0x128 - Entropy Holding Register Data Register"] + #[inline(always)] + pub const fn ehr_data5(&self) -> &EhrData5 { + &self.ehr_data5 + } + #[doc = "0x12c - Random Source Enable Register"] + #[inline(always)] + pub const fn rnd_source_enable(&self) -> &RndSourceEnable { + &self.rnd_source_enable + } + #[doc = "0x130 - Section TBD"] + #[inline(always)] + pub const fn sample_cnt1(&self) -> &SampleCnt1 { + &self.sample_cnt1 + } + #[doc = "0x134 - Auto-correlator Statistic Register"] + #[inline(always)] + pub const fn autocorr_statistic(&self) -> &AutocorrStatistic { + &self.autocorr_statistic + } + #[doc = "0x138 - Section TBD"] + #[inline(always)] + pub const fn debug_control(&self) -> &DebugControl { + &self.debug_control + } + #[doc = "0x140 - Reset Register"] + #[inline(always)] + pub const fn sw_reset(&self) -> &SwReset { + &self.sw_reset + } + #[doc = "0x1b8 - Busy Register"] + #[inline(always)] + pub const fn busy(&self) -> &Busy { + &self.busy + } + #[doc = "0x1bc - Reset Bits Counter Register"] + #[inline(always)] + pub const fn rst_bits_counter(&self) -> &RstBitsCounter { + &self.rst_bits_counter + } + #[doc = "0x1e0 - BIST Counter Register"] + #[inline(always)] + pub const fn bist_cntr0(&self) -> &BistCntr0 { + &self.bist_cntr0 + } + #[doc = "0x1e4 - BIST Counter Register"] + #[inline(always)] + pub const fn bist_cntr1(&self) -> &BistCntr1 { + &self.bist_cntr1 + } + #[doc = "0x1e8 - BIST Counter Register"] + #[inline(always)] + pub const fn bist_cntr2(&self) -> &BistCntr2 { + &self.bist_cntr2 + } +} +#[doc = "IMR (rw) register accessor: Interrupt Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`imr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`imr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@imr`] +module"] +#[doc(alias = "IMR")] +pub type Imr = crate::Reg; #[doc = "Interrupt Mask Register"] pub mod imr; -#[doc = "ISR register accessor: an alias for `Reg`"] -pub type ISR = crate::Reg; +#[doc = "ISR (r) register accessor: Interrupt Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`isr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@isr`] +module"] +#[doc(alias = "ISR")] +pub type Isr = crate::Reg; #[doc = "Interrupt Status Register"] pub mod isr; -#[doc = "ICR register accessor: an alias for `Reg`"] -pub type ICR = crate::Reg; +#[doc = "ICR (rw) register accessor: Interrupt Clear Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`icr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`icr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@icr`] +module"] +#[doc(alias = "ICR")] +pub type Icr = crate::Reg; #[doc = "Interrupt Clear Register"] pub mod icr; -#[doc = "CONFIG register accessor: an alias for `Reg`"] -pub type CONFIG = crate::Reg; +#[doc = "CONFIG (rw) register accessor: Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`config::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`config::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@config`] +module"] +#[doc(alias = "CONFIG")] +pub type Config = crate::Reg; #[doc = "Configuration Register"] pub mod config; -#[doc = "VALID register accessor: an alias for `Reg`"] -pub type VALID = crate::Reg; +#[doc = "VALID (r) register accessor: Valid Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`valid::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@valid`] +module"] +#[doc(alias = "VALID")] +pub type Valid = crate::Reg; #[doc = "Valid Register"] pub mod valid; -#[doc = "EHR_DATA0 register accessor: an alias for `Reg`"] -pub type EHR_DATA0 = crate::Reg; +#[doc = "EHR_DATA0 (r) register accessor: Entropy Holding Register Data Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ehr_data0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ehr_data0`] +module"] +#[doc(alias = "EHR_DATA0")] +pub type EhrData0 = crate::Reg; #[doc = "Entropy Holding Register Data Register"] pub mod ehr_data0; -#[doc = "EHR_DATA1 register accessor: an alias for `Reg`"] -pub type EHR_DATA1 = crate::Reg; -#[doc = "Entropy Holding Register Data Register"] -pub mod ehr_data1; -#[doc = "EHR_DATA2 register accessor: an alias for `Reg`"] -pub type EHR_DATA2 = crate::Reg; -#[doc = "Entropy Holding Register Data Register"] -pub mod ehr_data2; -#[doc = "EHR_DATA3 register accessor: an alias for `Reg`"] -pub type EHR_DATA3 = crate::Reg; -#[doc = "Entropy Holding Register Data Register"] -pub mod ehr_data3; -#[doc = "EHR_DATA4 register accessor: an alias for `Reg`"] -pub type EHR_DATA4 = crate::Reg; -#[doc = "Entropy Holding Register Data Register"] -pub mod ehr_data4; -#[doc = "EHR_DATA5 register accessor: an alias for `Reg`"] -pub type EHR_DATA5 = crate::Reg; -#[doc = "Entropy Holding Register Data Register"] -pub mod ehr_data5; -#[doc = "RND_SOURCE_ENABLE register accessor: an alias for `Reg`"] -pub type RND_SOURCE_ENABLE = crate::Reg; +pub use ehr_data0 as ehr_data1; +pub use ehr_data0 as ehr_data2; +pub use ehr_data0 as ehr_data3; +pub use ehr_data0 as ehr_data4; +pub use ehr_data0 as ehr_data5; +pub use EhrData0 as EhrData1; +pub use EhrData0 as EhrData2; +pub use EhrData0 as EhrData3; +pub use EhrData0 as EhrData4; +pub use EhrData0 as EhrData5; +#[doc = "RND_SOURCE_ENABLE (rw) register accessor: Random Source Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rnd_source_enable::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rnd_source_enable::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rnd_source_enable`] +module"] +#[doc(alias = "RND_SOURCE_ENABLE")] +pub type RndSourceEnable = crate::Reg; #[doc = "Random Source Enable Register"] pub mod rnd_source_enable; -#[doc = "SAMPLE_CNT1 register accessor: an alias for `Reg`"] -pub type SAMPLE_CNT1 = crate::Reg; +#[doc = "SAMPLE_CNT1 (rw) register accessor: Section TBD\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sample_cnt1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sample_cnt1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sample_cnt1`] +module"] +#[doc(alias = "SAMPLE_CNT1")] +pub type SampleCnt1 = crate::Reg; #[doc = "Section TBD"] pub mod sample_cnt1; -#[doc = "AUTOCORR_STATISTIC register accessor: an alias for `Reg`"] -pub type AUTOCORR_STATISTIC = crate::Reg; +#[doc = "AUTOCORR_STATISTIC (rw) register accessor: Auto-correlator Statistic Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`autocorr_statistic::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`autocorr_statistic::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@autocorr_statistic`] +module"] +#[doc(alias = "AUTOCORR_STATISTIC")] +pub type AutocorrStatistic = crate::Reg; #[doc = "Auto-correlator Statistic Register"] pub mod autocorr_statistic; -#[doc = "DEBUG_CONTROL register accessor: an alias for `Reg`"] -pub type DEBUG_CONTROL = crate::Reg; +#[doc = "DEBUG_CONTROL (rw) register accessor: Section TBD\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`debug_control::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`debug_control::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@debug_control`] +module"] +#[doc(alias = "DEBUG_CONTROL")] +pub type DebugControl = crate::Reg; #[doc = "Section TBD"] pub mod debug_control; -#[doc = "SW_RESET register accessor: an alias for `Reg`"] -pub type SW_RESET = crate::Reg; +#[doc = "SW_RESET (rw) register accessor: Reset Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sw_reset::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sw_reset::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sw_reset`] +module"] +#[doc(alias = "SW_RESET")] +pub type SwReset = crate::Reg; #[doc = "Reset Register"] pub mod sw_reset; -#[doc = "BUSY register accessor: an alias for `Reg`"] -pub type BUSY = crate::Reg; +#[doc = "BUSY (r) register accessor: Busy Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`busy::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@busy`] +module"] +#[doc(alias = "BUSY")] +pub type Busy = crate::Reg; #[doc = "Busy Register"] pub mod busy; -#[doc = "RST_BITS_COUNTER register accessor: an alias for `Reg`"] -pub type RST_BITS_COUNTER = crate::Reg; +#[doc = "RST_BITS_COUNTER (rw) register accessor: Reset Bits Counter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rst_bits_counter::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rst_bits_counter::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rst_bits_counter`] +module"] +#[doc(alias = "RST_BITS_COUNTER")] +pub type RstBitsCounter = crate::Reg; #[doc = "Reset Bits Counter Register"] pub mod rst_bits_counter; -#[doc = "BIST_CNTR0 register accessor: an alias for `Reg`"] -pub type BIST_CNTR0 = crate::Reg; +#[doc = "BIST_CNTR0 (r) register accessor: BIST Counter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`bist_cntr0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bist_cntr0`] +module"] +#[doc(alias = "BIST_CNTR0")] +pub type BistCntr0 = crate::Reg; #[doc = "BIST Counter Register"] pub mod bist_cntr0; -#[doc = "BIST_CNTR1 register accessor: an alias for `Reg`"] -pub type BIST_CNTR1 = crate::Reg; -#[doc = "BIST Counter Register"] -pub mod bist_cntr1; -#[doc = "BIST_CNTR2 register accessor: an alias for `Reg`"] -pub type BIST_CNTR2 = crate::Reg; -#[doc = "BIST Counter Register"] -pub mod bist_cntr2; +pub use bist_cntr0 as bist_cntr1; +pub use bist_cntr0 as bist_cntr2; +pub use BistCntr0 as BistCntr1; +pub use BistCntr0 as BistCntr2; diff --git a/va416xx/src/trng/autocorr_statistic.rs b/va416xx/src/trng/autocorr_statistic.rs index de2d010..e919aee 100644 --- a/va416xx/src/trng/autocorr_statistic.rs +++ b/va416xx/src/trng/autocorr_statistic.rs @@ -1,140 +1,55 @@ #[doc = "Register `AUTOCORR_STATISTIC` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `AUTOCORR_STATISTIC` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `AUTOCORR_FAILS` reader - Count each time an autocorrelation test fails"] -pub struct AUTOCORR_FAILS_R(crate::FieldReader); -impl AUTOCORR_FAILS_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - AUTOCORR_FAILS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for AUTOCORR_FAILS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `AUTOCORR_FAILS` writer - Count each time an autocorrelation test fails"] -pub struct AUTOCORR_FAILS_W<'a> { - w: &'a mut W, -} -impl<'a> AUTOCORR_FAILS_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0xff << 14)) | ((value as u32 & 0xff) << 14); - self.w - } -} +pub type W = crate::W; #[doc = "Field `AUTOCORR_TRYS` reader - Count each time an autocorrelation test starts"] -pub struct AUTOCORR_TRYS_R(crate::FieldReader); -impl AUTOCORR_TRYS_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - AUTOCORR_TRYS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for AUTOCORR_TRYS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type AutocorrTrysR = crate::FieldReader; #[doc = "Field `AUTOCORR_TRYS` writer - Count each time an autocorrelation test starts"] -pub struct AUTOCORR_TRYS_W<'a> { - w: &'a mut W, -} -impl<'a> AUTOCORR_TRYS_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !0x3fff) | (value as u32 & 0x3fff); - self.w - } -} +pub type AutocorrTrysW<'a, REG> = crate::FieldWriter<'a, REG, 14, u16>; +#[doc = "Field `AUTOCORR_FAILS` reader - Count each time an autocorrelation test fails"] +pub type AutocorrFailsR = crate::FieldReader; +#[doc = "Field `AUTOCORR_FAILS` writer - Count each time an autocorrelation test fails"] +pub type AutocorrFailsW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { - #[doc = "Bits 14:21 - Count each time an autocorrelation test fails"] - #[inline(always)] - pub fn autocorr_fails(&self) -> AUTOCORR_FAILS_R { - AUTOCORR_FAILS_R::new(((self.bits >> 14) & 0xff) as u8) - } #[doc = "Bits 0:13 - Count each time an autocorrelation test starts"] #[inline(always)] - pub fn autocorr_trys(&self) -> AUTOCORR_TRYS_R { - AUTOCORR_TRYS_R::new((self.bits & 0x3fff) as u16) + pub fn autocorr_trys(&self) -> AutocorrTrysR { + AutocorrTrysR::new((self.bits & 0x3fff) as u16) + } + #[doc = "Bits 14:21 - Count each time an autocorrelation test fails"] + #[inline(always)] + pub fn autocorr_fails(&self) -> AutocorrFailsR { + AutocorrFailsR::new(((self.bits >> 14) & 0xff) as u8) } } impl W { - #[doc = "Bits 14:21 - Count each time an autocorrelation test fails"] - #[inline(always)] - pub fn autocorr_fails(&mut self) -> AUTOCORR_FAILS_W { - AUTOCORR_FAILS_W { w: self } - } #[doc = "Bits 0:13 - Count each time an autocorrelation test starts"] #[inline(always)] - pub fn autocorr_trys(&mut self) -> AUTOCORR_TRYS_W { - AUTOCORR_TRYS_W { w: self } + #[must_use] + pub fn autocorr_trys(&mut self) -> AutocorrTrysW { + AutocorrTrysW::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 14:21 - Count each time an autocorrelation test fails"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn autocorr_fails(&mut self) -> AutocorrFailsW { + AutocorrFailsW::new(self, 14) } } -#[doc = "Auto-correlator Statistic Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [autocorr_statistic](index.html) module"] -pub struct AUTOCORR_STATISTIC_SPEC; -impl crate::RegisterSpec for AUTOCORR_STATISTIC_SPEC { +#[doc = "Auto-correlator Statistic Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`autocorr_statistic::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`autocorr_statistic::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct AutocorrStatisticSpec; +impl crate::RegisterSpec for AutocorrStatisticSpec { type Ux = u32; } -#[doc = "`read()` method returns [autocorr_statistic::R](R) reader structure"] -impl crate::Readable for AUTOCORR_STATISTIC_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [autocorr_statistic::W](W) writer structure"] -impl crate::Writable for AUTOCORR_STATISTIC_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`autocorr_statistic::R`](R) reader structure"] +impl crate::Readable for AutocorrStatisticSpec {} +#[doc = "`write(|w| ..)` method takes [`autocorr_statistic::W`](W) writer structure"] +impl crate::Writable for AutocorrStatisticSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets AUTOCORR_STATISTIC to value 0"] -impl crate::Resettable for AUTOCORR_STATISTIC_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for AutocorrStatisticSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/trng/bist_cntr0.rs b/va416xx/src/trng/bist_cntr0.rs index 30c0714..36bca68 100644 --- a/va416xx/src/trng/bist_cntr0.rs +++ b/va416xx/src/trng/bist_cntr0.rs @@ -1,53 +1,22 @@ #[doc = "Register `BIST_CNTR0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `ROSC_CNTR_VAL` reader - Returns the results of the TRNG BIST counter"] -pub struct ROSC_CNTR_VAL_R(crate::FieldReader); -impl ROSC_CNTR_VAL_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - ROSC_CNTR_VAL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ROSC_CNTR_VAL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type RoscCntrValR = crate::FieldReader; impl R { #[doc = "Bits 0:21 - Returns the results of the TRNG BIST counter"] #[inline(always)] - pub fn rosc_cntr_val(&self) -> ROSC_CNTR_VAL_R { - ROSC_CNTR_VAL_R::new((self.bits & 0x003f_ffff) as u32) + pub fn rosc_cntr_val(&self) -> RoscCntrValR { + RoscCntrValR::new(self.bits & 0x003f_ffff) } } -#[doc = "BIST Counter Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [bist_cntr0](index.html) module"] -pub struct BIST_CNTR0_SPEC; -impl crate::RegisterSpec for BIST_CNTR0_SPEC { +#[doc = "BIST Counter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`bist_cntr0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct BistCntr0Spec; +impl crate::RegisterSpec for BistCntr0Spec { type Ux = u32; } -#[doc = "`read()` method returns [bist_cntr0::R](R) reader structure"] -impl crate::Readable for BIST_CNTR0_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`bist_cntr0::R`](R) reader structure"] +impl crate::Readable for BistCntr0Spec {} #[doc = "`reset()` method sets BIST_CNTR0 to value 0"] -impl crate::Resettable for BIST_CNTR0_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for BistCntr0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/trng/bist_cntr1.rs b/va416xx/src/trng/bist_cntr1.rs deleted file mode 100644 index a7bf711..0000000 --- a/va416xx/src/trng/bist_cntr1.rs +++ /dev/null @@ -1,53 +0,0 @@ -#[doc = "Register `BIST_CNTR1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Field `ROSC_CNTR_VAL` reader - Returns the results of the TRNG BIST counter"] -pub struct ROSC_CNTR_VAL_R(crate::FieldReader); -impl ROSC_CNTR_VAL_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - ROSC_CNTR_VAL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ROSC_CNTR_VAL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl R { - #[doc = "Bits 0:21 - Returns the results of the TRNG BIST counter"] - #[inline(always)] - pub fn rosc_cntr_val(&self) -> ROSC_CNTR_VAL_R { - ROSC_CNTR_VAL_R::new((self.bits & 0x003f_ffff) as u32) - } -} -#[doc = "BIST Counter Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [bist_cntr1](index.html) module"] -pub struct BIST_CNTR1_SPEC; -impl crate::RegisterSpec for BIST_CNTR1_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [bist_cntr1::R](R) reader structure"] -impl crate::Readable for BIST_CNTR1_SPEC { - type Reader = R; -} -#[doc = "`reset()` method sets BIST_CNTR1 to value 0"] -impl crate::Resettable for BIST_CNTR1_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } -} diff --git a/va416xx/src/trng/bist_cntr2.rs b/va416xx/src/trng/bist_cntr2.rs deleted file mode 100644 index b0ff0e1..0000000 --- a/va416xx/src/trng/bist_cntr2.rs +++ /dev/null @@ -1,53 +0,0 @@ -#[doc = "Register `BIST_CNTR2` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Field `ROSC_CNTR_VAL` reader - Returns the results of the TRNG BIST counter"] -pub struct ROSC_CNTR_VAL_R(crate::FieldReader); -impl ROSC_CNTR_VAL_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - ROSC_CNTR_VAL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ROSC_CNTR_VAL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl R { - #[doc = "Bits 0:21 - Returns the results of the TRNG BIST counter"] - #[inline(always)] - pub fn rosc_cntr_val(&self) -> ROSC_CNTR_VAL_R { - ROSC_CNTR_VAL_R::new((self.bits & 0x003f_ffff) as u32) - } -} -#[doc = "BIST Counter Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [bist_cntr2](index.html) module"] -pub struct BIST_CNTR2_SPEC; -impl crate::RegisterSpec for BIST_CNTR2_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [bist_cntr2::R](R) reader structure"] -impl crate::Readable for BIST_CNTR2_SPEC { - type Reader = R; -} -#[doc = "`reset()` method sets BIST_CNTR2 to value 0"] -impl crate::Resettable for BIST_CNTR2_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } -} diff --git a/va416xx/src/trng/busy.rs b/va416xx/src/trng/busy.rs index dbfe6ca..a34661c 100644 --- a/va416xx/src/trng/busy.rs +++ b/va416xx/src/trng/busy.rs @@ -1,53 +1,22 @@ #[doc = "Register `BUSY` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `BUSY` reader - Reflects the status of the rng_busy signal"] -pub struct BUSY_R(crate::FieldReader); -impl BUSY_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - BUSY_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BUSY_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type BusyR = crate::BitReader; impl R { #[doc = "Bit 0 - Reflects the status of the rng_busy signal"] #[inline(always)] - pub fn busy(&self) -> BUSY_R { - BUSY_R::new((self.bits & 0x01) != 0) + pub fn busy(&self) -> BusyR { + BusyR::new((self.bits & 1) != 0) } } -#[doc = "Busy Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [busy](index.html) module"] -pub struct BUSY_SPEC; -impl crate::RegisterSpec for BUSY_SPEC { +#[doc = "Busy Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`busy::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct BusySpec; +impl crate::RegisterSpec for BusySpec { type Ux = u32; } -#[doc = "`read()` method returns [busy::R](R) reader structure"] -impl crate::Readable for BUSY_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`busy::R`](R) reader structure"] +impl crate::Readable for BusySpec {} #[doc = "`reset()` method sets BUSY to value 0"] -impl crate::Resettable for BUSY_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for BusySpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/trng/config.rs b/va416xx/src/trng/config.rs index bd0fd94..83a2884 100644 --- a/va416xx/src/trng/config.rs +++ b/va416xx/src/trng/config.rs @@ -1,103 +1,40 @@ #[doc = "Register `CONFIG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONFIG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RND_SRC_SEL` reader - Selects the number of inverters (out of four possible selections) in the ring oscillator"] -pub struct RND_SRC_SEL_R(crate::FieldReader); -impl RND_SRC_SEL_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - RND_SRC_SEL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RND_SRC_SEL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type RndSrcSelR = crate::FieldReader; #[doc = "Field `RND_SRC_SEL` writer - Selects the number of inverters (out of four possible selections) in the ring oscillator"] -pub struct RND_SRC_SEL_W<'a> { - w: &'a mut W, -} -impl<'a> RND_SRC_SEL_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0x03) | (value as u32 & 0x03); - self.w - } -} +pub type RndSrcSelW<'a, REG> = crate::FieldWriter<'a, REG, 2>; impl R { #[doc = "Bits 0:1 - Selects the number of inverters (out of four possible selections) in the ring oscillator"] #[inline(always)] - pub fn rnd_src_sel(&self) -> RND_SRC_SEL_R { - RND_SRC_SEL_R::new((self.bits & 0x03) as u8) + pub fn rnd_src_sel(&self) -> RndSrcSelR { + RndSrcSelR::new((self.bits & 3) as u8) } } impl W { #[doc = "Bits 0:1 - Selects the number of inverters (out of four possible selections) in the ring oscillator"] #[inline(always)] - pub fn rnd_src_sel(&mut self) -> RND_SRC_SEL_W { - RND_SRC_SEL_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn rnd_src_sel(&mut self) -> RndSrcSelW { + RndSrcSelW::new(self, 0) } } -#[doc = "Configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [config](index.html) module"] -pub struct CONFIG_SPEC; -impl crate::RegisterSpec for CONFIG_SPEC { +#[doc = "Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`config::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`config::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConfigSpec; +impl crate::RegisterSpec for ConfigSpec { type Ux = u32; } -#[doc = "`read()` method returns [config::R](R) reader structure"] -impl crate::Readable for CONFIG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [config::W](W) writer structure"] -impl crate::Writable for CONFIG_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`config::R`](R) reader structure"] +impl crate::Readable for ConfigSpec {} +#[doc = "`write(|w| ..)` method takes [`config::W`](W) writer structure"] +impl crate::Writable for ConfigSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONFIG to value 0"] -impl crate::Resettable for CONFIG_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for ConfigSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/trng/debug_control.rs b/va416xx/src/trng/debug_control.rs index 324f6f9..aed3a3f 100644 --- a/va416xx/src/trng/debug_control.rs +++ b/va416xx/src/trng/debug_control.rs @@ -1,207 +1,70 @@ #[doc = "Register `DEBUG_CONTROL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DEBUG_CONTROL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `AUTO_CORRELATE_BYPASS` reader - The autocorrelation test in the TRNG module is bypassed"] -pub struct AUTO_CORRELATE_BYPASS_R(crate::FieldReader); -impl AUTO_CORRELATE_BYPASS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - AUTO_CORRELATE_BYPASS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for AUTO_CORRELATE_BYPASS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `AUTO_CORRELATE_BYPASS` writer - The autocorrelation test in the TRNG module is bypassed"] -pub struct AUTO_CORRELATE_BYPASS_W<'a> { - w: &'a mut W, -} -impl<'a> AUTO_CORRELATE_BYPASS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); - self.w - } -} -#[doc = "Field `CRNGT_BYPASS` reader - The CRNGT test in the TRNG is bypassed"] -pub struct CRNGT_BYPASS_R(crate::FieldReader); -impl CRNGT_BYPASS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CRNGT_BYPASS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CRNGT_BYPASS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CRNGT_BYPASS` writer - The CRNGT test in the TRNG is bypassed"] -pub struct CRNGT_BYPASS_W<'a> { - w: &'a mut W, -} -impl<'a> CRNGT_BYPASS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); - self.w - } -} +pub type W = crate::W; #[doc = "Field `VNC_PYPASS` reader - The Von Neumann balancer is bypassed"] -pub struct VNC_PYPASS_R(crate::FieldReader); -impl VNC_PYPASS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - VNC_PYPASS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for VNC_PYPASS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type VncPypassR = crate::BitReader; #[doc = "Field `VNC_PYPASS` writer - The Von Neumann balancer is bypassed"] -pub struct VNC_PYPASS_W<'a> { - w: &'a mut W, -} -impl<'a> VNC_PYPASS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); - self.w - } -} +pub type VncPypassW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `CRNGT_BYPASS` reader - The CRNGT test in the TRNG is bypassed"] +pub type CrngtBypassR = crate::BitReader; +#[doc = "Field `CRNGT_BYPASS` writer - The CRNGT test in the TRNG is bypassed"] +pub type CrngtBypassW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `AUTO_CORRELATE_BYPASS` reader - The autocorrelation test in the TRNG module is bypassed"] +pub type AutoCorrelateBypassR = crate::BitReader; +#[doc = "Field `AUTO_CORRELATE_BYPASS` writer - The autocorrelation test in the TRNG module is bypassed"] +pub type AutoCorrelateBypassW<'a, REG> = crate::BitWriter<'a, REG>; impl R { - #[doc = "Bit 3 - The autocorrelation test in the TRNG module is bypassed"] + #[doc = "Bit 1 - The Von Neumann balancer is bypassed"] #[inline(always)] - pub fn auto_correlate_bypass(&self) -> AUTO_CORRELATE_BYPASS_R { - AUTO_CORRELATE_BYPASS_R::new(((self.bits >> 3) & 0x01) != 0) + pub fn vnc_pypass(&self) -> VncPypassR { + VncPypassR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - The CRNGT test in the TRNG is bypassed"] #[inline(always)] - pub fn crngt_bypass(&self) -> CRNGT_BYPASS_R { - CRNGT_BYPASS_R::new(((self.bits >> 2) & 0x01) != 0) + pub fn crngt_bypass(&self) -> CrngtBypassR { + CrngtBypassR::new(((self.bits >> 2) & 1) != 0) } - #[doc = "Bit 1 - The Von Neumann balancer is bypassed"] + #[doc = "Bit 3 - The autocorrelation test in the TRNG module is bypassed"] #[inline(always)] - pub fn vnc_pypass(&self) -> VNC_PYPASS_R { - VNC_PYPASS_R::new(((self.bits >> 1) & 0x01) != 0) + pub fn auto_correlate_bypass(&self) -> AutoCorrelateBypassR { + AutoCorrelateBypassR::new(((self.bits >> 3) & 1) != 0) } } impl W { - #[doc = "Bit 3 - The autocorrelation test in the TRNG module is bypassed"] + #[doc = "Bit 1 - The Von Neumann balancer is bypassed"] #[inline(always)] - pub fn auto_correlate_bypass(&mut self) -> AUTO_CORRELATE_BYPASS_W { - AUTO_CORRELATE_BYPASS_W { w: self } + #[must_use] + pub fn vnc_pypass(&mut self) -> VncPypassW { + VncPypassW::new(self, 1) } #[doc = "Bit 2 - The CRNGT test in the TRNG is bypassed"] #[inline(always)] - pub fn crngt_bypass(&mut self) -> CRNGT_BYPASS_W { - CRNGT_BYPASS_W { w: self } + #[must_use] + pub fn crngt_bypass(&mut self) -> CrngtBypassW { + CrngtBypassW::new(self, 2) } - #[doc = "Bit 1 - The Von Neumann balancer is bypassed"] + #[doc = "Bit 3 - The autocorrelation test in the TRNG module is bypassed"] #[inline(always)] - pub fn vnc_pypass(&mut self) -> VNC_PYPASS_W { - VNC_PYPASS_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn auto_correlate_bypass(&mut self) -> AutoCorrelateBypassW { + AutoCorrelateBypassW::new(self, 3) } } -#[doc = "Section TBD\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [debug_control](index.html) module"] -pub struct DEBUG_CONTROL_SPEC; -impl crate::RegisterSpec for DEBUG_CONTROL_SPEC { +#[doc = "Section TBD\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`debug_control::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`debug_control::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DebugControlSpec; +impl crate::RegisterSpec for DebugControlSpec { type Ux = u32; } -#[doc = "`read()` method returns [debug_control::R](R) reader structure"] -impl crate::Readable for DEBUG_CONTROL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [debug_control::W](W) writer structure"] -impl crate::Writable for DEBUG_CONTROL_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`debug_control::R`](R) reader structure"] +impl crate::Readable for DebugControlSpec {} +#[doc = "`write(|w| ..)` method takes [`debug_control::W`](W) writer structure"] +impl crate::Writable for DebugControlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DEBUG_CONTROL to value 0"] -impl crate::Resettable for DEBUG_CONTROL_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for DebugControlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/trng/ehr_data0.rs b/va416xx/src/trng/ehr_data0.rs index 930ebba..1c6e91f 100644 --- a/va416xx/src/trng/ehr_data0.rs +++ b/va416xx/src/trng/ehr_data0.rs @@ -1,53 +1,22 @@ #[doc = "Register `EHR_DATA0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `EHR_DATA` reader - 32 Bits of Entropy Holding Register"] -pub struct EHR_DATA_R(crate::FieldReader); -impl EHR_DATA_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - EHR_DATA_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for EHR_DATA_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type EhrDataR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - 32 Bits of Entropy Holding Register"] #[inline(always)] - pub fn ehr_data(&self) -> EHR_DATA_R { - EHR_DATA_R::new(self.bits as u32) + pub fn ehr_data(&self) -> EhrDataR { + EhrDataR::new(self.bits) } } -#[doc = "Entropy Holding Register Data Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ehr_data0](index.html) module"] -pub struct EHR_DATA0_SPEC; -impl crate::RegisterSpec for EHR_DATA0_SPEC { +#[doc = "Entropy Holding Register Data Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ehr_data0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct EhrData0Spec; +impl crate::RegisterSpec for EhrData0Spec { type Ux = u32; } -#[doc = "`read()` method returns [ehr_data0::R](R) reader structure"] -impl crate::Readable for EHR_DATA0_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ehr_data0::R`](R) reader structure"] +impl crate::Readable for EhrData0Spec {} #[doc = "`reset()` method sets EHR_DATA0 to value 0"] -impl crate::Resettable for EHR_DATA0_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for EhrData0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/trng/ehr_data1.rs b/va416xx/src/trng/ehr_data1.rs deleted file mode 100644 index 685f0cb..0000000 --- a/va416xx/src/trng/ehr_data1.rs +++ /dev/null @@ -1,53 +0,0 @@ -#[doc = "Register `EHR_DATA1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Field `EHR_DATA` reader - 32 Bits of Entropy Holding Register"] -pub struct EHR_DATA_R(crate::FieldReader); -impl EHR_DATA_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - EHR_DATA_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for EHR_DATA_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl R { - #[doc = "Bits 0:31 - 32 Bits of Entropy Holding Register"] - #[inline(always)] - pub fn ehr_data(&self) -> EHR_DATA_R { - EHR_DATA_R::new(self.bits as u32) - } -} -#[doc = "Entropy Holding Register Data Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ehr_data1](index.html) module"] -pub struct EHR_DATA1_SPEC; -impl crate::RegisterSpec for EHR_DATA1_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [ehr_data1::R](R) reader structure"] -impl crate::Readable for EHR_DATA1_SPEC { - type Reader = R; -} -#[doc = "`reset()` method sets EHR_DATA1 to value 0"] -impl crate::Resettable for EHR_DATA1_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } -} diff --git a/va416xx/src/trng/ehr_data2.rs b/va416xx/src/trng/ehr_data2.rs deleted file mode 100644 index ef1298b..0000000 --- a/va416xx/src/trng/ehr_data2.rs +++ /dev/null @@ -1,53 +0,0 @@ -#[doc = "Register `EHR_DATA2` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Field `EHR_DATA` reader - 32 Bits of Entropy Holding Register"] -pub struct EHR_DATA_R(crate::FieldReader); -impl EHR_DATA_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - EHR_DATA_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for EHR_DATA_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl R { - #[doc = "Bits 0:31 - 32 Bits of Entropy Holding Register"] - #[inline(always)] - pub fn ehr_data(&self) -> EHR_DATA_R { - EHR_DATA_R::new(self.bits as u32) - } -} -#[doc = "Entropy Holding Register Data Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ehr_data2](index.html) module"] -pub struct EHR_DATA2_SPEC; -impl crate::RegisterSpec for EHR_DATA2_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [ehr_data2::R](R) reader structure"] -impl crate::Readable for EHR_DATA2_SPEC { - type Reader = R; -} -#[doc = "`reset()` method sets EHR_DATA2 to value 0"] -impl crate::Resettable for EHR_DATA2_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } -} diff --git a/va416xx/src/trng/ehr_data3.rs b/va416xx/src/trng/ehr_data3.rs deleted file mode 100644 index 7a0462d..0000000 --- a/va416xx/src/trng/ehr_data3.rs +++ /dev/null @@ -1,53 +0,0 @@ -#[doc = "Register `EHR_DATA3` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Field `EHR_DATA` reader - 32 Bits of Entropy Holding Register"] -pub struct EHR_DATA_R(crate::FieldReader); -impl EHR_DATA_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - EHR_DATA_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for EHR_DATA_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl R { - #[doc = "Bits 0:31 - 32 Bits of Entropy Holding Register"] - #[inline(always)] - pub fn ehr_data(&self) -> EHR_DATA_R { - EHR_DATA_R::new(self.bits as u32) - } -} -#[doc = "Entropy Holding Register Data Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ehr_data3](index.html) module"] -pub struct EHR_DATA3_SPEC; -impl crate::RegisterSpec for EHR_DATA3_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [ehr_data3::R](R) reader structure"] -impl crate::Readable for EHR_DATA3_SPEC { - type Reader = R; -} -#[doc = "`reset()` method sets EHR_DATA3 to value 0"] -impl crate::Resettable for EHR_DATA3_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } -} diff --git a/va416xx/src/trng/ehr_data4.rs b/va416xx/src/trng/ehr_data4.rs deleted file mode 100644 index 7df2057..0000000 --- a/va416xx/src/trng/ehr_data4.rs +++ /dev/null @@ -1,53 +0,0 @@ -#[doc = "Register `EHR_DATA4` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Field `EHR_DATA` reader - 32 Bits of Entropy Holding Register"] -pub struct EHR_DATA_R(crate::FieldReader); -impl EHR_DATA_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - EHR_DATA_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for EHR_DATA_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl R { - #[doc = "Bits 0:31 - 32 Bits of Entropy Holding Register"] - #[inline(always)] - pub fn ehr_data(&self) -> EHR_DATA_R { - EHR_DATA_R::new(self.bits as u32) - } -} -#[doc = "Entropy Holding Register Data Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ehr_data4](index.html) module"] -pub struct EHR_DATA4_SPEC; -impl crate::RegisterSpec for EHR_DATA4_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [ehr_data4::R](R) reader structure"] -impl crate::Readable for EHR_DATA4_SPEC { - type Reader = R; -} -#[doc = "`reset()` method sets EHR_DATA4 to value 0"] -impl crate::Resettable for EHR_DATA4_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } -} diff --git a/va416xx/src/trng/ehr_data5.rs b/va416xx/src/trng/ehr_data5.rs deleted file mode 100644 index f9ba735..0000000 --- a/va416xx/src/trng/ehr_data5.rs +++ /dev/null @@ -1,53 +0,0 @@ -#[doc = "Register `EHR_DATA5` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Field `EHR_DATA` reader - 32 Bits of Entropy Holding Register"] -pub struct EHR_DATA_R(crate::FieldReader); -impl EHR_DATA_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - EHR_DATA_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for EHR_DATA_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl R { - #[doc = "Bits 0:31 - 32 Bits of Entropy Holding Register"] - #[inline(always)] - pub fn ehr_data(&self) -> EHR_DATA_R { - EHR_DATA_R::new(self.bits as u32) - } -} -#[doc = "Entropy Holding Register Data Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ehr_data5](index.html) module"] -pub struct EHR_DATA5_SPEC; -impl crate::RegisterSpec for EHR_DATA5_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [ehr_data5::R](R) reader structure"] -impl crate::Readable for EHR_DATA5_SPEC { - type Reader = R; -} -#[doc = "`reset()` method sets EHR_DATA5 to value 0"] -impl crate::Resettable for EHR_DATA5_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } -} diff --git a/va416xx/src/trng/icr.rs b/va416xx/src/trng/icr.rs index 1344396..89ec323 100644 --- a/va416xx/src/trng/icr.rs +++ b/va416xx/src/trng/icr.rs @@ -1,258 +1,89 @@ #[doc = "Register `ICR` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ICR` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `VN_ERR` reader - Clears a Von Neumann error"] -pub struct VN_ERR_R(crate::FieldReader); -impl VN_ERR_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - VN_ERR_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for VN_ERR_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `VN_ERR` writer - Clears a Von Neumann error"] -pub struct VN_ERR_W<'a> { - w: &'a mut W, -} -impl<'a> VN_ERR_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); - self.w - } -} -#[doc = "Field `CRNGT_ERR` reader - Clear a Continuous Random Number Generation Testing (CRNGT) error"] -pub struct CRNGT_ERR_R(crate::FieldReader); -impl CRNGT_ERR_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CRNGT_ERR_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CRNGT_ERR_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CRNGT_ERR` writer - Clear a Continuous Random Number Generation Testing (CRNGT) error"] -pub struct CRNGT_ERR_W<'a> { - w: &'a mut W, -} -impl<'a> CRNGT_ERR_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); - self.w - } -} -#[doc = "Field `AUTOCORR_ERR` reader - Software cannot clear this bit. Only a TRNG reset can clear this bit"] -pub struct AUTOCORR_ERR_R(crate::FieldReader); -impl AUTOCORR_ERR_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - AUTOCORR_ERR_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for AUTOCORR_ERR_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `AUTOCORR_ERR` writer - Software cannot clear this bit. Only a TRNG reset can clear this bit"] -pub struct AUTOCORR_ERR_W<'a> { - w: &'a mut W, -} -impl<'a> AUTOCORR_ERR_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); - self.w - } -} +pub type W = crate::W; #[doc = "Field `EHR_VALID` reader - Set to 1 after the EHR_DATA\\[0,1,2,3,4,5\\] registers have been read"] -pub struct EHR_VALID_R(crate::FieldReader); -impl EHR_VALID_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - EHR_VALID_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for EHR_VALID_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type EhrValidR = crate::BitReader; #[doc = "Field `EHR_VALID` writer - Set to 1 after the EHR_DATA\\[0,1,2,3,4,5\\] registers have been read"] -pub struct EHR_VALID_W<'a> { - w: &'a mut W, -} -impl<'a> EHR_VALID_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} +pub type EhrValidW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `AUTOCORR_ERR` reader - Software cannot clear this bit. Only a TRNG reset can clear this bit"] +pub type AutocorrErrR = crate::BitReader; +#[doc = "Field `AUTOCORR_ERR` writer - Software cannot clear this bit. Only a TRNG reset can clear this bit"] +pub type AutocorrErrW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `CRNGT_ERR` reader - Clear a Continuous Random Number Generation Testing (CRNGT) error"] +pub type CrngtErrR = crate::BitReader; +#[doc = "Field `CRNGT_ERR` writer - Clear a Continuous Random Number Generation Testing (CRNGT) error"] +pub type CrngtErrW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `VN_ERR` reader - Clears a Von Neumann error"] +pub type VnErrR = crate::BitReader; +#[doc = "Field `VN_ERR` writer - Clears a Von Neumann error"] +pub type VnErrW<'a, REG> = crate::BitWriter<'a, REG>; impl R { - #[doc = "Bit 3 - Clears a Von Neumann error"] - #[inline(always)] - pub fn vn_err(&self) -> VN_ERR_R { - VN_ERR_R::new(((self.bits >> 3) & 0x01) != 0) - } - #[doc = "Bit 2 - Clear a Continuous Random Number Generation Testing (CRNGT) error"] - #[inline(always)] - pub fn crngt_err(&self) -> CRNGT_ERR_R { - CRNGT_ERR_R::new(((self.bits >> 2) & 0x01) != 0) - } - #[doc = "Bit 1 - Software cannot clear this bit. Only a TRNG reset can clear this bit"] - #[inline(always)] - pub fn autocorr_err(&self) -> AUTOCORR_ERR_R { - AUTOCORR_ERR_R::new(((self.bits >> 1) & 0x01) != 0) - } #[doc = "Bit 0 - Set to 1 after the EHR_DATA\\[0,1,2,3,4,5\\] registers have been read"] #[inline(always)] - pub fn ehr_valid(&self) -> EHR_VALID_R { - EHR_VALID_R::new((self.bits & 0x01) != 0) + pub fn ehr_valid(&self) -> EhrValidR { + EhrValidR::new((self.bits & 1) != 0) + } + #[doc = "Bit 1 - Software cannot clear this bit. Only a TRNG reset can clear this bit"] + #[inline(always)] + pub fn autocorr_err(&self) -> AutocorrErrR { + AutocorrErrR::new(((self.bits >> 1) & 1) != 0) + } + #[doc = "Bit 2 - Clear a Continuous Random Number Generation Testing (CRNGT) error"] + #[inline(always)] + pub fn crngt_err(&self) -> CrngtErrR { + CrngtErrR::new(((self.bits >> 2) & 1) != 0) + } + #[doc = "Bit 3 - Clears a Von Neumann error"] + #[inline(always)] + pub fn vn_err(&self) -> VnErrR { + VnErrR::new(((self.bits >> 3) & 1) != 0) } } impl W { - #[doc = "Bit 3 - Clears a Von Neumann error"] - #[inline(always)] - pub fn vn_err(&mut self) -> VN_ERR_W { - VN_ERR_W { w: self } - } - #[doc = "Bit 2 - Clear a Continuous Random Number Generation Testing (CRNGT) error"] - #[inline(always)] - pub fn crngt_err(&mut self) -> CRNGT_ERR_W { - CRNGT_ERR_W { w: self } - } - #[doc = "Bit 1 - Software cannot clear this bit. Only a TRNG reset can clear this bit"] - #[inline(always)] - pub fn autocorr_err(&mut self) -> AUTOCORR_ERR_W { - AUTOCORR_ERR_W { w: self } - } #[doc = "Bit 0 - Set to 1 after the EHR_DATA\\[0,1,2,3,4,5\\] registers have been read"] #[inline(always)] - pub fn ehr_valid(&mut self) -> EHR_VALID_W { - EHR_VALID_W { w: self } + #[must_use] + pub fn ehr_valid(&mut self) -> EhrValidW { + EhrValidW::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bit 1 - Software cannot clear this bit. Only a TRNG reset can clear this bit"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn autocorr_err(&mut self) -> AutocorrErrW { + AutocorrErrW::new(self, 1) + } + #[doc = "Bit 2 - Clear a Continuous Random Number Generation Testing (CRNGT) error"] + #[inline(always)] + #[must_use] + pub fn crngt_err(&mut self) -> CrngtErrW { + CrngtErrW::new(self, 2) + } + #[doc = "Bit 3 - Clears a Von Neumann error"] + #[inline(always)] + #[must_use] + pub fn vn_err(&mut self) -> VnErrW { + VnErrW::new(self, 3) } } -#[doc = "Interrupt Clear Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [icr](index.html) module"] -pub struct ICR_SPEC; -impl crate::RegisterSpec for ICR_SPEC { +#[doc = "Interrupt Clear Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`icr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`icr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IcrSpec; +impl crate::RegisterSpec for IcrSpec { type Ux = u32; } -#[doc = "`read()` method returns [icr::R](R) reader structure"] -impl crate::Readable for ICR_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [icr::W](W) writer structure"] -impl crate::Writable for ICR_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`icr::R`](R) reader structure"] +impl crate::Readable for IcrSpec {} +#[doc = "`write(|w| ..)` method takes [`icr::W`](W) writer structure"] +impl crate::Writable for IcrSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ICR to value 0"] -impl crate::Resettable for ICR_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for IcrSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/trng/imr.rs b/va416xx/src/trng/imr.rs index cb4bb2c..b3137fa 100644 --- a/va416xx/src/trng/imr.rs +++ b/va416xx/src/trng/imr.rs @@ -1,254 +1,85 @@ #[doc = "Register `IMR` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IMR` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `VN_ERR_INT_MASK` reader - Mask the Von Neumann error"] -pub struct VN_ERR_INT_MASK_R(crate::FieldReader); -impl VN_ERR_INT_MASK_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - VN_ERR_INT_MASK_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for VN_ERR_INT_MASK_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `VN_ERR_INT_MASK` writer - Mask the Von Neumann error"] -pub struct VN_ERR_INT_MASK_W<'a> { - w: &'a mut W, -} -impl<'a> VN_ERR_INT_MASK_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); - self.w - } -} -#[doc = "Field `CRNGT_ERR_INT_MASK` reader - Mask the CRNGT error"] -pub struct CRNGT_ERR_INT_MASK_R(crate::FieldReader); -impl CRNGT_ERR_INT_MASK_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CRNGT_ERR_INT_MASK_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CRNGT_ERR_INT_MASK_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CRNGT_ERR_INT_MASK` writer - Mask the CRNGT error"] -pub struct CRNGT_ERR_INT_MASK_W<'a> { - w: &'a mut W, -} -impl<'a> CRNGT_ERR_INT_MASK_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); - self.w - } -} -#[doc = "Field `AUTOCORR_ERR_INT_MASK` reader - Mask the Autocorrelation error"] -pub struct AUTOCORR_ERR_INT_MASK_R(crate::FieldReader); -impl AUTOCORR_ERR_INT_MASK_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - AUTOCORR_ERR_INT_MASK_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for AUTOCORR_ERR_INT_MASK_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `AUTOCORR_ERR_INT_MASK` writer - Mask the Autocorrelation error"] -pub struct AUTOCORR_ERR_INT_MASK_W<'a> { - w: &'a mut W, -} -impl<'a> AUTOCORR_ERR_INT_MASK_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); - self.w - } -} +pub type W = crate::W; #[doc = "Field `EHR_VALID_INT_MASK` reader - Mask when the TRNG has collected 192 bits"] -pub struct EHR_VALID_INT_MASK_R(crate::FieldReader); -impl EHR_VALID_INT_MASK_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - EHR_VALID_INT_MASK_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for EHR_VALID_INT_MASK_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type EhrValidIntMaskR = crate::BitReader; #[doc = "Field `EHR_VALID_INT_MASK` writer - Mask when the TRNG has collected 192 bits"] -pub struct EHR_VALID_INT_MASK_W<'a> { - w: &'a mut W, -} -impl<'a> EHR_VALID_INT_MASK_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} +pub type EhrValidIntMaskW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `AUTOCORR_ERR_INT_MASK` reader - Mask the Autocorrelation error"] +pub type AutocorrErrIntMaskR = crate::BitReader; +#[doc = "Field `AUTOCORR_ERR_INT_MASK` writer - Mask the Autocorrelation error"] +pub type AutocorrErrIntMaskW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `CRNGT_ERR_INT_MASK` reader - Mask the CRNGT error"] +pub type CrngtErrIntMaskR = crate::BitReader; +#[doc = "Field `CRNGT_ERR_INT_MASK` writer - Mask the CRNGT error"] +pub type CrngtErrIntMaskW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `VN_ERR_INT_MASK` reader - Mask the Von Neumann error"] +pub type VnErrIntMaskR = crate::BitReader; +#[doc = "Field `VN_ERR_INT_MASK` writer - Mask the Von Neumann error"] +pub type VnErrIntMaskW<'a, REG> = crate::BitWriter<'a, REG>; impl R { - #[doc = "Bit 3 - Mask the Von Neumann error"] + #[doc = "Bit 0 - Mask when the TRNG has collected 192 bits"] #[inline(always)] - pub fn vn_err_int_mask(&self) -> VN_ERR_INT_MASK_R { - VN_ERR_INT_MASK_R::new(((self.bits >> 3) & 0x01) != 0) - } - #[doc = "Bit 2 - Mask the CRNGT error"] - #[inline(always)] - pub fn crngt_err_int_mask(&self) -> CRNGT_ERR_INT_MASK_R { - CRNGT_ERR_INT_MASK_R::new(((self.bits >> 2) & 0x01) != 0) + pub fn ehr_valid_int_mask(&self) -> EhrValidIntMaskR { + EhrValidIntMaskR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Mask the Autocorrelation error"] #[inline(always)] - pub fn autocorr_err_int_mask(&self) -> AUTOCORR_ERR_INT_MASK_R { - AUTOCORR_ERR_INT_MASK_R::new(((self.bits >> 1) & 0x01) != 0) + pub fn autocorr_err_int_mask(&self) -> AutocorrErrIntMaskR { + AutocorrErrIntMaskR::new(((self.bits >> 1) & 1) != 0) } - #[doc = "Bit 0 - Mask when the TRNG has collected 192 bits"] + #[doc = "Bit 2 - Mask the CRNGT error"] #[inline(always)] - pub fn ehr_valid_int_mask(&self) -> EHR_VALID_INT_MASK_R { - EHR_VALID_INT_MASK_R::new((self.bits & 0x01) != 0) + pub fn crngt_err_int_mask(&self) -> CrngtErrIntMaskR { + CrngtErrIntMaskR::new(((self.bits >> 2) & 1) != 0) + } + #[doc = "Bit 3 - Mask the Von Neumann error"] + #[inline(always)] + pub fn vn_err_int_mask(&self) -> VnErrIntMaskR { + VnErrIntMaskR::new(((self.bits >> 3) & 1) != 0) } } impl W { - #[doc = "Bit 3 - Mask the Von Neumann error"] + #[doc = "Bit 0 - Mask when the TRNG has collected 192 bits"] #[inline(always)] - pub fn vn_err_int_mask(&mut self) -> VN_ERR_INT_MASK_W { - VN_ERR_INT_MASK_W { w: self } - } - #[doc = "Bit 2 - Mask the CRNGT error"] - #[inline(always)] - pub fn crngt_err_int_mask(&mut self) -> CRNGT_ERR_INT_MASK_W { - CRNGT_ERR_INT_MASK_W { w: self } + #[must_use] + pub fn ehr_valid_int_mask(&mut self) -> EhrValidIntMaskW { + EhrValidIntMaskW::new(self, 0) } #[doc = "Bit 1 - Mask the Autocorrelation error"] #[inline(always)] - pub fn autocorr_err_int_mask(&mut self) -> AUTOCORR_ERR_INT_MASK_W { - AUTOCORR_ERR_INT_MASK_W { w: self } + #[must_use] + pub fn autocorr_err_int_mask(&mut self) -> AutocorrErrIntMaskW { + AutocorrErrIntMaskW::new(self, 1) } - #[doc = "Bit 0 - Mask when the TRNG has collected 192 bits"] + #[doc = "Bit 2 - Mask the CRNGT error"] #[inline(always)] - pub fn ehr_valid_int_mask(&mut self) -> EHR_VALID_INT_MASK_W { - EHR_VALID_INT_MASK_W { w: self } + #[must_use] + pub fn crngt_err_int_mask(&mut self) -> CrngtErrIntMaskW { + CrngtErrIntMaskW::new(self, 2) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bit 3 - Mask the Von Neumann error"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn vn_err_int_mask(&mut self) -> VnErrIntMaskW { + VnErrIntMaskW::new(self, 3) } } -#[doc = "Interrupt Mask Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [imr](index.html) module"] -pub struct IMR_SPEC; -impl crate::RegisterSpec for IMR_SPEC { +#[doc = "Interrupt Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`imr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`imr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ImrSpec; +impl crate::RegisterSpec for ImrSpec { type Ux = u32; } -#[doc = "`read()` method returns [imr::R](R) reader structure"] -impl crate::Readable for IMR_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [imr::W](W) writer structure"] -impl crate::Writable for IMR_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`imr::R`](R) reader structure"] +impl crate::Readable for ImrSpec {} +#[doc = "`write(|w| ..)` method takes [`imr::W`](W) writer structure"] +impl crate::Writable for ImrSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IMR to value 0x0f"] -impl crate::Resettable for IMR_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0x0f - } +impl crate::Resettable for ImrSpec { + const RESET_VALUE: u32 = 0x0f; } diff --git a/va416xx/src/trng/isr.rs b/va416xx/src/trng/isr.rs index 950fb74..57bdab4 100644 --- a/va416xx/src/trng/isr.rs +++ b/va416xx/src/trng/isr.rs @@ -1,113 +1,43 @@ #[doc = "Register `ISR` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Field `VN_ERR` reader - Indicates a Von Neumann error"] -pub struct VN_ERR_R(crate::FieldReader); -impl VN_ERR_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - VN_ERR_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for VN_ERR_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `CRNGT_ERR` reader - Indicates a Continuous Random Number Generation Testing (CRNGT) error"] -pub struct CRNGT_ERR_R(crate::FieldReader); -impl CRNGT_ERR_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - CRNGT_ERR_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CRNGT_ERR_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `AUTOCORR_ERR` reader - Indicates that the Autocorrelation test failed four times in a row"] -pub struct AUTOCORR_ERR_R(crate::FieldReader); -impl AUTOCORR_ERR_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - AUTOCORR_ERR_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for AUTOCORR_ERR_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type R = crate::R; #[doc = "Field `EHR_VALID` reader - 192 bits have been collected in the TRNG"] -pub struct EHR_VALID_R(crate::FieldReader); -impl EHR_VALID_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - EHR_VALID_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for EHR_VALID_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type EhrValidR = crate::BitReader; +#[doc = "Field `AUTOCORR_ERR` reader - Indicates that the Autocorrelation test failed four times in a row"] +pub type AutocorrErrR = crate::BitReader; +#[doc = "Field `CRNGT_ERR` reader - Indicates a Continuous Random Number Generation Testing (CRNGT) error"] +pub type CrngtErrR = crate::BitReader; +#[doc = "Field `VN_ERR` reader - Indicates a Von Neumann error"] +pub type VnErrR = crate::BitReader; impl R { - #[doc = "Bit 3 - Indicates a Von Neumann error"] + #[doc = "Bit 0 - 192 bits have been collected in the TRNG"] #[inline(always)] - pub fn vn_err(&self) -> VN_ERR_R { - VN_ERR_R::new(((self.bits >> 3) & 0x01) != 0) - } - #[doc = "Bit 2 - Indicates a Continuous Random Number Generation Testing (CRNGT) error"] - #[inline(always)] - pub fn crngt_err(&self) -> CRNGT_ERR_R { - CRNGT_ERR_R::new(((self.bits >> 2) & 0x01) != 0) + pub fn ehr_valid(&self) -> EhrValidR { + EhrValidR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Indicates that the Autocorrelation test failed four times in a row"] #[inline(always)] - pub fn autocorr_err(&self) -> AUTOCORR_ERR_R { - AUTOCORR_ERR_R::new(((self.bits >> 1) & 0x01) != 0) + pub fn autocorr_err(&self) -> AutocorrErrR { + AutocorrErrR::new(((self.bits >> 1) & 1) != 0) } - #[doc = "Bit 0 - 192 bits have been collected in the TRNG"] + #[doc = "Bit 2 - Indicates a Continuous Random Number Generation Testing (CRNGT) error"] #[inline(always)] - pub fn ehr_valid(&self) -> EHR_VALID_R { - EHR_VALID_R::new((self.bits & 0x01) != 0) + pub fn crngt_err(&self) -> CrngtErrR { + CrngtErrR::new(((self.bits >> 2) & 1) != 0) + } + #[doc = "Bit 3 - Indicates a Von Neumann error"] + #[inline(always)] + pub fn vn_err(&self) -> VnErrR { + VnErrR::new(((self.bits >> 3) & 1) != 0) } } -#[doc = "Interrupt Status Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [isr](index.html) module"] -pub struct ISR_SPEC; -impl crate::RegisterSpec for ISR_SPEC { +#[doc = "Interrupt Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`isr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IsrSpec; +impl crate::RegisterSpec for IsrSpec { type Ux = u32; } -#[doc = "`read()` method returns [isr::R](R) reader structure"] -impl crate::Readable for ISR_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`isr::R`](R) reader structure"] +impl crate::Readable for IsrSpec {} #[doc = "`reset()` method sets ISR to value 0"] -impl crate::Resettable for ISR_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for IsrSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/trng/rnd_source_enable.rs b/va416xx/src/trng/rnd_source_enable.rs index cd3415c..194e5e0 100644 --- a/va416xx/src/trng/rnd_source_enable.rs +++ b/va416xx/src/trng/rnd_source_enable.rs @@ -1,113 +1,40 @@ #[doc = "Register `RND_SOURCE_ENABLE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RND_SOURCE_ENABLE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RND_SRC_EN` reader - The entropy source, ring oscillator, is enabled"] -pub struct RND_SRC_EN_R(crate::FieldReader); -impl RND_SRC_EN_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RND_SRC_EN_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RND_SRC_EN_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type RndSrcEnR = crate::BitReader; #[doc = "Field `RND_SRC_EN` writer - The entropy source, ring oscillator, is enabled"] -pub struct RND_SRC_EN_W<'a> { - w: &'a mut W, -} -impl<'a> RND_SRC_EN_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} +pub type RndSrcEnW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - The entropy source, ring oscillator, is enabled"] #[inline(always)] - pub fn rnd_src_en(&self) -> RND_SRC_EN_R { - RND_SRC_EN_R::new((self.bits & 0x01) != 0) + pub fn rnd_src_en(&self) -> RndSrcEnR { + RndSrcEnR::new((self.bits & 1) != 0) } } impl W { #[doc = "Bit 0 - The entropy source, ring oscillator, is enabled"] #[inline(always)] - pub fn rnd_src_en(&mut self) -> RND_SRC_EN_W { - RND_SRC_EN_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn rnd_src_en(&mut self) -> RndSrcEnW { + RndSrcEnW::new(self, 0) } } -#[doc = "Random Source Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rnd_source_enable](index.html) module"] -pub struct RND_SOURCE_ENABLE_SPEC; -impl crate::RegisterSpec for RND_SOURCE_ENABLE_SPEC { +#[doc = "Random Source Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rnd_source_enable::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rnd_source_enable::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RndSourceEnableSpec; +impl crate::RegisterSpec for RndSourceEnableSpec { type Ux = u32; } -#[doc = "`read()` method returns [rnd_source_enable::R](R) reader structure"] -impl crate::Readable for RND_SOURCE_ENABLE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [rnd_source_enable::W](W) writer structure"] -impl crate::Writable for RND_SOURCE_ENABLE_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`rnd_source_enable::R`](R) reader structure"] +impl crate::Readable for RndSourceEnableSpec {} +#[doc = "`write(|w| ..)` method takes [`rnd_source_enable::W`](W) writer structure"] +impl crate::Writable for RndSourceEnableSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RND_SOURCE_ENABLE to value 0"] -impl crate::Resettable for RND_SOURCE_ENABLE_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for RndSourceEnableSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/trng/rst_bits_counter.rs b/va416xx/src/trng/rst_bits_counter.rs index 36ccc4d..1ec18a0 100644 --- a/va416xx/src/trng/rst_bits_counter.rs +++ b/va416xx/src/trng/rst_bits_counter.rs @@ -1,113 +1,40 @@ #[doc = "Register `RST_BITS_COUNTER` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RST_BITS_COUNTER` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RST_BITS_COUNTER` reader - Writing any value to this bit resets the bits counter and TRNG valid registers"] -pub struct RST_BITS_COUNTER_R(crate::FieldReader); -impl RST_BITS_COUNTER_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RST_BITS_COUNTER_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RST_BITS_COUNTER_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type RstBitsCounterR = crate::BitReader; #[doc = "Field `RST_BITS_COUNTER` writer - Writing any value to this bit resets the bits counter and TRNG valid registers"] -pub struct RST_BITS_COUNTER_W<'a> { - w: &'a mut W, -} -impl<'a> RST_BITS_COUNTER_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} +pub type RstBitsCounterW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Writing any value to this bit resets the bits counter and TRNG valid registers"] #[inline(always)] - pub fn rst_bits_counter(&self) -> RST_BITS_COUNTER_R { - RST_BITS_COUNTER_R::new((self.bits & 0x01) != 0) + pub fn rst_bits_counter(&self) -> RstBitsCounterR { + RstBitsCounterR::new((self.bits & 1) != 0) } } impl W { #[doc = "Bit 0 - Writing any value to this bit resets the bits counter and TRNG valid registers"] #[inline(always)] - pub fn rst_bits_counter(&mut self) -> RST_BITS_COUNTER_W { - RST_BITS_COUNTER_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn rst_bits_counter(&mut self) -> RstBitsCounterW { + RstBitsCounterW::new(self, 0) } } -#[doc = "Reset Bits Counter Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rst_bits_counter](index.html) module"] -pub struct RST_BITS_COUNTER_SPEC; -impl crate::RegisterSpec for RST_BITS_COUNTER_SPEC { +#[doc = "Reset Bits Counter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rst_bits_counter::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rst_bits_counter::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RstBitsCounterSpec; +impl crate::RegisterSpec for RstBitsCounterSpec { type Ux = u32; } -#[doc = "`read()` method returns [rst_bits_counter::R](R) reader structure"] -impl crate::Readable for RST_BITS_COUNTER_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [rst_bits_counter::W](W) writer structure"] -impl crate::Writable for RST_BITS_COUNTER_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`rst_bits_counter::R`](R) reader structure"] +impl crate::Readable for RstBitsCounterSpec {} +#[doc = "`write(|w| ..)` method takes [`rst_bits_counter::W`](W) writer structure"] +impl crate::Writable for RstBitsCounterSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RST_BITS_COUNTER to value 0"] -impl crate::Resettable for RST_BITS_COUNTER_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for RstBitsCounterSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/trng/sample_cnt1.rs b/va416xx/src/trng/sample_cnt1.rs index 87bade9..21e445e 100644 --- a/va416xx/src/trng/sample_cnt1.rs +++ b/va416xx/src/trng/sample_cnt1.rs @@ -1,103 +1,40 @@ #[doc = "Register `SAMPLE_CNT1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SAMPLE_CNT1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SAMPLE_CNTR1` reader - Sets the number of clk cycles between two consecutive ring oscillator samples"] -pub struct SAMPLE_CNTR1_R(crate::FieldReader); -impl SAMPLE_CNTR1_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - SAMPLE_CNTR1_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for SAMPLE_CNTR1_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type SampleCntr1R = crate::FieldReader; #[doc = "Field `SAMPLE_CNTR1` writer - Sets the number of clk cycles between two consecutive ring oscillator samples"] -pub struct SAMPLE_CNTR1_W<'a> { - w: &'a mut W, -} -impl<'a> SAMPLE_CNTR1_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - self.w.bits = value as u32; - self.w - } -} +pub type SampleCntr1W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Sets the number of clk cycles between two consecutive ring oscillator samples"] #[inline(always)] - pub fn sample_cntr1(&self) -> SAMPLE_CNTR1_R { - SAMPLE_CNTR1_R::new(self.bits as u32) + pub fn sample_cntr1(&self) -> SampleCntr1R { + SampleCntr1R::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Sets the number of clk cycles between two consecutive ring oscillator samples"] #[inline(always)] - pub fn sample_cntr1(&mut self) -> SAMPLE_CNTR1_W { - SAMPLE_CNTR1_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn sample_cntr1(&mut self) -> SampleCntr1W { + SampleCntr1W::new(self, 0) } } -#[doc = "Section TBD\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sample_cnt1](index.html) module"] -pub struct SAMPLE_CNT1_SPEC; -impl crate::RegisterSpec for SAMPLE_CNT1_SPEC { +#[doc = "Section TBD\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sample_cnt1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sample_cnt1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SampleCnt1Spec; +impl crate::RegisterSpec for SampleCnt1Spec { type Ux = u32; } -#[doc = "`read()` method returns [sample_cnt1::R](R) reader structure"] -impl crate::Readable for SAMPLE_CNT1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [sample_cnt1::W](W) writer structure"] -impl crate::Writable for SAMPLE_CNT1_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`sample_cnt1::R`](R) reader structure"] +impl crate::Readable for SampleCnt1Spec {} +#[doc = "`write(|w| ..)` method takes [`sample_cnt1::W`](W) writer structure"] +impl crate::Writable for SampleCnt1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SAMPLE_CNT1 to value 0xffff"] -impl crate::Resettable for SAMPLE_CNT1_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0xffff - } +impl crate::Resettable for SampleCnt1Spec { + const RESET_VALUE: u32 = 0xffff; } diff --git a/va416xx/src/trng/sw_reset.rs b/va416xx/src/trng/sw_reset.rs index bdb742c..585f61e 100644 --- a/va416xx/src/trng/sw_reset.rs +++ b/va416xx/src/trng/sw_reset.rs @@ -1,113 +1,40 @@ #[doc = "Register `SW_RESET` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SW_RESET` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SW_RESET` reader - Writing 1 to this register causes an internal TRNG reset"] -pub struct SW_RESET_R(crate::FieldReader); -impl SW_RESET_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - SW_RESET_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for SW_RESET_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type SwResetR = crate::BitReader; #[doc = "Field `SW_RESET` writer - Writing 1 to this register causes an internal TRNG reset"] -pub struct SW_RESET_W<'a> { - w: &'a mut W, -} -impl<'a> SW_RESET_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} +pub type SwResetW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Writing 1 to this register causes an internal TRNG reset"] #[inline(always)] - pub fn sw_reset(&self) -> SW_RESET_R { - SW_RESET_R::new((self.bits & 0x01) != 0) + pub fn sw_reset(&self) -> SwResetR { + SwResetR::new((self.bits & 1) != 0) } } impl W { #[doc = "Bit 0 - Writing 1 to this register causes an internal TRNG reset"] #[inline(always)] - pub fn sw_reset(&mut self) -> SW_RESET_W { - SW_RESET_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn sw_reset(&mut self) -> SwResetW { + SwResetW::new(self, 0) } } -#[doc = "Reset Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sw_reset](index.html) module"] -pub struct SW_RESET_SPEC; -impl crate::RegisterSpec for SW_RESET_SPEC { +#[doc = "Reset Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sw_reset::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sw_reset::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SwResetSpec; +impl crate::RegisterSpec for SwResetSpec { type Ux = u32; } -#[doc = "`read()` method returns [sw_reset::R](R) reader structure"] -impl crate::Readable for SW_RESET_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [sw_reset::W](W) writer structure"] -impl crate::Writable for SW_RESET_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`sw_reset::R`](R) reader structure"] +impl crate::Readable for SwResetSpec {} +#[doc = "`write(|w| ..)` method takes [`sw_reset::W`](W) writer structure"] +impl crate::Writable for SwResetSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SW_RESET to value 0"] -impl crate::Resettable for SW_RESET_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for SwResetSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/trng/valid.rs b/va416xx/src/trng/valid.rs index 3dec03a..770e5ed 100644 --- a/va416xx/src/trng/valid.rs +++ b/va416xx/src/trng/valid.rs @@ -1,53 +1,22 @@ #[doc = "Register `VALID` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `EHR_VALID` reader - Indicates that the collection of bits in the TRNG is complete"] -pub struct EHR_VALID_R(crate::FieldReader); -impl EHR_VALID_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - EHR_VALID_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for EHR_VALID_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type EhrValidR = crate::BitReader; impl R { #[doc = "Bit 0 - Indicates that the collection of bits in the TRNG is complete"] #[inline(always)] - pub fn ehr_valid(&self) -> EHR_VALID_R { - EHR_VALID_R::new((self.bits & 0x01) != 0) + pub fn ehr_valid(&self) -> EhrValidR { + EhrValidR::new((self.bits & 1) != 0) } } -#[doc = "Valid Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [valid](index.html) module"] -pub struct VALID_SPEC; -impl crate::RegisterSpec for VALID_SPEC { +#[doc = "Valid Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`valid::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ValidSpec; +impl crate::RegisterSpec for ValidSpec { type Ux = u32; } -#[doc = "`read()` method returns [valid::R](R) reader structure"] -impl crate::Readable for VALID_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`valid::R`](R) reader structure"] +impl crate::Readable for ValidSpec {} #[doc = "`reset()` method sets VALID to value 0"] -impl crate::Resettable for VALID_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for ValidSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/uart0.rs b/va416xx/src/uart0.rs index 4f529a1..71aa47b 100644 --- a/va416xx/src/uart0.rs +++ b/va416xx/src/uart0.rs @@ -1,119 +1,223 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - #[doc = "0x00 - Data In/Out Register"] - pub data: crate::Reg, - #[doc = "0x04 - Enable Register"] - pub enable: crate::Reg, - #[doc = "0x08 - Control Register"] - pub ctrl: crate::Reg, - #[doc = "0x0c - Clock Scale Register"] - pub clkscale: crate::Reg, - #[doc = "0x10 - Status Register"] - pub rxstatus: crate::Reg, - #[doc = "0x14 - Status Register"] - pub txstatus: crate::Reg, - #[doc = "0x18 - Clear FIFO Register"] - pub fifo_clr: crate::Reg, - #[doc = "0x1c - Break Transmit Register"] - pub txbreak: crate::Reg, - #[doc = "0x20 - Address9 Register"] - pub addr9: crate::Reg, - #[doc = "0x24 - Address9 Mask Register"] - pub addr9mask: crate::Reg, - #[doc = "0x28 - IRQ Enable Register"] - pub irq_enb: crate::Reg, - #[doc = "0x2c - IRQ Raw Status Register"] - pub irq_raw: crate::Reg, - #[doc = "0x30 - IRQ Enabled Status Register"] - pub irq_end: crate::Reg, - #[doc = "0x34 - IRQ Clear Status Register"] - pub irq_clr: crate::Reg, - #[doc = "0x38 - Rx FIFO IRQ Trigger Level"] - pub rxfifoirqtrg: crate::Reg, - #[doc = "0x3c - Tx FIFO IRQ Trigger Level"] - pub txfifoirqtrg: crate::Reg, - #[doc = "0x40 - Rx FIFO RTS Trigger Level"] - pub rxfifortstrg: crate::Reg, - #[doc = "0x44 - Internal STATE of UART Controller"] - pub state: crate::Reg, + data: Data, + enable: Enable, + ctrl: Ctrl, + clkscale: Clkscale, + rxstatus: Rxstatus, + txstatus: Txstatus, + fifo_clr: FifoClr, + txbreak: Txbreak, + addr9: Addr9, + addr9mask: Addr9mask, + irq_enb: IrqEnb, + irq_raw: IrqRaw, + irq_end: IrqEnd, + irq_clr: IrqClr, + rxfifoirqtrg: Rxfifoirqtrg, + txfifoirqtrg: Txfifoirqtrg, + rxfifortstrg: Rxfifortstrg, + state: State, _reserved18: [u8; 0x0fb4], - #[doc = "0xffc - Peripheral ID Register"] - pub perid: crate::Reg, + perid: Perid, } -#[doc = "DATA register accessor: an alias for `Reg`"] -pub type DATA = crate::Reg; +impl RegisterBlock { + #[doc = "0x00 - Data In/Out Register"] + #[inline(always)] + pub const fn data(&self) -> &Data { + &self.data + } + #[doc = "0x04 - Enable Register"] + #[inline(always)] + pub const fn enable(&self) -> &Enable { + &self.enable + } + #[doc = "0x08 - Control Register"] + #[inline(always)] + pub const fn ctrl(&self) -> &Ctrl { + &self.ctrl + } + #[doc = "0x0c - Clock Scale Register"] + #[inline(always)] + pub const fn clkscale(&self) -> &Clkscale { + &self.clkscale + } + #[doc = "0x10 - Status Register"] + #[inline(always)] + pub const fn rxstatus(&self) -> &Rxstatus { + &self.rxstatus + } + #[doc = "0x14 - Status Register"] + #[inline(always)] + pub const fn txstatus(&self) -> &Txstatus { + &self.txstatus + } + #[doc = "0x18 - Clear FIFO Register"] + #[inline(always)] + pub const fn fifo_clr(&self) -> &FifoClr { + &self.fifo_clr + } + #[doc = "0x1c - Break Transmit Register"] + #[inline(always)] + pub const fn txbreak(&self) -> &Txbreak { + &self.txbreak + } + #[doc = "0x20 - Address9 Register"] + #[inline(always)] + pub const fn addr9(&self) -> &Addr9 { + &self.addr9 + } + #[doc = "0x24 - Address9 Mask Register"] + #[inline(always)] + pub const fn addr9mask(&self) -> &Addr9mask { + &self.addr9mask + } + #[doc = "0x28 - IRQ Enable Register"] + #[inline(always)] + pub const fn irq_enb(&self) -> &IrqEnb { + &self.irq_enb + } + #[doc = "0x2c - IRQ Raw Status Register"] + #[inline(always)] + pub const fn irq_raw(&self) -> &IrqRaw { + &self.irq_raw + } + #[doc = "0x30 - IRQ Enabled Status Register"] + #[inline(always)] + pub const fn irq_end(&self) -> &IrqEnd { + &self.irq_end + } + #[doc = "0x34 - IRQ Clear Status Register"] + #[inline(always)] + pub const fn irq_clr(&self) -> &IrqClr { + &self.irq_clr + } + #[doc = "0x38 - Rx FIFO IRQ Trigger Level"] + #[inline(always)] + pub const fn rxfifoirqtrg(&self) -> &Rxfifoirqtrg { + &self.rxfifoirqtrg + } + #[doc = "0x3c - Tx FIFO IRQ Trigger Level"] + #[inline(always)] + pub const fn txfifoirqtrg(&self) -> &Txfifoirqtrg { + &self.txfifoirqtrg + } + #[doc = "0x40 - Rx FIFO RTS Trigger Level"] + #[inline(always)] + pub const fn rxfifortstrg(&self) -> &Rxfifortstrg { + &self.rxfifortstrg + } + #[doc = "0x44 - Internal STATE of UART Controller"] + #[inline(always)] + pub const fn state(&self) -> &State { + &self.state + } + #[doc = "0xffc - Peripheral ID Register"] + #[inline(always)] + pub const fn perid(&self) -> &Perid { + &self.perid + } +} +#[doc = "DATA (rw) register accessor: Data In/Out Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data`] +module"] +#[doc(alias = "DATA")] +pub type Data = crate::Reg; #[doc = "Data In/Out Register"] pub mod data; -#[doc = "ENABLE register accessor: an alias for `Reg`"] -pub type ENABLE = crate::Reg; +#[doc = "ENABLE (rw) register accessor: Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`enable::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`enable::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@enable`] +module"] +#[doc(alias = "ENABLE")] +pub type Enable = crate::Reg; #[doc = "Enable Register"] pub mod enable; -#[doc = "CTRL register accessor: an alias for `Reg`"] -pub type CTRL = crate::Reg; +#[doc = "CTRL (rw) register accessor: Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`] +module"] +#[doc(alias = "CTRL")] +pub type Ctrl = crate::Reg; #[doc = "Control Register"] pub mod ctrl; -#[doc = "CLKSCALE register accessor: an alias for `Reg`"] -pub type CLKSCALE = crate::Reg; +#[doc = "CLKSCALE (rw) register accessor: Clock Scale Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clkscale::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clkscale::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkscale`] +module"] +#[doc(alias = "CLKSCALE")] +pub type Clkscale = crate::Reg; #[doc = "Clock Scale Register"] pub mod clkscale; -#[doc = "RXSTATUS register accessor: an alias for `Reg`"] -pub type RXSTATUS = crate::Reg; +#[doc = "RXSTATUS (r) register accessor: Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxstatus::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxstatus`] +module"] +#[doc(alias = "RXSTATUS")] +pub type Rxstatus = crate::Reg; #[doc = "Status Register"] pub mod rxstatus; -#[doc = "TXSTATUS register accessor: an alias for `Reg`"] -pub type TXSTATUS = crate::Reg; +#[doc = "TXSTATUS (r) register accessor: Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txstatus::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txstatus`] +module"] +#[doc(alias = "TXSTATUS")] +pub type Txstatus = crate::Reg; #[doc = "Status Register"] pub mod txstatus; -#[doc = "FIFO_CLR register accessor: an alias for `Reg`"] -pub type FIFO_CLR = crate::Reg; +#[doc = "FIFO_CLR (w) register accessor: Clear FIFO Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fifo_clr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fifo_clr`] +module"] +#[doc(alias = "FIFO_CLR")] +pub type FifoClr = crate::Reg; #[doc = "Clear FIFO Register"] pub mod fifo_clr; -#[doc = "TXBREAK register accessor: an alias for `Reg`"] -pub type TXBREAK = crate::Reg; +#[doc = "TXBREAK (w) register accessor: Break Transmit Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`txbreak::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txbreak`] +module"] +#[doc(alias = "TXBREAK")] +pub type Txbreak = crate::Reg; #[doc = "Break Transmit Register"] pub mod txbreak; -#[doc = "ADDR9 register accessor: an alias for `Reg`"] -pub type ADDR9 = crate::Reg; +#[doc = "ADDR9 (rw) register accessor: Address9 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`addr9::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`addr9::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@addr9`] +module"] +#[doc(alias = "ADDR9")] +pub type Addr9 = crate::Reg; #[doc = "Address9 Register"] pub mod addr9; -#[doc = "ADDR9MASK register accessor: an alias for `Reg`"] -pub type ADDR9MASK = crate::Reg; +#[doc = "ADDR9MASK (rw) register accessor: Address9 Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`addr9mask::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`addr9mask::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@addr9mask`] +module"] +#[doc(alias = "ADDR9MASK")] +pub type Addr9mask = crate::Reg; #[doc = "Address9 Mask Register"] pub mod addr9mask; -#[doc = "IRQ_ENB register accessor: an alias for `Reg`"] -pub type IRQ_ENB = crate::Reg; +#[doc = "IRQ_ENB (rw) register accessor: IRQ Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_enb::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`irq_enb::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_enb`] +module"] +#[doc(alias = "IRQ_ENB")] +pub type IrqEnb = crate::Reg; #[doc = "IRQ Enable Register"] pub mod irq_enb; -#[doc = "IRQ_RAW register accessor: an alias for `Reg`"] -pub type IRQ_RAW = crate::Reg; -#[doc = "IRQ Raw Status Register"] -pub mod irq_raw; -#[doc = "IRQ_END register accessor: an alias for `Reg`"] -pub type IRQ_END = crate::Reg; -#[doc = "IRQ Enabled Status Register"] -pub mod irq_end; -#[doc = "IRQ_CLR register accessor: an alias for `Reg`"] -pub type IRQ_CLR = crate::Reg; -#[doc = "IRQ Clear Status Register"] -pub mod irq_clr; -#[doc = "RXFIFOIRQTRG register accessor: an alias for `Reg`"] -pub type RXFIFOIRQTRG = crate::Reg; +pub use irq_enb as irq_raw; +pub use irq_enb as irq_end; +pub use irq_enb as irq_clr; +pub use IrqEnb as IrqRaw; +pub use IrqEnb as IrqEnd; +pub use IrqEnb as IrqClr; +#[doc = "RXFIFOIRQTRG (rw) register accessor: Rx FIFO IRQ Trigger Level\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxfifoirqtrg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rxfifoirqtrg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxfifoirqtrg`] +module"] +#[doc(alias = "RXFIFOIRQTRG")] +pub type Rxfifoirqtrg = crate::Reg; #[doc = "Rx FIFO IRQ Trigger Level"] pub mod rxfifoirqtrg; -#[doc = "TXFIFOIRQTRG register accessor: an alias for `Reg`"] -pub type TXFIFOIRQTRG = crate::Reg; +#[doc = "TXFIFOIRQTRG (rw) register accessor: Tx FIFO IRQ Trigger Level\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txfifoirqtrg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`txfifoirqtrg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txfifoirqtrg`] +module"] +#[doc(alias = "TXFIFOIRQTRG")] +pub type Txfifoirqtrg = crate::Reg; #[doc = "Tx FIFO IRQ Trigger Level"] pub mod txfifoirqtrg; -#[doc = "RXFIFORTSTRG register accessor: an alias for `Reg`"] -pub type RXFIFORTSTRG = crate::Reg; +#[doc = "RXFIFORTSTRG (rw) register accessor: Rx FIFO RTS Trigger Level\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxfifortstrg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rxfifortstrg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxfifortstrg`] +module"] +#[doc(alias = "RXFIFORTSTRG")] +pub type Rxfifortstrg = crate::Reg; #[doc = "Rx FIFO RTS Trigger Level"] pub mod rxfifortstrg; -#[doc = "STATE register accessor: an alias for `Reg`"] -pub type STATE = crate::Reg; +#[doc = "STATE (r) register accessor: Internal STATE of UART Controller\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`state::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@state`] +module"] +#[doc(alias = "STATE")] +pub type State = crate::Reg; #[doc = "Internal STATE of UART Controller"] pub mod state; -#[doc = "PERID register accessor: an alias for `Reg`"] -pub type PERID = crate::Reg; +#[doc = "PERID (r) register accessor: Peripheral ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`perid::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@perid`] +module"] +#[doc(alias = "PERID")] +pub type Perid = crate::Reg; #[doc = "Peripheral ID Register"] pub mod perid; diff --git a/va416xx/src/uart0/addr9.rs b/va416xx/src/uart0/addr9.rs index 24f7910..bca4484 100644 --- a/va416xx/src/uart0/addr9.rs +++ b/va416xx/src/uart0/addr9.rs @@ -1,64 +1,27 @@ #[doc = "Register `ADDR9` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ADDR9` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 +pub type W = crate::W; +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) } } -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -impl W { - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "Address9 Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [addr9](index.html) module"] -pub struct ADDR9_SPEC; -impl crate::RegisterSpec for ADDR9_SPEC { +impl W {} +#[doc = "Address9 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`addr9::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`addr9::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Addr9Spec; +impl crate::RegisterSpec for Addr9Spec { type Ux = u32; } -#[doc = "`read()` method returns [addr9::R](R) reader structure"] -impl crate::Readable for ADDR9_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [addr9::W](W) writer structure"] -impl crate::Writable for ADDR9_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`addr9::R`](R) reader structure"] +impl crate::Readable for Addr9Spec {} +#[doc = "`write(|w| ..)` method takes [`addr9::W`](W) writer structure"] +impl crate::Writable for Addr9Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ADDR9 to value 0"] -impl crate::Resettable for ADDR9_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Addr9Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/uart0/addr9mask.rs b/va416xx/src/uart0/addr9mask.rs index b62ef8e..f96e772 100644 --- a/va416xx/src/uart0/addr9mask.rs +++ b/va416xx/src/uart0/addr9mask.rs @@ -1,64 +1,27 @@ #[doc = "Register `ADDR9MASK` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ADDR9MASK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 +pub type W = crate::W; +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) } } -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -impl W { - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "Address9 Mask Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [addr9mask](index.html) module"] -pub struct ADDR9MASK_SPEC; -impl crate::RegisterSpec for ADDR9MASK_SPEC { +impl W {} +#[doc = "Address9 Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`addr9mask::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`addr9mask::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Addr9maskSpec; +impl crate::RegisterSpec for Addr9maskSpec { type Ux = u32; } -#[doc = "`read()` method returns [addr9mask::R](R) reader structure"] -impl crate::Readable for ADDR9MASK_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [addr9mask::W](W) writer structure"] -impl crate::Writable for ADDR9MASK_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`addr9mask::R`](R) reader structure"] +impl crate::Readable for Addr9maskSpec {} +#[doc = "`write(|w| ..)` method takes [`addr9mask::W`](W) writer structure"] +impl crate::Writable for Addr9maskSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ADDR9MASK to value 0"] -impl crate::Resettable for ADDR9MASK_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Addr9maskSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/uart0/clkscale.rs b/va416xx/src/uart0/clkscale.rs index 40fa684..14a5e79 100644 --- a/va416xx/src/uart0/clkscale.rs +++ b/va416xx/src/uart0/clkscale.rs @@ -1,167 +1,63 @@ #[doc = "Register `CLKSCALE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CLKSCALE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `FRAC` reader - Fractional Divide (64ths)"] -pub struct FRAC_R(crate::FieldReader); -impl FRAC_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - FRAC_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for FRAC_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type FracR = crate::FieldReader; #[doc = "Field `FRAC` writer - Fractional Divide (64ths)"] -pub struct FRAC_W<'a> { - w: &'a mut W, -} -impl<'a> FRAC_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0x3f) | (value as u32 & 0x3f); - self.w - } -} +pub type FracW<'a, REG> = crate::FieldWriter<'a, REG, 6>; #[doc = "Field `INT` reader - Integer Divide"] -pub struct INT_R(crate::FieldReader); -impl INT_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - INT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for INT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type IntR = crate::FieldReader; #[doc = "Field `INT` writer - Integer Divide"] -pub struct INT_W<'a> { - w: &'a mut W, -} -impl<'a> INT_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x0003_ffff << 6)) | ((value as u32 & 0x0003_ffff) << 6); - self.w - } -} +pub type IntW<'a, REG> = crate::FieldWriter<'a, REG, 18, u32>; #[doc = "Field `RESET` writer - Reset Baud Counter"] -pub struct RESET_W<'a> { - w: &'a mut W, -} -impl<'a> RESET_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 31)) | ((value as u32 & 0x01) << 31); - self.w - } -} +pub type ResetW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:5 - Fractional Divide (64ths)"] #[inline(always)] - pub fn frac(&self) -> FRAC_R { - FRAC_R::new((self.bits & 0x3f) as u8) + pub fn frac(&self) -> FracR { + FracR::new((self.bits & 0x3f) as u8) } #[doc = "Bits 6:23 - Integer Divide"] #[inline(always)] - pub fn int(&self) -> INT_R { - INT_R::new(((self.bits >> 6) & 0x0003_ffff) as u32) + pub fn int(&self) -> IntR { + IntR::new((self.bits >> 6) & 0x0003_ffff) } } impl W { #[doc = "Bits 0:5 - Fractional Divide (64ths)"] #[inline(always)] - pub fn frac(&mut self) -> FRAC_W { - FRAC_W { w: self } + #[must_use] + pub fn frac(&mut self) -> FracW { + FracW::new(self, 0) } #[doc = "Bits 6:23 - Integer Divide"] #[inline(always)] - pub fn int(&mut self) -> INT_W { - INT_W { w: self } + #[must_use] + pub fn int(&mut self) -> IntW { + IntW::new(self, 6) } #[doc = "Bit 31 - Reset Baud Counter"] #[inline(always)] - pub fn reset(&mut self) -> RESET_W { - RESET_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn reset(&mut self) -> ResetW { + ResetW::new(self, 31) } } -#[doc = "Clock Scale Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [clkscale](index.html) module"] -pub struct CLKSCALE_SPEC; -impl crate::RegisterSpec for CLKSCALE_SPEC { +#[doc = "Clock Scale Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clkscale::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clkscale::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ClkscaleSpec; +impl crate::RegisterSpec for ClkscaleSpec { type Ux = u32; } -#[doc = "`read()` method returns [clkscale::R](R) reader structure"] -impl crate::Readable for CLKSCALE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [clkscale::W](W) writer structure"] -impl crate::Writable for CLKSCALE_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`clkscale::R`](R) reader structure"] +impl crate::Readable for ClkscaleSpec {} +#[doc = "`write(|w| ..)` method takes [`clkscale::W`](W) writer structure"] +impl crate::Writable for ClkscaleSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CLKSCALE to value 0"] -impl crate::Resettable for CLKSCALE_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for ClkscaleSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/uart0/ctrl.rs b/va416xx/src/uart0/ctrl.rs index f5663f9..965c45a 100644 --- a/va416xx/src/uart0/ctrl.rs +++ b/va416xx/src/uart0/ctrl.rs @@ -1,573 +1,190 @@ #[doc = "Register `CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PAREN` reader - Parity Enable"] -pub struct PAREN_R(crate::FieldReader); -impl PAREN_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - PAREN_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PAREN_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type ParenR = crate::BitReader; #[doc = "Field `PAREN` writer - Parity Enable"] -pub struct PAREN_W<'a> { - w: &'a mut W, -} -impl<'a> PAREN_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} +pub type ParenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PAREVEN` reader - Parity Even/Odd(1/0)"] -pub struct PAREVEN_R(crate::FieldReader); -impl PAREVEN_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - PAREVEN_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PAREVEN_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type ParevenR = crate::BitReader; #[doc = "Field `PAREVEN` writer - Parity Even/Odd(1/0)"] -pub struct PAREVEN_W<'a> { - w: &'a mut W, -} -impl<'a> PAREVEN_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); - self.w - } -} +pub type ParevenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PARSTK` reader - Parity Sticky"] -pub struct PARSTK_R(crate::FieldReader); -impl PARSTK_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - PARSTK_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PARSTK_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type ParstkR = crate::BitReader; #[doc = "Field `PARSTK` writer - Parity Sticky"] -pub struct PARSTK_W<'a> { - w: &'a mut W, -} -impl<'a> PARSTK_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); - self.w - } -} +pub type ParstkW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STOPBITS` reader - Stop Bits 1/2(0/1)"] -pub struct STOPBITS_R(crate::FieldReader); -impl STOPBITS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - STOPBITS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for STOPBITS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type StopbitsR = crate::BitReader; #[doc = "Field `STOPBITS` writer - Stop Bits 1/2(0/1)"] -pub struct STOPBITS_W<'a> { - w: &'a mut W, -} -impl<'a> STOPBITS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); - self.w - } -} +pub type StopbitsW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WORDSIZE` reader - Word Size in Bits 5/6/7/8(00/01/10/11)"] -pub struct WORDSIZE_R(crate::FieldReader); -impl WORDSIZE_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - WORDSIZE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for WORDSIZE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type WordsizeR = crate::FieldReader; #[doc = "Field `WORDSIZE` writer - Word Size in Bits 5/6/7/8(00/01/10/11)"] -pub struct WORDSIZE_W<'a> { - w: &'a mut W, -} -impl<'a> WORDSIZE_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x03 << 4)) | ((value as u32 & 0x03) << 4); - self.w - } -} +pub type WordsizeW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `LOOPBACK` reader - Loopback Enable"] -pub struct LOOPBACK_R(crate::FieldReader); -impl LOOPBACK_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - LOOPBACK_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for LOOPBACK_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type LoopbackR = crate::BitReader; #[doc = "Field `LOOPBACK` writer - Loopback Enable"] -pub struct LOOPBACK_W<'a> { - w: &'a mut W, -} -impl<'a> LOOPBACK_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); - self.w - } -} +pub type LoopbackW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LOOPBACKBLK` reader - Loopback Block"] -pub struct LOOPBACKBLK_R(crate::FieldReader); -impl LOOPBACKBLK_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - LOOPBACKBLK_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for LOOPBACKBLK_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type LoopbackblkR = crate::BitReader; #[doc = "Field `LOOPBACKBLK` writer - Loopback Block"] -pub struct LOOPBACKBLK_W<'a> { - w: &'a mut W, -} -impl<'a> LOOPBACKBLK_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); - self.w - } -} +pub type LoopbackblkW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AUTOCTS` reader - Enable Auto CTS mode"] -pub struct AUTOCTS_R(crate::FieldReader); -impl AUTOCTS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - AUTOCTS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for AUTOCTS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type AutoctsR = crate::BitReader; #[doc = "Field `AUTOCTS` writer - Enable Auto CTS mode"] -pub struct AUTOCTS_W<'a> { - w: &'a mut W, -} -impl<'a> AUTOCTS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); - self.w - } -} +pub type AutoctsW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DEFRTS` reader - Default RTSn value"] -pub struct DEFRTS_R(crate::FieldReader); -impl DEFRTS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - DEFRTS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for DEFRTS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type DefrtsR = crate::BitReader; #[doc = "Field `DEFRTS` writer - Default RTSn value"] -pub struct DEFRTS_W<'a> { - w: &'a mut W, -} -impl<'a> DEFRTS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); - self.w - } -} +pub type DefrtsW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AUTORTS` reader - Enable Auto RTS mode"] -pub struct AUTORTS_R(crate::FieldReader); -impl AUTORTS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - AUTORTS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for AUTORTS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type AutortsR = crate::BitReader; #[doc = "Field `AUTORTS` writer - Enable Auto RTS mode"] -pub struct AUTORTS_W<'a> { - w: &'a mut W, -} -impl<'a> AUTORTS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); - self.w - } -} +pub type AutortsW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BAUD8` reader - Enable BAUD8 mode"] -pub struct BAUD8_R(crate::FieldReader); -impl BAUD8_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - BAUD8_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for BAUD8_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Baud8R = crate::BitReader; #[doc = "Field `BAUD8` writer - Enable BAUD8 mode"] -pub struct BAUD8_W<'a> { - w: &'a mut W, -} -impl<'a> BAUD8_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); - self.w - } -} +pub type Baud8W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Parity Enable"] #[inline(always)] - pub fn paren(&self) -> PAREN_R { - PAREN_R::new((self.bits & 0x01) != 0) + pub fn paren(&self) -> ParenR { + ParenR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Parity Even/Odd(1/0)"] #[inline(always)] - pub fn pareven(&self) -> PAREVEN_R { - PAREVEN_R::new(((self.bits >> 1) & 0x01) != 0) + pub fn pareven(&self) -> ParevenR { + ParevenR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Parity Sticky"] #[inline(always)] - pub fn parstk(&self) -> PARSTK_R { - PARSTK_R::new(((self.bits >> 2) & 0x01) != 0) + pub fn parstk(&self) -> ParstkR { + ParstkR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Stop Bits 1/2(0/1)"] #[inline(always)] - pub fn stopbits(&self) -> STOPBITS_R { - STOPBITS_R::new(((self.bits >> 3) & 0x01) != 0) + pub fn stopbits(&self) -> StopbitsR { + StopbitsR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bits 4:5 - Word Size in Bits 5/6/7/8(00/01/10/11)"] #[inline(always)] - pub fn wordsize(&self) -> WORDSIZE_R { - WORDSIZE_R::new(((self.bits >> 4) & 0x03) as u8) + pub fn wordsize(&self) -> WordsizeR { + WordsizeR::new(((self.bits >> 4) & 3) as u8) } #[doc = "Bit 6 - Loopback Enable"] #[inline(always)] - pub fn loopback(&self) -> LOOPBACK_R { - LOOPBACK_R::new(((self.bits >> 6) & 0x01) != 0) + pub fn loopback(&self) -> LoopbackR { + LoopbackR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Loopback Block"] #[inline(always)] - pub fn loopbackblk(&self) -> LOOPBACKBLK_R { - LOOPBACKBLK_R::new(((self.bits >> 7) & 0x01) != 0) + pub fn loopbackblk(&self) -> LoopbackblkR { + LoopbackblkR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Enable Auto CTS mode"] #[inline(always)] - pub fn autocts(&self) -> AUTOCTS_R { - AUTOCTS_R::new(((self.bits >> 8) & 0x01) != 0) + pub fn autocts(&self) -> AutoctsR { + AutoctsR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Default RTSn value"] #[inline(always)] - pub fn defrts(&self) -> DEFRTS_R { - DEFRTS_R::new(((self.bits >> 9) & 0x01) != 0) + pub fn defrts(&self) -> DefrtsR { + DefrtsR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Enable Auto RTS mode"] #[inline(always)] - pub fn autorts(&self) -> AUTORTS_R { - AUTORTS_R::new(((self.bits >> 10) & 0x01) != 0) + pub fn autorts(&self) -> AutortsR { + AutortsR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Enable BAUD8 mode"] #[inline(always)] - pub fn baud8(&self) -> BAUD8_R { - BAUD8_R::new(((self.bits >> 11) & 0x01) != 0) + pub fn baud8(&self) -> Baud8R { + Baud8R::new(((self.bits >> 11) & 1) != 0) } } impl W { #[doc = "Bit 0 - Parity Enable"] #[inline(always)] - pub fn paren(&mut self) -> PAREN_W { - PAREN_W { w: self } + #[must_use] + pub fn paren(&mut self) -> ParenW { + ParenW::new(self, 0) } #[doc = "Bit 1 - Parity Even/Odd(1/0)"] #[inline(always)] - pub fn pareven(&mut self) -> PAREVEN_W { - PAREVEN_W { w: self } + #[must_use] + pub fn pareven(&mut self) -> ParevenW { + ParevenW::new(self, 1) } #[doc = "Bit 2 - Parity Sticky"] #[inline(always)] - pub fn parstk(&mut self) -> PARSTK_W { - PARSTK_W { w: self } + #[must_use] + pub fn parstk(&mut self) -> ParstkW { + ParstkW::new(self, 2) } #[doc = "Bit 3 - Stop Bits 1/2(0/1)"] #[inline(always)] - pub fn stopbits(&mut self) -> STOPBITS_W { - STOPBITS_W { w: self } + #[must_use] + pub fn stopbits(&mut self) -> StopbitsW { + StopbitsW::new(self, 3) } #[doc = "Bits 4:5 - Word Size in Bits 5/6/7/8(00/01/10/11)"] #[inline(always)] - pub fn wordsize(&mut self) -> WORDSIZE_W { - WORDSIZE_W { w: self } + #[must_use] + pub fn wordsize(&mut self) -> WordsizeW { + WordsizeW::new(self, 4) } #[doc = "Bit 6 - Loopback Enable"] #[inline(always)] - pub fn loopback(&mut self) -> LOOPBACK_W { - LOOPBACK_W { w: self } + #[must_use] + pub fn loopback(&mut self) -> LoopbackW { + LoopbackW::new(self, 6) } #[doc = "Bit 7 - Loopback Block"] #[inline(always)] - pub fn loopbackblk(&mut self) -> LOOPBACKBLK_W { - LOOPBACKBLK_W { w: self } + #[must_use] + pub fn loopbackblk(&mut self) -> LoopbackblkW { + LoopbackblkW::new(self, 7) } #[doc = "Bit 8 - Enable Auto CTS mode"] #[inline(always)] - pub fn autocts(&mut self) -> AUTOCTS_W { - AUTOCTS_W { w: self } + #[must_use] + pub fn autocts(&mut self) -> AutoctsW { + AutoctsW::new(self, 8) } #[doc = "Bit 9 - Default RTSn value"] #[inline(always)] - pub fn defrts(&mut self) -> DEFRTS_W { - DEFRTS_W { w: self } + #[must_use] + pub fn defrts(&mut self) -> DefrtsW { + DefrtsW::new(self, 9) } #[doc = "Bit 10 - Enable Auto RTS mode"] #[inline(always)] - pub fn autorts(&mut self) -> AUTORTS_W { - AUTORTS_W { w: self } + #[must_use] + pub fn autorts(&mut self) -> AutortsW { + AutortsW::new(self, 10) } #[doc = "Bit 11 - Enable BAUD8 mode"] #[inline(always)] - pub fn baud8(&mut self) -> BAUD8_W { - BAUD8_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn baud8(&mut self) -> Baud8W { + Baud8W::new(self, 11) } } -#[doc = "Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](index.html) module"] -pub struct CTRL_SPEC; -impl crate::RegisterSpec for CTRL_SPEC { +#[doc = "Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctrl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctrl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CtrlSpec; +impl crate::RegisterSpec for CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [ctrl::R](R) reader structure"] -impl crate::Readable for CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ctrl::W](W) writer structure"] -impl crate::Writable for CTRL_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`ctrl::R`](R) reader structure"] +impl crate::Readable for CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`ctrl::W`](W) writer structure"] +impl crate::Writable for CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTRL to value 0"] -impl crate::Resettable for CTRL_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/uart0/data.rs b/va416xx/src/uart0/data.rs index 61264f6..bc64a6c 100644 --- a/va416xx/src/uart0/data.rs +++ b/va416xx/src/uart0/data.rs @@ -1,64 +1,27 @@ #[doc = "Register `DATA` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DATA` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 +pub type W = crate::W; +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) } } -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -impl W { - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "Data In/Out Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data](index.html) module"] -pub struct DATA_SPEC; -impl crate::RegisterSpec for DATA_SPEC { +impl W {} +#[doc = "Data In/Out Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DataSpec; +impl crate::RegisterSpec for DataSpec { type Ux = u32; } -#[doc = "`read()` method returns [data::R](R) reader structure"] -impl crate::Readable for DATA_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [data::W](W) writer structure"] -impl crate::Writable for DATA_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`data::R`](R) reader structure"] +impl crate::Readable for DataSpec {} +#[doc = "`write(|w| ..)` method takes [`data::W`](W) writer structure"] +impl crate::Writable for DataSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA to value 0"] -impl crate::Resettable for DATA_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for DataSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/uart0/enable.rs b/va416xx/src/uart0/enable.rs index 5584706..ad6f797 100644 --- a/va416xx/src/uart0/enable.rs +++ b/va416xx/src/uart0/enable.rs @@ -1,160 +1,55 @@ #[doc = "Register `ENABLE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ENABLE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RXENABLE` reader - Rx Enable"] -pub struct RXENABLE_R(crate::FieldReader); -impl RXENABLE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXENABLE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXENABLE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type RxenableR = crate::BitReader; #[doc = "Field `RXENABLE` writer - Rx Enable"] -pub struct RXENABLE_W<'a> { - w: &'a mut W, -} -impl<'a> RXENABLE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} +pub type RxenableW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXENABLE` reader - Tx Enable"] -pub struct TXENABLE_R(crate::FieldReader); -impl TXENABLE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXENABLE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXENABLE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type TxenableR = crate::BitReader; #[doc = "Field `TXENABLE` writer - Tx Enable"] -pub struct TXENABLE_W<'a> { - w: &'a mut W, -} -impl<'a> TXENABLE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); - self.w - } -} +pub type TxenableW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Rx Enable"] #[inline(always)] - pub fn rxenable(&self) -> RXENABLE_R { - RXENABLE_R::new((self.bits & 0x01) != 0) + pub fn rxenable(&self) -> RxenableR { + RxenableR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Tx Enable"] #[inline(always)] - pub fn txenable(&self) -> TXENABLE_R { - TXENABLE_R::new(((self.bits >> 1) & 0x01) != 0) + pub fn txenable(&self) -> TxenableR { + TxenableR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - Rx Enable"] #[inline(always)] - pub fn rxenable(&mut self) -> RXENABLE_W { - RXENABLE_W { w: self } + #[must_use] + pub fn rxenable(&mut self) -> RxenableW { + RxenableW::new(self, 0) } #[doc = "Bit 1 - Tx Enable"] #[inline(always)] - pub fn txenable(&mut self) -> TXENABLE_W { - TXENABLE_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn txenable(&mut self) -> TxenableW { + TxenableW::new(self, 1) } } -#[doc = "Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [enable](index.html) module"] -pub struct ENABLE_SPEC; -impl crate::RegisterSpec for ENABLE_SPEC { +#[doc = "Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`enable::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`enable::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct EnableSpec; +impl crate::RegisterSpec for EnableSpec { type Ux = u32; } -#[doc = "`read()` method returns [enable::R](R) reader structure"] -impl crate::Readable for ENABLE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [enable::W](W) writer structure"] -impl crate::Writable for ENABLE_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`enable::R`](R) reader structure"] +impl crate::Readable for EnableSpec {} +#[doc = "`write(|w| ..)` method takes [`enable::W`](W) writer structure"] +impl crate::Writable for EnableSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ENABLE to value 0"] -impl crate::Resettable for ENABLE_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for EnableSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/uart0/fifo_clr.rs b/va416xx/src/uart0/fifo_clr.rs index 3d95fdd..156da87 100644 --- a/va416xx/src/uart0/fifo_clr.rs +++ b/va416xx/src/uart0/fifo_clr.rs @@ -1,99 +1,35 @@ #[doc = "Register `FIFO_CLR` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RXFIFO` writer - Clear Rx FIFO"] -pub struct RXFIFO_W<'a> { - w: &'a mut W, -} -impl<'a> RXFIFO_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} +pub type RxfifoW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXFIFO` writer - Clear Tx FIFO"] -pub struct TXFIFO_W<'a> { - w: &'a mut W, -} -impl<'a> TXFIFO_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); - self.w - } -} +pub type TxfifoW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Clear Rx FIFO"] #[inline(always)] - pub fn rxfifo(&mut self) -> RXFIFO_W { - RXFIFO_W { w: self } + #[must_use] + pub fn rxfifo(&mut self) -> RxfifoW { + RxfifoW::new(self, 0) } #[doc = "Bit 1 - Clear Tx FIFO"] #[inline(always)] - pub fn txfifo(&mut self) -> TXFIFO_W { - TXFIFO_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn txfifo(&mut self) -> TxfifoW { + TxfifoW::new(self, 1) } } -#[doc = "Clear FIFO Register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [fifo_clr](index.html) module"] -pub struct FIFO_CLR_SPEC; -impl crate::RegisterSpec for FIFO_CLR_SPEC { +#[doc = "Clear FIFO Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fifo_clr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct FifoClrSpec; +impl crate::RegisterSpec for FifoClrSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [fifo_clr::W](W) writer structure"] -impl crate::Writable for FIFO_CLR_SPEC { - type Writer = W; +#[doc = "`write(|w| ..)` method takes [`fifo_clr::W`](W) writer structure"] +impl crate::Writable for FifoClrSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets FIFO_CLR to value 0"] -impl crate::Resettable for FIFO_CLR_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for FifoClrSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/uart0/irq_clr.rs b/va416xx/src/uart0/irq_clr.rs deleted file mode 100644 index 451b609..0000000 --- a/va416xx/src/uart0/irq_clr.rs +++ /dev/null @@ -1,234 +0,0 @@ -#[doc = "Register `IRQ_CLR` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `IRQ_RX` writer - RX Interrupt"] -pub struct IRQ_RX_W<'a> { - w: &'a mut W, -} -impl<'a> IRQ_RX_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} -#[doc = "Field `IRQ_RX_STATUS` writer - RX Status Interrupt"] -pub struct IRQ_RX_STATUS_W<'a> { - w: &'a mut W, -} -impl<'a> IRQ_RX_STATUS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); - self.w - } -} -#[doc = "Field `IRQ_RX_TO` writer - RX Timeout Interrupt"] -pub struct IRQ_RX_TO_W<'a> { - w: &'a mut W, -} -impl<'a> IRQ_RX_TO_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); - self.w - } -} -#[doc = "Field `IRQ_TX` writer - TX Interrupt"] -pub struct IRQ_TX_W<'a> { - w: &'a mut W, -} -impl<'a> IRQ_TX_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); - self.w - } -} -#[doc = "Field `IRQ_TX_STATUS` writer - TX Status Interrupt"] -pub struct IRQ_TX_STATUS_W<'a> { - w: &'a mut W, -} -impl<'a> IRQ_TX_STATUS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); - self.w - } -} -#[doc = "Field `IRQ_TX_EMPTY` writer - TX Empty Interrupt"] -pub struct IRQ_TX_EMPTY_W<'a> { - w: &'a mut W, -} -impl<'a> IRQ_TX_EMPTY_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); - self.w - } -} -#[doc = "Field `IRQ_TX_CTS` writer - TX CTS Change Interrupt"] -pub struct IRQ_TX_CTS_W<'a> { - w: &'a mut W, -} -impl<'a> IRQ_TX_CTS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); - self.w - } -} -impl W { - #[doc = "Bit 0 - RX Interrupt"] - #[inline(always)] - pub fn irq_rx(&mut self) -> IRQ_RX_W { - IRQ_RX_W { w: self } - } - #[doc = "Bit 1 - RX Status Interrupt"] - #[inline(always)] - pub fn irq_rx_status(&mut self) -> IRQ_RX_STATUS_W { - IRQ_RX_STATUS_W { w: self } - } - #[doc = "Bit 2 - RX Timeout Interrupt"] - #[inline(always)] - pub fn irq_rx_to(&mut self) -> IRQ_RX_TO_W { - IRQ_RX_TO_W { w: self } - } - #[doc = "Bit 4 - TX Interrupt"] - #[inline(always)] - pub fn irq_tx(&mut self) -> IRQ_TX_W { - IRQ_TX_W { w: self } - } - #[doc = "Bit 5 - TX Status Interrupt"] - #[inline(always)] - pub fn irq_tx_status(&mut self) -> IRQ_TX_STATUS_W { - IRQ_TX_STATUS_W { w: self } - } - #[doc = "Bit 6 - TX Empty Interrupt"] - #[inline(always)] - pub fn irq_tx_empty(&mut self) -> IRQ_TX_EMPTY_W { - IRQ_TX_EMPTY_W { w: self } - } - #[doc = "Bit 7 - TX CTS Change Interrupt"] - #[inline(always)] - pub fn irq_tx_cts(&mut self) -> IRQ_TX_CTS_W { - IRQ_TX_CTS_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "IRQ Clear Status Register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [irq_clr](index.html) module"] -pub struct IRQ_CLR_SPEC; -impl crate::RegisterSpec for IRQ_CLR_SPEC { - type Ux = u32; -} -#[doc = "`write(|w| ..)` method takes [irq_clr::W](W) writer structure"] -impl crate::Writable for IRQ_CLR_SPEC { - type Writer = W; -} -#[doc = "`reset()` method sets IRQ_CLR to value 0"] -impl crate::Resettable for IRQ_CLR_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } -} diff --git a/va416xx/src/uart0/irq_enb.rs b/va416xx/src/uart0/irq_enb.rs index 93f50e1..6702628 100644 --- a/va416xx/src/uart0/irq_enb.rs +++ b/va416xx/src/uart0/irq_enb.rs @@ -1,395 +1,130 @@ #[doc = "Register `IRQ_ENB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IRQ_ENB` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `IRQ_RX` reader - RX Interrupt"] -pub struct IRQ_RX_R(crate::FieldReader); -impl IRQ_RX_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - IRQ_RX_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for IRQ_RX_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type IrqRxR = crate::BitReader; #[doc = "Field `IRQ_RX` writer - RX Interrupt"] -pub struct IRQ_RX_W<'a> { - w: &'a mut W, -} -impl<'a> IRQ_RX_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} +pub type IrqRxW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `IRQ_RX_STATUS` reader - RX Status Interrupt"] -pub struct IRQ_RX_STATUS_R(crate::FieldReader); -impl IRQ_RX_STATUS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - IRQ_RX_STATUS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for IRQ_RX_STATUS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type IrqRxStatusR = crate::BitReader; #[doc = "Field `IRQ_RX_STATUS` writer - RX Status Interrupt"] -pub struct IRQ_RX_STATUS_W<'a> { - w: &'a mut W, -} -impl<'a> IRQ_RX_STATUS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); - self.w - } -} +pub type IrqRxStatusW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `IRQ_RX_TO` reader - RX Timeout Interrupt"] -pub struct IRQ_RX_TO_R(crate::FieldReader); -impl IRQ_RX_TO_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - IRQ_RX_TO_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for IRQ_RX_TO_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type IrqRxToR = crate::BitReader; #[doc = "Field `IRQ_RX_TO` writer - RX Timeout Interrupt"] -pub struct IRQ_RX_TO_W<'a> { - w: &'a mut W, -} -impl<'a> IRQ_RX_TO_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); - self.w - } -} +pub type IrqRxToW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `IRQ_TX` reader - TX Interrupt"] -pub struct IRQ_TX_R(crate::FieldReader); -impl IRQ_TX_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - IRQ_TX_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for IRQ_TX_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type IrqTxR = crate::BitReader; #[doc = "Field `IRQ_TX` writer - TX Interrupt"] -pub struct IRQ_TX_W<'a> { - w: &'a mut W, -} -impl<'a> IRQ_TX_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); - self.w - } -} +pub type IrqTxW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `IRQ_TX_STATUS` reader - TX Status Interrupt"] -pub struct IRQ_TX_STATUS_R(crate::FieldReader); -impl IRQ_TX_STATUS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - IRQ_TX_STATUS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for IRQ_TX_STATUS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type IrqTxStatusR = crate::BitReader; #[doc = "Field `IRQ_TX_STATUS` writer - TX Status Interrupt"] -pub struct IRQ_TX_STATUS_W<'a> { - w: &'a mut W, -} -impl<'a> IRQ_TX_STATUS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); - self.w - } -} +pub type IrqTxStatusW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `IRQ_TX_EMPTY` reader - TX Empty Interrupt"] -pub struct IRQ_TX_EMPTY_R(crate::FieldReader); -impl IRQ_TX_EMPTY_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - IRQ_TX_EMPTY_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for IRQ_TX_EMPTY_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type IrqTxEmptyR = crate::BitReader; #[doc = "Field `IRQ_TX_EMPTY` writer - TX Empty Interrupt"] -pub struct IRQ_TX_EMPTY_W<'a> { - w: &'a mut W, -} -impl<'a> IRQ_TX_EMPTY_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); - self.w - } -} +pub type IrqTxEmptyW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `IRQ_TX_CTS` reader - TX CTS Change Interrupt"] -pub struct IRQ_TX_CTS_R(crate::FieldReader); -impl IRQ_TX_CTS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - IRQ_TX_CTS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for IRQ_TX_CTS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type IrqTxCtsR = crate::BitReader; #[doc = "Field `IRQ_TX_CTS` writer - TX CTS Change Interrupt"] -pub struct IRQ_TX_CTS_W<'a> { - w: &'a mut W, -} -impl<'a> IRQ_TX_CTS_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); - self.w - } -} +pub type IrqTxCtsW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - RX Interrupt"] #[inline(always)] - pub fn irq_rx(&self) -> IRQ_RX_R { - IRQ_RX_R::new((self.bits & 0x01) != 0) + pub fn irq_rx(&self) -> IrqRxR { + IrqRxR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - RX Status Interrupt"] #[inline(always)] - pub fn irq_rx_status(&self) -> IRQ_RX_STATUS_R { - IRQ_RX_STATUS_R::new(((self.bits >> 1) & 0x01) != 0) + pub fn irq_rx_status(&self) -> IrqRxStatusR { + IrqRxStatusR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - RX Timeout Interrupt"] #[inline(always)] - pub fn irq_rx_to(&self) -> IRQ_RX_TO_R { - IRQ_RX_TO_R::new(((self.bits >> 2) & 0x01) != 0) + pub fn irq_rx_to(&self) -> IrqRxToR { + IrqRxToR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 4 - TX Interrupt"] #[inline(always)] - pub fn irq_tx(&self) -> IRQ_TX_R { - IRQ_TX_R::new(((self.bits >> 4) & 0x01) != 0) + pub fn irq_tx(&self) -> IrqTxR { + IrqTxR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - TX Status Interrupt"] #[inline(always)] - pub fn irq_tx_status(&self) -> IRQ_TX_STATUS_R { - IRQ_TX_STATUS_R::new(((self.bits >> 5) & 0x01) != 0) + pub fn irq_tx_status(&self) -> IrqTxStatusR { + IrqTxStatusR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - TX Empty Interrupt"] #[inline(always)] - pub fn irq_tx_empty(&self) -> IRQ_TX_EMPTY_R { - IRQ_TX_EMPTY_R::new(((self.bits >> 6) & 0x01) != 0) + pub fn irq_tx_empty(&self) -> IrqTxEmptyR { + IrqTxEmptyR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - TX CTS Change Interrupt"] #[inline(always)] - pub fn irq_tx_cts(&self) -> IRQ_TX_CTS_R { - IRQ_TX_CTS_R::new(((self.bits >> 7) & 0x01) != 0) + pub fn irq_tx_cts(&self) -> IrqTxCtsR { + IrqTxCtsR::new(((self.bits >> 7) & 1) != 0) } } impl W { #[doc = "Bit 0 - RX Interrupt"] #[inline(always)] - pub fn irq_rx(&mut self) -> IRQ_RX_W { - IRQ_RX_W { w: self } + #[must_use] + pub fn irq_rx(&mut self) -> IrqRxW { + IrqRxW::new(self, 0) } #[doc = "Bit 1 - RX Status Interrupt"] #[inline(always)] - pub fn irq_rx_status(&mut self) -> IRQ_RX_STATUS_W { - IRQ_RX_STATUS_W { w: self } + #[must_use] + pub fn irq_rx_status(&mut self) -> IrqRxStatusW { + IrqRxStatusW::new(self, 1) } #[doc = "Bit 2 - RX Timeout Interrupt"] #[inline(always)] - pub fn irq_rx_to(&mut self) -> IRQ_RX_TO_W { - IRQ_RX_TO_W { w: self } + #[must_use] + pub fn irq_rx_to(&mut self) -> IrqRxToW { + IrqRxToW::new(self, 2) } #[doc = "Bit 4 - TX Interrupt"] #[inline(always)] - pub fn irq_tx(&mut self) -> IRQ_TX_W { - IRQ_TX_W { w: self } + #[must_use] + pub fn irq_tx(&mut self) -> IrqTxW { + IrqTxW::new(self, 4) } #[doc = "Bit 5 - TX Status Interrupt"] #[inline(always)] - pub fn irq_tx_status(&mut self) -> IRQ_TX_STATUS_W { - IRQ_TX_STATUS_W { w: self } + #[must_use] + pub fn irq_tx_status(&mut self) -> IrqTxStatusW { + IrqTxStatusW::new(self, 5) } #[doc = "Bit 6 - TX Empty Interrupt"] #[inline(always)] - pub fn irq_tx_empty(&mut self) -> IRQ_TX_EMPTY_W { - IRQ_TX_EMPTY_W { w: self } + #[must_use] + pub fn irq_tx_empty(&mut self) -> IrqTxEmptyW { + IrqTxEmptyW::new(self, 6) } #[doc = "Bit 7 - TX CTS Change Interrupt"] #[inline(always)] - pub fn irq_tx_cts(&mut self) -> IRQ_TX_CTS_W { - IRQ_TX_CTS_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn irq_tx_cts(&mut self) -> IrqTxCtsW { + IrqTxCtsW::new(self, 7) } } -#[doc = "IRQ Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [irq_enb](index.html) module"] -pub struct IRQ_ENB_SPEC; -impl crate::RegisterSpec for IRQ_ENB_SPEC { +#[doc = "IRQ Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_enb::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`irq_enb::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IrqEnbSpec; +impl crate::RegisterSpec for IrqEnbSpec { type Ux = u32; } -#[doc = "`read()` method returns [irq_enb::R](R) reader structure"] -impl crate::Readable for IRQ_ENB_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [irq_enb::W](W) writer structure"] -impl crate::Writable for IRQ_ENB_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`irq_enb::R`](R) reader structure"] +impl crate::Readable for IrqEnbSpec {} +#[doc = "`write(|w| ..)` method takes [`irq_enb::W`](W) writer structure"] +impl crate::Writable for IrqEnbSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IRQ_ENB to value 0"] -impl crate::Resettable for IRQ_ENB_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for IrqEnbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/uart0/irq_end.rs b/va416xx/src/uart0/irq_end.rs deleted file mode 100644 index b2eb6c8..0000000 --- a/va416xx/src/uart0/irq_end.rs +++ /dev/null @@ -1,173 +0,0 @@ -#[doc = "Register `IRQ_END` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Field `IRQ_RX` reader - RX Interrupt"] -pub struct IRQ_RX_R(crate::FieldReader); -impl IRQ_RX_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - IRQ_RX_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for IRQ_RX_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `IRQ_RX_STATUS` reader - RX Status Interrupt"] -pub struct IRQ_RX_STATUS_R(crate::FieldReader); -impl IRQ_RX_STATUS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - IRQ_RX_STATUS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for IRQ_RX_STATUS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `IRQ_RX_TO` reader - RX Timeout Interrupt"] -pub struct IRQ_RX_TO_R(crate::FieldReader); -impl IRQ_RX_TO_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - IRQ_RX_TO_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for IRQ_RX_TO_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `IRQ_TX` reader - TX Interrupt"] -pub struct IRQ_TX_R(crate::FieldReader); -impl IRQ_TX_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - IRQ_TX_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for IRQ_TX_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `IRQ_TX_STATUS` reader - TX Status Interrupt"] -pub struct IRQ_TX_STATUS_R(crate::FieldReader); -impl IRQ_TX_STATUS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - IRQ_TX_STATUS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for IRQ_TX_STATUS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `IRQ_TX_EMPTY` reader - TX Empty Interrupt"] -pub struct IRQ_TX_EMPTY_R(crate::FieldReader); -impl IRQ_TX_EMPTY_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - IRQ_TX_EMPTY_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for IRQ_TX_EMPTY_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `IRQ_TX_CTS` reader - TX CTS Change Interrupt"] -pub struct IRQ_TX_CTS_R(crate::FieldReader); -impl IRQ_TX_CTS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - IRQ_TX_CTS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for IRQ_TX_CTS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl R { - #[doc = "Bit 0 - RX Interrupt"] - #[inline(always)] - pub fn irq_rx(&self) -> IRQ_RX_R { - IRQ_RX_R::new((self.bits & 0x01) != 0) - } - #[doc = "Bit 1 - RX Status Interrupt"] - #[inline(always)] - pub fn irq_rx_status(&self) -> IRQ_RX_STATUS_R { - IRQ_RX_STATUS_R::new(((self.bits >> 1) & 0x01) != 0) - } - #[doc = "Bit 2 - RX Timeout Interrupt"] - #[inline(always)] - pub fn irq_rx_to(&self) -> IRQ_RX_TO_R { - IRQ_RX_TO_R::new(((self.bits >> 2) & 0x01) != 0) - } - #[doc = "Bit 4 - TX Interrupt"] - #[inline(always)] - pub fn irq_tx(&self) -> IRQ_TX_R { - IRQ_TX_R::new(((self.bits >> 4) & 0x01) != 0) - } - #[doc = "Bit 5 - TX Status Interrupt"] - #[inline(always)] - pub fn irq_tx_status(&self) -> IRQ_TX_STATUS_R { - IRQ_TX_STATUS_R::new(((self.bits >> 5) & 0x01) != 0) - } - #[doc = "Bit 6 - TX Empty Interrupt"] - #[inline(always)] - pub fn irq_tx_empty(&self) -> IRQ_TX_EMPTY_R { - IRQ_TX_EMPTY_R::new(((self.bits >> 6) & 0x01) != 0) - } - #[doc = "Bit 7 - TX CTS Change Interrupt"] - #[inline(always)] - pub fn irq_tx_cts(&self) -> IRQ_TX_CTS_R { - IRQ_TX_CTS_R::new(((self.bits >> 7) & 0x01) != 0) - } -} -#[doc = "IRQ Enabled Status Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [irq_end](index.html) module"] -pub struct IRQ_END_SPEC; -impl crate::RegisterSpec for IRQ_END_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [irq_end::R](R) reader structure"] -impl crate::Readable for IRQ_END_SPEC { - type Reader = R; -} -#[doc = "`reset()` method sets IRQ_END to value 0"] -impl crate::Resettable for IRQ_END_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } -} diff --git a/va416xx/src/uart0/irq_raw.rs b/va416xx/src/uart0/irq_raw.rs deleted file mode 100644 index ba40050..0000000 --- a/va416xx/src/uart0/irq_raw.rs +++ /dev/null @@ -1,173 +0,0 @@ -#[doc = "Register `IRQ_RAW` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Field `IRQ_RX` reader - RX Interrupt"] -pub struct IRQ_RX_R(crate::FieldReader); -impl IRQ_RX_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - IRQ_RX_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for IRQ_RX_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `IRQ_RX_STATUS` reader - RX Status Interrupt"] -pub struct IRQ_RX_STATUS_R(crate::FieldReader); -impl IRQ_RX_STATUS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - IRQ_RX_STATUS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for IRQ_RX_STATUS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `IRQ_RX_TO` reader - RX Timeout Interrupt"] -pub struct IRQ_RX_TO_R(crate::FieldReader); -impl IRQ_RX_TO_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - IRQ_RX_TO_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for IRQ_RX_TO_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `IRQ_TX` reader - TX Interrupt"] -pub struct IRQ_TX_R(crate::FieldReader); -impl IRQ_TX_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - IRQ_TX_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for IRQ_TX_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `IRQ_TX_STATUS` reader - TX Status Interrupt"] -pub struct IRQ_TX_STATUS_R(crate::FieldReader); -impl IRQ_TX_STATUS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - IRQ_TX_STATUS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for IRQ_TX_STATUS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `IRQ_TX_EMPTY` reader - TX Empty Interrupt"] -pub struct IRQ_TX_EMPTY_R(crate::FieldReader); -impl IRQ_TX_EMPTY_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - IRQ_TX_EMPTY_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for IRQ_TX_EMPTY_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `IRQ_TX_CTS` reader - TX CTS Change Interrupt"] -pub struct IRQ_TX_CTS_R(crate::FieldReader); -impl IRQ_TX_CTS_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - IRQ_TX_CTS_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for IRQ_TX_CTS_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl R { - #[doc = "Bit 0 - RX Interrupt"] - #[inline(always)] - pub fn irq_rx(&self) -> IRQ_RX_R { - IRQ_RX_R::new((self.bits & 0x01) != 0) - } - #[doc = "Bit 1 - RX Status Interrupt"] - #[inline(always)] - pub fn irq_rx_status(&self) -> IRQ_RX_STATUS_R { - IRQ_RX_STATUS_R::new(((self.bits >> 1) & 0x01) != 0) - } - #[doc = "Bit 2 - RX Timeout Interrupt"] - #[inline(always)] - pub fn irq_rx_to(&self) -> IRQ_RX_TO_R { - IRQ_RX_TO_R::new(((self.bits >> 2) & 0x01) != 0) - } - #[doc = "Bit 4 - TX Interrupt"] - #[inline(always)] - pub fn irq_tx(&self) -> IRQ_TX_R { - IRQ_TX_R::new(((self.bits >> 4) & 0x01) != 0) - } - #[doc = "Bit 5 - TX Status Interrupt"] - #[inline(always)] - pub fn irq_tx_status(&self) -> IRQ_TX_STATUS_R { - IRQ_TX_STATUS_R::new(((self.bits >> 5) & 0x01) != 0) - } - #[doc = "Bit 6 - TX Empty Interrupt"] - #[inline(always)] - pub fn irq_tx_empty(&self) -> IRQ_TX_EMPTY_R { - IRQ_TX_EMPTY_R::new(((self.bits >> 6) & 0x01) != 0) - } - #[doc = "Bit 7 - TX CTS Change Interrupt"] - #[inline(always)] - pub fn irq_tx_cts(&self) -> IRQ_TX_CTS_R { - IRQ_TX_CTS_R::new(((self.bits >> 7) & 0x01) != 0) - } -} -#[doc = "IRQ Raw Status Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [irq_raw](index.html) module"] -pub struct IRQ_RAW_SPEC; -impl crate::RegisterSpec for IRQ_RAW_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [irq_raw::R](R) reader structure"] -impl crate::Readable for IRQ_RAW_SPEC { - type Reader = R; -} -#[doc = "`reset()` method sets IRQ_RAW to value 0"] -impl crate::Resettable for IRQ_RAW_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } -} diff --git a/va416xx/src/uart0/perid.rs b/va416xx/src/uart0/perid.rs index ad4532e..c2b57d9 100644 --- a/va416xx/src/uart0/perid.rs +++ b/va416xx/src/uart0/perid.rs @@ -1,31 +1,18 @@ #[doc = "Register `PERID` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 +pub type R = crate::R; +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) } } -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Peripheral ID Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [perid](index.html) module"] -pub struct PERID_SPEC; -impl crate::RegisterSpec for PERID_SPEC { +#[doc = "Peripheral ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`perid::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PeridSpec; +impl crate::RegisterSpec for PeridSpec { type Ux = u32; } -#[doc = "`read()` method returns [perid::R](R) reader structure"] -impl crate::Readable for PERID_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`perid::R`](R) reader structure"] +impl crate::Readable for PeridSpec {} #[doc = "`reset()` method sets PERID to value 0x0212_07e9"] -impl crate::Resettable for PERID_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0x0212_07e9 - } +impl crate::Resettable for PeridSpec { + const RESET_VALUE: u32 = 0x0212_07e9; } diff --git a/va416xx/src/uart0/rxfifoirqtrg.rs b/va416xx/src/uart0/rxfifoirqtrg.rs index fb4d239..46124d5 100644 --- a/va416xx/src/uart0/rxfifoirqtrg.rs +++ b/va416xx/src/uart0/rxfifoirqtrg.rs @@ -1,64 +1,27 @@ #[doc = "Register `RXFIFOIRQTRG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RXFIFOIRQTRG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 +pub type W = crate::W; +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) } } -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -impl W { - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "Rx FIFO IRQ Trigger Level\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxfifoirqtrg](index.html) module"] -pub struct RXFIFOIRQTRG_SPEC; -impl crate::RegisterSpec for RXFIFOIRQTRG_SPEC { +impl W {} +#[doc = "Rx FIFO IRQ Trigger Level\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxfifoirqtrg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rxfifoirqtrg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RxfifoirqtrgSpec; +impl crate::RegisterSpec for RxfifoirqtrgSpec { type Ux = u32; } -#[doc = "`read()` method returns [rxfifoirqtrg::R](R) reader structure"] -impl crate::Readable for RXFIFOIRQTRG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [rxfifoirqtrg::W](W) writer structure"] -impl crate::Writable for RXFIFOIRQTRG_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`rxfifoirqtrg::R`](R) reader structure"] +impl crate::Readable for RxfifoirqtrgSpec {} +#[doc = "`write(|w| ..)` method takes [`rxfifoirqtrg::W`](W) writer structure"] +impl crate::Writable for RxfifoirqtrgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RXFIFOIRQTRG to value 0"] -impl crate::Resettable for RXFIFOIRQTRG_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for RxfifoirqtrgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/uart0/rxfifortstrg.rs b/va416xx/src/uart0/rxfifortstrg.rs index 860e0fd..dd8afea 100644 --- a/va416xx/src/uart0/rxfifortstrg.rs +++ b/va416xx/src/uart0/rxfifortstrg.rs @@ -1,64 +1,27 @@ #[doc = "Register `RXFIFORTSTRG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RXFIFORTSTRG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 +pub type W = crate::W; +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) } } -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -impl W { - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "Rx FIFO RTS Trigger Level\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxfifortstrg](index.html) module"] -pub struct RXFIFORTSTRG_SPEC; -impl crate::RegisterSpec for RXFIFORTSTRG_SPEC { +impl W {} +#[doc = "Rx FIFO RTS Trigger Level\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxfifortstrg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rxfifortstrg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RxfifortstrgSpec; +impl crate::RegisterSpec for RxfifortstrgSpec { type Ux = u32; } -#[doc = "`read()` method returns [rxfifortstrg::R](R) reader structure"] -impl crate::Readable for RXFIFORTSTRG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [rxfifortstrg::W](W) writer structure"] -impl crate::Writable for RXFIFORTSTRG_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`rxfifortstrg::R`](R) reader structure"] +impl crate::Readable for RxfifortstrgSpec {} +#[doc = "`write(|w| ..)` method takes [`rxfifortstrg::W`](W) writer structure"] +impl crate::Writable for RxfifortstrgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RXFIFORTSTRG to value 0"] -impl crate::Resettable for RXFIFORTSTRG_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for RxfifortstrgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/uart0/rxstatus.rs b/va416xx/src/uart0/rxstatus.rs index 779d361..c519eb8 100644 --- a/va416xx/src/uart0/rxstatus.rs +++ b/va416xx/src/uart0/rxstatus.rs @@ -1,253 +1,92 @@ #[doc = "Register `RXSTATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RDAVL` reader - Read Data Available"] -pub struct RDAVL_R(crate::FieldReader); -impl RDAVL_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RDAVL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RDAVL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type RdavlR = crate::BitReader; #[doc = "Field `RDNFULL` reader - Read Fifo NOT Full"] -pub struct RDNFULL_R(crate::FieldReader); -impl RDNFULL_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RDNFULL_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RDNFULL_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type RdnfullR = crate::BitReader; #[doc = "Field `RXBUSY` reader - RX Busy Receiving"] -pub struct RXBUSY_R(crate::FieldReader); -impl RXBUSY_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXBUSY_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXBUSY_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type RxbusyR = crate::BitReader; #[doc = "Field `RXTO` reader - RX Receive Timeout"] -pub struct RXTO_R(crate::FieldReader); -impl RXTO_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXTO_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXTO_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type RxtoR = crate::BitReader; #[doc = "Field `RXOVR` reader - Read Fifo Overflow"] -pub struct RXOVR_R(crate::FieldReader); -impl RXOVR_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXOVR_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXOVR_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type RxovrR = crate::BitReader; #[doc = "Field `RXFRM` reader - RX Framing Error"] -pub struct RXFRM_R(crate::FieldReader); -impl RXFRM_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXFRM_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXFRM_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type RxfrmR = crate::BitReader; #[doc = "Field `RXPAR` reader - RX Parity Error"] -pub struct RXPAR_R(crate::FieldReader); -impl RXPAR_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXPAR_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXPAR_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type RxparR = crate::BitReader; #[doc = "Field `RXBRK` reader - RX Break Error"] -pub struct RXBRK_R(crate::FieldReader); -impl RXBRK_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXBRK_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXBRK_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type RxbrkR = crate::BitReader; #[doc = "Field `RXBUSYBRK` reader - RX Busy Receiving Break"] -pub struct RXBUSYBRK_R(crate::FieldReader); -impl RXBUSYBRK_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXBUSYBRK_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXBUSYBRK_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type RxbusybrkR = crate::BitReader; #[doc = "Field `RXADDR9` reader - Address Match for 9 bit mode"] -pub struct RXADDR9_R(crate::FieldReader); -impl RXADDR9_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXADDR9_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXADDR9_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type Rxaddr9R = crate::BitReader; #[doc = "Field `RXRTSN` reader - RX RTSn Output Value"] -pub struct RXRTSN_R(crate::FieldReader); -impl RXRTSN_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RXRTSN_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RXRTSN_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type RxrtsnR = crate::BitReader; impl R { #[doc = "Bit 0 - Read Data Available"] #[inline(always)] - pub fn rdavl(&self) -> RDAVL_R { - RDAVL_R::new((self.bits & 0x01) != 0) + pub fn rdavl(&self) -> RdavlR { + RdavlR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Read Fifo NOT Full"] #[inline(always)] - pub fn rdnfull(&self) -> RDNFULL_R { - RDNFULL_R::new(((self.bits >> 1) & 0x01) != 0) + pub fn rdnfull(&self) -> RdnfullR { + RdnfullR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - RX Busy Receiving"] #[inline(always)] - pub fn rxbusy(&self) -> RXBUSY_R { - RXBUSY_R::new(((self.bits >> 2) & 0x01) != 0) + pub fn rxbusy(&self) -> RxbusyR { + RxbusyR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - RX Receive Timeout"] #[inline(always)] - pub fn rxto(&self) -> RXTO_R { - RXTO_R::new(((self.bits >> 3) & 0x01) != 0) + pub fn rxto(&self) -> RxtoR { + RxtoR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Read Fifo Overflow"] #[inline(always)] - pub fn rxovr(&self) -> RXOVR_R { - RXOVR_R::new(((self.bits >> 4) & 0x01) != 0) + pub fn rxovr(&self) -> RxovrR { + RxovrR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - RX Framing Error"] #[inline(always)] - pub fn rxfrm(&self) -> RXFRM_R { - RXFRM_R::new(((self.bits >> 5) & 0x01) != 0) + pub fn rxfrm(&self) -> RxfrmR { + RxfrmR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - RX Parity Error"] #[inline(always)] - pub fn rxpar(&self) -> RXPAR_R { - RXPAR_R::new(((self.bits >> 6) & 0x01) != 0) + pub fn rxpar(&self) -> RxparR { + RxparR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - RX Break Error"] #[inline(always)] - pub fn rxbrk(&self) -> RXBRK_R { - RXBRK_R::new(((self.bits >> 7) & 0x01) != 0) + pub fn rxbrk(&self) -> RxbrkR { + RxbrkR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - RX Busy Receiving Break"] #[inline(always)] - pub fn rxbusybrk(&self) -> RXBUSYBRK_R { - RXBUSYBRK_R::new(((self.bits >> 8) & 0x01) != 0) + pub fn rxbusybrk(&self) -> RxbusybrkR { + RxbusybrkR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Address Match for 9 bit mode"] #[inline(always)] - pub fn rxaddr9(&self) -> RXADDR9_R { - RXADDR9_R::new(((self.bits >> 9) & 0x01) != 0) + pub fn rxaddr9(&self) -> Rxaddr9R { + Rxaddr9R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 15 - RX RTSn Output Value"] #[inline(always)] - pub fn rxrtsn(&self) -> RXRTSN_R { - RXRTSN_R::new(((self.bits >> 15) & 0x01) != 0) + pub fn rxrtsn(&self) -> RxrtsnR { + RxrtsnR::new(((self.bits >> 15) & 1) != 0) } } -#[doc = "Status Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxstatus](index.html) module"] -pub struct RXSTATUS_SPEC; -impl crate::RegisterSpec for RXSTATUS_SPEC { +#[doc = "Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxstatus::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RxstatusSpec; +impl crate::RegisterSpec for RxstatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [rxstatus::R](R) reader structure"] -impl crate::Readable for RXSTATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`rxstatus::R`](R) reader structure"] +impl crate::Readable for RxstatusSpec {} #[doc = "`reset()` method sets RXSTATUS to value 0"] -impl crate::Resettable for RXSTATUS_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for RxstatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/uart0/state.rs b/va416xx/src/uart0/state.rs index fd3845e..17ec5bc 100644 --- a/va416xx/src/uart0/state.rs +++ b/va416xx/src/uart0/state.rs @@ -1,31 +1,18 @@ #[doc = "Register `STATE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 +pub type R = crate::R; +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) } } -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Internal STATE of UART Controller\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [state](index.html) module"] -pub struct STATE_SPEC; -impl crate::RegisterSpec for STATE_SPEC { +#[doc = "Internal STATE of UART Controller\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`state::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StateSpec; +impl crate::RegisterSpec for StateSpec { type Ux = u32; } -#[doc = "`read()` method returns [state::R](R) reader structure"] -impl crate::Readable for STATE_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`state::R`](R) reader structure"] +impl crate::Readable for StateSpec {} #[doc = "`reset()` method sets STATE to value 0"] -impl crate::Resettable for STATE_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for StateSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/uart0/txbreak.rs b/va416xx/src/uart0/txbreak.rs index 0b28c0e..69a167f 100644 --- a/va416xx/src/uart0/txbreak.rs +++ b/va416xx/src/uart0/txbreak.rs @@ -1,45 +1,23 @@ #[doc = "Register `TXBREAK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 +pub type W = crate::W; +impl core::fmt::Debug for crate::generic::Reg { + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { + write!(f, "(not readable)") } } -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -impl W { - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "Break Transmit Register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txbreak](index.html) module"] -pub struct TXBREAK_SPEC; -impl crate::RegisterSpec for TXBREAK_SPEC { +impl W {} +#[doc = "Break Transmit Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`txbreak::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TxbreakSpec; +impl crate::RegisterSpec for TxbreakSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [txbreak::W](W) writer structure"] -impl crate::Writable for TXBREAK_SPEC { - type Writer = W; +#[doc = "`write(|w| ..)` method takes [`txbreak::W`](W) writer structure"] +impl crate::Writable for TxbreakSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TXBREAK to value 0"] -impl crate::Resettable for TXBREAK_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for TxbreakSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/uart0/txfifoirqtrg.rs b/va416xx/src/uart0/txfifoirqtrg.rs index a88c823..0d13e54 100644 --- a/va416xx/src/uart0/txfifoirqtrg.rs +++ b/va416xx/src/uart0/txfifoirqtrg.rs @@ -1,64 +1,27 @@ #[doc = "Register `TXFIFOIRQTRG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TXFIFOIRQTRG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 +pub type W = crate::W; +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) } } -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -impl W { - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "Tx FIFO IRQ Trigger Level\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txfifoirqtrg](index.html) module"] -pub struct TXFIFOIRQTRG_SPEC; -impl crate::RegisterSpec for TXFIFOIRQTRG_SPEC { +impl W {} +#[doc = "Tx FIFO IRQ Trigger Level\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txfifoirqtrg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`txfifoirqtrg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TxfifoirqtrgSpec; +impl crate::RegisterSpec for TxfifoirqtrgSpec { type Ux = u32; } -#[doc = "`read()` method returns [txfifoirqtrg::R](R) reader structure"] -impl crate::Readable for TXFIFOIRQTRG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [txfifoirqtrg::W](W) writer structure"] -impl crate::Writable for TXFIFOIRQTRG_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`txfifoirqtrg::R`](R) reader structure"] +impl crate::Readable for TxfifoirqtrgSpec {} +#[doc = "`write(|w| ..)` method takes [`txfifoirqtrg::W`](W) writer structure"] +impl crate::Writable for TxfifoirqtrgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TXFIFOIRQTRG to value 0"] -impl crate::Resettable for TXFIFOIRQTRG_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for TxfifoirqtrgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/uart0/txstatus.rs b/va416xx/src/uart0/txstatus.rs index e96e737..42852d9 100644 --- a/va416xx/src/uart0/txstatus.rs +++ b/va416xx/src/uart0/txstatus.rs @@ -1,133 +1,50 @@ #[doc = "Register `TXSTATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `WRRDY` reader - Write Fifo NOT Full"] -pub struct WRRDY_R(crate::FieldReader); -impl WRRDY_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - WRRDY_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for WRRDY_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type WrrdyR = crate::BitReader; #[doc = "Field `WRBUSY` reader - Write Fifo Full"] -pub struct WRBUSY_R(crate::FieldReader); -impl WRBUSY_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - WRBUSY_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for WRBUSY_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type WrbusyR = crate::BitReader; #[doc = "Field `TXBUSY` reader - TX Busy Transmitting"] -pub struct TXBUSY_R(crate::FieldReader); -impl TXBUSY_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXBUSY_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXBUSY_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type TxbusyR = crate::BitReader; #[doc = "Field `WRLOST` reader - Write Data Lost (Fifo Overflow)"] -pub struct WRLOST_R(crate::FieldReader); -impl WRLOST_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - WRLOST_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for WRLOST_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type WrlostR = crate::BitReader; #[doc = "Field `TXCTSN` reader - TX CTSn Input Value"] -pub struct TXCTSN_R(crate::FieldReader); -impl TXCTSN_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TXCTSN_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TXCTSN_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type TxctsnR = crate::BitReader; impl R { #[doc = "Bit 0 - Write Fifo NOT Full"] #[inline(always)] - pub fn wrrdy(&self) -> WRRDY_R { - WRRDY_R::new((self.bits & 0x01) != 0) + pub fn wrrdy(&self) -> WrrdyR { + WrrdyR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Write Fifo Full"] #[inline(always)] - pub fn wrbusy(&self) -> WRBUSY_R { - WRBUSY_R::new(((self.bits >> 1) & 0x01) != 0) + pub fn wrbusy(&self) -> WrbusyR { + WrbusyR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - TX Busy Transmitting"] #[inline(always)] - pub fn txbusy(&self) -> TXBUSY_R { - TXBUSY_R::new(((self.bits >> 2) & 0x01) != 0) + pub fn txbusy(&self) -> TxbusyR { + TxbusyR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Write Data Lost (Fifo Overflow)"] #[inline(always)] - pub fn wrlost(&self) -> WRLOST_R { - WRLOST_R::new(((self.bits >> 3) & 0x01) != 0) + pub fn wrlost(&self) -> WrlostR { + WrlostR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 15 - TX CTSn Input Value"] #[inline(always)] - pub fn txctsn(&self) -> TXCTSN_R { - TXCTSN_R::new(((self.bits >> 15) & 0x01) != 0) + pub fn txctsn(&self) -> TxctsnR { + TxctsnR::new(((self.bits >> 15) & 1) != 0) } } -#[doc = "Status Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txstatus](index.html) module"] -pub struct TXSTATUS_SPEC; -impl crate::RegisterSpec for TXSTATUS_SPEC { +#[doc = "Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txstatus::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TxstatusSpec; +impl crate::RegisterSpec for TxstatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [txstatus::R](R) reader structure"] -impl crate::Readable for TXSTATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`txstatus::R`](R) reader structure"] +impl crate::Readable for TxstatusSpec {} #[doc = "`reset()` method sets TXSTATUS to value 0"] -impl crate::Resettable for TXSTATUS_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for TxstatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/utility.rs b/va416xx/src/utility.rs index 4ca41c4..9866ff5 100644 --- a/va416xx/src/utility.rs +++ b/va416xx/src/utility.rs @@ -1,96 +1,188 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - #[doc = "0x00 - Data Register"] - pub synd_data: crate::Reg, - #[doc = "0x04 - Syndrome Data Register"] - pub synd_synd: crate::Reg, - #[doc = "0x08 - EDAC Encode"] - pub synd_enc_32_44: crate::Reg, - #[doc = "0x0c - EDAC Decode Data"] - pub synd_check_32_44_data: crate::Reg, - #[doc = "0x10 - EDAC Decode Syndrome"] - pub synd_check_32_44_synd: crate::Reg, - #[doc = "0x14 - ROM EDAC Trap Address"] - pub rom_trap_address: crate::Reg, - #[doc = "0x18 - ROM EDAC Trap Syndrome"] - pub rom_trap_synd: crate::Reg, - #[doc = "0x1c - RAM0 EDAC Trap Address"] - pub ram_trap_addr0: crate::Reg, - #[doc = "0x20 - RAM0 EDAC Trap Syndrome"] - pub ram_trap_synd0: crate::Reg, - #[doc = "0x24 - RAM1 EDAC Trap Address"] - pub ram_trap_addr1: crate::Reg, - #[doc = "0x28 - RAM1 EDAC Trap Syndrome"] - pub ram_trap_synd1: crate::Reg, + synd_data: SyndData, + synd_synd: SyndSynd, + synd_enc_32_44: SyndEnc32_44, + synd_check_32_44_data: SyndCheck32_44Data, + synd_check_32_44_synd: SyndCheck32_44Synd, + rom_trap_address: RomTrapAddress, + rom_trap_synd: RomTrapSynd, + ram_trap_addr0: RamTrapAddr0, + ram_trap_synd0: RamTrapSynd0, + ram_trap_addr1: RamTrapAddr1, + ram_trap_synd1: RamTrapSynd1, _reserved11: [u8; 0xf4], - #[doc = "0x120 - EDAC Encode"] - pub synd_enc_32_52: crate::Reg, - #[doc = "0x124 - EDAC Decode Data"] - pub synd_check_32_52_data: crate::Reg, - #[doc = "0x128 - EDAC Decode Syndrome"] - pub synd_check_32_52_synd: crate::Reg, + synd_enc_32_52: SyndEnc32_52, + synd_check_32_52_data: SyndCheck32_52Data, + synd_check_32_52_synd: SyndCheck32_52Synd, _reserved14: [u8; 0x0ed0], - #[doc = "0xffc - Peripheral ID Register"] - pub perid: crate::Reg, + perid: Perid, } -#[doc = "SYND_DATA register accessor: an alias for `Reg`"] -pub type SYND_DATA = crate::Reg; +impl RegisterBlock { + #[doc = "0x00 - Data Register"] + #[inline(always)] + pub const fn synd_data(&self) -> &SyndData { + &self.synd_data + } + #[doc = "0x04 - Syndrome Data Register"] + #[inline(always)] + pub const fn synd_synd(&self) -> &SyndSynd { + &self.synd_synd + } + #[doc = "0x08 - EDAC Encode"] + #[inline(always)] + pub const fn synd_enc_32_44(&self) -> &SyndEnc32_44 { + &self.synd_enc_32_44 + } + #[doc = "0x0c - EDAC Decode Data"] + #[inline(always)] + pub const fn synd_check_32_44_data(&self) -> &SyndCheck32_44Data { + &self.synd_check_32_44_data + } + #[doc = "0x10 - EDAC Decode Syndrome"] + #[inline(always)] + pub const fn synd_check_32_44_synd(&self) -> &SyndCheck32_44Synd { + &self.synd_check_32_44_synd + } + #[doc = "0x14 - ROM EDAC Trap Address"] + #[inline(always)] + pub const fn rom_trap_address(&self) -> &RomTrapAddress { + &self.rom_trap_address + } + #[doc = "0x18 - ROM EDAC Trap Syndrome"] + #[inline(always)] + pub const fn rom_trap_synd(&self) -> &RomTrapSynd { + &self.rom_trap_synd + } + #[doc = "0x1c - RAM0 EDAC Trap Address"] + #[inline(always)] + pub const fn ram_trap_addr0(&self) -> &RamTrapAddr0 { + &self.ram_trap_addr0 + } + #[doc = "0x20 - RAM0 EDAC Trap Syndrome"] + #[inline(always)] + pub const fn ram_trap_synd0(&self) -> &RamTrapSynd0 { + &self.ram_trap_synd0 + } + #[doc = "0x24 - RAM1 EDAC Trap Address"] + #[inline(always)] + pub const fn ram_trap_addr1(&self) -> &RamTrapAddr1 { + &self.ram_trap_addr1 + } + #[doc = "0x28 - RAM1 EDAC Trap Syndrome"] + #[inline(always)] + pub const fn ram_trap_synd1(&self) -> &RamTrapSynd1 { + &self.ram_trap_synd1 + } + #[doc = "0x120 - EDAC Encode"] + #[inline(always)] + pub const fn synd_enc_32_52(&self) -> &SyndEnc32_52 { + &self.synd_enc_32_52 + } + #[doc = "0x124 - EDAC Decode Data"] + #[inline(always)] + pub const fn synd_check_32_52_data(&self) -> &SyndCheck32_52Data { + &self.synd_check_32_52_data + } + #[doc = "0x128 - EDAC Decode Syndrome"] + #[inline(always)] + pub const fn synd_check_32_52_synd(&self) -> &SyndCheck32_52Synd { + &self.synd_check_32_52_synd + } + #[doc = "0xffc - Peripheral ID Register"] + #[inline(always)] + pub const fn perid(&self) -> &Perid { + &self.perid + } +} +#[doc = "SYND_DATA (rw) register accessor: Data Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`synd_data::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`synd_data::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@synd_data`] +module"] +#[doc(alias = "SYND_DATA")] +pub type SyndData = crate::Reg; #[doc = "Data Register"] pub mod synd_data; -#[doc = "SYND_SYND register accessor: an alias for `Reg`"] -pub type SYND_SYND = crate::Reg; +#[doc = "SYND_SYND (rw) register accessor: Syndrome Data Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`synd_synd::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`synd_synd::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@synd_synd`] +module"] +#[doc(alias = "SYND_SYND")] +pub type SyndSynd = crate::Reg; #[doc = "Syndrome Data Register"] pub mod synd_synd; -#[doc = "SYND_ENC_32_44 register accessor: an alias for `Reg`"] -pub type SYND_ENC_32_44 = crate::Reg; +#[doc = "SYND_ENC_32_44 (rw) register accessor: EDAC Encode\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`synd_enc_32_44::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`synd_enc_32_44::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@synd_enc_32_44`] +module"] +#[doc(alias = "SYND_ENC_32_44")] +pub type SyndEnc32_44 = crate::Reg; #[doc = "EDAC Encode"] pub mod synd_enc_32_44; -#[doc = "SYND_CHECK_32_44_DATA register accessor: an alias for `Reg`"] -pub type SYND_CHECK_32_44_DATA = crate::Reg; +#[doc = "SYND_CHECK_32_44_DATA (r) register accessor: EDAC Decode Data\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`synd_check_32_44_data::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@synd_check_32_44_data`] +module"] +#[doc(alias = "SYND_CHECK_32_44_DATA")] +pub type SyndCheck32_44Data = crate::Reg; #[doc = "EDAC Decode Data"] pub mod synd_check_32_44_data; -#[doc = "SYND_CHECK_32_44_SYND register accessor: an alias for `Reg`"] -pub type SYND_CHECK_32_44_SYND = crate::Reg; +#[doc = "SYND_CHECK_32_44_SYND (r) register accessor: EDAC Decode Syndrome\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`synd_check_32_44_synd::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@synd_check_32_44_synd`] +module"] +#[doc(alias = "SYND_CHECK_32_44_SYND")] +pub type SyndCheck32_44Synd = crate::Reg; #[doc = "EDAC Decode Syndrome"] pub mod synd_check_32_44_synd; -#[doc = "ROM_TRAP_ADDRESS register accessor: an alias for `Reg`"] -pub type ROM_TRAP_ADDRESS = crate::Reg; +#[doc = "ROM_TRAP_ADDRESS (rw) register accessor: ROM EDAC Trap Address\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rom_trap_address::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rom_trap_address::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rom_trap_address`] +module"] +#[doc(alias = "ROM_TRAP_ADDRESS")] +pub type RomTrapAddress = crate::Reg; #[doc = "ROM EDAC Trap Address"] pub mod rom_trap_address; -#[doc = "ROM_TRAP_SYND register accessor: an alias for `Reg`"] -pub type ROM_TRAP_SYND = crate::Reg; +#[doc = "ROM_TRAP_SYND (rw) register accessor: ROM EDAC Trap Syndrome\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rom_trap_synd::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rom_trap_synd::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rom_trap_synd`] +module"] +#[doc(alias = "ROM_TRAP_SYND")] +pub type RomTrapSynd = crate::Reg; #[doc = "ROM EDAC Trap Syndrome"] pub mod rom_trap_synd; -#[doc = "RAM_TRAP_ADDR0 register accessor: an alias for `Reg`"] -pub type RAM_TRAP_ADDR0 = crate::Reg; +#[doc = "RAM_TRAP_ADDR0 (rw) register accessor: RAM0 EDAC Trap Address\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ram_trap_addr0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ram_trap_addr0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ram_trap_addr0`] +module"] +#[doc(alias = "RAM_TRAP_ADDR0")] +pub type RamTrapAddr0 = crate::Reg; #[doc = "RAM0 EDAC Trap Address"] pub mod ram_trap_addr0; -#[doc = "RAM_TRAP_SYND0 register accessor: an alias for `Reg`"] -pub type RAM_TRAP_SYND0 = crate::Reg; +#[doc = "RAM_TRAP_SYND0 (rw) register accessor: RAM0 EDAC Trap Syndrome\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ram_trap_synd0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ram_trap_synd0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ram_trap_synd0`] +module"] +#[doc(alias = "RAM_TRAP_SYND0")] +pub type RamTrapSynd0 = crate::Reg; #[doc = "RAM0 EDAC Trap Syndrome"] pub mod ram_trap_synd0; -#[doc = "RAM_TRAP_ADDR1 register accessor: an alias for `Reg`"] -pub type RAM_TRAP_ADDR1 = crate::Reg; +#[doc = "RAM_TRAP_ADDR1 (rw) register accessor: RAM1 EDAC Trap Address\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ram_trap_addr1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ram_trap_addr1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ram_trap_addr1`] +module"] +#[doc(alias = "RAM_TRAP_ADDR1")] +pub type RamTrapAddr1 = crate::Reg; #[doc = "RAM1 EDAC Trap Address"] pub mod ram_trap_addr1; -#[doc = "RAM_TRAP_SYND1 register accessor: an alias for `Reg`"] -pub type RAM_TRAP_SYND1 = crate::Reg; +#[doc = "RAM_TRAP_SYND1 (rw) register accessor: RAM1 EDAC Trap Syndrome\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ram_trap_synd1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ram_trap_synd1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ram_trap_synd1`] +module"] +#[doc(alias = "RAM_TRAP_SYND1")] +pub type RamTrapSynd1 = crate::Reg; #[doc = "RAM1 EDAC Trap Syndrome"] pub mod ram_trap_synd1; -#[doc = "SYND_ENC_32_52 register accessor: an alias for `Reg`"] -pub type SYND_ENC_32_52 = crate::Reg; +#[doc = "SYND_ENC_32_52 (r) register accessor: EDAC Encode\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`synd_enc_32_52::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@synd_enc_32_52`] +module"] +#[doc(alias = "SYND_ENC_32_52")] +pub type SyndEnc32_52 = crate::Reg; #[doc = "EDAC Encode"] pub mod synd_enc_32_52; -#[doc = "SYND_CHECK_32_52_DATA register accessor: an alias for `Reg`"] -pub type SYND_CHECK_32_52_DATA = crate::Reg; +#[doc = "SYND_CHECK_32_52_DATA (r) register accessor: EDAC Decode Data\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`synd_check_32_52_data::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@synd_check_32_52_data`] +module"] +#[doc(alias = "SYND_CHECK_32_52_DATA")] +pub type SyndCheck32_52Data = crate::Reg; #[doc = "EDAC Decode Data"] pub mod synd_check_32_52_data; -#[doc = "SYND_CHECK_32_52_SYND register accessor: an alias for `Reg`"] -pub type SYND_CHECK_32_52_SYND = crate::Reg; +#[doc = "SYND_CHECK_32_52_SYND (r) register accessor: EDAC Decode Syndrome\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`synd_check_32_52_synd::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@synd_check_32_52_synd`] +module"] +#[doc(alias = "SYND_CHECK_32_52_SYND")] +pub type SyndCheck32_52Synd = crate::Reg; #[doc = "EDAC Decode Syndrome"] pub mod synd_check_32_52_synd; -#[doc = "PERID register accessor: an alias for `Reg`"] -pub type PERID = crate::Reg; +#[doc = "PERID (r) register accessor: Peripheral ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`perid::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@perid`] +module"] +#[doc(alias = "PERID")] +pub type Perid = crate::Reg; #[doc = "Peripheral ID Register"] pub mod perid; diff --git a/va416xx/src/utility/perid.rs b/va416xx/src/utility/perid.rs index 33a4e4b..8a3adc5 100644 --- a/va416xx/src/utility/perid.rs +++ b/va416xx/src/utility/perid.rs @@ -1,31 +1,18 @@ #[doc = "Register `PERID` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 +pub type R = crate::R; +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) } } -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Peripheral ID Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [perid](index.html) module"] -pub struct PERID_SPEC; -impl crate::RegisterSpec for PERID_SPEC { +#[doc = "Peripheral ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`perid::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PeridSpec; +impl crate::RegisterSpec for PeridSpec { type Ux = u32; } -#[doc = "`read()` method returns [perid::R](R) reader structure"] -impl crate::Readable for PERID_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`perid::R`](R) reader structure"] +impl crate::Readable for PeridSpec {} #[doc = "`reset()` method sets PERID to value 0x0284_07e9"] -impl crate::Resettable for PERID_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0x0284_07e9 - } +impl crate::Resettable for PeridSpec { + const RESET_VALUE: u32 = 0x0284_07e9; } diff --git a/va416xx/src/utility/ram_trap_addr0.rs b/va416xx/src/utility/ram_trap_addr0.rs index c5c3e45..d29dd1a 100644 --- a/va416xx/src/utility/ram_trap_addr0.rs +++ b/va416xx/src/utility/ram_trap_addr0.rs @@ -1,150 +1,55 @@ #[doc = "Register `RAM_TRAP_ADDR0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RAM_TRAP_ADDR0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `ENABLE` reader - Enable Trap mode"] -pub struct ENABLE_R(crate::FieldReader); -impl ENABLE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - ENABLE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ENABLE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `ENABLE` writer - Enable Trap mode"] -pub struct ENABLE_W<'a> { - w: &'a mut W, -} -impl<'a> ENABLE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 31)) | ((value as u32 & 0x01) << 31); - self.w - } -} +pub type W = crate::W; #[doc = "Field `ADDR` reader - Address bits for trap match"] -pub struct ADDR_R(crate::FieldReader); -impl ADDR_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - ADDR_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ADDR_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type AddrR = crate::FieldReader; #[doc = "Field `ADDR` writer - Address bits for trap match"] -pub struct ADDR_W<'a> { - w: &'a mut W, -} -impl<'a> ADDR_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x1fff_ffff << 2)) | ((value as u32 & 0x1fff_ffff) << 2); - self.w - } -} +pub type AddrW<'a, REG> = crate::FieldWriter<'a, REG, 29, u32>; +#[doc = "Field `ENABLE` reader - Enable Trap mode"] +pub type EnableR = crate::BitReader; +#[doc = "Field `ENABLE` writer - Enable Trap mode"] +pub type EnableW<'a, REG> = crate::BitWriter<'a, REG>; impl R { - #[doc = "Bit 31 - Enable Trap mode"] - #[inline(always)] - pub fn enable(&self) -> ENABLE_R { - ENABLE_R::new(((self.bits >> 31) & 0x01) != 0) - } #[doc = "Bits 2:30 - Address bits for trap match"] #[inline(always)] - pub fn addr(&self) -> ADDR_R { - ADDR_R::new(((self.bits >> 2) & 0x1fff_ffff) as u32) + pub fn addr(&self) -> AddrR { + AddrR::new((self.bits >> 2) & 0x1fff_ffff) + } + #[doc = "Bit 31 - Enable Trap mode"] + #[inline(always)] + pub fn enable(&self) -> EnableR { + EnableR::new(((self.bits >> 31) & 1) != 0) } } impl W { - #[doc = "Bit 31 - Enable Trap mode"] - #[inline(always)] - pub fn enable(&mut self) -> ENABLE_W { - ENABLE_W { w: self } - } #[doc = "Bits 2:30 - Address bits for trap match"] #[inline(always)] - pub fn addr(&mut self) -> ADDR_W { - ADDR_W { w: self } + #[must_use] + pub fn addr(&mut self) -> AddrW { + AddrW::new(self, 2) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bit 31 - Enable Trap mode"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn enable(&mut self) -> EnableW { + EnableW::new(self, 31) } } -#[doc = "RAM0 EDAC Trap Address\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ram_trap_addr0](index.html) module"] -pub struct RAM_TRAP_ADDR0_SPEC; -impl crate::RegisterSpec for RAM_TRAP_ADDR0_SPEC { +#[doc = "RAM0 EDAC Trap Address\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ram_trap_addr0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ram_trap_addr0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RamTrapAddr0Spec; +impl crate::RegisterSpec for RamTrapAddr0Spec { type Ux = u32; } -#[doc = "`read()` method returns [ram_trap_addr0::R](R) reader structure"] -impl crate::Readable for RAM_TRAP_ADDR0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ram_trap_addr0::W](W) writer structure"] -impl crate::Writable for RAM_TRAP_ADDR0_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`ram_trap_addr0::R`](R) reader structure"] +impl crate::Readable for RamTrapAddr0Spec {} +#[doc = "`write(|w| ..)` method takes [`ram_trap_addr0::W`](W) writer structure"] +impl crate::Writable for RamTrapAddr0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RAM_TRAP_ADDR0 to value 0"] -impl crate::Resettable for RAM_TRAP_ADDR0_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for RamTrapAddr0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/utility/ram_trap_addr1.rs b/va416xx/src/utility/ram_trap_addr1.rs index 32dcbd0..ce2b329 100644 --- a/va416xx/src/utility/ram_trap_addr1.rs +++ b/va416xx/src/utility/ram_trap_addr1.rs @@ -1,150 +1,55 @@ #[doc = "Register `RAM_TRAP_ADDR1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RAM_TRAP_ADDR1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `ENABLE` reader - Enable Trap mode"] -pub struct ENABLE_R(crate::FieldReader); -impl ENABLE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - ENABLE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ENABLE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `ENABLE` writer - Enable Trap mode"] -pub struct ENABLE_W<'a> { - w: &'a mut W, -} -impl<'a> ENABLE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 31)) | ((value as u32 & 0x01) << 31); - self.w - } -} +pub type W = crate::W; #[doc = "Field `ADDR` reader - Address bits for trap match"] -pub struct ADDR_R(crate::FieldReader); -impl ADDR_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - ADDR_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ADDR_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type AddrR = crate::FieldReader; #[doc = "Field `ADDR` writer - Address bits for trap match"] -pub struct ADDR_W<'a> { - w: &'a mut W, -} -impl<'a> ADDR_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x1fff_ffff << 2)) | ((value as u32 & 0x1fff_ffff) << 2); - self.w - } -} +pub type AddrW<'a, REG> = crate::FieldWriter<'a, REG, 29, u32>; +#[doc = "Field `ENABLE` reader - Enable Trap mode"] +pub type EnableR = crate::BitReader; +#[doc = "Field `ENABLE` writer - Enable Trap mode"] +pub type EnableW<'a, REG> = crate::BitWriter<'a, REG>; impl R { - #[doc = "Bit 31 - Enable Trap mode"] - #[inline(always)] - pub fn enable(&self) -> ENABLE_R { - ENABLE_R::new(((self.bits >> 31) & 0x01) != 0) - } #[doc = "Bits 2:30 - Address bits for trap match"] #[inline(always)] - pub fn addr(&self) -> ADDR_R { - ADDR_R::new(((self.bits >> 2) & 0x1fff_ffff) as u32) + pub fn addr(&self) -> AddrR { + AddrR::new((self.bits >> 2) & 0x1fff_ffff) + } + #[doc = "Bit 31 - Enable Trap mode"] + #[inline(always)] + pub fn enable(&self) -> EnableR { + EnableR::new(((self.bits >> 31) & 1) != 0) } } impl W { - #[doc = "Bit 31 - Enable Trap mode"] - #[inline(always)] - pub fn enable(&mut self) -> ENABLE_W { - ENABLE_W { w: self } - } #[doc = "Bits 2:30 - Address bits for trap match"] #[inline(always)] - pub fn addr(&mut self) -> ADDR_W { - ADDR_W { w: self } + #[must_use] + pub fn addr(&mut self) -> AddrW { + AddrW::new(self, 2) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bit 31 - Enable Trap mode"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn enable(&mut self) -> EnableW { + EnableW::new(self, 31) } } -#[doc = "RAM1 EDAC Trap Address\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ram_trap_addr1](index.html) module"] -pub struct RAM_TRAP_ADDR1_SPEC; -impl crate::RegisterSpec for RAM_TRAP_ADDR1_SPEC { +#[doc = "RAM1 EDAC Trap Address\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ram_trap_addr1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ram_trap_addr1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RamTrapAddr1Spec; +impl crate::RegisterSpec for RamTrapAddr1Spec { type Ux = u32; } -#[doc = "`read()` method returns [ram_trap_addr1::R](R) reader structure"] -impl crate::Readable for RAM_TRAP_ADDR1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ram_trap_addr1::W](W) writer structure"] -impl crate::Writable for RAM_TRAP_ADDR1_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`ram_trap_addr1::R`](R) reader structure"] +impl crate::Readable for RamTrapAddr1Spec {} +#[doc = "`write(|w| ..)` method takes [`ram_trap_addr1::W`](W) writer structure"] +impl crate::Writable for RamTrapAddr1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RAM_TRAP_ADDR1 to value 0"] -impl crate::Resettable for RAM_TRAP_ADDR1_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for RamTrapAddr1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/utility/ram_trap_synd0.rs b/va416xx/src/utility/ram_trap_synd0.rs index b4d9dfc..7eaf19f 100644 --- a/va416xx/src/utility/ram_trap_synd0.rs +++ b/va416xx/src/utility/ram_trap_synd0.rs @@ -1,140 +1,55 @@ #[doc = "Register `RAM_TRAP_SYND0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RAM_TRAP_SYND0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `RAM_SYND_31_16` reader - 6-bit syndrome value for bits 31-16"] -pub struct RAM_SYND_31_16_R(crate::FieldReader); -impl RAM_SYND_31_16_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - RAM_SYND_31_16_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RAM_SYND_31_16_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RAM_SYND_31_16` writer - 6-bit syndrome value for bits 31-16"] -pub struct RAM_SYND_31_16_W<'a> { - w: &'a mut W, -} -impl<'a> RAM_SYND_31_16_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x3f << 6)) | ((value as u32 & 0x3f) << 6); - self.w - } -} +pub type W = crate::W; #[doc = "Field `RAM_SYND_7_0` reader - 6-bit syndrome value for bits 15-0"] -pub struct RAM_SYND_7_0_R(crate::FieldReader); -impl RAM_SYND_7_0_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - RAM_SYND_7_0_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RAM_SYND_7_0_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type RamSynd7_0R = crate::FieldReader; #[doc = "Field `RAM_SYND_7_0` writer - 6-bit syndrome value for bits 15-0"] -pub struct RAM_SYND_7_0_W<'a> { - w: &'a mut W, -} -impl<'a> RAM_SYND_7_0_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0x3f) | (value as u32 & 0x3f); - self.w - } -} +pub type RamSynd7_0W<'a, REG> = crate::FieldWriter<'a, REG, 6>; +#[doc = "Field `RAM_SYND_31_16` reader - 6-bit syndrome value for bits 31-16"] +pub type RamSynd31_16R = crate::FieldReader; +#[doc = "Field `RAM_SYND_31_16` writer - 6-bit syndrome value for bits 31-16"] +pub type RamSynd31_16W<'a, REG> = crate::FieldWriter<'a, REG, 6>; impl R { - #[doc = "Bits 6:11 - 6-bit syndrome value for bits 31-16"] - #[inline(always)] - pub fn ram_synd_31_16(&self) -> RAM_SYND_31_16_R { - RAM_SYND_31_16_R::new(((self.bits >> 6) & 0x3f) as u8) - } #[doc = "Bits 0:5 - 6-bit syndrome value for bits 15-0"] #[inline(always)] - pub fn ram_synd_7_0(&self) -> RAM_SYND_7_0_R { - RAM_SYND_7_0_R::new((self.bits & 0x3f) as u8) + pub fn ram_synd_7_0(&self) -> RamSynd7_0R { + RamSynd7_0R::new((self.bits & 0x3f) as u8) + } + #[doc = "Bits 6:11 - 6-bit syndrome value for bits 31-16"] + #[inline(always)] + pub fn ram_synd_31_16(&self) -> RamSynd31_16R { + RamSynd31_16R::new(((self.bits >> 6) & 0x3f) as u8) } } impl W { - #[doc = "Bits 6:11 - 6-bit syndrome value for bits 31-16"] - #[inline(always)] - pub fn ram_synd_31_16(&mut self) -> RAM_SYND_31_16_W { - RAM_SYND_31_16_W { w: self } - } #[doc = "Bits 0:5 - 6-bit syndrome value for bits 15-0"] #[inline(always)] - pub fn ram_synd_7_0(&mut self) -> RAM_SYND_7_0_W { - RAM_SYND_7_0_W { w: self } + #[must_use] + pub fn ram_synd_7_0(&mut self) -> RamSynd7_0W { + RamSynd7_0W::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 6:11 - 6-bit syndrome value for bits 31-16"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn ram_synd_31_16(&mut self) -> RamSynd31_16W { + RamSynd31_16W::new(self, 6) } } -#[doc = "RAM0 EDAC Trap Syndrome\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ram_trap_synd0](index.html) module"] -pub struct RAM_TRAP_SYND0_SPEC; -impl crate::RegisterSpec for RAM_TRAP_SYND0_SPEC { +#[doc = "RAM0 EDAC Trap Syndrome\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ram_trap_synd0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ram_trap_synd0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RamTrapSynd0Spec; +impl crate::RegisterSpec for RamTrapSynd0Spec { type Ux = u32; } -#[doc = "`read()` method returns [ram_trap_synd0::R](R) reader structure"] -impl crate::Readable for RAM_TRAP_SYND0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ram_trap_synd0::W](W) writer structure"] -impl crate::Writable for RAM_TRAP_SYND0_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`ram_trap_synd0::R`](R) reader structure"] +impl crate::Readable for RamTrapSynd0Spec {} +#[doc = "`write(|w| ..)` method takes [`ram_trap_synd0::W`](W) writer structure"] +impl crate::Writable for RamTrapSynd0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RAM_TRAP_SYND0 to value 0"] -impl crate::Resettable for RAM_TRAP_SYND0_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for RamTrapSynd0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/utility/ram_trap_synd1.rs b/va416xx/src/utility/ram_trap_synd1.rs index a4935a6..adf1ba5 100644 --- a/va416xx/src/utility/ram_trap_synd1.rs +++ b/va416xx/src/utility/ram_trap_synd1.rs @@ -1,140 +1,55 @@ #[doc = "Register `RAM_TRAP_SYND1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RAM_TRAP_SYND1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `RAM_SYND_31_16` reader - 6-bit syndrome value for bits 31-16"] -pub struct RAM_SYND_31_16_R(crate::FieldReader); -impl RAM_SYND_31_16_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - RAM_SYND_31_16_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RAM_SYND_31_16_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RAM_SYND_31_16` writer - 6-bit syndrome value for bits 31-16"] -pub struct RAM_SYND_31_16_W<'a> { - w: &'a mut W, -} -impl<'a> RAM_SYND_31_16_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x3f << 6)) | ((value as u32 & 0x3f) << 6); - self.w - } -} +pub type W = crate::W; #[doc = "Field `RAM_SYND_7_0` reader - 6-bit syndrome value for bits 15-0"] -pub struct RAM_SYND_7_0_R(crate::FieldReader); -impl RAM_SYND_7_0_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - RAM_SYND_7_0_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RAM_SYND_7_0_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type RamSynd7_0R = crate::FieldReader; #[doc = "Field `RAM_SYND_7_0` writer - 6-bit syndrome value for bits 15-0"] -pub struct RAM_SYND_7_0_W<'a> { - w: &'a mut W, -} -impl<'a> RAM_SYND_7_0_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0x3f) | (value as u32 & 0x3f); - self.w - } -} +pub type RamSynd7_0W<'a, REG> = crate::FieldWriter<'a, REG, 6>; +#[doc = "Field `RAM_SYND_31_16` reader - 6-bit syndrome value for bits 31-16"] +pub type RamSynd31_16R = crate::FieldReader; +#[doc = "Field `RAM_SYND_31_16` writer - 6-bit syndrome value for bits 31-16"] +pub type RamSynd31_16W<'a, REG> = crate::FieldWriter<'a, REG, 6>; impl R { - #[doc = "Bits 6:11 - 6-bit syndrome value for bits 31-16"] - #[inline(always)] - pub fn ram_synd_31_16(&self) -> RAM_SYND_31_16_R { - RAM_SYND_31_16_R::new(((self.bits >> 6) & 0x3f) as u8) - } #[doc = "Bits 0:5 - 6-bit syndrome value for bits 15-0"] #[inline(always)] - pub fn ram_synd_7_0(&self) -> RAM_SYND_7_0_R { - RAM_SYND_7_0_R::new((self.bits & 0x3f) as u8) + pub fn ram_synd_7_0(&self) -> RamSynd7_0R { + RamSynd7_0R::new((self.bits & 0x3f) as u8) + } + #[doc = "Bits 6:11 - 6-bit syndrome value for bits 31-16"] + #[inline(always)] + pub fn ram_synd_31_16(&self) -> RamSynd31_16R { + RamSynd31_16R::new(((self.bits >> 6) & 0x3f) as u8) } } impl W { - #[doc = "Bits 6:11 - 6-bit syndrome value for bits 31-16"] - #[inline(always)] - pub fn ram_synd_31_16(&mut self) -> RAM_SYND_31_16_W { - RAM_SYND_31_16_W { w: self } - } #[doc = "Bits 0:5 - 6-bit syndrome value for bits 15-0"] #[inline(always)] - pub fn ram_synd_7_0(&mut self) -> RAM_SYND_7_0_W { - RAM_SYND_7_0_W { w: self } + #[must_use] + pub fn ram_synd_7_0(&mut self) -> RamSynd7_0W { + RamSynd7_0W::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 6:11 - 6-bit syndrome value for bits 31-16"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn ram_synd_31_16(&mut self) -> RamSynd31_16W { + RamSynd31_16W::new(self, 6) } } -#[doc = "RAM1 EDAC Trap Syndrome\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ram_trap_synd1](index.html) module"] -pub struct RAM_TRAP_SYND1_SPEC; -impl crate::RegisterSpec for RAM_TRAP_SYND1_SPEC { +#[doc = "RAM1 EDAC Trap Syndrome\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ram_trap_synd1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ram_trap_synd1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RamTrapSynd1Spec; +impl crate::RegisterSpec for RamTrapSynd1Spec { type Ux = u32; } -#[doc = "`read()` method returns [ram_trap_synd1::R](R) reader structure"] -impl crate::Readable for RAM_TRAP_SYND1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ram_trap_synd1::W](W) writer structure"] -impl crate::Writable for RAM_TRAP_SYND1_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`ram_trap_synd1::R`](R) reader structure"] +impl crate::Readable for RamTrapSynd1Spec {} +#[doc = "`write(|w| ..)` method takes [`ram_trap_synd1::W`](W) writer structure"] +impl crate::Writable for RamTrapSynd1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RAM_TRAP_SYND1 to value 0"] -impl crate::Resettable for RAM_TRAP_SYND1_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for RamTrapSynd1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/utility/rom_trap_address.rs b/va416xx/src/utility/rom_trap_address.rs index f421ddc..722dc0c 100644 --- a/va416xx/src/utility/rom_trap_address.rs +++ b/va416xx/src/utility/rom_trap_address.rs @@ -1,150 +1,55 @@ #[doc = "Register `ROM_TRAP_ADDRESS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ROM_TRAP_ADDRESS` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `ENABLE` reader - Enable Trap mode"] -pub struct ENABLE_R(crate::FieldReader); -impl ENABLE_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - ENABLE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ENABLE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `ENABLE` writer - Enable Trap mode"] -pub struct ENABLE_W<'a> { - w: &'a mut W, -} -impl<'a> ENABLE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 31)) | ((value as u32 & 0x01) << 31); - self.w - } -} +pub type W = crate::W; #[doc = "Field `ADDR` reader - Address bits for trap match"] -pub struct ADDR_R(crate::FieldReader); -impl ADDR_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - ADDR_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ADDR_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type AddrR = crate::FieldReader; #[doc = "Field `ADDR` writer - Address bits for trap match"] -pub struct ADDR_W<'a> { - w: &'a mut W, -} -impl<'a> ADDR_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x1fff_ffff << 2)) | ((value as u32 & 0x1fff_ffff) << 2); - self.w - } -} +pub type AddrW<'a, REG> = crate::FieldWriter<'a, REG, 29, u32>; +#[doc = "Field `ENABLE` reader - Enable Trap mode"] +pub type EnableR = crate::BitReader; +#[doc = "Field `ENABLE` writer - Enable Trap mode"] +pub type EnableW<'a, REG> = crate::BitWriter<'a, REG>; impl R { - #[doc = "Bit 31 - Enable Trap mode"] - #[inline(always)] - pub fn enable(&self) -> ENABLE_R { - ENABLE_R::new(((self.bits >> 31) & 0x01) != 0) - } #[doc = "Bits 2:30 - Address bits for trap match"] #[inline(always)] - pub fn addr(&self) -> ADDR_R { - ADDR_R::new(((self.bits >> 2) & 0x1fff_ffff) as u32) + pub fn addr(&self) -> AddrR { + AddrR::new((self.bits >> 2) & 0x1fff_ffff) + } + #[doc = "Bit 31 - Enable Trap mode"] + #[inline(always)] + pub fn enable(&self) -> EnableR { + EnableR::new(((self.bits >> 31) & 1) != 0) } } impl W { - #[doc = "Bit 31 - Enable Trap mode"] - #[inline(always)] - pub fn enable(&mut self) -> ENABLE_W { - ENABLE_W { w: self } - } #[doc = "Bits 2:30 - Address bits for trap match"] #[inline(always)] - pub fn addr(&mut self) -> ADDR_W { - ADDR_W { w: self } + #[must_use] + pub fn addr(&mut self) -> AddrW { + AddrW::new(self, 2) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bit 31 - Enable Trap mode"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn enable(&mut self) -> EnableW { + EnableW::new(self, 31) } } -#[doc = "ROM EDAC Trap Address\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rom_trap_address](index.html) module"] -pub struct ROM_TRAP_ADDRESS_SPEC; -impl crate::RegisterSpec for ROM_TRAP_ADDRESS_SPEC { +#[doc = "ROM EDAC Trap Address\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rom_trap_address::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rom_trap_address::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RomTrapAddressSpec; +impl crate::RegisterSpec for RomTrapAddressSpec { type Ux = u32; } -#[doc = "`read()` method returns [rom_trap_address::R](R) reader structure"] -impl crate::Readable for ROM_TRAP_ADDRESS_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [rom_trap_address::W](W) writer structure"] -impl crate::Writable for ROM_TRAP_ADDRESS_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`rom_trap_address::R`](R) reader structure"] +impl crate::Readable for RomTrapAddressSpec {} +#[doc = "`write(|w| ..)` method takes [`rom_trap_address::W`](W) writer structure"] +impl crate::Writable for RomTrapAddressSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ROM_TRAP_ADDRESS to value 0"] -impl crate::Resettable for ROM_TRAP_ADDRESS_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for RomTrapAddressSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/utility/rom_trap_synd.rs b/va416xx/src/utility/rom_trap_synd.rs index 5942cfa..81faf4e 100644 --- a/va416xx/src/utility/rom_trap_synd.rs +++ b/va416xx/src/utility/rom_trap_synd.rs @@ -1,140 +1,55 @@ #[doc = "Register `ROM_TRAP_SYND` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ROM_TRAP_SYND` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `R0M_SYND_31_16` reader - 6-bit syndrome value for bits 31-16"] -pub struct R0M_SYND_31_16_R(crate::FieldReader); -impl R0M_SYND_31_16_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - R0M_SYND_31_16_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for R0M_SYND_31_16_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `R0M_SYND_31_16` writer - 6-bit syndrome value for bits 31-16"] -pub struct R0M_SYND_31_16_W<'a> { - w: &'a mut W, -} -impl<'a> R0M_SYND_31_16_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x3f << 6)) | ((value as u32 & 0x3f) << 6); - self.w - } -} +pub type W = crate::W; #[doc = "Field `ROM_SYND_7_0` reader - 6-bit syndrome value for bits 15-0"] -pub struct ROM_SYND_7_0_R(crate::FieldReader); -impl ROM_SYND_7_0_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - ROM_SYND_7_0_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for ROM_SYND_7_0_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type RomSynd7_0R = crate::FieldReader; #[doc = "Field `ROM_SYND_7_0` writer - 6-bit syndrome value for bits 15-0"] -pub struct ROM_SYND_7_0_W<'a> { - w: &'a mut W, -} -impl<'a> ROM_SYND_7_0_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0x3f) | (value as u32 & 0x3f); - self.w - } -} +pub type RomSynd7_0W<'a, REG> = crate::FieldWriter<'a, REG, 6>; +#[doc = "Field `R0M_SYND_31_16` reader - 6-bit syndrome value for bits 31-16"] +pub type R0mSynd31_16R = crate::FieldReader; +#[doc = "Field `R0M_SYND_31_16` writer - 6-bit syndrome value for bits 31-16"] +pub type R0mSynd31_16W<'a, REG> = crate::FieldWriter<'a, REG, 6>; impl R { - #[doc = "Bits 6:11 - 6-bit syndrome value for bits 31-16"] - #[inline(always)] - pub fn r0m_synd_31_16(&self) -> R0M_SYND_31_16_R { - R0M_SYND_31_16_R::new(((self.bits >> 6) & 0x3f) as u8) - } #[doc = "Bits 0:5 - 6-bit syndrome value for bits 15-0"] #[inline(always)] - pub fn rom_synd_7_0(&self) -> ROM_SYND_7_0_R { - ROM_SYND_7_0_R::new((self.bits & 0x3f) as u8) + pub fn rom_synd_7_0(&self) -> RomSynd7_0R { + RomSynd7_0R::new((self.bits & 0x3f) as u8) + } + #[doc = "Bits 6:11 - 6-bit syndrome value for bits 31-16"] + #[inline(always)] + pub fn r0m_synd_31_16(&self) -> R0mSynd31_16R { + R0mSynd31_16R::new(((self.bits >> 6) & 0x3f) as u8) } } impl W { - #[doc = "Bits 6:11 - 6-bit syndrome value for bits 31-16"] - #[inline(always)] - pub fn r0m_synd_31_16(&mut self) -> R0M_SYND_31_16_W { - R0M_SYND_31_16_W { w: self } - } #[doc = "Bits 0:5 - 6-bit syndrome value for bits 15-0"] #[inline(always)] - pub fn rom_synd_7_0(&mut self) -> ROM_SYND_7_0_W { - ROM_SYND_7_0_W { w: self } + #[must_use] + pub fn rom_synd_7_0(&mut self) -> RomSynd7_0W { + RomSynd7_0W::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 6:11 - 6-bit syndrome value for bits 31-16"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn r0m_synd_31_16(&mut self) -> R0mSynd31_16W { + R0mSynd31_16W::new(self, 6) } } -#[doc = "ROM EDAC Trap Syndrome\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rom_trap_synd](index.html) module"] -pub struct ROM_TRAP_SYND_SPEC; -impl crate::RegisterSpec for ROM_TRAP_SYND_SPEC { +#[doc = "ROM EDAC Trap Syndrome\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rom_trap_synd::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rom_trap_synd::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RomTrapSyndSpec; +impl crate::RegisterSpec for RomTrapSyndSpec { type Ux = u32; } -#[doc = "`read()` method returns [rom_trap_synd::R](R) reader structure"] -impl crate::Readable for ROM_TRAP_SYND_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [rom_trap_synd::W](W) writer structure"] -impl crate::Writable for ROM_TRAP_SYND_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`rom_trap_synd::R`](R) reader structure"] +impl crate::Readable for RomTrapSyndSpec {} +#[doc = "`write(|w| ..)` method takes [`rom_trap_synd::W`](W) writer structure"] +impl crate::Writable for RomTrapSyndSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ROM_TRAP_SYND to value 0"] -impl crate::Resettable for ROM_TRAP_SYND_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for RomTrapSyndSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/utility/synd_check_32_44_data.rs b/va416xx/src/utility/synd_check_32_44_data.rs index 78ef7ef..0adfd8b 100644 --- a/va416xx/src/utility/synd_check_32_44_data.rs +++ b/va416xx/src/utility/synd_check_32_44_data.rs @@ -1,31 +1,18 @@ #[doc = "Register `SYND_CHECK_32_44_DATA` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 +pub type R = crate::R; +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) } } -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "EDAC Decode Data\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [synd_check_32_44_data](index.html) module"] -pub struct SYND_CHECK_32_44_DATA_SPEC; -impl crate::RegisterSpec for SYND_CHECK_32_44_DATA_SPEC { +#[doc = "EDAC Decode Data\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`synd_check_32_44_data::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SyndCheck32_44DataSpec; +impl crate::RegisterSpec for SyndCheck32_44DataSpec { type Ux = u32; } -#[doc = "`read()` method returns [synd_check_32_44_data::R](R) reader structure"] -impl crate::Readable for SYND_CHECK_32_44_DATA_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`synd_check_32_44_data::R`](R) reader structure"] +impl crate::Readable for SyndCheck32_44DataSpec {} #[doc = "`reset()` method sets SYND_CHECK_32_44_DATA to value 0"] -impl crate::Resettable for SYND_CHECK_32_44_DATA_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for SyndCheck32_44DataSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/utility/synd_check_32_44_synd.rs b/va416xx/src/utility/synd_check_32_44_synd.rs index db8d32a..a0d7f6b 100644 --- a/va416xx/src/utility/synd_check_32_44_synd.rs +++ b/va416xx/src/utility/synd_check_32_44_synd.rs @@ -1,93 +1,36 @@ #[doc = "Register `SYND_CHECK_32_44_SYND` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Field `MBE` reader - Multiple bit error detect status"] -pub struct MBE_R(crate::FieldReader); -impl MBE_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - MBE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for MBE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `SBE` reader - Single bit error detect status"] -pub struct SBE_R(crate::FieldReader); -impl SBE_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - SBE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for SBE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type R = crate::R; #[doc = "Field `SYND_CHECK_32_44_SYND` reader - Correct syndrome value"] -pub struct SYND_CHECK_32_44_SYND_R(crate::FieldReader); -impl SYND_CHECK_32_44_SYND_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - SYND_CHECK_32_44_SYND_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for SYND_CHECK_32_44_SYND_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type SyndCheck32_44SyndR = crate::FieldReader; +#[doc = "Field `SBE` reader - Single bit error detect status"] +pub type SbeR = crate::FieldReader; +#[doc = "Field `MBE` reader - Multiple bit error detect status"] +pub type MbeR = crate::FieldReader; impl R { - #[doc = "Bits 14:15 - Multiple bit error detect status"] + #[doc = "Bits 0:11 - Correct syndrome value"] #[inline(always)] - pub fn mbe(&self) -> MBE_R { - MBE_R::new(((self.bits >> 14) & 0x03) as u8) + pub fn synd_check_32_44_synd(&self) -> SyndCheck32_44SyndR { + SyndCheck32_44SyndR::new((self.bits & 0x0fff) as u16) } #[doc = "Bits 12:13 - Single bit error detect status"] #[inline(always)] - pub fn sbe(&self) -> SBE_R { - SBE_R::new(((self.bits >> 12) & 0x03) as u8) + pub fn sbe(&self) -> SbeR { + SbeR::new(((self.bits >> 12) & 3) as u8) } - #[doc = "Bits 0:11 - Correct syndrome value"] + #[doc = "Bits 14:15 - Multiple bit error detect status"] #[inline(always)] - pub fn synd_check_32_44_synd(&self) -> SYND_CHECK_32_44_SYND_R { - SYND_CHECK_32_44_SYND_R::new((self.bits & 0x0fff) as u16) + pub fn mbe(&self) -> MbeR { + MbeR::new(((self.bits >> 14) & 3) as u8) } } -#[doc = "EDAC Decode Syndrome\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [synd_check_32_44_synd](index.html) module"] -pub struct SYND_CHECK_32_44_SYND_SPEC; -impl crate::RegisterSpec for SYND_CHECK_32_44_SYND_SPEC { +#[doc = "EDAC Decode Syndrome\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`synd_check_32_44_synd::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SyndCheck32_44SyndSpec; +impl crate::RegisterSpec for SyndCheck32_44SyndSpec { type Ux = u32; } -#[doc = "`read()` method returns [synd_check_32_44_synd::R](R) reader structure"] -impl crate::Readable for SYND_CHECK_32_44_SYND_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`synd_check_32_44_synd::R`](R) reader structure"] +impl crate::Readable for SyndCheck32_44SyndSpec {} #[doc = "`reset()` method sets SYND_CHECK_32_44_SYND to value 0"] -impl crate::Resettable for SYND_CHECK_32_44_SYND_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for SyndCheck32_44SyndSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/utility/synd_check_32_52_data.rs b/va416xx/src/utility/synd_check_32_52_data.rs index 6801468..df77cde 100644 --- a/va416xx/src/utility/synd_check_32_52_data.rs +++ b/va416xx/src/utility/synd_check_32_52_data.rs @@ -1,31 +1,18 @@ #[doc = "Register `SYND_CHECK_32_52_DATA` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 +pub type R = crate::R; +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) } } -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "EDAC Decode Data\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [synd_check_32_52_data](index.html) module"] -pub struct SYND_CHECK_32_52_DATA_SPEC; -impl crate::RegisterSpec for SYND_CHECK_32_52_DATA_SPEC { +#[doc = "EDAC Decode Data\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`synd_check_32_52_data::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SyndCheck32_52DataSpec; +impl crate::RegisterSpec for SyndCheck32_52DataSpec { type Ux = u32; } -#[doc = "`read()` method returns [synd_check_32_52_data::R](R) reader structure"] -impl crate::Readable for SYND_CHECK_32_52_DATA_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`synd_check_32_52_data::R`](R) reader structure"] +impl crate::Readable for SyndCheck32_52DataSpec {} #[doc = "`reset()` method sets SYND_CHECK_32_52_DATA to value 0"] -impl crate::Resettable for SYND_CHECK_32_52_DATA_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for SyndCheck32_52DataSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/utility/synd_check_32_52_synd.rs b/va416xx/src/utility/synd_check_32_52_synd.rs index 50623f3..55fea27 100644 --- a/va416xx/src/utility/synd_check_32_52_synd.rs +++ b/va416xx/src/utility/synd_check_32_52_synd.rs @@ -1,93 +1,36 @@ #[doc = "Register `SYND_CHECK_32_52_SYND` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Field `MBE` reader - Multiple bit error detect status"] -pub struct MBE_R(crate::FieldReader); -impl MBE_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - MBE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for MBE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `SBE` reader - Single bit error detect status"] -pub struct SBE_R(crate::FieldReader); -impl SBE_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - SBE_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for SBE_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type R = crate::R; #[doc = "Field `SYND_CHECK_32_52_SYND` reader - Corrected syndrome value"] -pub struct SYND_CHECK_32_52_SYND_R(crate::FieldReader); -impl SYND_CHECK_32_52_SYND_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - SYND_CHECK_32_52_SYND_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for SYND_CHECK_32_52_SYND_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type SyndCheck32_52SyndR = crate::FieldReader; +#[doc = "Field `SBE` reader - Single bit error detect status"] +pub type SbeR = crate::FieldReader; +#[doc = "Field `MBE` reader - Multiple bit error detect status"] +pub type MbeR = crate::FieldReader; impl R { - #[doc = "Bits 28:31 - Multiple bit error detect status"] + #[doc = "Bits 0:19 - Corrected syndrome value"] #[inline(always)] - pub fn mbe(&self) -> MBE_R { - MBE_R::new(((self.bits >> 28) & 0x0f) as u8) + pub fn synd_check_32_52_synd(&self) -> SyndCheck32_52SyndR { + SyndCheck32_52SyndR::new(self.bits & 0x000f_ffff) } #[doc = "Bits 24:27 - Single bit error detect status"] #[inline(always)] - pub fn sbe(&self) -> SBE_R { - SBE_R::new(((self.bits >> 24) & 0x0f) as u8) + pub fn sbe(&self) -> SbeR { + SbeR::new(((self.bits >> 24) & 0x0f) as u8) } - #[doc = "Bits 0:19 - Corrected syndrome value"] + #[doc = "Bits 28:31 - Multiple bit error detect status"] #[inline(always)] - pub fn synd_check_32_52_synd(&self) -> SYND_CHECK_32_52_SYND_R { - SYND_CHECK_32_52_SYND_R::new((self.bits & 0x000f_ffff) as u32) + pub fn mbe(&self) -> MbeR { + MbeR::new(((self.bits >> 28) & 0x0f) as u8) } } -#[doc = "EDAC Decode Syndrome\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [synd_check_32_52_synd](index.html) module"] -pub struct SYND_CHECK_32_52_SYND_SPEC; -impl crate::RegisterSpec for SYND_CHECK_32_52_SYND_SPEC { +#[doc = "EDAC Decode Syndrome\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`synd_check_32_52_synd::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SyndCheck32_52SyndSpec; +impl crate::RegisterSpec for SyndCheck32_52SyndSpec { type Ux = u32; } -#[doc = "`read()` method returns [synd_check_32_52_synd::R](R) reader structure"] -impl crate::Readable for SYND_CHECK_32_52_SYND_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`synd_check_32_52_synd::R`](R) reader structure"] +impl crate::Readable for SyndCheck32_52SyndSpec {} #[doc = "`reset()` method sets SYND_CHECK_32_52_SYND to value 0"] -impl crate::Resettable for SYND_CHECK_32_52_SYND_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for SyndCheck32_52SyndSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/utility/synd_data.rs b/va416xx/src/utility/synd_data.rs index 8d7c93f..044ed82 100644 --- a/va416xx/src/utility/synd_data.rs +++ b/va416xx/src/utility/synd_data.rs @@ -1,64 +1,27 @@ #[doc = "Register `SYND_DATA` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SYND_DATA` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 +pub type W = crate::W; +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) } } -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -impl W { - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "Data Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [synd_data](index.html) module"] -pub struct SYND_DATA_SPEC; -impl crate::RegisterSpec for SYND_DATA_SPEC { +impl W {} +#[doc = "Data Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`synd_data::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`synd_data::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SyndDataSpec; +impl crate::RegisterSpec for SyndDataSpec { type Ux = u32; } -#[doc = "`read()` method returns [synd_data::R](R) reader structure"] -impl crate::Readable for SYND_DATA_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [synd_data::W](W) writer structure"] -impl crate::Writable for SYND_DATA_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`synd_data::R`](R) reader structure"] +impl crate::Readable for SyndDataSpec {} +#[doc = "`write(|w| ..)` method takes [`synd_data::W`](W) writer structure"] +impl crate::Writable for SyndDataSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SYND_DATA to value 0"] -impl crate::Resettable for SYND_DATA_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for SyndDataSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/utility/synd_enc_32_44.rs b/va416xx/src/utility/synd_enc_32_44.rs index b09459d..adc5116 100644 --- a/va416xx/src/utility/synd_enc_32_44.rs +++ b/va416xx/src/utility/synd_enc_32_44.rs @@ -1,140 +1,55 @@ #[doc = "Register `SYND_ENC_32_44` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SYND_ENC_32_44` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `SYND_ENC_31_16` reader - Computed syndrome value for bits 31-16"] -pub struct SYND_ENC_31_16_R(crate::FieldReader); -impl SYND_ENC_31_16_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - SYND_ENC_31_16_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for SYND_ENC_31_16_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `SYND_ENC_31_16` writer - Computed syndrome value for bits 31-16"] -pub struct SYND_ENC_31_16_W<'a> { - w: &'a mut W, -} -impl<'a> SYND_ENC_31_16_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x3f << 6)) | ((value as u32 & 0x3f) << 6); - self.w - } -} +pub type W = crate::W; #[doc = "Field `SYND_ENC_7_0` reader - Computed syndrome value for bits 15-0"] -pub struct SYND_ENC_7_0_R(crate::FieldReader); -impl SYND_ENC_7_0_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - SYND_ENC_7_0_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for SYND_ENC_7_0_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type SyndEnc7_0R = crate::FieldReader; #[doc = "Field `SYND_ENC_7_0` writer - Computed syndrome value for bits 15-0"] -pub struct SYND_ENC_7_0_W<'a> { - w: &'a mut W, -} -impl<'a> SYND_ENC_7_0_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0x3f) | (value as u32 & 0x3f); - self.w - } -} +pub type SyndEnc7_0W<'a, REG> = crate::FieldWriter<'a, REG, 6>; +#[doc = "Field `SYND_ENC_31_16` reader - Computed syndrome value for bits 31-16"] +pub type SyndEnc31_16R = crate::FieldReader; +#[doc = "Field `SYND_ENC_31_16` writer - Computed syndrome value for bits 31-16"] +pub type SyndEnc31_16W<'a, REG> = crate::FieldWriter<'a, REG, 6>; impl R { - #[doc = "Bits 6:11 - Computed syndrome value for bits 31-16"] - #[inline(always)] - pub fn synd_enc_31_16(&self) -> SYND_ENC_31_16_R { - SYND_ENC_31_16_R::new(((self.bits >> 6) & 0x3f) as u8) - } #[doc = "Bits 0:5 - Computed syndrome value for bits 15-0"] #[inline(always)] - pub fn synd_enc_7_0(&self) -> SYND_ENC_7_0_R { - SYND_ENC_7_0_R::new((self.bits & 0x3f) as u8) + pub fn synd_enc_7_0(&self) -> SyndEnc7_0R { + SyndEnc7_0R::new((self.bits & 0x3f) as u8) + } + #[doc = "Bits 6:11 - Computed syndrome value for bits 31-16"] + #[inline(always)] + pub fn synd_enc_31_16(&self) -> SyndEnc31_16R { + SyndEnc31_16R::new(((self.bits >> 6) & 0x3f) as u8) } } impl W { - #[doc = "Bits 6:11 - Computed syndrome value for bits 31-16"] - #[inline(always)] - pub fn synd_enc_31_16(&mut self) -> SYND_ENC_31_16_W { - SYND_ENC_31_16_W { w: self } - } #[doc = "Bits 0:5 - Computed syndrome value for bits 15-0"] #[inline(always)] - pub fn synd_enc_7_0(&mut self) -> SYND_ENC_7_0_W { - SYND_ENC_7_0_W { w: self } + #[must_use] + pub fn synd_enc_7_0(&mut self) -> SyndEnc7_0W { + SyndEnc7_0W::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bits 6:11 - Computed syndrome value for bits 31-16"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn synd_enc_31_16(&mut self) -> SyndEnc31_16W { + SyndEnc31_16W::new(self, 6) } } -#[doc = "EDAC Encode\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [synd_enc_32_44](index.html) module"] -pub struct SYND_ENC_32_44_SPEC; -impl crate::RegisterSpec for SYND_ENC_32_44_SPEC { +#[doc = "EDAC Encode\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`synd_enc_32_44::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`synd_enc_32_44::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SyndEnc32_44Spec; +impl crate::RegisterSpec for SyndEnc32_44Spec { type Ux = u32; } -#[doc = "`read()` method returns [synd_enc_32_44::R](R) reader structure"] -impl crate::Readable for SYND_ENC_32_44_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [synd_enc_32_44::W](W) writer structure"] -impl crate::Writable for SYND_ENC_32_44_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`synd_enc_32_44::R`](R) reader structure"] +impl crate::Readable for SyndEnc32_44Spec {} +#[doc = "`write(|w| ..)` method takes [`synd_enc_32_44::W`](W) writer structure"] +impl crate::Writable for SyndEnc32_44Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SYND_ENC_32_44 to value 0"] -impl crate::Resettable for SYND_ENC_32_44_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for SyndEnc32_44Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/utility/synd_enc_32_52.rs b/va416xx/src/utility/synd_enc_32_52.rs index 4efbd77..a8abc21 100644 --- a/va416xx/src/utility/synd_enc_32_52.rs +++ b/va416xx/src/utility/synd_enc_32_52.rs @@ -1,53 +1,22 @@ #[doc = "Register `SYND_ENC_32_52` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `SYND_ENC_32_52` reader - Computed syndrome value for bits 15-0"] -pub struct SYND_ENC_32_52_R(crate::FieldReader); -impl SYND_ENC_32_52_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - SYND_ENC_32_52_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for SYND_ENC_32_52_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type SyndEnc32_52R = crate::FieldReader; impl R { #[doc = "Bits 0:19 - Computed syndrome value for bits 15-0"] #[inline(always)] - pub fn synd_enc_32_52(&self) -> SYND_ENC_32_52_R { - SYND_ENC_32_52_R::new((self.bits & 0x000f_ffff) as u32) + pub fn synd_enc_32_52(&self) -> SyndEnc32_52R { + SyndEnc32_52R::new(self.bits & 0x000f_ffff) } } -#[doc = "EDAC Encode\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [synd_enc_32_52](index.html) module"] -pub struct SYND_ENC_32_52_SPEC; -impl crate::RegisterSpec for SYND_ENC_32_52_SPEC { +#[doc = "EDAC Encode\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`synd_enc_32_52::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SyndEnc32_52Spec; +impl crate::RegisterSpec for SyndEnc32_52Spec { type Ux = u32; } -#[doc = "`read()` method returns [synd_enc_32_52::R](R) reader structure"] -impl crate::Readable for SYND_ENC_32_52_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`synd_enc_32_52::R`](R) reader structure"] +impl crate::Readable for SyndEnc32_52Spec {} #[doc = "`reset()` method sets SYND_ENC_32_52 to value 0"] -impl crate::Resettable for SYND_ENC_32_52_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for SyndEnc32_52Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/utility/synd_synd.rs b/va416xx/src/utility/synd_synd.rs index d4a240f..be106b1 100644 --- a/va416xx/src/utility/synd_synd.rs +++ b/va416xx/src/utility/synd_synd.rs @@ -1,103 +1,40 @@ #[doc = "Register `SYND_SYND` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SYND_SYND` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SYND_SYND` reader - Provides bits 11:0 for syndrome, 2x6-bit"] -pub struct SYND_SYND_R(crate::FieldReader); -impl SYND_SYND_R { - #[inline(always)] - pub(crate) fn new(bits: u16) -> Self { - SYND_SYND_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for SYND_SYND_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type SyndSyndR = crate::FieldReader; #[doc = "Field `SYND_SYND` writer - Provides bits 11:0 for syndrome, 2x6-bit"] -pub struct SYND_SYND_W<'a> { - w: &'a mut W, -} -impl<'a> SYND_SYND_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !0x0fff) | (value as u32 & 0x0fff); - self.w - } -} +pub type SyndSyndW<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; impl R { #[doc = "Bits 0:11 - Provides bits 11:0 for syndrome, 2x6-bit"] #[inline(always)] - pub fn synd_synd(&self) -> SYND_SYND_R { - SYND_SYND_R::new((self.bits & 0x0fff) as u16) + pub fn synd_synd(&self) -> SyndSyndR { + SyndSyndR::new((self.bits & 0x0fff) as u16) } } impl W { #[doc = "Bits 0:11 - Provides bits 11:0 for syndrome, 2x6-bit"] #[inline(always)] - pub fn synd_synd(&mut self) -> SYND_SYND_W { - SYND_SYND_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn synd_synd(&mut self) -> SyndSyndW { + SyndSyndW::new(self, 0) } } -#[doc = "Syndrome Data Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [synd_synd](index.html) module"] -pub struct SYND_SYND_SPEC; -impl crate::RegisterSpec for SYND_SYND_SPEC { +#[doc = "Syndrome Data Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`synd_synd::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`synd_synd::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SyndSyndSpec; +impl crate::RegisterSpec for SyndSyndSpec { type Ux = u32; } -#[doc = "`read()` method returns [synd_synd::R](R) reader structure"] -impl crate::Readable for SYND_SYND_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [synd_synd::W](W) writer structure"] -impl crate::Writable for SYND_SYND_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`synd_synd::R`](R) reader structure"] +impl crate::Readable for SyndSyndSpec {} +#[doc = "`write(|w| ..)` method takes [`synd_synd::W`](W) writer structure"] +impl crate::Writable for SyndSyndSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SYND_SYND to value 0"] -impl crate::Resettable for SYND_SYND_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for SyndSyndSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/watch_dog.rs b/va416xx/src/watch_dog.rs index 67eddd5..2ec0e75 100644 --- a/va416xx/src/watch_dog.rs +++ b/va416xx/src/watch_dog.rs @@ -1,109 +1,213 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - #[doc = "0x00 - Counter Start Value"] - pub wdogload: crate::Reg, - #[doc = "0x04 - Down Counter Value"] - pub wdogvalue: crate::Reg, - #[doc = "0x08 - Enable for block reset and interrupt"] - pub wdogcontrol: crate::Reg, - #[doc = "0x0c - A write of any value clears the WDT module interrupt, and reloads the counter from the value in the WDOGLOAD Register"] - pub wdogintclr: crate::Reg, - #[doc = "0x10 - Raw interrupt status"] - pub wdogris: crate::Reg, - #[doc = "0x14 - Interrupt status"] - pub wdogmis: crate::Reg, + wdogload: Wdogload, + wdogvalue: Wdogvalue, + wdogcontrol: Wdogcontrol, + wdogintclr: Wdogintclr, + wdogris: Wdogris, + wdogmis: Wdogmis, _reserved6: [u8; 0xa8], - #[doc = "0xc0 - Lock"] - pub wdoglock: crate::Reg, + wdoglock: Wdoglock, _reserved7: [u8; 0x0e3c], - #[doc = "0xf00 - Integration test control"] - pub wdogitcr: crate::Reg, - #[doc = "0xf04 - Integration test output set"] - pub wdogitop: crate::Reg, + wdogitcr: Wdogitcr, + wdogitop: Wdogitop, _reserved9: [u8; 0xd8], - #[doc = "0xfe0 - Peripheral ID"] - pub wdogperiphid0: crate::Reg, - #[doc = "0xfe4 - Peripheral ID"] - pub wdogperiphid1: crate::Reg, - #[doc = "0xfe8 - Peripheral ID"] - pub wdogperiphid2: crate::Reg, - #[doc = "0xfec - Peripheral ID"] - pub wdogperiphid3: crate::Reg, - #[doc = "0xff0 - PrimeCell ID"] - pub wdogpcellid0: crate::Reg, - #[doc = "0xff4 - PrimeCell ID"] - pub wdogpcellid1: crate::Reg, - #[doc = "0xff8 - PrimeCell ID"] - pub wdogpcellid2: crate::Reg, - #[doc = "0xffc - PrimeCell ID"] - pub wdogpcellid3: crate::Reg, + wdogperiphid0: Wdogperiphid0, + wdogperiphid1: Wdogperiphid1, + wdogperiphid2: Wdogperiphid2, + wdogperiphid3: Wdogperiphid3, + wdogpcellid0: Wdogpcellid0, + wdogpcellid1: Wdogpcellid1, + wdogpcellid2: Wdogpcellid2, + wdogpcellid3: Wdogpcellid3, } -#[doc = "WDOGLOAD register accessor: an alias for `Reg`"] -pub type WDOGLOAD = crate::Reg; +impl RegisterBlock { + #[doc = "0x00 - Counter Start Value"] + #[inline(always)] + pub const fn wdogload(&self) -> &Wdogload { + &self.wdogload + } + #[doc = "0x04 - Down Counter Value"] + #[inline(always)] + pub const fn wdogvalue(&self) -> &Wdogvalue { + &self.wdogvalue + } + #[doc = "0x08 - Enable for block reset and interrupt"] + #[inline(always)] + pub const fn wdogcontrol(&self) -> &Wdogcontrol { + &self.wdogcontrol + } + #[doc = "0x0c - A write of any value clears the WDT module interrupt, and reloads the counter from the value in the WDOGLOAD Register"] + #[inline(always)] + pub const fn wdogintclr(&self) -> &Wdogintclr { + &self.wdogintclr + } + #[doc = "0x10 - Raw interrupt status"] + #[inline(always)] + pub const fn wdogris(&self) -> &Wdogris { + &self.wdogris + } + #[doc = "0x14 - Interrupt status"] + #[inline(always)] + pub const fn wdogmis(&self) -> &Wdogmis { + &self.wdogmis + } + #[doc = "0xc0 - Lock"] + #[inline(always)] + pub const fn wdoglock(&self) -> &Wdoglock { + &self.wdoglock + } + #[doc = "0xf00 - Integration test control"] + #[inline(always)] + pub const fn wdogitcr(&self) -> &Wdogitcr { + &self.wdogitcr + } + #[doc = "0xf04 - Integration test output set"] + #[inline(always)] + pub const fn wdogitop(&self) -> &Wdogitop { + &self.wdogitop + } + #[doc = "0xfe0 - Peripheral ID"] + #[inline(always)] + pub const fn wdogperiphid0(&self) -> &Wdogperiphid0 { + &self.wdogperiphid0 + } + #[doc = "0xfe4 - Peripheral ID"] + #[inline(always)] + pub const fn wdogperiphid1(&self) -> &Wdogperiphid1 { + &self.wdogperiphid1 + } + #[doc = "0xfe8 - Peripheral ID"] + #[inline(always)] + pub const fn wdogperiphid2(&self) -> &Wdogperiphid2 { + &self.wdogperiphid2 + } + #[doc = "0xfec - Peripheral ID"] + #[inline(always)] + pub const fn wdogperiphid3(&self) -> &Wdogperiphid3 { + &self.wdogperiphid3 + } + #[doc = "0xff0 - PrimeCell ID"] + #[inline(always)] + pub const fn wdogpcellid0(&self) -> &Wdogpcellid0 { + &self.wdogpcellid0 + } + #[doc = "0xff4 - PrimeCell ID"] + #[inline(always)] + pub const fn wdogpcellid1(&self) -> &Wdogpcellid1 { + &self.wdogpcellid1 + } + #[doc = "0xff8 - PrimeCell ID"] + #[inline(always)] + pub const fn wdogpcellid2(&self) -> &Wdogpcellid2 { + &self.wdogpcellid2 + } + #[doc = "0xffc - PrimeCell ID"] + #[inline(always)] + pub const fn wdogpcellid3(&self) -> &Wdogpcellid3 { + &self.wdogpcellid3 + } +} +#[doc = "WDOGLOAD (rw) register accessor: Counter Start Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdogload::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`wdogload::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdogload`] +module"] +#[doc(alias = "WDOGLOAD")] +pub type Wdogload = crate::Reg; #[doc = "Counter Start Value"] pub mod wdogload; -#[doc = "WDOGVALUE register accessor: an alias for `Reg`"] -pub type WDOGVALUE = crate::Reg; +#[doc = "WDOGVALUE (r) register accessor: Down Counter Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdogvalue::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdogvalue`] +module"] +#[doc(alias = "WDOGVALUE")] +pub type Wdogvalue = crate::Reg; #[doc = "Down Counter Value"] pub mod wdogvalue; -#[doc = "WDOGCONTROL register accessor: an alias for `Reg`"] -pub type WDOGCONTROL = crate::Reg; +#[doc = "WDOGCONTROL (rw) register accessor: Enable for block reset and interrupt\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdogcontrol::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`wdogcontrol::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdogcontrol`] +module"] +#[doc(alias = "WDOGCONTROL")] +pub type Wdogcontrol = crate::Reg; #[doc = "Enable for block reset and interrupt"] pub mod wdogcontrol; -#[doc = "WDOGINTCLR register accessor: an alias for `Reg`"] -pub type WDOGINTCLR = crate::Reg; +#[doc = "WDOGINTCLR (rw) register accessor: A write of any value clears the WDT module interrupt, and reloads the counter from the value in the WDOGLOAD Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdogintclr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`wdogintclr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdogintclr`] +module"] +#[doc(alias = "WDOGINTCLR")] +pub type Wdogintclr = crate::Reg; #[doc = "A write of any value clears the WDT module interrupt, and reloads the counter from the value in the WDOGLOAD Register"] pub mod wdogintclr; -#[doc = "WDOGRIS register accessor: an alias for `Reg`"] -pub type WDOGRIS = crate::Reg; +#[doc = "WDOGRIS (r) register accessor: Raw interrupt status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdogris::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdogris`] +module"] +#[doc(alias = "WDOGRIS")] +pub type Wdogris = crate::Reg; #[doc = "Raw interrupt status"] pub mod wdogris; -#[doc = "WDOGMIS register accessor: an alias for `Reg`"] -pub type WDOGMIS = crate::Reg; +#[doc = "WDOGMIS (r) register accessor: Interrupt status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdogmis::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdogmis`] +module"] +#[doc(alias = "WDOGMIS")] +pub type Wdogmis = crate::Reg; #[doc = "Interrupt status"] pub mod wdogmis; -#[doc = "WDOGLOCK register accessor: an alias for `Reg`"] -pub type WDOGLOCK = crate::Reg; +#[doc = "WDOGLOCK (rw) register accessor: Lock\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdoglock::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`wdoglock::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdoglock`] +module"] +#[doc(alias = "WDOGLOCK")] +pub type Wdoglock = crate::Reg; #[doc = "Lock"] pub mod wdoglock; -#[doc = "WDOGITCR register accessor: an alias for `Reg`"] -pub type WDOGITCR = crate::Reg; +#[doc = "WDOGITCR (rw) register accessor: Integration test control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdogitcr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`wdogitcr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdogitcr`] +module"] +#[doc(alias = "WDOGITCR")] +pub type Wdogitcr = crate::Reg; #[doc = "Integration test control"] pub mod wdogitcr; -#[doc = "WDOGITOP register accessor: an alias for `Reg`"] -pub type WDOGITOP = crate::Reg; +#[doc = "WDOGITOP (rw) register accessor: Integration test output set\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdogitop::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`wdogitop::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdogitop`] +module"] +#[doc(alias = "WDOGITOP")] +pub type Wdogitop = crate::Reg; #[doc = "Integration test output set"] pub mod wdogitop; -#[doc = "WDOGPERIPHID0 register accessor: an alias for `Reg`"] -pub type WDOGPERIPHID0 = crate::Reg; +#[doc = "WDOGPERIPHID0 (r) register accessor: Peripheral ID\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdogperiphid0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdogperiphid0`] +module"] +#[doc(alias = "WDOGPERIPHID0")] +pub type Wdogperiphid0 = crate::Reg; #[doc = "Peripheral ID"] pub mod wdogperiphid0; -#[doc = "WDOGPERIPHID1 register accessor: an alias for `Reg`"] -pub type WDOGPERIPHID1 = crate::Reg; +#[doc = "WDOGPERIPHID1 (r) register accessor: Peripheral ID\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdogperiphid1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdogperiphid1`] +module"] +#[doc(alias = "WDOGPERIPHID1")] +pub type Wdogperiphid1 = crate::Reg; #[doc = "Peripheral ID"] pub mod wdogperiphid1; -#[doc = "WDOGPERIPHID2 register accessor: an alias for `Reg`"] -pub type WDOGPERIPHID2 = crate::Reg; +#[doc = "WDOGPERIPHID2 (r) register accessor: Peripheral ID\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdogperiphid2::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdogperiphid2`] +module"] +#[doc(alias = "WDOGPERIPHID2")] +pub type Wdogperiphid2 = crate::Reg; #[doc = "Peripheral ID"] pub mod wdogperiphid2; -#[doc = "WDOGPERIPHID3 register accessor: an alias for `Reg`"] -pub type WDOGPERIPHID3 = crate::Reg; +#[doc = "WDOGPERIPHID3 (r) register accessor: Peripheral ID\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdogperiphid3::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdogperiphid3`] +module"] +#[doc(alias = "WDOGPERIPHID3")] +pub type Wdogperiphid3 = crate::Reg; #[doc = "Peripheral ID"] pub mod wdogperiphid3; -#[doc = "WDOGPCELLID0 register accessor: an alias for `Reg`"] -pub type WDOGPCELLID0 = crate::Reg; +#[doc = "WDOGPCELLID0 (r) register accessor: PrimeCell ID\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdogpcellid0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdogpcellid0`] +module"] +#[doc(alias = "WDOGPCELLID0")] +pub type Wdogpcellid0 = crate::Reg; #[doc = "PrimeCell ID"] pub mod wdogpcellid0; -#[doc = "WDOGPCELLID1 register accessor: an alias for `Reg`"] -pub type WDOGPCELLID1 = crate::Reg; +#[doc = "WDOGPCELLID1 (r) register accessor: PrimeCell ID\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdogpcellid1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdogpcellid1`] +module"] +#[doc(alias = "WDOGPCELLID1")] +pub type Wdogpcellid1 = crate::Reg; #[doc = "PrimeCell ID"] pub mod wdogpcellid1; -#[doc = "WDOGPCELLID2 register accessor: an alias for `Reg`"] -pub type WDOGPCELLID2 = crate::Reg; +#[doc = "WDOGPCELLID2 (r) register accessor: PrimeCell ID\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdogpcellid2::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdogpcellid2`] +module"] +#[doc(alias = "WDOGPCELLID2")] +pub type Wdogpcellid2 = crate::Reg; #[doc = "PrimeCell ID"] pub mod wdogpcellid2; -#[doc = "WDOGPCELLID3 register accessor: an alias for `Reg`"] -pub type WDOGPCELLID3 = crate::Reg; +#[doc = "WDOGPCELLID3 (r) register accessor: PrimeCell ID\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdogpcellid3::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdogpcellid3`] +module"] +#[doc(alias = "WDOGPCELLID3")] +pub type Wdogpcellid3 = crate::Reg; #[doc = "PrimeCell ID"] pub mod wdogpcellid3; diff --git a/va416xx/src/watch_dog/wdogcontrol.rs b/va416xx/src/watch_dog/wdogcontrol.rs index b2a4b71..3749f4f 100644 --- a/va416xx/src/watch_dog/wdogcontrol.rs +++ b/va416xx/src/watch_dog/wdogcontrol.rs @@ -1,160 +1,55 @@ #[doc = "Register `WDOGCONTROL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `WDOGCONTROL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `RESEN` reader - Enable watchdog reset output"] -pub struct RESEN_R(crate::FieldReader); -impl RESEN_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - RESEN_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for RESEN_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `RESEN` writer - Enable watchdog reset output"] -pub struct RESEN_W<'a> { - w: &'a mut W, -} -impl<'a> RESEN_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); - self.w - } -} +pub type W = crate::W; #[doc = "Field `INTEN` reader - Enable watchdog interrupt"] -pub struct INTEN_R(crate::FieldReader); -impl INTEN_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - INTEN_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for INTEN_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type IntenR = crate::BitReader; #[doc = "Field `INTEN` writer - Enable watchdog interrupt"] -pub struct INTEN_W<'a> { - w: &'a mut W, -} -impl<'a> INTEN_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} +pub type IntenW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `RESEN` reader - Enable watchdog reset output"] +pub type ResenR = crate::BitReader; +#[doc = "Field `RESEN` writer - Enable watchdog reset output"] +pub type ResenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { - #[doc = "Bit 1 - Enable watchdog reset output"] - #[inline(always)] - pub fn resen(&self) -> RESEN_R { - RESEN_R::new(((self.bits >> 1) & 0x01) != 0) - } #[doc = "Bit 0 - Enable watchdog interrupt"] #[inline(always)] - pub fn inten(&self) -> INTEN_R { - INTEN_R::new((self.bits & 0x01) != 0) + pub fn inten(&self) -> IntenR { + IntenR::new((self.bits & 1) != 0) + } + #[doc = "Bit 1 - Enable watchdog reset output"] + #[inline(always)] + pub fn resen(&self) -> ResenR { + ResenR::new(((self.bits >> 1) & 1) != 0) } } impl W { - #[doc = "Bit 1 - Enable watchdog reset output"] - #[inline(always)] - pub fn resen(&mut self) -> RESEN_W { - RESEN_W { w: self } - } #[doc = "Bit 0 - Enable watchdog interrupt"] #[inline(always)] - pub fn inten(&mut self) -> INTEN_W { - INTEN_W { w: self } + #[must_use] + pub fn inten(&mut self) -> IntenW { + IntenW::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bit 1 - Enable watchdog reset output"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn resen(&mut self) -> ResenW { + ResenW::new(self, 1) } } -#[doc = "Enable for block reset and interrupt\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [wdogcontrol](index.html) module"] -pub struct WDOGCONTROL_SPEC; -impl crate::RegisterSpec for WDOGCONTROL_SPEC { +#[doc = "Enable for block reset and interrupt\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdogcontrol::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`wdogcontrol::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct WdogcontrolSpec; +impl crate::RegisterSpec for WdogcontrolSpec { type Ux = u32; } -#[doc = "`read()` method returns [wdogcontrol::R](R) reader structure"] -impl crate::Readable for WDOGCONTROL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [wdogcontrol::W](W) writer structure"] -impl crate::Writable for WDOGCONTROL_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`wdogcontrol::R`](R) reader structure"] +impl crate::Readable for WdogcontrolSpec {} +#[doc = "`write(|w| ..)` method takes [`wdogcontrol::W`](W) writer structure"] +impl crate::Writable for WdogcontrolSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets WDOGCONTROL to value 0"] -impl crate::Resettable for WDOGCONTROL_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for WdogcontrolSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/watch_dog/wdogintclr.rs b/va416xx/src/watch_dog/wdogintclr.rs index 54806f9..e4e036c 100644 --- a/va416xx/src/watch_dog/wdogintclr.rs +++ b/va416xx/src/watch_dog/wdogintclr.rs @@ -1,103 +1,40 @@ #[doc = "Register `WDOGINTCLR` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `WDOGINTCLR` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CLEAR` reader - Write any value to clear interrupt"] -pub struct CLEAR_R(crate::FieldReader); -impl CLEAR_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - CLEAR_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CLEAR_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type ClearR = crate::FieldReader; #[doc = "Field `CLEAR` writer - Write any value to clear interrupt"] -pub struct CLEAR_W<'a> { - w: &'a mut W, -} -impl<'a> CLEAR_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - self.w.bits = value as u32; - self.w - } -} +pub type ClearW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Write any value to clear interrupt"] #[inline(always)] - pub fn clear(&self) -> CLEAR_R { - CLEAR_R::new(self.bits as u32) + pub fn clear(&self) -> ClearR { + ClearR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Write any value to clear interrupt"] #[inline(always)] - pub fn clear(&mut self) -> CLEAR_W { - CLEAR_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn clear(&mut self) -> ClearW { + ClearW::new(self, 0) } } -#[doc = "A write of any value clears the WDT module interrupt, and reloads the counter from the value in the WDOGLOAD Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [wdogintclr](index.html) module"] -pub struct WDOGINTCLR_SPEC; -impl crate::RegisterSpec for WDOGINTCLR_SPEC { +#[doc = "A write of any value clears the WDT module interrupt, and reloads the counter from the value in the WDOGLOAD Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdogintclr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`wdogintclr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct WdogintclrSpec; +impl crate::RegisterSpec for WdogintclrSpec { type Ux = u32; } -#[doc = "`read()` method returns [wdogintclr::R](R) reader structure"] -impl crate::Readable for WDOGINTCLR_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [wdogintclr::W](W) writer structure"] -impl crate::Writable for WDOGINTCLR_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`wdogintclr::R`](R) reader structure"] +impl crate::Readable for WdogintclrSpec {} +#[doc = "`write(|w| ..)` method takes [`wdogintclr::W`](W) writer structure"] +impl crate::Writable for WdogintclrSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets WDOGINTCLR to value 0"] -impl crate::Resettable for WDOGINTCLR_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for WdogintclrSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/watch_dog/wdogitcr.rs b/va416xx/src/watch_dog/wdogitcr.rs index 79c758e..682fa54 100644 --- a/va416xx/src/watch_dog/wdogitcr.rs +++ b/va416xx/src/watch_dog/wdogitcr.rs @@ -1,113 +1,40 @@ #[doc = "Register `WDOGITCR` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `WDOGITCR` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TEST_MODE_EN` reader - Enable test mode of WDOGINT and WDOGRES"] -pub struct TEST_MODE_EN_R(crate::FieldReader); -impl TEST_MODE_EN_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - TEST_MODE_EN_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for TEST_MODE_EN_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type TestModeEnR = crate::BitReader; #[doc = "Field `TEST_MODE_EN` writer - Enable test mode of WDOGINT and WDOGRES"] -pub struct TEST_MODE_EN_W<'a> { - w: &'a mut W, -} -impl<'a> TEST_MODE_EN_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} +pub type TestModeEnW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Enable test mode of WDOGINT and WDOGRES"] #[inline(always)] - pub fn test_mode_en(&self) -> TEST_MODE_EN_R { - TEST_MODE_EN_R::new((self.bits & 0x01) != 0) + pub fn test_mode_en(&self) -> TestModeEnR { + TestModeEnR::new((self.bits & 1) != 0) } } impl W { #[doc = "Bit 0 - Enable test mode of WDOGINT and WDOGRES"] #[inline(always)] - pub fn test_mode_en(&mut self) -> TEST_MODE_EN_W { - TEST_MODE_EN_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn test_mode_en(&mut self) -> TestModeEnW { + TestModeEnW::new(self, 0) } } -#[doc = "Integration test control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [wdogitcr](index.html) module"] -pub struct WDOGITCR_SPEC; -impl crate::RegisterSpec for WDOGITCR_SPEC { +#[doc = "Integration test control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdogitcr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`wdogitcr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct WdogitcrSpec; +impl crate::RegisterSpec for WdogitcrSpec { type Ux = u32; } -#[doc = "`read()` method returns [wdogitcr::R](R) reader structure"] -impl crate::Readable for WDOGITCR_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [wdogitcr::W](W) writer structure"] -impl crate::Writable for WDOGITCR_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`wdogitcr::R`](R) reader structure"] +impl crate::Readable for WdogitcrSpec {} +#[doc = "`write(|w| ..)` method takes [`wdogitcr::W`](W) writer structure"] +impl crate::Writable for WdogitcrSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets WDOGITCR to value 0"] -impl crate::Resettable for WDOGITCR_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for WdogitcrSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/watch_dog/wdogitop.rs b/va416xx/src/watch_dog/wdogitop.rs index 9395a46..25eedbe 100644 --- a/va416xx/src/watch_dog/wdogitop.rs +++ b/va416xx/src/watch_dog/wdogitop.rs @@ -1,160 +1,55 @@ #[doc = "Register `WDOGITOP` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `WDOGITOP` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `WDOGINT` reader - Set output value"] -pub struct WDOGINT_R(crate::FieldReader); -impl WDOGINT_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - WDOGINT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for WDOGINT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -#[doc = "Field `WDOGINT` writer - Set output value"] -pub struct WDOGINT_W<'a> { - w: &'a mut W, -} -impl<'a> WDOGINT_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); - self.w - } -} +pub type W = crate::W; #[doc = "Field `WDOGRES` reader - Set output value"] -pub struct WDOGRES_R(crate::FieldReader); -impl WDOGRES_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - WDOGRES_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for WDOGRES_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type WdogresR = crate::BitReader; #[doc = "Field `WDOGRES` writer - Set output value"] -pub struct WDOGRES_W<'a> { - w: &'a mut W, -} -impl<'a> WDOGRES_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); - self.w - } -} +pub type WdogresW<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `WDOGINT` reader - Set output value"] +pub type WdogintR = crate::BitReader; +#[doc = "Field `WDOGINT` writer - Set output value"] +pub type WdogintW<'a, REG> = crate::BitWriter<'a, REG>; impl R { - #[doc = "Bit 1 - Set output value"] - #[inline(always)] - pub fn wdogint(&self) -> WDOGINT_R { - WDOGINT_R::new(((self.bits >> 1) & 0x01) != 0) - } #[doc = "Bit 0 - Set output value"] #[inline(always)] - pub fn wdogres(&self) -> WDOGRES_R { - WDOGRES_R::new((self.bits & 0x01) != 0) + pub fn wdogres(&self) -> WdogresR { + WdogresR::new((self.bits & 1) != 0) + } + #[doc = "Bit 1 - Set output value"] + #[inline(always)] + pub fn wdogint(&self) -> WdogintR { + WdogintR::new(((self.bits >> 1) & 1) != 0) } } impl W { - #[doc = "Bit 1 - Set output value"] - #[inline(always)] - pub fn wdogint(&mut self) -> WDOGINT_W { - WDOGINT_W { w: self } - } #[doc = "Bit 0 - Set output value"] #[inline(always)] - pub fn wdogres(&mut self) -> WDOGRES_W { - WDOGRES_W { w: self } + #[must_use] + pub fn wdogres(&mut self) -> WdogresW { + WdogresW::new(self, 0) } - #[doc = "Writes raw bits to the register."] + #[doc = "Bit 1 - Set output value"] #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn wdogint(&mut self) -> WdogintW { + WdogintW::new(self, 1) } } -#[doc = "Integration test output set\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [wdogitop](index.html) module"] -pub struct WDOGITOP_SPEC; -impl crate::RegisterSpec for WDOGITOP_SPEC { +#[doc = "Integration test output set\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdogitop::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`wdogitop::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct WdogitopSpec; +impl crate::RegisterSpec for WdogitopSpec { type Ux = u32; } -#[doc = "`read()` method returns [wdogitop::R](R) reader structure"] -impl crate::Readable for WDOGITOP_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [wdogitop::W](W) writer structure"] -impl crate::Writable for WDOGITOP_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`wdogitop::R`](R) reader structure"] +impl crate::Readable for WdogitopSpec {} +#[doc = "`write(|w| ..)` method takes [`wdogitop::W`](W) writer structure"] +impl crate::Writable for WdogitopSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets WDOGITOP to value 0"] -impl crate::Resettable for WDOGITOP_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for WdogitopSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/watch_dog/wdogload.rs b/va416xx/src/watch_dog/wdogload.rs index 6ed7eea..4d21910 100644 --- a/va416xx/src/watch_dog/wdogload.rs +++ b/va416xx/src/watch_dog/wdogload.rs @@ -1,103 +1,40 @@ #[doc = "Register `WDOGLOAD` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `WDOGLOAD` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CNT` reader - Count to load"] -pub struct CNT_R(crate::FieldReader); -impl CNT_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - CNT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CNT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type CntR = crate::FieldReader; #[doc = "Field `CNT` writer - Count to load"] -pub struct CNT_W<'a> { - w: &'a mut W, -} -impl<'a> CNT_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - self.w.bits = value as u32; - self.w - } -} +pub type CntW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Count to load"] #[inline(always)] - pub fn cnt(&self) -> CNT_R { - CNT_R::new(self.bits as u32) + pub fn cnt(&self) -> CntR { + CntR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Count to load"] #[inline(always)] - pub fn cnt(&mut self) -> CNT_W { - CNT_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn cnt(&mut self) -> CntW { + CntW::new(self, 0) } } -#[doc = "Counter Start Value\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [wdogload](index.html) module"] -pub struct WDOGLOAD_SPEC; -impl crate::RegisterSpec for WDOGLOAD_SPEC { +#[doc = "Counter Start Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdogload::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`wdogload::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct WdogloadSpec; +impl crate::RegisterSpec for WdogloadSpec { type Ux = u32; } -#[doc = "`read()` method returns [wdogload::R](R) reader structure"] -impl crate::Readable for WDOGLOAD_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [wdogload::W](W) writer structure"] -impl crate::Writable for WDOGLOAD_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`wdogload::R`](R) reader structure"] +impl crate::Readable for WdogloadSpec {} +#[doc = "`write(|w| ..)` method takes [`wdogload::W`](W) writer structure"] +impl crate::Writable for WdogloadSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets WDOGLOAD to value 0xffff_ffff"] -impl crate::Resettable for WDOGLOAD_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0xffff_ffff - } +impl crate::Resettable for WdogloadSpec { + const RESET_VALUE: u32 = 0xffff_ffff; } diff --git a/va416xx/src/watch_dog/wdoglock.rs b/va416xx/src/watch_dog/wdoglock.rs index aa9f27f..c92b686 100644 --- a/va416xx/src/watch_dog/wdoglock.rs +++ b/va416xx/src/watch_dog/wdoglock.rs @@ -1,103 +1,40 @@ #[doc = "Register `WDOGLOCK` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `WDOGLOCK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `REG_WR_EN` reader - Register write enable status"] -pub struct REG_WR_EN_R(crate::FieldReader); -impl REG_WR_EN_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - REG_WR_EN_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for REG_WR_EN_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type RegWrEnR = crate::FieldReader; #[doc = "Field `REG_WR_EN` writer - Register write enable status"] -pub struct REG_WR_EN_W<'a> { - w: &'a mut W, -} -impl<'a> REG_WR_EN_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - self.w.bits = value as u32; - self.w - } -} +pub type RegWrEnW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Register write enable status"] #[inline(always)] - pub fn reg_wr_en(&self) -> REG_WR_EN_R { - REG_WR_EN_R::new(self.bits as u32) + pub fn reg_wr_en(&self) -> RegWrEnR { + RegWrEnR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Register write enable status"] #[inline(always)] - pub fn reg_wr_en(&mut self) -> REG_WR_EN_W { - REG_WR_EN_W { w: self } - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + #[must_use] + pub fn reg_wr_en(&mut self) -> RegWrEnW { + RegWrEnW::new(self, 0) } } -#[doc = "Lock\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [wdoglock](index.html) module"] -pub struct WDOGLOCK_SPEC; -impl crate::RegisterSpec for WDOGLOCK_SPEC { +#[doc = "Lock\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdoglock::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`wdoglock::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct WdoglockSpec; +impl crate::RegisterSpec for WdoglockSpec { type Ux = u32; } -#[doc = "`read()` method returns [wdoglock::R](R) reader structure"] -impl crate::Readable for WDOGLOCK_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [wdoglock::W](W) writer structure"] -impl crate::Writable for WDOGLOCK_SPEC { - type Writer = W; +#[doc = "`read()` method returns [`wdoglock::R`](R) reader structure"] +impl crate::Readable for WdoglockSpec {} +#[doc = "`write(|w| ..)` method takes [`wdoglock::W`](W) writer structure"] +impl crate::Writable for WdoglockSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets WDOGLOCK to value 0"] -impl crate::Resettable for WDOGLOCK_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for WdoglockSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/watch_dog/wdogmis.rs b/va416xx/src/watch_dog/wdogmis.rs index 26b8de6..94b8e40 100644 --- a/va416xx/src/watch_dog/wdogmis.rs +++ b/va416xx/src/watch_dog/wdogmis.rs @@ -1,53 +1,22 @@ #[doc = "Register `WDOGMIS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `INTERRUPT` reader - Masked Interrupt Status"] -pub struct INTERRUPT_R(crate::FieldReader); -impl INTERRUPT_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - INTERRUPT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for INTERRUPT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type InterruptR = crate::BitReader; impl R { #[doc = "Bit 0 - Masked Interrupt Status"] #[inline(always)] - pub fn interrupt(&self) -> INTERRUPT_R { - INTERRUPT_R::new((self.bits & 0x01) != 0) + pub fn interrupt(&self) -> InterruptR { + InterruptR::new((self.bits & 1) != 0) } } -#[doc = "Interrupt status\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [wdogmis](index.html) module"] -pub struct WDOGMIS_SPEC; -impl crate::RegisterSpec for WDOGMIS_SPEC { +#[doc = "Interrupt status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdogmis::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct WdogmisSpec; +impl crate::RegisterSpec for WdogmisSpec { type Ux = u32; } -#[doc = "`read()` method returns [wdogmis::R](R) reader structure"] -impl crate::Readable for WDOGMIS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`wdogmis::R`](R) reader structure"] +impl crate::Readable for WdogmisSpec {} #[doc = "`reset()` method sets WDOGMIS to value 0"] -impl crate::Resettable for WDOGMIS_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for WdogmisSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/watch_dog/wdogpcellid0.rs b/va416xx/src/watch_dog/wdogpcellid0.rs index 12dbe3b..3e9b39b 100644 --- a/va416xx/src/watch_dog/wdogpcellid0.rs +++ b/va416xx/src/watch_dog/wdogpcellid0.rs @@ -1,53 +1,22 @@ #[doc = "Register `WDOGPCELLID0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `PCELLID` reader - Prime Cell ID"] -pub struct PCELLID_R(crate::FieldReader); -impl PCELLID_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - PCELLID_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PCELLID_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type PcellidR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - Prime Cell ID"] #[inline(always)] - pub fn pcellid(&self) -> PCELLID_R { - PCELLID_R::new((self.bits & 0xff) as u8) + pub fn pcellid(&self) -> PcellidR { + PcellidR::new((self.bits & 0xff) as u8) } } -#[doc = "PrimeCell ID\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [wdogpcellid0](index.html) module"] -pub struct WDOGPCELLID0_SPEC; -impl crate::RegisterSpec for WDOGPCELLID0_SPEC { +#[doc = "PrimeCell ID\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdogpcellid0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Wdogpcellid0Spec; +impl crate::RegisterSpec for Wdogpcellid0Spec { type Ux = u32; } -#[doc = "`read()` method returns [wdogpcellid0::R](R) reader structure"] -impl crate::Readable for WDOGPCELLID0_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`wdogpcellid0::R`](R) reader structure"] +impl crate::Readable for Wdogpcellid0Spec {} #[doc = "`reset()` method sets WDOGPCELLID0 to value 0x0d"] -impl crate::Resettable for WDOGPCELLID0_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0x0d - } +impl crate::Resettable for Wdogpcellid0Spec { + const RESET_VALUE: u32 = 0x0d; } diff --git a/va416xx/src/watch_dog/wdogpcellid1.rs b/va416xx/src/watch_dog/wdogpcellid1.rs index 7c63719..33483b0 100644 --- a/va416xx/src/watch_dog/wdogpcellid1.rs +++ b/va416xx/src/watch_dog/wdogpcellid1.rs @@ -1,53 +1,22 @@ #[doc = "Register `WDOGPCELLID1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `PCELLID` reader - Prime Cell ID"] -pub struct PCELLID_R(crate::FieldReader); -impl PCELLID_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - PCELLID_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PCELLID_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type PcellidR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - Prime Cell ID"] #[inline(always)] - pub fn pcellid(&self) -> PCELLID_R { - PCELLID_R::new((self.bits & 0xff) as u8) + pub fn pcellid(&self) -> PcellidR { + PcellidR::new((self.bits & 0xff) as u8) } } -#[doc = "PrimeCell ID\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [wdogpcellid1](index.html) module"] -pub struct WDOGPCELLID1_SPEC; -impl crate::RegisterSpec for WDOGPCELLID1_SPEC { +#[doc = "PrimeCell ID\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdogpcellid1::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Wdogpcellid1Spec; +impl crate::RegisterSpec for Wdogpcellid1Spec { type Ux = u32; } -#[doc = "`read()` method returns [wdogpcellid1::R](R) reader structure"] -impl crate::Readable for WDOGPCELLID1_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`wdogpcellid1::R`](R) reader structure"] +impl crate::Readable for Wdogpcellid1Spec {} #[doc = "`reset()` method sets WDOGPCELLID1 to value 0xf0"] -impl crate::Resettable for WDOGPCELLID1_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0xf0 - } +impl crate::Resettable for Wdogpcellid1Spec { + const RESET_VALUE: u32 = 0xf0; } diff --git a/va416xx/src/watch_dog/wdogpcellid2.rs b/va416xx/src/watch_dog/wdogpcellid2.rs index f23d441..d1c1831 100644 --- a/va416xx/src/watch_dog/wdogpcellid2.rs +++ b/va416xx/src/watch_dog/wdogpcellid2.rs @@ -1,53 +1,22 @@ #[doc = "Register `WDOGPCELLID2` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `PCELLID` reader - Prime Cell ID"] -pub struct PCELLID_R(crate::FieldReader); -impl PCELLID_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - PCELLID_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PCELLID_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type PcellidR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - Prime Cell ID"] #[inline(always)] - pub fn pcellid(&self) -> PCELLID_R { - PCELLID_R::new((self.bits & 0xff) as u8) + pub fn pcellid(&self) -> PcellidR { + PcellidR::new((self.bits & 0xff) as u8) } } -#[doc = "PrimeCell ID\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [wdogpcellid2](index.html) module"] -pub struct WDOGPCELLID2_SPEC; -impl crate::RegisterSpec for WDOGPCELLID2_SPEC { +#[doc = "PrimeCell ID\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdogpcellid2::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Wdogpcellid2Spec; +impl crate::RegisterSpec for Wdogpcellid2Spec { type Ux = u32; } -#[doc = "`read()` method returns [wdogpcellid2::R](R) reader structure"] -impl crate::Readable for WDOGPCELLID2_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`wdogpcellid2::R`](R) reader structure"] +impl crate::Readable for Wdogpcellid2Spec {} #[doc = "`reset()` method sets WDOGPCELLID2 to value 0x05"] -impl crate::Resettable for WDOGPCELLID2_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0x05 - } +impl crate::Resettable for Wdogpcellid2Spec { + const RESET_VALUE: u32 = 0x05; } diff --git a/va416xx/src/watch_dog/wdogpcellid3.rs b/va416xx/src/watch_dog/wdogpcellid3.rs index 69ffda4..ae59c49 100644 --- a/va416xx/src/watch_dog/wdogpcellid3.rs +++ b/va416xx/src/watch_dog/wdogpcellid3.rs @@ -1,53 +1,22 @@ #[doc = "Register `WDOGPCELLID3` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `PCELLID` reader - Prime Cell ID"] -pub struct PCELLID_R(crate::FieldReader); -impl PCELLID_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - PCELLID_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PCELLID_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type PcellidR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - Prime Cell ID"] #[inline(always)] - pub fn pcellid(&self) -> PCELLID_R { - PCELLID_R::new((self.bits & 0xff) as u8) + pub fn pcellid(&self) -> PcellidR { + PcellidR::new((self.bits & 0xff) as u8) } } -#[doc = "PrimeCell ID\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [wdogpcellid3](index.html) module"] -pub struct WDOGPCELLID3_SPEC; -impl crate::RegisterSpec for WDOGPCELLID3_SPEC { +#[doc = "PrimeCell ID\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdogpcellid3::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Wdogpcellid3Spec; +impl crate::RegisterSpec for Wdogpcellid3Spec { type Ux = u32; } -#[doc = "`read()` method returns [wdogpcellid3::R](R) reader structure"] -impl crate::Readable for WDOGPCELLID3_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`wdogpcellid3::R`](R) reader structure"] +impl crate::Readable for Wdogpcellid3Spec {} #[doc = "`reset()` method sets WDOGPCELLID3 to value 0xb1"] -impl crate::Resettable for WDOGPCELLID3_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0xb1 - } +impl crate::Resettable for Wdogpcellid3Spec { + const RESET_VALUE: u32 = 0xb1; } diff --git a/va416xx/src/watch_dog/wdogperiphid0.rs b/va416xx/src/watch_dog/wdogperiphid0.rs index a422d64..8bad2f1 100644 --- a/va416xx/src/watch_dog/wdogperiphid0.rs +++ b/va416xx/src/watch_dog/wdogperiphid0.rs @@ -1,53 +1,22 @@ #[doc = "Register `WDOGPERIPHID0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `PERIPHID` reader - Peripheral ID"] -pub struct PERIPHID_R(crate::FieldReader); -impl PERIPHID_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - PERIPHID_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PERIPHID_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type PeriphidR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - Peripheral ID"] #[inline(always)] - pub fn periphid(&self) -> PERIPHID_R { - PERIPHID_R::new((self.bits & 0xff) as u8) + pub fn periphid(&self) -> PeriphidR { + PeriphidR::new((self.bits & 0xff) as u8) } } -#[doc = "Peripheral ID\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [wdogperiphid0](index.html) module"] -pub struct WDOGPERIPHID0_SPEC; -impl crate::RegisterSpec for WDOGPERIPHID0_SPEC { +#[doc = "Peripheral ID\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdogperiphid0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Wdogperiphid0Spec; +impl crate::RegisterSpec for Wdogperiphid0Spec { type Ux = u32; } -#[doc = "`read()` method returns [wdogperiphid0::R](R) reader structure"] -impl crate::Readable for WDOGPERIPHID0_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`wdogperiphid0::R`](R) reader structure"] +impl crate::Readable for Wdogperiphid0Spec {} #[doc = "`reset()` method sets WDOGPERIPHID0 to value 0x24"] -impl crate::Resettable for WDOGPERIPHID0_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0x24 - } +impl crate::Resettable for Wdogperiphid0Spec { + const RESET_VALUE: u32 = 0x24; } diff --git a/va416xx/src/watch_dog/wdogperiphid1.rs b/va416xx/src/watch_dog/wdogperiphid1.rs index 8d6a39d..d4ca76a 100644 --- a/va416xx/src/watch_dog/wdogperiphid1.rs +++ b/va416xx/src/watch_dog/wdogperiphid1.rs @@ -1,53 +1,22 @@ #[doc = "Register `WDOGPERIPHID1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `PERIPHID` reader - Peripheral ID"] -pub struct PERIPHID_R(crate::FieldReader); -impl PERIPHID_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - PERIPHID_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PERIPHID_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type PeriphidR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - Peripheral ID"] #[inline(always)] - pub fn periphid(&self) -> PERIPHID_R { - PERIPHID_R::new((self.bits & 0xff) as u8) + pub fn periphid(&self) -> PeriphidR { + PeriphidR::new((self.bits & 0xff) as u8) } } -#[doc = "Peripheral ID\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [wdogperiphid1](index.html) module"] -pub struct WDOGPERIPHID1_SPEC; -impl crate::RegisterSpec for WDOGPERIPHID1_SPEC { +#[doc = "Peripheral ID\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdogperiphid1::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Wdogperiphid1Spec; +impl crate::RegisterSpec for Wdogperiphid1Spec { type Ux = u32; } -#[doc = "`read()` method returns [wdogperiphid1::R](R) reader structure"] -impl crate::Readable for WDOGPERIPHID1_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`wdogperiphid1::R`](R) reader structure"] +impl crate::Readable for Wdogperiphid1Spec {} #[doc = "`reset()` method sets WDOGPERIPHID1 to value 0xb8"] -impl crate::Resettable for WDOGPERIPHID1_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0xb8 - } +impl crate::Resettable for Wdogperiphid1Spec { + const RESET_VALUE: u32 = 0xb8; } diff --git a/va416xx/src/watch_dog/wdogperiphid2.rs b/va416xx/src/watch_dog/wdogperiphid2.rs index 7ae35fc..c277ee4 100644 --- a/va416xx/src/watch_dog/wdogperiphid2.rs +++ b/va416xx/src/watch_dog/wdogperiphid2.rs @@ -1,53 +1,22 @@ #[doc = "Register `WDOGPERIPHID2` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `PERIPHID` reader - Peripheral ID"] -pub struct PERIPHID_R(crate::FieldReader); -impl PERIPHID_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - PERIPHID_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PERIPHID_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type PeriphidR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - Peripheral ID"] #[inline(always)] - pub fn periphid(&self) -> PERIPHID_R { - PERIPHID_R::new((self.bits & 0xff) as u8) + pub fn periphid(&self) -> PeriphidR { + PeriphidR::new((self.bits & 0xff) as u8) } } -#[doc = "Peripheral ID\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [wdogperiphid2](index.html) module"] -pub struct WDOGPERIPHID2_SPEC; -impl crate::RegisterSpec for WDOGPERIPHID2_SPEC { +#[doc = "Peripheral ID\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdogperiphid2::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Wdogperiphid2Spec; +impl crate::RegisterSpec for Wdogperiphid2Spec { type Ux = u32; } -#[doc = "`read()` method returns [wdogperiphid2::R](R) reader structure"] -impl crate::Readable for WDOGPERIPHID2_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`wdogperiphid2::R`](R) reader structure"] +impl crate::Readable for Wdogperiphid2Spec {} #[doc = "`reset()` method sets WDOGPERIPHID2 to value 0x1b"] -impl crate::Resettable for WDOGPERIPHID2_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0x1b - } +impl crate::Resettable for Wdogperiphid2Spec { + const RESET_VALUE: u32 = 0x1b; } diff --git a/va416xx/src/watch_dog/wdogperiphid3.rs b/va416xx/src/watch_dog/wdogperiphid3.rs index dd0040d..1ec1ad4 100644 --- a/va416xx/src/watch_dog/wdogperiphid3.rs +++ b/va416xx/src/watch_dog/wdogperiphid3.rs @@ -1,53 +1,22 @@ #[doc = "Register `WDOGPERIPHID3` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `PERIPHID` reader - Peripheral ID"] -pub struct PERIPHID_R(crate::FieldReader); -impl PERIPHID_R { - #[inline(always)] - pub(crate) fn new(bits: u8) -> Self { - PERIPHID_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for PERIPHID_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type PeriphidR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - Peripheral ID"] #[inline(always)] - pub fn periphid(&self) -> PERIPHID_R { - PERIPHID_R::new((self.bits & 0xff) as u8) + pub fn periphid(&self) -> PeriphidR { + PeriphidR::new((self.bits & 0xff) as u8) } } -#[doc = "Peripheral ID\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [wdogperiphid3](index.html) module"] -pub struct WDOGPERIPHID3_SPEC; -impl crate::RegisterSpec for WDOGPERIPHID3_SPEC { +#[doc = "Peripheral ID\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdogperiphid3::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Wdogperiphid3Spec; +impl crate::RegisterSpec for Wdogperiphid3Spec { type Ux = u32; } -#[doc = "`read()` method returns [wdogperiphid3::R](R) reader structure"] -impl crate::Readable for WDOGPERIPHID3_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`wdogperiphid3::R`](R) reader structure"] +impl crate::Readable for Wdogperiphid3Spec {} #[doc = "`reset()` method sets WDOGPERIPHID3 to value 0"] -impl crate::Resettable for WDOGPERIPHID3_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for Wdogperiphid3Spec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/watch_dog/wdogris.rs b/va416xx/src/watch_dog/wdogris.rs index fb519d0..3e8dfd4 100644 --- a/va416xx/src/watch_dog/wdogris.rs +++ b/va416xx/src/watch_dog/wdogris.rs @@ -1,53 +1,22 @@ #[doc = "Register `WDOGRIS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `INTERRUPT` reader - Interrupt Status"] -pub struct INTERRUPT_R(crate::FieldReader); -impl INTERRUPT_R { - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - INTERRUPT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for INTERRUPT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type InterruptR = crate::BitReader; impl R { #[doc = "Bit 0 - Interrupt Status"] #[inline(always)] - pub fn interrupt(&self) -> INTERRUPT_R { - INTERRUPT_R::new((self.bits & 0x01) != 0) + pub fn interrupt(&self) -> InterruptR { + InterruptR::new((self.bits & 1) != 0) } } -#[doc = "Raw interrupt status\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [wdogris](index.html) module"] -pub struct WDOGRIS_SPEC; -impl crate::RegisterSpec for WDOGRIS_SPEC { +#[doc = "Raw interrupt status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdogris::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct WdogrisSpec; +impl crate::RegisterSpec for WdogrisSpec { type Ux = u32; } -#[doc = "`read()` method returns [wdogris::R](R) reader structure"] -impl crate::Readable for WDOGRIS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`wdogris::R`](R) reader structure"] +impl crate::Readable for WdogrisSpec {} #[doc = "`reset()` method sets WDOGRIS to value 0"] -impl crate::Resettable for WDOGRIS_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0 - } +impl crate::Resettable for WdogrisSpec { + const RESET_VALUE: u32 = 0; } diff --git a/va416xx/src/watch_dog/wdogvalue.rs b/va416xx/src/watch_dog/wdogvalue.rs index 838190e..cf1335e 100644 --- a/va416xx/src/watch_dog/wdogvalue.rs +++ b/va416xx/src/watch_dog/wdogvalue.rs @@ -1,53 +1,22 @@ #[doc = "Register `WDOGVALUE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `CNT` reader - Actual Count"] -pub struct CNT_R(crate::FieldReader); -impl CNT_R { - #[inline(always)] - pub(crate) fn new(bits: u32) -> Self { - CNT_R(crate::FieldReader::new(bits)) - } -} -impl core::ops::Deref for CNT_R { - type Target = crate::FieldReader; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} +pub type CntR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Actual Count"] #[inline(always)] - pub fn cnt(&self) -> CNT_R { - CNT_R::new(self.bits as u32) + pub fn cnt(&self) -> CntR { + CntR::new(self.bits) } } -#[doc = "Down Counter Value\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [wdogvalue](index.html) module"] -pub struct WDOGVALUE_SPEC; -impl crate::RegisterSpec for WDOGVALUE_SPEC { +#[doc = "Down Counter Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdogvalue::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct WdogvalueSpec; +impl crate::RegisterSpec for WdogvalueSpec { type Ux = u32; } -#[doc = "`read()` method returns [wdogvalue::R](R) reader structure"] -impl crate::Readable for WDOGVALUE_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`wdogvalue::R`](R) reader structure"] +impl crate::Readable for WdogvalueSpec {} #[doc = "`reset()` method sets WDOGVALUE to value 0xffff_ffff"] -impl crate::Resettable for WDOGVALUE_SPEC { - #[inline(always)] - fn reset_value() -> Self::Ux { - 0xffff_ffff - } +impl crate::Resettable for WdogvalueSpec { + const RESET_VALUE: u32 = 0xffff_ffff; } diff --git a/va416xx/svd/va416xx-base.svd b/va416xx/svd/va416xx-base.svd index da85ebf..d62074c 100644 --- a/va416xx/svd/va416xx-base.svd +++ b/va416xx/svd/va416xx-base.svd @@ -1201,7 +1201,6 @@ V1.0 - Original release Dec 2015 MASTER_ENABLE PLL Symbol; Feedback cycle slip output (CLKOUT frequency low) [0:0] - read-only From f41ebc64c3ac7dec1bf504bd02f40439d930ac44 Mon Sep 17 00:00:00 2001 From: Robin Mueller Date: Tue, 11 Jun 2024 15:53:07 +0200 Subject: [PATCH 4/8] update PAC library --- va416xx/README.md | 36 +- va416xx/gen-helper.sh | 18 +- va416xx/svd/va416xx-patch.yml | 8 + va416xx/svd/{va416xx-orig.svd => va416xx.svd} | 0 .../{va416xx-base.svd => va416xx.svd.patched} | 1599 +++++------------ 5 files changed, 553 insertions(+), 1108 deletions(-) create mode 100644 va416xx/svd/va416xx-patch.yml rename va416xx/svd/{va416xx-orig.svd => va416xx.svd} (100%) rename va416xx/svd/{va416xx-base.svd => va416xx.svd.patched} (90%) diff --git a/va416xx/README.md b/va416xx/README.md index 6cdba8e..c8c31b5 100644 --- a/va416xx/README.md +++ b/va416xx/README.md @@ -21,9 +21,39 @@ features = ["rt"] The `rt` feature is optional and recommended. It brings in support for `cortex-m-rt`. -For full details on the autgenerated API, please see the -[svd2rust documentation](https://docs.rs/svd2rust/0.19.0/svd2rust/#peripheral-api). +For full details on the autgenerated API, you can read the +[svd2rust documentation](https://docs.rs/svd2rust/latest/svd2rust/). ## Regenerating the PAC -You can regenerate the PAC by running the `gen-helper.sh` helper script. +If you want to re-generate the PAC, for example if the register file `va416xx.svd` changes +or the `svd2rust` version is updated, you can do some using the following these steps: + +1. Make sure all necessary tools are installed: [`svd2rust`](https://docs.rs/svd2rust/latest/svd2rust/), + [`svdtools`](https://github.com/rust-embedded/svdtools) and [`form`](https://crates.io/crates/form). + You can install all tools with `cargo`: + + ```sh + cargo install --locked svd2rust svdtools form + ``` + +2. Patch the vendor-provided SVD file `svd/va41xx.svd`. This can be done using `svdtools` in + conjunction with the `svd/va416xx-patch.yml` file. + + ```sh + svdtools patch svd/va416xx-patch.yml + ``` + +3. Use `svd2rust` to generate the Rust library + + ```sh + svd2rust -i svd/va416xx.svd.patched + ``` + +4. Use the `form` tool to split the generated `lib.rs` into individual modules. + + ```sh + form -i lib.rs -o src/ + ``` + +The `gen-helper.sh` automates steps 2-4. diff --git a/va416xx/gen-helper.sh b/va416xx/gen-helper.sh index d40dfff..8407751 100755 --- a/va416xx/gen-helper.sh +++ b/va416xx/gen-helper.sh @@ -15,12 +15,28 @@ if [ -x "$(${svd2rust_bin} --version)" ]; then "Install it with cargo install svd2rust" exit fi -${svd2rust_bin} -i svd/va416xx-base.svd + +if ! command -v form &> /dev/null +then + echo "form tool was not found" + exit 1 +fi + +if ! command -v svdtools &> /dev/null +then + echo "svdtools was not found" + exit 1 +fi + +svdtools patch svd/va416xx-patch.yml +${svd2rust_bin} -i svd/va416xx.svd.patched + result=$? if [ $result -ne 0 ]; then echo "svd2rust failed with code $result" exit fi + rm -rf src form -i lib.rs -o src/ && rm lib.rs cargo fmt diff --git a/va416xx/svd/va416xx-patch.yml b/va416xx/svd/va416xx-patch.yml new file mode 100644 index 0000000..3eae97a --- /dev/null +++ b/va416xx/svd/va416xx-patch.yml @@ -0,0 +1,8 @@ +_svd: va416xx.svd + +# Read-only access for a write-only register does not really make sense.. +DMA: + CFG: + _modify: + MASTER_ENABLE: + access: read-write diff --git a/va416xx/svd/va416xx-orig.svd b/va416xx/svd/va416xx.svd similarity index 100% rename from va416xx/svd/va416xx-orig.svd rename to va416xx/svd/va416xx.svd diff --git a/va416xx/svd/va416xx-base.svd b/va416xx/svd/va416xx.svd.patched similarity index 90% rename from va416xx/svd/va416xx-base.svd rename to va416xx/svd/va416xx.svd.patched index d62074c..5e7a24a 100644 --- a/va416xx/svd/va416xx-base.svd +++ b/va416xx/svd/va416xx.svd.patched @@ -1,19 +1,12 @@ - - + + VORAGO TECHNOLOGIES SST va416xx M4 1.3 - ARM 32-bit Cortex-M4 Microcontroller based device, CPU clock up to 100MHz - - VORAGO Technologies \n + VORAGO Technologies \n \n ----------------------------------------------------------------------------\n Copyright (c) 2013-2020 VORAGO Technologies\n @@ -25,8 +18,7 @@ V1.0 - Original release Dec 2015 OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\n MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\n VORAGO TECHNOLOGIES SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE\n - FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.\n - + FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.\n CM4 r0p1 @@ -39,28 +31,20 @@ V1.0 - Original release Dec 2015 system_va416xx VOR_ 8 - 32 - - - 32 + 0x20 read-write - 0x00000000 - 0xFFFFFFFF - - - CLKGEN 1.0 Clock Generation Peripheral 0x40006000 - 0 - 0x00000100 + 0x0 + 0x100 registers @@ -71,7 +55,7 @@ V1.0 - Original release Dec 2015 CTRL0 Clock Generation Module Control Register 0 - 0x000 + 0x0 0x00000030 @@ -144,7 +128,7 @@ V1.0 - Original release Dec 2015 STAT Clock Generation Module Status Register - 0x004 + 0x4 read-only 0x00000000 @@ -177,7 +161,7 @@ V1.0 - Original release Dec 2015 CTRL1 Clock Generation Module Control Register 1 - 0x008 + 0x8 read-write 0x00000000 @@ -215,15 +199,14 @@ V1.0 - Original release Dec 2015 - SYSCONFIG 1.0 System Configuration Peripheral 0x40010000 - 0 - 0x00001000 + 0x0 + 0x1000 registers @@ -242,7 +225,7 @@ V1.0 - Original release Dec 2015 RST_STAT System Reset Status - 0x000 + 0x0 read-write 0x00000000 @@ -282,25 +265,25 @@ V1.0 - Original release Dec 2015 RST_CNTL_ROM ROM Reset Control - 0x004 + 0x4 0x0000003F RST_CNTL_RAM0 RAM Reset Control - 0x008 + 0x8 0x0000003F RST_CNTL_RAM1 RAM Reset Control - 0x00C + 0xC 0x0000003F ROM_PROT ROM Protection Configuration - 0x010 + 0x10 0x00000000 @@ -313,7 +296,7 @@ V1.0 - Original release Dec 2015 ROM_SCRUB ROM Scrub Period Configuration - 0x014 + 0x14 read-write 0x00000000 @@ -334,17 +317,17 @@ V1.0 - Original release Dec 2015 RAM0_SCRUB RAM0 Scrub Period Configuration - 0x018 + 0x18 RAM1_SCRUB RAM1 Scrub Period Configuration - 0x01C + 0x1C IRQ_ENB Enable EDAC Error Interrupt Register - 0x020 + 0x20 read-write 0x00000000 @@ -383,21 +366,21 @@ V1.0 - Original release Dec 2015 IRQ_RAW Raw EDAC Error Interrupt Status - 0x024 + 0x24 read-only 0x00000000 IRQ_END Enabled EDAC Error Interrupt Status - 0x028 + 0x28 read-only 0x00000000 IRQ_CLR Clear EDAC Error Interrupt Status - 0x02C + 0x2C write-only 0x00000000 oneToClear @@ -405,7 +388,7 @@ V1.0 - Original release Dec 2015 RAM0_SBE Count of RAM0 EDAC Single Bit Errors - 0x030 + 0x30 0x00000000 @@ -418,12 +401,12 @@ V1.0 - Original release Dec 2015 RAM1_SBE Count of RAM1 EDAC Single Bit Errors - 0x034 + 0x34 RAM0_MBE Count of RAM0 EDAC Multi Bit Errors - 0x038 + 0x38 0x00000000 @@ -436,22 +419,22 @@ V1.0 - Original release Dec 2015 RAM1_MBE Count of RAM1 EDAC Multi Bit Errors - 0x03C + 0x3C ROM_SBE Count of ROM EDAC Single Bit Errors - 0x040 + 0x40 ROM_MBE Count of ROM EDAC Multi Bit Errors - 0x044 + 0x44 ROM_RETRIES ROM BOOT Retry count - 0x048 + 0x48 read-only 0x00000000 @@ -465,7 +448,7 @@ V1.0 - Original release Dec 2015 REFRESH_CONFIG_H Register Refresh Rate for TMR registers - 0x04C + 0x4C 0x00000000 @@ -483,7 +466,7 @@ V1.0 - Original release Dec 2015 TIM_RESET TIM Reset Control - 0x050 + 0x50 0xFFFFFFFF @@ -496,7 +479,7 @@ V1.0 - Original release Dec 2015 TIM_CLK_ENABLE TIM Enable Control - 0x054 + 0x54 0x00000000 @@ -509,7 +492,7 @@ V1.0 - Original release Dec 2015 PERIPHERAL_RESET Peripheral Reset Control - 0x058 + 0x58 0x7F7BEFFF @@ -672,13 +655,13 @@ V1.0 - Original release Dec 2015 PERIPHERAL_CLK_ENABLE Peripheral Enable Control - 0x05C + 0x5C 0x00880000 SPW_M4_CTRL SPW M4 control register - 0x060 + 0x60 0x00030000 @@ -701,7 +684,7 @@ V1.0 - Original release Dec 2015 PMU_CTRL PMU Control Register - 0x064 + 0x64 0x00000000 @@ -714,7 +697,7 @@ V1.0 - Original release Dec 2015 WAKEUP_CNT Wakeup Control - 0x068 + 0x68 0x00000007 @@ -732,7 +715,7 @@ V1.0 - Original release Dec 2015 EBI_CFG0 EBI Config Register 0 - 0x06C + 0x6C 0x00000000 @@ -770,25 +753,25 @@ V1.0 - Original release Dec 2015 EBI_CFG1 EBI Config Register 1 - 0x070 + 0x70 0x00000000 EBI_CFG2 EBI Config Register 2 - 0x074 + 0x74 0x00000000 EBI_CFG3 EBI Config Register 3 - 0x078 + 0x78 0x00000000 ANALOG_CNTL Analog Control Register - 0x07C + 0x7C 0x00000000 @@ -866,7 +849,7 @@ V1.0 - Original release Dec 2015 SW_CLKDIV10 Initial SpW Clock Divider Value - 0x080 + 0x80 read-write 0x00000009 @@ -880,9 +863,9 @@ V1.0 - Original release Dec 2015 REFRESH_CONFIG_L Register Refresh Rate for TMR registers - 0x084 + 0x84 read-write - 0x0000000f + 0x0000000F DIVCOUNT @@ -1077,14 +1060,14 @@ V1.0 - Original release Dec 2015 Processor ID Register 0xFF8 read-only - 0x040057e3 + 0x040057E3 PERID Peripheral ID Register 0xFFC read-only - 0x028007e9 + 0x028007E9 MANUFACTURER_ID @@ -1114,8 +1097,8 @@ V1.0 - Original release Dec 2015 DMA Controller Block 0x40001000 - 0 - 0x00001000 + 0x0 + 0x1000 registers @@ -1158,9 +1141,9 @@ V1.0 - Original release Dec 2015 STATUS DMA Status - 0x000 - 0x00000000 + 0x0 read-only + 0x00000000 TEST_STATUS @@ -1188,7 +1171,7 @@ V1.0 - Original release Dec 2015 CFG DMA Configuration - 0x004 + 0x4 write-only 0x00000000 @@ -1201,13 +1184,14 @@ V1.0 - Original release Dec 2015 MASTER_ENABLE PLL Symbol; Feedback cycle slip output (CLKOUT frequency low) [0:0] + read-write CTRL_BASE_PTR Base Pointer for DMA Control Registers - 0x008 + 0x8 0x00000000 @@ -1220,7 +1204,7 @@ V1.0 - Original release Dec 2015 ALT_CTRL_BASE_PTR DMA Channel alternate control data base pointer - 0x00C + 0xC read-write 0x00000000 @@ -1234,7 +1218,7 @@ V1.0 - Original release Dec 2015 WAITONREQ_STATUS DMA channel wait on request status - 0x010 + 0x10 read-only 0x00000000 @@ -1267,7 +1251,7 @@ V1.0 - Original release Dec 2015 CHNL_SW_REQUEST DMA channel software request - 0x014 + 0x14 write-only 0x00000000 @@ -1300,7 +1284,7 @@ V1.0 - Original release Dec 2015 CHNL_USEBURST_SET DMA channel useburst set - 0x018 + 0x18 0x00000000 @@ -1332,7 +1316,7 @@ V1.0 - Original release Dec 2015 CHNL_USEBURST_CLR DMA channel useburst clear - 0x01C + 0x1C 0x00000000 @@ -1364,7 +1348,7 @@ V1.0 - Original release Dec 2015 CHNL_REQ_MASK_SET DMA channel request mask set - 0x020 + 0x20 0x00000000 @@ -1396,7 +1380,7 @@ V1.0 - Original release Dec 2015 CHNL_REQ_MASK_CLR DMA channel request mask clear - 0x024 + 0x24 0x00000000 @@ -1428,7 +1412,7 @@ V1.0 - Original release Dec 2015 CHNL_ENABLE_SET DMA channel enable set - 0x028 + 0x28 0x00000000 @@ -1460,7 +1444,7 @@ V1.0 - Original release Dec 2015 CHNL_ENABLE_CLR DMA channel enable clear - 0x02C + 0x2C 0x00000000 @@ -1492,7 +1476,7 @@ V1.0 - Original release Dec 2015 CHNL_PRI_ALT_SET DMA channel primary alternate set - 0x030 + 0x30 0x00000000 @@ -1524,7 +1508,7 @@ V1.0 - Original release Dec 2015 CHNL_PRI_ALT_CLR DMA channel primary alternate clear - 0x034 + 0x34 0x00000000 @@ -1556,7 +1540,7 @@ V1.0 - Original release Dec 2015 CHNL_PRIORITY_SET DMA channel priority set - 0x038 + 0x38 read-write 0x00000000 @@ -1589,7 +1573,7 @@ V1.0 - Original release Dec 2015 CHNL_PRIORITY_CLR DMA channel priority clear - 0x03C + 0x3C write-only 0x00000000 @@ -1622,7 +1606,7 @@ V1.0 - Original release Dec 2015 ERR_CLR DMA bus error clear - 0x04C + 0x4C 0x00000000 @@ -2007,24 +1991,23 @@ V1.0 - Original release Dec 2015 - IOCONFIG 1.0 IO Pin Configuration Peripheral 0x40011000 - 0 - 0x00001000 + 0x0 + 0x1000 registers 16 - 4 + 0x4 PORTA[%s] PORTA Pin Configuration Register - 0x000 + 0x0 0x00000000 @@ -2096,12 +2079,12 @@ V1.0 - Original release Dec 2015 PEN - Enable Internal Pull up/down + Enable Internal Pull up/down [11:11] PWOA - Enable Pull when output active + Enable Pull when output active [12:12] @@ -2119,39 +2102,39 @@ V1.0 - Original release Dec 2015 PORTB[%s] PORTB Pin Configuration Register - 0x0040 + 0x40 0x00000000 PORTC[%s] PORTC Pin Configuration Register - 0x0080 + 0x80 0x00000000 PORTD[%s] PORTD Pin Configuration Register - 0x00C0 + 0xC0 0x00000000 PORTE[%s] PORTE Pin Configuration Register - 0x0100 + 0x100 0x00000000 PORTF[%s] PORTF Pin Configuration Register - 0x0140 + 0x140 0x00000000 8 - 4 + 0x4 PORTG[%s] PORTG Pin Configuration Register - 0x0180 + 0x180 0x00000000 @@ -2213,36 +2196,34 @@ V1.0 - Original release Dec 2015 PERID Peripheral ID Register - 0xffc + 0xFFC read-only - 0x028207e9 + 0x028207E9 - - UTILITY 1.0 Utility Peripheral 0x40020000 - 0 - 0x00001000 + 0x0 + 0x1000 registers SYND_DATA Data Register - 0x000 + 0x0 read-write 0x00000000 SYND_SYND Syndrome Data Register - 0x004 + 0x4 read-write 0x00000000 @@ -2256,7 +2237,7 @@ V1.0 - Original release Dec 2015 SYND_ENC_32_44 EDAC Encode - 0x008 + 0x8 read-write 0x00000000 @@ -2275,14 +2256,14 @@ V1.0 - Original release Dec 2015 SYND_CHECK_32_44_DATA EDAC Decode Data - 0x00c + 0xC read-only 0x00000000 SYND_CHECK_32_44_SYND EDAC Decode Syndrome - 0x010 + 0x10 read-only 0x00000000 @@ -2306,7 +2287,7 @@ V1.0 - Original release Dec 2015 ROM_TRAP_ADDRESS ROM EDAC Trap Address - 0x014 + 0x14 read-write 0x00000000 @@ -2325,7 +2306,7 @@ V1.0 - Original release Dec 2015 ROM_TRAP_SYND ROM EDAC Trap Syndrome - 0x018 + 0x18 read-write 0x00000000 @@ -2344,7 +2325,7 @@ V1.0 - Original release Dec 2015 RAM_TRAP_ADDR0 RAM0 EDAC Trap Address - 0x01c + 0x1C read-write 0x00000000 @@ -2363,7 +2344,7 @@ V1.0 - Original release Dec 2015 RAM_TRAP_SYND0 RAM0 EDAC Trap Syndrome - 0x020 + 0x20 read-write 0x00000000 @@ -2382,7 +2363,7 @@ V1.0 - Original release Dec 2015 RAM_TRAP_ADDR1 RAM1 EDAC Trap Address - 0x024 + 0x24 read-write 0x00000000 @@ -2401,7 +2382,7 @@ V1.0 - Original release Dec 2015 RAM_TRAP_SYND1 RAM1 EDAC Trap Syndrome - 0x028 + 0x28 read-write 0x00000000 @@ -2465,23 +2446,22 @@ V1.0 - Original release Dec 2015 PERID Peripheral ID Register - 0xffc + 0xFFC read-only - 0x028407e9 + 0x028407E9 - - PORTA 1.0 GPIO Peripheral GPIO + GPIO 0x40012000 - 0 - 0x00000400 + 0x0 + 0x400 registers @@ -2868,182 +2848,181 @@ V1.0 - Original release Dec 2015 PORTF15 173 - GPIO DATAIN Data In Register - 0x000 + 0x0 read-only 0x00000000 4 - 1 + 0x1 DATAINBYTE[%s] Data In Register by Byte DATAIN - 0x000 - 8 + 0x0 + 0x8 read-only 0x00000000 DATAINRAW Data In Raw Register - 0x004 + 0x4 0x00000000 DATAINRAWBYTE[%s] Data In Raw Register by Byte DATAINRAW - 0x004 + 0x4 0x00000000 DATAOUT Data Out Register - 0x008 + 0x8 write-only 0x00000000 4 - 1 + 0x1 DATAOUTBYTE[%s] Data Out Register by Byte DATAOUT - 0x008 - 8 + 0x8 + 0x8 write-only 0x00000000 DATAOUTRAW Data Out Register - 0x00c + 0xC 0x00000000 DATAOUTRAWBYTE[%s] Data Out Register by Byte DATAOUTRAW - 0x00c + 0xC 0x00000000 SETOUT Set Out Register - 0x010 + 0x10 0x00000000 SETOUTBYTE[%s] Set Out Register by Byte SETOUT - 0x010 + 0x10 0x00000000 CLROUT Clear Out Register - 0x014 + 0x14 0x00000000 CLROUTBYTE[%s] Clear Out Register by Byte CLROUT - 0x014 + 0x14 0x00000000 TOGOUT Toggle Out Register - 0x018 + 0x18 0x00000000 TOGOUTBYTE[%s] Toggle Out Register by Byte TOGOUT - 0x018 + 0x18 0x00000000 DATAMASK Data mask Register - 0x01c + 0x1C 0x00000000 4 - 1 + 0x1 DATAMASKBYTE[%s] Data Out Register by Byte DATAMASK - 0x01c - 8 + 0x1C + 0x8 0x00000000 DIR Direction Register (1:Output, 0:Input) - 0x020 + 0x20 0x00000000 DIRBYTE[%s] Direction Register by Byte DIR - 0x020 + 0x20 0x00000000 PULSE Pulse Mode Register - 0x024 + 0x24 0x00000000 PULSEBYTE[%s] Pulse Mode Register by Byte PULSE - 0x024 + 0x24 0x00000000 PULSEBASE Pulse Base Value Register - 0x028 + 0x28 0x00000000 PULSEBASEBYTE[%s] Pulse Base Mode Register by Byte PULSEBASE - 0x028 + 0x28 0x00000000 DELAY1 Delay1 Register - 0x02c + 0x2C 0x00000000 DELAY1BYTE[%s] Delay1 Register by Byte DELAY1 - 0x02c + 0x2C 0x00000000 DELAY2 Delay2 Register - 0x030 - 32 + 0x30 + 0x20 read-write 0x00000000 @@ -3051,61 +3030,61 @@ V1.0 - Original release Dec 2015 DELAY2BYTE[%s] Delay2 Register by Byte DELAY2 - 0x030 + 0x30 0x00000000 IRQ_SEN Interrupt Sense Register (1:Level Sensitive, 0:Edge Sensitive) - 0x034 + 0x34 0x00000000 IRQ_EDGE Interrupt Both Edge Register (1:Both Edges, 0:Single Edge) - 0x038 + 0x38 0x00000000 IRQ_EVT - Interrupt Event Register (1:HighLevel/L->H Edge, 0:LowLevel/H->L Edge) - 0x03c + Interrupt Event Register (1:HighLevel/L->H Edge, 0:LowLevel/H->L Edge) + 0x3C 0x00000000 IRQ_ENB Interrupt Enable Register - 0x040 + 0x40 0x00000000 IRQ_RAW Raw Interrupt Status - 0x044 + 0x44 read-only 0x00000000 IRQ_END Masked Interrupt Status - 0x048 + 0x48 read-only 0x00000000 EDGE_STATUS Edge Status Register - 0x04c + 0x4C read-write 0x00000000 PERID Peripheral ID Register - 0x3fc - 32 + 0x3FC + 0x20 read-only - 0x021007e9 + 0x021007E9 @@ -3133,17 +3112,16 @@ V1.0 - Original release Dec 2015 PORTG 0x40013800 - - TIM0 1.0 Timer/Counter Peripheral Timer_Counter + TIM 0x40018000 - 0 - 0x00000400 + 0x0 + 0x400 registers @@ -3242,12 +3220,11 @@ V1.0 - Original release Dec 2015 TIM23 71 - TIM CTRL Control Register - 0x000 + 0x0 read-write @@ -3298,12 +3275,12 @@ V1.0 - Original release Dec 2015 PWMA - Selects the Pulse Width Modulated output. It 1 when the counter value is >= the PWMA_VALUE + Selects the Pulse Width Modulated output. It 1 when the counter value is >= the PWMA_VALUE 3 PWMB - Selects the Pulse Width Modulated output. It 1 when the counter value is < the PWMA_VALUE and value is > PWMA_VALUE + Selects the Pulse Width Modulated output. It 1 when the counter value is < the PWMA_VALUE and value is > PWMA_VALUE 4 @@ -3313,7 +3290,7 @@ V1.0 - Original release Dec 2015 PWMA_ACTIVE - Selects the Pulse Width Modulated output. It 1 when the counter value is <= the PWMA_VALUE and value is >= 0 + Selects the Pulse Width Modulated output. It 1 when the counter value is <= the PWMA_VALUE and value is >= 0 6 @@ -3333,17 +3310,17 @@ V1.0 - Original release Dec 2015 RST_VALUE The value that counter start from after reaching 0. - 0x004 + 0x4 CNT_VALUE The current value of the counter - 0x008 + 0x8 ENABLE Alternate access to the Counter ENABLE bit in the CTRL Register - 0x00c + 0xC ENABLE @@ -3355,7 +3332,7 @@ V1.0 - Original release Dec 2015 CSD_CTRL The Cascade Control Register. Controls the counter external enable signals - 0x010 + 0x10 CSDEN0 @@ -3412,7 +3389,7 @@ V1.0 - Original release Dec 2015 CASCADE0 Cascade Enable Selection - 0x014 + 0x14 CASSEL @@ -3424,35 +3401,35 @@ V1.0 - Original release Dec 2015 CASCADE1 Cascade Enable Selection - 0x018 + 0x18 CASCADE2 Cascade Enable Selection - 0x01c + 0x1C PWM_VALUE The Pulse Width Modulation Value - 0x020 + 0x20 PWMA_VALUE The Pulse Width Modulation ValueA PWM_VALUE - 0x020 + 0x20 PWMB_VALUE The Pulse Width Modulation ValueB - 0x024 + 0x24 PERID Peripheral ID Register - 0x3fc + 0x3FC read-only - 0x021107e9 + 0x021107E9 @@ -3548,17 +3525,16 @@ V1.0 - Original release Dec 2015 TIM23 0x40029C00 - - UART0 1.0 UART Peripheral UART + UART 0x40024000 - 0 - 0x00001000 + 0x0 + 0x1000 registers @@ -3585,18 +3561,17 @@ V1.0 - Original release Dec 2015 UART2_RX 29 - UART DATA Data In/Out Register - 0x000 + 0x0 0x00000000 ENABLE Enable Register - 0x004 + 0x4 0x00000000 @@ -3614,7 +3589,7 @@ V1.0 - Original release Dec 2015 CTRL Control Register - 0x008 + 0x8 0x00000000 @@ -3677,7 +3652,7 @@ V1.0 - Original release Dec 2015 CLKSCALE Clock Scale Register - 0x00c + 0xC 0x00000000 @@ -3701,7 +3676,7 @@ V1.0 - Original release Dec 2015 RXSTATUS Status Register - 0x010 + 0x10 read-only 0x00000000 @@ -3765,7 +3740,7 @@ V1.0 - Original release Dec 2015 TXSTATUS Status Register - 0x014 + 0x14 read-only 0x00000000 @@ -3799,7 +3774,7 @@ V1.0 - Original release Dec 2015 FIFO_CLR Clear FIFO Register - 0x018 + 0x18 write-only 0x00000000 @@ -3818,28 +3793,28 @@ V1.0 - Original release Dec 2015 TXBREAK Break Transmit Register - 0x01c + 0x1C write-only 0x00000000 ADDR9 Address9 Register - 0x020 + 0x20 read-write 0x00000000 ADDR9MASK Address9 Mask Register - 0x024 + 0x24 read-write 0x00000000 IRQ_ENB IRQ Enable Register - 0x028 + 0x28 read-write 0x00000000 @@ -3883,52 +3858,52 @@ V1.0 - Original release Dec 2015 IRQ_RAW IRQ Raw Status Register - 0x02c + 0x2C read-only 0x00000000 IRQ_END IRQ Enabled Status Register - 0x030 + 0x30 read-only 0x00000000 IRQ_CLR IRQ Clear Status Register - 0x034 + 0x34 write-only 0x00000000 RXFIFOIRQTRG Rx FIFO IRQ Trigger Level - 0x038 + 0x38 TXFIFOIRQTRG Tx FIFO IRQ Trigger Level - 0x03c + 0x3C RXFIFORTSTRG Rx FIFO RTS Trigger Level - 0x040 + 0x40 STATE Internal STATE of UART Controller - 0x044 - 32 + 0x44 + 0x20 read-only PERID Peripheral ID Register - 0xffc + 0xFFC read-only - 0x021207e9 + 0x021207E9 @@ -3940,17 +3915,16 @@ V1.0 - Original release Dec 2015 UART2 0x40017000 - - SPI0 1.0 SPI Peripheral SPI + SPI 0x40015000 - 0 - 0x00000400 + 0x0 + 0x400 registers @@ -3985,17 +3959,16 @@ V1.0 - Original release Dec 2015 SPI3_RX 23 - SPI CTRL0 Control Register 0 - 0x000 + 0x0 0x00000000 SIZE - Data Size(0x3=>4, 0xf=>16) + Data Size(0x3=>4, 0xf=>16) [3:0] @@ -4018,7 +3991,7 @@ V1.0 - Original release Dec 2015 CTRL1 Control Register 1 - 0x004 + 0x4 0x00000000 @@ -4076,12 +4049,12 @@ V1.0 - Original release Dec 2015 DATA Data Input/Output - 0x008 + 0x8 STATUS Status Register - 0x00C + 0xC read-only 0x00000000 @@ -4130,12 +4103,12 @@ V1.0 - Original release Dec 2015 CLKPRESCALE Clock Pre Scale divide value - 0x010 + 0x10 IRQ_ENB Interrupt Enable Register - 0x014 + 0x14 read-write 0x00000000 @@ -4164,36 +4137,36 @@ V1.0 - Original release Dec 2015 IRQ_RAW Raw Interrupt Status Register - 0x018 + 0x18 read-only IRQ_END Enabled Interrupt Status Register - 0x01C + 0x1C read-only IRQ_CLR Clear Interrupt Status Register - 0x020 + 0x20 write-only oneToClear RXFIFOIRQTRG Rx FIFO IRQ Trigger Level - 0x024 + 0x24 TXFIFOIRQTRG Tx FIFO IRQ Trigger Level - 0x028 + 0x28 FIFO_CLR Clear FIFO Register - 0x02c + 0x2C write-only @@ -4211,15 +4184,15 @@ V1.0 - Original release Dec 2015 STATE Internal STATE of SPI Controller - 0x030 + 0x30 read-only PERID Peripheral ID Register - 0x3fc + 0x3FC read-only - 0x021307e9 + 0x021307E9 @@ -4235,17 +4208,16 @@ V1.0 - Original release Dec 2015 SPI3 0x40015C00 - - I2C0 1.0 I2C Peripheral I2C + I2C 0x40016000 - 0 - 0x00000400 + 0x0 + 0x400 registers @@ -4320,13 +4292,11 @@ V1.0 - Original release Dec 2015 I2C2_SL_TX 193 - I2C - CTRL Control Register - 0x000 + 0x0 0x00000000 @@ -4379,7 +4349,7 @@ V1.0 - Original release Dec 2015 CLKSCALE Clock Scale divide value - 0x004 + 0x4 VALUE @@ -4396,27 +4366,27 @@ V1.0 - Original release Dec 2015 WORDS Word Count value - 0x008 + 0x8 ADDRESS I2C Address value - 0x00c + 0xC DATA Data Input/Output - 0x010 + 0x10 CMD Command Register - 0x014 + 0x14 STATUS I2C Controller Status Register - 0x018 + 0x18 I2CIDLE @@ -4498,25 +4468,25 @@ V1.0 - Original release Dec 2015 STATE Internal STATE of I2C Master Controller - 0x01c + 0x1C read-only TXCOUNT TX Count Register - 0x020 + 0x20 read-only RXCOUNT RX Count Register - 0x024 + 0x24 read-only IRQ_ENB Interrupt Enable Register - 0x028 + 0x28 read-write 0x00000000 @@ -4595,36 +4565,36 @@ V1.0 - Original release Dec 2015 IRQ_RAW Raw Interrupt Status Register - 0x02c + 0x2C read-only IRQ_END Enabled Interrupt Status Register - 0x030 + 0x30 read-only IRQ_CLR Clear Interrupt Status Register - 0x034 + 0x34 write-only oneToClear RXFIFOIRQTRG Rx FIFO IRQ Trigger Level - 0x038 + 0x38 TXFIFOIRQTRG Tx FIFO IRQ Trigger Level - 0x03c + 0x3C FIFO_CLR Clear FIFO Register - 0x040 + 0x40 write-only @@ -4642,14 +4612,13 @@ V1.0 - Original release Dec 2015 TMCONFIG Timing Config Register - 0x044 + 0x44 CLKTOLIMIT Clock Low Timeout Limit Register - 0x048 + 0x48 - S0_CTRL Slave Control Register @@ -4727,7 +4696,7 @@ V1.0 - Original release Dec 2015 S0_ADDRESSMASK Slave I2C Address Mask value - 0x10c + 0x10C 0x00000000 @@ -4871,7 +4840,7 @@ V1.0 - Original release Dec 2015 S0_STATE Internal STATE of I2C Slave Controller - 0x11c + 0x11C read-only @@ -4994,7 +4963,7 @@ V1.0 - Original release Dec 2015 S0_IRQ_RAW Slave Raw Interrupt Status Register - 0x12c + 0x12C read-only @@ -5026,7 +4995,7 @@ V1.0 - Original release Dec 2015 S0_TXFIFOIRQTRG Slave Tx FIFO IRQ Trigger Level - 0x13c + 0x13C 0x00000008 @@ -5098,9 +5067,9 @@ V1.0 - Original release Dec 2015 PERID Peripheral ID Register - 0x3fc + 0x3FC read-only - 0x021407e9 + 0x021407E9 @@ -5112,17 +5081,16 @@ V1.0 - Original release Dec 2015 I2C2 0x40016800 - - CAN0 1.0 CAN Peripheral CAN + CAN 0x40014000 - 0 - 0x00000400 + 0x0 + 0x400 registers @@ -5133,12 +5101,11 @@ V1.0 - Original release Dec 2015 CAN1 74 - CAN CNSTAT_CMB0 Buffer Status / Control Register - 0x000 + 0x0 0x00000000 @@ -5161,7 +5128,7 @@ V1.0 - Original release Dec 2015 TSTP_CMB0 CAN Frame Timestamp - 0x004 + 0x4 0x00000000 @@ -5174,7 +5141,7 @@ V1.0 - Original release Dec 2015 DATA3_CMB0 CAN Frame Data Word 3 - 0x008 + 0x8 0x00000000 @@ -5192,7 +5159,7 @@ V1.0 - Original release Dec 2015 DATA2_CMB0 CAN Frame Data Word 2 - 0x00C + 0xC read-write 0x00000000 @@ -5211,7 +5178,7 @@ V1.0 - Original release Dec 2015 DATA1_CMB0 CAN Frame Data Word 1 - 0x010 + 0x10 0x00000000 @@ -5229,7 +5196,7 @@ V1.0 - Original release Dec 2015 DATA0_CMB0 CAN Frame Data Word 0 - 0x014 + 0x14 read-write 0x00000000 @@ -5248,7 +5215,7 @@ V1.0 - Original release Dec 2015 ID0_CMB0 CAN Frame Identifier Word 0 - 0x018 + 0x18 0x00000000 @@ -5261,7 +5228,7 @@ V1.0 - Original release Dec 2015 ID1_CMB0 CAN Frame Identifier Word 1 - 0x01C + 0x1C 0x00000000 @@ -5274,7 +5241,7 @@ V1.0 - Original release Dec 2015 CNSTAT_CMB1 Buffer Status / Control Register - 0x020 + 0x20 0x00000000 @@ -5297,7 +5264,7 @@ V1.0 - Original release Dec 2015 TSTP_CMB1 CAN Frame Timestamp - 0x024 + 0x24 0x00000000 @@ -5310,7 +5277,7 @@ V1.0 - Original release Dec 2015 DATA3_CMB1 CAN Frame Data Word 3 - 0x028 + 0x28 0x00000000 @@ -5328,7 +5295,7 @@ V1.0 - Original release Dec 2015 DATA2_CMB1 CAN Frame Data Word 2 - 0x02C + 0x2C read-write 0x00000000 @@ -5347,7 +5314,7 @@ V1.0 - Original release Dec 2015 DATA1_CMB1 CAN Frame Data Word 2 - 0x030 + 0x30 0x00000000 @@ -5365,7 +5332,7 @@ V1.0 - Original release Dec 2015 DATA0_CMB1 CAN Frame Data Word 0 - 0x034 + 0x34 read-write 0x00000000 @@ -5384,7 +5351,7 @@ V1.0 - Original release Dec 2015 ID0_CMB1 CAN Frame Identifier Word 0 - 0x038 + 0x38 0x00000000 @@ -5397,7 +5364,7 @@ V1.0 - Original release Dec 2015 ID1_CMB1 CAN Frame Identifier Word 1 - 0x03C + 0x3C 0x00000000 @@ -5410,7 +5377,7 @@ V1.0 - Original release Dec 2015 CNSTAT_CMB2 Buffer Status / Control Register - 0x040 + 0x40 0x00000000 @@ -5433,7 +5400,7 @@ V1.0 - Original release Dec 2015 TSTP_CMB2 CAN Frame Timestamp - 0x044 + 0x44 0x00000000 @@ -5446,7 +5413,7 @@ V1.0 - Original release Dec 2015 DATA3_CMB2 CAN Frame Data Word 3 - 0x048 + 0x48 0x00000000 @@ -5464,7 +5431,7 @@ V1.0 - Original release Dec 2015 DATA2_CMB2 CAN Frame Data Word 2 - 0x04C + 0x4C read-write 0x00000000 @@ -5483,7 +5450,7 @@ V1.0 - Original release Dec 2015 DATA1_CMB2 CAN Frame Data Word 2 - 0x050 + 0x50 0x00000000 @@ -5501,7 +5468,7 @@ V1.0 - Original release Dec 2015 DATA0_CMB2 CAN Frame Data Word 0 - 0x054 + 0x54 read-write 0x00000000 @@ -5520,7 +5487,7 @@ V1.0 - Original release Dec 2015 ID0_CMB2 CAN Frame Identifier Word 0 - 0x058 + 0x58 0x00000000 @@ -5533,7 +5500,7 @@ V1.0 - Original release Dec 2015 ID1_CMB2 CAN Frame Identifier Word 1 - 0x05C + 0x5C 0x00000000 @@ -5546,7 +5513,7 @@ V1.0 - Original release Dec 2015 CNSTAT_CMB3 Buffer Status / Control Register - 0x060 + 0x60 0x00000000 @@ -5569,7 +5536,7 @@ V1.0 - Original release Dec 2015 TSTP_CMB3 CAN Frame Timestamp - 0x064 + 0x64 0x00000000 @@ -5582,7 +5549,7 @@ V1.0 - Original release Dec 2015 DATA3_CMB3 CAN Frame Data Word 3 - 0x068 + 0x68 0x00000000 @@ -5600,7 +5567,7 @@ V1.0 - Original release Dec 2015 DATA2_CMB3 CAN Frame Data Word 2 - 0x06C + 0x6C read-write 0x00000000 @@ -5619,7 +5586,7 @@ V1.0 - Original release Dec 2015 DATA1_CMB3 CAN Frame Data Word 2 - 0x070 + 0x70 0x00000000 @@ -5637,7 +5604,7 @@ V1.0 - Original release Dec 2015 DATA0_CMB3 CAN Frame Data Word 0 - 0x074 + 0x74 read-write 0x00000000 @@ -5656,7 +5623,7 @@ V1.0 - Original release Dec 2015 ID0_CMB3 CAN Frame Identifier Word 0 - 0x078 + 0x78 0x00000000 @@ -5669,7 +5636,7 @@ V1.0 - Original release Dec 2015 ID1_CMB3 CAN Frame Identifier Word 1 - 0x07C + 0x7C 0x00000000 @@ -5682,7 +5649,7 @@ V1.0 - Original release Dec 2015 CNSTAT_CMB4 Buffer Status / Control Register - 0x080 + 0x80 0x00000000 @@ -5705,7 +5672,7 @@ V1.0 - Original release Dec 2015 TSTP_CMB4 CAN Frame Timestamp - 0x084 + 0x84 0x00000000 @@ -5718,7 +5685,7 @@ V1.0 - Original release Dec 2015 DATA3_CMB4 CAN Frame Data Word 3 - 0x088 + 0x88 0x00000000 @@ -5736,7 +5703,7 @@ V1.0 - Original release Dec 2015 DATA2_CMB4 CAN Frame Data Word 2 - 0x08C + 0x8C read-write 0x00000000 @@ -5755,7 +5722,7 @@ V1.0 - Original release Dec 2015 DATA1_CMB4 CAN Frame Data Word 2 - 0x090 + 0x90 0x00000000 @@ -5773,7 +5740,7 @@ V1.0 - Original release Dec 2015 DATA0_CMB4 CAN Frame Data Word 0 - 0x094 + 0x94 read-write 0x00000000 @@ -5792,7 +5759,7 @@ V1.0 - Original release Dec 2015 ID0_CMB4 CAN Frame Identifier Word 0 - 0x098 + 0x98 0x00000000 @@ -5805,7 +5772,7 @@ V1.0 - Original release Dec 2015 ID1_CMB4 CAN Frame Identifier Word 1 - 0x09C + 0x9C 0x00000000 @@ -5818,7 +5785,7 @@ V1.0 - Original release Dec 2015 CNSTAT_CMB5 Buffer Status / Control Register - 0x0A0 + 0xA0 0x00000000 @@ -5841,7 +5808,7 @@ V1.0 - Original release Dec 2015 TSTP_CMB5 CAN Frame Timestamp - 0x0A4 + 0xA4 0x00000000 @@ -5854,7 +5821,7 @@ V1.0 - Original release Dec 2015 DATA3_CMB5 CAN Frame Data Word 3 - 0x0A8 + 0xA8 0x00000000 @@ -5872,7 +5839,7 @@ V1.0 - Original release Dec 2015 DATA2_CMB5 CAN Frame Data Word 2 - 0x0AC + 0xAC read-write 0x00000000 @@ -5891,7 +5858,7 @@ V1.0 - Original release Dec 2015 DATA1_CMB5 CAN Frame Data Word 2 - 0x0B0 + 0xB0 0x00000000 @@ -5909,7 +5876,7 @@ V1.0 - Original release Dec 2015 DATA0_CMB5 CAN Frame Data Word 0 - 0x0B4 + 0xB4 read-write 0x00000000 @@ -5928,7 +5895,7 @@ V1.0 - Original release Dec 2015 ID0_CMB5 CAN Frame Identifier Word 0 - 0x0B8 + 0xB8 0x00000000 @@ -5941,7 +5908,7 @@ V1.0 - Original release Dec 2015 ID1_CMB5 CAN Frame Identifier Word 1 - 0x0BC + 0xBC 0x00000000 @@ -5954,7 +5921,7 @@ V1.0 - Original release Dec 2015 CNSTAT_CMB6 Buffer Status / Control Register - 0x0C0 + 0xC0 0x00000000 @@ -5977,7 +5944,7 @@ V1.0 - Original release Dec 2015 TSTP_CMB6 CAN Frame Timestamp - 0x0C4 + 0xC4 0x00000000 @@ -5990,7 +5957,7 @@ V1.0 - Original release Dec 2015 DATA3_CMB6 CAN Frame Data Word 3 - 0x0C8 + 0xC8 0x00000000 @@ -6008,7 +5975,7 @@ V1.0 - Original release Dec 2015 DATA2_CMB6 CAN Frame Data Word 2 - 0x0CC + 0xCC read-write 0x00000000 @@ -6027,7 +5994,7 @@ V1.0 - Original release Dec 2015 DATA1_CMB6 CAN Frame Data Word 2 - 0x0D0 + 0xD0 0x00000000 @@ -6045,7 +6012,7 @@ V1.0 - Original release Dec 2015 DATA0_CMB6 CAN Frame Data Word 0 - 0x0D4 + 0xD4 read-write 0x00000000 @@ -6064,7 +6031,7 @@ V1.0 - Original release Dec 2015 ID0_CMB6 CAN Frame Identifier Word 0 - 0x0D8 + 0xD8 0x00000000 @@ -6077,7 +6044,7 @@ V1.0 - Original release Dec 2015 ID1_CMB6 CAN Frame Identifier Word 1 - 0x0DC + 0xDC 0x00000000 @@ -6090,7 +6057,7 @@ V1.0 - Original release Dec 2015 CNSTAT_CMB7 Buffer Status / Control Register - 0x0E0 + 0xE0 0x00000000 @@ -6113,7 +6080,7 @@ V1.0 - Original release Dec 2015 TSTP_CMB7 CAN Frame Timestamp - 0x0E4 + 0xE4 0x00000000 @@ -6126,7 +6093,7 @@ V1.0 - Original release Dec 2015 DATA3_CMB7 CAN Frame Data Word 3 - 0x0E8 + 0xE8 0x00000000 @@ -6144,7 +6111,7 @@ V1.0 - Original release Dec 2015 DATA2_CMB7 CAN Frame Data Word 2 - 0x0EC + 0xEC read-write 0x00000000 @@ -6163,7 +6130,7 @@ V1.0 - Original release Dec 2015 DATA1_CMB7 CAN Frame Data Word 2 - 0x0F0 + 0xF0 0x00000000 @@ -6181,7 +6148,7 @@ V1.0 - Original release Dec 2015 DATA0_CMB7 CAN Frame Data Word 0 - 0x0F4 + 0xF4 read-write 0x00000000 @@ -6200,7 +6167,7 @@ V1.0 - Original release Dec 2015 ID0_CMB7 CAN Frame Identifier Word 0 - 0x0F8 + 0xF8 0x00000000 @@ -6213,7 +6180,7 @@ V1.0 - Original release Dec 2015 ID1_CMB7 CAN Frame Identifier Word 1 - 0x0FC + 0xFC 0x00000000 @@ -7675,29 +7642,27 @@ V1.0 - Original release Dec 2015 CAN1 0x40014400 - - ADC 1.0 Analog to Digital Converter Peripheral ADC + ADC 0x40022000 - 0 - 0x00001000 + 0x0 + 0x1000 registers ADC 44 - ADC CTRL Control Register - 0x000 + 0x0 0x00000000 @@ -7735,7 +7700,7 @@ V1.0 - Original release Dec 2015 FIFO_DATA FIFO data - 0x004 + 0x4 read-only 0x00000000 @@ -7755,7 +7720,7 @@ V1.0 - Original release Dec 2015 STATUS Status - 0x008 + 0x8 read-only 0x00000000 @@ -7774,7 +7739,7 @@ V1.0 - Original release Dec 2015 IRQ_ENB Interrupt Enable - 0x00C + 0xC 0x00000000 @@ -7817,7 +7782,7 @@ V1.0 - Original release Dec 2015 IRQ_RAW Raw Interrupt Status - 0x010 + 0x10 read-only 0x00000001 @@ -7861,7 +7826,7 @@ V1.0 - Original release Dec 2015 IRQ_END Enabled Interrupt Status - 0x014 + 0x14 read-only 0x00000000 @@ -7905,7 +7870,7 @@ V1.0 - Original release Dec 2015 IRQ_CLR Clear Interrupt - 0x018 + 0x18 write-only 0x00000000 @@ -7934,7 +7899,7 @@ V1.0 - Original release Dec 2015 RXFIFOIRQTRG Receive FIFO Interrupt Trigger Value - 0x01C + 0x1C 0x00000010 @@ -7947,7 +7912,7 @@ V1.0 - Original release Dec 2015 FIFO_CLR FIFO Clear - 0x020 + 0x20 0x00000000 @@ -7961,23 +7926,22 @@ V1.0 - Original release Dec 2015 PERID Peripheral ID Register - 0xffc + 0xFFC read-only - 0x001907e9 + 0x001907E9 - - DAC0 1.0 Digital to Analog Converter Peripheral DAC + DAC 0x40023000 - 0 - 0x00000800 + 0x0 + 0x800 registers @@ -7988,12 +7952,11 @@ V1.0 - Original release Dec 2015 DAC1 41 - DAC CTRL0 Control Register 0 - 0x000 + 0x0 0x00000000 @@ -8011,7 +7974,7 @@ V1.0 - Original release Dec 2015 CTRL1 Control Register 1 - 0x004 + 0x4 0x00000000 @@ -8029,7 +7992,7 @@ V1.0 - Original release Dec 2015 FIFO_DATA FIFO data - 0x008 + 0x8 read-write 0x00000000 @@ -8044,7 +8007,7 @@ V1.0 - Original release Dec 2015 STATUS Status - 0x00C + 0xC read-only 0x00000000 @@ -8063,7 +8026,7 @@ V1.0 - Original release Dec 2015 IRQ_ENB Interrupt Enable - 0x010 + 0x10 0x00000000 @@ -8106,7 +8069,7 @@ V1.0 - Original release Dec 2015 IRQ_RAW Raw Interrupt Status - 0x014 + 0x14 read-only 0x00000041 @@ -8150,7 +8113,7 @@ V1.0 - Original release Dec 2015 IRQ_END Enabled Interrupt Status - 0x018 + 0x18 read-only 0x00000000 @@ -8194,7 +8157,7 @@ V1.0 - Original release Dec 2015 IRQ_CLR Clear Interrupt - 0x01C + 0x1C write-only 0x00000000 @@ -8223,7 +8186,7 @@ V1.0 - Original release Dec 2015 TXFIFOIRQTRG Receive FIFO Interrupt Trigger Value - 0x020 + 0x20 0x00000010 @@ -8236,7 +8199,7 @@ V1.0 - Original release Dec 2015 FIFO_CLR FIFO Clear - 0x024 + 0x24 0x00000000 @@ -8250,9 +8213,9 @@ V1.0 - Original release Dec 2015 PERID Peripheral ID Register - 0x7fc + 0x7FC read-only - 0x002007e9 + 0x002007E9 @@ -8260,29 +8223,27 @@ V1.0 - Original release Dec 2015 DAC1 0x40023800 - - SPW 1.0 SpaceWire Peripheral SPW + SPW 0x40003000 - 0 - 0x00000400 + 0x0 + 0x400 registers SpW 38 - SPW CTRL Control Register - 0x000 + 0x0 0xA2010004 @@ -8441,7 +8402,7 @@ V1.0 - Original release Dec 2015 STS Status/Interrupt Source Register - 0x004 + 0x4 0x06400000 @@ -8509,7 +8470,7 @@ V1.0 - Original release Dec 2015 DEFADDR Node Address Register - 0x008 + 0x8 read-write 0x000000FE @@ -8528,7 +8489,7 @@ V1.0 - Original release Dec 2015 CLKDIV Clock Divisor Register - 0x00C + 0xC read-write 0x00000909 @@ -8547,7 +8508,7 @@ V1.0 - Original release Dec 2015 DKEY Destination Key - 0x010 + 0x10 0x00000000 @@ -8560,7 +8521,7 @@ V1.0 - Original release Dec 2015 TC Time Code Register - 0x014 + 0x14 read-write 0x00000000 @@ -8579,7 +8540,7 @@ V1.0 - Original release Dec 2015 TDR Timer and Disconnect Register - 0x018 + 0x18 read-only 0x00000000 @@ -8598,7 +8559,7 @@ V1.0 - Original release Dec 2015 DMACTRL0 DMA Control Register - 0x020 + 0x20 read-write 0x00000000 @@ -8734,7 +8695,7 @@ V1.0 - Original release Dec 2015 DMAMAXLEN0 DMA RX Maximum Length Register - 0x024 + 0x24 read-write 0x00000000 @@ -8748,7 +8709,7 @@ V1.0 - Original release Dec 2015 DMATXDESC0 DMA Transmitter Descriptor Table Address Register - 0x028 + 0x28 read-write 0x00000000 @@ -8767,7 +8728,7 @@ V1.0 - Original release Dec 2015 DMARXDESC0 DMA Receiver Table Destination Register - 0x02C + 0x2C read-write 0x00000000 @@ -8786,7 +8747,7 @@ V1.0 - Original release Dec 2015 DMAADDR0 DMA Receiver Table Address Register - 0x030 + 0x30 read-write 0x00000000 @@ -8802,577 +8763,17 @@ V1.0 - Original release Dec 2015 - - - - - IRQ_ROUTER 1.0 Interrupt Router Peripheral + IRQ 0x40002000 - 0 - 0x00001000 + 0x0 + 0x1000 registers @@ -9463,12 +8864,11 @@ V1.0 - Original release Dec 2015 TXEV 195 - IRQ DMASEL0 Interrupt select for DMA channel 0 - 0x0000 + 0x0 read-write 0x0000007F @@ -9482,7 +8882,7 @@ V1.0 - Original release Dec 2015 DMASEL1 Interrupt select for DMA channel 1 - 0x0004 + 0x4 read-write 0x0000007F @@ -9496,7 +8896,7 @@ V1.0 - Original release Dec 2015 DMASEL2 Interrupt select for DMA channel 2 - 0x0008 + 0x8 read-write 0x0000007F @@ -9510,7 +8910,7 @@ V1.0 - Original release Dec 2015 DMASEL3 Interrupt select for DMA channel 3 - 0x000C + 0xC read-write 0x0000007F @@ -9524,7 +8924,7 @@ V1.0 - Original release Dec 2015 DMATTSEL Trigger select for the DMA channels - 0x0010 + 0x10 read-write 0x00000000 @@ -9538,7 +8938,7 @@ V1.0 - Original release Dec 2015 ADCSEL Interrupt select for ADC - 0x0014 + 0x14 read-write 0x0000001F @@ -9552,7 +8952,7 @@ V1.0 - Original release Dec 2015 DACSEL0 Interrupt select for DAC0 - 0x0018 + 0x18 read-write 0x0000001F @@ -9566,7 +8966,7 @@ V1.0 - Original release Dec 2015 DACSEL1 Interrupt select for DAC1 - 0x001C + 0x1C read-write 0x0000001F @@ -9580,7 +8980,7 @@ V1.0 - Original release Dec 2015 IRQ_OUT0 DEBUG IRQ_OUT[31:0] - 0x0020 + 0x20 read-only 0x00000000 @@ -9594,7 +8994,7 @@ V1.0 - Original release Dec 2015 IRQ_OUT1 DEBUG IRQ_OUT[63:32] - 0x0024 + 0x24 read-only 0x00000000 @@ -9608,7 +9008,7 @@ V1.0 - Original release Dec 2015 IRQ_OUT2 DEBUG IRQ_OUT[95:64] - 0x0028 + 0x28 read-only 0x00000000 @@ -9622,7 +9022,7 @@ V1.0 - Original release Dec 2015 IRQ_OUT3 DEBUG IRQ_OUT[127:96] - 0x002c + 0x2C read-only 0x00000000 @@ -9636,7 +9036,7 @@ V1.0 - Original release Dec 2015 IRQ_OUT4 DEBUG IRQ_OUT[159:128] - 0x0030 + 0x30 read-only 0x00000000 @@ -9650,7 +9050,7 @@ V1.0 - Original release Dec 2015 IRQ_OUT5 DEBUG IRQ_OUT[179:160] - 0x0034 + 0x34 read-only 0x00000000 @@ -9664,34 +9064,32 @@ V1.0 - Original release Dec 2015 PERID Peripheral ID Register - 0xffc + 0xFFC read-only - 0x028107e9 + 0x028107E9 - - WATCH_DOG 1.0 Watchdog Block Peripheral + WDOG 0x40021000 - 0 - 0x00001000 + 0x0 + 0x1000 registers WATCHDOG 47 - WDOG WDOGLOAD Counter Start Value - 0x0000 + 0x0 read-write 0xFFFFFFFF @@ -9705,7 +9103,7 @@ V1.0 - Original release Dec 2015 WDOGVALUE Down Counter Value - 0x0004 + 0x4 read-only 0xFFFFFFFF @@ -9719,7 +9117,7 @@ V1.0 - Original release Dec 2015 WDOGCONTROL Enable for block reset and interrupt - 0x0008 + 0x8 read-write 0x00000000 @@ -9739,7 +9137,7 @@ V1.0 - Original release Dec 2015 WDOGINTCLR A write of any value clears the WDT module interrupt, and reloads the counter from the value in the WDOGLOAD Register - 0x000C + 0xC read-write 0x00000000 @@ -9753,7 +9151,7 @@ the counter from the value in the WDOGLOAD Register WDOGRIS Raw interrupt status - 0x0010 + 0x10 read-only 0x00000000 @@ -9767,7 +9165,7 @@ the counter from the value in the WDOGLOAD Register WDOGMIS Interrupt status - 0x0014 + 0x14 read-only 0x00000000 @@ -9781,7 +9179,7 @@ the counter from the value in the WDOGLOAD Register WDOGLOCK Lock - 0x00C0 + 0xC0 read-write 0x00000000 @@ -9795,7 +9193,7 @@ the counter from the value in the WDOGLOAD Register WDOGITCR Integration test control - 0x0F00 + 0xF00 read-write 0x00000000 @@ -9809,7 +9207,7 @@ the counter from the value in the WDOGLOAD Register WDOGITOP Integration test output set - 0x0F04 + 0xF04 read-write 0x00000000 @@ -9828,7 +9226,7 @@ the counter from the value in the WDOGLOAD Register WDOGPERIPHID0 Peripheral ID - 0x0FE0 + 0xFE0 read-only 0x00000024 @@ -9842,7 +9240,7 @@ the counter from the value in the WDOGLOAD Register WDOGPERIPHID1 Peripheral ID - 0x0FE4 + 0xFE4 read-only 0x000000B8 @@ -9856,7 +9254,7 @@ the counter from the value in the WDOGLOAD Register WDOGPERIPHID2 Peripheral ID - 0x0FE8 + 0xFE8 read-only 0x0000001B @@ -9870,7 +9268,7 @@ the counter from the value in the WDOGLOAD Register WDOGPERIPHID3 Peripheral ID - 0x0FEC + 0xFEC read-only 0x00000000 @@ -9884,7 +9282,7 @@ the counter from the value in the WDOGLOAD Register WDOGPCELLID0 PrimeCell ID - 0x0FF0 + 0xFF0 read-only 0x0000000D @@ -9898,7 +9296,7 @@ the counter from the value in the WDOGLOAD Register WDOGPCELLID1 PrimeCell ID - 0x0FF4 + 0xFF4 read-only 0x000000F0 @@ -9912,7 +9310,7 @@ the counter from the value in the WDOGLOAD Register WDOGPCELLID2 PrimeCell ID - 0x0FF8 + 0xFF8 read-only 0x00000005 @@ -9926,7 +9324,7 @@ the counter from the value in the WDOGLOAD Register WDOGPCELLID3 PrimeCell ID - 0x0FFC + 0xFFC read-only 0x000000B1 @@ -9939,28 +9337,26 @@ the counter from the value in the WDOGLOAD Register - - TRNG 1.0 True Random Number Generator + TRNG 0x40027000 - 0 - 0x00000400 + 0x0 + 0x400 registers TRNG 42 - TRNG IMR Interrupt Mask Register - 0x0100 + 0x100 read-write 0x0000000F @@ -9989,7 +9385,7 @@ the counter from the value in the WDOGLOAD Register ISR Interrupt Status Register - 0x0104 + 0x104 read-only 0x00000000 @@ -10018,7 +9414,7 @@ the counter from the value in the WDOGLOAD Register ICR Interrupt Clear Register - 0x0108 + 0x108 read-write 0x00000000 @@ -10047,7 +9443,7 @@ the counter from the value in the WDOGLOAD Register CONFIG Configuration Register - 0x010C + 0x10C read-write 0x00000000 @@ -10061,7 +9457,7 @@ the counter from the value in the WDOGLOAD Register VALID Valid Register - 0x0110 + 0x110 read-only 0x00000000 @@ -10075,7 +9471,7 @@ the counter from the value in the WDOGLOAD Register EHR_DATA0 Entropy Holding Register Data Register - 0x0114 + 0x114 read-only 0x00000000 @@ -10089,32 +9485,32 @@ the counter from the value in the WDOGLOAD Register EHR_DATA1 Entropy Holding Register Data Register - 0x0118 + 0x118 EHR_DATA2 Entropy Holding Register Data Register - 0x011C + 0x11C EHR_DATA3 Entropy Holding Register Data Register - 0x0120 + 0x120 EHR_DATA4 Entropy Holding Register Data Register - 0x0124 + 0x124 EHR_DATA5 Entropy Holding Register Data Register - 0x0128 + 0x128 RND_SOURCE_ENABLE Random Source Enable Register - 0x012C + 0x12C read-write 0x00000000 @@ -10128,7 +9524,7 @@ the counter from the value in the WDOGLOAD Register SAMPLE_CNT1 Section TBD - 0x0130 + 0x130 read-write 0x0000FFFF @@ -10142,7 +9538,7 @@ the counter from the value in the WDOGLOAD Register AUTOCORR_STATISTIC Auto-correlator Statistic Register - 0x0134 + 0x134 read-write 0x00000000 @@ -10161,7 +9557,7 @@ the counter from the value in the WDOGLOAD Register DEBUG_CONTROL Section TBD - 0x0138 + 0x138 read-write 0x00000000 @@ -10185,7 +9581,7 @@ the counter from the value in the WDOGLOAD Register SW_RESET Reset Register - 0x0140 + 0x140 read-write 0x00000000 @@ -10199,7 +9595,7 @@ the counter from the value in the WDOGLOAD Register BUSY Busy Register - 0x01B8 + 0x1B8 read-only 0x00000000 @@ -10213,7 +9609,7 @@ the counter from the value in the WDOGLOAD Register RST_BITS_COUNTER Reset Bits Counter Register - 0x01BC + 0x1BC read-write 0x00000000 @@ -10227,7 +9623,7 @@ the counter from the value in the WDOGLOAD Register BIST_CNTR0 BIST Counter Register - 0x01E0 + 0x1E0 read-only 0x00000000 @@ -10241,38 +9637,35 @@ the counter from the value in the WDOGLOAD Register BIST_CNTR1 BIST Counter Register - 0x01E4 + 0x1E4 BIST_CNTR2 BIST Counter Register - 0x01E8 + 0x1E8 - - ETH 1.1 Ethernet Block + ETH 0x40004000 - 0 - 0x00002000 + 0x0 + 0x2000 registers Ethernet 36 - ETH - MAC_CONFIG Operation mode register for the MAC - 0x0000 + 0x0 read-write 0x00000000 @@ -10376,7 +9769,7 @@ the counter from the value in the WDOGLOAD Register MAC_FRAME_FLTR Contains the frame filtering controls - 0x0004 + 0x4 read-write 0x00000000 @@ -10450,7 +9843,7 @@ the counter from the value in the WDOGLOAD Register MAC_GMII_ADDR Controls the management cycles to an external PHY - 0x0010 + 0x10 read-write 0x00000000 @@ -10484,7 +9877,7 @@ the counter from the value in the WDOGLOAD Register MAC_GMII_DATA Contains the data to be written to or read from the PHY register - 0x0014 + 0x14 read-write 0x00000000 @@ -10498,7 +9891,7 @@ the counter from the value in the WDOGLOAD Register MAC_FLOW_CTRL Controls the generation of control frames - 0x0018 + 0x18 read-write 0x00000000 @@ -10542,7 +9935,7 @@ the counter from the value in the WDOGLOAD Register MAC_VLAN_TAG Identifies IEEE 802.1Q VLAN type frames - 0x001C + 0x1C read-write 0x00000000 @@ -10571,7 +9964,7 @@ the counter from the value in the WDOGLOAD Register MAC_DEBUG Gives the status of the various internal blocks for debugging - 0x0024 + 0x24 read-only 0x00000000 @@ -10640,7 +10033,7 @@ the counter from the value in the WDOGLOAD Register MAC_INTR_STAT Contains the interrupt status - 0x0038 + 0x38 read-only 0x00000000 @@ -10674,7 +10067,7 @@ the counter from the value in the WDOGLOAD Register MAC_INTR_MASK Contains the masks for generating interrupt - 0x003C + 0x3C read-write 0x00000000 @@ -10688,7 +10081,7 @@ the counter from the value in the WDOGLOAD Register MAC_ADDR_H Contains the high 16-bits of the first MAC Address - 0x0040 + 0x40 read-write 0x8000FFFF @@ -10709,7 +10102,7 @@ the counter from the value in the WDOGLOAD Register MAC_ADDR_L Contains the Low 32-bits of the first MAC Address - 0x0044 + 0x44 read-write 0xFFFFFFFF @@ -10724,7 +10117,7 @@ the counter from the value in the WDOGLOAD Register MAC_WDOG_TO Controls the watchdog time-out for received frames - 0x00DC + 0xDC read-write 0x00000000 @@ -10740,11 +10133,10 @@ the counter from the value in the WDOGLOAD Register - MMC_CNTRL MMC Control Register - 0x0100 + 0x100 read-write 0x00000000 @@ -10788,7 +10180,7 @@ the counter from the value in the WDOGLOAD Register MMC_INTR_RX MMC Receive Interrupt Register - 0x0104 + 0x104 read-write 0x00000000 @@ -10927,7 +10319,7 @@ the counter from the value in the WDOGLOAD Register MMC_INTR_TX MMC Transmit Interrupt Register - 0x0108 + 0x108 read-write 0x00000000 @@ -11066,7 +10458,7 @@ the counter from the value in the WDOGLOAD Register MMC_INTR_MASK_RX MMC Receive Interrupt Mask Register - 0x010c + 0x10C read-write 0x00000000 @@ -11205,7 +10597,7 @@ the counter from the value in the WDOGLOAD Register MMC_INTR_MASK_TX MMC Transmit Interrupt Mask Register - 0x0110 + 0x110 read-write 0x00000000 @@ -11344,7 +10736,7 @@ the counter from the value in the WDOGLOAD Register TXOCTETCOUNT_GB MMC Transmit Count - 0x0114 + 0x114 read-only 0x00000000 @@ -11358,7 +10750,7 @@ the counter from the value in the WDOGLOAD Register TXFRAMECOUNT_GB MMC Frame Count Register - 0x0118 + 0x118 read-only 0x00000000 @@ -11372,7 +10764,7 @@ the counter from the value in the WDOGLOAD Register TXBCASTFRAMES_G MMC Good Broadcast Frames Register - 0x011c + 0x11C read-only 0x00000000 @@ -11386,7 +10778,7 @@ the counter from the value in the WDOGLOAD Register TXMCASTFRAMES_G MMC Good Multicast Frames Register - 0x0120 + 0x120 read-only 0x00000000 @@ -11400,7 +10792,7 @@ the counter from the value in the WDOGLOAD Register TX64OCT_GB MMC Good and bad Frames transmitted with length 64 - 0x0124 + 0x124 read-only 0x00000000 @@ -11414,7 +10806,7 @@ the counter from the value in the WDOGLOAD Register TX65TO127OCT_GB MMC Good and bad Frames transmitted with length 65 to 127 - 0x0128 + 0x128 read-only 0x00000000 @@ -11428,7 +10820,7 @@ the counter from the value in the WDOGLOAD Register TX128TO255OCT_GB MMC Good and bad Frames transmitted with length 128 to 255 - 0x012c + 0x12C read-only 0x00000000 @@ -11442,7 +10834,7 @@ the counter from the value in the WDOGLOAD Register TX256TO511OCT_GB MMC Good and bad Frames transmitted with length 256 to 511 - 0x0130 + 0x130 read-only 0x00000000 @@ -11456,7 +10848,7 @@ the counter from the value in the WDOGLOAD Register TX512TO1023OCT_GB MMC Good and bad Frames transmitted with length 512 to 1023 - 0x0134 + 0x134 read-only 0x00000000 @@ -11470,7 +10862,7 @@ the counter from the value in the WDOGLOAD Register TX1024MAXOCT_GB MMC Good and bad Frames transmitted with length 1024 to max bytes - 0x0138 + 0x138 read-only 0x00000000 @@ -11484,7 +10876,7 @@ the counter from the value in the WDOGLOAD Register TXUCASTFRAME_GB MMC number of good and bad unicast frames transmitted - 0x013c + 0x13C read-only 0x00000000 @@ -11498,7 +10890,7 @@ the counter from the value in the WDOGLOAD Register TXMCASTFRAME_GB MMC number of good and bad MULTIcast frames transmitted - 0x0140 + 0x140 read-only 0x00000000 @@ -11512,7 +10904,7 @@ the counter from the value in the WDOGLOAD Register TXBCASTFRAME_GB MMC number of good and bad broadcast frames transmitted - 0x0144 + 0x144 read-only 0x00000000 @@ -11526,7 +10918,7 @@ the counter from the value in the WDOGLOAD Register TXUNDERERR MMC number of frames aborted because of frame underflow error - 0x0148 + 0x148 read-only 0x00000000 @@ -11540,7 +10932,7 @@ the counter from the value in the WDOGLOAD Register TXSINGLECOL_G MMC Number of successfully transmitted frames after a single collision - 0x014c + 0x14C read-only 0x00000000 @@ -11554,7 +10946,7 @@ the counter from the value in the WDOGLOAD Register TXMULTICOL_G MMC Number of successfully transmitted frames after multiple collisions - 0x0150 + 0x150 read-only 0x00000000 @@ -11568,7 +10960,7 @@ the counter from the value in the WDOGLOAD Register TXDEFERRED MMC Number of successfully transmitted frames after a deferral - 0x0154 + 0x154 read-only 0x00000000 @@ -11582,7 +10974,7 @@ the counter from the value in the WDOGLOAD Register TXLATECOL MMC Number of aborted frames because of late collision error - 0x0158 + 0x158 read-only 0x00000000 @@ -11596,7 +10988,7 @@ the counter from the value in the WDOGLOAD Register TXEXESSCOL MMC Number of aborted frames because of excessive collision errors - 0x015c + 0x15C read-only 0x00000000 @@ -11610,7 +11002,7 @@ the counter from the value in the WDOGLOAD Register TXCARRIERERROR MMC Number of aborted frames because of carrier sense error - 0x0160 + 0x160 read-only 0x00000000 @@ -11624,7 +11016,7 @@ the counter from the value in the WDOGLOAD Register TXOCTETCOUNT_G MMC Number of bytes transmitted frames only in good frames - 0x0164 + 0x164 read-only 0x00000000 @@ -11638,7 +11030,7 @@ the counter from the value in the WDOGLOAD Register TXFRAMECOUNT_G MMC Number of good frames transmitted - 0x0168 + 0x168 read-only 0x00000000 @@ -11652,7 +11044,7 @@ the counter from the value in the WDOGLOAD Register TXEXCESSDEF MMC Number of frames aborted because of excessive deferral error - 0x016c + 0x16C read-only 0x00000000 @@ -11666,7 +11058,7 @@ the counter from the value in the WDOGLOAD Register TXPAUSEFRAMES MMC Number of good pause frames transmitted - 0x0170 + 0x170 read-only 0x00000000 @@ -11680,7 +11072,7 @@ the counter from the value in the WDOGLOAD Register TXLANFRAMES_G MMC Number of good VLAN frames transmitted - 0x0174 + 0x174 read-only 0x00000000 @@ -11694,7 +11086,7 @@ the counter from the value in the WDOGLOAD Register TXOVERSIZE_G MMC Number of frames transmitted without errors - 0x0178 + 0x178 read-only 0x00000000 @@ -11708,7 +11100,7 @@ the counter from the value in the WDOGLOAD Register RXFRAMECOUNT_GB MMC Number of good and bad frames received - 0x0180 + 0x180 read-only 0x00000000 @@ -11722,7 +11114,7 @@ the counter from the value in the WDOGLOAD Register RXOCTETCOUNT_GB MMC Number of bytes received in good and bad frames - 0x0184 + 0x184 read-only 0x00000000 @@ -11736,7 +11128,7 @@ the counter from the value in the WDOGLOAD Register RXOCTETCOUNT_G MMC Number of bytes received in good frames only - 0x0188 + 0x188 read-only 0x00000000 @@ -11750,7 +11142,7 @@ the counter from the value in the WDOGLOAD Register RXBCASTFRAMES_G MMC Number of good broadcast frames received - 0x018c + 0x18C read-only 0x00000000 @@ -11764,7 +11156,7 @@ the counter from the value in the WDOGLOAD Register RXMCASTFRAMES_G MMC Number of good multicast frames received - 0x0190 + 0x190 read-only 0x00000000 @@ -11778,7 +11170,7 @@ the counter from the value in the WDOGLOAD Register RXCRCERROR MMC Number of frames received with CRC error - 0x0194 + 0x194 read-only 0x00000000 @@ -11792,7 +11184,7 @@ the counter from the value in the WDOGLOAD Register RXALIGNERROR MMC Number of frames received with alignment error - 0x0198 + 0x198 read-only 0x00000000 @@ -11806,7 +11198,7 @@ the counter from the value in the WDOGLOAD Register RXRUNTERROR MMC Number of frames received with runt error - 0x019c + 0x19C read-only 0x00000000 @@ -11820,7 +11212,7 @@ the counter from the value in the WDOGLOAD Register RXJABBERERROR MMC Number of giant frames received with length greater than 1518 bytes and with CRC error - 0x01a0 + 0x1A0 read-only 0x00000000 @@ -11834,7 +11226,7 @@ the counter from the value in the WDOGLOAD Register RXUNDERSIZE_G MMC Number of frames received with length less than 64 bytes - 0x01a4 + 0x1A4 read-only 0x00000000 @@ -11848,7 +11240,7 @@ the counter from the value in the WDOGLOAD Register RXOVERSIZE_G MMC Number of frames received without errors with length greater than the max size - 0x01a8 + 0x1A8 read-only 0x00000000 @@ -11862,7 +11254,7 @@ the counter from the value in the WDOGLOAD Register RX64OCTETS_GB MMC Number of good and bad frames received with length 64 bytes - 0x01ac + 0x1AC read-only 0x00000000 @@ -11876,7 +11268,7 @@ the counter from the value in the WDOGLOAD Register RX65TO127OCT_GB MMC Number of good and bad frames received with length between 65 and 127 bytes - 0x01b0 + 0x1B0 read-only 0x00000000 @@ -11890,7 +11282,7 @@ the counter from the value in the WDOGLOAD Register RX128TO255OCT_GB MMC Number of good and bad frames received with length between 128 and 255 bytes - 0x01b4 + 0x1B4 read-only 0x00000000 @@ -11904,7 +11296,7 @@ the counter from the value in the WDOGLOAD Register RX256TO511OCT_GB MMC Number of good and bad frames received with length between 256 and 511 bytes - 0x01b8 + 0x1B8 read-only 0x00000000 @@ -11918,7 +11310,7 @@ the counter from the value in the WDOGLOAD Register RX512TO1023OCT_GB MMC Number of good and bad frames received with length between 512 and 1023 bytes - 0x01bc + 0x1BC read-only 0x00000000 @@ -11932,7 +11324,7 @@ the counter from the value in the WDOGLOAD Register RX1024MAXOCT_GB MMC Number of good and bad frames received with length between 1024 and max size bytes - 0x01C0 + 0x1C0 read-only 0x00000000 @@ -11946,7 +11338,7 @@ the counter from the value in the WDOGLOAD Register RXUCASTFRAMES_G MMC Number of received good unicast frames - 0x01C4 + 0x1C4 read-only 0x00000000 @@ -11960,7 +11352,7 @@ the counter from the value in the WDOGLOAD Register RXLENGTHERROR MMC Number of frames received with length error - 0x01C8 + 0x1C8 read-only 0x00000000 @@ -11974,7 +11366,7 @@ the counter from the value in the WDOGLOAD Register RXOUTRANGETYPE MMC Number of frames received with length field not equal to the valid frame size - 0x01CC + 0x1CC read-only 0x00000000 @@ -11988,7 +11380,7 @@ the counter from the value in the WDOGLOAD Register RXPAUSEFRAMES MMC Number of good and valid Pause frames received - 0x01D0 + 0x1D0 read-only 0x00000000 @@ -12002,7 +11394,7 @@ the counter from the value in the WDOGLOAD Register RXFIFOOVERFLOW MMC Number of missed received frames because of FIFO overflow - 0x01D4 + 0x1D4 read-only 0x00000000 @@ -12016,7 +11408,7 @@ the counter from the value in the WDOGLOAD Register RXVLANFRAMES_GB MMC Number of good and bad VLAN frames received - 0x01D8 + 0x1D8 read-only 0x00000000 @@ -12030,7 +11422,7 @@ the counter from the value in the WDOGLOAD Register RXWDOGERROR MMC Number of frames received with error because of watchdog timeout error - 0x01DC + 0x1DC read-only 0x00000000 @@ -12044,7 +11436,7 @@ the counter from the value in the WDOGLOAD Register RXRCVERROR MMC Number of frames received with Receive error or Frame Extension error - 0x01E0 + 0x1E0 read-only 0x00000000 @@ -12058,7 +11450,7 @@ the counter from the value in the WDOGLOAD Register RXCTRLFRAMES_G MMC Number of received good control frames - 0x01E4 + 0x1E4 read-only 0x00000000 @@ -12072,7 +11464,7 @@ the counter from the value in the WDOGLOAD Register VLAN_INCREPLACE Holds the VLAN Tag for insertion into or replacement in the transmit frames - 0x0584 + 0x584 read-write 0x00000000 @@ -12101,7 +11493,7 @@ the counter from the value in the WDOGLOAD Register VLAN_HASHTABLE Holds the VLAN Hash Table - 0x0588 + 0x588 read-write 0x00000000 @@ -12115,7 +11507,7 @@ the counter from the value in the WDOGLOAD Register TIMESTAMP_CTRL Controls the IEEE 1588 timestamp generation and update logic - 0x0700 + 0x700 read-write 0x00000000 @@ -12229,7 +11621,7 @@ the counter from the value in the WDOGLOAD Register SUBSEC_INC Holds the 8-bit value by which the Sub-Second register is incremented - 0x0704 + 0x704 read-write 0x00000000 @@ -12243,7 +11635,7 @@ the counter from the value in the WDOGLOAD Register SYSTIME_SECONDS Holds the lower 32 bits of the second field of the system time - 0x0708 + 0x708 read-only 0x00000000 @@ -12257,7 +11649,7 @@ the counter from the value in the WDOGLOAD Register SYSTIME_NANOSEC Holds 32 bits of the nano-second field of the system time - 0x070C + 0x70C read-only 0x00000000 @@ -12271,7 +11663,7 @@ the counter from the value in the WDOGLOAD Register SYSTIME_SECSUPDAT Holds the lower 32 bits of the second field to be written to, added to, or subtracted from the system time value - 0x0710 + 0x710 read-write 0x00000000 @@ -12285,7 +11677,7 @@ the counter from the value in the WDOGLOAD Register SYSTIME_NSECUP Holds 32 bits of the nano-second field to be written to, added to, or subtracted from the system time value - 0x0714 + 0x714 read-write 0x00000000 @@ -12304,7 +11696,7 @@ the counter from the value in the WDOGLOAD Register TIMESTAMPADDEND This register is used by software to re-adjust the clock frequency linearly to match the Master clock frequency - 0x0718 + 0x718 read-write 0x00000000 @@ -12318,7 +11710,7 @@ the counter from the value in the WDOGLOAD Register TARGET_TIME_SECS Holds the high 32-bits of time to be compared with the system time - 0x071C + 0x71C read-write 0x00000000 @@ -12332,7 +11724,7 @@ the counter from the value in the WDOGLOAD Register TARGET_TIME_NSEC Holds the lower 32-bits of time to be compared with the system time - 0x0720 + 0x720 read-write 0x00000000 @@ -12348,7 +11740,6 @@ the counter from the value in the WDOGLOAD Register - DMA_BUS_MODE Controls the DMA Host Interface Mode @@ -12877,4 +12268,4 @@ the counter from the value in the WDOGLOAD Register - + \ No newline at end of file From b41f902a14c3e660c9c9b6d4b5880d7d22a13de7 Mon Sep 17 00:00:00 2001 From: Robin Mueller Date: Tue, 11 Jun 2024 20:24:24 +0200 Subject: [PATCH 5/8] fast blinky --- .cargo/{def-config.toml => config.toml.bak} | 2 +- .gitignore | 5 +- Cargo.toml | 2 +- jlink/JLinkSettings.JLinkScript | 2 +- scripts/VA416xx_Series.yaml | 99 +++++++++++++++++++++ va416xx-hal/Cargo.toml | 14 +-- va416xx-hal/examples/blinky.rs | 33 ++++--- va416xx-hal/src/clock.rs | 14 ++- vorago-peb1/Cargo.toml | 12 +-- vscode/.cortex-debug.peripherals.state.json | 1 + vscode/.cortex-debug.registers.state.json | 1 + {.vscode => vscode}/launch.json | 0 vscode/settings.json | 3 + {.vscode => vscode}/tasks.json | 0 14 files changed, 135 insertions(+), 53 deletions(-) rename .cargo/{def-config.toml => config.toml.bak} (93%) create mode 100644 scripts/VA416xx_Series.yaml create mode 100644 vscode/.cortex-debug.peripherals.state.json create mode 100644 vscode/.cortex-debug.registers.state.json rename {.vscode => vscode}/launch.json (100%) create mode 100644 vscode/settings.json rename {.vscode => vscode}/tasks.json (100%) diff --git a/.cargo/def-config.toml b/.cargo/config.toml.bak similarity index 93% rename from .cargo/def-config.toml rename to .cargo/config.toml.bak index 74cd913..b665ddd 100644 --- a/.cargo/def-config.toml +++ b/.cargo/config.toml.bak @@ -3,7 +3,7 @@ # which option to pick depends on your system # If the RevA board is used, replace jlink.gdb with jlink-reva.gdb # runner = "arm-none-eabi-gdb -q -x jlink/jlink.gdb" -# runner = "gdb-multiarch -q -x jlink/jlink.gdb" +runner = "gdb-multiarch -q -x jlink/jlink.gdb" # runner = "arm-none-eabi-gdb -q -x jlink/jlink-reva.gdb" # runner = "gdb-multiarch -q -x jlink/jlink-reva.gdb" diff --git a/.gitignore b/.gitignore index 61f7439..ee46a83 100644 --- a/.gitignore +++ b/.gitignore @@ -1,6 +1,7 @@ # Generated by Cargo # will have compiled files and executables /target/ +/.vscode # Ignore user config /.cargo/config.toml @@ -11,7 +12,3 @@ Cargo.lock # These are backup files generated by rustfmt **/*.rs.bk - -/.vscode/.cortex-debug.* - -/.vscode/settings.json diff --git a/Cargo.toml b/Cargo.toml index 1556219..51d3076 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -1,5 +1,5 @@ [workspace] - +resolver = "2" members = [ "va416xx", "va416xx-hal", diff --git a/jlink/JLinkSettings.JLinkScript b/jlink/JLinkSettings.JLinkScript index 30ee197..0753b53 100644 --- a/jlink/JLinkSettings.JLinkScript +++ b/jlink/JLinkSettings.JLinkScript @@ -74,4 +74,4 @@ int HandleBeforeFlashProg(void) { int HandleAfterFlashProg(void) { JLINK_SYS_Report("HandleAfterFlashProg()"); return DisableRomProt(); // ROM_PROT = 0x0 -} \ No newline at end of file +} diff --git a/scripts/VA416xx_Series.yaml b/scripts/VA416xx_Series.yaml new file mode 100644 index 0000000..8c4d519 --- /dev/null +++ b/scripts/VA416xx_Series.yaml @@ -0,0 +1,99 @@ +name: VA416xx Series +generated_from_pack: true +pack_file_release: 1.0.5 +variants: +- name: VA416xx + cores: + - name: main + type: armv7em + core_access_options: !Arm + ap: 0 + psel: 0x0 + memory_map: + - !Ram + name: IRAM1 + range: + start: 0x1fff8000 + end: 0x20000000 + cores: + - main + - !Nvm + name: IROM1 + range: + start: 0x0 + end: 0x40000 + is_boot_memory: true + cores: + - main + - !Generic + name: IRAM2 + range: + start: 0x20000000 + end: 0x20008000 + cores: + - main + flash_algorithms: + - va416_spi_fram_256kb + - va416_ebiboot_fram_256kb + - va416_ebi_fram_512kb +flash_algorithms: +- name: va416_spi_fram_256kb + description: VA416_SPI_FRAM_256KB + instructions: RfYMQMTyAQABaMkHCtEBaMkHBL8BaF/qwXED0QFoyQfy0AC/AWjJBgnVAWjJBkS/AWhf6sFhAtUBaMkG8tQDIQFicEdwRwC/WCAIIcTyAQDA8qgBQWBB8ggBTvJRUsTyAgHB9swiwfi4IAAiCmABaCHwCAEBYAC/AL8CaEX2DEFC8AgCxPIBAQJgAiAAv0hgQPIHQEH4DAxA8oIgQfgIDAMgCGIIaMAHCtEIaMAHBL8IaF/qwHAD0QhowAfy0AC/CGjABgnVCGjABkS/CGhf6sBgAtUIaMAG8tQGIMjyAAADIgpiQfgEDApo0gcK0Qpo0gcEvwpoX+rCcgPRCmjSB/LQAL8KaNIGCdUKaNIGRL8KaF/qwmIC1Qpo0gby1AMiCmJB+AQMCGjABwnRCGjABwS/CGhf6sBwAtEIaMAH8tAIaMAGCdUIaMAGRL8IaF/qwGAC1QhowAby1AMgCGIBIEH4BAxP8ABAQfgEDAhowAcK0QhowAcEvwhoX+rAcAPRCGjAB/LQAL8IaMAGCdUIaMAGRL8IaF/qwGAC1QhowAby1AMiACAKYnBHAL9F9gxBxPIBAQhowAcK0QhowAcEvwhoX+rAcAPRCGjAB/LQAL8IaMAGCdUIaMAGRL8IaF/qwGAC1QhowAby1AYgyPIAAAMiCmJB+AQMCmjSBwrRCmjSBwS/Cmhf6sJyA9EKaNIH8tAAvwpo0gYJ1Qpo0gZEvwpoX+rCYgLVCmjSBvLUAyIKYgEi9zBB+AQsQfgEDAhowAcJ0QhowAcEvwhoX+rAcALRCGjAB/LQCGjABgnVCGjABkS/CGhf6sBgAtUIaMAG8tQDIgAgCmJwRwC/cLVF9gxBQPIGDAAgxPIBAcjyAAwDI0/wAg5P8ABCACQG4AC/ATS09YBvC2IA8KyAQfgEzA1o7QcK0Q1o7QcEvw1oX+rFdQPRDWjtB/LQAL8NaO0GCtUNaO0GRL8NaF/qxWUD1Q1o7Qby1AC/xPMHJQtiQfgE7EH4BFzlskH4BFwAJUH4BFwE4AU1/y1B+AQMTNAOaLYHBtQOaLYHXL8OaF/qhnY+1UH4BAwOaLYHCdQOaLYHXL8OaF/qhnYC1A5otgfy1UH4BAwOaLYHCtQOaLYHXL8OaF/qhnYD1A5otgfy1QC/QfgEDA5otgcK1A5otgdcvw5oX+qGdgPUDmi2B/LVAL9B+AQMDmi2B7zUDmi2B1y/Dmhf6oZ2tdQOaLYH8tWx5w5otgez1bznDWitBwrUDWitB1y/DWhf6oV1A9QNaK0H8tUAv0H4BCwNaO0HCtENaO0HBL8NaF/qxXUD0Q1o7Qfy0AC/DWjtBn/1Wq8NaO0GRL8NaF/qxWV/9VKvDWjtBvDUTecAIHC9ACBwR4C1grBF9gxOxPIBDgAjAZPe+AAw2wcN0d74ADDbBwS/3vgAMF/qw3ME0d74ADDbB+7QAL/e+AAw2wYM1d74ADDbBkS/3vgAMF/qw2MD1d74ADDbBu7UAyPO+CAwBiPI8gADTvgEPN74ADDbBwzR3vgAMNsHBL/e+AAwX+rDcwPR3vgAMNsH7tDe+AAw2wYM1d74ADDbBkS/3vgAMF/qw2MD1d74ADDbBu7UAyPO+CAwAiNN9vAMTvgEPMDzB0PP9v98TvgEPMDzByPAsgEpTvgEPE74BAxA8JKA3vgAAIAHAPEGgd74AACAB1y/3vgAAF/qgHAA8fyA3vgAAIAHXL/e+AAAX+qAcADx8oDe+AAAgAdcv974AABf6oBwAPHogN74AACAB1y/3vgAAF/qgHAA8d6A3vgAAIAHXL/e+AAAX+qAcADx1IDe+AAAgAdcv974AABf6oBwAPHKgN74AACAB1y/3vgAAF/qgHAA8cCA3vgAAIAHXL/e+AAAX+qAcADxtoDe+AAAgAdcv974AABf6oBwAPGsgN74AACAB1y/3vgAAF/qgHAA8aKA3vgAAIAHXL/e+AAAX+qAcADxmIDe+AAAgAdcv974AABf6oBwAPGOgBzxGQx/9H+vheAAvxL4AQsBOU74BAxe+AQMASkAkAGYAPEBAAGQP/Rur2BG3vgAMJsH69Te+AAwmwdcv974ADBf6oNz4tTe+AAwmwdcv974ADBf6oNz2dTe+AAwmwdcv974ADBf6oNz0NTe+AAwmwdcv974ADBf6oNzx9Te+AAwmwdcv974ADBf6oNzvtTe+AAwmwdcv974ADBf6oNztdTe+AAwmwdcv974ADBf6oNzrNTe+AAwmwdcv974ADBf6oNzo9Te+AAwmwdcv974ADBf6oNzmtTe+AAwmwdcv974ADBf6oNzkdTe+AAwmwdcv974ADBf6oNzP/WIr974ADCbB1y/3vgAMF/qg3M/9X6vGTB/9IuvASACsIC9EHgA8QBATvgEDN74AADABwzR3vgAAMAHBL/e+AAAX+rAcAPR3vgAAMAH7tDe+AAAwAYM1d74AADABkS/3vgAAF/qwGAD1d74AADABu7UAyDO+CAAACACsIC9AL8AIHBHsLVF9gxExPIBBCNo2wcJ0SNo2wcEvyNoX+rDcwLRI2jbB/LQI2jbBgnVI2jbBkS/I2hf6sNjAtUjaNsG8tQDIyNiRPgEPMDzB0NE+AQ8wPMHI0T4BDzDskT4BDwAI0T4BDwjaFsHCdQjaFsHXL8jaF/qQ3MC1CNoWwfy1VT4BDwAI0T4BDwjaFsHCdQjaFsHXL8jaF/qQ3MC1CNoWwfy1VT4BDwAI0T4BDwjaFsHCdQjaFsHXL8jaF/qQ3MC1CNoWwfy1VT4BDwAI0T4BDwjaFsHCdQjaFsHXL8jaF/qQ3MC1CNoWwfy1VT4BDwBs0/wAAxP8AAOAL9E+ATMI2hbBwrUI2hbB1y/I2hf6kNzA9QjaFsH8tUAv1T4BDwVeNuynUIo0Q7xAQ6ORQLxAQLj0U/wAEJE+AQsImjSBwrRImjSBwS/Imhf6sJyA9EiaNIH8tAAvyJo0gYJ1SJo0gZEvyJoX+rCYgLVImjSBvLUAyIIRCJisL1wRLC9AAAAAAAA + pc_init: 0x49 + pc_uninit: 0x1ad + pc_program_page: 0x40d + pc_erase_sector: 0x409 + pc_erase_all: 0x27d + data_section_offset: 0x8d8 + flash_properties: + address_range: + start: 0x0 + end: 0x40000 + page_size: 0x100 + erased_byte_value: 0x0 + program_page_timeout: 3000 + erase_sector_timeout: 3000 + sectors: + - size: 0x2000 + address: 0x0 +- name: va416_ebiboot_fram_256kb + description: VA416_EBIBOOT_256KB + instructions: QfKAAsTyAQJS+CAwI/TAQ0PqQTFC+CAQcEcAv0HywALE8gECUvggMCP0wEND6kExQvggEHBHAL9B8gASxPIBAlL4IDAj9MBDQ+pBMUL4IBBwRwC/QfJAEsTyAQJS+CAwI/TAQ0PqQTFC+CAQcEcAv0HyiADE8gEAAmgBIWHzTjICYEJoYfNOMkJggmhh804ygmDCaGHzTjLCYAJpYfNOMgJhQmlh804yQmGCaWHzTjKCYcJpYfNOMsJhAmph804yAmJCamHzTjJCYoJqYfNOMoJiwmph804ywmICa2HzTjICY0JrYfNOMkJjgmth804ygmPCa2HzTjLCYwJsYfNOMgJkQmxh804yQmSCbGHzTjKCZMJsYfNOMsJkAm1h804yAmVCbWHzTjJCZYJtYfNOMoJlwm1h804ywmUCbmHzTjICZkJuYfNOMkJmgm5h804ygmbCbmHzTjLCZgJvYfNOMgJnQm9h804yQmeCb2HzTjKCZ8JvYfNOMsJn0PiAIGHzTjLA+IAg0PiEIGHzTjLA+IQg0PiIIGHzTjLA+Igg0PiMIGHzTjLA+Iwg0PiQIGHzTjLA+JAg0PiUIGHzTjLA+JQg0PiYIGHzTjLA+Jgg0PicIGHzTjLA+Jwg0PioIGHzTjLA+Kgg0PisIGHzTjLA+Kwg0PiwIGHzTjLA+LAg0Pi0IGHzTjLA+LQg0Pi4IGHzTjLA+Lgg0Pi8IGHzTjLA+LwgcEcQtVgkACDE8gEEw/Y5QGBgIGhA9IAwIGD/9xj/T/YAccDytjEAIGFhEL0AvwAgcEeAtU/wwEBP9IAhAPA7+AAggL0AvwAgcEcB8AEDGURLCCnQWR4A8cBAAykD8AMME9Mj8AMDMvgIGwQ7IPgIGzL4Bhwg+AYcMvgEHCD4BBwy+AIcIPgCHO3RvPEADwvQEYi88QEPAYAG0FGIvPECD0GAHL+RiIGAACBwRwC/ACBwRwhEcEdP8AACALUTRpRGlkYgOSK/oOgMUKDoDFCx8SABv/T3rwkHKL+g6AxQSL8MwF34BOuJACi/QPgEKwi/cEdIvyD4AisR8IBPGL8A+AErcEcAAAAAAAA= + pc_init: 0x225 + pc_uninit: 0x251 + pc_program_page: 0x26d + pc_erase_sector: 0x269 + pc_erase_all: 0x255 + data_section_offset: 0x328 + flash_properties: + address_range: + start: 0x0 + end: 0x40000 + page_size: 0x100 + erased_byte_value: 0x0 + program_page_timeout: 3000 + erase_sector_timeout: 3000 + sectors: + - size: 0x2000 + address: 0x0 +- name: va416_ebi_fram_512kb + description: VA416_EBI_512KB + instructions: QfKAAsTyAQJS+CAwI/TAQ0PqQTFC+CAQcEcAv0HywALE8gECUvggMCP0wEND6kExQvggEHBHAL9B8gASxPIBAlL4IDAj9MBDQ+pBMUL4IBBwRwC/QfJAEsTyAQJS+CAwI/TAQ0PqQTFC+CAQcEcAv0HyiADE8gEAAmgBIWHzTjICYEJoYfNOMkJggmhh804ygmDCaGHzTjLCYAJpYfNOMgJhQmlh804yQmGCaWHzTjKCYcJpYfNOMsJhAmph804yAmJCamHzTjJCYoJqYfNOMoJiwmph804ywmICa2HzTjICY0JrYfNOMkJjgmth804ygmPCa2HzTjLCYwJsYfNOMgJkQmxh804yQmSCbGHzTjKCZMJsYfNOMsJkAm1h804yAmVCbWHzTjJCZYJtYfNOMoJlwm1h804ywmUCbmHzTjICZkJuYfNOMkJmgm5h804ygmbCbmHzTjLCZgJvYfNOMgJnQm9h804yQmeCb2HzTjKCZ8JvYfNOMsJn0PiAIGHzTjLA+IAg0PiEIGHzTjLA+IQg0PiIIGHzTjLA+Igg0PiMIGHzTjLA+Iwg0PiQIGHzTjLA+JAg0PiUIGHzTjLA+JQg0PiYIGHzTjLA+Jgg0PicIGHzTjLA+Jwg0PioIGHzTjLA+Kgg0PisIGHzTjLA+Kwg0PiwIGHzTjLA+LAg0Pi0IGHzTjLA+LQg0Pi4IGHzTjLA+Lgg0Pi8IGHzTjLA+LwgcEcQtVgkxPIBBCBoQPSAMCBgACDD9jlAYGD/9xj/T/YAcMDytjBgYU7yhBDO8gAAT/QAUQFgRvIAAb/zT4/E8gABGCC/82+PiGAwIgAgCmAQvQAgcEeAtU/wgFBP9AAhAPB4+AAggL0AvwAgcEcB8AEDGURLCCfQWR4DKQPwAwwT0yPwAwMy+AgbBDsg+AgbMvgGHCD4Bhwy+AQcIPgEHDL4Ahwg+AIc7dG88QAPC9ARiLzxAQ8BgAbQUYi88QIPQYAcv5GIgYAAIHBHAL8AIHBHLenwRQHwAQMZRF/qUQwr0OJGvPEBD5i/T/ABCsrxAA6q8QEIACMw+BNQMvgTYLVCItGYRRjQAutDBQDrQwZ3iGyIp0IT0Q7rAwe8HAzQtIipiIxCDdH5HAbQ8YjsiKFCCdEEM5pF3tFgRL3o8IUBMwLgAjMA4AMzT+pDDGBEvejwhU/wAAIAtRNGlEaWRiA5Ir+g6AxQoOgMULHxIAG/9PevCQcov6DoDFBIvwzAXfgE64kAKL9A+AQrCL9wR0i/IPgCKxHwgE8YvwD4AStwRwAAAAA= + pc_init: 0x225 + pc_uninit: 0x275 + pc_program_page: 0x291 + pc_erase_sector: 0x28d + pc_erase_all: 0x279 + data_section_offset: 0x3c4 + flash_properties: + address_range: + start: 0x10000000 + end: 0x10080000 + page_size: 0x100 + erased_byte_value: 0x0 + program_page_timeout: 3000 + erase_sector_timeout: 3000 + sectors: + - size: 0x2000 + address: 0x0 diff --git a/va416xx-hal/Cargo.toml b/va416xx-hal/Cargo.toml index 3c690f4..6c0cecd 100644 --- a/va416xx-hal/Cargo.toml +++ b/va416xx-hal/Cargo.toml @@ -11,8 +11,9 @@ keywords = ["no-std", "hal", "cortex-m", "vorago", "va416xx"] categories = ["embedded", "no-std", "hardware-support"] [dependencies] -cortex-m = "0.7" -cortex-m-rt = "0.7.1" +# cortex-m = "0.7" +cortex-m = { version = "0.7.6", features = ["critical-section-single-core"]} +cortex-m-rt = "0.7" nb = "1" [dependencies.va416xx] @@ -26,11 +27,4 @@ rt = ["va416xx/rt"] panic-rtt-target = { version = "0.1", features = ["cortex-m"] } rtt-target = { version = "0.3", features = ["cortex-m"] } panic-halt = "0.2" - -[profile.dev] -debug = true -lto = false - -[profile.release] -lto = true -debug = true +#cortex-m = { version = "0.7.6", features = ["critical-section-single-core"]} diff --git a/va416xx-hal/examples/blinky.rs b/va416xx-hal/examples/blinky.rs index 689181c..8db2fa1 100644 --- a/va416xx-hal/examples/blinky.rs +++ b/va416xx-hal/examples/blinky.rs @@ -2,7 +2,7 @@ #![no_main] #![no_std] -use cortex_m_rt::{entry}; +use cortex_m_rt::entry; use panic_halt as _; use va416xx_hal::pac; @@ -11,27 +11,24 @@ const LED_PG5: u32 = 1 << 5; #[entry] fn main() -> ! { - let dp = pac::Peripherals::take().unwrap(); + // SAFETY: Peripherals are only stolen once here. + let dp = unsafe { pac::Peripherals::steal() }; // Enable all peripheral clocks - dp.SYSCONFIG - .peripheral_clk_enable + dp.sysconfig + .peripheral_clk_enable() .modify(|_, w| unsafe { w.bits(0xffffffff) }); - dp.PORTG.dir().modify(|_, w| unsafe { w.bits(LED_PG5) }); - dp.PORTG.datamask().modify(|_, w| unsafe { w.bits(LED_PG5)}); + dp.portg.dir().modify(|_, w| unsafe { w.bits(LED_PG5) }); + dp.portg + .datamask() + .modify(|_, w| unsafe { w.bits(LED_PG5) }); for _ in 0..10 { - dp.PORTG - .clrout() - .write(|w| unsafe { w.bits(LED_PG5) }); - cortex_m::asm::delay(5_000_000); - dp.PORTG - .setout() - .write(|w| unsafe { w.bits(LED_PG5) }); - cortex_m::asm::delay(5_000_000); + dp.portg.clrout().write(|w| unsafe { w.bits(LED_PG5) }); + cortex_m::asm::delay(2_000_000); + dp.portg.setout().write(|w| unsafe { w.bits(LED_PG5) }); + cortex_m::asm::delay(2_000_000); } loop { - dp.PORTG - .togout() - .write(|w| unsafe { w.bits(LED_PG5) }); - cortex_m::asm::delay(25_000_000); + dp.portg.togout().write(|w| unsafe { w.bits(LED_PG5) }); + cortex_m::asm::delay(2_000_000); } } diff --git a/va416xx-hal/src/clock.rs b/va416xx-hal/src/clock.rs index b53f636..1b20ccd 100644 --- a/va416xx-hal/src/clock.rs +++ b/va416xx-hal/src/clock.rs @@ -1,7 +1,5 @@ -//! # API for clock related functionality -//! //! This also includes functionality to enable the peripheral clocks -use va416xx::SYSCONFIG; +use va416xx::Sysconfig; #[derive(Copy, Clone, PartialEq)] pub enum PeripheralSelect { @@ -35,17 +33,17 @@ pub enum PeripheralSelect { PortD = 27, PortE = 28, PortF = 29, - PortG = 30 + PortG = 30, } -pub fn enable_peripheral_clock(syscfg: &mut SYSCONFIG, clock: PeripheralSelect) { +pub fn enable_peripheral_clock(syscfg: &mut Sysconfig, clock: PeripheralSelect) { syscfg - .peripheral_clk_enable + .peripheral_clk_enable() .modify(|r, w| unsafe { w.bits(r.bits() | (1 << clock as u8)) }); } -pub fn disable_peripheral_clock(syscfg: &mut SYSCONFIG, clock: PeripheralSelect) { +pub fn disable_peripheral_clock(syscfg: &mut Sysconfig, clock: PeripheralSelect) { syscfg - .peripheral_clk_enable + .peripheral_clk_enable() .modify(|r, w| unsafe { w.bits(r.bits() & !(1 << clock as u8)) }); } diff --git a/vorago-peb1/Cargo.toml b/vorago-peb1/Cargo.toml index 0563078..585755a 100644 --- a/vorago-peb1/Cargo.toml +++ b/vorago-peb1/Cargo.toml @@ -12,8 +12,8 @@ categories = ["embedded", "no-std", "hardware-support"] [dependencies] cortex-m = "0.7" -cortex-m-rt = "0.7.1" -embedded-hal = { version = "0.2.6", features = ["unproven"] } +cortex-m-rt = "0.7" +embedded-hal = "1" [dependencies.va416xx-hal] path = "../va416xx-hal" @@ -26,11 +26,3 @@ rt = ["va416xx-hal/rt"] panic-rtt-target = { version = "0.1", features = ["cortex-m"] } rtt-target = { version = "0.3", features = ["cortex-m"] } panic-halt = "0.2" - -[profile.dev] -debug = true -lto = false - -[profile.release] -lto = true -debug = true diff --git a/vscode/.cortex-debug.peripherals.state.json b/vscode/.cortex-debug.peripherals.state.json new file mode 100644 index 0000000..0637a08 --- /dev/null +++ b/vscode/.cortex-debug.peripherals.state.json @@ -0,0 +1 @@ +[] \ No newline at end of file diff --git a/vscode/.cortex-debug.registers.state.json b/vscode/.cortex-debug.registers.state.json new file mode 100644 index 0000000..0637a08 --- /dev/null +++ b/vscode/.cortex-debug.registers.state.json @@ -0,0 +1 @@ +[] \ No newline at end of file diff --git a/.vscode/launch.json b/vscode/launch.json similarity index 100% rename from .vscode/launch.json rename to vscode/launch.json diff --git a/vscode/settings.json b/vscode/settings.json new file mode 100644 index 0000000..e78c4ec --- /dev/null +++ b/vscode/settings.json @@ -0,0 +1,3 @@ +{ + "cortex-debug.gdbPath.linux": "gdb-multiarch" +} diff --git a/.vscode/tasks.json b/vscode/tasks.json similarity index 100% rename from .vscode/tasks.json rename to vscode/tasks.json From fbad23b9adab70a2b9f9722528c3c122efec89da Mon Sep 17 00:00:00 2001 From: Robin Mueller Date: Tue, 11 Jun 2024 21:14:49 +0200 Subject: [PATCH 6/8] update def-config.toml --- .cargo/config.toml.bak | 39 --------------------------------------- .cargo/def-config.toml | 38 ++++++++++++++++++++++++++++++++++++++ 2 files changed, 38 insertions(+), 39 deletions(-) delete mode 100644 .cargo/config.toml.bak create mode 100644 .cargo/def-config.toml diff --git a/.cargo/config.toml.bak b/.cargo/config.toml.bak deleted file mode 100644 index b665ddd..0000000 --- a/.cargo/config.toml.bak +++ /dev/null @@ -1,39 +0,0 @@ -[target.'cfg(all(target_arch = "arm", target_os = "none"))'] -# uncomment ONE of these three option to make `cargo run` start a GDB session -# which option to pick depends on your system -# If the RevA board is used, replace jlink.gdb with jlink-reva.gdb -# runner = "arm-none-eabi-gdb -q -x jlink/jlink.gdb" -runner = "gdb-multiarch -q -x jlink/jlink.gdb" - -# runner = "arm-none-eabi-gdb -q -x jlink/jlink-reva.gdb" -# runner = "gdb-multiarch -q -x jlink/jlink-reva.gdb" - -rustflags = [ - # This is needed if your flash or ram addresses are not aligned to 0x10000 in memory.x - # See https://github.com/rust-embedded/cortex-m-quickstart/pull/95 - "-C", "link-arg=--nmagic", - - # LLD (shipped with the Rust toolchain) is used as the default linker - "-C", "link-arg=-Tlink.x", - - # if you run into problems with LLD switch to the GNU linker by commenting out - # this line - # "-C", "linker=arm-none-eabi-ld", - - # if you need to link to pre-compiled C libraries provided by a C toolchain - # use GCC as the linker by commenting out both lines above and then - # uncommenting the three lines below - # "-C", "linker=arm-none-eabi-gcc", - # "-C", "link-arg=-Wl,-Tlink.x", - # "-C", "link-arg=-nostartfiles", -] - -[build] -# Pick ONE of these compilation targets -# target = "thumbv6m-none-eabi" # Cortex-M0 and Cortex-M0+ -# target = "thumbv7m-none-eabi" # Cortex-M3 -# target = "thumbv7em-none-eabi" # Cortex-M4 and Cortex-M7 (no FPU) -target = "thumbv7em-none-eabihf" # Cortex-M4F and Cortex-M7F (with FPU) -# target = "thumbv8m.base-none-eabi" # Cortex-M23 -# target = "thumbv8m.main-none-eabi" # Cortex-M33 (no FPU) -# target = "thumbv8m.main-none-eabihf" # Cortex-M33 (with FPU) \ No newline at end of file diff --git a/.cargo/def-config.toml b/.cargo/def-config.toml new file mode 100644 index 0000000..611beb2 --- /dev/null +++ b/.cargo/def-config.toml @@ -0,0 +1,38 @@ +[target.'cfg(all(target_arch = "arm", target_os = "none"))'] +runner = "gdb-multiarch -q -x jlink/jlink.gdb" +# runner = "arm-none-eabi-gdb -q -x jlink/jlink-reva.gdb" +# runner = "gdb-multiarch -q -x jlink/jlink-reva.gdb" + +# Probe-rs is currently problematic, possibly because of the +# ROM protection? +# runner = "probe-rs run --chip-description-path ./scripts/VA416xx_Series.yaml" +# runner = ["probe-rs", "run", "--chip", "$CHIP", "--log-format", "{L} {s}"] + + +rustflags = [ + "-C", + "link-arg=-Tlink.x", + # "-C", + # "linker=flip-link", + # "-C", + # "link-arg=-Tdefmt.x", + # This is needed if your flash or ram addresses are not aligned to 0x10000 in memory.x + # See https://github.com/rust-embedded/cortex-m-quickstart/pull/95 + "-C", + "link-arg=--nmagic", +] + +[build] +# (`thumbv6m-*` is compatible with all ARM Cortex-M chips but using the right +# target improves performance) +# target = "thumbv6m-none-eabi" # Cortex-M0 and Cortex-M0+ +# target = "thumbv7m-none-eabi" # Cortex-M3 +# target = "thumbv7em-none-eabi" # Cortex-M4 and Cortex-M7 (no FPU) +target = "thumbv7em-none-eabihf" # Cortex-M4F and Cortex-M7F (with FPU) + +[alias] +rb = "run --bin" +rrb = "run --release --bin" + +[env] +DEFMT_LOG = "info" From 841b8e1273a329cee82909fff0c86e30a9f6f28d Mon Sep 17 00:00:00 2001 From: Robin Mueller Date: Tue, 11 Jun 2024 23:26:32 +0200 Subject: [PATCH 7/8] nothing but issues --- jlink/JLinkSettings.JLinkScript | 27 +++++---------------------- scripts/VA416xx_Series.yaml | 4 ++-- 2 files changed, 7 insertions(+), 24 deletions(-) diff --git a/jlink/JLinkSettings.JLinkScript b/jlink/JLinkSettings.JLinkScript index 0753b53..68b4de5 100644 --- a/jlink/JLinkSettings.JLinkScript +++ b/jlink/JLinkSettings.JLinkScript @@ -14,30 +14,13 @@ Purpose : J-Link target setup file for VORAGO VA416xx ---------------------------END-OF-HEADER------------------------------ */ -int DisableRomProt(void) { - JLINK_SYS_Report("VA416XX: Disabling ROM protection"); - return JLINK_MEM_WriteU32(0x40010010, 0x1); // ROM_PROT = 0x1 -} - -int DisableWatchdog(void) { - JLINK_MEM_WriteU32(0x400210C0, 0x1ACCE551); // WDOGLOCK = 0x1ACCE551 - JLINK_MEM_WriteU32(0x40021008, 0x0); // WDOGCONTROL = 0x0 (diable) -} - -int SetupTarget (void) { - JLINK_SYS_Report("SetupTarget()"); - return DisableRomProt(); // ROM_PROT = 0x1 -} - /********************************************************************* * * AfterResetTarget */ int AfterResetTarget (void) { JLINK_SYS_Report("AfterResetTarget()"); - // disable watchdog and unlock code RAM for write - DisableWatchdog(); - return DisableRomProt(); // ROM_PROT = 0x1 + return JLINK_MEM_WriteU32(0x40010010, 0x1); // ROM_PROT = 0x1 } /********************************************************************* @@ -46,7 +29,7 @@ int AfterResetTarget (void) { */ int BeforeTargetDownload (void) { JLINK_SYS_Report("BeforeTargetDownload()"); - return DisableRomProt(); // ROM_PROT = 0x1 + return JLINK_MEM_WriteU32(0x40010010, 0x1); // ROM_PROT = 0x1 } /********************************************************************* @@ -55,7 +38,7 @@ int BeforeTargetDownload (void) { */ int AfterTargetDownload (void) { JLINK_SYS_Report("AfterTargetDownload()"); - return DisableRomProt(); // ROM_PROT = 0x0 + return JLINK_MEM_WriteU32(0x40010010, 0x0); // ROM_PROT = 0x0 } /********************************************************************* @@ -64,7 +47,7 @@ int AfterTargetDownload (void) { */ int HandleBeforeFlashProg(void) { JLINK_SYS_Report("HandleBeforeFlashProg()"); - return DisableRomProt(); // ROM_PROT = 0x1 + return JLINK_MEM_WriteU32(0x40010010, 0x1); // ROM_PROT = 0x1 } /********************************************************************* @@ -73,5 +56,5 @@ int HandleBeforeFlashProg(void) { */ int HandleAfterFlashProg(void) { JLINK_SYS_Report("HandleAfterFlashProg()"); - return DisableRomProt(); // ROM_PROT = 0x0 + return JLINK_MEM_WriteU32(0x40010010, 0x0); // ROM_PROT = 0x0 } diff --git a/scripts/VA416xx_Series.yaml b/scripts/VA416xx_Series.yaml index 8c4d519..21cc187 100644 --- a/scripts/VA416xx_Series.yaml +++ b/scripts/VA416xx_Series.yaml @@ -34,8 +34,8 @@ variants: - main flash_algorithms: - va416_spi_fram_256kb - - va416_ebiboot_fram_256kb - - va416_ebi_fram_512kb + # - va416_ebiboot_fram_256kb + # - va416_ebi_fram_512kb flash_algorithms: - name: va416_spi_fram_256kb description: VA416_SPI_FRAM_256KB From 4bddc009bcea4e6c2751f7fbfd2e7cf3d56c0557 Mon Sep 17 00:00:00 2001 From: Robin Mueller Date: Tue, 11 Jun 2024 23:59:09 +0200 Subject: [PATCH 8/8] rtt logging works --- va416xx-hal/Cargo.toml | 9 ++++----- va416xx-hal/examples/rtt-log.rs | 24 +++++++++++++++++++++--- vorago-peb1/Cargo.toml | 5 +++-- 3 files changed, 28 insertions(+), 10 deletions(-) diff --git a/va416xx-hal/Cargo.toml b/va416xx-hal/Cargo.toml index 6c0cecd..91f4c7e 100644 --- a/va416xx-hal/Cargo.toml +++ b/va416xx-hal/Cargo.toml @@ -11,8 +11,7 @@ keywords = ["no-std", "hal", "cortex-m", "vorago", "va416xx"] categories = ["embedded", "no-std", "hardware-support"] [dependencies] -# cortex-m = "0.7" -cortex-m = { version = "0.7.6", features = ["critical-section-single-core"]} +cortex-m = "0.7" cortex-m-rt = "0.7" nb = "1" @@ -24,7 +23,7 @@ version = "0.1.0" rt = ["va416xx/rt"] [dev-dependencies] -panic-rtt-target = { version = "0.1", features = ["cortex-m"] } -rtt-target = { version = "0.3", features = ["cortex-m"] } +panic-rtt-target = { version = "0.1.3" } +rtt-target = { version = "0.5" } panic-halt = "0.2" -#cortex-m = { version = "0.7.6", features = ["critical-section-single-core"]} +cortex-m = { version = "0.7.6", features = ["critical-section-single-core"]} diff --git a/va416xx-hal/examples/rtt-log.rs b/va416xx-hal/examples/rtt-log.rs index 80ce490..a62c369 100644 --- a/va416xx-hal/examples/rtt-log.rs +++ b/va416xx-hal/examples/rtt-log.rs @@ -1,20 +1,38 @@ -//! Code to test RTT logger functionality +//! Code to test RTT logger functionality. #![no_main] #![no_std] use cortex_m_rt::entry; -use panic_halt as _; +use panic_rtt_target as _; use rtt_target::{rprintln, rtt_init_print}; use va416xx as _; +use va416xx_hal::pac; + +// Mask for the LED +const LED_PG5: u32 = 1 << 5; #[entry] fn main() -> ! { + // SAFETY: Peripherals are only stolen once here. + let dp = unsafe { pac::Peripherals::steal() }; + // Enable all peripheral clocks + dp.sysconfig + .peripheral_clk_enable() + .modify(|_, w| unsafe { w.bits(0xffffffff) }); + dp.portg.dir().modify(|_, w| unsafe { w.bits(LED_PG5) }); + dp.portg + .datamask() + .modify(|_, w| unsafe { w.bits(LED_PG5) }); + rtt_init_print!(); rprintln!("-- RTT Demo --"); let mut counter = 0; loop { rprintln!("{}: Hello, world!", counter); + // Still toggle LED. If there are issues with the RTT log, the LED + // blinking ensures that the application is actually running. + dp.portg.togout().write(|w| unsafe { w.bits(LED_PG5) }); counter += 1; - cortex_m::asm::delay(75_000_000); + cortex_m::asm::delay(10_000_000); } } diff --git a/vorago-peb1/Cargo.toml b/vorago-peb1/Cargo.toml index 585755a..4932f59 100644 --- a/vorago-peb1/Cargo.toml +++ b/vorago-peb1/Cargo.toml @@ -23,6 +23,7 @@ version = "0.1.0" rt = ["va416xx-hal/rt"] [dev-dependencies] -panic-rtt-target = { version = "0.1", features = ["cortex-m"] } -rtt-target = { version = "0.3", features = ["cortex-m"] } +panic-rtt-target = { version = "0.1.3" } +rtt-target = { version = "0.5" } panic-halt = "0.2" +cortex-m = { version = "0.7.6", features = ["critical-section-single-core"]}