prepare HAL release
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This commit is contained in:
Robin Müller 2024-09-30 14:13:11 +02:00
parent bea5a852a2
commit 246b084429
Signed by: muellerr
GPG Key ID: A649FB78196E3849
2 changed files with 4 additions and 2 deletions

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@ -8,6 +8,8 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
# [unreleased]
# [v0.3.0] 2024-30-09
## Changed
- Improve and fix SPI abstractions. Add new low level interface. The primary SPI constructor now

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@ -895,7 +895,7 @@ impl<Uart: Instance> Tx<Uart> {
///
/// This does not necesarily mean that the FIFO can process another word because it might be
/// full.
/// Use the [Self::read_fifo] function to write a word to the FIFO reliably using the [nb]
/// Use the [Self::write_fifo] function to write a word to the FIFO reliably using the [nb]
/// API.
#[inline(always)]
pub fn write_fifo_unchecked(&self, data: u32) {
@ -948,7 +948,7 @@ impl<Uart: Instance> embedded_io::Write for Tx<Uart> {
/// Serial receiver, using interrupts to offload reading to the hardware.
///
/// You can use [Rx::to_rx_with_irq] to convert a normal [Rx] structure into this structure.
/// You can use [Rx::into_rx_with_irq] to convert a normal [Rx] structure into this structure.
/// This structure provides two distinct ways to read the UART RX using interrupts. It should
/// be noted that the interrupt service routine (ISR) still has to be provided by the user. However,
/// this structure provides API calls which can be used inside the ISRs to simplify the reading