UART with IRQ + Embassy example
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@ -7,6 +7,7 @@ edition = "2021"
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cortex-m = { version = "0.7", features = ["critical-section-single-core"] }
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cortex-m-rt = "0.7"
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embedded-hal = "1"
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embedded-io = "0.6"
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rtt-target = { version = "0.5" }
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panic-rtt-target = { version = "0.1" }
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@ -16,6 +17,10 @@ embassy-sync = { version = "0.6.0" }
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embassy-time = { version = "0.3.2" }
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embassy-time-driver = { version = "0.1" }
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[dependencies.ringbuf]
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version = "0.4"
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default-features = false
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[dependencies.once_cell]
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version = "1"
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default-features = false
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155
examples/embassy/src/bin/uart-echo-with-irq.rs
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155
examples/embassy/src/bin/uart-echo-with-irq.rs
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@ -0,0 +1,155 @@
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#![no_std]
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#![no_main]
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use core::cell::RefCell;
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use embassy_example::EXTCLK_FREQ;
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use embassy_executor::Spawner;
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use embassy_sync::blocking_mutex::raw::CriticalSectionRawMutex;
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use embassy_sync::blocking_mutex::Mutex;
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use embassy_time::{Duration, Ticker};
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use embedded_hal::digital::StatefulOutputPin;
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use embedded_io::Write;
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use panic_rtt_target as _;
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use ringbuf::{
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traits::{Consumer, Observer, Producer},
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StaticRb,
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};
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use rtt_target::{rprintln, rtt_init_print};
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use va416xx_hal::{
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gpio::{OutputReadablePushPull, Pin, PinsG, PG5},
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pac::{self, interrupt},
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prelude::*,
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time::Hertz,
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uart,
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};
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pub type SharedUart = Mutex<CriticalSectionRawMutex, RefCell<Option<uart::RxWithIrq<pac::Uart0>>>>;
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static RX: SharedUart = Mutex::new(RefCell::new(None));
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const BAUDRATE: u32 = 115200;
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// Ring buffer size.
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const RING_BUF_SIZE: usize = 2048;
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pub type SharedRingBuf =
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Mutex<CriticalSectionRawMutex, RefCell<Option<StaticRb<u8, RING_BUF_SIZE>>>>;
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// Ring buffers to handling variable sized telemetry
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static RINGBUF: SharedRingBuf = Mutex::new(RefCell::new(None));
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// See https://embassy.dev/book/#_sharing_using_a_mutex for background information about sharing
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// a peripheral with embassy.
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#[embassy_executor::main]
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async fn main(spawner: Spawner) {
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rtt_init_print!();
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rprintln!("VA416xx UART-Embassy Example");
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let mut dp = pac::Peripherals::take().unwrap();
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// Initialize the systick interrupt & obtain the token to prove that we did
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// Use the external clock connected to XTAL_N.
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let clocks = dp
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.clkgen
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.constrain()
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.xtal_n_clk_with_src_freq(Hertz::from_raw(EXTCLK_FREQ))
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.freeze(&mut dp.sysconfig)
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.unwrap();
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// Safety: Only called once here.
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unsafe {
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embassy_example::init(
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&mut dp.sysconfig,
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&dp.irq_router,
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dp.tim15,
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dp.tim14,
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&clocks,
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)
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};
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let portg = PinsG::new(&mut dp.sysconfig, dp.portg);
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let tx = portg.pg0.into_funsel_1();
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let rx = portg.pg1.into_funsel_1();
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let uart0 = uart::Uart::new(
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dp.uart0,
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(tx, rx),
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Hertz::from_raw(BAUDRATE),
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&mut dp.sysconfig,
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&clocks,
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);
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let (mut tx, rx) = uart0.split();
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let mut rx = rx.to_rx_with_irq();
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rx.start();
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RX.lock(|static_rx| {
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static_rx.borrow_mut().replace(rx);
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});
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RINGBUF.lock(|static_rb| {
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static_rb.borrow_mut().replace(StaticRb::default());
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});
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let led = portg.pg5.into_readable_push_pull_output();
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let mut ticker = Ticker::every(Duration::from_millis(50));
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let mut processing_buf: [u8; RING_BUF_SIZE] = [0; RING_BUF_SIZE];
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let mut read_bytes = 0;
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spawner.spawn(blinky(led)).expect("failed to spawn blinky");
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loop {
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RINGBUF.lock(|static_rb| {
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let mut rb_borrow = static_rb.borrow_mut();
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let rb_mut = rb_borrow.as_mut().unwrap();
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read_bytes = rb_mut.occupied_len();
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rb_mut.pop_slice(&mut processing_buf[0..read_bytes]);
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});
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// Simply send back all received data.
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tx.write_all(&processing_buf[0..read_bytes])
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.expect("sending back read data failed");
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ticker.next().await;
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}
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}
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#[embassy_executor::task]
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async fn blinky(mut led: Pin<PG5, OutputReadablePushPull>) {
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let mut ticker = Ticker::every(Duration::from_millis(500));
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loop {
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led.toggle().ok();
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ticker.next().await;
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}
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}
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#[interrupt]
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#[allow(non_snake_case)]
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fn UART0_RX() {
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let mut buf: [u8; 16] = [0; 16];
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let mut read_len: usize = 0;
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let mut irq_error = None;
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RX.lock(|static_rx| {
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let mut rx_borrow = static_rx.borrow_mut();
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let rx_mut_ref = rx_borrow.as_mut().unwrap();
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match rx_mut_ref.irq_handler(&mut buf) {
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Ok(result) => {
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read_len = result.bytes_read;
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}
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Err(e) => {
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irq_error = Some(e);
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}
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}
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});
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let mut ringbuf_full = false;
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if read_len > 0 {
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// Send the received buffer to the main thread for processing via a ring buffer.
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RINGBUF.lock(|static_rb| {
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let mut rb_borrow = static_rb.borrow_mut();
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let rb_mut_ref = rb_borrow.as_mut().unwrap();
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if rb_mut_ref.vacant_len() < read_len {
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ringbuf_full = true;
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for _ in rb_mut_ref.pop_iter() {}
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}
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rb_mut_ref.push_slice(&buf[0..read_len]);
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});
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}
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if irq_error.is_some() {
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rprintln!("error in IRQ handler: {:?}", irq_error);
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}
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if ringbuf_full {
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rprintln!("ringbuffer is full, deleted oldest data");
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}
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}
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@ -1,4 +1,6 @@
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#![no_std]
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pub mod time_driver;
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pub const EXTCLK_FREQ: u32 = 40_000_000;
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pub use time_driver::init;
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@ -1,5 +1,6 @@
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#![no_std]
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#![no_main]
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use embassy_example::EXTCLK_FREQ;
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use embassy_executor::Spawner;
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use embassy_time::{Duration, Instant, Ticker};
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use embedded_hal::digital::StatefulOutputPin;
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@ -7,8 +8,6 @@ use panic_rtt_target as _;
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use rtt_target::{rprintln, rtt_init_print};
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use va416xx_hal::{gpio::PinsG, pac, prelude::*, time::Hertz};
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const EXTCLK_FREQ: u32 = 40_000_000;
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// main is itself an async function.
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#[embassy_executor::main]
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async fn main(_spawner: Spawner) {
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@ -17,7 +17,7 @@ use va416xx_hal::{
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enable_interrupt,
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irq_router::enable_and_init_irq_router,
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pac::{self, interrupt},
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pwm::{assert_tim_reset_for_two_cycles, enable_tim_clk, ValidTim},
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timer::{assert_tim_reset_for_two_cycles, enable_tim_clk, ValidTim},
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};
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pub type TimekeeperClk = pac::Tim15;
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@ -12,7 +12,7 @@ use rtt_target::{rprintln, rtt_init_print};
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use simple_examples::peb1;
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use va416xx_hal::dma::{Dma, DmaCfg, DmaChannel, DmaCtrlBlock};
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use va416xx_hal::irq_router::enable_and_init_irq_router;
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use va416xx_hal::pwm::CountdownTimer;
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use va416xx_hal::timer::CountdownTimer;
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use va416xx_hal::{
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pac::{self, interrupt},
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prelude::*,
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gpio::PinsA,
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pac,
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prelude::*,
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pwm::{self, get_duty_from_percent, CountdownTimer, PwmA, PwmB, ReducedPwmPin},
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pwm::{self, get_duty_from_percent, PwmA, PwmB, ReducedPwmPin},
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timer::CountdownTimer,
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};
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#[entry]
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@ -169,9 +169,9 @@ mod app {
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enable_and_init_irq_router(&mut cx.device.sysconfig, &cx.device.irq_router);
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setup_edac(&mut cx.device.sysconfig);
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let gpiob = PinsG::new(&mut cx.device.sysconfig, cx.device.portg);
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let tx = gpiob.pg0.into_funsel_1();
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let rx = gpiob.pg1.into_funsel_1();
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let gpiog = PinsG::new(&mut cx.device.sysconfig, cx.device.portg);
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let tx = gpiog.pg0.into_funsel_1();
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let rx = gpiog.pg1.into_funsel_1();
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let uart0 = Uart::new(
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cx.device.uart0,
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@ -9,8 +9,10 @@ use core::convert::Infallible;
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use core::marker::PhantomData;
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use crate::pac;
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use crate::time::Hertz;
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pub use crate::timer::ValidTim;
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use crate::timer::{TimAndPinRegister, TimDynRegister, TimPin, TimRegInterface, ValidTimAndPin};
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use crate::{clock::Clocks, gpio::DynPinId};
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pub use crate::{gpio::PinId, time::Hertz, timer::*};
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const DUTY_MAX: u16 = u16::MAX;
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@ -7,6 +7,7 @@
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//! ## Examples
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//!
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//! - [UART simple example](https://egit.irs.uni-stuttgart.de/rust/va416xx-rs/src/branch/main/examples/simple/examples/uart.rs)
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//! - [UART echo with IRQ and Embassy](https://egit.irs.uni-stuttgart.de/rust/va416xx-rs/src/branch/main/examples/embassy/src/bin/uart-echo-with-irq.rs)
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//! - [Flashloader app using UART with IRQs](https://egit.irs.uni-stuttgart.de/rust/va416xx-rs/src/branch/main/flashloader)
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use core::ops::Deref;
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@ -806,7 +807,6 @@ impl<Uart: Instance> RxWithIrq<Uart> {
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/// API after calling this function to continue emptying the FIFO.
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pub fn irq_handler(&mut self, buf: &mut [u8; 16]) -> Result<IrqResult, IrqUartError> {
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let mut result = IrqResult::default();
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let mut current_idx = 0;
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let irq_end = self.uart().irq_end().read();
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let enb_status = self.uart().enable().read();
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@ -814,27 +814,27 @@ impl<Uart: Instance> RxWithIrq<Uart> {
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// Half-Full interrupt. We have a guaranteed amount of data we can read.
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if irq_end.irq_rx().bit_is_set() {
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// Determine the number of bytes to read, ensuring we leave 1 byte in the FIFO.
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// We use this trick/hack because the timeout feature of the peripheral relies on data
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// being in the RX FIFO. If data continues arriving, another half-full IRQ will fire.
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// If not, the last byte(s) is/are emptied by the timeout interrupt.
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let available_bytes = self.uart().rxfifoirqtrg().read().bits() as usize;
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// If this interrupt bit is set, the trigger level is available at the very least.
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// Read everything as fast as possible
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for _ in 0..available_bytes {
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buf[current_idx] = (self.uart().data().read().bits() & 0xff) as u8;
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current_idx += 1;
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buf[result.bytes_read] = (self.uart().data().read().bits() & 0xff) as u8;
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result.bytes_read += 1;
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}
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}
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// Timeout, empty the FIFO completely.
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if irq_end.irq_rx_to().bit_is_set() {
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let read_result = self.0.read();
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// While there is data in the FIFO, write it into the reception buffer
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while let Some(byte) = self.read_handler(&mut result.errors, &read_result) {
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buf[current_idx] = byte;
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current_idx += 1;
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loop {
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// While there is data in the FIFO, write it into the reception buffer
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let read_result = self.0.read();
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if let Some(byte) = self.read_handler(&mut result.errors, &read_result) {
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buf[result.bytes_read] = byte;
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result.bytes_read += 1;
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} else {
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break;
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}
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}
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}
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@ -350,6 +350,36 @@
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]
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}
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},
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{
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"type": "cortex-debug",
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"request": "launch",
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"name": "UART Echo with IRQ",
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"servertype": "jlink",
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"jlinkscript": "${workspaceFolder}/jlink/JLinkSettings.JLinkScript",
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"cwd": "${workspaceRoot}",
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"device": "Cortex-M4",
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"svdFile": "${workspaceFolder}/va416xx/svd/va416xx.svd.patched",
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"preLaunchTask": "uart-echo-with-irq",
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"overrideLaunchCommands": [
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"monitor halt",
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"monitor reset",
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"load",
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],
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"executable": "${workspaceFolder}/target/thumbv7em-none-eabihf/debug/uart-echo-with-irq",
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"interface": "swd",
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"runToEntryPoint": "main",
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"rttConfig": {
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"enabled": true,
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"address": "auto",
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"decoders": [
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{
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"port": 0,
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"timestamp": true,
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"type": "console"
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}
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]
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}
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},
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{
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"type": "cortex-debug",
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"request": "launch",
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@ -95,6 +95,19 @@
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"kind": "build",
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}
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},
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{
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"label": "uart-echo-with-irq",
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"type": "shell",
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"command": "~/.cargo/bin/cargo", // note: full path to the cargo
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"args": [
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"build",
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"--bin",
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"uart-echo-with-irq"
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],
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"group": {
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"kind": "build",
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}
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},
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{
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"label": "pwm-example",
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"type": "shell",
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