From 2c0728102a7c591520b72fa91d41b227a5da2c46 Mon Sep 17 00:00:00 2001 From: Robin Mueller Date: Wed, 18 Sep 2024 12:31:02 +0200 Subject: [PATCH] smaller improvements --- va416xx-hal/src/clock.rs | 10 ++++++++-- va416xx-hal/src/gpio/mod.rs | 1 - va416xx-hal/src/irq_router.rs | 8 ++++++++ va416xx-hal/src/lib.rs | 6 ++++-- va416xx-hal/src/nvm.rs | 7 +++++++ va416xx-hal/src/uart.rs | 1 + 6 files changed, 28 insertions(+), 5 deletions(-) diff --git a/va416xx-hal/src/clock.rs b/va416xx-hal/src/clock.rs index 4685674..68e5f39 100644 --- a/va416xx-hal/src/clock.rs +++ b/va416xx-hal/src/clock.rs @@ -311,6 +311,12 @@ impl ClkgenCfgr { self } + #[inline] + pub fn pll_cfg(mut self, pll_cfg: PllCfg) -> Self { + self.pll_cfg = Some(pll_cfg); + self + } + #[inline] pub fn ref_clk_sel(mut self, ref_clk_sel: RefClkSel) -> Self { self.ref_clk_sel = ref_clk_sel; @@ -318,7 +324,7 @@ impl ClkgenCfgr { } /// Configures all clocks and return a clock configuration structure containing the final - /// frozen clock. + /// frozen clocks. /// /// Internal implementation details: This implementation is based on the HAL implementation /// which performs a lot of delays. I do not know if all of those are necessary, but @@ -499,7 +505,7 @@ impl Clocks { } /// Returns the frequency of the APB0 which is equal to the system clock. - pub fn apb0(&self) -> Hertz { + pub const fn apb0(&self) -> Hertz { self.sysclk() } diff --git a/va416xx-hal/src/gpio/mod.rs b/va416xx-hal/src/gpio/mod.rs index 6290bda..19d6889 100644 --- a/va416xx-hal/src/gpio/mod.rs +++ b/va416xx-hal/src/gpio/mod.rs @@ -21,7 +21,6 @@ //! ## Examples //! //! - [Blinky example](https://egit.irs.uni-stuttgart.de/rust/va416xx-rs/src/branch/main/examples/simple/examples/blinky.rs) - #[derive(Debug, PartialEq, Eq)] #[cfg_attr(feature = "defmt", derive(defmt::Format))] pub struct IsMaskedError; diff --git a/va416xx-hal/src/irq_router.rs b/va416xx-hal/src/irq_router.rs index 4c7dbb5..7c44816 100644 --- a/va416xx-hal/src/irq_router.rs +++ b/va416xx-hal/src/irq_router.rs @@ -1,8 +1,16 @@ +//! IRQ Router peripheral support. use crate::{ clock::{PeripheralSelect, SyscfgExt}, pac, }; +/// This enables and initiates the peripheral. +/// +/// Please note that this method also writes 0 to the registers which do not have 0 as the default +/// reset value. The programmers guide v1.2 and the actual values inspected using a SVD viewer +/// are inconsistent here, and the registers being non-zero can actually lead to weird bugs +/// when working with interrupts. Registers DMASELx and ADCSEL/DMASELx will reset to 0x7f and 0x1f +/// respectively instead of 0x00. pub fn enable_and_init_irq_router(sysconfig: &mut pac::Sysconfig, irq_router: &pac::IrqRouter) { sysconfig.enable_peripheral_clock(PeripheralSelect::IrqRouter); sysconfig.assert_periph_reset_for_two_cycles(PeripheralSelect::IrqRouter); diff --git a/va416xx-hal/src/lib.rs b/va416xx-hal/src/lib.rs index e174c75..265c089 100644 --- a/va416xx-hal/src/lib.rs +++ b/va416xx-hal/src/lib.rs @@ -20,7 +20,7 @@ //! is not very accurate. You can use the [crate::clock] module for this. If you are working //! with interrupts, it is strongly recommended to set up the IRQ router with the //! [crate::irq_router] module at the very least because that peripheral has confusing and/or -//! faulty register reset values which might leads to weird bugs and glitches. +//! faulty register reset values which might lead to weird bugs and glitches. #![no_std] #![cfg_attr(docsrs, feature(doc_auto_cfg))] #[cfg(test)] @@ -46,7 +46,6 @@ pub mod edac; pub mod gpio; pub mod i2c; pub mod irq_router; -pub mod nvm; pub mod pwm; pub mod spi; pub mod time; @@ -55,6 +54,9 @@ pub mod typelevel; pub mod uart; pub mod wdt; +#[cfg(feature = "va41630")] +pub mod nvm; + #[cfg(not(feature = "va41628"))] pub mod adc; #[cfg(not(feature = "va41628"))] diff --git a/va416xx-hal/src/nvm.rs b/va416xx-hal/src/nvm.rs index 75b8dc6..8859a23 100644 --- a/va416xx-hal/src/nvm.rs +++ b/va416xx-hal/src/nvm.rs @@ -1,3 +1,10 @@ +//! Non-volatile memory (NVM) driver. +//! +//! Provides a basic API to work with the internal NVM of the VA41630 MCU. +//! +//! # Examples +//! +//! - [Flashloader application](https://egit.irs.uni-stuttgart.de/rust/va416xx-rs/src/branch/main/flashloader) use embedded_hal::spi::MODE_0; use crate::clock::{Clocks, SyscfgExt}; diff --git a/va416xx-hal/src/uart.rs b/va416xx-hal/src/uart.rs index 0dfaf9b..aa7b6d1 100644 --- a/va416xx-hal/src/uart.rs +++ b/va416xx-hal/src/uart.rs @@ -3,6 +3,7 @@ //! ## Examples //! //! - [UART simple example](https://egit.irs.uni-stuttgart.de/rust/va416xx-rs/src/branch/main/examples/simple/examples/uart.rs) +//! - [Flashloader app using UART with IRQs](https://egit.irs.uni-stuttgart.de/rust/va416xx-rs/src/branch/main/flashloader) use core::ops::Deref; use embedded_hal_nb::serial::Read;