regenerate PAC, va416xx v0.3.0

2025-02-13 15:58:05 +01:00
parent 0c040515fe
commit 2c9ca004ce
517 changed files with 1376 additions and 2392 deletions
--- a/va416xx/src/adc/irq_end.rs
+++ b/va416xx/src/adc/irq_end.rs
@ -51,7 +51,7 @@ impl R {
        FifoDepthTrigR::new(((self.bits >> 6) & 1) != 0)
    }
 }
-#[doc = "Enabled Interrupt Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_end::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Enabled Interrupt Status\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_end::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct IrqEndSpec;
 impl crate::RegisterSpec for IrqEndSpec {
    type Ux = u32;