diff --git a/va416xx/CHANGELOG.md b/va416xx/CHANGELOG.md
index c5b0028..355313e 100644
--- a/va416xx/CHANGELOG.md
+++ b/va416xx/CHANGELOG.md
@@ -8,6 +8,10 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 
 ## [unreleased]
 
+## [v0.3.0] 2025-02-13
+
+- Re-generated PAC with `svd2rust` v0.35.0
+
 ## [v0.2.0] 2024-06-25
 
 - Re-Generated PAC with `svd2rust` v0.33.3
diff --git a/va416xx/Cargo.toml b/va416xx/Cargo.toml
index 25134f4..cda5be5 100644
--- a/va416xx/Cargo.toml
+++ b/va416xx/Cargo.toml
@@ -1,6 +1,6 @@
 [package]
 name = "va416xx"
-version = "0.2.0"
+version = "0.3.0"
 authors = ["Robin Mueller <muellerr@irs.uni-stuttgart.de>"]
 edition = "2021"
 description = "PAC for the Vorago VA416xx family of MCUs"
diff --git a/va416xx/gen-helper.sh b/va416xx/gen-helper.sh
index 60a9a59..09f6377 100755
--- a/va416xx/gen-helper.sh
+++ b/va416xx/gen-helper.sh
@@ -1,4 +1,4 @@
-#!/bin/sh
+#!/bin/bash
 
 # Use installed tool by default
 svd2rust_bin="svd2rust"
diff --git a/va416xx/src/adc.rs b/va416xx/src/adc.rs
index b5d9d91..336ebfd 100644
--- a/va416xx/src/adc.rs
+++ b/va416xx/src/adc.rs
@@ -65,61 +65,61 @@ impl RegisterBlock {
         &self.perid
     }
 }
-#[doc = "CTRL (rw) register accessor: Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctrl::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`]
+#[doc = "CTRL (rw) register accessor: Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`]
 module"]
 #[doc(alias = "CTRL")]
 pub type Ctrl = crate::Reg<ctrl::CtrlSpec>;
 #[doc = "Control Register"]
 pub mod ctrl;
-#[doc = "FIFO_DATA (r) register accessor: FIFO data\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fifo_data::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fifo_data`]
+#[doc = "FIFO_DATA (r) register accessor: FIFO data\n\nYou can [`read`](crate::Reg::read) this register and get [`fifo_data::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fifo_data`]
 module"]
 #[doc(alias = "FIFO_DATA")]
 pub type FifoData = crate::Reg<fifo_data::FifoDataSpec>;
 #[doc = "FIFO data"]
 pub mod fifo_data;
-#[doc = "STATUS (r) register accessor: Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`status::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`]
+#[doc = "STATUS (r) register accessor: Status\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`]
 module"]
 #[doc(alias = "STATUS")]
 pub type Status = crate::Reg<status::StatusSpec>;
 #[doc = "Status"]
 pub mod status;
-#[doc = "IRQ_ENB (rw) register accessor: Interrupt Enable\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_enb::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`irq_enb::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_enb`]
+#[doc = "IRQ_ENB (rw) register accessor: Interrupt Enable\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_enb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`irq_enb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_enb`]
 module"]
 #[doc(alias = "IRQ_ENB")]
 pub type IrqEnb = crate::Reg<irq_enb::IrqEnbSpec>;
 #[doc = "Interrupt Enable"]
 pub mod irq_enb;
-#[doc = "IRQ_RAW (r) register accessor: Raw Interrupt Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_raw::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_raw`]
+#[doc = "IRQ_RAW (r) register accessor: Raw Interrupt Status\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_raw::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_raw`]
 module"]
 #[doc(alias = "IRQ_RAW")]
 pub type IrqRaw = crate::Reg<irq_raw::IrqRawSpec>;
 #[doc = "Raw Interrupt Status"]
 pub mod irq_raw;
-#[doc = "IRQ_END (r) register accessor: Enabled Interrupt Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_end::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_end`]
+#[doc = "IRQ_END (r) register accessor: Enabled Interrupt Status\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_end::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_end`]
 module"]
 #[doc(alias = "IRQ_END")]
 pub type IrqEnd = crate::Reg<irq_end::IrqEndSpec>;
 #[doc = "Enabled Interrupt Status"]
 pub mod irq_end;
-#[doc = "IRQ_CLR (w) register accessor: Clear Interrupt\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`irq_clr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_clr`]
+#[doc = "IRQ_CLR (w) register accessor: Clear Interrupt\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`irq_clr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_clr`]
 module"]
 #[doc(alias = "IRQ_CLR")]
 pub type IrqClr = crate::Reg<irq_clr::IrqClrSpec>;
 #[doc = "Clear Interrupt"]
 pub mod irq_clr;
-#[doc = "RXFIFOIRQTRG (rw) register accessor: Receive FIFO Interrupt Trigger Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxfifoirqtrg::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rxfifoirqtrg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxfifoirqtrg`]
+#[doc = "RXFIFOIRQTRG (rw) register accessor: Receive FIFO Interrupt Trigger Value\n\nYou can [`read`](crate::Reg::read) this register and get [`rxfifoirqtrg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rxfifoirqtrg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxfifoirqtrg`]
 module"]
 #[doc(alias = "RXFIFOIRQTRG")]
 pub type Rxfifoirqtrg = crate::Reg<rxfifoirqtrg::RxfifoirqtrgSpec>;
 #[doc = "Receive FIFO Interrupt Trigger Value"]
 pub mod rxfifoirqtrg;
-#[doc = "FIFO_CLR (rw) register accessor: FIFO Clear\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fifo_clr::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fifo_clr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fifo_clr`]
+#[doc = "FIFO_CLR (rw) register accessor: FIFO Clear\n\nYou can [`read`](crate::Reg::read) this register and get [`fifo_clr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fifo_clr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fifo_clr`]
 module"]
 #[doc(alias = "FIFO_CLR")]
 pub type FifoClr = crate::Reg<fifo_clr::FifoClrSpec>;
 #[doc = "FIFO Clear"]
 pub mod fifo_clr;
-#[doc = "PERID (r) register accessor: Peripheral ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`perid::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@perid`]
+#[doc = "PERID (r) register accessor: Peripheral ID Register\n\nYou can [`read`](crate::Reg::read) this register and get [`perid::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@perid`]
 module"]
 #[doc(alias = "PERID")]
 pub type Perid = crate::Reg<perid::PeridSpec>;
diff --git a/va416xx/src/adc/ctrl.rs b/va416xx/src/adc/ctrl.rs
index 4fce290..4afc978 100644
--- a/va416xx/src/adc/ctrl.rs
+++ b/va416xx/src/adc/ctrl.rs
@@ -61,42 +61,36 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - Enables the channel for data collection"]
     #[inline(always)]
-    #[must_use]
     pub fn chan_en(&mut self) -> ChanEnW<CtrlSpec> {
         ChanEnW::new(self, 0)
     }
     #[doc = "Bit 16 - Enables the channel tag to be saved with the ADC data"]
     #[inline(always)]
-    #[must_use]
     pub fn chan_tag_en(&mut self) -> ChanTagEnW<CtrlSpec> {
         ChanTagEnW::new(self, 16)
     }
     #[doc = "Bit 17 - ADC data acquisition for all enabled channel"]
     #[inline(always)]
-    #[must_use]
     pub fn sweep_en(&mut self) -> SweepEnW<CtrlSpec> {
         SweepEnW::new(self, 17)
     }
     #[doc = "Bit 18 - Allows the external trigger to start analog acquisition"]
     #[inline(always)]
-    #[must_use]
     pub fn ext_trig_en(&mut self) -> ExtTrigEnW<CtrlSpec> {
         ExtTrigEnW::new(self, 18)
     }
     #[doc = "Bit 19 - Starts analog acquisition"]
     #[inline(always)]
-    #[must_use]
     pub fn manual_trig(&mut self) -> ManualTrigW<CtrlSpec> {
         ManualTrigW::new(self, 19)
     }
     #[doc = "Bits 20:23 - Conversion count describes the number of conversions to be applied for triggers/sweeps. (N+1 conversions)"]
     #[inline(always)]
-    #[must_use]
     pub fn conv_cnt(&mut self) -> ConvCntW<CtrlSpec> {
         ConvCntW::new(self, 20)
     }
 }
-#[doc = "Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctrl::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctrl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct CtrlSpec;
 impl crate::RegisterSpec for CtrlSpec {
     type Ux = u32;
diff --git a/va416xx/src/adc/fifo_clr.rs b/va416xx/src/adc/fifo_clr.rs
index d3f8ab8..8a9ce45 100644
--- a/va416xx/src/adc/fifo_clr.rs
+++ b/va416xx/src/adc/fifo_clr.rs
@@ -7,12 +7,11 @@ pub type FifoClrW<'a, REG> = crate::BitWriter<'a, REG>;
 impl W {
     #[doc = "Bit 0 - Clears the ADC FIFO. Always reads 0"]
     #[inline(always)]
-    #[must_use]
     pub fn fifo_clr(&mut self) -> FifoClrW<FifoClrSpec> {
         FifoClrW::new(self, 0)
     }
 }
-#[doc = "FIFO Clear\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fifo_clr::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fifo_clr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "FIFO Clear\n\nYou can [`read`](crate::Reg::read) this register and get [`fifo_clr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fifo_clr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct FifoClrSpec;
 impl crate::RegisterSpec for FifoClrSpec {
     type Ux = u32;
diff --git a/va416xx/src/adc/fifo_data.rs b/va416xx/src/adc/fifo_data.rs
index b4722b4..535aa03 100644
--- a/va416xx/src/adc/fifo_data.rs
+++ b/va416xx/src/adc/fifo_data.rs
@@ -16,7 +16,7 @@ impl R {
         ChanTagR::new(((self.bits >> 12) & 0x0f) as u8)
     }
 }
-#[doc = "FIFO data\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fifo_data::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "FIFO data\n\nYou can [`read`](crate::Reg::read) this register and get [`fifo_data::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct FifoDataSpec;
 impl crate::RegisterSpec for FifoDataSpec {
     type Ux = u32;
diff --git a/va416xx/src/adc/irq_clr.rs b/va416xx/src/adc/irq_clr.rs
index 5efb9b7..0f4566e 100644
--- a/va416xx/src/adc/irq_clr.rs
+++ b/va416xx/src/adc/irq_clr.rs
@@ -11,30 +11,26 @@ pub type TrigErrorW<'a, REG> = crate::BitWriter<'a, REG>;
 impl W {
     #[doc = "Bit 0 - Clears the FIFO overflow interrupt status. Always reads 0"]
     #[inline(always)]
-    #[must_use]
     pub fn fifo_oflow(&mut self) -> FifoOflowW<IrqClrSpec> {
         FifoOflowW::new(self, 0)
     }
     #[doc = "Bit 1 - Clears the FIFO underflow interrupt status. Always reads 0"]
     #[inline(always)]
-    #[must_use]
     pub fn fifo_uflow(&mut self) -> FifoUflowW<IrqClrSpec> {
         FifoUflowW::new(self, 1)
     }
     #[doc = "Bit 2 - Clears the ADC done interrupt status. Always reads 0"]
     #[inline(always)]
-    #[must_use]
     pub fn adc_done(&mut self) -> AdcDoneW<IrqClrSpec> {
         AdcDoneW::new(self, 2)
     }
     #[doc = "Bit 3 - Clears the trigger error interrupt status. Always reads 0"]
     #[inline(always)]
-    #[must_use]
     pub fn trig_error(&mut self) -> TrigErrorW<IrqClrSpec> {
         TrigErrorW::new(self, 3)
     }
 }
-#[doc = "Clear Interrupt\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`irq_clr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Clear Interrupt\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`irq_clr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct IrqClrSpec;
 impl crate::RegisterSpec for IrqClrSpec {
     type Ux = u32;
diff --git a/va416xx/src/adc/irq_enb.rs b/va416xx/src/adc/irq_enb.rs
index 2f5221e..7fc0392 100644
--- a/va416xx/src/adc/irq_enb.rs
+++ b/va416xx/src/adc/irq_enb.rs
@@ -70,48 +70,41 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Enables the interrupt for FIFO empty"]
     #[inline(always)]
-    #[must_use]
     pub fn fifo_empty(&mut self) -> FifoEmptyW<IrqEnbSpec> {
         FifoEmptyW::new(self, 0)
     }
     #[doc = "Bit 1 - Enables the interrupt for FIFO full"]
     #[inline(always)]
-    #[must_use]
     pub fn fifo_full(&mut self) -> FifoFullW<IrqEnbSpec> {
         FifoFullW::new(self, 1)
     }
     #[doc = "Bit 2 - Enables the interrupt for a FIFO overflow"]
     #[inline(always)]
-    #[must_use]
     pub fn fifo_oflow(&mut self) -> FifoOflowW<IrqEnbSpec> {
         FifoOflowW::new(self, 2)
     }
     #[doc = "Bit 3 - Enables the interrupt for a FIFO underflow"]
     #[inline(always)]
-    #[must_use]
     pub fn fifo_uflow(&mut self) -> FifoUflowW<IrqEnbSpec> {
         FifoUflowW::new(self, 3)
     }
     #[doc = "Bit 4 - Enables the interrupt for an ADC data acquisition completion"]
     #[inline(always)]
-    #[must_use]
     pub fn adc_done(&mut self) -> AdcDoneW<IrqEnbSpec> {
         AdcDoneW::new(self, 4)
     }
     #[doc = "Bit 5 - Enables the interrupt for a trigger error"]
     #[inline(always)]
-    #[must_use]
     pub fn trig_error(&mut self) -> TrigErrorW<IrqEnbSpec> {
         TrigErrorW::new(self, 5)
     }
     #[doc = "Bit 6 - Enables the interrupt for the FIFO entry count meets or exceeds the trigger level"]
     #[inline(always)]
-    #[must_use]
     pub fn fifo_depth_trig(&mut self) -> FifoDepthTrigW<IrqEnbSpec> {
         FifoDepthTrigW::new(self, 6)
     }
 }
-#[doc = "Interrupt Enable\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_enb::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`irq_enb::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Interrupt Enable\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_enb::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`irq_enb::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct IrqEnbSpec;
 impl crate::RegisterSpec for IrqEnbSpec {
     type Ux = u32;
diff --git a/va416xx/src/adc/irq_end.rs b/va416xx/src/adc/irq_end.rs
index b581ede..10bc56d 100644
--- a/va416xx/src/adc/irq_end.rs
+++ b/va416xx/src/adc/irq_end.rs
@@ -51,7 +51,7 @@ impl R {
         FifoDepthTrigR::new(((self.bits >> 6) & 1) != 0)
     }
 }
-#[doc = "Enabled Interrupt Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_end::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Enabled Interrupt Status\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_end::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct IrqEndSpec;
 impl crate::RegisterSpec for IrqEndSpec {
     type Ux = u32;
diff --git a/va416xx/src/adc/irq_raw.rs b/va416xx/src/adc/irq_raw.rs
index 04ce1a3..5ca8edd 100644
--- a/va416xx/src/adc/irq_raw.rs
+++ b/va416xx/src/adc/irq_raw.rs
@@ -51,7 +51,7 @@ impl R {
         FifoDepthTrigR::new(((self.bits >> 6) & 1) != 0)
     }
 }
-#[doc = "Raw Interrupt Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_raw::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Raw Interrupt Status\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_raw::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct IrqRawSpec;
 impl crate::RegisterSpec for IrqRawSpec {
     type Ux = u32;
diff --git a/va416xx/src/adc/perid.rs b/va416xx/src/adc/perid.rs
index d1a0f97..babd7d3 100644
--- a/va416xx/src/adc/perid.rs
+++ b/va416xx/src/adc/perid.rs
@@ -5,7 +5,7 @@ impl core::fmt::Debug for R {
         write!(f, "{}", self.bits())
     }
 }
-#[doc = "Peripheral ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`perid::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Peripheral ID Register\n\nYou can [`read`](crate::Reg::read) this register and get [`perid::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct PeridSpec;
 impl crate::RegisterSpec for PeridSpec {
     type Ux = u32;
diff --git a/va416xx/src/adc/rxfifoirqtrg.rs b/va416xx/src/adc/rxfifoirqtrg.rs
index aa189b8..7c31f2b 100644
--- a/va416xx/src/adc/rxfifoirqtrg.rs
+++ b/va416xx/src/adc/rxfifoirqtrg.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:4 - Sets the FIFO_ENTRY_CNT value that asserts the FIFO_DEPTH_TRIG interrupt"]
     #[inline(always)]
-    #[must_use]
     pub fn level(&mut self) -> LevelW<RxfifoirqtrgSpec> {
         LevelW::new(self, 0)
     }
 }
-#[doc = "Receive FIFO Interrupt Trigger Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxfifoirqtrg::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rxfifoirqtrg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Receive FIFO Interrupt Trigger Value\n\nYou can [`read`](crate::Reg::read) this register and get [`rxfifoirqtrg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rxfifoirqtrg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct RxfifoirqtrgSpec;
 impl crate::RegisterSpec for RxfifoirqtrgSpec {
     type Ux = u32;
diff --git a/va416xx/src/adc/status.rs b/va416xx/src/adc/status.rs
index bda6875..32aef36 100644
--- a/va416xx/src/adc/status.rs
+++ b/va416xx/src/adc/status.rs
@@ -16,7 +16,7 @@ impl R {
         AdcBusyR::new(((self.bits >> 7) & 1) != 0)
     }
 }
-#[doc = "Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`status::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Status\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct StatusSpec;
 impl crate::RegisterSpec for StatusSpec {
     type Ux = u32;
diff --git a/va416xx/src/can0.rs b/va416xx/src/can0.rs
index 894adbb..f33b2fa 100644
--- a/va416xx/src/can0.rs
+++ b/va416xx/src/can0.rs
@@ -856,853 +856,853 @@ impl RegisterBlock {
         &self.ctmr
     }
 }
-#[doc = "CNSTAT_CMB0 (rw) register accessor: Buffer Status / Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cnstat_cmb0::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cnstat_cmb0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnstat_cmb0`]
+#[doc = "CNSTAT_CMB0 (rw) register accessor: Buffer Status / Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cnstat_cmb0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnstat_cmb0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnstat_cmb0`]
 module"]
 #[doc(alias = "CNSTAT_CMB0")]
 pub type CnstatCmb0 = crate::Reg<cnstat_cmb0::CnstatCmb0Spec>;
 #[doc = "Buffer Status / Control Register"]
 pub mod cnstat_cmb0;
-#[doc = "TSTP_CMB0 (rw) register accessor: CAN Frame Timestamp\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tstp_cmb0::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tstp_cmb0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstp_cmb0`]
+#[doc = "TSTP_CMB0 (rw) register accessor: CAN Frame Timestamp\n\nYou can [`read`](crate::Reg::read) this register and get [`tstp_cmb0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tstp_cmb0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstp_cmb0`]
 module"]
 #[doc(alias = "TSTP_CMB0")]
 pub type TstpCmb0 = crate::Reg<tstp_cmb0::TstpCmb0Spec>;
 #[doc = "CAN Frame Timestamp"]
 pub mod tstp_cmb0;
-#[doc = "DATA3_CMB0 (rw) register accessor: CAN Frame Data Word 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data3_cmb0::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data3_cmb0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data3_cmb0`]
+#[doc = "DATA3_CMB0 (rw) register accessor: CAN Frame Data Word 3\n\nYou can [`read`](crate::Reg::read) this register and get [`data3_cmb0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data3_cmb0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data3_cmb0`]
 module"]
 #[doc(alias = "DATA3_CMB0")]
 pub type Data3Cmb0 = crate::Reg<data3_cmb0::Data3Cmb0Spec>;
 #[doc = "CAN Frame Data Word 3"]
 pub mod data3_cmb0;
-#[doc = "DATA2_CMB0 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data2_cmb0::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data2_cmb0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data2_cmb0`]
+#[doc = "DATA2_CMB0 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data2_cmb0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data2_cmb0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data2_cmb0`]
 module"]
 #[doc(alias = "DATA2_CMB0")]
 pub type Data2Cmb0 = crate::Reg<data2_cmb0::Data2Cmb0Spec>;
 #[doc = "CAN Frame Data Word 2"]
 pub mod data2_cmb0;
-#[doc = "DATA1_CMB0 (rw) register accessor: CAN Frame Data Word 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data1_cmb0::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data1_cmb0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data1_cmb0`]
+#[doc = "DATA1_CMB0 (rw) register accessor: CAN Frame Data Word 1\n\nYou can [`read`](crate::Reg::read) this register and get [`data1_cmb0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data1_cmb0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data1_cmb0`]
 module"]
 #[doc(alias = "DATA1_CMB0")]
 pub type Data1Cmb0 = crate::Reg<data1_cmb0::Data1Cmb0Spec>;
 #[doc = "CAN Frame Data Word 1"]
 pub mod data1_cmb0;
-#[doc = "DATA0_CMB0 (rw) register accessor: CAN Frame Data Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data0_cmb0::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data0_cmb0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data0_cmb0`]
+#[doc = "DATA0_CMB0 (rw) register accessor: CAN Frame Data Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`data0_cmb0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data0_cmb0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data0_cmb0`]
 module"]
 #[doc(alias = "DATA0_CMB0")]
 pub type Data0Cmb0 = crate::Reg<data0_cmb0::Data0Cmb0Spec>;
 #[doc = "CAN Frame Data Word 0"]
 pub mod data0_cmb0;
-#[doc = "ID0_CMB0 (rw) register accessor: CAN Frame Identifier Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id0_cmb0::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id0_cmb0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id0_cmb0`]
+#[doc = "ID0_CMB0 (rw) register accessor: CAN Frame Identifier Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`id0_cmb0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id0_cmb0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id0_cmb0`]
 module"]
 #[doc(alias = "ID0_CMB0")]
 pub type Id0Cmb0 = crate::Reg<id0_cmb0::Id0Cmb0Spec>;
 #[doc = "CAN Frame Identifier Word 0"]
 pub mod id0_cmb0;
-#[doc = "ID1_CMB0 (rw) register accessor: CAN Frame Identifier Word 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id1_cmb0::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id1_cmb0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id1_cmb0`]
+#[doc = "ID1_CMB0 (rw) register accessor: CAN Frame Identifier Word 1\n\nYou can [`read`](crate::Reg::read) this register and get [`id1_cmb0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id1_cmb0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id1_cmb0`]
 module"]
 #[doc(alias = "ID1_CMB0")]
 pub type Id1Cmb0 = crate::Reg<id1_cmb0::Id1Cmb0Spec>;
 #[doc = "CAN Frame Identifier Word 1"]
 pub mod id1_cmb0;
-#[doc = "CNSTAT_CMB1 (rw) register accessor: Buffer Status / Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cnstat_cmb1::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cnstat_cmb1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnstat_cmb1`]
+#[doc = "CNSTAT_CMB1 (rw) register accessor: Buffer Status / Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cnstat_cmb1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnstat_cmb1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnstat_cmb1`]
 module"]
 #[doc(alias = "CNSTAT_CMB1")]
 pub type CnstatCmb1 = crate::Reg<cnstat_cmb1::CnstatCmb1Spec>;
 #[doc = "Buffer Status / Control Register"]
 pub mod cnstat_cmb1;
-#[doc = "TSTP_CMB1 (rw) register accessor: CAN Frame Timestamp\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tstp_cmb1::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tstp_cmb1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstp_cmb1`]
+#[doc = "TSTP_CMB1 (rw) register accessor: CAN Frame Timestamp\n\nYou can [`read`](crate::Reg::read) this register and get [`tstp_cmb1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tstp_cmb1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstp_cmb1`]
 module"]
 #[doc(alias = "TSTP_CMB1")]
 pub type TstpCmb1 = crate::Reg<tstp_cmb1::TstpCmb1Spec>;
 #[doc = "CAN Frame Timestamp"]
 pub mod tstp_cmb1;
-#[doc = "DATA3_CMB1 (rw) register accessor: CAN Frame Data Word 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data3_cmb1::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data3_cmb1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data3_cmb1`]
+#[doc = "DATA3_CMB1 (rw) register accessor: CAN Frame Data Word 3\n\nYou can [`read`](crate::Reg::read) this register and get [`data3_cmb1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data3_cmb1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data3_cmb1`]
 module"]
 #[doc(alias = "DATA3_CMB1")]
 pub type Data3Cmb1 = crate::Reg<data3_cmb1::Data3Cmb1Spec>;
 #[doc = "CAN Frame Data Word 3"]
 pub mod data3_cmb1;
-#[doc = "DATA2_CMB1 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data2_cmb1::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data2_cmb1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data2_cmb1`]
+#[doc = "DATA2_CMB1 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data2_cmb1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data2_cmb1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data2_cmb1`]
 module"]
 #[doc(alias = "DATA2_CMB1")]
 pub type Data2Cmb1 = crate::Reg<data2_cmb1::Data2Cmb1Spec>;
 #[doc = "CAN Frame Data Word 2"]
 pub mod data2_cmb1;
-#[doc = "DATA1_CMB1 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data1_cmb1::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data1_cmb1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data1_cmb1`]
+#[doc = "DATA1_CMB1 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data1_cmb1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data1_cmb1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data1_cmb1`]
 module"]
 #[doc(alias = "DATA1_CMB1")]
 pub type Data1Cmb1 = crate::Reg<data1_cmb1::Data1Cmb1Spec>;
 #[doc = "CAN Frame Data Word 2"]
 pub mod data1_cmb1;
-#[doc = "DATA0_CMB1 (rw) register accessor: CAN Frame Data Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data0_cmb1::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data0_cmb1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data0_cmb1`]
+#[doc = "DATA0_CMB1 (rw) register accessor: CAN Frame Data Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`data0_cmb1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data0_cmb1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data0_cmb1`]
 module"]
 #[doc(alias = "DATA0_CMB1")]
 pub type Data0Cmb1 = crate::Reg<data0_cmb1::Data0Cmb1Spec>;
 #[doc = "CAN Frame Data Word 0"]
 pub mod data0_cmb1;
-#[doc = "ID0_CMB1 (rw) register accessor: CAN Frame Identifier Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id0_cmb1::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id0_cmb1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id0_cmb1`]
+#[doc = "ID0_CMB1 (rw) register accessor: CAN Frame Identifier Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`id0_cmb1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id0_cmb1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id0_cmb1`]
 module"]
 #[doc(alias = "ID0_CMB1")]
 pub type Id0Cmb1 = crate::Reg<id0_cmb1::Id0Cmb1Spec>;
 #[doc = "CAN Frame Identifier Word 0"]
 pub mod id0_cmb1;
-#[doc = "ID1_CMB1 (rw) register accessor: CAN Frame Identifier Word 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id1_cmb1::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id1_cmb1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id1_cmb1`]
+#[doc = "ID1_CMB1 (rw) register accessor: CAN Frame Identifier Word 1\n\nYou can [`read`](crate::Reg::read) this register and get [`id1_cmb1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id1_cmb1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id1_cmb1`]
 module"]
 #[doc(alias = "ID1_CMB1")]
 pub type Id1Cmb1 = crate::Reg<id1_cmb1::Id1Cmb1Spec>;
 #[doc = "CAN Frame Identifier Word 1"]
 pub mod id1_cmb1;
-#[doc = "CNSTAT_CMB2 (rw) register accessor: Buffer Status / Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cnstat_cmb2::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cnstat_cmb2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnstat_cmb2`]
+#[doc = "CNSTAT_CMB2 (rw) register accessor: Buffer Status / Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cnstat_cmb2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnstat_cmb2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnstat_cmb2`]
 module"]
 #[doc(alias = "CNSTAT_CMB2")]
 pub type CnstatCmb2 = crate::Reg<cnstat_cmb2::CnstatCmb2Spec>;
 #[doc = "Buffer Status / Control Register"]
 pub mod cnstat_cmb2;
-#[doc = "TSTP_CMB2 (rw) register accessor: CAN Frame Timestamp\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tstp_cmb2::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tstp_cmb2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstp_cmb2`]
+#[doc = "TSTP_CMB2 (rw) register accessor: CAN Frame Timestamp\n\nYou can [`read`](crate::Reg::read) this register and get [`tstp_cmb2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tstp_cmb2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstp_cmb2`]
 module"]
 #[doc(alias = "TSTP_CMB2")]
 pub type TstpCmb2 = crate::Reg<tstp_cmb2::TstpCmb2Spec>;
 #[doc = "CAN Frame Timestamp"]
 pub mod tstp_cmb2;
-#[doc = "DATA3_CMB2 (rw) register accessor: CAN Frame Data Word 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data3_cmb2::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data3_cmb2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data3_cmb2`]
+#[doc = "DATA3_CMB2 (rw) register accessor: CAN Frame Data Word 3\n\nYou can [`read`](crate::Reg::read) this register and get [`data3_cmb2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data3_cmb2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data3_cmb2`]
 module"]
 #[doc(alias = "DATA3_CMB2")]
 pub type Data3Cmb2 = crate::Reg<data3_cmb2::Data3Cmb2Spec>;
 #[doc = "CAN Frame Data Word 3"]
 pub mod data3_cmb2;
-#[doc = "DATA2_CMB2 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data2_cmb2::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data2_cmb2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data2_cmb2`]
+#[doc = "DATA2_CMB2 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data2_cmb2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data2_cmb2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data2_cmb2`]
 module"]
 #[doc(alias = "DATA2_CMB2")]
 pub type Data2Cmb2 = crate::Reg<data2_cmb2::Data2Cmb2Spec>;
 #[doc = "CAN Frame Data Word 2"]
 pub mod data2_cmb2;
-#[doc = "DATA1_CMB2 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data1_cmb2::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data1_cmb2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data1_cmb2`]
+#[doc = "DATA1_CMB2 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data1_cmb2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data1_cmb2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data1_cmb2`]
 module"]
 #[doc(alias = "DATA1_CMB2")]
 pub type Data1Cmb2 = crate::Reg<data1_cmb2::Data1Cmb2Spec>;
 #[doc = "CAN Frame Data Word 2"]
 pub mod data1_cmb2;
-#[doc = "DATA0_CMB2 (rw) register accessor: CAN Frame Data Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data0_cmb2::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data0_cmb2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data0_cmb2`]
+#[doc = "DATA0_CMB2 (rw) register accessor: CAN Frame Data Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`data0_cmb2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data0_cmb2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data0_cmb2`]
 module"]
 #[doc(alias = "DATA0_CMB2")]
 pub type Data0Cmb2 = crate::Reg<data0_cmb2::Data0Cmb2Spec>;
 #[doc = "CAN Frame Data Word 0"]
 pub mod data0_cmb2;
-#[doc = "ID0_CMB2 (rw) register accessor: CAN Frame Identifier Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id0_cmb2::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id0_cmb2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id0_cmb2`]
+#[doc = "ID0_CMB2 (rw) register accessor: CAN Frame Identifier Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`id0_cmb2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id0_cmb2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id0_cmb2`]
 module"]
 #[doc(alias = "ID0_CMB2")]
 pub type Id0Cmb2 = crate::Reg<id0_cmb2::Id0Cmb2Spec>;
 #[doc = "CAN Frame Identifier Word 0"]
 pub mod id0_cmb2;
-#[doc = "ID1_CMB2 (rw) register accessor: CAN Frame Identifier Word 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id1_cmb2::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id1_cmb2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id1_cmb2`]
+#[doc = "ID1_CMB2 (rw) register accessor: CAN Frame Identifier Word 1\n\nYou can [`read`](crate::Reg::read) this register and get [`id1_cmb2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id1_cmb2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id1_cmb2`]
 module"]
 #[doc(alias = "ID1_CMB2")]
 pub type Id1Cmb2 = crate::Reg<id1_cmb2::Id1Cmb2Spec>;
 #[doc = "CAN Frame Identifier Word 1"]
 pub mod id1_cmb2;
-#[doc = "CNSTAT_CMB3 (rw) register accessor: Buffer Status / Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cnstat_cmb3::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cnstat_cmb3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnstat_cmb3`]
+#[doc = "CNSTAT_CMB3 (rw) register accessor: Buffer Status / Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cnstat_cmb3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnstat_cmb3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnstat_cmb3`]
 module"]
 #[doc(alias = "CNSTAT_CMB3")]
 pub type CnstatCmb3 = crate::Reg<cnstat_cmb3::CnstatCmb3Spec>;
 #[doc = "Buffer Status / Control Register"]
 pub mod cnstat_cmb3;
-#[doc = "TSTP_CMB3 (rw) register accessor: CAN Frame Timestamp\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tstp_cmb3::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tstp_cmb3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstp_cmb3`]
+#[doc = "TSTP_CMB3 (rw) register accessor: CAN Frame Timestamp\n\nYou can [`read`](crate::Reg::read) this register and get [`tstp_cmb3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tstp_cmb3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstp_cmb3`]
 module"]
 #[doc(alias = "TSTP_CMB3")]
 pub type TstpCmb3 = crate::Reg<tstp_cmb3::TstpCmb3Spec>;
 #[doc = "CAN Frame Timestamp"]
 pub mod tstp_cmb3;
-#[doc = "DATA3_CMB3 (rw) register accessor: CAN Frame Data Word 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data3_cmb3::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data3_cmb3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data3_cmb3`]
+#[doc = "DATA3_CMB3 (rw) register accessor: CAN Frame Data Word 3\n\nYou can [`read`](crate::Reg::read) this register and get [`data3_cmb3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data3_cmb3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data3_cmb3`]
 module"]
 #[doc(alias = "DATA3_CMB3")]
 pub type Data3Cmb3 = crate::Reg<data3_cmb3::Data3Cmb3Spec>;
 #[doc = "CAN Frame Data Word 3"]
 pub mod data3_cmb3;
-#[doc = "DATA2_CMB3 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data2_cmb3::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data2_cmb3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data2_cmb3`]
+#[doc = "DATA2_CMB3 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data2_cmb3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data2_cmb3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data2_cmb3`]
 module"]
 #[doc(alias = "DATA2_CMB3")]
 pub type Data2Cmb3 = crate::Reg<data2_cmb3::Data2Cmb3Spec>;
 #[doc = "CAN Frame Data Word 2"]
 pub mod data2_cmb3;
-#[doc = "DATA1_CMB3 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data1_cmb3::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data1_cmb3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data1_cmb3`]
+#[doc = "DATA1_CMB3 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data1_cmb3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data1_cmb3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data1_cmb3`]
 module"]
 #[doc(alias = "DATA1_CMB3")]
 pub type Data1Cmb3 = crate::Reg<data1_cmb3::Data1Cmb3Spec>;
 #[doc = "CAN Frame Data Word 2"]
 pub mod data1_cmb3;
-#[doc = "DATA0_CMB3 (rw) register accessor: CAN Frame Data Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data0_cmb3::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data0_cmb3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data0_cmb3`]
+#[doc = "DATA0_CMB3 (rw) register accessor: CAN Frame Data Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`data0_cmb3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data0_cmb3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data0_cmb3`]
 module"]
 #[doc(alias = "DATA0_CMB3")]
 pub type Data0Cmb3 = crate::Reg<data0_cmb3::Data0Cmb3Spec>;
 #[doc = "CAN Frame Data Word 0"]
 pub mod data0_cmb3;
-#[doc = "ID0_CMB3 (rw) register accessor: CAN Frame Identifier Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id0_cmb3::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id0_cmb3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id0_cmb3`]
+#[doc = "ID0_CMB3 (rw) register accessor: CAN Frame Identifier Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`id0_cmb3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id0_cmb3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id0_cmb3`]
 module"]
 #[doc(alias = "ID0_CMB3")]
 pub type Id0Cmb3 = crate::Reg<id0_cmb3::Id0Cmb3Spec>;
 #[doc = "CAN Frame Identifier Word 0"]
 pub mod id0_cmb3;
-#[doc = "ID1_CMB3 (rw) register accessor: CAN Frame Identifier Word 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id1_cmb3::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id1_cmb3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id1_cmb3`]
+#[doc = "ID1_CMB3 (rw) register accessor: CAN Frame Identifier Word 1\n\nYou can [`read`](crate::Reg::read) this register and get [`id1_cmb3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id1_cmb3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id1_cmb3`]
 module"]
 #[doc(alias = "ID1_CMB3")]
 pub type Id1Cmb3 = crate::Reg<id1_cmb3::Id1Cmb3Spec>;
 #[doc = "CAN Frame Identifier Word 1"]
 pub mod id1_cmb3;
-#[doc = "CNSTAT_CMB4 (rw) register accessor: Buffer Status / Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cnstat_cmb4::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cnstat_cmb4::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnstat_cmb4`]
+#[doc = "CNSTAT_CMB4 (rw) register accessor: Buffer Status / Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cnstat_cmb4::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnstat_cmb4::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnstat_cmb4`]
 module"]
 #[doc(alias = "CNSTAT_CMB4")]
 pub type CnstatCmb4 = crate::Reg<cnstat_cmb4::CnstatCmb4Spec>;
 #[doc = "Buffer Status / Control Register"]
 pub mod cnstat_cmb4;
-#[doc = "TSTP_CMB4 (rw) register accessor: CAN Frame Timestamp\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tstp_cmb4::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tstp_cmb4::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstp_cmb4`]
+#[doc = "TSTP_CMB4 (rw) register accessor: CAN Frame Timestamp\n\nYou can [`read`](crate::Reg::read) this register and get [`tstp_cmb4::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tstp_cmb4::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstp_cmb4`]
 module"]
 #[doc(alias = "TSTP_CMB4")]
 pub type TstpCmb4 = crate::Reg<tstp_cmb4::TstpCmb4Spec>;
 #[doc = "CAN Frame Timestamp"]
 pub mod tstp_cmb4;
-#[doc = "DATA3_CMB4 (rw) register accessor: CAN Frame Data Word 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data3_cmb4::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data3_cmb4::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data3_cmb4`]
+#[doc = "DATA3_CMB4 (rw) register accessor: CAN Frame Data Word 3\n\nYou can [`read`](crate::Reg::read) this register and get [`data3_cmb4::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data3_cmb4::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data3_cmb4`]
 module"]
 #[doc(alias = "DATA3_CMB4")]
 pub type Data3Cmb4 = crate::Reg<data3_cmb4::Data3Cmb4Spec>;
 #[doc = "CAN Frame Data Word 3"]
 pub mod data3_cmb4;
-#[doc = "DATA2_CMB4 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data2_cmb4::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data2_cmb4::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data2_cmb4`]
+#[doc = "DATA2_CMB4 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data2_cmb4::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data2_cmb4::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data2_cmb4`]
 module"]
 #[doc(alias = "DATA2_CMB4")]
 pub type Data2Cmb4 = crate::Reg<data2_cmb4::Data2Cmb4Spec>;
 #[doc = "CAN Frame Data Word 2"]
 pub mod data2_cmb4;
-#[doc = "DATA1_CMB4 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data1_cmb4::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data1_cmb4::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data1_cmb4`]
+#[doc = "DATA1_CMB4 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data1_cmb4::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data1_cmb4::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data1_cmb4`]
 module"]
 #[doc(alias = "DATA1_CMB4")]
 pub type Data1Cmb4 = crate::Reg<data1_cmb4::Data1Cmb4Spec>;
 #[doc = "CAN Frame Data Word 2"]
 pub mod data1_cmb4;
-#[doc = "DATA0_CMB4 (rw) register accessor: CAN Frame Data Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data0_cmb4::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data0_cmb4::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data0_cmb4`]
+#[doc = "DATA0_CMB4 (rw) register accessor: CAN Frame Data Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`data0_cmb4::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data0_cmb4::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data0_cmb4`]
 module"]
 #[doc(alias = "DATA0_CMB4")]
 pub type Data0Cmb4 = crate::Reg<data0_cmb4::Data0Cmb4Spec>;
 #[doc = "CAN Frame Data Word 0"]
 pub mod data0_cmb4;
-#[doc = "ID0_CMB4 (rw) register accessor: CAN Frame Identifier Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id0_cmb4::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id0_cmb4::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id0_cmb4`]
+#[doc = "ID0_CMB4 (rw) register accessor: CAN Frame Identifier Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`id0_cmb4::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id0_cmb4::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id0_cmb4`]
 module"]
 #[doc(alias = "ID0_CMB4")]
 pub type Id0Cmb4 = crate::Reg<id0_cmb4::Id0Cmb4Spec>;
 #[doc = "CAN Frame Identifier Word 0"]
 pub mod id0_cmb4;
-#[doc = "ID1_CMB4 (rw) register accessor: CAN Frame Identifier Word 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id1_cmb4::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id1_cmb4::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id1_cmb4`]
+#[doc = "ID1_CMB4 (rw) register accessor: CAN Frame Identifier Word 1\n\nYou can [`read`](crate::Reg::read) this register and get [`id1_cmb4::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id1_cmb4::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id1_cmb4`]
 module"]
 #[doc(alias = "ID1_CMB4")]
 pub type Id1Cmb4 = crate::Reg<id1_cmb4::Id1Cmb4Spec>;
 #[doc = "CAN Frame Identifier Word 1"]
 pub mod id1_cmb4;
-#[doc = "CNSTAT_CMB5 (rw) register accessor: Buffer Status / Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cnstat_cmb5::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cnstat_cmb5::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnstat_cmb5`]
+#[doc = "CNSTAT_CMB5 (rw) register accessor: Buffer Status / Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cnstat_cmb5::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnstat_cmb5::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnstat_cmb5`]
 module"]
 #[doc(alias = "CNSTAT_CMB5")]
 pub type CnstatCmb5 = crate::Reg<cnstat_cmb5::CnstatCmb5Spec>;
 #[doc = "Buffer Status / Control Register"]
 pub mod cnstat_cmb5;
-#[doc = "TSTP_CMB5 (rw) register accessor: CAN Frame Timestamp\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tstp_cmb5::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tstp_cmb5::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstp_cmb5`]
+#[doc = "TSTP_CMB5 (rw) register accessor: CAN Frame Timestamp\n\nYou can [`read`](crate::Reg::read) this register and get [`tstp_cmb5::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tstp_cmb5::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstp_cmb5`]
 module"]
 #[doc(alias = "TSTP_CMB5")]
 pub type TstpCmb5 = crate::Reg<tstp_cmb5::TstpCmb5Spec>;
 #[doc = "CAN Frame Timestamp"]
 pub mod tstp_cmb5;
-#[doc = "DATA3_CMB5 (rw) register accessor: CAN Frame Data Word 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data3_cmb5::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data3_cmb5::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data3_cmb5`]
+#[doc = "DATA3_CMB5 (rw) register accessor: CAN Frame Data Word 3\n\nYou can [`read`](crate::Reg::read) this register and get [`data3_cmb5::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data3_cmb5::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data3_cmb5`]
 module"]
 #[doc(alias = "DATA3_CMB5")]
 pub type Data3Cmb5 = crate::Reg<data3_cmb5::Data3Cmb5Spec>;
 #[doc = "CAN Frame Data Word 3"]
 pub mod data3_cmb5;
-#[doc = "DATA2_CMB5 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data2_cmb5::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data2_cmb5::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data2_cmb5`]
+#[doc = "DATA2_CMB5 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data2_cmb5::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data2_cmb5::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data2_cmb5`]
 module"]
 #[doc(alias = "DATA2_CMB5")]
 pub type Data2Cmb5 = crate::Reg<data2_cmb5::Data2Cmb5Spec>;
 #[doc = "CAN Frame Data Word 2"]
 pub mod data2_cmb5;
-#[doc = "DATA1_CMB5 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data1_cmb5::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data1_cmb5::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data1_cmb5`]
+#[doc = "DATA1_CMB5 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data1_cmb5::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data1_cmb5::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data1_cmb5`]
 module"]
 #[doc(alias = "DATA1_CMB5")]
 pub type Data1Cmb5 = crate::Reg<data1_cmb5::Data1Cmb5Spec>;
 #[doc = "CAN Frame Data Word 2"]
 pub mod data1_cmb5;
-#[doc = "DATA0_CMB5 (rw) register accessor: CAN Frame Data Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data0_cmb5::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data0_cmb5::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data0_cmb5`]
+#[doc = "DATA0_CMB5 (rw) register accessor: CAN Frame Data Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`data0_cmb5::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data0_cmb5::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data0_cmb5`]
 module"]
 #[doc(alias = "DATA0_CMB5")]
 pub type Data0Cmb5 = crate::Reg<data0_cmb5::Data0Cmb5Spec>;
 #[doc = "CAN Frame Data Word 0"]
 pub mod data0_cmb5;
-#[doc = "ID0_CMB5 (rw) register accessor: CAN Frame Identifier Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id0_cmb5::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id0_cmb5::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id0_cmb5`]
+#[doc = "ID0_CMB5 (rw) register accessor: CAN Frame Identifier Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`id0_cmb5::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id0_cmb5::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id0_cmb5`]
 module"]
 #[doc(alias = "ID0_CMB5")]
 pub type Id0Cmb5 = crate::Reg<id0_cmb5::Id0Cmb5Spec>;
 #[doc = "CAN Frame Identifier Word 0"]
 pub mod id0_cmb5;
-#[doc = "ID1_CMB5 (rw) register accessor: CAN Frame Identifier Word 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id1_cmb5::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id1_cmb5::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id1_cmb5`]
+#[doc = "ID1_CMB5 (rw) register accessor: CAN Frame Identifier Word 1\n\nYou can [`read`](crate::Reg::read) this register and get [`id1_cmb5::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id1_cmb5::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id1_cmb5`]
 module"]
 #[doc(alias = "ID1_CMB5")]
 pub type Id1Cmb5 = crate::Reg<id1_cmb5::Id1Cmb5Spec>;
 #[doc = "CAN Frame Identifier Word 1"]
 pub mod id1_cmb5;
-#[doc = "CNSTAT_CMB6 (rw) register accessor: Buffer Status / Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cnstat_cmb6::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cnstat_cmb6::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnstat_cmb6`]
+#[doc = "CNSTAT_CMB6 (rw) register accessor: Buffer Status / Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cnstat_cmb6::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnstat_cmb6::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnstat_cmb6`]
 module"]
 #[doc(alias = "CNSTAT_CMB6")]
 pub type CnstatCmb6 = crate::Reg<cnstat_cmb6::CnstatCmb6Spec>;
 #[doc = "Buffer Status / Control Register"]
 pub mod cnstat_cmb6;
-#[doc = "TSTP_CMB6 (rw) register accessor: CAN Frame Timestamp\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tstp_cmb6::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tstp_cmb6::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstp_cmb6`]
+#[doc = "TSTP_CMB6 (rw) register accessor: CAN Frame Timestamp\n\nYou can [`read`](crate::Reg::read) this register and get [`tstp_cmb6::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tstp_cmb6::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstp_cmb6`]
 module"]
 #[doc(alias = "TSTP_CMB6")]
 pub type TstpCmb6 = crate::Reg<tstp_cmb6::TstpCmb6Spec>;
 #[doc = "CAN Frame Timestamp"]
 pub mod tstp_cmb6;
-#[doc = "DATA3_CMB6 (rw) register accessor: CAN Frame Data Word 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data3_cmb6::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data3_cmb6::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data3_cmb6`]
+#[doc = "DATA3_CMB6 (rw) register accessor: CAN Frame Data Word 3\n\nYou can [`read`](crate::Reg::read) this register and get [`data3_cmb6::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data3_cmb6::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data3_cmb6`]
 module"]
 #[doc(alias = "DATA3_CMB6")]
 pub type Data3Cmb6 = crate::Reg<data3_cmb6::Data3Cmb6Spec>;
 #[doc = "CAN Frame Data Word 3"]
 pub mod data3_cmb6;
-#[doc = "DATA2_CMB6 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data2_cmb6::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data2_cmb6::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data2_cmb6`]
+#[doc = "DATA2_CMB6 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data2_cmb6::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data2_cmb6::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data2_cmb6`]
 module"]
 #[doc(alias = "DATA2_CMB6")]
 pub type Data2Cmb6 = crate::Reg<data2_cmb6::Data2Cmb6Spec>;
 #[doc = "CAN Frame Data Word 2"]
 pub mod data2_cmb6;
-#[doc = "DATA1_CMB6 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data1_cmb6::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data1_cmb6::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data1_cmb6`]
+#[doc = "DATA1_CMB6 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data1_cmb6::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data1_cmb6::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data1_cmb6`]
 module"]
 #[doc(alias = "DATA1_CMB6")]
 pub type Data1Cmb6 = crate::Reg<data1_cmb6::Data1Cmb6Spec>;
 #[doc = "CAN Frame Data Word 2"]
 pub mod data1_cmb6;
-#[doc = "DATA0_CMB6 (rw) register accessor: CAN Frame Data Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data0_cmb6::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data0_cmb6::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data0_cmb6`]
+#[doc = "DATA0_CMB6 (rw) register accessor: CAN Frame Data Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`data0_cmb6::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data0_cmb6::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data0_cmb6`]
 module"]
 #[doc(alias = "DATA0_CMB6")]
 pub type Data0Cmb6 = crate::Reg<data0_cmb6::Data0Cmb6Spec>;
 #[doc = "CAN Frame Data Word 0"]
 pub mod data0_cmb6;
-#[doc = "ID0_CMB6 (rw) register accessor: CAN Frame Identifier Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id0_cmb6::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id0_cmb6::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id0_cmb6`]
+#[doc = "ID0_CMB6 (rw) register accessor: CAN Frame Identifier Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`id0_cmb6::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id0_cmb6::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id0_cmb6`]
 module"]
 #[doc(alias = "ID0_CMB6")]
 pub type Id0Cmb6 = crate::Reg<id0_cmb6::Id0Cmb6Spec>;
 #[doc = "CAN Frame Identifier Word 0"]
 pub mod id0_cmb6;
-#[doc = "ID1_CMB6 (rw) register accessor: CAN Frame Identifier Word 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id1_cmb6::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id1_cmb6::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id1_cmb6`]
+#[doc = "ID1_CMB6 (rw) register accessor: CAN Frame Identifier Word 1\n\nYou can [`read`](crate::Reg::read) this register and get [`id1_cmb6::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id1_cmb6::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id1_cmb6`]
 module"]
 #[doc(alias = "ID1_CMB6")]
 pub type Id1Cmb6 = crate::Reg<id1_cmb6::Id1Cmb6Spec>;
 #[doc = "CAN Frame Identifier Word 1"]
 pub mod id1_cmb6;
-#[doc = "CNSTAT_CMB7 (rw) register accessor: Buffer Status / Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cnstat_cmb7::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cnstat_cmb7::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnstat_cmb7`]
+#[doc = "CNSTAT_CMB7 (rw) register accessor: Buffer Status / Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cnstat_cmb7::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnstat_cmb7::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnstat_cmb7`]
 module"]
 #[doc(alias = "CNSTAT_CMB7")]
 pub type CnstatCmb7 = crate::Reg<cnstat_cmb7::CnstatCmb7Spec>;
 #[doc = "Buffer Status / Control Register"]
 pub mod cnstat_cmb7;
-#[doc = "TSTP_CMB7 (rw) register accessor: CAN Frame Timestamp\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tstp_cmb7::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tstp_cmb7::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstp_cmb7`]
+#[doc = "TSTP_CMB7 (rw) register accessor: CAN Frame Timestamp\n\nYou can [`read`](crate::Reg::read) this register and get [`tstp_cmb7::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tstp_cmb7::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstp_cmb7`]
 module"]
 #[doc(alias = "TSTP_CMB7")]
 pub type TstpCmb7 = crate::Reg<tstp_cmb7::TstpCmb7Spec>;
 #[doc = "CAN Frame Timestamp"]
 pub mod tstp_cmb7;
-#[doc = "DATA3_CMB7 (rw) register accessor: CAN Frame Data Word 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data3_cmb7::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data3_cmb7::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data3_cmb7`]
+#[doc = "DATA3_CMB7 (rw) register accessor: CAN Frame Data Word 3\n\nYou can [`read`](crate::Reg::read) this register and get [`data3_cmb7::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data3_cmb7::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data3_cmb7`]
 module"]
 #[doc(alias = "DATA3_CMB7")]
 pub type Data3Cmb7 = crate::Reg<data3_cmb7::Data3Cmb7Spec>;
 #[doc = "CAN Frame Data Word 3"]
 pub mod data3_cmb7;
-#[doc = "DATA2_CMB7 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data2_cmb7::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data2_cmb7::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data2_cmb7`]
+#[doc = "DATA2_CMB7 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data2_cmb7::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data2_cmb7::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data2_cmb7`]
 module"]
 #[doc(alias = "DATA2_CMB7")]
 pub type Data2Cmb7 = crate::Reg<data2_cmb7::Data2Cmb7Spec>;
 #[doc = "CAN Frame Data Word 2"]
 pub mod data2_cmb7;
-#[doc = "DATA1_CMB7 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data1_cmb7::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data1_cmb7::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data1_cmb7`]
+#[doc = "DATA1_CMB7 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data1_cmb7::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data1_cmb7::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data1_cmb7`]
 module"]
 #[doc(alias = "DATA1_CMB7")]
 pub type Data1Cmb7 = crate::Reg<data1_cmb7::Data1Cmb7Spec>;
 #[doc = "CAN Frame Data Word 2"]
 pub mod data1_cmb7;
-#[doc = "DATA0_CMB7 (rw) register accessor: CAN Frame Data Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data0_cmb7::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data0_cmb7::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data0_cmb7`]
+#[doc = "DATA0_CMB7 (rw) register accessor: CAN Frame Data Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`data0_cmb7::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data0_cmb7::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data0_cmb7`]
 module"]
 #[doc(alias = "DATA0_CMB7")]
 pub type Data0Cmb7 = crate::Reg<data0_cmb7::Data0Cmb7Spec>;
 #[doc = "CAN Frame Data Word 0"]
 pub mod data0_cmb7;
-#[doc = "ID0_CMB7 (rw) register accessor: CAN Frame Identifier Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id0_cmb7::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id0_cmb7::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id0_cmb7`]
+#[doc = "ID0_CMB7 (rw) register accessor: CAN Frame Identifier Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`id0_cmb7::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id0_cmb7::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id0_cmb7`]
 module"]
 #[doc(alias = "ID0_CMB7")]
 pub type Id0Cmb7 = crate::Reg<id0_cmb7::Id0Cmb7Spec>;
 #[doc = "CAN Frame Identifier Word 0"]
 pub mod id0_cmb7;
-#[doc = "ID1_CMB7 (rw) register accessor: CAN Frame Identifier Word 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id1_cmb7::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id1_cmb7::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id1_cmb7`]
+#[doc = "ID1_CMB7 (rw) register accessor: CAN Frame Identifier Word 1\n\nYou can [`read`](crate::Reg::read) this register and get [`id1_cmb7::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id1_cmb7::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id1_cmb7`]
 module"]
 #[doc(alias = "ID1_CMB7")]
 pub type Id1Cmb7 = crate::Reg<id1_cmb7::Id1Cmb7Spec>;
 #[doc = "CAN Frame Identifier Word 1"]
 pub mod id1_cmb7;
-#[doc = "CNSTAT_CMB8 (rw) register accessor: Buffer Status / Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cnstat_cmb8::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cnstat_cmb8::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnstat_cmb8`]
+#[doc = "CNSTAT_CMB8 (rw) register accessor: Buffer Status / Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cnstat_cmb8::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnstat_cmb8::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnstat_cmb8`]
 module"]
 #[doc(alias = "CNSTAT_CMB8")]
 pub type CnstatCmb8 = crate::Reg<cnstat_cmb8::CnstatCmb8Spec>;
 #[doc = "Buffer Status / Control Register"]
 pub mod cnstat_cmb8;
-#[doc = "TSTP_CMB8 (rw) register accessor: CAN Frame Timestamp\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tstp_cmb8::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tstp_cmb8::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstp_cmb8`]
+#[doc = "TSTP_CMB8 (rw) register accessor: CAN Frame Timestamp\n\nYou can [`read`](crate::Reg::read) this register and get [`tstp_cmb8::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tstp_cmb8::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstp_cmb8`]
 module"]
 #[doc(alias = "TSTP_CMB8")]
 pub type TstpCmb8 = crate::Reg<tstp_cmb8::TstpCmb8Spec>;
 #[doc = "CAN Frame Timestamp"]
 pub mod tstp_cmb8;
-#[doc = "DATA3_CMB8 (rw) register accessor: CAN Frame Data Word 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data3_cmb8::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data3_cmb8::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data3_cmb8`]
+#[doc = "DATA3_CMB8 (rw) register accessor: CAN Frame Data Word 3\n\nYou can [`read`](crate::Reg::read) this register and get [`data3_cmb8::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data3_cmb8::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data3_cmb8`]
 module"]
 #[doc(alias = "DATA3_CMB8")]
 pub type Data3Cmb8 = crate::Reg<data3_cmb8::Data3Cmb8Spec>;
 #[doc = "CAN Frame Data Word 3"]
 pub mod data3_cmb8;
-#[doc = "DATA2_CMB8 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data2_cmb8::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data2_cmb8::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data2_cmb8`]
+#[doc = "DATA2_CMB8 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data2_cmb8::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data2_cmb8::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data2_cmb8`]
 module"]
 #[doc(alias = "DATA2_CMB8")]
 pub type Data2Cmb8 = crate::Reg<data2_cmb8::Data2Cmb8Spec>;
 #[doc = "CAN Frame Data Word 2"]
 pub mod data2_cmb8;
-#[doc = "DATA1_CMB8 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data1_cmb8::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data1_cmb8::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data1_cmb8`]
+#[doc = "DATA1_CMB8 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data1_cmb8::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data1_cmb8::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data1_cmb8`]
 module"]
 #[doc(alias = "DATA1_CMB8")]
 pub type Data1Cmb8 = crate::Reg<data1_cmb8::Data1Cmb8Spec>;
 #[doc = "CAN Frame Data Word 2"]
 pub mod data1_cmb8;
-#[doc = "DATA0_CMB8 (rw) register accessor: CAN Frame Data Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data0_cmb8::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data0_cmb8::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data0_cmb8`]
+#[doc = "DATA0_CMB8 (rw) register accessor: CAN Frame Data Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`data0_cmb8::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data0_cmb8::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data0_cmb8`]
 module"]
 #[doc(alias = "DATA0_CMB8")]
 pub type Data0Cmb8 = crate::Reg<data0_cmb8::Data0Cmb8Spec>;
 #[doc = "CAN Frame Data Word 0"]
 pub mod data0_cmb8;
-#[doc = "ID0_CMB8 (rw) register accessor: CAN Frame Identifier Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id0_cmb8::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id0_cmb8::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id0_cmb8`]
+#[doc = "ID0_CMB8 (rw) register accessor: CAN Frame Identifier Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`id0_cmb8::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id0_cmb8::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id0_cmb8`]
 module"]
 #[doc(alias = "ID0_CMB8")]
 pub type Id0Cmb8 = crate::Reg<id0_cmb8::Id0Cmb8Spec>;
 #[doc = "CAN Frame Identifier Word 0"]
 pub mod id0_cmb8;
-#[doc = "ID1_CMB8 (rw) register accessor: CAN Frame Identifier Word 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id1_cmb8::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id1_cmb8::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id1_cmb8`]
+#[doc = "ID1_CMB8 (rw) register accessor: CAN Frame Identifier Word 1\n\nYou can [`read`](crate::Reg::read) this register and get [`id1_cmb8::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id1_cmb8::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id1_cmb8`]
 module"]
 #[doc(alias = "ID1_CMB8")]
 pub type Id1Cmb8 = crate::Reg<id1_cmb8::Id1Cmb8Spec>;
 #[doc = "CAN Frame Identifier Word 1"]
 pub mod id1_cmb8;
-#[doc = "CNSTAT_CMB9 (rw) register accessor: Buffer Status / Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cnstat_cmb9::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cnstat_cmb9::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnstat_cmb9`]
+#[doc = "CNSTAT_CMB9 (rw) register accessor: Buffer Status / Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cnstat_cmb9::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnstat_cmb9::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnstat_cmb9`]
 module"]
 #[doc(alias = "CNSTAT_CMB9")]
 pub type CnstatCmb9 = crate::Reg<cnstat_cmb9::CnstatCmb9Spec>;
 #[doc = "Buffer Status / Control Register"]
 pub mod cnstat_cmb9;
-#[doc = "TSTP_CMB9 (rw) register accessor: CAN Frame Timestamp\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tstp_cmb9::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tstp_cmb9::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstp_cmb9`]
+#[doc = "TSTP_CMB9 (rw) register accessor: CAN Frame Timestamp\n\nYou can [`read`](crate::Reg::read) this register and get [`tstp_cmb9::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tstp_cmb9::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstp_cmb9`]
 module"]
 #[doc(alias = "TSTP_CMB9")]
 pub type TstpCmb9 = crate::Reg<tstp_cmb9::TstpCmb9Spec>;
 #[doc = "CAN Frame Timestamp"]
 pub mod tstp_cmb9;
-#[doc = "DATA3_CMB9 (rw) register accessor: CAN Frame Data Word 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data3_cmb9::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data3_cmb9::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data3_cmb9`]
+#[doc = "DATA3_CMB9 (rw) register accessor: CAN Frame Data Word 3\n\nYou can [`read`](crate::Reg::read) this register and get [`data3_cmb9::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data3_cmb9::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data3_cmb9`]
 module"]
 #[doc(alias = "DATA3_CMB9")]
 pub type Data3Cmb9 = crate::Reg<data3_cmb9::Data3Cmb9Spec>;
 #[doc = "CAN Frame Data Word 3"]
 pub mod data3_cmb9;
-#[doc = "DATA2_CMB9 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data2_cmb9::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data2_cmb9::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data2_cmb9`]
+#[doc = "DATA2_CMB9 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data2_cmb9::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data2_cmb9::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data2_cmb9`]
 module"]
 #[doc(alias = "DATA2_CMB9")]
 pub type Data2Cmb9 = crate::Reg<data2_cmb9::Data2Cmb9Spec>;
 #[doc = "CAN Frame Data Word 2"]
 pub mod data2_cmb9;
-#[doc = "DATA1_CMB9 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data1_cmb9::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data1_cmb9::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data1_cmb9`]
+#[doc = "DATA1_CMB9 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data1_cmb9::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data1_cmb9::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data1_cmb9`]
 module"]
 #[doc(alias = "DATA1_CMB9")]
 pub type Data1Cmb9 = crate::Reg<data1_cmb9::Data1Cmb9Spec>;
 #[doc = "CAN Frame Data Word 2"]
 pub mod data1_cmb9;
-#[doc = "DATA0_CMB9 (rw) register accessor: CAN Frame Data Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data0_cmb9::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data0_cmb9::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data0_cmb9`]
+#[doc = "DATA0_CMB9 (rw) register accessor: CAN Frame Data Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`data0_cmb9::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data0_cmb9::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data0_cmb9`]
 module"]
 #[doc(alias = "DATA0_CMB9")]
 pub type Data0Cmb9 = crate::Reg<data0_cmb9::Data0Cmb9Spec>;
 #[doc = "CAN Frame Data Word 0"]
 pub mod data0_cmb9;
-#[doc = "ID0_CMB9 (rw) register accessor: CAN Frame Identifier Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id0_cmb9::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id0_cmb9::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id0_cmb9`]
+#[doc = "ID0_CMB9 (rw) register accessor: CAN Frame Identifier Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`id0_cmb9::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id0_cmb9::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id0_cmb9`]
 module"]
 #[doc(alias = "ID0_CMB9")]
 pub type Id0Cmb9 = crate::Reg<id0_cmb9::Id0Cmb9Spec>;
 #[doc = "CAN Frame Identifier Word 0"]
 pub mod id0_cmb9;
-#[doc = "ID1_CMB9 (rw) register accessor: CAN Frame Identifier Word 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id1_cmb9::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id1_cmb9::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id1_cmb9`]
+#[doc = "ID1_CMB9 (rw) register accessor: CAN Frame Identifier Word 1\n\nYou can [`read`](crate::Reg::read) this register and get [`id1_cmb9::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id1_cmb9::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id1_cmb9`]
 module"]
 #[doc(alias = "ID1_CMB9")]
 pub type Id1Cmb9 = crate::Reg<id1_cmb9::Id1Cmb9Spec>;
 #[doc = "CAN Frame Identifier Word 1"]
 pub mod id1_cmb9;
-#[doc = "CNSTAT_CMB10 (rw) register accessor: Buffer Status / Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cnstat_cmb10::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cnstat_cmb10::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnstat_cmb10`]
+#[doc = "CNSTAT_CMB10 (rw) register accessor: Buffer Status / Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cnstat_cmb10::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnstat_cmb10::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnstat_cmb10`]
 module"]
 #[doc(alias = "CNSTAT_CMB10")]
 pub type CnstatCmb10 = crate::Reg<cnstat_cmb10::CnstatCmb10Spec>;
 #[doc = "Buffer Status / Control Register"]
 pub mod cnstat_cmb10;
-#[doc = "TSTP_CMB10 (rw) register accessor: CAN Frame Timestamp\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tstp_cmb10::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tstp_cmb10::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstp_cmb10`]
+#[doc = "TSTP_CMB10 (rw) register accessor: CAN Frame Timestamp\n\nYou can [`read`](crate::Reg::read) this register and get [`tstp_cmb10::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tstp_cmb10::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstp_cmb10`]
 module"]
 #[doc(alias = "TSTP_CMB10")]
 pub type TstpCmb10 = crate::Reg<tstp_cmb10::TstpCmb10Spec>;
 #[doc = "CAN Frame Timestamp"]
 pub mod tstp_cmb10;
-#[doc = "DATA3_CMB10 (rw) register accessor: CAN Frame Data Word 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data3_cmb10::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data3_cmb10::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data3_cmb10`]
+#[doc = "DATA3_CMB10 (rw) register accessor: CAN Frame Data Word 3\n\nYou can [`read`](crate::Reg::read) this register and get [`data3_cmb10::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data3_cmb10::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data3_cmb10`]
 module"]
 #[doc(alias = "DATA3_CMB10")]
 pub type Data3Cmb10 = crate::Reg<data3_cmb10::Data3Cmb10Spec>;
 #[doc = "CAN Frame Data Word 3"]
 pub mod data3_cmb10;
-#[doc = "DATA2_CMB10 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data2_cmb10::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data2_cmb10::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data2_cmb10`]
+#[doc = "DATA2_CMB10 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data2_cmb10::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data2_cmb10::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data2_cmb10`]
 module"]
 #[doc(alias = "DATA2_CMB10")]
 pub type Data2Cmb10 = crate::Reg<data2_cmb10::Data2Cmb10Spec>;
 #[doc = "CAN Frame Data Word 2"]
 pub mod data2_cmb10;
-#[doc = "DATA1_CMB10 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data1_cmb10::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data1_cmb10::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data1_cmb10`]
+#[doc = "DATA1_CMB10 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data1_cmb10::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data1_cmb10::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data1_cmb10`]
 module"]
 #[doc(alias = "DATA1_CMB10")]
 pub type Data1Cmb10 = crate::Reg<data1_cmb10::Data1Cmb10Spec>;
 #[doc = "CAN Frame Data Word 2"]
 pub mod data1_cmb10;
-#[doc = "DATA0_CMB10 (rw) register accessor: CAN Frame Data Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data0_cmb10::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data0_cmb10::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data0_cmb10`]
+#[doc = "DATA0_CMB10 (rw) register accessor: CAN Frame Data Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`data0_cmb10::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data0_cmb10::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data0_cmb10`]
 module"]
 #[doc(alias = "DATA0_CMB10")]
 pub type Data0Cmb10 = crate::Reg<data0_cmb10::Data0Cmb10Spec>;
 #[doc = "CAN Frame Data Word 0"]
 pub mod data0_cmb10;
-#[doc = "ID0_CMB10 (rw) register accessor: CAN Frame Identifier Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id0_cmb10::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id0_cmb10::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id0_cmb10`]
+#[doc = "ID0_CMB10 (rw) register accessor: CAN Frame Identifier Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`id0_cmb10::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id0_cmb10::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id0_cmb10`]
 module"]
 #[doc(alias = "ID0_CMB10")]
 pub type Id0Cmb10 = crate::Reg<id0_cmb10::Id0Cmb10Spec>;
 #[doc = "CAN Frame Identifier Word 0"]
 pub mod id0_cmb10;
-#[doc = "ID1_CMB10 (rw) register accessor: CAN Frame Identifier Word 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id1_cmb10::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id1_cmb10::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id1_cmb10`]
+#[doc = "ID1_CMB10 (rw) register accessor: CAN Frame Identifier Word 1\n\nYou can [`read`](crate::Reg::read) this register and get [`id1_cmb10::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id1_cmb10::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id1_cmb10`]
 module"]
 #[doc(alias = "ID1_CMB10")]
 pub type Id1Cmb10 = crate::Reg<id1_cmb10::Id1Cmb10Spec>;
 #[doc = "CAN Frame Identifier Word 1"]
 pub mod id1_cmb10;
-#[doc = "CNSTAT_CMB11 (rw) register accessor: Buffer Status / Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cnstat_cmb11::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cnstat_cmb11::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnstat_cmb11`]
+#[doc = "CNSTAT_CMB11 (rw) register accessor: Buffer Status / Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cnstat_cmb11::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnstat_cmb11::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnstat_cmb11`]
 module"]
 #[doc(alias = "CNSTAT_CMB11")]
 pub type CnstatCmb11 = crate::Reg<cnstat_cmb11::CnstatCmb11Spec>;
 #[doc = "Buffer Status / Control Register"]
 pub mod cnstat_cmb11;
-#[doc = "TSTP_CMB11 (rw) register accessor: CAN Frame Timestamp\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tstp_cmb11::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tstp_cmb11::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstp_cmb11`]
+#[doc = "TSTP_CMB11 (rw) register accessor: CAN Frame Timestamp\n\nYou can [`read`](crate::Reg::read) this register and get [`tstp_cmb11::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tstp_cmb11::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstp_cmb11`]
 module"]
 #[doc(alias = "TSTP_CMB11")]
 pub type TstpCmb11 = crate::Reg<tstp_cmb11::TstpCmb11Spec>;
 #[doc = "CAN Frame Timestamp"]
 pub mod tstp_cmb11;
-#[doc = "DATA3_CMB11 (rw) register accessor: CAN Frame Data Word 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data3_cmb11::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data3_cmb11::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data3_cmb11`]
+#[doc = "DATA3_CMB11 (rw) register accessor: CAN Frame Data Word 3\n\nYou can [`read`](crate::Reg::read) this register and get [`data3_cmb11::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data3_cmb11::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data3_cmb11`]
 module"]
 #[doc(alias = "DATA3_CMB11")]
 pub type Data3Cmb11 = crate::Reg<data3_cmb11::Data3Cmb11Spec>;
 #[doc = "CAN Frame Data Word 3"]
 pub mod data3_cmb11;
-#[doc = "DATA2_CMB11 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data2_cmb11::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data2_cmb11::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data2_cmb11`]
+#[doc = "DATA2_CMB11 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data2_cmb11::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data2_cmb11::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data2_cmb11`]
 module"]
 #[doc(alias = "DATA2_CMB11")]
 pub type Data2Cmb11 = crate::Reg<data2_cmb11::Data2Cmb11Spec>;
 #[doc = "CAN Frame Data Word 2"]
 pub mod data2_cmb11;
-#[doc = "DATA1_CMB11 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data1_cmb11::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data1_cmb11::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data1_cmb11`]
+#[doc = "DATA1_CMB11 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data1_cmb11::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data1_cmb11::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data1_cmb11`]
 module"]
 #[doc(alias = "DATA1_CMB11")]
 pub type Data1Cmb11 = crate::Reg<data1_cmb11::Data1Cmb11Spec>;
 #[doc = "CAN Frame Data Word 2"]
 pub mod data1_cmb11;
-#[doc = "DATA0_CMB11 (rw) register accessor: CAN Frame Data Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data0_cmb11::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data0_cmb11::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data0_cmb11`]
+#[doc = "DATA0_CMB11 (rw) register accessor: CAN Frame Data Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`data0_cmb11::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data0_cmb11::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data0_cmb11`]
 module"]
 #[doc(alias = "DATA0_CMB11")]
 pub type Data0Cmb11 = crate::Reg<data0_cmb11::Data0Cmb11Spec>;
 #[doc = "CAN Frame Data Word 0"]
 pub mod data0_cmb11;
-#[doc = "ID0_CMB11 (rw) register accessor: CAN Frame Identifier Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id0_cmb11::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id0_cmb11::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id0_cmb11`]
+#[doc = "ID0_CMB11 (rw) register accessor: CAN Frame Identifier Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`id0_cmb11::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id0_cmb11::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id0_cmb11`]
 module"]
 #[doc(alias = "ID0_CMB11")]
 pub type Id0Cmb11 = crate::Reg<id0_cmb11::Id0Cmb11Spec>;
 #[doc = "CAN Frame Identifier Word 0"]
 pub mod id0_cmb11;
-#[doc = "ID1_CMB11 (rw) register accessor: CAN Frame Identifier Word 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id1_cmb11::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id1_cmb11::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id1_cmb11`]
+#[doc = "ID1_CMB11 (rw) register accessor: CAN Frame Identifier Word 1\n\nYou can [`read`](crate::Reg::read) this register and get [`id1_cmb11::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id1_cmb11::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id1_cmb11`]
 module"]
 #[doc(alias = "ID1_CMB11")]
 pub type Id1Cmb11 = crate::Reg<id1_cmb11::Id1Cmb11Spec>;
 #[doc = "CAN Frame Identifier Word 1"]
 pub mod id1_cmb11;
-#[doc = "CNSTAT_CMB12 (rw) register accessor: Buffer Status / Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cnstat_cmb12::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cnstat_cmb12::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnstat_cmb12`]
+#[doc = "CNSTAT_CMB12 (rw) register accessor: Buffer Status / Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cnstat_cmb12::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnstat_cmb12::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnstat_cmb12`]
 module"]
 #[doc(alias = "CNSTAT_CMB12")]
 pub type CnstatCmb12 = crate::Reg<cnstat_cmb12::CnstatCmb12Spec>;
 #[doc = "Buffer Status / Control Register"]
 pub mod cnstat_cmb12;
-#[doc = "TSTP_CMB12 (rw) register accessor: CAN Frame Timestamp\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tstp_cmb12::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tstp_cmb12::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstp_cmb12`]
+#[doc = "TSTP_CMB12 (rw) register accessor: CAN Frame Timestamp\n\nYou can [`read`](crate::Reg::read) this register and get [`tstp_cmb12::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tstp_cmb12::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstp_cmb12`]
 module"]
 #[doc(alias = "TSTP_CMB12")]
 pub type TstpCmb12 = crate::Reg<tstp_cmb12::TstpCmb12Spec>;
 #[doc = "CAN Frame Timestamp"]
 pub mod tstp_cmb12;
-#[doc = "DATA3_CMB12 (rw) register accessor: CAN Frame Data Word 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data3_cmb12::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data3_cmb12::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data3_cmb12`]
+#[doc = "DATA3_CMB12 (rw) register accessor: CAN Frame Data Word 3\n\nYou can [`read`](crate::Reg::read) this register and get [`data3_cmb12::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data3_cmb12::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data3_cmb12`]
 module"]
 #[doc(alias = "DATA3_CMB12")]
 pub type Data3Cmb12 = crate::Reg<data3_cmb12::Data3Cmb12Spec>;
 #[doc = "CAN Frame Data Word 3"]
 pub mod data3_cmb12;
-#[doc = "DATA2_CMB12 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data2_cmb12::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data2_cmb12::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data2_cmb12`]
+#[doc = "DATA2_CMB12 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data2_cmb12::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data2_cmb12::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data2_cmb12`]
 module"]
 #[doc(alias = "DATA2_CMB12")]
 pub type Data2Cmb12 = crate::Reg<data2_cmb12::Data2Cmb12Spec>;
 #[doc = "CAN Frame Data Word 2"]
 pub mod data2_cmb12;
-#[doc = "DATA1_CMB12 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data1_cmb12::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data1_cmb12::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data1_cmb12`]
+#[doc = "DATA1_CMB12 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data1_cmb12::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data1_cmb12::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data1_cmb12`]
 module"]
 #[doc(alias = "DATA1_CMB12")]
 pub type Data1Cmb12 = crate::Reg<data1_cmb12::Data1Cmb12Spec>;
 #[doc = "CAN Frame Data Word 2"]
 pub mod data1_cmb12;
-#[doc = "DATA0_CMB12 (rw) register accessor: CAN Frame Data Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data0_cmb12::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data0_cmb12::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data0_cmb12`]
+#[doc = "DATA0_CMB12 (rw) register accessor: CAN Frame Data Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`data0_cmb12::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data0_cmb12::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data0_cmb12`]
 module"]
 #[doc(alias = "DATA0_CMB12")]
 pub type Data0Cmb12 = crate::Reg<data0_cmb12::Data0Cmb12Spec>;
 #[doc = "CAN Frame Data Word 0"]
 pub mod data0_cmb12;
-#[doc = "ID0_CMB12 (rw) register accessor: CAN Frame Identifier Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id0_cmb12::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id0_cmb12::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id0_cmb12`]
+#[doc = "ID0_CMB12 (rw) register accessor: CAN Frame Identifier Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`id0_cmb12::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id0_cmb12::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id0_cmb12`]
 module"]
 #[doc(alias = "ID0_CMB12")]
 pub type Id0Cmb12 = crate::Reg<id0_cmb12::Id0Cmb12Spec>;
 #[doc = "CAN Frame Identifier Word 0"]
 pub mod id0_cmb12;
-#[doc = "ID1_CMB12 (rw) register accessor: CAN Frame Identifier Word 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id1_cmb12::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id1_cmb12::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id1_cmb12`]
+#[doc = "ID1_CMB12 (rw) register accessor: CAN Frame Identifier Word 1\n\nYou can [`read`](crate::Reg::read) this register and get [`id1_cmb12::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id1_cmb12::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id1_cmb12`]
 module"]
 #[doc(alias = "ID1_CMB12")]
 pub type Id1Cmb12 = crate::Reg<id1_cmb12::Id1Cmb12Spec>;
 #[doc = "CAN Frame Identifier Word 1"]
 pub mod id1_cmb12;
-#[doc = "CNSTAT_CMB13 (rw) register accessor: Buffer Status / Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cnstat_cmb13::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cnstat_cmb13::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnstat_cmb13`]
+#[doc = "CNSTAT_CMB13 (rw) register accessor: Buffer Status / Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cnstat_cmb13::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnstat_cmb13::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnstat_cmb13`]
 module"]
 #[doc(alias = "CNSTAT_CMB13")]
 pub type CnstatCmb13 = crate::Reg<cnstat_cmb13::CnstatCmb13Spec>;
 #[doc = "Buffer Status / Control Register"]
 pub mod cnstat_cmb13;
-#[doc = "TSTP_CMB13 (rw) register accessor: CAN Frame Timestamp\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tstp_cmb13::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tstp_cmb13::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstp_cmb13`]
+#[doc = "TSTP_CMB13 (rw) register accessor: CAN Frame Timestamp\n\nYou can [`read`](crate::Reg::read) this register and get [`tstp_cmb13::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tstp_cmb13::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstp_cmb13`]
 module"]
 #[doc(alias = "TSTP_CMB13")]
 pub type TstpCmb13 = crate::Reg<tstp_cmb13::TstpCmb13Spec>;
 #[doc = "CAN Frame Timestamp"]
 pub mod tstp_cmb13;
-#[doc = "DATA3_CMB13 (rw) register accessor: CAN Frame Data Word 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data3_cmb13::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data3_cmb13::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data3_cmb13`]
+#[doc = "DATA3_CMB13 (rw) register accessor: CAN Frame Data Word 3\n\nYou can [`read`](crate::Reg::read) this register and get [`data3_cmb13::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data3_cmb13::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data3_cmb13`]
 module"]
 #[doc(alias = "DATA3_CMB13")]
 pub type Data3Cmb13 = crate::Reg<data3_cmb13::Data3Cmb13Spec>;
 #[doc = "CAN Frame Data Word 3"]
 pub mod data3_cmb13;
-#[doc = "DATA2_CMB13 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data2_cmb13::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data2_cmb13::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data2_cmb13`]
+#[doc = "DATA2_CMB13 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data2_cmb13::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data2_cmb13::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data2_cmb13`]
 module"]
 #[doc(alias = "DATA2_CMB13")]
 pub type Data2Cmb13 = crate::Reg<data2_cmb13::Data2Cmb13Spec>;
 #[doc = "CAN Frame Data Word 2"]
 pub mod data2_cmb13;
-#[doc = "DATA1_CMB13 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data1_cmb13::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data1_cmb13::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data1_cmb13`]
+#[doc = "DATA1_CMB13 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data1_cmb13::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data1_cmb13::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data1_cmb13`]
 module"]
 #[doc(alias = "DATA1_CMB13")]
 pub type Data1Cmb13 = crate::Reg<data1_cmb13::Data1Cmb13Spec>;
 #[doc = "CAN Frame Data Word 2"]
 pub mod data1_cmb13;
-#[doc = "DATA0_CMB13 (rw) register accessor: CAN Frame Data Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data0_cmb13::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data0_cmb13::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data0_cmb13`]
+#[doc = "DATA0_CMB13 (rw) register accessor: CAN Frame Data Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`data0_cmb13::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data0_cmb13::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data0_cmb13`]
 module"]
 #[doc(alias = "DATA0_CMB13")]
 pub type Data0Cmb13 = crate::Reg<data0_cmb13::Data0Cmb13Spec>;
 #[doc = "CAN Frame Data Word 0"]
 pub mod data0_cmb13;
-#[doc = "ID0_CMB13 (rw) register accessor: CAN Frame Identifier Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id0_cmb13::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id0_cmb13::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id0_cmb13`]
+#[doc = "ID0_CMB13 (rw) register accessor: CAN Frame Identifier Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`id0_cmb13::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id0_cmb13::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id0_cmb13`]
 module"]
 #[doc(alias = "ID0_CMB13")]
 pub type Id0Cmb13 = crate::Reg<id0_cmb13::Id0Cmb13Spec>;
 #[doc = "CAN Frame Identifier Word 0"]
 pub mod id0_cmb13;
-#[doc = "ID1_CMB13 (rw) register accessor: CAN Frame Identifier Word 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id1_cmb13::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id1_cmb13::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id1_cmb13`]
+#[doc = "ID1_CMB13 (rw) register accessor: CAN Frame Identifier Word 1\n\nYou can [`read`](crate::Reg::read) this register and get [`id1_cmb13::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id1_cmb13::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id1_cmb13`]
 module"]
 #[doc(alias = "ID1_CMB13")]
 pub type Id1Cmb13 = crate::Reg<id1_cmb13::Id1Cmb13Spec>;
 #[doc = "CAN Frame Identifier Word 1"]
 pub mod id1_cmb13;
-#[doc = "CNSTAT_CMB14 (rw) register accessor: Buffer Status / Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cnstat_cmb14::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cnstat_cmb14::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnstat_cmb14`]
+#[doc = "CNSTAT_CMB14 (rw) register accessor: Buffer Status / Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cnstat_cmb14::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnstat_cmb14::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnstat_cmb14`]
 module"]
 #[doc(alias = "CNSTAT_CMB14")]
 pub type CnstatCmb14 = crate::Reg<cnstat_cmb14::CnstatCmb14Spec>;
 #[doc = "Buffer Status / Control Register"]
 pub mod cnstat_cmb14;
-#[doc = "TSTP_CMB14 (rw) register accessor: CAN Frame Timestamp\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tstp_cmb14::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tstp_cmb14::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstp_cmb14`]
+#[doc = "TSTP_CMB14 (rw) register accessor: CAN Frame Timestamp\n\nYou can [`read`](crate::Reg::read) this register and get [`tstp_cmb14::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tstp_cmb14::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstp_cmb14`]
 module"]
 #[doc(alias = "TSTP_CMB14")]
 pub type TstpCmb14 = crate::Reg<tstp_cmb14::TstpCmb14Spec>;
 #[doc = "CAN Frame Timestamp"]
 pub mod tstp_cmb14;
-#[doc = "DATA3_CMB14 (rw) register accessor: CAN Frame Data Word 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data3_cmb14::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data3_cmb14::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data3_cmb14`]
+#[doc = "DATA3_CMB14 (rw) register accessor: CAN Frame Data Word 3\n\nYou can [`read`](crate::Reg::read) this register and get [`data3_cmb14::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data3_cmb14::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data3_cmb14`]
 module"]
 #[doc(alias = "DATA3_CMB14")]
 pub type Data3Cmb14 = crate::Reg<data3_cmb14::Data3Cmb14Spec>;
 #[doc = "CAN Frame Data Word 3"]
 pub mod data3_cmb14;
-#[doc = "DATA2_CMB14 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data2_cmb14::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data2_cmb14::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data2_cmb14`]
+#[doc = "DATA2_CMB14 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data2_cmb14::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data2_cmb14::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data2_cmb14`]
 module"]
 #[doc(alias = "DATA2_CMB14")]
 pub type Data2Cmb14 = crate::Reg<data2_cmb14::Data2Cmb14Spec>;
 #[doc = "CAN Frame Data Word 2"]
 pub mod data2_cmb14;
-#[doc = "DATA1_CMB14 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data1_cmb14::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data1_cmb14::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data1_cmb14`]
+#[doc = "DATA1_CMB14 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data1_cmb14::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data1_cmb14::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data1_cmb14`]
 module"]
 #[doc(alias = "DATA1_CMB14")]
 pub type Data1Cmb14 = crate::Reg<data1_cmb14::Data1Cmb14Spec>;
 #[doc = "CAN Frame Data Word 2"]
 pub mod data1_cmb14;
-#[doc = "DATA0_CMB14 (rw) register accessor: CAN Frame Data Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data0_cmb14::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data0_cmb14::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data0_cmb14`]
+#[doc = "DATA0_CMB14 (rw) register accessor: CAN Frame Data Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`data0_cmb14::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data0_cmb14::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data0_cmb14`]
 module"]
 #[doc(alias = "DATA0_CMB14")]
 pub type Data0Cmb14 = crate::Reg<data0_cmb14::Data0Cmb14Spec>;
 #[doc = "CAN Frame Data Word 0"]
 pub mod data0_cmb14;
-#[doc = "ID0_CMB14 (rw) register accessor: CAN Frame Identifier Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id0_cmb14::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id0_cmb14::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id0_cmb14`]
+#[doc = "ID0_CMB14 (rw) register accessor: CAN Frame Identifier Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`id0_cmb14::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id0_cmb14::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id0_cmb14`]
 module"]
 #[doc(alias = "ID0_CMB14")]
 pub type Id0Cmb14 = crate::Reg<id0_cmb14::Id0Cmb14Spec>;
 #[doc = "CAN Frame Identifier Word 0"]
 pub mod id0_cmb14;
-#[doc = "ID1_CMB14 (rw) register accessor: CAN Frame Identifier Word 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id1_cmb14::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id1_cmb14::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id1_cmb14`]
+#[doc = "ID1_CMB14 (rw) register accessor: CAN Frame Identifier Word 1\n\nYou can [`read`](crate::Reg::read) this register and get [`id1_cmb14::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id1_cmb14::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id1_cmb14`]
 module"]
 #[doc(alias = "ID1_CMB14")]
 pub type Id1Cmb14 = crate::Reg<id1_cmb14::Id1Cmb14Spec>;
 #[doc = "CAN Frame Identifier Word 1"]
 pub mod id1_cmb14;
-#[doc = "CNSTAT_HCMB (rw) register accessor: Buffer Status / Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cnstat_hcmb::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cnstat_hcmb::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnstat_hcmb`]
+#[doc = "CNSTAT_HCMB (rw) register accessor: Buffer Status / Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cnstat_hcmb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnstat_hcmb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnstat_hcmb`]
 module"]
 #[doc(alias = "CNSTAT_HCMB")]
 pub type CnstatHcmb = crate::Reg<cnstat_hcmb::CnstatHcmbSpec>;
 #[doc = "Buffer Status / Control Register"]
 pub mod cnstat_hcmb;
-#[doc = "TSTP_HCMB (rw) register accessor: CAN Frame Timestamp\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tstp_hcmb::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tstp_hcmb::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstp_hcmb`]
+#[doc = "TSTP_HCMB (rw) register accessor: CAN Frame Timestamp\n\nYou can [`read`](crate::Reg::read) this register and get [`tstp_hcmb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tstp_hcmb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstp_hcmb`]
 module"]
 #[doc(alias = "TSTP_HCMB")]
 pub type TstpHcmb = crate::Reg<tstp_hcmb::TstpHcmbSpec>;
 #[doc = "CAN Frame Timestamp"]
 pub mod tstp_hcmb;
-#[doc = "DATA3_HCMB (rw) register accessor: CAN Frame Data Word 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data3_hcmb::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data3_hcmb::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data3_hcmb`]
+#[doc = "DATA3_HCMB (rw) register accessor: CAN Frame Data Word 3\n\nYou can [`read`](crate::Reg::read) this register and get [`data3_hcmb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data3_hcmb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data3_hcmb`]
 module"]
 #[doc(alias = "DATA3_HCMB")]
 pub type Data3Hcmb = crate::Reg<data3_hcmb::Data3HcmbSpec>;
 #[doc = "CAN Frame Data Word 3"]
 pub mod data3_hcmb;
-#[doc = "DATA2_HCMB (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data2_hcmb::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data2_hcmb::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data2_hcmb`]
+#[doc = "DATA2_HCMB (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data2_hcmb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data2_hcmb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data2_hcmb`]
 module"]
 #[doc(alias = "DATA2_HCMB")]
 pub type Data2Hcmb = crate::Reg<data2_hcmb::Data2HcmbSpec>;
 #[doc = "CAN Frame Data Word 2"]
 pub mod data2_hcmb;
-#[doc = "DATA1_HCMB (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data1_hcmb::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data1_hcmb::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data1_hcmb`]
+#[doc = "DATA1_HCMB (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data1_hcmb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data1_hcmb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data1_hcmb`]
 module"]
 #[doc(alias = "DATA1_HCMB")]
 pub type Data1Hcmb = crate::Reg<data1_hcmb::Data1HcmbSpec>;
 #[doc = "CAN Frame Data Word 2"]
 pub mod data1_hcmb;
-#[doc = "DATA0_HCMB (rw) register accessor: CAN Frame Data Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data0_hcmb::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data0_hcmb::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data0_hcmb`]
+#[doc = "DATA0_HCMB (rw) register accessor: CAN Frame Data Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`data0_hcmb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data0_hcmb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data0_hcmb`]
 module"]
 #[doc(alias = "DATA0_HCMB")]
 pub type Data0Hcmb = crate::Reg<data0_hcmb::Data0HcmbSpec>;
 #[doc = "CAN Frame Data Word 0"]
 pub mod data0_hcmb;
-#[doc = "ID0_HCMB (rw) register accessor: CAN Frame Identifier Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id0_hcmb::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id0_hcmb::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id0_hcmb`]
+#[doc = "ID0_HCMB (rw) register accessor: CAN Frame Identifier Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`id0_hcmb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id0_hcmb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id0_hcmb`]
 module"]
 #[doc(alias = "ID0_HCMB")]
 pub type Id0Hcmb = crate::Reg<id0_hcmb::Id0HcmbSpec>;
 #[doc = "CAN Frame Identifier Word 0"]
 pub mod id0_hcmb;
-#[doc = "ID1_HCMB (rw) register accessor: CAN Frame Identifier Word 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id1_hcmb::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id1_hcmb::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id1_hcmb`]
+#[doc = "ID1_HCMB (rw) register accessor: CAN Frame Identifier Word 1\n\nYou can [`read`](crate::Reg::read) this register and get [`id1_hcmb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id1_hcmb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id1_hcmb`]
 module"]
 #[doc(alias = "ID1_HCMB")]
 pub type Id1Hcmb = crate::Reg<id1_hcmb::Id1HcmbSpec>;
 #[doc = "CAN Frame Identifier Word 1"]
 pub mod id1_hcmb;
-#[doc = "CGCR (rw) register accessor: CAN Global Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cgcr::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cgcr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cgcr`]
+#[doc = "CGCR (rw) register accessor: CAN Global Configuration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cgcr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cgcr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cgcr`]
 module"]
 #[doc(alias = "CGCR")]
 pub type Cgcr = crate::Reg<cgcr::CgcrSpec>;
 #[doc = "CAN Global Configuration Register"]
 pub mod cgcr;
-#[doc = "CTIM (rw) register accessor: CAN Timing Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctim::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctim::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctim`]
+#[doc = "CTIM (rw) register accessor: CAN Timing Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ctim::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctim::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctim`]
 module"]
 #[doc(alias = "CTIM")]
 pub type Ctim = crate::Reg<ctim::CtimSpec>;
 #[doc = "CAN Timing Register"]
 pub mod ctim;
-#[doc = "GMSKX (rw) register accessor: CAN Global Mask Extension\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gmskx::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gmskx::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gmskx`]
+#[doc = "GMSKX (rw) register accessor: CAN Global Mask Extension\n\nYou can [`read`](crate::Reg::read) this register and get [`gmskx::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gmskx::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gmskx`]
 module"]
 #[doc(alias = "GMSKX")]
 pub type Gmskx = crate::Reg<gmskx::GmskxSpec>;
 #[doc = "CAN Global Mask Extension"]
 pub mod gmskx;
-#[doc = "GMSKB (rw) register accessor: CAN Global Mask Base\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gmskb::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gmskb::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gmskb`]
+#[doc = "GMSKB (rw) register accessor: CAN Global Mask Base\n\nYou can [`read`](crate::Reg::read) this register and get [`gmskb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gmskb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gmskb`]
 module"]
 #[doc(alias = "GMSKB")]
 pub type Gmskb = crate::Reg<gmskb::GmskbSpec>;
 #[doc = "CAN Global Mask Base"]
 pub mod gmskb;
-#[doc = "BMSKX (rw) register accessor: CAN Basic Mask Extension\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`bmskx::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`bmskx::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bmskx`]
+#[doc = "BMSKX (rw) register accessor: CAN Basic Mask Extension\n\nYou can [`read`](crate::Reg::read) this register and get [`bmskx::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bmskx::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bmskx`]
 module"]
 #[doc(alias = "BMSKX")]
 pub type Bmskx = crate::Reg<bmskx::BmskxSpec>;
 #[doc = "CAN Basic Mask Extension"]
 pub mod bmskx;
-#[doc = "BMSKB (rw) register accessor: CAN Basic Mask Base\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`bmskb::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`bmskb::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bmskb`]
+#[doc = "BMSKB (rw) register accessor: CAN Basic Mask Base\n\nYou can [`read`](crate::Reg::read) this register and get [`bmskb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bmskb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bmskb`]
 module"]
 #[doc(alias = "BMSKB")]
 pub type Bmskb = crate::Reg<bmskb::BmskbSpec>;
 #[doc = "CAN Basic Mask Base"]
 pub mod bmskb;
-#[doc = "CIEN (rw) register accessor: CAN Interrupt Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cien::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cien::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cien`]
+#[doc = "CIEN (rw) register accessor: CAN Interrupt Enable Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cien`]
 module"]
 #[doc(alias = "CIEN")]
 pub type Cien = crate::Reg<cien::CienSpec>;
 #[doc = "CAN Interrupt Enable Register"]
 pub mod cien;
-#[doc = "CIPND (rw) register accessor: CAN Interrupt Pending Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cipnd::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cipnd::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cipnd`]
+#[doc = "CIPND (rw) register accessor: CAN Interrupt Pending Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cipnd::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cipnd::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cipnd`]
 module"]
 #[doc(alias = "CIPND")]
 pub type Cipnd = crate::Reg<cipnd::CipndSpec>;
 #[doc = "CAN Interrupt Pending Register"]
 pub mod cipnd;
-#[doc = "CICLR (rw) register accessor: CAN Interrupt Clear Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ciclr::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ciclr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ciclr`]
+#[doc = "CICLR (rw) register accessor: CAN Interrupt Clear Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ciclr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ciclr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ciclr`]
 module"]
 #[doc(alias = "CICLR")]
 pub type Ciclr = crate::Reg<ciclr::CiclrSpec>;
 #[doc = "CAN Interrupt Clear Register"]
 pub mod ciclr;
-#[doc = "CICEN (rw) register accessor: CAN Interrupt Code Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cicen::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cicen::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cicen`]
+#[doc = "CICEN (rw) register accessor: CAN Interrupt Code Enable Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cicen::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cicen::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cicen`]
 module"]
 #[doc(alias = "CICEN")]
 pub type Cicen = crate::Reg<cicen::CicenSpec>;
 #[doc = "CAN Interrupt Code Enable Register"]
 pub mod cicen;
-#[doc = "CSTPND (rw) register accessor: CAN Status Pending Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cstpnd::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cstpnd::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cstpnd`]
+#[doc = "CSTPND (rw) register accessor: CAN Status Pending Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cstpnd::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cstpnd::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cstpnd`]
 module"]
 #[doc(alias = "CSTPND")]
 pub type Cstpnd = crate::Reg<cstpnd::CstpndSpec>;
 #[doc = "CAN Status Pending Register"]
 pub mod cstpnd;
-#[doc = "CANEC (rw) register accessor: CAN Error Counter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`canec::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`canec::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@canec`]
+#[doc = "CANEC (rw) register accessor: CAN Error Counter Register\n\nYou can [`read`](crate::Reg::read) this register and get [`canec::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`canec::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@canec`]
 module"]
 #[doc(alias = "CANEC")]
 pub type Canec = crate::Reg<canec::CanecSpec>;
 #[doc = "CAN Error Counter Register"]
 pub mod canec;
-#[doc = "CEDIAG (rw) register accessor: CAN Error Diagnostic Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cediag::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cediag::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cediag`]
+#[doc = "CEDIAG (rw) register accessor: CAN Error Diagnostic Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cediag::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cediag::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cediag`]
 module"]
 #[doc(alias = "CEDIAG")]
 pub type Cediag = crate::Reg<cediag::CediagSpec>;
 #[doc = "CAN Error Diagnostic Register"]
 pub mod cediag;
-#[doc = "CTMR (rw) register accessor: CAN Timer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctmr::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctmr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctmr`]
+#[doc = "CTMR (rw) register accessor: CAN Timer Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ctmr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctmr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctmr`]
 module"]
 #[doc(alias = "CTMR")]
 pub type Ctmr = crate::Reg<ctmr::CtmrSpec>;
diff --git a/va416xx/src/can0/bmskb.rs b/va416xx/src/can0/bmskb.rs
index 833f22b..0b72d13 100644
--- a/va416xx/src/can0/bmskb.rs
+++ b/va416xx/src/can0/bmskb.rs
@@ -60,19 +60,16 @@ impl W {
 - Unused in standard, ID\\[17:15\\]
 in extended"]
     #[inline(always)]
-    #[must_use]
     pub fn bm0(&mut self) -> Bm0W<BmskbSpec> {
         Bm0W::new(self, 0)
     }
     #[doc = "Bit 3 - Identifier Extension Bit"]
     #[inline(always)]
-    #[must_use]
     pub fn ide(&mut self) -> IdeW<BmskbSpec> {
         IdeW::new(self, 3)
     }
     #[doc = "Bit 4 - Remote Transmission Request in Standard, Substitute Remote Request (SRR) in extended"]
     #[inline(always)]
-    #[must_use]
     pub fn rtr(&mut self) -> RtrW<BmskbSpec> {
         RtrW::new(self, 4)
     }
@@ -81,12 +78,11 @@ in extended"]
 in standard, ID\\[28:18\\]
 in extended"]
     #[inline(always)]
-    #[must_use]
     pub fn bm1(&mut self) -> Bm1W<BmskbSpec> {
         Bm1W::new(self, 5)
     }
 }
-#[doc = "CAN Basic Mask Base\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`bmskb::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`bmskb::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Basic Mask Base\n\nYou can [`read`](crate::Reg::read) this register and get [`bmskb::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bmskb::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct BmskbSpec;
 impl crate::RegisterSpec for BmskbSpec {
     type Ux = u32;
diff --git a/va416xx/src/can0/bmskx.rs b/va416xx/src/can0/bmskx.rs
index 4f42df8..8dc59e4 100644
--- a/va416xx/src/can0/bmskx.rs
+++ b/va416xx/src/can0/bmskx.rs
@@ -31,7 +31,6 @@ in extended, unused standard"]
 impl W {
     #[doc = "Bit 0 - Extended Remote transmission Request Bit"]
     #[inline(always)]
-    #[must_use]
     pub fn xrtr(&mut self) -> XrtrW<BmskxSpec> {
         XrtrW::new(self, 0)
     }
@@ -39,12 +38,11 @@ impl W {
 used when an extended frame is received. ID\\[14:0\\]
 in extended, unused standard"]
     #[inline(always)]
-    #[must_use]
     pub fn bm(&mut self) -> BmW<BmskxSpec> {
         BmW::new(self, 1)
     }
 }
-#[doc = "CAN Basic Mask Extension\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`bmskx::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`bmskx::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Basic Mask Extension\n\nYou can [`read`](crate::Reg::read) this register and get [`bmskx::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bmskx::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct BmskxSpec;
 impl crate::RegisterSpec for BmskxSpec {
     type Ux = u32;
diff --git a/va416xx/src/can0/canec.rs b/va416xx/src/can0/canec.rs
index 4f945fa..4ed09b9 100644
--- a/va416xx/src/can0/canec.rs
+++ b/va416xx/src/can0/canec.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Transmit Error Counter"]
     #[inline(always)]
-    #[must_use]
     pub fn tec(&mut self) -> TecW<CanecSpec> {
         TecW::new(self, 0)
     }
     #[doc = "Bits 8:15 - Receive Error Counter"]
     #[inline(always)]
-    #[must_use]
     pub fn rec(&mut self) -> RecW<CanecSpec> {
         RecW::new(self, 8)
     }
 }
-#[doc = "CAN Error Counter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`canec::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`canec::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Error Counter Register\n\nYou can [`read`](crate::Reg::read) this register and get [`canec::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`canec::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct CanecSpec;
 impl crate::RegisterSpec for CanecSpec {
     type Ux = u32;
diff --git a/va416xx/src/can0/cediag.rs b/va416xx/src/can0/cediag.rs
index b19a68f..e58bb8e 100644
--- a/va416xx/src/can0/cediag.rs
+++ b/va416xx/src/can0/cediag.rs
@@ -70,48 +70,41 @@ impl R {
 impl W {
     #[doc = "Bits 0:3 - Error Field Identifier"]
     #[inline(always)]
-    #[must_use]
     pub fn efid(&mut self) -> EfidW<CediagSpec> {
         EfidW::new(self, 0)
     }
     #[doc = "Bits 4:9 - Error Bit Identifier"]
     #[inline(always)]
-    #[must_use]
     pub fn ebid(&mut self) -> EbidW<CediagSpec> {
         EbidW::new(self, 4)
     }
     #[doc = "Bit 10 - Transmit Error"]
     #[inline(always)]
-    #[must_use]
     pub fn txe(&mut self) -> TxeW<CediagSpec> {
         TxeW::new(self, 10)
     }
     #[doc = "Bit 11 - Stuff Error"]
     #[inline(always)]
-    #[must_use]
     pub fn stuff(&mut self) -> StuffW<CediagSpec> {
         StuffW::new(self, 11)
     }
     #[doc = "Bit 12 - CRC"]
     #[inline(always)]
-    #[must_use]
     pub fn crc(&mut self) -> CrcW<CediagSpec> {
         CrcW::new(self, 12)
     }
     #[doc = "Bit 13 - Monitor"]
     #[inline(always)]
-    #[must_use]
     pub fn mon(&mut self) -> MonW<CediagSpec> {
         MonW::new(self, 13)
     }
     #[doc = "Bit 14 - Drive"]
     #[inline(always)]
-    #[must_use]
     pub fn drive(&mut self) -> DriveW<CediagSpec> {
         DriveW::new(self, 14)
     }
 }
-#[doc = "CAN Error Diagnostic Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cediag::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cediag::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Error Diagnostic Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cediag::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cediag::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct CediagSpec;
 impl crate::RegisterSpec for CediagSpec {
     type Ux = u32;
diff --git a/va416xx/src/can0/cgcr.rs b/va416xx/src/can0/cgcr.rs
index ef91f01..fe62e09 100644
--- a/va416xx/src/can0/cgcr.rs
+++ b/va416xx/src/can0/cgcr.rs
@@ -115,78 +115,66 @@ impl R {
 impl W {
     #[doc = "Bit 0 - CAN Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn canen(&mut self) -> CanenW<CgcrSpec> {
         CanenW::new(self, 0)
     }
     #[doc = "Bit 1 - RW,Control Receive"]
     #[inline(always)]
-    #[must_use]
     pub fn crx(&mut self) -> CrxW<CgcrSpec> {
         CrxW::new(self, 1)
     }
     #[doc = "Bit 2 - RW,Control Transmit"]
     #[inline(always)]
-    #[must_use]
     pub fn ctx(&mut self) -> CtxW<CgcrSpec> {
         CtxW::new(self, 2)
     }
     #[doc = "Bit 3 - Buffer Lock"]
     #[inline(always)]
-    #[must_use]
     pub fn bufflock(&mut self) -> BufflockW<CgcrSpec> {
         BufflockW::new(self, 3)
     }
     #[doc = "Bit 4 - Time Sync Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn tstpen(&mut self) -> TstpenW<CgcrSpec> {
         TstpenW::new(self, 4)
     }
     #[doc = "Bit 5 - Data Direction"]
     #[inline(always)]
-    #[must_use]
     pub fn ddir(&mut self) -> DdirW<CgcrSpec> {
         DdirW::new(self, 5)
     }
     #[doc = "Bit 6 - Listen Only"]
     #[inline(always)]
-    #[must_use]
     pub fn lo(&mut self) -> LoW<CgcrSpec> {
         LoW::new(self, 6)
     }
     #[doc = "Bit 7 - Ignore Acknowledge"]
     #[inline(always)]
-    #[must_use]
     pub fn ignack(&mut self) -> IgnackW<CgcrSpec> {
         IgnackW::new(self, 7)
     }
     #[doc = "Bit 8 - Loopback"]
     #[inline(always)]
-    #[must_use]
     pub fn loopback(&mut self) -> LoopbackW<CgcrSpec> {
         LoopbackW::new(self, 8)
     }
     #[doc = "Bit 9 - Internal"]
     #[inline(always)]
-    #[must_use]
     pub fn internal(&mut self) -> InternalW<CgcrSpec> {
         InternalW::new(self, 9)
     }
     #[doc = "Bit 10 - Diagnostic Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn diagen(&mut self) -> DiagenW<CgcrSpec> {
         DiagenW::new(self, 10)
     }
     #[doc = "Bit 11 - Error Interrupt Type"]
     #[inline(always)]
-    #[must_use]
     pub fn eit(&mut self) -> EitW<CgcrSpec> {
         EitW::new(self, 11)
     }
 }
-#[doc = "CAN Global Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cgcr::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cgcr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Global Configuration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cgcr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cgcr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct CgcrSpec;
 impl crate::RegisterSpec for CgcrSpec {
     type Ux = u32;
diff --git a/va416xx/src/can0/cicen.rs b/va416xx/src/can0/cicen.rs
index 98b87c2..d8045f8 100644
--- a/va416xx/src/can0/cicen.rs
+++ b/va416xx/src/can0/cicen.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:14 - Buffer Interrupt Code Enable\\[14:0\\]"]
     #[inline(always)]
-    #[must_use]
     pub fn icen(&mut self) -> IcenW<CicenSpec> {
         IcenW::new(self, 0)
     }
     #[doc = "Bit 15 - Error Interrupt Code Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn eicen(&mut self) -> EicenW<CicenSpec> {
         EicenW::new(self, 15)
     }
 }
-#[doc = "CAN Interrupt Code Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cicen::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cicen::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Interrupt Code Enable Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cicen::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cicen::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct CicenSpec;
 impl crate::RegisterSpec for CicenSpec {
     type Ux = u32;
diff --git a/va416xx/src/can0/ciclr.rs b/va416xx/src/can0/ciclr.rs
index 75f5c48..7320e55 100644
--- a/va416xx/src/can0/ciclr.rs
+++ b/va416xx/src/can0/ciclr.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:14 - Buffer Interrupt Clear\\[14:0\\]"]
     #[inline(always)]
-    #[must_use]
     pub fn iclr(&mut self) -> IclrW<CiclrSpec> {
         IclrW::new(self, 0)
     }
     #[doc = "Bit 15 - Error Interrupt Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn eiclr(&mut self) -> EiclrW<CiclrSpec> {
         EiclrW::new(self, 15)
     }
 }
-#[doc = "CAN Interrupt Clear Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ciclr::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ciclr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Interrupt Clear Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ciclr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ciclr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct CiclrSpec;
 impl crate::RegisterSpec for CiclrSpec {
     type Ux = u32;
diff --git a/va416xx/src/can0/cien.rs b/va416xx/src/can0/cien.rs
index 65b3550..894b919 100644
--- a/va416xx/src/can0/cien.rs
+++ b/va416xx/src/can0/cien.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:14 - Buffer Interrupt Enable\\[14:0\\]"]
     #[inline(always)]
-    #[must_use]
     pub fn ien(&mut self) -> IenW<CienSpec> {
         IenW::new(self, 0)
     }
     #[doc = "Bit 15 - Error Interrupt Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn eien(&mut self) -> EienW<CienSpec> {
         EienW::new(self, 15)
     }
 }
-#[doc = "CAN Interrupt Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cien::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cien::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Interrupt Enable Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct CienSpec;
 impl crate::RegisterSpec for CienSpec {
     type Ux = u32;
diff --git a/va416xx/src/can0/cipnd.rs b/va416xx/src/can0/cipnd.rs
index 75e828f..5ee5d74 100644
--- a/va416xx/src/can0/cipnd.rs
+++ b/va416xx/src/can0/cipnd.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:14 - Buffer Interrupt Pending\\[14:0\\]"]
     #[inline(always)]
-    #[must_use]
     pub fn ipnd(&mut self) -> IpndW<CipndSpec> {
         IpndW::new(self, 0)
     }
     #[doc = "Bit 15 - Error Interrupt Pending"]
     #[inline(always)]
-    #[must_use]
     pub fn eipnd(&mut self) -> EipndW<CipndSpec> {
         EipndW::new(self, 15)
     }
 }
-#[doc = "CAN Interrupt Pending Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cipnd::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cipnd::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Interrupt Pending Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cipnd::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cipnd::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct CipndSpec;
 impl crate::RegisterSpec for CipndSpec {
     type Ux = u32;
diff --git a/va416xx/src/can0/cnstat_cmb0.rs b/va416xx/src/can0/cnstat_cmb0.rs
index 673daa9..9b051e8 100644
--- a/va416xx/src/can0/cnstat_cmb0.rs
+++ b/va416xx/src/can0/cnstat_cmb0.rs
@@ -34,24 +34,21 @@ impl R {
 impl W {
     #[doc = "Bits 0:3 - Buffer Status"]
     #[inline(always)]
-    #[must_use]
     pub fn st(&mut self) -> StW<CnstatCmb0Spec> {
         StW::new(self, 0)
     }
     #[doc = "Bits 4:7 - Transmit Priority Code"]
     #[inline(always)]
-    #[must_use]
     pub fn pri(&mut self) -> PriW<CnstatCmb0Spec> {
         PriW::new(self, 4)
     }
     #[doc = "Bits 12:15 - Data Length Code"]
     #[inline(always)]
-    #[must_use]
     pub fn dlc(&mut self) -> DlcW<CnstatCmb0Spec> {
         DlcW::new(self, 12)
     }
 }
-#[doc = "Buffer Status / Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cnstat_cmb0::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cnstat_cmb0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Buffer Status / Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cnstat_cmb0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnstat_cmb0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct CnstatCmb0Spec;
 impl crate::RegisterSpec for CnstatCmb0Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/cnstat_cmb1.rs b/va416xx/src/can0/cnstat_cmb1.rs
index c6a9f1a..ef01f6d 100644
--- a/va416xx/src/can0/cnstat_cmb1.rs
+++ b/va416xx/src/can0/cnstat_cmb1.rs
@@ -34,24 +34,21 @@ impl R {
 impl W {
     #[doc = "Bits 0:3 - Buffer Status"]
     #[inline(always)]
-    #[must_use]
     pub fn st(&mut self) -> StW<CnstatCmb1Spec> {
         StW::new(self, 0)
     }
     #[doc = "Bits 4:7 - Transmit Priority Code"]
     #[inline(always)]
-    #[must_use]
     pub fn pri(&mut self) -> PriW<CnstatCmb1Spec> {
         PriW::new(self, 4)
     }
     #[doc = "Bits 12:15 - Data Length Code"]
     #[inline(always)]
-    #[must_use]
     pub fn dlc(&mut self) -> DlcW<CnstatCmb1Spec> {
         DlcW::new(self, 12)
     }
 }
-#[doc = "Buffer Status / Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cnstat_cmb1::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cnstat_cmb1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Buffer Status / Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cnstat_cmb1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnstat_cmb1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct CnstatCmb1Spec;
 impl crate::RegisterSpec for CnstatCmb1Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/cnstat_cmb10.rs b/va416xx/src/can0/cnstat_cmb10.rs
index 76466e7..745adb2 100644
--- a/va416xx/src/can0/cnstat_cmb10.rs
+++ b/va416xx/src/can0/cnstat_cmb10.rs
@@ -34,24 +34,21 @@ impl R {
 impl W {
     #[doc = "Bits 0:3 - Buffer Status"]
     #[inline(always)]
-    #[must_use]
     pub fn st(&mut self) -> StW<CnstatCmb10Spec> {
         StW::new(self, 0)
     }
     #[doc = "Bits 4:7 - Transmit Priority Code"]
     #[inline(always)]
-    #[must_use]
     pub fn pri(&mut self) -> PriW<CnstatCmb10Spec> {
         PriW::new(self, 4)
     }
     #[doc = "Bits 12:15 - Data Length Code"]
     #[inline(always)]
-    #[must_use]
     pub fn dlc(&mut self) -> DlcW<CnstatCmb10Spec> {
         DlcW::new(self, 12)
     }
 }
-#[doc = "Buffer Status / Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cnstat_cmb10::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cnstat_cmb10::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Buffer Status / Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cnstat_cmb10::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnstat_cmb10::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct CnstatCmb10Spec;
 impl crate::RegisterSpec for CnstatCmb10Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/cnstat_cmb11.rs b/va416xx/src/can0/cnstat_cmb11.rs
index 88cde7a..2707985 100644
--- a/va416xx/src/can0/cnstat_cmb11.rs
+++ b/va416xx/src/can0/cnstat_cmb11.rs
@@ -34,24 +34,21 @@ impl R {
 impl W {
     #[doc = "Bits 0:3 - Buffer Status"]
     #[inline(always)]
-    #[must_use]
     pub fn st(&mut self) -> StW<CnstatCmb11Spec> {
         StW::new(self, 0)
     }
     #[doc = "Bits 4:7 - Transmit Priority Code"]
     #[inline(always)]
-    #[must_use]
     pub fn pri(&mut self) -> PriW<CnstatCmb11Spec> {
         PriW::new(self, 4)
     }
     #[doc = "Bits 12:15 - Data Length Code"]
     #[inline(always)]
-    #[must_use]
     pub fn dlc(&mut self) -> DlcW<CnstatCmb11Spec> {
         DlcW::new(self, 12)
     }
 }
-#[doc = "Buffer Status / Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cnstat_cmb11::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cnstat_cmb11::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Buffer Status / Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cnstat_cmb11::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnstat_cmb11::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct CnstatCmb11Spec;
 impl crate::RegisterSpec for CnstatCmb11Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/cnstat_cmb12.rs b/va416xx/src/can0/cnstat_cmb12.rs
index 54087e8..01829db 100644
--- a/va416xx/src/can0/cnstat_cmb12.rs
+++ b/va416xx/src/can0/cnstat_cmb12.rs
@@ -34,24 +34,21 @@ impl R {
 impl W {
     #[doc = "Bits 0:3 - Buffer Status"]
     #[inline(always)]
-    #[must_use]
     pub fn st(&mut self) -> StW<CnstatCmb12Spec> {
         StW::new(self, 0)
     }
     #[doc = "Bits 4:7 - Transmit Priority Code"]
     #[inline(always)]
-    #[must_use]
     pub fn pri(&mut self) -> PriW<CnstatCmb12Spec> {
         PriW::new(self, 4)
     }
     #[doc = "Bits 12:15 - Data Length Code"]
     #[inline(always)]
-    #[must_use]
     pub fn dlc(&mut self) -> DlcW<CnstatCmb12Spec> {
         DlcW::new(self, 12)
     }
 }
-#[doc = "Buffer Status / Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cnstat_cmb12::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cnstat_cmb12::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Buffer Status / Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cnstat_cmb12::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnstat_cmb12::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct CnstatCmb12Spec;
 impl crate::RegisterSpec for CnstatCmb12Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/cnstat_cmb13.rs b/va416xx/src/can0/cnstat_cmb13.rs
index 32073ce..9b4a196 100644
--- a/va416xx/src/can0/cnstat_cmb13.rs
+++ b/va416xx/src/can0/cnstat_cmb13.rs
@@ -34,24 +34,21 @@ impl R {
 impl W {
     #[doc = "Bits 0:3 - Buffer Status"]
     #[inline(always)]
-    #[must_use]
     pub fn st(&mut self) -> StW<CnstatCmb13Spec> {
         StW::new(self, 0)
     }
     #[doc = "Bits 4:7 - Transmit Priority Code"]
     #[inline(always)]
-    #[must_use]
     pub fn pri(&mut self) -> PriW<CnstatCmb13Spec> {
         PriW::new(self, 4)
     }
     #[doc = "Bits 12:15 - Data Length Code"]
     #[inline(always)]
-    #[must_use]
     pub fn dlc(&mut self) -> DlcW<CnstatCmb13Spec> {
         DlcW::new(self, 12)
     }
 }
-#[doc = "Buffer Status / Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cnstat_cmb13::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cnstat_cmb13::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Buffer Status / Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cnstat_cmb13::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnstat_cmb13::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct CnstatCmb13Spec;
 impl crate::RegisterSpec for CnstatCmb13Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/cnstat_cmb14.rs b/va416xx/src/can0/cnstat_cmb14.rs
index 7d20dea..ac4bbd8 100644
--- a/va416xx/src/can0/cnstat_cmb14.rs
+++ b/va416xx/src/can0/cnstat_cmb14.rs
@@ -34,24 +34,21 @@ impl R {
 impl W {
     #[doc = "Bits 0:3 - Buffer Status"]
     #[inline(always)]
-    #[must_use]
     pub fn st(&mut self) -> StW<CnstatCmb14Spec> {
         StW::new(self, 0)
     }
     #[doc = "Bits 4:7 - Transmit Priority Code"]
     #[inline(always)]
-    #[must_use]
     pub fn pri(&mut self) -> PriW<CnstatCmb14Spec> {
         PriW::new(self, 4)
     }
     #[doc = "Bits 12:15 - Data Length Code"]
     #[inline(always)]
-    #[must_use]
     pub fn dlc(&mut self) -> DlcW<CnstatCmb14Spec> {
         DlcW::new(self, 12)
     }
 }
-#[doc = "Buffer Status / Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cnstat_cmb14::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cnstat_cmb14::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Buffer Status / Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cnstat_cmb14::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnstat_cmb14::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct CnstatCmb14Spec;
 impl crate::RegisterSpec for CnstatCmb14Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/cnstat_cmb2.rs b/va416xx/src/can0/cnstat_cmb2.rs
index 09fe0d6..f9a6b31 100644
--- a/va416xx/src/can0/cnstat_cmb2.rs
+++ b/va416xx/src/can0/cnstat_cmb2.rs
@@ -34,24 +34,21 @@ impl R {
 impl W {
     #[doc = "Bits 0:3 - Buffer Status"]
     #[inline(always)]
-    #[must_use]
     pub fn st(&mut self) -> StW<CnstatCmb2Spec> {
         StW::new(self, 0)
     }
     #[doc = "Bits 4:7 - Transmit Priority Code"]
     #[inline(always)]
-    #[must_use]
     pub fn pri(&mut self) -> PriW<CnstatCmb2Spec> {
         PriW::new(self, 4)
     }
     #[doc = "Bits 12:15 - Data Length Code"]
     #[inline(always)]
-    #[must_use]
     pub fn dlc(&mut self) -> DlcW<CnstatCmb2Spec> {
         DlcW::new(self, 12)
     }
 }
-#[doc = "Buffer Status / Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cnstat_cmb2::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cnstat_cmb2::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Buffer Status / Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cnstat_cmb2::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnstat_cmb2::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct CnstatCmb2Spec;
 impl crate::RegisterSpec for CnstatCmb2Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/cnstat_cmb3.rs b/va416xx/src/can0/cnstat_cmb3.rs
index 47e5a1d..5a882c8 100644
--- a/va416xx/src/can0/cnstat_cmb3.rs
+++ b/va416xx/src/can0/cnstat_cmb3.rs
@@ -34,24 +34,21 @@ impl R {
 impl W {
     #[doc = "Bits 0:3 - Buffer Status"]
     #[inline(always)]
-    #[must_use]
     pub fn st(&mut self) -> StW<CnstatCmb3Spec> {
         StW::new(self, 0)
     }
     #[doc = "Bits 4:7 - Transmit Priority Code"]
     #[inline(always)]
-    #[must_use]
     pub fn pri(&mut self) -> PriW<CnstatCmb3Spec> {
         PriW::new(self, 4)
     }
     #[doc = "Bits 12:15 - Data Length Code"]
     #[inline(always)]
-    #[must_use]
     pub fn dlc(&mut self) -> DlcW<CnstatCmb3Spec> {
         DlcW::new(self, 12)
     }
 }
-#[doc = "Buffer Status / Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cnstat_cmb3::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cnstat_cmb3::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Buffer Status / Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cnstat_cmb3::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnstat_cmb3::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct CnstatCmb3Spec;
 impl crate::RegisterSpec for CnstatCmb3Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/cnstat_cmb4.rs b/va416xx/src/can0/cnstat_cmb4.rs
index 303896d..8e15f47 100644
--- a/va416xx/src/can0/cnstat_cmb4.rs
+++ b/va416xx/src/can0/cnstat_cmb4.rs
@@ -34,24 +34,21 @@ impl R {
 impl W {
     #[doc = "Bits 0:3 - Buffer Status"]
     #[inline(always)]
-    #[must_use]
     pub fn st(&mut self) -> StW<CnstatCmb4Spec> {
         StW::new(self, 0)
     }
     #[doc = "Bits 4:7 - Transmit Priority Code"]
     #[inline(always)]
-    #[must_use]
     pub fn pri(&mut self) -> PriW<CnstatCmb4Spec> {
         PriW::new(self, 4)
     }
     #[doc = "Bits 12:15 - Data Length Code"]
     #[inline(always)]
-    #[must_use]
     pub fn dlc(&mut self) -> DlcW<CnstatCmb4Spec> {
         DlcW::new(self, 12)
     }
 }
-#[doc = "Buffer Status / Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cnstat_cmb4::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cnstat_cmb4::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Buffer Status / Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cnstat_cmb4::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnstat_cmb4::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct CnstatCmb4Spec;
 impl crate::RegisterSpec for CnstatCmb4Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/cnstat_cmb5.rs b/va416xx/src/can0/cnstat_cmb5.rs
index 062e973..0c2f52b 100644
--- a/va416xx/src/can0/cnstat_cmb5.rs
+++ b/va416xx/src/can0/cnstat_cmb5.rs
@@ -34,24 +34,21 @@ impl R {
 impl W {
     #[doc = "Bits 0:3 - Buffer Status"]
     #[inline(always)]
-    #[must_use]
     pub fn st(&mut self) -> StW<CnstatCmb5Spec> {
         StW::new(self, 0)
     }
     #[doc = "Bits 4:7 - Transmit Priority Code"]
     #[inline(always)]
-    #[must_use]
     pub fn pri(&mut self) -> PriW<CnstatCmb5Spec> {
         PriW::new(self, 4)
     }
     #[doc = "Bits 12:15 - Data Length Code"]
     #[inline(always)]
-    #[must_use]
     pub fn dlc(&mut self) -> DlcW<CnstatCmb5Spec> {
         DlcW::new(self, 12)
     }
 }
-#[doc = "Buffer Status / Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cnstat_cmb5::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cnstat_cmb5::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Buffer Status / Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cnstat_cmb5::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnstat_cmb5::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct CnstatCmb5Spec;
 impl crate::RegisterSpec for CnstatCmb5Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/cnstat_cmb6.rs b/va416xx/src/can0/cnstat_cmb6.rs
index 02e2117..f35da45 100644
--- a/va416xx/src/can0/cnstat_cmb6.rs
+++ b/va416xx/src/can0/cnstat_cmb6.rs
@@ -34,24 +34,21 @@ impl R {
 impl W {
     #[doc = "Bits 0:3 - Buffer Status"]
     #[inline(always)]
-    #[must_use]
     pub fn st(&mut self) -> StW<CnstatCmb6Spec> {
         StW::new(self, 0)
     }
     #[doc = "Bits 4:7 - Transmit Priority Code"]
     #[inline(always)]
-    #[must_use]
     pub fn pri(&mut self) -> PriW<CnstatCmb6Spec> {
         PriW::new(self, 4)
     }
     #[doc = "Bits 12:15 - Data Length Code"]
     #[inline(always)]
-    #[must_use]
     pub fn dlc(&mut self) -> DlcW<CnstatCmb6Spec> {
         DlcW::new(self, 12)
     }
 }
-#[doc = "Buffer Status / Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cnstat_cmb6::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cnstat_cmb6::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Buffer Status / Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cnstat_cmb6::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnstat_cmb6::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct CnstatCmb6Spec;
 impl crate::RegisterSpec for CnstatCmb6Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/cnstat_cmb7.rs b/va416xx/src/can0/cnstat_cmb7.rs
index d092f65..215e719 100644
--- a/va416xx/src/can0/cnstat_cmb7.rs
+++ b/va416xx/src/can0/cnstat_cmb7.rs
@@ -34,24 +34,21 @@ impl R {
 impl W {
     #[doc = "Bits 0:3 - Buffer Status"]
     #[inline(always)]
-    #[must_use]
     pub fn st(&mut self) -> StW<CnstatCmb7Spec> {
         StW::new(self, 0)
     }
     #[doc = "Bits 4:7 - Transmit Priority Code"]
     #[inline(always)]
-    #[must_use]
     pub fn pri(&mut self) -> PriW<CnstatCmb7Spec> {
         PriW::new(self, 4)
     }
     #[doc = "Bits 12:15 - Data Length Code"]
     #[inline(always)]
-    #[must_use]
     pub fn dlc(&mut self) -> DlcW<CnstatCmb7Spec> {
         DlcW::new(self, 12)
     }
 }
-#[doc = "Buffer Status / Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cnstat_cmb7::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cnstat_cmb7::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Buffer Status / Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cnstat_cmb7::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnstat_cmb7::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct CnstatCmb7Spec;
 impl crate::RegisterSpec for CnstatCmb7Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/cnstat_cmb8.rs b/va416xx/src/can0/cnstat_cmb8.rs
index 20d4336..031802f 100644
--- a/va416xx/src/can0/cnstat_cmb8.rs
+++ b/va416xx/src/can0/cnstat_cmb8.rs
@@ -34,24 +34,21 @@ impl R {
 impl W {
     #[doc = "Bits 0:3 - Buffer Status"]
     #[inline(always)]
-    #[must_use]
     pub fn st(&mut self) -> StW<CnstatCmb8Spec> {
         StW::new(self, 0)
     }
     #[doc = "Bits 4:7 - Transmit Priority Code"]
     #[inline(always)]
-    #[must_use]
     pub fn pri(&mut self) -> PriW<CnstatCmb8Spec> {
         PriW::new(self, 4)
     }
     #[doc = "Bits 12:15 - Data Length Code"]
     #[inline(always)]
-    #[must_use]
     pub fn dlc(&mut self) -> DlcW<CnstatCmb8Spec> {
         DlcW::new(self, 12)
     }
 }
-#[doc = "Buffer Status / Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cnstat_cmb8::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cnstat_cmb8::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Buffer Status / Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cnstat_cmb8::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnstat_cmb8::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct CnstatCmb8Spec;
 impl crate::RegisterSpec for CnstatCmb8Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/cnstat_cmb9.rs b/va416xx/src/can0/cnstat_cmb9.rs
index 32dc7bb..48e5ef8 100644
--- a/va416xx/src/can0/cnstat_cmb9.rs
+++ b/va416xx/src/can0/cnstat_cmb9.rs
@@ -34,24 +34,21 @@ impl R {
 impl W {
     #[doc = "Bits 0:3 - Buffer Status"]
     #[inline(always)]
-    #[must_use]
     pub fn st(&mut self) -> StW<CnstatCmb9Spec> {
         StW::new(self, 0)
     }
     #[doc = "Bits 4:7 - Transmit Priority Code"]
     #[inline(always)]
-    #[must_use]
     pub fn pri(&mut self) -> PriW<CnstatCmb9Spec> {
         PriW::new(self, 4)
     }
     #[doc = "Bits 12:15 - Data Length Code"]
     #[inline(always)]
-    #[must_use]
     pub fn dlc(&mut self) -> DlcW<CnstatCmb9Spec> {
         DlcW::new(self, 12)
     }
 }
-#[doc = "Buffer Status / Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cnstat_cmb9::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cnstat_cmb9::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Buffer Status / Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cnstat_cmb9::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnstat_cmb9::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct CnstatCmb9Spec;
 impl crate::RegisterSpec for CnstatCmb9Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/cnstat_hcmb.rs b/va416xx/src/can0/cnstat_hcmb.rs
index 1b6bd9f..370b14a 100644
--- a/va416xx/src/can0/cnstat_hcmb.rs
+++ b/va416xx/src/can0/cnstat_hcmb.rs
@@ -34,24 +34,21 @@ impl R {
 impl W {
     #[doc = "Bits 0:3 - Buffer Status"]
     #[inline(always)]
-    #[must_use]
     pub fn st(&mut self) -> StW<CnstatHcmbSpec> {
         StW::new(self, 0)
     }
     #[doc = "Bits 4:7 - Transmit Priority Code"]
     #[inline(always)]
-    #[must_use]
     pub fn pri(&mut self) -> PriW<CnstatHcmbSpec> {
         PriW::new(self, 4)
     }
     #[doc = "Bits 12:15 - Data Length Code"]
     #[inline(always)]
-    #[must_use]
     pub fn dlc(&mut self) -> DlcW<CnstatHcmbSpec> {
         DlcW::new(self, 12)
     }
 }
-#[doc = "Buffer Status / Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cnstat_hcmb::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cnstat_hcmb::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Buffer Status / Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cnstat_hcmb::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnstat_hcmb::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct CnstatHcmbSpec;
 impl crate::RegisterSpec for CnstatHcmbSpec {
     type Ux = u32;
diff --git a/va416xx/src/can0/cstpnd.rs b/va416xx/src/can0/cstpnd.rs
index a2c908a..0e8a552 100644
--- a/va416xx/src/can0/cstpnd.rs
+++ b/va416xx/src/can0/cstpnd.rs
@@ -34,24 +34,21 @@ impl R {
 impl W {
     #[doc = "Bits 0:3 - Interrupt Source portion of Interrupt Code"]
     #[inline(always)]
-    #[must_use]
     pub fn ist(&mut self) -> IstW<CstpndSpec> {
         IstW::new(self, 0)
     }
     #[doc = "Bit 4 - Interrupt Request portion of Interrupt Code"]
     #[inline(always)]
-    #[must_use]
     pub fn irq(&mut self) -> IrqW<CstpndSpec> {
         IrqW::new(self, 4)
     }
     #[doc = "Bits 5:7 - CAN Node Status"]
     #[inline(always)]
-    #[must_use]
     pub fn ns(&mut self) -> NsW<CstpndSpec> {
         NsW::new(self, 5)
     }
 }
-#[doc = "CAN Status Pending Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cstpnd::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cstpnd::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Status Pending Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cstpnd::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cstpnd::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct CstpndSpec;
 impl crate::RegisterSpec for CstpndSpec {
     type Ux = u32;
diff --git a/va416xx/src/can0/ctim.rs b/va416xx/src/can0/ctim.rs
index 872f295..c729eb3 100644
--- a/va416xx/src/can0/ctim.rs
+++ b/va416xx/src/can0/ctim.rs
@@ -43,30 +43,26 @@ impl R {
 impl W {
     #[doc = "Bits 0:2 - Time Segment 2"]
     #[inline(always)]
-    #[must_use]
     pub fn tseg2(&mut self) -> Tseg2W<CtimSpec> {
         Tseg2W::new(self, 0)
     }
     #[doc = "Bits 3:6 - Time Segment 1"]
     #[inline(always)]
-    #[must_use]
     pub fn tseg1(&mut self) -> Tseg1W<CtimSpec> {
         Tseg1W::new(self, 3)
     }
     #[doc = "Bits 7:8 - Synchronization Jump Width"]
     #[inline(always)]
-    #[must_use]
     pub fn sjw(&mut self) -> SjwW<CtimSpec> {
         SjwW::new(self, 7)
     }
     #[doc = "Bits 9:15 - Prescaler Configuration"]
     #[inline(always)]
-    #[must_use]
     pub fn psc(&mut self) -> PscW<CtimSpec> {
         PscW::new(self, 9)
     }
 }
-#[doc = "CAN Timing Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctim::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctim::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Timing Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ctim::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctim::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct CtimSpec;
 impl crate::RegisterSpec for CtimSpec {
     type Ux = u32;
diff --git a/va416xx/src/can0/ctmr.rs b/va416xx/src/can0/ctmr.rs
index 25cf22e..457cb46 100644
--- a/va416xx/src/can0/ctmr.rs
+++ b/va416xx/src/can0/ctmr.rs
@@ -12,7 +12,7 @@ impl R {
     }
 }
 impl W {}
-#[doc = "CAN Timer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctmr::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctmr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Timer Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ctmr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctmr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct CtmrSpec;
 impl crate::RegisterSpec for CtmrSpec {
     type Ux = u32;
diff --git a/va416xx/src/can0/data0_cmb0.rs b/va416xx/src/can0/data0_cmb0.rs
index 29e0103..fc3f7fe 100644
--- a/va416xx/src/can0/data0_cmb0.rs
+++ b/va416xx/src/can0/data0_cmb0.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Data Byte 2"]
     #[inline(always)]
-    #[must_use]
     pub fn byte2(&mut self) -> Byte2W<Data0Cmb0Spec> {
         Byte2W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Data Byte 1"]
     #[inline(always)]
-    #[must_use]
     pub fn byte1(&mut self) -> Byte1W<Data0Cmb0Spec> {
         Byte1W::new(self, 8)
     }
 }
-#[doc = "CAN Frame Data Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data0_cmb0::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data0_cmb0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Data Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`data0_cmb0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data0_cmb0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Data0Cmb0Spec;
 impl crate::RegisterSpec for Data0Cmb0Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/data0_cmb1.rs b/va416xx/src/can0/data0_cmb1.rs
index 2cb965f..19257bf 100644
--- a/va416xx/src/can0/data0_cmb1.rs
+++ b/va416xx/src/can0/data0_cmb1.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Data Byte 2"]
     #[inline(always)]
-    #[must_use]
     pub fn byte2(&mut self) -> Byte2W<Data0Cmb1Spec> {
         Byte2W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Data Byte 1"]
     #[inline(always)]
-    #[must_use]
     pub fn byte1(&mut self) -> Byte1W<Data0Cmb1Spec> {
         Byte1W::new(self, 8)
     }
 }
-#[doc = "CAN Frame Data Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data0_cmb1::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data0_cmb1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Data Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`data0_cmb1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data0_cmb1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Data0Cmb1Spec;
 impl crate::RegisterSpec for Data0Cmb1Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/data0_cmb10.rs b/va416xx/src/can0/data0_cmb10.rs
index 5c600d6..6c1d32d 100644
--- a/va416xx/src/can0/data0_cmb10.rs
+++ b/va416xx/src/can0/data0_cmb10.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Data Byte 2"]
     #[inline(always)]
-    #[must_use]
     pub fn byte2(&mut self) -> Byte2W<Data0Cmb10Spec> {
         Byte2W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Data Byte 1"]
     #[inline(always)]
-    #[must_use]
     pub fn byte1(&mut self) -> Byte1W<Data0Cmb10Spec> {
         Byte1W::new(self, 8)
     }
 }
-#[doc = "CAN Frame Data Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data0_cmb10::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data0_cmb10::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Data Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`data0_cmb10::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data0_cmb10::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Data0Cmb10Spec;
 impl crate::RegisterSpec for Data0Cmb10Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/data0_cmb11.rs b/va416xx/src/can0/data0_cmb11.rs
index 307de43..0e5646c 100644
--- a/va416xx/src/can0/data0_cmb11.rs
+++ b/va416xx/src/can0/data0_cmb11.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Data Byte 2"]
     #[inline(always)]
-    #[must_use]
     pub fn byte2(&mut self) -> Byte2W<Data0Cmb11Spec> {
         Byte2W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Data Byte 1"]
     #[inline(always)]
-    #[must_use]
     pub fn byte1(&mut self) -> Byte1W<Data0Cmb11Spec> {
         Byte1W::new(self, 8)
     }
 }
-#[doc = "CAN Frame Data Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data0_cmb11::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data0_cmb11::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Data Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`data0_cmb11::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data0_cmb11::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Data0Cmb11Spec;
 impl crate::RegisterSpec for Data0Cmb11Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/data0_cmb12.rs b/va416xx/src/can0/data0_cmb12.rs
index 05292d6..02b389a 100644
--- a/va416xx/src/can0/data0_cmb12.rs
+++ b/va416xx/src/can0/data0_cmb12.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Data Byte 2"]
     #[inline(always)]
-    #[must_use]
     pub fn byte2(&mut self) -> Byte2W<Data0Cmb12Spec> {
         Byte2W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Data Byte 1"]
     #[inline(always)]
-    #[must_use]
     pub fn byte1(&mut self) -> Byte1W<Data0Cmb12Spec> {
         Byte1W::new(self, 8)
     }
 }
-#[doc = "CAN Frame Data Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data0_cmb12::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data0_cmb12::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Data Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`data0_cmb12::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data0_cmb12::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Data0Cmb12Spec;
 impl crate::RegisterSpec for Data0Cmb12Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/data0_cmb13.rs b/va416xx/src/can0/data0_cmb13.rs
index 22c6992..9aff1d2 100644
--- a/va416xx/src/can0/data0_cmb13.rs
+++ b/va416xx/src/can0/data0_cmb13.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Data Byte 2"]
     #[inline(always)]
-    #[must_use]
     pub fn byte2(&mut self) -> Byte2W<Data0Cmb13Spec> {
         Byte2W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Data Byte 1"]
     #[inline(always)]
-    #[must_use]
     pub fn byte1(&mut self) -> Byte1W<Data0Cmb13Spec> {
         Byte1W::new(self, 8)
     }
 }
-#[doc = "CAN Frame Data Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data0_cmb13::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data0_cmb13::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Data Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`data0_cmb13::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data0_cmb13::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Data0Cmb13Spec;
 impl crate::RegisterSpec for Data0Cmb13Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/data0_cmb14.rs b/va416xx/src/can0/data0_cmb14.rs
index 72026d5..7fc76f5 100644
--- a/va416xx/src/can0/data0_cmb14.rs
+++ b/va416xx/src/can0/data0_cmb14.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Data Byte 2"]
     #[inline(always)]
-    #[must_use]
     pub fn byte2(&mut self) -> Byte2W<Data0Cmb14Spec> {
         Byte2W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Data Byte 1"]
     #[inline(always)]
-    #[must_use]
     pub fn byte1(&mut self) -> Byte1W<Data0Cmb14Spec> {
         Byte1W::new(self, 8)
     }
 }
-#[doc = "CAN Frame Data Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data0_cmb14::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data0_cmb14::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Data Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`data0_cmb14::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data0_cmb14::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Data0Cmb14Spec;
 impl crate::RegisterSpec for Data0Cmb14Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/data0_cmb2.rs b/va416xx/src/can0/data0_cmb2.rs
index b9823de..0ce2786 100644
--- a/va416xx/src/can0/data0_cmb2.rs
+++ b/va416xx/src/can0/data0_cmb2.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Data Byte 2"]
     #[inline(always)]
-    #[must_use]
     pub fn byte2(&mut self) -> Byte2W<Data0Cmb2Spec> {
         Byte2W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Data Byte 1"]
     #[inline(always)]
-    #[must_use]
     pub fn byte1(&mut self) -> Byte1W<Data0Cmb2Spec> {
         Byte1W::new(self, 8)
     }
 }
-#[doc = "CAN Frame Data Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data0_cmb2::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data0_cmb2::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Data Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`data0_cmb2::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data0_cmb2::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Data0Cmb2Spec;
 impl crate::RegisterSpec for Data0Cmb2Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/data0_cmb3.rs b/va416xx/src/can0/data0_cmb3.rs
index 488e04b..66eaf33 100644
--- a/va416xx/src/can0/data0_cmb3.rs
+++ b/va416xx/src/can0/data0_cmb3.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Data Byte 2"]
     #[inline(always)]
-    #[must_use]
     pub fn byte2(&mut self) -> Byte2W<Data0Cmb3Spec> {
         Byte2W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Data Byte 1"]
     #[inline(always)]
-    #[must_use]
     pub fn byte1(&mut self) -> Byte1W<Data0Cmb3Spec> {
         Byte1W::new(self, 8)
     }
 }
-#[doc = "CAN Frame Data Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data0_cmb3::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data0_cmb3::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Data Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`data0_cmb3::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data0_cmb3::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Data0Cmb3Spec;
 impl crate::RegisterSpec for Data0Cmb3Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/data0_cmb4.rs b/va416xx/src/can0/data0_cmb4.rs
index 8134f20..6d31a61 100644
--- a/va416xx/src/can0/data0_cmb4.rs
+++ b/va416xx/src/can0/data0_cmb4.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Data Byte 2"]
     #[inline(always)]
-    #[must_use]
     pub fn byte2(&mut self) -> Byte2W<Data0Cmb4Spec> {
         Byte2W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Data Byte 1"]
     #[inline(always)]
-    #[must_use]
     pub fn byte1(&mut self) -> Byte1W<Data0Cmb4Spec> {
         Byte1W::new(self, 8)
     }
 }
-#[doc = "CAN Frame Data Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data0_cmb4::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data0_cmb4::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Data Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`data0_cmb4::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data0_cmb4::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Data0Cmb4Spec;
 impl crate::RegisterSpec for Data0Cmb4Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/data0_cmb5.rs b/va416xx/src/can0/data0_cmb5.rs
index a0033fc..7407f0b 100644
--- a/va416xx/src/can0/data0_cmb5.rs
+++ b/va416xx/src/can0/data0_cmb5.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Data Byte 2"]
     #[inline(always)]
-    #[must_use]
     pub fn byte2(&mut self) -> Byte2W<Data0Cmb5Spec> {
         Byte2W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Data Byte 1"]
     #[inline(always)]
-    #[must_use]
     pub fn byte1(&mut self) -> Byte1W<Data0Cmb5Spec> {
         Byte1W::new(self, 8)
     }
 }
-#[doc = "CAN Frame Data Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data0_cmb5::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data0_cmb5::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Data Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`data0_cmb5::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data0_cmb5::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Data0Cmb5Spec;
 impl crate::RegisterSpec for Data0Cmb5Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/data0_cmb6.rs b/va416xx/src/can0/data0_cmb6.rs
index 2f8de4e..bf376fe 100644
--- a/va416xx/src/can0/data0_cmb6.rs
+++ b/va416xx/src/can0/data0_cmb6.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Data Byte 2"]
     #[inline(always)]
-    #[must_use]
     pub fn byte2(&mut self) -> Byte2W<Data0Cmb6Spec> {
         Byte2W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Data Byte 1"]
     #[inline(always)]
-    #[must_use]
     pub fn byte1(&mut self) -> Byte1W<Data0Cmb6Spec> {
         Byte1W::new(self, 8)
     }
 }
-#[doc = "CAN Frame Data Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data0_cmb6::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data0_cmb6::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Data Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`data0_cmb6::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data0_cmb6::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Data0Cmb6Spec;
 impl crate::RegisterSpec for Data0Cmb6Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/data0_cmb7.rs b/va416xx/src/can0/data0_cmb7.rs
index 4734c91..96570cb 100644
--- a/va416xx/src/can0/data0_cmb7.rs
+++ b/va416xx/src/can0/data0_cmb7.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Data Byte 2"]
     #[inline(always)]
-    #[must_use]
     pub fn byte2(&mut self) -> Byte2W<Data0Cmb7Spec> {
         Byte2W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Data Byte 1"]
     #[inline(always)]
-    #[must_use]
     pub fn byte1(&mut self) -> Byte1W<Data0Cmb7Spec> {
         Byte1W::new(self, 8)
     }
 }
-#[doc = "CAN Frame Data Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data0_cmb7::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data0_cmb7::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Data Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`data0_cmb7::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data0_cmb7::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Data0Cmb7Spec;
 impl crate::RegisterSpec for Data0Cmb7Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/data0_cmb8.rs b/va416xx/src/can0/data0_cmb8.rs
index e1e2316..320e7a6 100644
--- a/va416xx/src/can0/data0_cmb8.rs
+++ b/va416xx/src/can0/data0_cmb8.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Data Byte 2"]
     #[inline(always)]
-    #[must_use]
     pub fn byte2(&mut self) -> Byte2W<Data0Cmb8Spec> {
         Byte2W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Data Byte 1"]
     #[inline(always)]
-    #[must_use]
     pub fn byte1(&mut self) -> Byte1W<Data0Cmb8Spec> {
         Byte1W::new(self, 8)
     }
 }
-#[doc = "CAN Frame Data Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data0_cmb8::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data0_cmb8::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Data Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`data0_cmb8::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data0_cmb8::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Data0Cmb8Spec;
 impl crate::RegisterSpec for Data0Cmb8Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/data0_cmb9.rs b/va416xx/src/can0/data0_cmb9.rs
index 2d708bd..85d97e2 100644
--- a/va416xx/src/can0/data0_cmb9.rs
+++ b/va416xx/src/can0/data0_cmb9.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Data Byte 2"]
     #[inline(always)]
-    #[must_use]
     pub fn byte2(&mut self) -> Byte2W<Data0Cmb9Spec> {
         Byte2W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Data Byte 1"]
     #[inline(always)]
-    #[must_use]
     pub fn byte1(&mut self) -> Byte1W<Data0Cmb9Spec> {
         Byte1W::new(self, 8)
     }
 }
-#[doc = "CAN Frame Data Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data0_cmb9::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data0_cmb9::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Data Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`data0_cmb9::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data0_cmb9::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Data0Cmb9Spec;
 impl crate::RegisterSpec for Data0Cmb9Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/data0_hcmb.rs b/va416xx/src/can0/data0_hcmb.rs
index 4f96c9e..73a1216 100644
--- a/va416xx/src/can0/data0_hcmb.rs
+++ b/va416xx/src/can0/data0_hcmb.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Data Byte 2"]
     #[inline(always)]
-    #[must_use]
     pub fn byte2(&mut self) -> Byte2W<Data0HcmbSpec> {
         Byte2W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Data Byte 1"]
     #[inline(always)]
-    #[must_use]
     pub fn byte1(&mut self) -> Byte1W<Data0HcmbSpec> {
         Byte1W::new(self, 8)
     }
 }
-#[doc = "CAN Frame Data Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data0_hcmb::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data0_hcmb::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Data Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`data0_hcmb::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data0_hcmb::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Data0HcmbSpec;
 impl crate::RegisterSpec for Data0HcmbSpec {
     type Ux = u32;
diff --git a/va416xx/src/can0/data1_cmb0.rs b/va416xx/src/can0/data1_cmb0.rs
index 7fb354d..d9f7f0f 100644
--- a/va416xx/src/can0/data1_cmb0.rs
+++ b/va416xx/src/can0/data1_cmb0.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Data Byte 4"]
     #[inline(always)]
-    #[must_use]
     pub fn byte4(&mut self) -> Byte4W<Data1Cmb0Spec> {
         Byte4W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Data Byte 3"]
     #[inline(always)]
-    #[must_use]
     pub fn byte3(&mut self) -> Byte3W<Data1Cmb0Spec> {
         Byte3W::new(self, 8)
     }
 }
-#[doc = "CAN Frame Data Word 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data1_cmb0::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data1_cmb0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Data Word 1\n\nYou can [`read`](crate::Reg::read) this register and get [`data1_cmb0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data1_cmb0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Data1Cmb0Spec;
 impl crate::RegisterSpec for Data1Cmb0Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/data1_cmb1.rs b/va416xx/src/can0/data1_cmb1.rs
index a3f1842..968722b 100644
--- a/va416xx/src/can0/data1_cmb1.rs
+++ b/va416xx/src/can0/data1_cmb1.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Data Byte 4"]
     #[inline(always)]
-    #[must_use]
     pub fn byte4(&mut self) -> Byte4W<Data1Cmb1Spec> {
         Byte4W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Data Byte 3"]
     #[inline(always)]
-    #[must_use]
     pub fn byte3(&mut self) -> Byte3W<Data1Cmb1Spec> {
         Byte3W::new(self, 8)
     }
 }
-#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data1_cmb1::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data1_cmb1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data1_cmb1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data1_cmb1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Data1Cmb1Spec;
 impl crate::RegisterSpec for Data1Cmb1Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/data1_cmb10.rs b/va416xx/src/can0/data1_cmb10.rs
index 25fca4d..deb2f8e 100644
--- a/va416xx/src/can0/data1_cmb10.rs
+++ b/va416xx/src/can0/data1_cmb10.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Data Byte 4"]
     #[inline(always)]
-    #[must_use]
     pub fn byte4(&mut self) -> Byte4W<Data1Cmb10Spec> {
         Byte4W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Data Byte 3"]
     #[inline(always)]
-    #[must_use]
     pub fn byte3(&mut self) -> Byte3W<Data1Cmb10Spec> {
         Byte3W::new(self, 8)
     }
 }
-#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data1_cmb10::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data1_cmb10::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data1_cmb10::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data1_cmb10::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Data1Cmb10Spec;
 impl crate::RegisterSpec for Data1Cmb10Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/data1_cmb11.rs b/va416xx/src/can0/data1_cmb11.rs
index 62ef6af..c9d8acc 100644
--- a/va416xx/src/can0/data1_cmb11.rs
+++ b/va416xx/src/can0/data1_cmb11.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Data Byte 4"]
     #[inline(always)]
-    #[must_use]
     pub fn byte4(&mut self) -> Byte4W<Data1Cmb11Spec> {
         Byte4W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Data Byte 3"]
     #[inline(always)]
-    #[must_use]
     pub fn byte3(&mut self) -> Byte3W<Data1Cmb11Spec> {
         Byte3W::new(self, 8)
     }
 }
-#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data1_cmb11::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data1_cmb11::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data1_cmb11::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data1_cmb11::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Data1Cmb11Spec;
 impl crate::RegisterSpec for Data1Cmb11Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/data1_cmb12.rs b/va416xx/src/can0/data1_cmb12.rs
index 248930f..c7f816d 100644
--- a/va416xx/src/can0/data1_cmb12.rs
+++ b/va416xx/src/can0/data1_cmb12.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Data Byte 4"]
     #[inline(always)]
-    #[must_use]
     pub fn byte4(&mut self) -> Byte4W<Data1Cmb12Spec> {
         Byte4W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Data Byte 3"]
     #[inline(always)]
-    #[must_use]
     pub fn byte3(&mut self) -> Byte3W<Data1Cmb12Spec> {
         Byte3W::new(self, 8)
     }
 }
-#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data1_cmb12::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data1_cmb12::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data1_cmb12::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data1_cmb12::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Data1Cmb12Spec;
 impl crate::RegisterSpec for Data1Cmb12Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/data1_cmb13.rs b/va416xx/src/can0/data1_cmb13.rs
index da85ae6..0a3225b 100644
--- a/va416xx/src/can0/data1_cmb13.rs
+++ b/va416xx/src/can0/data1_cmb13.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Data Byte 4"]
     #[inline(always)]
-    #[must_use]
     pub fn byte4(&mut self) -> Byte4W<Data1Cmb13Spec> {
         Byte4W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Data Byte 3"]
     #[inline(always)]
-    #[must_use]
     pub fn byte3(&mut self) -> Byte3W<Data1Cmb13Spec> {
         Byte3W::new(self, 8)
     }
 }
-#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data1_cmb13::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data1_cmb13::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data1_cmb13::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data1_cmb13::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Data1Cmb13Spec;
 impl crate::RegisterSpec for Data1Cmb13Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/data1_cmb14.rs b/va416xx/src/can0/data1_cmb14.rs
index 67b0621..3e179d4 100644
--- a/va416xx/src/can0/data1_cmb14.rs
+++ b/va416xx/src/can0/data1_cmb14.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Data Byte 4"]
     #[inline(always)]
-    #[must_use]
     pub fn byte4(&mut self) -> Byte4W<Data1Cmb14Spec> {
         Byte4W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Data Byte 3"]
     #[inline(always)]
-    #[must_use]
     pub fn byte3(&mut self) -> Byte3W<Data1Cmb14Spec> {
         Byte3W::new(self, 8)
     }
 }
-#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data1_cmb14::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data1_cmb14::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data1_cmb14::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data1_cmb14::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Data1Cmb14Spec;
 impl crate::RegisterSpec for Data1Cmb14Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/data1_cmb2.rs b/va416xx/src/can0/data1_cmb2.rs
index 9c0f91e..a20ac17 100644
--- a/va416xx/src/can0/data1_cmb2.rs
+++ b/va416xx/src/can0/data1_cmb2.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Data Byte 4"]
     #[inline(always)]
-    #[must_use]
     pub fn byte4(&mut self) -> Byte4W<Data1Cmb2Spec> {
         Byte4W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Data Byte 3"]
     #[inline(always)]
-    #[must_use]
     pub fn byte3(&mut self) -> Byte3W<Data1Cmb2Spec> {
         Byte3W::new(self, 8)
     }
 }
-#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data1_cmb2::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data1_cmb2::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data1_cmb2::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data1_cmb2::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Data1Cmb2Spec;
 impl crate::RegisterSpec for Data1Cmb2Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/data1_cmb3.rs b/va416xx/src/can0/data1_cmb3.rs
index eb07213..3665246 100644
--- a/va416xx/src/can0/data1_cmb3.rs
+++ b/va416xx/src/can0/data1_cmb3.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Data Byte 4"]
     #[inline(always)]
-    #[must_use]
     pub fn byte4(&mut self) -> Byte4W<Data1Cmb3Spec> {
         Byte4W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Data Byte 3"]
     #[inline(always)]
-    #[must_use]
     pub fn byte3(&mut self) -> Byte3W<Data1Cmb3Spec> {
         Byte3W::new(self, 8)
     }
 }
-#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data1_cmb3::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data1_cmb3::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data1_cmb3::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data1_cmb3::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Data1Cmb3Spec;
 impl crate::RegisterSpec for Data1Cmb3Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/data1_cmb4.rs b/va416xx/src/can0/data1_cmb4.rs
index 1ed478d..0d2f179 100644
--- a/va416xx/src/can0/data1_cmb4.rs
+++ b/va416xx/src/can0/data1_cmb4.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Data Byte 4"]
     #[inline(always)]
-    #[must_use]
     pub fn byte4(&mut self) -> Byte4W<Data1Cmb4Spec> {
         Byte4W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Data Byte 3"]
     #[inline(always)]
-    #[must_use]
     pub fn byte3(&mut self) -> Byte3W<Data1Cmb4Spec> {
         Byte3W::new(self, 8)
     }
 }
-#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data1_cmb4::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data1_cmb4::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data1_cmb4::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data1_cmb4::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Data1Cmb4Spec;
 impl crate::RegisterSpec for Data1Cmb4Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/data1_cmb5.rs b/va416xx/src/can0/data1_cmb5.rs
index 4673b81..b14efa6 100644
--- a/va416xx/src/can0/data1_cmb5.rs
+++ b/va416xx/src/can0/data1_cmb5.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Data Byte 4"]
     #[inline(always)]
-    #[must_use]
     pub fn byte4(&mut self) -> Byte4W<Data1Cmb5Spec> {
         Byte4W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Data Byte 3"]
     #[inline(always)]
-    #[must_use]
     pub fn byte3(&mut self) -> Byte3W<Data1Cmb5Spec> {
         Byte3W::new(self, 8)
     }
 }
-#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data1_cmb5::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data1_cmb5::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data1_cmb5::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data1_cmb5::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Data1Cmb5Spec;
 impl crate::RegisterSpec for Data1Cmb5Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/data1_cmb6.rs b/va416xx/src/can0/data1_cmb6.rs
index 860282a..fa546c6 100644
--- a/va416xx/src/can0/data1_cmb6.rs
+++ b/va416xx/src/can0/data1_cmb6.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Data Byte 4"]
     #[inline(always)]
-    #[must_use]
     pub fn byte4(&mut self) -> Byte4W<Data1Cmb6Spec> {
         Byte4W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Data Byte 3"]
     #[inline(always)]
-    #[must_use]
     pub fn byte3(&mut self) -> Byte3W<Data1Cmb6Spec> {
         Byte3W::new(self, 8)
     }
 }
-#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data1_cmb6::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data1_cmb6::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data1_cmb6::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data1_cmb6::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Data1Cmb6Spec;
 impl crate::RegisterSpec for Data1Cmb6Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/data1_cmb7.rs b/va416xx/src/can0/data1_cmb7.rs
index e45c47c..28a62e8 100644
--- a/va416xx/src/can0/data1_cmb7.rs
+++ b/va416xx/src/can0/data1_cmb7.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Data Byte 4"]
     #[inline(always)]
-    #[must_use]
     pub fn byte4(&mut self) -> Byte4W<Data1Cmb7Spec> {
         Byte4W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Data Byte 3"]
     #[inline(always)]
-    #[must_use]
     pub fn byte3(&mut self) -> Byte3W<Data1Cmb7Spec> {
         Byte3W::new(self, 8)
     }
 }
-#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data1_cmb7::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data1_cmb7::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data1_cmb7::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data1_cmb7::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Data1Cmb7Spec;
 impl crate::RegisterSpec for Data1Cmb7Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/data1_cmb8.rs b/va416xx/src/can0/data1_cmb8.rs
index d3dc3cf..1ff6ca2 100644
--- a/va416xx/src/can0/data1_cmb8.rs
+++ b/va416xx/src/can0/data1_cmb8.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Data Byte 4"]
     #[inline(always)]
-    #[must_use]
     pub fn byte4(&mut self) -> Byte4W<Data1Cmb8Spec> {
         Byte4W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Data Byte 3"]
     #[inline(always)]
-    #[must_use]
     pub fn byte3(&mut self) -> Byte3W<Data1Cmb8Spec> {
         Byte3W::new(self, 8)
     }
 }
-#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data1_cmb8::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data1_cmb8::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data1_cmb8::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data1_cmb8::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Data1Cmb8Spec;
 impl crate::RegisterSpec for Data1Cmb8Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/data1_cmb9.rs b/va416xx/src/can0/data1_cmb9.rs
index ae5ea13..4f04481 100644
--- a/va416xx/src/can0/data1_cmb9.rs
+++ b/va416xx/src/can0/data1_cmb9.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Data Byte 4"]
     #[inline(always)]
-    #[must_use]
     pub fn byte4(&mut self) -> Byte4W<Data1Cmb9Spec> {
         Byte4W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Data Byte 3"]
     #[inline(always)]
-    #[must_use]
     pub fn byte3(&mut self) -> Byte3W<Data1Cmb9Spec> {
         Byte3W::new(self, 8)
     }
 }
-#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data1_cmb9::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data1_cmb9::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data1_cmb9::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data1_cmb9::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Data1Cmb9Spec;
 impl crate::RegisterSpec for Data1Cmb9Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/data1_hcmb.rs b/va416xx/src/can0/data1_hcmb.rs
index f8dcded..008f84a 100644
--- a/va416xx/src/can0/data1_hcmb.rs
+++ b/va416xx/src/can0/data1_hcmb.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Data Byte 4"]
     #[inline(always)]
-    #[must_use]
     pub fn byte4(&mut self) -> Byte4W<Data1HcmbSpec> {
         Byte4W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Data Byte 3"]
     #[inline(always)]
-    #[must_use]
     pub fn byte3(&mut self) -> Byte3W<Data1HcmbSpec> {
         Byte3W::new(self, 8)
     }
 }
-#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data1_hcmb::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data1_hcmb::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data1_hcmb::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data1_hcmb::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Data1HcmbSpec;
 impl crate::RegisterSpec for Data1HcmbSpec {
     type Ux = u32;
diff --git a/va416xx/src/can0/data2_cmb0.rs b/va416xx/src/can0/data2_cmb0.rs
index 80d924d..ec4a8ec 100644
--- a/va416xx/src/can0/data2_cmb0.rs
+++ b/va416xx/src/can0/data2_cmb0.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Data Byte 6"]
     #[inline(always)]
-    #[must_use]
     pub fn byte6(&mut self) -> Byte6W<Data2Cmb0Spec> {
         Byte6W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Data Byte 5"]
     #[inline(always)]
-    #[must_use]
     pub fn byte5(&mut self) -> Byte5W<Data2Cmb0Spec> {
         Byte5W::new(self, 8)
     }
 }
-#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data2_cmb0::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data2_cmb0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data2_cmb0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data2_cmb0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Data2Cmb0Spec;
 impl crate::RegisterSpec for Data2Cmb0Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/data2_cmb1.rs b/va416xx/src/can0/data2_cmb1.rs
index 404ca8c..67dce3e 100644
--- a/va416xx/src/can0/data2_cmb1.rs
+++ b/va416xx/src/can0/data2_cmb1.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Data Byte 6"]
     #[inline(always)]
-    #[must_use]
     pub fn byte6(&mut self) -> Byte6W<Data2Cmb1Spec> {
         Byte6W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Data Byte 5"]
     #[inline(always)]
-    #[must_use]
     pub fn byte5(&mut self) -> Byte5W<Data2Cmb1Spec> {
         Byte5W::new(self, 8)
     }
 }
-#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data2_cmb1::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data2_cmb1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data2_cmb1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data2_cmb1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Data2Cmb1Spec;
 impl crate::RegisterSpec for Data2Cmb1Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/data2_cmb10.rs b/va416xx/src/can0/data2_cmb10.rs
index 2d96d4b..3914312 100644
--- a/va416xx/src/can0/data2_cmb10.rs
+++ b/va416xx/src/can0/data2_cmb10.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Data Byte 6"]
     #[inline(always)]
-    #[must_use]
     pub fn byte6(&mut self) -> Byte6W<Data2Cmb10Spec> {
         Byte6W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Data Byte 5"]
     #[inline(always)]
-    #[must_use]
     pub fn byte5(&mut self) -> Byte5W<Data2Cmb10Spec> {
         Byte5W::new(self, 8)
     }
 }
-#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data2_cmb10::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data2_cmb10::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data2_cmb10::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data2_cmb10::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Data2Cmb10Spec;
 impl crate::RegisterSpec for Data2Cmb10Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/data2_cmb11.rs b/va416xx/src/can0/data2_cmb11.rs
index 338d3e5..1afb388 100644
--- a/va416xx/src/can0/data2_cmb11.rs
+++ b/va416xx/src/can0/data2_cmb11.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Data Byte 6"]
     #[inline(always)]
-    #[must_use]
     pub fn byte6(&mut self) -> Byte6W<Data2Cmb11Spec> {
         Byte6W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Data Byte 5"]
     #[inline(always)]
-    #[must_use]
     pub fn byte5(&mut self) -> Byte5W<Data2Cmb11Spec> {
         Byte5W::new(self, 8)
     }
 }
-#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data2_cmb11::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data2_cmb11::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data2_cmb11::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data2_cmb11::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Data2Cmb11Spec;
 impl crate::RegisterSpec for Data2Cmb11Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/data2_cmb12.rs b/va416xx/src/can0/data2_cmb12.rs
index 6fe89e8..a0ae216 100644
--- a/va416xx/src/can0/data2_cmb12.rs
+++ b/va416xx/src/can0/data2_cmb12.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Data Byte 6"]
     #[inline(always)]
-    #[must_use]
     pub fn byte6(&mut self) -> Byte6W<Data2Cmb12Spec> {
         Byte6W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Data Byte 5"]
     #[inline(always)]
-    #[must_use]
     pub fn byte5(&mut self) -> Byte5W<Data2Cmb12Spec> {
         Byte5W::new(self, 8)
     }
 }
-#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data2_cmb12::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data2_cmb12::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data2_cmb12::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data2_cmb12::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Data2Cmb12Spec;
 impl crate::RegisterSpec for Data2Cmb12Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/data2_cmb13.rs b/va416xx/src/can0/data2_cmb13.rs
index 2ee2bb7..619470a 100644
--- a/va416xx/src/can0/data2_cmb13.rs
+++ b/va416xx/src/can0/data2_cmb13.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Data Byte 6"]
     #[inline(always)]
-    #[must_use]
     pub fn byte6(&mut self) -> Byte6W<Data2Cmb13Spec> {
         Byte6W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Data Byte 5"]
     #[inline(always)]
-    #[must_use]
     pub fn byte5(&mut self) -> Byte5W<Data2Cmb13Spec> {
         Byte5W::new(self, 8)
     }
 }
-#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data2_cmb13::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data2_cmb13::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data2_cmb13::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data2_cmb13::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Data2Cmb13Spec;
 impl crate::RegisterSpec for Data2Cmb13Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/data2_cmb14.rs b/va416xx/src/can0/data2_cmb14.rs
index ff9ee97..0957e6e 100644
--- a/va416xx/src/can0/data2_cmb14.rs
+++ b/va416xx/src/can0/data2_cmb14.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Data Byte 6"]
     #[inline(always)]
-    #[must_use]
     pub fn byte6(&mut self) -> Byte6W<Data2Cmb14Spec> {
         Byte6W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Data Byte 5"]
     #[inline(always)]
-    #[must_use]
     pub fn byte5(&mut self) -> Byte5W<Data2Cmb14Spec> {
         Byte5W::new(self, 8)
     }
 }
-#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data2_cmb14::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data2_cmb14::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data2_cmb14::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data2_cmb14::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Data2Cmb14Spec;
 impl crate::RegisterSpec for Data2Cmb14Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/data2_cmb2.rs b/va416xx/src/can0/data2_cmb2.rs
index 4cd31dd..0193f41 100644
--- a/va416xx/src/can0/data2_cmb2.rs
+++ b/va416xx/src/can0/data2_cmb2.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Data Byte 6"]
     #[inline(always)]
-    #[must_use]
     pub fn byte6(&mut self) -> Byte6W<Data2Cmb2Spec> {
         Byte6W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Data Byte 5"]
     #[inline(always)]
-    #[must_use]
     pub fn byte5(&mut self) -> Byte5W<Data2Cmb2Spec> {
         Byte5W::new(self, 8)
     }
 }
-#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data2_cmb2::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data2_cmb2::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data2_cmb2::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data2_cmb2::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Data2Cmb2Spec;
 impl crate::RegisterSpec for Data2Cmb2Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/data2_cmb3.rs b/va416xx/src/can0/data2_cmb3.rs
index 2511577..931ca36 100644
--- a/va416xx/src/can0/data2_cmb3.rs
+++ b/va416xx/src/can0/data2_cmb3.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Data Byte 6"]
     #[inline(always)]
-    #[must_use]
     pub fn byte6(&mut self) -> Byte6W<Data2Cmb3Spec> {
         Byte6W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Data Byte 5"]
     #[inline(always)]
-    #[must_use]
     pub fn byte5(&mut self) -> Byte5W<Data2Cmb3Spec> {
         Byte5W::new(self, 8)
     }
 }
-#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data2_cmb3::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data2_cmb3::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data2_cmb3::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data2_cmb3::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Data2Cmb3Spec;
 impl crate::RegisterSpec for Data2Cmb3Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/data2_cmb4.rs b/va416xx/src/can0/data2_cmb4.rs
index 9a2deef..2473c26 100644
--- a/va416xx/src/can0/data2_cmb4.rs
+++ b/va416xx/src/can0/data2_cmb4.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Data Byte 6"]
     #[inline(always)]
-    #[must_use]
     pub fn byte6(&mut self) -> Byte6W<Data2Cmb4Spec> {
         Byte6W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Data Byte 5"]
     #[inline(always)]
-    #[must_use]
     pub fn byte5(&mut self) -> Byte5W<Data2Cmb4Spec> {
         Byte5W::new(self, 8)
     }
 }
-#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data2_cmb4::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data2_cmb4::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data2_cmb4::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data2_cmb4::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Data2Cmb4Spec;
 impl crate::RegisterSpec for Data2Cmb4Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/data2_cmb5.rs b/va416xx/src/can0/data2_cmb5.rs
index 1a94329..b213f97 100644
--- a/va416xx/src/can0/data2_cmb5.rs
+++ b/va416xx/src/can0/data2_cmb5.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Data Byte 6"]
     #[inline(always)]
-    #[must_use]
     pub fn byte6(&mut self) -> Byte6W<Data2Cmb5Spec> {
         Byte6W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Data Byte 5"]
     #[inline(always)]
-    #[must_use]
     pub fn byte5(&mut self) -> Byte5W<Data2Cmb5Spec> {
         Byte5W::new(self, 8)
     }
 }
-#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data2_cmb5::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data2_cmb5::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data2_cmb5::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data2_cmb5::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Data2Cmb5Spec;
 impl crate::RegisterSpec for Data2Cmb5Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/data2_cmb6.rs b/va416xx/src/can0/data2_cmb6.rs
index ea2ed85..5aa6a70 100644
--- a/va416xx/src/can0/data2_cmb6.rs
+++ b/va416xx/src/can0/data2_cmb6.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Data Byte 6"]
     #[inline(always)]
-    #[must_use]
     pub fn byte6(&mut self) -> Byte6W<Data2Cmb6Spec> {
         Byte6W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Data Byte 5"]
     #[inline(always)]
-    #[must_use]
     pub fn byte5(&mut self) -> Byte5W<Data2Cmb6Spec> {
         Byte5W::new(self, 8)
     }
 }
-#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data2_cmb6::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data2_cmb6::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data2_cmb6::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data2_cmb6::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Data2Cmb6Spec;
 impl crate::RegisterSpec for Data2Cmb6Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/data2_cmb7.rs b/va416xx/src/can0/data2_cmb7.rs
index da5cea5..299cadf 100644
--- a/va416xx/src/can0/data2_cmb7.rs
+++ b/va416xx/src/can0/data2_cmb7.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Data Byte 6"]
     #[inline(always)]
-    #[must_use]
     pub fn byte6(&mut self) -> Byte6W<Data2Cmb7Spec> {
         Byte6W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Data Byte 5"]
     #[inline(always)]
-    #[must_use]
     pub fn byte5(&mut self) -> Byte5W<Data2Cmb7Spec> {
         Byte5W::new(self, 8)
     }
 }
-#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data2_cmb7::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data2_cmb7::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data2_cmb7::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data2_cmb7::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Data2Cmb7Spec;
 impl crate::RegisterSpec for Data2Cmb7Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/data2_cmb8.rs b/va416xx/src/can0/data2_cmb8.rs
index 4c956f6..f105af5 100644
--- a/va416xx/src/can0/data2_cmb8.rs
+++ b/va416xx/src/can0/data2_cmb8.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Data Byte 6"]
     #[inline(always)]
-    #[must_use]
     pub fn byte6(&mut self) -> Byte6W<Data2Cmb8Spec> {
         Byte6W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Data Byte 5"]
     #[inline(always)]
-    #[must_use]
     pub fn byte5(&mut self) -> Byte5W<Data2Cmb8Spec> {
         Byte5W::new(self, 8)
     }
 }
-#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data2_cmb8::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data2_cmb8::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data2_cmb8::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data2_cmb8::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Data2Cmb8Spec;
 impl crate::RegisterSpec for Data2Cmb8Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/data2_cmb9.rs b/va416xx/src/can0/data2_cmb9.rs
index 3076b3e..a05ed41 100644
--- a/va416xx/src/can0/data2_cmb9.rs
+++ b/va416xx/src/can0/data2_cmb9.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Data Byte 6"]
     #[inline(always)]
-    #[must_use]
     pub fn byte6(&mut self) -> Byte6W<Data2Cmb9Spec> {
         Byte6W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Data Byte 5"]
     #[inline(always)]
-    #[must_use]
     pub fn byte5(&mut self) -> Byte5W<Data2Cmb9Spec> {
         Byte5W::new(self, 8)
     }
 }
-#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data2_cmb9::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data2_cmb9::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data2_cmb9::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data2_cmb9::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Data2Cmb9Spec;
 impl crate::RegisterSpec for Data2Cmb9Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/data2_hcmb.rs b/va416xx/src/can0/data2_hcmb.rs
index 2d43337..62cb0bb 100644
--- a/va416xx/src/can0/data2_hcmb.rs
+++ b/va416xx/src/can0/data2_hcmb.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Data Byte 6"]
     #[inline(always)]
-    #[must_use]
     pub fn byte6(&mut self) -> Byte6W<Data2HcmbSpec> {
         Byte6W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Data Byte 5"]
     #[inline(always)]
-    #[must_use]
     pub fn byte5(&mut self) -> Byte5W<Data2HcmbSpec> {
         Byte5W::new(self, 8)
     }
 }
-#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data2_hcmb::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data2_hcmb::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data2_hcmb::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data2_hcmb::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Data2HcmbSpec;
 impl crate::RegisterSpec for Data2HcmbSpec {
     type Ux = u32;
diff --git a/va416xx/src/can0/data3_cmb0.rs b/va416xx/src/can0/data3_cmb0.rs
index 5cec7bc..1260b70 100644
--- a/va416xx/src/can0/data3_cmb0.rs
+++ b/va416xx/src/can0/data3_cmb0.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Data Byte 8"]
     #[inline(always)]
-    #[must_use]
     pub fn byte8(&mut self) -> Byte8W<Data3Cmb0Spec> {
         Byte8W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Data Byte 7"]
     #[inline(always)]
-    #[must_use]
     pub fn byte7(&mut self) -> Byte7W<Data3Cmb0Spec> {
         Byte7W::new(self, 8)
     }
 }
-#[doc = "CAN Frame Data Word 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data3_cmb0::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data3_cmb0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Data Word 3\n\nYou can [`read`](crate::Reg::read) this register and get [`data3_cmb0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data3_cmb0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Data3Cmb0Spec;
 impl crate::RegisterSpec for Data3Cmb0Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/data3_cmb1.rs b/va416xx/src/can0/data3_cmb1.rs
index 6240a1c..1eac55d 100644
--- a/va416xx/src/can0/data3_cmb1.rs
+++ b/va416xx/src/can0/data3_cmb1.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Data Byte 8"]
     #[inline(always)]
-    #[must_use]
     pub fn byte8(&mut self) -> Byte8W<Data3Cmb1Spec> {
         Byte8W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Data Byte 7"]
     #[inline(always)]
-    #[must_use]
     pub fn byte7(&mut self) -> Byte7W<Data3Cmb1Spec> {
         Byte7W::new(self, 8)
     }
 }
-#[doc = "CAN Frame Data Word 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data3_cmb1::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data3_cmb1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Data Word 3\n\nYou can [`read`](crate::Reg::read) this register and get [`data3_cmb1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data3_cmb1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Data3Cmb1Spec;
 impl crate::RegisterSpec for Data3Cmb1Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/data3_cmb10.rs b/va416xx/src/can0/data3_cmb10.rs
index bc817b6..2442205 100644
--- a/va416xx/src/can0/data3_cmb10.rs
+++ b/va416xx/src/can0/data3_cmb10.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Data Byte 8"]
     #[inline(always)]
-    #[must_use]
     pub fn byte8(&mut self) -> Byte8W<Data3Cmb10Spec> {
         Byte8W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Data Byte 7"]
     #[inline(always)]
-    #[must_use]
     pub fn byte7(&mut self) -> Byte7W<Data3Cmb10Spec> {
         Byte7W::new(self, 8)
     }
 }
-#[doc = "CAN Frame Data Word 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data3_cmb10::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data3_cmb10::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Data Word 3\n\nYou can [`read`](crate::Reg::read) this register and get [`data3_cmb10::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data3_cmb10::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Data3Cmb10Spec;
 impl crate::RegisterSpec for Data3Cmb10Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/data3_cmb11.rs b/va416xx/src/can0/data3_cmb11.rs
index f5722aa..76f2610 100644
--- a/va416xx/src/can0/data3_cmb11.rs
+++ b/va416xx/src/can0/data3_cmb11.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Data Byte 8"]
     #[inline(always)]
-    #[must_use]
     pub fn byte8(&mut self) -> Byte8W<Data3Cmb11Spec> {
         Byte8W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Data Byte 7"]
     #[inline(always)]
-    #[must_use]
     pub fn byte7(&mut self) -> Byte7W<Data3Cmb11Spec> {
         Byte7W::new(self, 8)
     }
 }
-#[doc = "CAN Frame Data Word 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data3_cmb11::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data3_cmb11::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Data Word 3\n\nYou can [`read`](crate::Reg::read) this register and get [`data3_cmb11::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data3_cmb11::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Data3Cmb11Spec;
 impl crate::RegisterSpec for Data3Cmb11Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/data3_cmb12.rs b/va416xx/src/can0/data3_cmb12.rs
index d830d5f..0292678 100644
--- a/va416xx/src/can0/data3_cmb12.rs
+++ b/va416xx/src/can0/data3_cmb12.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Data Byte 8"]
     #[inline(always)]
-    #[must_use]
     pub fn byte8(&mut self) -> Byte8W<Data3Cmb12Spec> {
         Byte8W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Data Byte 7"]
     #[inline(always)]
-    #[must_use]
     pub fn byte7(&mut self) -> Byte7W<Data3Cmb12Spec> {
         Byte7W::new(self, 8)
     }
 }
-#[doc = "CAN Frame Data Word 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data3_cmb12::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data3_cmb12::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Data Word 3\n\nYou can [`read`](crate::Reg::read) this register and get [`data3_cmb12::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data3_cmb12::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Data3Cmb12Spec;
 impl crate::RegisterSpec for Data3Cmb12Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/data3_cmb13.rs b/va416xx/src/can0/data3_cmb13.rs
index 3d3c30c..3f0d669 100644
--- a/va416xx/src/can0/data3_cmb13.rs
+++ b/va416xx/src/can0/data3_cmb13.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Data Byte 8"]
     #[inline(always)]
-    #[must_use]
     pub fn byte8(&mut self) -> Byte8W<Data3Cmb13Spec> {
         Byte8W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Data Byte 7"]
     #[inline(always)]
-    #[must_use]
     pub fn byte7(&mut self) -> Byte7W<Data3Cmb13Spec> {
         Byte7W::new(self, 8)
     }
 }
-#[doc = "CAN Frame Data Word 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data3_cmb13::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data3_cmb13::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Data Word 3\n\nYou can [`read`](crate::Reg::read) this register and get [`data3_cmb13::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data3_cmb13::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Data3Cmb13Spec;
 impl crate::RegisterSpec for Data3Cmb13Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/data3_cmb14.rs b/va416xx/src/can0/data3_cmb14.rs
index 446f136..28ceaaf 100644
--- a/va416xx/src/can0/data3_cmb14.rs
+++ b/va416xx/src/can0/data3_cmb14.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Data Byte 8"]
     #[inline(always)]
-    #[must_use]
     pub fn byte8(&mut self) -> Byte8W<Data3Cmb14Spec> {
         Byte8W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Data Byte 7"]
     #[inline(always)]
-    #[must_use]
     pub fn byte7(&mut self) -> Byte7W<Data3Cmb14Spec> {
         Byte7W::new(self, 8)
     }
 }
-#[doc = "CAN Frame Data Word 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data3_cmb14::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data3_cmb14::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Data Word 3\n\nYou can [`read`](crate::Reg::read) this register and get [`data3_cmb14::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data3_cmb14::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Data3Cmb14Spec;
 impl crate::RegisterSpec for Data3Cmb14Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/data3_cmb2.rs b/va416xx/src/can0/data3_cmb2.rs
index 780bd99..db96e7d 100644
--- a/va416xx/src/can0/data3_cmb2.rs
+++ b/va416xx/src/can0/data3_cmb2.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Data Byte 8"]
     #[inline(always)]
-    #[must_use]
     pub fn byte8(&mut self) -> Byte8W<Data3Cmb2Spec> {
         Byte8W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Data Byte 7"]
     #[inline(always)]
-    #[must_use]
     pub fn byte7(&mut self) -> Byte7W<Data3Cmb2Spec> {
         Byte7W::new(self, 8)
     }
 }
-#[doc = "CAN Frame Data Word 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data3_cmb2::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data3_cmb2::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Data Word 3\n\nYou can [`read`](crate::Reg::read) this register and get [`data3_cmb2::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data3_cmb2::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Data3Cmb2Spec;
 impl crate::RegisterSpec for Data3Cmb2Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/data3_cmb3.rs b/va416xx/src/can0/data3_cmb3.rs
index 7d4a05b..222944f 100644
--- a/va416xx/src/can0/data3_cmb3.rs
+++ b/va416xx/src/can0/data3_cmb3.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Data Byte 8"]
     #[inline(always)]
-    #[must_use]
     pub fn byte8(&mut self) -> Byte8W<Data3Cmb3Spec> {
         Byte8W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Data Byte 7"]
     #[inline(always)]
-    #[must_use]
     pub fn byte7(&mut self) -> Byte7W<Data3Cmb3Spec> {
         Byte7W::new(self, 8)
     }
 }
-#[doc = "CAN Frame Data Word 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data3_cmb3::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data3_cmb3::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Data Word 3\n\nYou can [`read`](crate::Reg::read) this register and get [`data3_cmb3::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data3_cmb3::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Data3Cmb3Spec;
 impl crate::RegisterSpec for Data3Cmb3Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/data3_cmb4.rs b/va416xx/src/can0/data3_cmb4.rs
index 8b09d6b..20426a1 100644
--- a/va416xx/src/can0/data3_cmb4.rs
+++ b/va416xx/src/can0/data3_cmb4.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Data Byte 8"]
     #[inline(always)]
-    #[must_use]
     pub fn byte8(&mut self) -> Byte8W<Data3Cmb4Spec> {
         Byte8W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Data Byte 7"]
     #[inline(always)]
-    #[must_use]
     pub fn byte7(&mut self) -> Byte7W<Data3Cmb4Spec> {
         Byte7W::new(self, 8)
     }
 }
-#[doc = "CAN Frame Data Word 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data3_cmb4::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data3_cmb4::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Data Word 3\n\nYou can [`read`](crate::Reg::read) this register and get [`data3_cmb4::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data3_cmb4::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Data3Cmb4Spec;
 impl crate::RegisterSpec for Data3Cmb4Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/data3_cmb5.rs b/va416xx/src/can0/data3_cmb5.rs
index b686f5b..f7d95cf 100644
--- a/va416xx/src/can0/data3_cmb5.rs
+++ b/va416xx/src/can0/data3_cmb5.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Data Byte 8"]
     #[inline(always)]
-    #[must_use]
     pub fn byte8(&mut self) -> Byte8W<Data3Cmb5Spec> {
         Byte8W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Data Byte 7"]
     #[inline(always)]
-    #[must_use]
     pub fn byte7(&mut self) -> Byte7W<Data3Cmb5Spec> {
         Byte7W::new(self, 8)
     }
 }
-#[doc = "CAN Frame Data Word 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data3_cmb5::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data3_cmb5::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Data Word 3\n\nYou can [`read`](crate::Reg::read) this register and get [`data3_cmb5::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data3_cmb5::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Data3Cmb5Spec;
 impl crate::RegisterSpec for Data3Cmb5Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/data3_cmb6.rs b/va416xx/src/can0/data3_cmb6.rs
index 6cfb1b7..bcb64df 100644
--- a/va416xx/src/can0/data3_cmb6.rs
+++ b/va416xx/src/can0/data3_cmb6.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Data Byte 8"]
     #[inline(always)]
-    #[must_use]
     pub fn byte8(&mut self) -> Byte8W<Data3Cmb6Spec> {
         Byte8W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Data Byte 7"]
     #[inline(always)]
-    #[must_use]
     pub fn byte7(&mut self) -> Byte7W<Data3Cmb6Spec> {
         Byte7W::new(self, 8)
     }
 }
-#[doc = "CAN Frame Data Word 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data3_cmb6::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data3_cmb6::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Data Word 3\n\nYou can [`read`](crate::Reg::read) this register and get [`data3_cmb6::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data3_cmb6::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Data3Cmb6Spec;
 impl crate::RegisterSpec for Data3Cmb6Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/data3_cmb7.rs b/va416xx/src/can0/data3_cmb7.rs
index 2b594bf..2ef738f 100644
--- a/va416xx/src/can0/data3_cmb7.rs
+++ b/va416xx/src/can0/data3_cmb7.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Data Byte 8"]
     #[inline(always)]
-    #[must_use]
     pub fn byte8(&mut self) -> Byte8W<Data3Cmb7Spec> {
         Byte8W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Data Byte 7"]
     #[inline(always)]
-    #[must_use]
     pub fn byte7(&mut self) -> Byte7W<Data3Cmb7Spec> {
         Byte7W::new(self, 8)
     }
 }
-#[doc = "CAN Frame Data Word 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data3_cmb7::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data3_cmb7::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Data Word 3\n\nYou can [`read`](crate::Reg::read) this register and get [`data3_cmb7::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data3_cmb7::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Data3Cmb7Spec;
 impl crate::RegisterSpec for Data3Cmb7Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/data3_cmb8.rs b/va416xx/src/can0/data3_cmb8.rs
index c2e0ecc..92b5bce 100644
--- a/va416xx/src/can0/data3_cmb8.rs
+++ b/va416xx/src/can0/data3_cmb8.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Data Byte 8"]
     #[inline(always)]
-    #[must_use]
     pub fn byte8(&mut self) -> Byte8W<Data3Cmb8Spec> {
         Byte8W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Data Byte 7"]
     #[inline(always)]
-    #[must_use]
     pub fn byte7(&mut self) -> Byte7W<Data3Cmb8Spec> {
         Byte7W::new(self, 8)
     }
 }
-#[doc = "CAN Frame Data Word 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data3_cmb8::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data3_cmb8::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Data Word 3\n\nYou can [`read`](crate::Reg::read) this register and get [`data3_cmb8::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data3_cmb8::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Data3Cmb8Spec;
 impl crate::RegisterSpec for Data3Cmb8Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/data3_cmb9.rs b/va416xx/src/can0/data3_cmb9.rs
index 716ae39..bb9de5a 100644
--- a/va416xx/src/can0/data3_cmb9.rs
+++ b/va416xx/src/can0/data3_cmb9.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Data Byte 8"]
     #[inline(always)]
-    #[must_use]
     pub fn byte8(&mut self) -> Byte8W<Data3Cmb9Spec> {
         Byte8W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Data Byte 7"]
     #[inline(always)]
-    #[must_use]
     pub fn byte7(&mut self) -> Byte7W<Data3Cmb9Spec> {
         Byte7W::new(self, 8)
     }
 }
-#[doc = "CAN Frame Data Word 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data3_cmb9::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data3_cmb9::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Data Word 3\n\nYou can [`read`](crate::Reg::read) this register and get [`data3_cmb9::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data3_cmb9::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Data3Cmb9Spec;
 impl crate::RegisterSpec for Data3Cmb9Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/data3_hcmb.rs b/va416xx/src/can0/data3_hcmb.rs
index 856e651..a8a3f31 100644
--- a/va416xx/src/can0/data3_hcmb.rs
+++ b/va416xx/src/can0/data3_hcmb.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Data Byte 8"]
     #[inline(always)]
-    #[must_use]
     pub fn byte8(&mut self) -> Byte8W<Data3HcmbSpec> {
         Byte8W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Data Byte 7"]
     #[inline(always)]
-    #[must_use]
     pub fn byte7(&mut self) -> Byte7W<Data3HcmbSpec> {
         Byte7W::new(self, 8)
     }
 }
-#[doc = "CAN Frame Data Word 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data3_hcmb::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data3_hcmb::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Data Word 3\n\nYou can [`read`](crate::Reg::read) this register and get [`data3_hcmb::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data3_hcmb::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Data3HcmbSpec;
 impl crate::RegisterSpec for Data3HcmbSpec {
     type Ux = u32;
diff --git a/va416xx/src/can0/gmskb.rs b/va416xx/src/can0/gmskb.rs
index aa511c5..5bfde8a 100644
--- a/va416xx/src/can0/gmskb.rs
+++ b/va416xx/src/can0/gmskb.rs
@@ -60,19 +60,16 @@ impl W {
 - Unused in standard, ID\\[17:15\\]
 in extended"]
     #[inline(always)]
-    #[must_use]
     pub fn gm0(&mut self) -> Gm0W<GmskbSpec> {
         Gm0W::new(self, 0)
     }
     #[doc = "Bit 3 - Identifier Extension Bit"]
     #[inline(always)]
-    #[must_use]
     pub fn ide(&mut self) -> IdeW<GmskbSpec> {
         IdeW::new(self, 3)
     }
     #[doc = "Bit 4 - Remote Transmission Request in Standard, Substitute Remote Request (SRR) in extended"]
     #[inline(always)]
-    #[must_use]
     pub fn rtr(&mut self) -> RtrW<GmskbSpec> {
         RtrW::new(self, 4)
     }
@@ -81,12 +78,11 @@ in extended"]
 in standard, ID\\[28:18\\]
 in extended"]
     #[inline(always)]
-    #[must_use]
     pub fn gm1(&mut self) -> Gm1W<GmskbSpec> {
         Gm1W::new(self, 5)
     }
 }
-#[doc = "CAN Global Mask Base\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gmskb::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gmskb::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Global Mask Base\n\nYou can [`read`](crate::Reg::read) this register and get [`gmskb::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gmskb::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct GmskbSpec;
 impl crate::RegisterSpec for GmskbSpec {
     type Ux = u32;
diff --git a/va416xx/src/can0/gmskx.rs b/va416xx/src/can0/gmskx.rs
index 073346a..4539ddc 100644
--- a/va416xx/src/can0/gmskx.rs
+++ b/va416xx/src/can0/gmskx.rs
@@ -31,7 +31,6 @@ in extended, unused standard"]
 impl W {
     #[doc = "Bit 0 - Extended Remote transmission Request Bit"]
     #[inline(always)]
-    #[must_use]
     pub fn xrtr(&mut self) -> XrtrW<GmskxSpec> {
         XrtrW::new(self, 0)
     }
@@ -39,12 +38,11 @@ impl W {
 used when an extended frame is received. ID\\[14:0\\]
 in extended, unused standard"]
     #[inline(always)]
-    #[must_use]
     pub fn gm(&mut self) -> GmW<GmskxSpec> {
         GmW::new(self, 1)
     }
 }
-#[doc = "CAN Global Mask Extension\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gmskx::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gmskx::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Global Mask Extension\n\nYou can [`read`](crate::Reg::read) this register and get [`gmskx::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gmskx::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct GmskxSpec;
 impl crate::RegisterSpec for GmskxSpec {
     type Ux = u32;
diff --git a/va416xx/src/can0/id0_cmb0.rs b/va416xx/src/can0/id0_cmb0.rs
index 23d87ab..dbb37df 100644
--- a/va416xx/src/can0/id0_cmb0.rs
+++ b/va416xx/src/can0/id0_cmb0.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"]
     #[inline(always)]
-    #[must_use]
     pub fn id0(&mut self) -> Id0W<Id0Cmb0Spec> {
         Id0W::new(self, 0)
     }
 }
-#[doc = "CAN Frame Identifier Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id0_cmb0::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id0_cmb0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Identifier Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`id0_cmb0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id0_cmb0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Id0Cmb0Spec;
 impl crate::RegisterSpec for Id0Cmb0Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/id0_cmb1.rs b/va416xx/src/can0/id0_cmb1.rs
index 5cc65f9..18c72d5 100644
--- a/va416xx/src/can0/id0_cmb1.rs
+++ b/va416xx/src/can0/id0_cmb1.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"]
     #[inline(always)]
-    #[must_use]
     pub fn id0(&mut self) -> Id0W<Id0Cmb1Spec> {
         Id0W::new(self, 0)
     }
 }
-#[doc = "CAN Frame Identifier Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id0_cmb1::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id0_cmb1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Identifier Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`id0_cmb1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id0_cmb1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Id0Cmb1Spec;
 impl crate::RegisterSpec for Id0Cmb1Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/id0_cmb10.rs b/va416xx/src/can0/id0_cmb10.rs
index b62d30a..7ac6e66 100644
--- a/va416xx/src/can0/id0_cmb10.rs
+++ b/va416xx/src/can0/id0_cmb10.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"]
     #[inline(always)]
-    #[must_use]
     pub fn id0(&mut self) -> Id0W<Id0Cmb10Spec> {
         Id0W::new(self, 0)
     }
 }
-#[doc = "CAN Frame Identifier Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id0_cmb10::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id0_cmb10::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Identifier Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`id0_cmb10::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id0_cmb10::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Id0Cmb10Spec;
 impl crate::RegisterSpec for Id0Cmb10Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/id0_cmb11.rs b/va416xx/src/can0/id0_cmb11.rs
index 4f27d5a..a8e1eef 100644
--- a/va416xx/src/can0/id0_cmb11.rs
+++ b/va416xx/src/can0/id0_cmb11.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"]
     #[inline(always)]
-    #[must_use]
     pub fn id0(&mut self) -> Id0W<Id0Cmb11Spec> {
         Id0W::new(self, 0)
     }
 }
-#[doc = "CAN Frame Identifier Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id0_cmb11::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id0_cmb11::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Identifier Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`id0_cmb11::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id0_cmb11::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Id0Cmb11Spec;
 impl crate::RegisterSpec for Id0Cmb11Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/id0_cmb12.rs b/va416xx/src/can0/id0_cmb12.rs
index af7eeee..d7db4da 100644
--- a/va416xx/src/can0/id0_cmb12.rs
+++ b/va416xx/src/can0/id0_cmb12.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"]
     #[inline(always)]
-    #[must_use]
     pub fn id0(&mut self) -> Id0W<Id0Cmb12Spec> {
         Id0W::new(self, 0)
     }
 }
-#[doc = "CAN Frame Identifier Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id0_cmb12::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id0_cmb12::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Identifier Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`id0_cmb12::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id0_cmb12::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Id0Cmb12Spec;
 impl crate::RegisterSpec for Id0Cmb12Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/id0_cmb13.rs b/va416xx/src/can0/id0_cmb13.rs
index 5d01253..3410691 100644
--- a/va416xx/src/can0/id0_cmb13.rs
+++ b/va416xx/src/can0/id0_cmb13.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"]
     #[inline(always)]
-    #[must_use]
     pub fn id0(&mut self) -> Id0W<Id0Cmb13Spec> {
         Id0W::new(self, 0)
     }
 }
-#[doc = "CAN Frame Identifier Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id0_cmb13::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id0_cmb13::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Identifier Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`id0_cmb13::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id0_cmb13::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Id0Cmb13Spec;
 impl crate::RegisterSpec for Id0Cmb13Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/id0_cmb14.rs b/va416xx/src/can0/id0_cmb14.rs
index e9a71e1..45b5097 100644
--- a/va416xx/src/can0/id0_cmb14.rs
+++ b/va416xx/src/can0/id0_cmb14.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"]
     #[inline(always)]
-    #[must_use]
     pub fn id0(&mut self) -> Id0W<Id0Cmb14Spec> {
         Id0W::new(self, 0)
     }
 }
-#[doc = "CAN Frame Identifier Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id0_cmb14::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id0_cmb14::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Identifier Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`id0_cmb14::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id0_cmb14::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Id0Cmb14Spec;
 impl crate::RegisterSpec for Id0Cmb14Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/id0_cmb2.rs b/va416xx/src/can0/id0_cmb2.rs
index 0ed74fe..122cea0 100644
--- a/va416xx/src/can0/id0_cmb2.rs
+++ b/va416xx/src/can0/id0_cmb2.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"]
     #[inline(always)]
-    #[must_use]
     pub fn id0(&mut self) -> Id0W<Id0Cmb2Spec> {
         Id0W::new(self, 0)
     }
 }
-#[doc = "CAN Frame Identifier Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id0_cmb2::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id0_cmb2::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Identifier Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`id0_cmb2::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id0_cmb2::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Id0Cmb2Spec;
 impl crate::RegisterSpec for Id0Cmb2Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/id0_cmb3.rs b/va416xx/src/can0/id0_cmb3.rs
index ac8a485..c8e2ba5 100644
--- a/va416xx/src/can0/id0_cmb3.rs
+++ b/va416xx/src/can0/id0_cmb3.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"]
     #[inline(always)]
-    #[must_use]
     pub fn id0(&mut self) -> Id0W<Id0Cmb3Spec> {
         Id0W::new(self, 0)
     }
 }
-#[doc = "CAN Frame Identifier Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id0_cmb3::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id0_cmb3::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Identifier Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`id0_cmb3::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id0_cmb3::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Id0Cmb3Spec;
 impl crate::RegisterSpec for Id0Cmb3Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/id0_cmb4.rs b/va416xx/src/can0/id0_cmb4.rs
index 2bddfff..4173c46 100644
--- a/va416xx/src/can0/id0_cmb4.rs
+++ b/va416xx/src/can0/id0_cmb4.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"]
     #[inline(always)]
-    #[must_use]
     pub fn id0(&mut self) -> Id0W<Id0Cmb4Spec> {
         Id0W::new(self, 0)
     }
 }
-#[doc = "CAN Frame Identifier Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id0_cmb4::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id0_cmb4::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Identifier Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`id0_cmb4::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id0_cmb4::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Id0Cmb4Spec;
 impl crate::RegisterSpec for Id0Cmb4Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/id0_cmb5.rs b/va416xx/src/can0/id0_cmb5.rs
index cd231e9..224dbcd 100644
--- a/va416xx/src/can0/id0_cmb5.rs
+++ b/va416xx/src/can0/id0_cmb5.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"]
     #[inline(always)]
-    #[must_use]
     pub fn id0(&mut self) -> Id0W<Id0Cmb5Spec> {
         Id0W::new(self, 0)
     }
 }
-#[doc = "CAN Frame Identifier Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id0_cmb5::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id0_cmb5::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Identifier Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`id0_cmb5::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id0_cmb5::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Id0Cmb5Spec;
 impl crate::RegisterSpec for Id0Cmb5Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/id0_cmb6.rs b/va416xx/src/can0/id0_cmb6.rs
index 68a4c87..c5a3e89 100644
--- a/va416xx/src/can0/id0_cmb6.rs
+++ b/va416xx/src/can0/id0_cmb6.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"]
     #[inline(always)]
-    #[must_use]
     pub fn id0(&mut self) -> Id0W<Id0Cmb6Spec> {
         Id0W::new(self, 0)
     }
 }
-#[doc = "CAN Frame Identifier Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id0_cmb6::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id0_cmb6::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Identifier Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`id0_cmb6::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id0_cmb6::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Id0Cmb6Spec;
 impl crate::RegisterSpec for Id0Cmb6Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/id0_cmb7.rs b/va416xx/src/can0/id0_cmb7.rs
index 4fe879e..7269bac 100644
--- a/va416xx/src/can0/id0_cmb7.rs
+++ b/va416xx/src/can0/id0_cmb7.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"]
     #[inline(always)]
-    #[must_use]
     pub fn id0(&mut self) -> Id0W<Id0Cmb7Spec> {
         Id0W::new(self, 0)
     }
 }
-#[doc = "CAN Frame Identifier Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id0_cmb7::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id0_cmb7::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Identifier Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`id0_cmb7::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id0_cmb7::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Id0Cmb7Spec;
 impl crate::RegisterSpec for Id0Cmb7Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/id0_cmb8.rs b/va416xx/src/can0/id0_cmb8.rs
index 728ae98..1630acf 100644
--- a/va416xx/src/can0/id0_cmb8.rs
+++ b/va416xx/src/can0/id0_cmb8.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"]
     #[inline(always)]
-    #[must_use]
     pub fn id0(&mut self) -> Id0W<Id0Cmb8Spec> {
         Id0W::new(self, 0)
     }
 }
-#[doc = "CAN Frame Identifier Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id0_cmb8::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id0_cmb8::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Identifier Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`id0_cmb8::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id0_cmb8::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Id0Cmb8Spec;
 impl crate::RegisterSpec for Id0Cmb8Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/id0_cmb9.rs b/va416xx/src/can0/id0_cmb9.rs
index cf74967..f0c0bf2 100644
--- a/va416xx/src/can0/id0_cmb9.rs
+++ b/va416xx/src/can0/id0_cmb9.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"]
     #[inline(always)]
-    #[must_use]
     pub fn id0(&mut self) -> Id0W<Id0Cmb9Spec> {
         Id0W::new(self, 0)
     }
 }
-#[doc = "CAN Frame Identifier Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id0_cmb9::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id0_cmb9::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Identifier Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`id0_cmb9::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id0_cmb9::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Id0Cmb9Spec;
 impl crate::RegisterSpec for Id0Cmb9Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/id0_hcmb.rs b/va416xx/src/can0/id0_hcmb.rs
index 23cf589..a1d3853 100644
--- a/va416xx/src/can0/id0_hcmb.rs
+++ b/va416xx/src/can0/id0_hcmb.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"]
     #[inline(always)]
-    #[must_use]
     pub fn id0(&mut self) -> Id0W<Id0HcmbSpec> {
         Id0W::new(self, 0)
     }
 }
-#[doc = "CAN Frame Identifier Word 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id0_hcmb::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id0_hcmb::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Identifier Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`id0_hcmb::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id0_hcmb::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Id0HcmbSpec;
 impl crate::RegisterSpec for Id0HcmbSpec {
     type Ux = u32;
diff --git a/va416xx/src/can0/id1_cmb0.rs b/va416xx/src/can0/id1_cmb0.rs
index ffa77ae..8d7c286 100644
--- a/va416xx/src/can0/id1_cmb0.rs
+++ b/va416xx/src/can0/id1_cmb0.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"]
     #[inline(always)]
-    #[must_use]
     pub fn id1(&mut self) -> Id1W<Id1Cmb0Spec> {
         Id1W::new(self, 0)
     }
 }
-#[doc = "CAN Frame Identifier Word 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id1_cmb0::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id1_cmb0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Identifier Word 1\n\nYou can [`read`](crate::Reg::read) this register and get [`id1_cmb0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id1_cmb0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Id1Cmb0Spec;
 impl crate::RegisterSpec for Id1Cmb0Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/id1_cmb1.rs b/va416xx/src/can0/id1_cmb1.rs
index 0e38078..9012a7d 100644
--- a/va416xx/src/can0/id1_cmb1.rs
+++ b/va416xx/src/can0/id1_cmb1.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"]
     #[inline(always)]
-    #[must_use]
     pub fn id1(&mut self) -> Id1W<Id1Cmb1Spec> {
         Id1W::new(self, 0)
     }
 }
-#[doc = "CAN Frame Identifier Word 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id1_cmb1::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id1_cmb1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Identifier Word 1\n\nYou can [`read`](crate::Reg::read) this register and get [`id1_cmb1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id1_cmb1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Id1Cmb1Spec;
 impl crate::RegisterSpec for Id1Cmb1Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/id1_cmb10.rs b/va416xx/src/can0/id1_cmb10.rs
index 6818e63..fb5e002 100644
--- a/va416xx/src/can0/id1_cmb10.rs
+++ b/va416xx/src/can0/id1_cmb10.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"]
     #[inline(always)]
-    #[must_use]
     pub fn id1(&mut self) -> Id1W<Id1Cmb10Spec> {
         Id1W::new(self, 0)
     }
 }
-#[doc = "CAN Frame Identifier Word 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id1_cmb10::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id1_cmb10::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Identifier Word 1\n\nYou can [`read`](crate::Reg::read) this register and get [`id1_cmb10::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id1_cmb10::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Id1Cmb10Spec;
 impl crate::RegisterSpec for Id1Cmb10Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/id1_cmb11.rs b/va416xx/src/can0/id1_cmb11.rs
index 09163cf..9cb19c8 100644
--- a/va416xx/src/can0/id1_cmb11.rs
+++ b/va416xx/src/can0/id1_cmb11.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"]
     #[inline(always)]
-    #[must_use]
     pub fn id1(&mut self) -> Id1W<Id1Cmb11Spec> {
         Id1W::new(self, 0)
     }
 }
-#[doc = "CAN Frame Identifier Word 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id1_cmb11::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id1_cmb11::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Identifier Word 1\n\nYou can [`read`](crate::Reg::read) this register and get [`id1_cmb11::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id1_cmb11::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Id1Cmb11Spec;
 impl crate::RegisterSpec for Id1Cmb11Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/id1_cmb12.rs b/va416xx/src/can0/id1_cmb12.rs
index 39a5596..8063adf 100644
--- a/va416xx/src/can0/id1_cmb12.rs
+++ b/va416xx/src/can0/id1_cmb12.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"]
     #[inline(always)]
-    #[must_use]
     pub fn id1(&mut self) -> Id1W<Id1Cmb12Spec> {
         Id1W::new(self, 0)
     }
 }
-#[doc = "CAN Frame Identifier Word 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id1_cmb12::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id1_cmb12::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Identifier Word 1\n\nYou can [`read`](crate::Reg::read) this register and get [`id1_cmb12::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id1_cmb12::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Id1Cmb12Spec;
 impl crate::RegisterSpec for Id1Cmb12Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/id1_cmb13.rs b/va416xx/src/can0/id1_cmb13.rs
index 6bba934..3da5dcc 100644
--- a/va416xx/src/can0/id1_cmb13.rs
+++ b/va416xx/src/can0/id1_cmb13.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"]
     #[inline(always)]
-    #[must_use]
     pub fn id1(&mut self) -> Id1W<Id1Cmb13Spec> {
         Id1W::new(self, 0)
     }
 }
-#[doc = "CAN Frame Identifier Word 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id1_cmb13::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id1_cmb13::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Identifier Word 1\n\nYou can [`read`](crate::Reg::read) this register and get [`id1_cmb13::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id1_cmb13::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Id1Cmb13Spec;
 impl crate::RegisterSpec for Id1Cmb13Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/id1_cmb14.rs b/va416xx/src/can0/id1_cmb14.rs
index 547d7b3..c99a82a 100644
--- a/va416xx/src/can0/id1_cmb14.rs
+++ b/va416xx/src/can0/id1_cmb14.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"]
     #[inline(always)]
-    #[must_use]
     pub fn id1(&mut self) -> Id1W<Id1Cmb14Spec> {
         Id1W::new(self, 0)
     }
 }
-#[doc = "CAN Frame Identifier Word 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id1_cmb14::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id1_cmb14::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Identifier Word 1\n\nYou can [`read`](crate::Reg::read) this register and get [`id1_cmb14::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id1_cmb14::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Id1Cmb14Spec;
 impl crate::RegisterSpec for Id1Cmb14Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/id1_cmb2.rs b/va416xx/src/can0/id1_cmb2.rs
index 502124b..39442a6 100644
--- a/va416xx/src/can0/id1_cmb2.rs
+++ b/va416xx/src/can0/id1_cmb2.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"]
     #[inline(always)]
-    #[must_use]
     pub fn id1(&mut self) -> Id1W<Id1Cmb2Spec> {
         Id1W::new(self, 0)
     }
 }
-#[doc = "CAN Frame Identifier Word 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id1_cmb2::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id1_cmb2::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Identifier Word 1\n\nYou can [`read`](crate::Reg::read) this register and get [`id1_cmb2::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id1_cmb2::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Id1Cmb2Spec;
 impl crate::RegisterSpec for Id1Cmb2Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/id1_cmb3.rs b/va416xx/src/can0/id1_cmb3.rs
index 318cf16..2fa5ebd 100644
--- a/va416xx/src/can0/id1_cmb3.rs
+++ b/va416xx/src/can0/id1_cmb3.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"]
     #[inline(always)]
-    #[must_use]
     pub fn id1(&mut self) -> Id1W<Id1Cmb3Spec> {
         Id1W::new(self, 0)
     }
 }
-#[doc = "CAN Frame Identifier Word 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id1_cmb3::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id1_cmb3::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Identifier Word 1\n\nYou can [`read`](crate::Reg::read) this register and get [`id1_cmb3::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id1_cmb3::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Id1Cmb3Spec;
 impl crate::RegisterSpec for Id1Cmb3Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/id1_cmb4.rs b/va416xx/src/can0/id1_cmb4.rs
index cc20409..2a031a8 100644
--- a/va416xx/src/can0/id1_cmb4.rs
+++ b/va416xx/src/can0/id1_cmb4.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"]
     #[inline(always)]
-    #[must_use]
     pub fn id1(&mut self) -> Id1W<Id1Cmb4Spec> {
         Id1W::new(self, 0)
     }
 }
-#[doc = "CAN Frame Identifier Word 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id1_cmb4::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id1_cmb4::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Identifier Word 1\n\nYou can [`read`](crate::Reg::read) this register and get [`id1_cmb4::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id1_cmb4::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Id1Cmb4Spec;
 impl crate::RegisterSpec for Id1Cmb4Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/id1_cmb5.rs b/va416xx/src/can0/id1_cmb5.rs
index bc9f997..515221e 100644
--- a/va416xx/src/can0/id1_cmb5.rs
+++ b/va416xx/src/can0/id1_cmb5.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"]
     #[inline(always)]
-    #[must_use]
     pub fn id1(&mut self) -> Id1W<Id1Cmb5Spec> {
         Id1W::new(self, 0)
     }
 }
-#[doc = "CAN Frame Identifier Word 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id1_cmb5::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id1_cmb5::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Identifier Word 1\n\nYou can [`read`](crate::Reg::read) this register and get [`id1_cmb5::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id1_cmb5::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Id1Cmb5Spec;
 impl crate::RegisterSpec for Id1Cmb5Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/id1_cmb6.rs b/va416xx/src/can0/id1_cmb6.rs
index 4a7f601..b17df28 100644
--- a/va416xx/src/can0/id1_cmb6.rs
+++ b/va416xx/src/can0/id1_cmb6.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"]
     #[inline(always)]
-    #[must_use]
     pub fn id1(&mut self) -> Id1W<Id1Cmb6Spec> {
         Id1W::new(self, 0)
     }
 }
-#[doc = "CAN Frame Identifier Word 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id1_cmb6::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id1_cmb6::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Identifier Word 1\n\nYou can [`read`](crate::Reg::read) this register and get [`id1_cmb6::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id1_cmb6::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Id1Cmb6Spec;
 impl crate::RegisterSpec for Id1Cmb6Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/id1_cmb7.rs b/va416xx/src/can0/id1_cmb7.rs
index 0f96f36..7989a30 100644
--- a/va416xx/src/can0/id1_cmb7.rs
+++ b/va416xx/src/can0/id1_cmb7.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"]
     #[inline(always)]
-    #[must_use]
     pub fn id1(&mut self) -> Id1W<Id1Cmb7Spec> {
         Id1W::new(self, 0)
     }
 }
-#[doc = "CAN Frame Identifier Word 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id1_cmb7::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id1_cmb7::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Identifier Word 1\n\nYou can [`read`](crate::Reg::read) this register and get [`id1_cmb7::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id1_cmb7::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Id1Cmb7Spec;
 impl crate::RegisterSpec for Id1Cmb7Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/id1_cmb8.rs b/va416xx/src/can0/id1_cmb8.rs
index e6d7ad6..27fd373 100644
--- a/va416xx/src/can0/id1_cmb8.rs
+++ b/va416xx/src/can0/id1_cmb8.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"]
     #[inline(always)]
-    #[must_use]
     pub fn id1(&mut self) -> Id1W<Id1Cmb8Spec> {
         Id1W::new(self, 0)
     }
 }
-#[doc = "CAN Frame Identifier Word 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id1_cmb8::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id1_cmb8::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Identifier Word 1\n\nYou can [`read`](crate::Reg::read) this register and get [`id1_cmb8::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id1_cmb8::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Id1Cmb8Spec;
 impl crate::RegisterSpec for Id1Cmb8Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/id1_cmb9.rs b/va416xx/src/can0/id1_cmb9.rs
index 2a9a3d4..f93dc84 100644
--- a/va416xx/src/can0/id1_cmb9.rs
+++ b/va416xx/src/can0/id1_cmb9.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"]
     #[inline(always)]
-    #[must_use]
     pub fn id1(&mut self) -> Id1W<Id1Cmb9Spec> {
         Id1W::new(self, 0)
     }
 }
-#[doc = "CAN Frame Identifier Word 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id1_cmb9::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id1_cmb9::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Identifier Word 1\n\nYou can [`read`](crate::Reg::read) this register and get [`id1_cmb9::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id1_cmb9::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Id1Cmb9Spec;
 impl crate::RegisterSpec for Id1Cmb9Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/id1_hcmb.rs b/va416xx/src/can0/id1_hcmb.rs
index ba61e23..bf2f112 100644
--- a/va416xx/src/can0/id1_hcmb.rs
+++ b/va416xx/src/can0/id1_hcmb.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"]
     #[inline(always)]
-    #[must_use]
     pub fn id1(&mut self) -> Id1W<Id1HcmbSpec> {
         Id1W::new(self, 0)
     }
 }
-#[doc = "CAN Frame Identifier Word 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id1_hcmb::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`id1_hcmb::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Identifier Word 1\n\nYou can [`read`](crate::Reg::read) this register and get [`id1_hcmb::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id1_hcmb::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Id1HcmbSpec;
 impl crate::RegisterSpec for Id1HcmbSpec {
     type Ux = u32;
diff --git a/va416xx/src/can0/tstp_cmb0.rs b/va416xx/src/can0/tstp_cmb0.rs
index eeccb9a..62ac56b 100644
--- a/va416xx/src/can0/tstp_cmb0.rs
+++ b/va416xx/src/can0/tstp_cmb0.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - Timestamp"]
     #[inline(always)]
-    #[must_use]
     pub fn timestamp(&mut self) -> TimestampW<TstpCmb0Spec> {
         TimestampW::new(self, 0)
     }
 }
-#[doc = "CAN Frame Timestamp\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tstp_cmb0::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tstp_cmb0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Timestamp\n\nYou can [`read`](crate::Reg::read) this register and get [`tstp_cmb0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tstp_cmb0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct TstpCmb0Spec;
 impl crate::RegisterSpec for TstpCmb0Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/tstp_cmb1.rs b/va416xx/src/can0/tstp_cmb1.rs
index 30d5381..b18d05e 100644
--- a/va416xx/src/can0/tstp_cmb1.rs
+++ b/va416xx/src/can0/tstp_cmb1.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - Timestamp"]
     #[inline(always)]
-    #[must_use]
     pub fn timestamp(&mut self) -> TimestampW<TstpCmb1Spec> {
         TimestampW::new(self, 0)
     }
 }
-#[doc = "CAN Frame Timestamp\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tstp_cmb1::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tstp_cmb1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Timestamp\n\nYou can [`read`](crate::Reg::read) this register and get [`tstp_cmb1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tstp_cmb1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct TstpCmb1Spec;
 impl crate::RegisterSpec for TstpCmb1Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/tstp_cmb10.rs b/va416xx/src/can0/tstp_cmb10.rs
index eb337d0..23427e4 100644
--- a/va416xx/src/can0/tstp_cmb10.rs
+++ b/va416xx/src/can0/tstp_cmb10.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - Timestamp"]
     #[inline(always)]
-    #[must_use]
     pub fn timestamp(&mut self) -> TimestampW<TstpCmb10Spec> {
         TimestampW::new(self, 0)
     }
 }
-#[doc = "CAN Frame Timestamp\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tstp_cmb10::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tstp_cmb10::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Timestamp\n\nYou can [`read`](crate::Reg::read) this register and get [`tstp_cmb10::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tstp_cmb10::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct TstpCmb10Spec;
 impl crate::RegisterSpec for TstpCmb10Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/tstp_cmb11.rs b/va416xx/src/can0/tstp_cmb11.rs
index 75aee4e..42e5925 100644
--- a/va416xx/src/can0/tstp_cmb11.rs
+++ b/va416xx/src/can0/tstp_cmb11.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - Timestamp"]
     #[inline(always)]
-    #[must_use]
     pub fn timestamp(&mut self) -> TimestampW<TstpCmb11Spec> {
         TimestampW::new(self, 0)
     }
 }
-#[doc = "CAN Frame Timestamp\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tstp_cmb11::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tstp_cmb11::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Timestamp\n\nYou can [`read`](crate::Reg::read) this register and get [`tstp_cmb11::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tstp_cmb11::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct TstpCmb11Spec;
 impl crate::RegisterSpec for TstpCmb11Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/tstp_cmb12.rs b/va416xx/src/can0/tstp_cmb12.rs
index 80091b8..1cd6bca 100644
--- a/va416xx/src/can0/tstp_cmb12.rs
+++ b/va416xx/src/can0/tstp_cmb12.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - Timestamp"]
     #[inline(always)]
-    #[must_use]
     pub fn timestamp(&mut self) -> TimestampW<TstpCmb12Spec> {
         TimestampW::new(self, 0)
     }
 }
-#[doc = "CAN Frame Timestamp\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tstp_cmb12::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tstp_cmb12::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Timestamp\n\nYou can [`read`](crate::Reg::read) this register and get [`tstp_cmb12::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tstp_cmb12::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct TstpCmb12Spec;
 impl crate::RegisterSpec for TstpCmb12Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/tstp_cmb13.rs b/va416xx/src/can0/tstp_cmb13.rs
index 4974938..b6ed7f3 100644
--- a/va416xx/src/can0/tstp_cmb13.rs
+++ b/va416xx/src/can0/tstp_cmb13.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - Timestamp"]
     #[inline(always)]
-    #[must_use]
     pub fn timestamp(&mut self) -> TimestampW<TstpCmb13Spec> {
         TimestampW::new(self, 0)
     }
 }
-#[doc = "CAN Frame Timestamp\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tstp_cmb13::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tstp_cmb13::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Timestamp\n\nYou can [`read`](crate::Reg::read) this register and get [`tstp_cmb13::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tstp_cmb13::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct TstpCmb13Spec;
 impl crate::RegisterSpec for TstpCmb13Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/tstp_cmb14.rs b/va416xx/src/can0/tstp_cmb14.rs
index 29617e8..6532e66 100644
--- a/va416xx/src/can0/tstp_cmb14.rs
+++ b/va416xx/src/can0/tstp_cmb14.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - Timestamp"]
     #[inline(always)]
-    #[must_use]
     pub fn timestamp(&mut self) -> TimestampW<TstpCmb14Spec> {
         TimestampW::new(self, 0)
     }
 }
-#[doc = "CAN Frame Timestamp\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tstp_cmb14::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tstp_cmb14::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Timestamp\n\nYou can [`read`](crate::Reg::read) this register and get [`tstp_cmb14::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tstp_cmb14::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct TstpCmb14Spec;
 impl crate::RegisterSpec for TstpCmb14Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/tstp_cmb2.rs b/va416xx/src/can0/tstp_cmb2.rs
index a1693c4..4dcdbc1 100644
--- a/va416xx/src/can0/tstp_cmb2.rs
+++ b/va416xx/src/can0/tstp_cmb2.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - Timestamp"]
     #[inline(always)]
-    #[must_use]
     pub fn timestamp(&mut self) -> TimestampW<TstpCmb2Spec> {
         TimestampW::new(self, 0)
     }
 }
-#[doc = "CAN Frame Timestamp\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tstp_cmb2::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tstp_cmb2::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Timestamp\n\nYou can [`read`](crate::Reg::read) this register and get [`tstp_cmb2::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tstp_cmb2::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct TstpCmb2Spec;
 impl crate::RegisterSpec for TstpCmb2Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/tstp_cmb3.rs b/va416xx/src/can0/tstp_cmb3.rs
index a2be4b0..c02139a 100644
--- a/va416xx/src/can0/tstp_cmb3.rs
+++ b/va416xx/src/can0/tstp_cmb3.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - Timestamp"]
     #[inline(always)]
-    #[must_use]
     pub fn timestamp(&mut self) -> TimestampW<TstpCmb3Spec> {
         TimestampW::new(self, 0)
     }
 }
-#[doc = "CAN Frame Timestamp\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tstp_cmb3::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tstp_cmb3::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Timestamp\n\nYou can [`read`](crate::Reg::read) this register and get [`tstp_cmb3::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tstp_cmb3::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct TstpCmb3Spec;
 impl crate::RegisterSpec for TstpCmb3Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/tstp_cmb4.rs b/va416xx/src/can0/tstp_cmb4.rs
index 8ddf61c..45fdb1a 100644
--- a/va416xx/src/can0/tstp_cmb4.rs
+++ b/va416xx/src/can0/tstp_cmb4.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - Timestamp"]
     #[inline(always)]
-    #[must_use]
     pub fn timestamp(&mut self) -> TimestampW<TstpCmb4Spec> {
         TimestampW::new(self, 0)
     }
 }
-#[doc = "CAN Frame Timestamp\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tstp_cmb4::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tstp_cmb4::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Timestamp\n\nYou can [`read`](crate::Reg::read) this register and get [`tstp_cmb4::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tstp_cmb4::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct TstpCmb4Spec;
 impl crate::RegisterSpec for TstpCmb4Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/tstp_cmb5.rs b/va416xx/src/can0/tstp_cmb5.rs
index 5680928..23680ec 100644
--- a/va416xx/src/can0/tstp_cmb5.rs
+++ b/va416xx/src/can0/tstp_cmb5.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - Timestamp"]
     #[inline(always)]
-    #[must_use]
     pub fn timestamp(&mut self) -> TimestampW<TstpCmb5Spec> {
         TimestampW::new(self, 0)
     }
 }
-#[doc = "CAN Frame Timestamp\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tstp_cmb5::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tstp_cmb5::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Timestamp\n\nYou can [`read`](crate::Reg::read) this register and get [`tstp_cmb5::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tstp_cmb5::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct TstpCmb5Spec;
 impl crate::RegisterSpec for TstpCmb5Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/tstp_cmb6.rs b/va416xx/src/can0/tstp_cmb6.rs
index 3571ef6..3a0152e 100644
--- a/va416xx/src/can0/tstp_cmb6.rs
+++ b/va416xx/src/can0/tstp_cmb6.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - Timestamp"]
     #[inline(always)]
-    #[must_use]
     pub fn timestamp(&mut self) -> TimestampW<TstpCmb6Spec> {
         TimestampW::new(self, 0)
     }
 }
-#[doc = "CAN Frame Timestamp\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tstp_cmb6::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tstp_cmb6::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Timestamp\n\nYou can [`read`](crate::Reg::read) this register and get [`tstp_cmb6::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tstp_cmb6::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct TstpCmb6Spec;
 impl crate::RegisterSpec for TstpCmb6Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/tstp_cmb7.rs b/va416xx/src/can0/tstp_cmb7.rs
index ff7a103..fe06c7f 100644
--- a/va416xx/src/can0/tstp_cmb7.rs
+++ b/va416xx/src/can0/tstp_cmb7.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - Timestamp"]
     #[inline(always)]
-    #[must_use]
     pub fn timestamp(&mut self) -> TimestampW<TstpCmb7Spec> {
         TimestampW::new(self, 0)
     }
 }
-#[doc = "CAN Frame Timestamp\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tstp_cmb7::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tstp_cmb7::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Timestamp\n\nYou can [`read`](crate::Reg::read) this register and get [`tstp_cmb7::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tstp_cmb7::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct TstpCmb7Spec;
 impl crate::RegisterSpec for TstpCmb7Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/tstp_cmb8.rs b/va416xx/src/can0/tstp_cmb8.rs
index 45c0699..78a345f 100644
--- a/va416xx/src/can0/tstp_cmb8.rs
+++ b/va416xx/src/can0/tstp_cmb8.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - Timestamp"]
     #[inline(always)]
-    #[must_use]
     pub fn timestamp(&mut self) -> TimestampW<TstpCmb8Spec> {
         TimestampW::new(self, 0)
     }
 }
-#[doc = "CAN Frame Timestamp\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tstp_cmb8::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tstp_cmb8::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Timestamp\n\nYou can [`read`](crate::Reg::read) this register and get [`tstp_cmb8::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tstp_cmb8::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct TstpCmb8Spec;
 impl crate::RegisterSpec for TstpCmb8Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/tstp_cmb9.rs b/va416xx/src/can0/tstp_cmb9.rs
index c527458..622c5eb 100644
--- a/va416xx/src/can0/tstp_cmb9.rs
+++ b/va416xx/src/can0/tstp_cmb9.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - Timestamp"]
     #[inline(always)]
-    #[must_use]
     pub fn timestamp(&mut self) -> TimestampW<TstpCmb9Spec> {
         TimestampW::new(self, 0)
     }
 }
-#[doc = "CAN Frame Timestamp\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tstp_cmb9::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tstp_cmb9::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Timestamp\n\nYou can [`read`](crate::Reg::read) this register and get [`tstp_cmb9::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tstp_cmb9::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct TstpCmb9Spec;
 impl crate::RegisterSpec for TstpCmb9Spec {
     type Ux = u32;
diff --git a/va416xx/src/can0/tstp_hcmb.rs b/va416xx/src/can0/tstp_hcmb.rs
index 1629d2b..4552829 100644
--- a/va416xx/src/can0/tstp_hcmb.rs
+++ b/va416xx/src/can0/tstp_hcmb.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - Timestamp"]
     #[inline(always)]
-    #[must_use]
     pub fn timestamp(&mut self) -> TimestampW<TstpHcmbSpec> {
         TimestampW::new(self, 0)
     }
 }
-#[doc = "CAN Frame Timestamp\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tstp_hcmb::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tstp_hcmb::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CAN Frame Timestamp\n\nYou can [`read`](crate::Reg::read) this register and get [`tstp_hcmb::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tstp_hcmb::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct TstpHcmbSpec;
 impl crate::RegisterSpec for TstpHcmbSpec {
     type Ux = u32;
diff --git a/va416xx/src/clkgen.rs b/va416xx/src/clkgen.rs
index 1a6e589..890c7e1 100644
--- a/va416xx/src/clkgen.rs
+++ b/va416xx/src/clkgen.rs
@@ -22,19 +22,19 @@ impl RegisterBlock {
         &self.ctrl1
     }
 }
-#[doc = "CTRL0 (rw) register accessor: Clock Generation Module Control Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctrl0::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctrl0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl0`]
+#[doc = "CTRL0 (rw) register accessor: Clock Generation Module Control Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl0`]
 module"]
 #[doc(alias = "CTRL0")]
 pub type Ctrl0 = crate::Reg<ctrl0::Ctrl0Spec>;
 #[doc = "Clock Generation Module Control Register 0"]
 pub mod ctrl0;
-#[doc = "STAT (r) register accessor: Clock Generation Module Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`stat::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@stat`]
+#[doc = "STAT (r) register accessor: Clock Generation Module Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`stat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@stat`]
 module"]
 #[doc(alias = "STAT")]
 pub type Stat = crate::Reg<stat::StatSpec>;
 #[doc = "Clock Generation Module Status Register"]
 pub mod stat;
-#[doc = "CTRL1 (rw) register accessor: Clock Generation Module Control Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctrl1::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctrl1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl1`]
+#[doc = "CTRL1 (rw) register accessor: Clock Generation Module Control Register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl1`]
 module"]
 #[doc(alias = "CTRL1")]
 pub type Ctrl1 = crate::Reg<ctrl1::Ctrl1Spec>;
diff --git a/va416xx/src/clkgen/ctrl0.rs b/va416xx/src/clkgen/ctrl0.rs
index 5bb8d9d..f721c9f 100644
--- a/va416xx/src/clkgen/ctrl0.rs
+++ b/va416xx/src/clkgen/ctrl0.rs
@@ -124,84 +124,71 @@ impl R {
 impl W {
     #[doc = "Bits 0:1 - PLL Reference Clock Select"]
     #[inline(always)]
-    #[must_use]
     pub fn ref_clk_sel(&mut self) -> RefClkSelW<Ctrl0Spec> {
         RefClkSelW::new(self, 0)
     }
     #[doc = "Bits 2:3 - Input clock select to PLL"]
     #[inline(always)]
-    #[must_use]
     pub fn clksel_sys(&mut self) -> ClkselSysW<Ctrl0Spec> {
         ClkselSysW::new(self, 2)
     }
     #[doc = "Bit 4 - PLL Symbol; select internal feedback path when high rather than FCLK"]
     #[inline(always)]
-    #[must_use]
     pub fn pll_intfb(&mut self) -> PllIntfbW<Ctrl0Spec> {
         PllIntfbW::new(self, 4)
     }
     #[doc = "Bit 5 - PLL Symbol; power down when high"]
     #[inline(always)]
-    #[must_use]
     pub fn pll_pwdn(&mut self) -> PllPwdnW<Ctrl0Spec> {
         PllPwdnW::new(self, 5)
     }
     #[doc = "Bit 6 - PLL Symbol; reference-to-output bypass when high"]
     #[inline(always)]
-    #[must_use]
     pub fn pll_bypass(&mut self) -> PllBypassW<Ctrl0Spec> {
         PllBypassW::new(self, 6)
     }
     #[doc = "Bit 7 - PLL Symbol; Reference-to-counters-to-output bypass when high"]
     #[inline(always)]
-    #[must_use]
     pub fn pll_test(&mut self) -> PllTestW<Ctrl0Spec> {
         PllTestW::new(self, 7)
     }
     #[doc = "Bits 8:13 - PLL Symbol; selects the values 1-64 for the bandwidth divider"]
     #[inline(always)]
-    #[must_use]
     pub fn pll_bwadj(&mut self) -> PllBwadjW<Ctrl0Spec> {
         PllBwadjW::new(self, 8)
     }
     #[doc = "Bits 14:17 - PLL Symbol; selects the values 1-16 for the post VCO divider"]
     #[inline(always)]
-    #[must_use]
     pub fn pll_clkod(&mut self) -> PllClkodW<Ctrl0Spec> {
         PllClkodW::new(self, 14)
     }
     #[doc = "Bits 18:23 - PLL Symbol; selects the values 1-64 for the multiplication factor"]
     #[inline(always)]
-    #[must_use]
     pub fn pll_clkf(&mut self) -> PllClkfW<Ctrl0Spec> {
         PllClkfW::new(self, 18)
     }
     #[doc = "Bits 24:27 - PLL Symbol; selects the values 1-16 for the reference divider"]
     #[inline(always)]
-    #[must_use]
     pub fn pll_clkr(&mut self) -> PllClkrW<Ctrl0Spec> {
         PllClkrW::new(self, 24)
     }
     #[doc = "Bits 28:29 - Selects the PLL out divider to divide by 1/2/4/8"]
     #[inline(always)]
-    #[must_use]
     pub fn clk_div_sel(&mut self) -> ClkDivSelW<Ctrl0Spec> {
         ClkDivSelW::new(self, 28)
     }
     #[doc = "Bit 30 - Writing this bit to 1 puts the PLL into reset"]
     #[inline(always)]
-    #[must_use]
     pub fn pll_reset(&mut self) -> PllResetW<Ctrl0Spec> {
         PllResetW::new(self, 30)
     }
     #[doc = "Bit 31 - Enable the circuit that detects loss of SYS_CLK"]
     #[inline(always)]
-    #[must_use]
     pub fn sys_clk_lost_det_en(&mut self) -> SysClkLostDetEnW<Ctrl0Spec> {
         SysClkLostDetEnW::new(self, 31)
     }
 }
-#[doc = "Clock Generation Module Control Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctrl0::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctrl0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Clock Generation Module Control Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Ctrl0Spec;
 impl crate::RegisterSpec for Ctrl0Spec {
     type Ux = u32;
diff --git a/va416xx/src/clkgen/ctrl1.rs b/va416xx/src/clkgen/ctrl1.rs
index a9340d9..a7e942e 100644
--- a/va416xx/src/clkgen/ctrl1.rs
+++ b/va416xx/src/clkgen/ctrl1.rs
@@ -61,42 +61,36 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Resets/Rearms the SYS_CLK lost detection feature"]
     #[inline(always)]
-    #[must_use]
     pub fn sys_clk_lost_det_rearm(&mut self) -> SysClkLostDetRearmW<Ctrl1Spec> {
         SysClkLostDetRearmW::new(self, 0)
     }
     #[doc = "Bit 1 - Resets/Rearms the PLL lock detect circuit"]
     #[inline(always)]
-    #[must_use]
     pub fn pll_lck_det_rearm(&mut self) -> PllLckDetRearmW<Ctrl1Spec> {
         PllLckDetRearmW::new(self, 1)
     }
     #[doc = "Bit 2 - Enables the PLL lock lost detection circuit"]
     #[inline(always)]
-    #[must_use]
     pub fn pll_lost_lock_det_en(&mut self) -> PllLostLockDetEnW<Ctrl1Spec> {
         PllLostLockDetEnW::new(self, 2)
     }
     #[doc = "Bit 3 - Enables the crystal oscillator"]
     #[inline(always)]
-    #[must_use]
     pub fn xtal_en(&mut self) -> XtalEnW<Ctrl1Spec> {
         XtalEnW::new(self, 3)
     }
     #[doc = "Bit 4 - Enables XTAL_N output"]
     #[inline(always)]
-    #[must_use]
     pub fn xtal_n_en(&mut self) -> XtalNEnW<Ctrl1Spec> {
         XtalNEnW::new(self, 4)
     }
     #[doc = "Bits 5:6 - Clock divider select for ADC"]
     #[inline(always)]
-    #[must_use]
     pub fn adc_clk_div_sel(&mut self) -> AdcClkDivSelW<Ctrl1Spec> {
         AdcClkDivSelW::new(self, 5)
     }
 }
-#[doc = "Clock Generation Module Control Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctrl1::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctrl1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Clock Generation Module Control Register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Ctrl1Spec;
 impl crate::RegisterSpec for Ctrl1Spec {
     type Ux = u32;
diff --git a/va416xx/src/clkgen/stat.rs b/va416xx/src/clkgen/stat.rs
index fb89886..00bba33 100644
--- a/va416xx/src/clkgen/stat.rs
+++ b/va416xx/src/clkgen/stat.rs
@@ -30,7 +30,7 @@ impl R {
         SysclklostR::new(((self.bits >> 3) & 1) != 0)
     }
 }
-#[doc = "Clock Generation Module Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`stat::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Clock Generation Module Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`stat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct StatSpec;
 impl crate::RegisterSpec for StatSpec {
     type Ux = u32;
diff --git a/va416xx/src/dac0.rs b/va416xx/src/dac0.rs
index 8ca0bd1..d930b79 100644
--- a/va416xx/src/dac0.rs
+++ b/va416xx/src/dac0.rs
@@ -71,67 +71,67 @@ impl RegisterBlock {
         &self.perid
     }
 }
-#[doc = "CTRL0 (rw) register accessor: Control Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctrl0::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctrl0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl0`]
+#[doc = "CTRL0 (rw) register accessor: Control Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl0`]
 module"]
 #[doc(alias = "CTRL0")]
 pub type Ctrl0 = crate::Reg<ctrl0::Ctrl0Spec>;
 #[doc = "Control Register 0"]
 pub mod ctrl0;
-#[doc = "CTRL1 (rw) register accessor: Control Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctrl1::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctrl1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl1`]
+#[doc = "CTRL1 (rw) register accessor: Control Register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl1`]
 module"]
 #[doc(alias = "CTRL1")]
 pub type Ctrl1 = crate::Reg<ctrl1::Ctrl1Spec>;
 #[doc = "Control Register 1"]
 pub mod ctrl1;
-#[doc = "FIFO_DATA (rw) register accessor: FIFO data\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fifo_data::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fifo_data::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fifo_data`]
+#[doc = "FIFO_DATA (rw) register accessor: FIFO data\n\nYou can [`read`](crate::Reg::read) this register and get [`fifo_data::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fifo_data::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fifo_data`]
 module"]
 #[doc(alias = "FIFO_DATA")]
 pub type FifoData = crate::Reg<fifo_data::FifoDataSpec>;
 #[doc = "FIFO data"]
 pub mod fifo_data;
-#[doc = "STATUS (r) register accessor: Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`status::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`]
+#[doc = "STATUS (r) register accessor: Status\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`]
 module"]
 #[doc(alias = "STATUS")]
 pub type Status = crate::Reg<status::StatusSpec>;
 #[doc = "Status"]
 pub mod status;
-#[doc = "IRQ_ENB (rw) register accessor: Interrupt Enable\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_enb::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`irq_enb::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_enb`]
+#[doc = "IRQ_ENB (rw) register accessor: Interrupt Enable\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_enb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`irq_enb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_enb`]
 module"]
 #[doc(alias = "IRQ_ENB")]
 pub type IrqEnb = crate::Reg<irq_enb::IrqEnbSpec>;
 #[doc = "Interrupt Enable"]
 pub mod irq_enb;
-#[doc = "IRQ_RAW (r) register accessor: Raw Interrupt Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_raw::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_raw`]
+#[doc = "IRQ_RAW (r) register accessor: Raw Interrupt Status\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_raw::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_raw`]
 module"]
 #[doc(alias = "IRQ_RAW")]
 pub type IrqRaw = crate::Reg<irq_raw::IrqRawSpec>;
 #[doc = "Raw Interrupt Status"]
 pub mod irq_raw;
-#[doc = "IRQ_END (r) register accessor: Enabled Interrupt Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_end::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_end`]
+#[doc = "IRQ_END (r) register accessor: Enabled Interrupt Status\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_end::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_end`]
 module"]
 #[doc(alias = "IRQ_END")]
 pub type IrqEnd = crate::Reg<irq_end::IrqEndSpec>;
 #[doc = "Enabled Interrupt Status"]
 pub mod irq_end;
-#[doc = "IRQ_CLR (w) register accessor: Clear Interrupt\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`irq_clr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_clr`]
+#[doc = "IRQ_CLR (w) register accessor: Clear Interrupt\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`irq_clr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_clr`]
 module"]
 #[doc(alias = "IRQ_CLR")]
 pub type IrqClr = crate::Reg<irq_clr::IrqClrSpec>;
 #[doc = "Clear Interrupt"]
 pub mod irq_clr;
-#[doc = "TXFIFOIRQTRG (rw) register accessor: Receive FIFO Interrupt Trigger Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txfifoirqtrg::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`txfifoirqtrg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txfifoirqtrg`]
+#[doc = "TXFIFOIRQTRG (rw) register accessor: Receive FIFO Interrupt Trigger Value\n\nYou can [`read`](crate::Reg::read) this register and get [`txfifoirqtrg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`txfifoirqtrg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txfifoirqtrg`]
 module"]
 #[doc(alias = "TXFIFOIRQTRG")]
 pub type Txfifoirqtrg = crate::Reg<txfifoirqtrg::TxfifoirqtrgSpec>;
 #[doc = "Receive FIFO Interrupt Trigger Value"]
 pub mod txfifoirqtrg;
-#[doc = "FIFO_CLR (rw) register accessor: FIFO Clear\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fifo_clr::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fifo_clr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fifo_clr`]
+#[doc = "FIFO_CLR (rw) register accessor: FIFO Clear\n\nYou can [`read`](crate::Reg::read) this register and get [`fifo_clr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fifo_clr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fifo_clr`]
 module"]
 #[doc(alias = "FIFO_CLR")]
 pub type FifoClr = crate::Reg<fifo_clr::FifoClrSpec>;
 #[doc = "FIFO Clear"]
 pub mod fifo_clr;
-#[doc = "PERID (r) register accessor: Peripheral ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`perid::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@perid`]
+#[doc = "PERID (r) register accessor: Peripheral ID Register\n\nYou can [`read`](crate::Reg::read) this register and get [`perid::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@perid`]
 module"]
 #[doc(alias = "PERID")]
 pub type Perid = crate::Reg<perid::PeridSpec>;
diff --git a/va416xx/src/dac0/ctrl0.rs b/va416xx/src/dac0/ctrl0.rs
index ebf18e2..1362824 100644
--- a/va416xx/src/dac0/ctrl0.rs
+++ b/va416xx/src/dac0/ctrl0.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bit 10 - Enables external trigger"]
     #[inline(always)]
-    #[must_use]
     pub fn ext_trig_en(&mut self) -> ExtTrigEnW<Ctrl0Spec> {
         ExtTrigEnW::new(self, 10)
     }
     #[doc = "Bit 11 - Enables manual trigger"]
     #[inline(always)]
-    #[must_use]
     pub fn man_trig_en(&mut self) -> ManTrigEnW<Ctrl0Spec> {
         ManTrigEnW::new(self, 11)
     }
 }
-#[doc = "Control Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctrl0::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctrl0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Control Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Ctrl0Spec;
 impl crate::RegisterSpec for Ctrl0Spec {
     type Ux = u32;
diff --git a/va416xx/src/dac0/ctrl1.rs b/va416xx/src/dac0/ctrl1.rs
index 0bc3232..53dca3a 100644
--- a/va416xx/src/dac0/ctrl1.rs
+++ b/va416xx/src/dac0/ctrl1.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 5:7 - Sets the the amount of time in microseconds the control FSM waits for the DAC settling time"]
     #[inline(always)]
-    #[must_use]
     pub fn dac_settling(&mut self) -> DacSettlingW<Ctrl1Spec> {
         DacSettlingW::new(self, 5)
     }
     #[doc = "Bit 8 - Enables the DAC analog block"]
     #[inline(always)]
-    #[must_use]
     pub fn dac_en(&mut self) -> DacEnW<Ctrl1Spec> {
         DacEnW::new(self, 8)
     }
 }
-#[doc = "Control Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctrl1::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctrl1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Control Register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Ctrl1Spec;
 impl crate::RegisterSpec for Ctrl1Spec {
     type Ux = u32;
diff --git a/va416xx/src/dac0/fifo_clr.rs b/va416xx/src/dac0/fifo_clr.rs
index 96ceabc..8b419dc 100644
--- a/va416xx/src/dac0/fifo_clr.rs
+++ b/va416xx/src/dac0/fifo_clr.rs
@@ -7,12 +7,11 @@ pub type FifoClrW<'a, REG> = crate::BitWriter<'a, REG>;
 impl W {
     #[doc = "Bit 0 - Clears the DAC FIFO. Always reads 0"]
     #[inline(always)]
-    #[must_use]
     pub fn fifo_clr(&mut self) -> FifoClrW<FifoClrSpec> {
         FifoClrW::new(self, 0)
     }
 }
-#[doc = "FIFO Clear\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fifo_clr::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fifo_clr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "FIFO Clear\n\nYou can [`read`](crate::Reg::read) this register and get [`fifo_clr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fifo_clr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct FifoClrSpec;
 impl crate::RegisterSpec for FifoClrSpec {
     type Ux = u32;
diff --git a/va416xx/src/dac0/fifo_data.rs b/va416xx/src/dac0/fifo_data.rs
index 63aeaaa..6e260b3 100644
--- a/va416xx/src/dac0/fifo_data.rs
+++ b/va416xx/src/dac0/fifo_data.rs
@@ -7,12 +7,11 @@ pub type DataW<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>;
 impl W {
     #[doc = "Bits 0:11 - Data for FIFO write"]
     #[inline(always)]
-    #[must_use]
     pub fn data(&mut self) -> DataW<FifoDataSpec> {
         DataW::new(self, 0)
     }
 }
-#[doc = "FIFO data\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fifo_data::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fifo_data::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "FIFO data\n\nYou can [`read`](crate::Reg::read) this register and get [`fifo_data::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fifo_data::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct FifoDataSpec;
 impl crate::RegisterSpec for FifoDataSpec {
     type Ux = u32;
diff --git a/va416xx/src/dac0/irq_clr.rs b/va416xx/src/dac0/irq_clr.rs
index da11188..8cae95c 100644
--- a/va416xx/src/dac0/irq_clr.rs
+++ b/va416xx/src/dac0/irq_clr.rs
@@ -11,30 +11,26 @@ pub type TrigErrorW<'a, REG> = crate::BitWriter<'a, REG>;
 impl W {
     #[doc = "Bit 0 - Clears the FIFO overflow interrupt status. Always reads 0"]
     #[inline(always)]
-    #[must_use]
     pub fn fifo_oflow(&mut self) -> FifoOflowW<IrqClrSpec> {
         FifoOflowW::new(self, 0)
     }
     #[doc = "Bit 1 - Clears the FIFO underflow interrupt status. Always reads 0"]
     #[inline(always)]
-    #[must_use]
     pub fn fifo_uflow(&mut self) -> FifoUflowW<IrqClrSpec> {
         FifoUflowW::new(self, 1)
     }
     #[doc = "Bit 2 - Clears the DAC done interrupt status. Always reads 0"]
     #[inline(always)]
-    #[must_use]
     pub fn dac_done(&mut self) -> DacDoneW<IrqClrSpec> {
         DacDoneW::new(self, 2)
     }
     #[doc = "Bit 3 - Clears the trigger error interrupt status. Always reads 0"]
     #[inline(always)]
-    #[must_use]
     pub fn trig_error(&mut self) -> TrigErrorW<IrqClrSpec> {
         TrigErrorW::new(self, 3)
     }
 }
-#[doc = "Clear Interrupt\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`irq_clr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Clear Interrupt\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`irq_clr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct IrqClrSpec;
 impl crate::RegisterSpec for IrqClrSpec {
     type Ux = u32;
diff --git a/va416xx/src/dac0/irq_enb.rs b/va416xx/src/dac0/irq_enb.rs
index 9c0718e..188ee16 100644
--- a/va416xx/src/dac0/irq_enb.rs
+++ b/va416xx/src/dac0/irq_enb.rs
@@ -70,48 +70,41 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Enables the interrupt for FIFO empty"]
     #[inline(always)]
-    #[must_use]
     pub fn fifo_empty(&mut self) -> FifoEmptyW<IrqEnbSpec> {
         FifoEmptyW::new(self, 0)
     }
     #[doc = "Bit 1 - Enables the interrupt for FIFO full"]
     #[inline(always)]
-    #[must_use]
     pub fn fifo_full(&mut self) -> FifoFullW<IrqEnbSpec> {
         FifoFullW::new(self, 1)
     }
     #[doc = "Bit 2 - Enables the interrupt for a FIFO overflow"]
     #[inline(always)]
-    #[must_use]
     pub fn fifo_oflow(&mut self) -> FifoOflowW<IrqEnbSpec> {
         FifoOflowW::new(self, 2)
     }
     #[doc = "Bit 3 - Enables the interrupt for a FIFO underflow"]
     #[inline(always)]
-    #[must_use]
     pub fn fifo_uflow(&mut self) -> FifoUflowW<IrqEnbSpec> {
         FifoUflowW::new(self, 3)
     }
     #[doc = "Bit 4 - Enables the interrupt for a DAC data acquisition completion"]
     #[inline(always)]
-    #[must_use]
     pub fn dac_done(&mut self) -> DacDoneW<IrqEnbSpec> {
         DacDoneW::new(self, 4)
     }
     #[doc = "Bit 5 - Enables the interrupt for a trigger error"]
     #[inline(always)]
-    #[must_use]
     pub fn trig_error(&mut self) -> TrigErrorW<IrqEnbSpec> {
         TrigErrorW::new(self, 5)
     }
     #[doc = "Bit 6 - Enables the interrupt for the FIFO entry count is less than or equal to the trigger level"]
     #[inline(always)]
-    #[must_use]
     pub fn fifo_depth_trig(&mut self) -> FifoDepthTrigW<IrqEnbSpec> {
         FifoDepthTrigW::new(self, 6)
     }
 }
-#[doc = "Interrupt Enable\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_enb::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`irq_enb::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Interrupt Enable\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_enb::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`irq_enb::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct IrqEnbSpec;
 impl crate::RegisterSpec for IrqEnbSpec {
     type Ux = u32;
diff --git a/va416xx/src/dac0/irq_end.rs b/va416xx/src/dac0/irq_end.rs
index 2043fc3..0c926a1 100644
--- a/va416xx/src/dac0/irq_end.rs
+++ b/va416xx/src/dac0/irq_end.rs
@@ -51,7 +51,7 @@ impl R {
         FifoDepthTrigR::new(((self.bits >> 6) & 1) != 0)
     }
 }
-#[doc = "Enabled Interrupt Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_end::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Enabled Interrupt Status\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_end::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct IrqEndSpec;
 impl crate::RegisterSpec for IrqEndSpec {
     type Ux = u32;
diff --git a/va416xx/src/dac0/irq_raw.rs b/va416xx/src/dac0/irq_raw.rs
index 91a9e68..2fd40ef 100644
--- a/va416xx/src/dac0/irq_raw.rs
+++ b/va416xx/src/dac0/irq_raw.rs
@@ -51,7 +51,7 @@ impl R {
         FifoDepthTrigR::new(((self.bits >> 6) & 1) != 0)
     }
 }
-#[doc = "Raw Interrupt Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_raw::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Raw Interrupt Status\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_raw::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct IrqRawSpec;
 impl crate::RegisterSpec for IrqRawSpec {
     type Ux = u32;
diff --git a/va416xx/src/dac0/perid.rs b/va416xx/src/dac0/perid.rs
index a7c25a8..64b61aa 100644
--- a/va416xx/src/dac0/perid.rs
+++ b/va416xx/src/dac0/perid.rs
@@ -5,7 +5,7 @@ impl core::fmt::Debug for R {
         write!(f, "{}", self.bits())
     }
 }
-#[doc = "Peripheral ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`perid::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Peripheral ID Register\n\nYou can [`read`](crate::Reg::read) this register and get [`perid::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct PeridSpec;
 impl crate::RegisterSpec for PeridSpec {
     type Ux = u32;
diff --git a/va416xx/src/dac0/status.rs b/va416xx/src/dac0/status.rs
index af7a48d..d365aed 100644
--- a/va416xx/src/dac0/status.rs
+++ b/va416xx/src/dac0/status.rs
@@ -16,7 +16,7 @@ impl R {
         DacBusyR::new(((self.bits >> 7) & 1) != 0)
     }
 }
-#[doc = "Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`status::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Status\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct StatusSpec;
 impl crate::RegisterSpec for StatusSpec {
     type Ux = u32;
diff --git a/va416xx/src/dac0/txfifoirqtrg.rs b/va416xx/src/dac0/txfifoirqtrg.rs
index 167855c..1e2123d 100644
--- a/va416xx/src/dac0/txfifoirqtrg.rs
+++ b/va416xx/src/dac0/txfifoirqtrg.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:4 - Sets the FIFO_ENTRY_CNT value that asserts the FIFO_DEPTH_TRIG interrupt"]
     #[inline(always)]
-    #[must_use]
     pub fn level(&mut self) -> LevelW<TxfifoirqtrgSpec> {
         LevelW::new(self, 0)
     }
 }
-#[doc = "Receive FIFO Interrupt Trigger Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txfifoirqtrg::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`txfifoirqtrg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Receive FIFO Interrupt Trigger Value\n\nYou can [`read`](crate::Reg::read) this register and get [`txfifoirqtrg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`txfifoirqtrg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct TxfifoirqtrgSpec;
 impl crate::RegisterSpec for TxfifoirqtrgSpec {
     type Ux = u32;
diff --git a/va416xx/src/dma.rs b/va416xx/src/dma.rs
index 102edef..a1d3812 100644
--- a/va416xx/src/dma.rs
+++ b/va416xx/src/dma.rs
@@ -223,210 +223,211 @@ impl RegisterBlock {
         &self.primecell_id_3
     }
 }
-#[doc = "STATUS (r) register accessor: DMA Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`status::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`]
+#[doc = "STATUS (r) register accessor: DMA Status\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`]
 module"]
 #[doc(alias = "STATUS")]
 pub type Status = crate::Reg<status::StatusSpec>;
 #[doc = "DMA Status"]
 pub mod status;
-#[doc = "CFG (w) register accessor: DMA Configuration\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cfg::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "CFG (w) register accessor: DMA Configuration\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfg`]
+module"]
 #[doc(alias = "CFG")]
 pub type Cfg = crate::Reg<cfg::CfgSpec>;
 #[doc = "DMA Configuration"]
 pub mod cfg;
-#[doc = "CTRL_BASE_PTR (rw) register accessor: Base Pointer for DMA Control Registers\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctrl_base_ptr::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctrl_base_ptr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl_base_ptr`]
+#[doc = "CTRL_BASE_PTR (rw) register accessor: Base Pointer for DMA Control Registers\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl_base_ptr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl_base_ptr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl_base_ptr`]
 module"]
 #[doc(alias = "CTRL_BASE_PTR")]
 pub type CtrlBasePtr = crate::Reg<ctrl_base_ptr::CtrlBasePtrSpec>;
 #[doc = "Base Pointer for DMA Control Registers"]
 pub mod ctrl_base_ptr;
-#[doc = "ALT_CTRL_BASE_PTR (rw) register accessor: DMA Channel alternate control data base pointer\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`alt_ctrl_base_ptr::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`alt_ctrl_base_ptr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@alt_ctrl_base_ptr`]
+#[doc = "ALT_CTRL_BASE_PTR (rw) register accessor: DMA Channel alternate control data base pointer\n\nYou can [`read`](crate::Reg::read) this register and get [`alt_ctrl_base_ptr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`alt_ctrl_base_ptr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@alt_ctrl_base_ptr`]
 module"]
 #[doc(alias = "ALT_CTRL_BASE_PTR")]
 pub type AltCtrlBasePtr = crate::Reg<alt_ctrl_base_ptr::AltCtrlBasePtrSpec>;
 #[doc = "DMA Channel alternate control data base pointer"]
 pub mod alt_ctrl_base_ptr;
-#[doc = "WAITONREQ_STATUS (r) register accessor: DMA channel wait on request status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`waitonreq_status::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@waitonreq_status`]
+#[doc = "WAITONREQ_STATUS (r) register accessor: DMA channel wait on request status\n\nYou can [`read`](crate::Reg::read) this register and get [`waitonreq_status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@waitonreq_status`]
 module"]
 #[doc(alias = "WAITONREQ_STATUS")]
 pub type WaitonreqStatus = crate::Reg<waitonreq_status::WaitonreqStatusSpec>;
 #[doc = "DMA channel wait on request status"]
 pub mod waitonreq_status;
-#[doc = "CHNL_SW_REQUEST (w) register accessor: DMA channel software request\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`chnl_sw_request::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chnl_sw_request`]
+#[doc = "CHNL_SW_REQUEST (w) register accessor: DMA channel software request\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chnl_sw_request::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chnl_sw_request`]
 module"]
 #[doc(alias = "CHNL_SW_REQUEST")]
 pub type ChnlSwRequest = crate::Reg<chnl_sw_request::ChnlSwRequestSpec>;
 #[doc = "DMA channel software request"]
 pub mod chnl_sw_request;
-#[doc = "CHNL_USEBURST_SET (rw) register accessor: DMA channel useburst set\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`chnl_useburst_set::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`chnl_useburst_set::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chnl_useburst_set`]
+#[doc = "CHNL_USEBURST_SET (rw) register accessor: DMA channel useburst set\n\nYou can [`read`](crate::Reg::read) this register and get [`chnl_useburst_set::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chnl_useburst_set::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chnl_useburst_set`]
 module"]
 #[doc(alias = "CHNL_USEBURST_SET")]
 pub type ChnlUseburstSet = crate::Reg<chnl_useburst_set::ChnlUseburstSetSpec>;
 #[doc = "DMA channel useburst set"]
 pub mod chnl_useburst_set;
-#[doc = "CHNL_USEBURST_CLR (rw) register accessor: DMA channel useburst clear\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`chnl_useburst_clr::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`chnl_useburst_clr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chnl_useburst_clr`]
+#[doc = "CHNL_USEBURST_CLR (rw) register accessor: DMA channel useburst clear\n\nYou can [`read`](crate::Reg::read) this register and get [`chnl_useburst_clr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chnl_useburst_clr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chnl_useburst_clr`]
 module"]
 #[doc(alias = "CHNL_USEBURST_CLR")]
 pub type ChnlUseburstClr = crate::Reg<chnl_useburst_clr::ChnlUseburstClrSpec>;
 #[doc = "DMA channel useburst clear"]
 pub mod chnl_useburst_clr;
-#[doc = "CHNL_REQ_MASK_SET (rw) register accessor: DMA channel request mask set\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`chnl_req_mask_set::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`chnl_req_mask_set::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chnl_req_mask_set`]
+#[doc = "CHNL_REQ_MASK_SET (rw) register accessor: DMA channel request mask set\n\nYou can [`read`](crate::Reg::read) this register and get [`chnl_req_mask_set::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chnl_req_mask_set::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chnl_req_mask_set`]
 module"]
 #[doc(alias = "CHNL_REQ_MASK_SET")]
 pub type ChnlReqMaskSet = crate::Reg<chnl_req_mask_set::ChnlReqMaskSetSpec>;
 #[doc = "DMA channel request mask set"]
 pub mod chnl_req_mask_set;
-#[doc = "CHNL_REQ_MASK_CLR (rw) register accessor: DMA channel request mask clear\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`chnl_req_mask_clr::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`chnl_req_mask_clr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chnl_req_mask_clr`]
+#[doc = "CHNL_REQ_MASK_CLR (rw) register accessor: DMA channel request mask clear\n\nYou can [`read`](crate::Reg::read) this register and get [`chnl_req_mask_clr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chnl_req_mask_clr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chnl_req_mask_clr`]
 module"]
 #[doc(alias = "CHNL_REQ_MASK_CLR")]
 pub type ChnlReqMaskClr = crate::Reg<chnl_req_mask_clr::ChnlReqMaskClrSpec>;
 #[doc = "DMA channel request mask clear"]
 pub mod chnl_req_mask_clr;
-#[doc = "CHNL_ENABLE_SET (rw) register accessor: DMA channel enable set\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`chnl_enable_set::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`chnl_enable_set::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chnl_enable_set`]
+#[doc = "CHNL_ENABLE_SET (rw) register accessor: DMA channel enable set\n\nYou can [`read`](crate::Reg::read) this register and get [`chnl_enable_set::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chnl_enable_set::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chnl_enable_set`]
 module"]
 #[doc(alias = "CHNL_ENABLE_SET")]
 pub type ChnlEnableSet = crate::Reg<chnl_enable_set::ChnlEnableSetSpec>;
 #[doc = "DMA channel enable set"]
 pub mod chnl_enable_set;
-#[doc = "CHNL_ENABLE_CLR (rw) register accessor: DMA channel enable clear\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`chnl_enable_clr::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`chnl_enable_clr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chnl_enable_clr`]
+#[doc = "CHNL_ENABLE_CLR (rw) register accessor: DMA channel enable clear\n\nYou can [`read`](crate::Reg::read) this register and get [`chnl_enable_clr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chnl_enable_clr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chnl_enable_clr`]
 module"]
 #[doc(alias = "CHNL_ENABLE_CLR")]
 pub type ChnlEnableClr = crate::Reg<chnl_enable_clr::ChnlEnableClrSpec>;
 #[doc = "DMA channel enable clear"]
 pub mod chnl_enable_clr;
-#[doc = "CHNL_PRI_ALT_SET (rw) register accessor: DMA channel primary alternate set\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`chnl_pri_alt_set::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`chnl_pri_alt_set::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chnl_pri_alt_set`]
+#[doc = "CHNL_PRI_ALT_SET (rw) register accessor: DMA channel primary alternate set\n\nYou can [`read`](crate::Reg::read) this register and get [`chnl_pri_alt_set::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chnl_pri_alt_set::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chnl_pri_alt_set`]
 module"]
 #[doc(alias = "CHNL_PRI_ALT_SET")]
 pub type ChnlPriAltSet = crate::Reg<chnl_pri_alt_set::ChnlPriAltSetSpec>;
 #[doc = "DMA channel primary alternate set"]
 pub mod chnl_pri_alt_set;
-#[doc = "CHNL_PRI_ALT_CLR (rw) register accessor: DMA channel primary alternate clear\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`chnl_pri_alt_clr::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`chnl_pri_alt_clr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chnl_pri_alt_clr`]
+#[doc = "CHNL_PRI_ALT_CLR (rw) register accessor: DMA channel primary alternate clear\n\nYou can [`read`](crate::Reg::read) this register and get [`chnl_pri_alt_clr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chnl_pri_alt_clr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chnl_pri_alt_clr`]
 module"]
 #[doc(alias = "CHNL_PRI_ALT_CLR")]
 pub type ChnlPriAltClr = crate::Reg<chnl_pri_alt_clr::ChnlPriAltClrSpec>;
 #[doc = "DMA channel primary alternate clear"]
 pub mod chnl_pri_alt_clr;
-#[doc = "CHNL_PRIORITY_SET (rw) register accessor: DMA channel priority set\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`chnl_priority_set::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`chnl_priority_set::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chnl_priority_set`]
+#[doc = "CHNL_PRIORITY_SET (rw) register accessor: DMA channel priority set\n\nYou can [`read`](crate::Reg::read) this register and get [`chnl_priority_set::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chnl_priority_set::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chnl_priority_set`]
 module"]
 #[doc(alias = "CHNL_PRIORITY_SET")]
 pub type ChnlPrioritySet = crate::Reg<chnl_priority_set::ChnlPrioritySetSpec>;
 #[doc = "DMA channel priority set"]
 pub mod chnl_priority_set;
-#[doc = "CHNL_PRIORITY_CLR (w) register accessor: DMA channel priority clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`chnl_priority_clr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chnl_priority_clr`]
+#[doc = "CHNL_PRIORITY_CLR (w) register accessor: DMA channel priority clear\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chnl_priority_clr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chnl_priority_clr`]
 module"]
 #[doc(alias = "CHNL_PRIORITY_CLR")]
 pub type ChnlPriorityClr = crate::Reg<chnl_priority_clr::ChnlPriorityClrSpec>;
 #[doc = "DMA channel priority clear"]
 pub mod chnl_priority_clr;
-#[doc = "ERR_CLR (rw) register accessor: DMA bus error clear\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`err_clr::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`err_clr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@err_clr`]
+#[doc = "ERR_CLR (rw) register accessor: DMA bus error clear\n\nYou can [`read`](crate::Reg::read) this register and get [`err_clr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`err_clr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@err_clr`]
 module"]
 #[doc(alias = "ERR_CLR")]
 pub type ErrClr = crate::Reg<err_clr::ErrClrSpec>;
 #[doc = "DMA bus error clear"]
 pub mod err_clr;
-#[doc = "INTEGRATION_CFG (rw) register accessor: DMA integration configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`integration_cfg::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`integration_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@integration_cfg`]
+#[doc = "INTEGRATION_CFG (rw) register accessor: DMA integration configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`integration_cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`integration_cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@integration_cfg`]
 module"]
 #[doc(alias = "INTEGRATION_CFG")]
 pub type IntegrationCfg = crate::Reg<integration_cfg::IntegrationCfgSpec>;
 #[doc = "DMA integration configuration"]
 pub mod integration_cfg;
-#[doc = "STALL_STATUS (rw) register accessor: DMA stall status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`stall_status::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`stall_status::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@stall_status`]
+#[doc = "STALL_STATUS (rw) register accessor: DMA stall status\n\nYou can [`read`](crate::Reg::read) this register and get [`stall_status::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`stall_status::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@stall_status`]
 module"]
 #[doc(alias = "STALL_STATUS")]
 pub type StallStatus = crate::Reg<stall_status::StallStatusSpec>;
 #[doc = "DMA stall status"]
 pub mod stall_status;
-#[doc = "DMA_REQ_STATUS (rw) register accessor: DMA Configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_req_status::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_req_status::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_req_status`]
+#[doc = "DMA_REQ_STATUS (rw) register accessor: DMA Configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_req_status::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_req_status::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_req_status`]
 module"]
 #[doc(alias = "DMA_REQ_STATUS")]
 pub type DmaReqStatus = crate::Reg<dma_req_status::DmaReqStatusSpec>;
 #[doc = "DMA Configuration"]
 pub mod dma_req_status;
-#[doc = "DMA_SREQ_STATUS (rw) register accessor: DMA single request status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_sreq_status::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_sreq_status::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_sreq_status`]
+#[doc = "DMA_SREQ_STATUS (rw) register accessor: DMA single request status\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_sreq_status::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_sreq_status::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_sreq_status`]
 module"]
 #[doc(alias = "DMA_SREQ_STATUS")]
 pub type DmaSreqStatus = crate::Reg<dma_sreq_status::DmaSreqStatusSpec>;
 #[doc = "DMA single request status"]
 pub mod dma_sreq_status;
-#[doc = "DMA_DONE_SET (rw) register accessor: DMA done set\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_done_set::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_done_set::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_done_set`]
+#[doc = "DMA_DONE_SET (rw) register accessor: DMA done set\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_done_set::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_done_set::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_done_set`]
 module"]
 #[doc(alias = "DMA_DONE_SET")]
 pub type DmaDoneSet = crate::Reg<dma_done_set::DmaDoneSetSpec>;
 #[doc = "DMA done set"]
 pub mod dma_done_set;
-#[doc = "DMA_DONE_CLR (rw) register accessor: DMA done clear\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_done_clr::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_done_clr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_done_clr`]
+#[doc = "DMA_DONE_CLR (rw) register accessor: DMA done clear\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_done_clr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_done_clr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_done_clr`]
 module"]
 #[doc(alias = "DMA_DONE_CLR")]
 pub type DmaDoneClr = crate::Reg<dma_done_clr::DmaDoneClrSpec>;
 #[doc = "DMA done clear"]
 pub mod dma_done_clr;
-#[doc = "DMA_ACTIVE_SET (rw) register accessor: DMA active set\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_active_set::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_active_set::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_active_set`]
+#[doc = "DMA_ACTIVE_SET (rw) register accessor: DMA active set\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_active_set::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_active_set::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_active_set`]
 module"]
 #[doc(alias = "DMA_ACTIVE_SET")]
 pub type DmaActiveSet = crate::Reg<dma_active_set::DmaActiveSetSpec>;
 #[doc = "DMA active set"]
 pub mod dma_active_set;
-#[doc = "DMA_ACTIVE_CLR (rw) register accessor: DMA active clear\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_active_clr::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_active_clr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_active_clr`]
+#[doc = "DMA_ACTIVE_CLR (rw) register accessor: DMA active clear\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_active_clr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_active_clr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_active_clr`]
 module"]
 #[doc(alias = "DMA_ACTIVE_CLR")]
 pub type DmaActiveClr = crate::Reg<dma_active_clr::DmaActiveClrSpec>;
 #[doc = "DMA active clear"]
 pub mod dma_active_clr;
-#[doc = "ERR_SET (rw) register accessor: DMA bus error set\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`err_set::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`err_set::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@err_set`]
+#[doc = "ERR_SET (rw) register accessor: DMA bus error set\n\nYou can [`read`](crate::Reg::read) this register and get [`err_set::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`err_set::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@err_set`]
 module"]
 #[doc(alias = "ERR_SET")]
 pub type ErrSet = crate::Reg<err_set::ErrSetSpec>;
 #[doc = "DMA bus error set"]
 pub mod err_set;
-#[doc = "PERIPH_ID_4 (rw) register accessor: DMA Peripheral ID 4\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`periph_id_4::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`periph_id_4::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@periph_id_4`]
+#[doc = "PERIPH_ID_4 (rw) register accessor: DMA Peripheral ID 4\n\nYou can [`read`](crate::Reg::read) this register and get [`periph_id_4::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`periph_id_4::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@periph_id_4`]
 module"]
 #[doc(alias = "PERIPH_ID_4")]
 pub type PeriphId4 = crate::Reg<periph_id_4::PeriphId4Spec>;
 #[doc = "DMA Peripheral ID 4"]
 pub mod periph_id_4;
-#[doc = "PERIPH_ID_0 (rw) register accessor: DMA Peripheral ID 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`periph_id_0::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`periph_id_0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@periph_id_0`]
+#[doc = "PERIPH_ID_0 (rw) register accessor: DMA Peripheral ID 0\n\nYou can [`read`](crate::Reg::read) this register and get [`periph_id_0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`periph_id_0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@periph_id_0`]
 module"]
 #[doc(alias = "PERIPH_ID_0")]
 pub type PeriphId0 = crate::Reg<periph_id_0::PeriphId0Spec>;
 #[doc = "DMA Peripheral ID 0"]
 pub mod periph_id_0;
-#[doc = "PERIPH_ID_1 (r) register accessor: DMA Peripheral ID 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`periph_id_1::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@periph_id_1`]
+#[doc = "PERIPH_ID_1 (r) register accessor: DMA Peripheral ID 1\n\nYou can [`read`](crate::Reg::read) this register and get [`periph_id_1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@periph_id_1`]
 module"]
 #[doc(alias = "PERIPH_ID_1")]
 pub type PeriphId1 = crate::Reg<periph_id_1::PeriphId1Spec>;
 #[doc = "DMA Peripheral ID 1"]
 pub mod periph_id_1;
-#[doc = "PERIPH_ID_2 (rw) register accessor: DMA Peripheral ID 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`periph_id_2::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`periph_id_2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@periph_id_2`]
+#[doc = "PERIPH_ID_2 (rw) register accessor: DMA Peripheral ID 2\n\nYou can [`read`](crate::Reg::read) this register and get [`periph_id_2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`periph_id_2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@periph_id_2`]
 module"]
 #[doc(alias = "PERIPH_ID_2")]
 pub type PeriphId2 = crate::Reg<periph_id_2::PeriphId2Spec>;
 #[doc = "DMA Peripheral ID 2"]
 pub mod periph_id_2;
-#[doc = "PERIPH_ID_3 (rw) register accessor: DMA Peripheral ID 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`periph_id_3::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`periph_id_3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@periph_id_3`]
+#[doc = "PERIPH_ID_3 (rw) register accessor: DMA Peripheral ID 3\n\nYou can [`read`](crate::Reg::read) this register and get [`periph_id_3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`periph_id_3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@periph_id_3`]
 module"]
 #[doc(alias = "PERIPH_ID_3")]
 pub type PeriphId3 = crate::Reg<periph_id_3::PeriphId3Spec>;
 #[doc = "DMA Peripheral ID 3"]
 pub mod periph_id_3;
-#[doc = "PRIMECELL_ID_0 (rw) register accessor: DMA PrimeCell ID 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`primecell_id_0::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`primecell_id_0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@primecell_id_0`]
+#[doc = "PRIMECELL_ID_0 (rw) register accessor: DMA PrimeCell ID 0\n\nYou can [`read`](crate::Reg::read) this register and get [`primecell_id_0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`primecell_id_0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@primecell_id_0`]
 module"]
 #[doc(alias = "PRIMECELL_ID_0")]
 pub type PrimecellId0 = crate::Reg<primecell_id_0::PrimecellId0Spec>;
 #[doc = "DMA PrimeCell ID 0"]
 pub mod primecell_id_0;
-#[doc = "PRIMECELL_ID_1 (rw) register accessor: DMA PrimeCell ID 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`primecell_id_1::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`primecell_id_1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@primecell_id_1`]
+#[doc = "PRIMECELL_ID_1 (rw) register accessor: DMA PrimeCell ID 1\n\nYou can [`read`](crate::Reg::read) this register and get [`primecell_id_1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`primecell_id_1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@primecell_id_1`]
 module"]
 #[doc(alias = "PRIMECELL_ID_1")]
 pub type PrimecellId1 = crate::Reg<primecell_id_1::PrimecellId1Spec>;
 #[doc = "DMA PrimeCell ID 1"]
 pub mod primecell_id_1;
-#[doc = "PRIMECELL_ID_2 (rw) register accessor: DMA PrimeCell ID 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`primecell_id_2::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`primecell_id_2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@primecell_id_2`]
+#[doc = "PRIMECELL_ID_2 (rw) register accessor: DMA PrimeCell ID 2\n\nYou can [`read`](crate::Reg::read) this register and get [`primecell_id_2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`primecell_id_2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@primecell_id_2`]
 module"]
 #[doc(alias = "PRIMECELL_ID_2")]
 pub type PrimecellId2 = crate::Reg<primecell_id_2::PrimecellId2Spec>;
 #[doc = "DMA PrimeCell ID 2"]
 pub mod primecell_id_2;
-#[doc = "PRIMECELL_ID_3 (rw) register accessor: DMA PrimeCell ID 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`primecell_id_3::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`primecell_id_3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@primecell_id_3`]
+#[doc = "PRIMECELL_ID_3 (rw) register accessor: DMA PrimeCell ID 3\n\nYou can [`read`](crate::Reg::read) this register and get [`primecell_id_3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`primecell_id_3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@primecell_id_3`]
 module"]
 #[doc(alias = "PRIMECELL_ID_3")]
 pub type PrimecellId3 = crate::Reg<primecell_id_3::PrimecellId3Spec>;
diff --git a/va416xx/src/dma/alt_ctrl_base_ptr.rs b/va416xx/src/dma/alt_ctrl_base_ptr.rs
index 0ae67d4..5706439 100644
--- a/va416xx/src/dma/alt_ctrl_base_ptr.rs
+++ b/va416xx/src/dma/alt_ctrl_base_ptr.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:31 - Base Pointer for Alternate DMA Control Register"]
     #[inline(always)]
-    #[must_use]
     pub fn alt_ctrl_base_ptr(&mut self) -> AltCtrlBasePtrW<AltCtrlBasePtrSpec> {
         AltCtrlBasePtrW::new(self, 0)
     }
 }
-#[doc = "DMA Channel alternate control data base pointer\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`alt_ctrl_base_ptr::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`alt_ctrl_base_ptr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "DMA Channel alternate control data base pointer\n\nYou can [`read`](crate::Reg::read) this register and get [`alt_ctrl_base_ptr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`alt_ctrl_base_ptr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct AltCtrlBasePtrSpec;
 impl crate::RegisterSpec for AltCtrlBasePtrSpec {
     type Ux = u32;
diff --git a/va416xx/src/dma/cfg.rs b/va416xx/src/dma/cfg.rs
index 5e537c3..280dc17 100644
--- a/va416xx/src/dma/cfg.rs
+++ b/va416xx/src/dma/cfg.rs
@@ -7,18 +7,16 @@ pub type ChnlProtCtrlW<'a, REG> = crate::FieldWriter<'a, REG, 3>;
 impl W {
     #[doc = "Bit 0 - PLL Symbol; Feedback cycle slip output (CLKOUT frequency low)"]
     #[inline(always)]
-    #[must_use]
     pub fn master_enable(&mut self) -> MasterEnableW<CfgSpec> {
         MasterEnableW::new(self, 0)
     }
     #[doc = "Bits 5:7 - HPROT\\[3:0\\]"]
     #[inline(always)]
-    #[must_use]
     pub fn chnl_prot_ctrl(&mut self) -> ChnlProtCtrlW<CfgSpec> {
         ChnlProtCtrlW::new(self, 5)
     }
 }
-#[doc = "DMA Configuration\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cfg::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "DMA Configuration\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct CfgSpec;
 impl crate::RegisterSpec for CfgSpec {
     type Ux = u32;
diff --git a/va416xx/src/dma/chnl_enable_clr.rs b/va416xx/src/dma/chnl_enable_clr.rs
index 374fc9e..acb46c4 100644
--- a/va416xx/src/dma/chnl_enable_clr.rs
+++ b/va416xx/src/dma/chnl_enable_clr.rs
@@ -43,30 +43,26 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Channel Enable clear"]
     #[inline(always)]
-    #[must_use]
     pub fn ch0(&mut self) -> Ch0W<ChnlEnableClrSpec> {
         Ch0W::new(self, 0)
     }
     #[doc = "Bit 1 - Channel Enable clear"]
     #[inline(always)]
-    #[must_use]
     pub fn ch1(&mut self) -> Ch1W<ChnlEnableClrSpec> {
         Ch1W::new(self, 1)
     }
     #[doc = "Bit 2 - Channel Enable clear"]
     #[inline(always)]
-    #[must_use]
     pub fn ch2(&mut self) -> Ch2W<ChnlEnableClrSpec> {
         Ch2W::new(self, 2)
     }
     #[doc = "Bit 3 - Channel Enable clear"]
     #[inline(always)]
-    #[must_use]
     pub fn ch3(&mut self) -> Ch3W<ChnlEnableClrSpec> {
         Ch3W::new(self, 3)
     }
 }
-#[doc = "DMA channel enable clear\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`chnl_enable_clr::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`chnl_enable_clr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "DMA channel enable clear\n\nYou can [`read`](crate::Reg::read) this register and get [`chnl_enable_clr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chnl_enable_clr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct ChnlEnableClrSpec;
 impl crate::RegisterSpec for ChnlEnableClrSpec {
     type Ux = u32;
diff --git a/va416xx/src/dma/chnl_enable_set.rs b/va416xx/src/dma/chnl_enable_set.rs
index 49390d5..840d603 100644
--- a/va416xx/src/dma/chnl_enable_set.rs
+++ b/va416xx/src/dma/chnl_enable_set.rs
@@ -43,30 +43,26 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Channel Enable set"]
     #[inline(always)]
-    #[must_use]
     pub fn ch0(&mut self) -> Ch0W<ChnlEnableSetSpec> {
         Ch0W::new(self, 0)
     }
     #[doc = "Bit 1 - Channel Enable set"]
     #[inline(always)]
-    #[must_use]
     pub fn ch1(&mut self) -> Ch1W<ChnlEnableSetSpec> {
         Ch1W::new(self, 1)
     }
     #[doc = "Bit 2 - Channel Enable set"]
     #[inline(always)]
-    #[must_use]
     pub fn ch2(&mut self) -> Ch2W<ChnlEnableSetSpec> {
         Ch2W::new(self, 2)
     }
     #[doc = "Bit 3 - Channel Enable set"]
     #[inline(always)]
-    #[must_use]
     pub fn ch3(&mut self) -> Ch3W<ChnlEnableSetSpec> {
         Ch3W::new(self, 3)
     }
 }
-#[doc = "DMA channel enable set\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`chnl_enable_set::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`chnl_enable_set::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "DMA channel enable set\n\nYou can [`read`](crate::Reg::read) this register and get [`chnl_enable_set::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chnl_enable_set::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct ChnlEnableSetSpec;
 impl crate::RegisterSpec for ChnlEnableSetSpec {
     type Ux = u32;
diff --git a/va416xx/src/dma/chnl_pri_alt_clr.rs b/va416xx/src/dma/chnl_pri_alt_clr.rs
index fbd1c6c..6e75664 100644
--- a/va416xx/src/dma/chnl_pri_alt_clr.rs
+++ b/va416xx/src/dma/chnl_pri_alt_clr.rs
@@ -43,30 +43,26 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Channel PRI_ALT clear"]
     #[inline(always)]
-    #[must_use]
     pub fn ch0(&mut self) -> Ch0W<ChnlPriAltClrSpec> {
         Ch0W::new(self, 0)
     }
     #[doc = "Bit 1 - Channel PRI_ALT clear"]
     #[inline(always)]
-    #[must_use]
     pub fn ch1(&mut self) -> Ch1W<ChnlPriAltClrSpec> {
         Ch1W::new(self, 1)
     }
     #[doc = "Bit 2 - Channel PRI_ALT clear"]
     #[inline(always)]
-    #[must_use]
     pub fn ch2(&mut self) -> Ch2W<ChnlPriAltClrSpec> {
         Ch2W::new(self, 2)
     }
     #[doc = "Bit 3 - Channel PRI_ALT clear"]
     #[inline(always)]
-    #[must_use]
     pub fn ch3(&mut self) -> Ch3W<ChnlPriAltClrSpec> {
         Ch3W::new(self, 3)
     }
 }
-#[doc = "DMA channel primary alternate clear\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`chnl_pri_alt_clr::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`chnl_pri_alt_clr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "DMA channel primary alternate clear\n\nYou can [`read`](crate::Reg::read) this register and get [`chnl_pri_alt_clr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chnl_pri_alt_clr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct ChnlPriAltClrSpec;
 impl crate::RegisterSpec for ChnlPriAltClrSpec {
     type Ux = u32;
diff --git a/va416xx/src/dma/chnl_pri_alt_set.rs b/va416xx/src/dma/chnl_pri_alt_set.rs
index 99ca91c..84b7e83 100644
--- a/va416xx/src/dma/chnl_pri_alt_set.rs
+++ b/va416xx/src/dma/chnl_pri_alt_set.rs
@@ -43,30 +43,26 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Channel PRI_ALT set"]
     #[inline(always)]
-    #[must_use]
     pub fn ch0(&mut self) -> Ch0W<ChnlPriAltSetSpec> {
         Ch0W::new(self, 0)
     }
     #[doc = "Bit 1 - Channel PRI_ALT set"]
     #[inline(always)]
-    #[must_use]
     pub fn ch1(&mut self) -> Ch1W<ChnlPriAltSetSpec> {
         Ch1W::new(self, 1)
     }
     #[doc = "Bit 2 - Channel PRI_ALT set"]
     #[inline(always)]
-    #[must_use]
     pub fn ch2(&mut self) -> Ch2W<ChnlPriAltSetSpec> {
         Ch2W::new(self, 2)
     }
     #[doc = "Bit 3 - Channel PRI_ALT set"]
     #[inline(always)]
-    #[must_use]
     pub fn ch3(&mut self) -> Ch3W<ChnlPriAltSetSpec> {
         Ch3W::new(self, 3)
     }
 }
-#[doc = "DMA channel primary alternate set\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`chnl_pri_alt_set::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`chnl_pri_alt_set::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "DMA channel primary alternate set\n\nYou can [`read`](crate::Reg::read) this register and get [`chnl_pri_alt_set::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chnl_pri_alt_set::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct ChnlPriAltSetSpec;
 impl crate::RegisterSpec for ChnlPriAltSetSpec {
     type Ux = u32;
diff --git a/va416xx/src/dma/chnl_priority_clr.rs b/va416xx/src/dma/chnl_priority_clr.rs
index cd8f54c..b66b2c4 100644
--- a/va416xx/src/dma/chnl_priority_clr.rs
+++ b/va416xx/src/dma/chnl_priority_clr.rs
@@ -11,30 +11,26 @@ pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG>;
 impl W {
     #[doc = "Bit 0 - Channel PRIORITY clear"]
     #[inline(always)]
-    #[must_use]
     pub fn ch0(&mut self) -> Ch0W<ChnlPriorityClrSpec> {
         Ch0W::new(self, 0)
     }
     #[doc = "Bit 1 - Channel PRIORITY clear"]
     #[inline(always)]
-    #[must_use]
     pub fn ch1(&mut self) -> Ch1W<ChnlPriorityClrSpec> {
         Ch1W::new(self, 1)
     }
     #[doc = "Bit 2 - Channel PRIORITY clear"]
     #[inline(always)]
-    #[must_use]
     pub fn ch2(&mut self) -> Ch2W<ChnlPriorityClrSpec> {
         Ch2W::new(self, 2)
     }
     #[doc = "Bit 3 - Channel PRIORITY clear"]
     #[inline(always)]
-    #[must_use]
     pub fn ch3(&mut self) -> Ch3W<ChnlPriorityClrSpec> {
         Ch3W::new(self, 3)
     }
 }
-#[doc = "DMA channel priority clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`chnl_priority_clr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "DMA channel priority clear\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chnl_priority_clr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct ChnlPriorityClrSpec;
 impl crate::RegisterSpec for ChnlPriorityClrSpec {
     type Ux = u32;
diff --git a/va416xx/src/dma/chnl_priority_set.rs b/va416xx/src/dma/chnl_priority_set.rs
index a92e2ae..d84f348 100644
--- a/va416xx/src/dma/chnl_priority_set.rs
+++ b/va416xx/src/dma/chnl_priority_set.rs
@@ -43,30 +43,26 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Channel PRIORITY set"]
     #[inline(always)]
-    #[must_use]
     pub fn ch0(&mut self) -> Ch0W<ChnlPrioritySetSpec> {
         Ch0W::new(self, 0)
     }
     #[doc = "Bit 1 - Channel PRIORITY set"]
     #[inline(always)]
-    #[must_use]
     pub fn ch1(&mut self) -> Ch1W<ChnlPrioritySetSpec> {
         Ch1W::new(self, 1)
     }
     #[doc = "Bit 2 - Channel PRIORITY set"]
     #[inline(always)]
-    #[must_use]
     pub fn ch2(&mut self) -> Ch2W<ChnlPrioritySetSpec> {
         Ch2W::new(self, 2)
     }
     #[doc = "Bit 3 - Channel PRIORITY set"]
     #[inline(always)]
-    #[must_use]
     pub fn ch3(&mut self) -> Ch3W<ChnlPrioritySetSpec> {
         Ch3W::new(self, 3)
     }
 }
-#[doc = "DMA channel priority set\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`chnl_priority_set::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`chnl_priority_set::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "DMA channel priority set\n\nYou can [`read`](crate::Reg::read) this register and get [`chnl_priority_set::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chnl_priority_set::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct ChnlPrioritySetSpec;
 impl crate::RegisterSpec for ChnlPrioritySetSpec {
     type Ux = u32;
diff --git a/va416xx/src/dma/chnl_req_mask_clr.rs b/va416xx/src/dma/chnl_req_mask_clr.rs
index 3074105..89943ea 100644
--- a/va416xx/src/dma/chnl_req_mask_clr.rs
+++ b/va416xx/src/dma/chnl_req_mask_clr.rs
@@ -43,30 +43,26 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Channel Request Mask clear"]
     #[inline(always)]
-    #[must_use]
     pub fn ch0(&mut self) -> Ch0W<ChnlReqMaskClrSpec> {
         Ch0W::new(self, 0)
     }
     #[doc = "Bit 1 - Channel Request Mask clear"]
     #[inline(always)]
-    #[must_use]
     pub fn ch1(&mut self) -> Ch1W<ChnlReqMaskClrSpec> {
         Ch1W::new(self, 1)
     }
     #[doc = "Bit 2 - Channel Request Mask clear"]
     #[inline(always)]
-    #[must_use]
     pub fn ch2(&mut self) -> Ch2W<ChnlReqMaskClrSpec> {
         Ch2W::new(self, 2)
     }
     #[doc = "Bit 3 - Channel Request Mask clear"]
     #[inline(always)]
-    #[must_use]
     pub fn ch3(&mut self) -> Ch3W<ChnlReqMaskClrSpec> {
         Ch3W::new(self, 3)
     }
 }
-#[doc = "DMA channel request mask clear\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`chnl_req_mask_clr::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`chnl_req_mask_clr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "DMA channel request mask clear\n\nYou can [`read`](crate::Reg::read) this register and get [`chnl_req_mask_clr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chnl_req_mask_clr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct ChnlReqMaskClrSpec;
 impl crate::RegisterSpec for ChnlReqMaskClrSpec {
     type Ux = u32;
diff --git a/va416xx/src/dma/chnl_req_mask_set.rs b/va416xx/src/dma/chnl_req_mask_set.rs
index ded1e6a..df33c09 100644
--- a/va416xx/src/dma/chnl_req_mask_set.rs
+++ b/va416xx/src/dma/chnl_req_mask_set.rs
@@ -43,30 +43,26 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Channel Request Mask set"]
     #[inline(always)]
-    #[must_use]
     pub fn ch0(&mut self) -> Ch0W<ChnlReqMaskSetSpec> {
         Ch0W::new(self, 0)
     }
     #[doc = "Bit 1 - Channel Request Mask set"]
     #[inline(always)]
-    #[must_use]
     pub fn ch1(&mut self) -> Ch1W<ChnlReqMaskSetSpec> {
         Ch1W::new(self, 1)
     }
     #[doc = "Bit 2 - Channel Request Mask set"]
     #[inline(always)]
-    #[must_use]
     pub fn ch2(&mut self) -> Ch2W<ChnlReqMaskSetSpec> {
         Ch2W::new(self, 2)
     }
     #[doc = "Bit 3 - Channel Request Mask set"]
     #[inline(always)]
-    #[must_use]
     pub fn ch3(&mut self) -> Ch3W<ChnlReqMaskSetSpec> {
         Ch3W::new(self, 3)
     }
 }
-#[doc = "DMA channel request mask set\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`chnl_req_mask_set::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`chnl_req_mask_set::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "DMA channel request mask set\n\nYou can [`read`](crate::Reg::read) this register and get [`chnl_req_mask_set::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chnl_req_mask_set::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct ChnlReqMaskSetSpec;
 impl crate::RegisterSpec for ChnlReqMaskSetSpec {
     type Ux = u32;
diff --git a/va416xx/src/dma/chnl_sw_request.rs b/va416xx/src/dma/chnl_sw_request.rs
index 4a72688..dae0c61 100644
--- a/va416xx/src/dma/chnl_sw_request.rs
+++ b/va416xx/src/dma/chnl_sw_request.rs
@@ -11,30 +11,26 @@ pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG>;
 impl W {
     #[doc = "Bit 0 - Channel SW request"]
     #[inline(always)]
-    #[must_use]
     pub fn ch0(&mut self) -> Ch0W<ChnlSwRequestSpec> {
         Ch0W::new(self, 0)
     }
     #[doc = "Bit 1 - Channel SW request"]
     #[inline(always)]
-    #[must_use]
     pub fn ch1(&mut self) -> Ch1W<ChnlSwRequestSpec> {
         Ch1W::new(self, 1)
     }
     #[doc = "Bit 2 - Channel SW request"]
     #[inline(always)]
-    #[must_use]
     pub fn ch2(&mut self) -> Ch2W<ChnlSwRequestSpec> {
         Ch2W::new(self, 2)
     }
     #[doc = "Bit 3 - Channel SW request"]
     #[inline(always)]
-    #[must_use]
     pub fn ch3(&mut self) -> Ch3W<ChnlSwRequestSpec> {
         Ch3W::new(self, 3)
     }
 }
-#[doc = "DMA channel software request\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`chnl_sw_request::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "DMA channel software request\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chnl_sw_request::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct ChnlSwRequestSpec;
 impl crate::RegisterSpec for ChnlSwRequestSpec {
     type Ux = u32;
diff --git a/va416xx/src/dma/chnl_useburst_clr.rs b/va416xx/src/dma/chnl_useburst_clr.rs
index 622218d..cf4ea8e 100644
--- a/va416xx/src/dma/chnl_useburst_clr.rs
+++ b/va416xx/src/dma/chnl_useburst_clr.rs
@@ -43,30 +43,26 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Channel use burst clear"]
     #[inline(always)]
-    #[must_use]
     pub fn ch0(&mut self) -> Ch0W<ChnlUseburstClrSpec> {
         Ch0W::new(self, 0)
     }
     #[doc = "Bit 1 - Channel use burst clear"]
     #[inline(always)]
-    #[must_use]
     pub fn ch1(&mut self) -> Ch1W<ChnlUseburstClrSpec> {
         Ch1W::new(self, 1)
     }
     #[doc = "Bit 2 - Channel use burst clear"]
     #[inline(always)]
-    #[must_use]
     pub fn ch2(&mut self) -> Ch2W<ChnlUseburstClrSpec> {
         Ch2W::new(self, 2)
     }
     #[doc = "Bit 3 - Channel use burst clear"]
     #[inline(always)]
-    #[must_use]
     pub fn ch3(&mut self) -> Ch3W<ChnlUseburstClrSpec> {
         Ch3W::new(self, 3)
     }
 }
-#[doc = "DMA channel useburst clear\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`chnl_useburst_clr::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`chnl_useburst_clr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "DMA channel useburst clear\n\nYou can [`read`](crate::Reg::read) this register and get [`chnl_useburst_clr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chnl_useburst_clr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct ChnlUseburstClrSpec;
 impl crate::RegisterSpec for ChnlUseburstClrSpec {
     type Ux = u32;
diff --git a/va416xx/src/dma/chnl_useburst_set.rs b/va416xx/src/dma/chnl_useburst_set.rs
index 432d463..61f3d29 100644
--- a/va416xx/src/dma/chnl_useburst_set.rs
+++ b/va416xx/src/dma/chnl_useburst_set.rs
@@ -43,30 +43,26 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Channel use burst set"]
     #[inline(always)]
-    #[must_use]
     pub fn ch0(&mut self) -> Ch0W<ChnlUseburstSetSpec> {
         Ch0W::new(self, 0)
     }
     #[doc = "Bit 1 - Channel use burst set"]
     #[inline(always)]
-    #[must_use]
     pub fn ch1(&mut self) -> Ch1W<ChnlUseburstSetSpec> {
         Ch1W::new(self, 1)
     }
     #[doc = "Bit 2 - Channel use burst set"]
     #[inline(always)]
-    #[must_use]
     pub fn ch2(&mut self) -> Ch2W<ChnlUseburstSetSpec> {
         Ch2W::new(self, 2)
     }
     #[doc = "Bit 3 - Channel use burst set"]
     #[inline(always)]
-    #[must_use]
     pub fn ch3(&mut self) -> Ch3W<ChnlUseburstSetSpec> {
         Ch3W::new(self, 3)
     }
 }
-#[doc = "DMA channel useburst set\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`chnl_useburst_set::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`chnl_useburst_set::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "DMA channel useburst set\n\nYou can [`read`](crate::Reg::read) this register and get [`chnl_useburst_set::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chnl_useburst_set::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct ChnlUseburstSetSpec;
 impl crate::RegisterSpec for ChnlUseburstSetSpec {
     type Ux = u32;
diff --git a/va416xx/src/dma/ctrl_base_ptr.rs b/va416xx/src/dma/ctrl_base_ptr.rs
index 810ddc6..57b620a 100644
--- a/va416xx/src/dma/ctrl_base_ptr.rs
+++ b/va416xx/src/dma/ctrl_base_ptr.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 7:31 - Base Pointer for DMA Control Registers"]
     #[inline(always)]
-    #[must_use]
     pub fn ctrl_base_ptr(&mut self) -> CtrlBasePtrW<CtrlBasePtrSpec> {
         CtrlBasePtrW::new(self, 7)
     }
 }
-#[doc = "Base Pointer for DMA Control Registers\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctrl_base_ptr::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctrl_base_ptr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Base Pointer for DMA Control Registers\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl_base_ptr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl_base_ptr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct CtrlBasePtrSpec;
 impl crate::RegisterSpec for CtrlBasePtrSpec {
     type Ux = u32;
diff --git a/va416xx/src/dma/dma_active_clr.rs b/va416xx/src/dma/dma_active_clr.rs
index 0c962e3..d27b598 100644
--- a/va416xx/src/dma/dma_active_clr.rs
+++ b/va416xx/src/dma/dma_active_clr.rs
@@ -43,30 +43,26 @@ impl R {
 impl W {
     #[doc = "Bit 0 - DMA Active clear"]
     #[inline(always)]
-    #[must_use]
     pub fn ch0(&mut self) -> Ch0W<DmaActiveClrSpec> {
         Ch0W::new(self, 0)
     }
     #[doc = "Bit 1 - DMA Active clear"]
     #[inline(always)]
-    #[must_use]
     pub fn ch1(&mut self) -> Ch1W<DmaActiveClrSpec> {
         Ch1W::new(self, 1)
     }
     #[doc = "Bit 2 - DMA Active clear"]
     #[inline(always)]
-    #[must_use]
     pub fn ch2(&mut self) -> Ch2W<DmaActiveClrSpec> {
         Ch2W::new(self, 2)
     }
     #[doc = "Bit 3 - DMA Active clear"]
     #[inline(always)]
-    #[must_use]
     pub fn ch3(&mut self) -> Ch3W<DmaActiveClrSpec> {
         Ch3W::new(self, 3)
     }
 }
-#[doc = "DMA active clear\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_active_clr::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_active_clr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "DMA active clear\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_active_clr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_active_clr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct DmaActiveClrSpec;
 impl crate::RegisterSpec for DmaActiveClrSpec {
     type Ux = u32;
diff --git a/va416xx/src/dma/dma_active_set.rs b/va416xx/src/dma/dma_active_set.rs
index 55f9f8e..78b2e72 100644
--- a/va416xx/src/dma/dma_active_set.rs
+++ b/va416xx/src/dma/dma_active_set.rs
@@ -43,30 +43,26 @@ impl R {
 impl W {
     #[doc = "Bit 0 - DMA Active Set"]
     #[inline(always)]
-    #[must_use]
     pub fn ch0(&mut self) -> Ch0W<DmaActiveSetSpec> {
         Ch0W::new(self, 0)
     }
     #[doc = "Bit 1 - DMA Active Set"]
     #[inline(always)]
-    #[must_use]
     pub fn ch1(&mut self) -> Ch1W<DmaActiveSetSpec> {
         Ch1W::new(self, 1)
     }
     #[doc = "Bit 2 - DMA Active Set"]
     #[inline(always)]
-    #[must_use]
     pub fn ch2(&mut self) -> Ch2W<DmaActiveSetSpec> {
         Ch2W::new(self, 2)
     }
     #[doc = "Bit 3 - DMA Active Set"]
     #[inline(always)]
-    #[must_use]
     pub fn ch3(&mut self) -> Ch3W<DmaActiveSetSpec> {
         Ch3W::new(self, 3)
     }
 }
-#[doc = "DMA active set\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_active_set::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_active_set::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "DMA active set\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_active_set::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_active_set::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct DmaActiveSetSpec;
 impl crate::RegisterSpec for DmaActiveSetSpec {
     type Ux = u32;
diff --git a/va416xx/src/dma/dma_done_clr.rs b/va416xx/src/dma/dma_done_clr.rs
index 2a1091d..797a6b2 100644
--- a/va416xx/src/dma/dma_done_clr.rs
+++ b/va416xx/src/dma/dma_done_clr.rs
@@ -43,30 +43,26 @@ impl R {
 impl W {
     #[doc = "Bit 0 - DMA Done clear for this CH"]
     #[inline(always)]
-    #[must_use]
     pub fn ch0(&mut self) -> Ch0W<DmaDoneClrSpec> {
         Ch0W::new(self, 0)
     }
     #[doc = "Bit 1 - DMA Done clear for this CH"]
     #[inline(always)]
-    #[must_use]
     pub fn ch1(&mut self) -> Ch1W<DmaDoneClrSpec> {
         Ch1W::new(self, 1)
     }
     #[doc = "Bit 2 - DMA Done clear for this CH"]
     #[inline(always)]
-    #[must_use]
     pub fn ch2(&mut self) -> Ch2W<DmaDoneClrSpec> {
         Ch2W::new(self, 2)
     }
     #[doc = "Bit 3 - DMA Done clear for this CH"]
     #[inline(always)]
-    #[must_use]
     pub fn ch3(&mut self) -> Ch3W<DmaDoneClrSpec> {
         Ch3W::new(self, 3)
     }
 }
-#[doc = "DMA done clear\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_done_clr::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_done_clr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "DMA done clear\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_done_clr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_done_clr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct DmaDoneClrSpec;
 impl crate::RegisterSpec for DmaDoneClrSpec {
     type Ux = u32;
diff --git a/va416xx/src/dma/dma_done_set.rs b/va416xx/src/dma/dma_done_set.rs
index 632ac90..2c7457b 100644
--- a/va416xx/src/dma/dma_done_set.rs
+++ b/va416xx/src/dma/dma_done_set.rs
@@ -43,30 +43,26 @@ impl R {
 impl W {
     #[doc = "Bit 0 - DMA Done Set for this CH"]
     #[inline(always)]
-    #[must_use]
     pub fn ch0(&mut self) -> Ch0W<DmaDoneSetSpec> {
         Ch0W::new(self, 0)
     }
     #[doc = "Bit 1 - DMA Done Set for this CH"]
     #[inline(always)]
-    #[must_use]
     pub fn ch1(&mut self) -> Ch1W<DmaDoneSetSpec> {
         Ch1W::new(self, 1)
     }
     #[doc = "Bit 2 - DMA Done Set for this CH"]
     #[inline(always)]
-    #[must_use]
     pub fn ch2(&mut self) -> Ch2W<DmaDoneSetSpec> {
         Ch2W::new(self, 2)
     }
     #[doc = "Bit 3 - DMA Done Set for this CH"]
     #[inline(always)]
-    #[must_use]
     pub fn ch3(&mut self) -> Ch3W<DmaDoneSetSpec> {
         Ch3W::new(self, 3)
     }
 }
-#[doc = "DMA done set\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_done_set::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_done_set::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "DMA done set\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_done_set::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_done_set::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct DmaDoneSetSpec;
 impl crate::RegisterSpec for DmaDoneSetSpec {
     type Ux = u32;
diff --git a/va416xx/src/dma/dma_req_status.rs b/va416xx/src/dma/dma_req_status.rs
index b93aeeb..7fe6643 100644
--- a/va416xx/src/dma/dma_req_status.rs
+++ b/va416xx/src/dma/dma_req_status.rs
@@ -43,30 +43,26 @@ impl R {
 impl W {
     #[doc = "Bit 0 - DMA Request Status for this CH"]
     #[inline(always)]
-    #[must_use]
     pub fn ch0(&mut self) -> Ch0W<DmaReqStatusSpec> {
         Ch0W::new(self, 0)
     }
     #[doc = "Bit 1 - DMA Request Status for this CH"]
     #[inline(always)]
-    #[must_use]
     pub fn ch1(&mut self) -> Ch1W<DmaReqStatusSpec> {
         Ch1W::new(self, 1)
     }
     #[doc = "Bit 2 - DMA Request Status for this CH"]
     #[inline(always)]
-    #[must_use]
     pub fn ch2(&mut self) -> Ch2W<DmaReqStatusSpec> {
         Ch2W::new(self, 2)
     }
     #[doc = "Bit 3 - DMA Request Status for this CH"]
     #[inline(always)]
-    #[must_use]
     pub fn ch3(&mut self) -> Ch3W<DmaReqStatusSpec> {
         Ch3W::new(self, 3)
     }
 }
-#[doc = "DMA Configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_req_status::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_req_status::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "DMA Configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_req_status::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_req_status::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct DmaReqStatusSpec;
 impl crate::RegisterSpec for DmaReqStatusSpec {
     type Ux = u32;
diff --git a/va416xx/src/dma/dma_sreq_status.rs b/va416xx/src/dma/dma_sreq_status.rs
index a091bfb..47ae061 100644
--- a/va416xx/src/dma/dma_sreq_status.rs
+++ b/va416xx/src/dma/dma_sreq_status.rs
@@ -43,30 +43,26 @@ impl R {
 impl W {
     #[doc = "Bit 0 - DMA SRequest Status for this CH"]
     #[inline(always)]
-    #[must_use]
     pub fn ch0(&mut self) -> Ch0W<DmaSreqStatusSpec> {
         Ch0W::new(self, 0)
     }
     #[doc = "Bit 1 - DMA SRequest Status for this CH"]
     #[inline(always)]
-    #[must_use]
     pub fn ch1(&mut self) -> Ch1W<DmaSreqStatusSpec> {
         Ch1W::new(self, 1)
     }
     #[doc = "Bit 2 - DMA SRequest Status for this CH"]
     #[inline(always)]
-    #[must_use]
     pub fn ch2(&mut self) -> Ch2W<DmaSreqStatusSpec> {
         Ch2W::new(self, 2)
     }
     #[doc = "Bit 3 - DMA SRequest Status for this CH"]
     #[inline(always)]
-    #[must_use]
     pub fn ch3(&mut self) -> Ch3W<DmaSreqStatusSpec> {
         Ch3W::new(self, 3)
     }
 }
-#[doc = "DMA single request status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_sreq_status::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_sreq_status::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "DMA single request status\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_sreq_status::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_sreq_status::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct DmaSreqStatusSpec;
 impl crate::RegisterSpec for DmaSreqStatusSpec {
     type Ux = u32;
diff --git a/va416xx/src/dma/err_clr.rs b/va416xx/src/dma/err_clr.rs
index aecfeea..867c09f 100644
--- a/va416xx/src/dma/err_clr.rs
+++ b/va416xx/src/dma/err_clr.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Error Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn err_clr(&mut self) -> ErrClrW<ErrClrSpec> {
         ErrClrW::new(self, 0)
     }
 }
-#[doc = "DMA bus error clear\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`err_clr::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`err_clr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "DMA bus error clear\n\nYou can [`read`](crate::Reg::read) this register and get [`err_clr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`err_clr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct ErrClrSpec;
 impl crate::RegisterSpec for ErrClrSpec {
     type Ux = u32;
diff --git a/va416xx/src/dma/err_set.rs b/va416xx/src/dma/err_set.rs
index 02b3c6b..5126960 100644
--- a/va416xx/src/dma/err_set.rs
+++ b/va416xx/src/dma/err_set.rs
@@ -12,7 +12,7 @@ impl R {
     }
 }
 impl W {}
-#[doc = "DMA bus error set\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`err_set::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`err_set::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "DMA bus error set\n\nYou can [`read`](crate::Reg::read) this register and get [`err_set::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`err_set::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct ErrSetSpec;
 impl crate::RegisterSpec for ErrSetSpec {
     type Ux = u32;
diff --git a/va416xx/src/dma/integration_cfg.rs b/va416xx/src/dma/integration_cfg.rs
index cc131c1..88921a6 100644
--- a/va416xx/src/dma/integration_cfg.rs
+++ b/va416xx/src/dma/integration_cfg.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Error Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn int_test_en(&mut self) -> IntTestEnW<IntegrationCfgSpec> {
         IntTestEnW::new(self, 0)
     }
 }
-#[doc = "DMA integration configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`integration_cfg::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`integration_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "DMA integration configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`integration_cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`integration_cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct IntegrationCfgSpec;
 impl crate::RegisterSpec for IntegrationCfgSpec {
     type Ux = u32;
diff --git a/va416xx/src/dma/periph_id_0.rs b/va416xx/src/dma/periph_id_0.rs
index b54baa4..a2f5681 100644
--- a/va416xx/src/dma/periph_id_0.rs
+++ b/va416xx/src/dma/periph_id_0.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Part Number"]
     #[inline(always)]
-    #[must_use]
     pub fn part_number_0(&mut self) -> PartNumber0W<PeriphId0Spec> {
         PartNumber0W::new(self, 0)
     }
 }
-#[doc = "DMA Peripheral ID 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`periph_id_0::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`periph_id_0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "DMA Peripheral ID 0\n\nYou can [`read`](crate::Reg::read) this register and get [`periph_id_0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`periph_id_0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct PeriphId0Spec;
 impl crate::RegisterSpec for PeriphId0Spec {
     type Ux = u32;
diff --git a/va416xx/src/dma/periph_id_1.rs b/va416xx/src/dma/periph_id_1.rs
index e8cef83..b033fdc 100644
--- a/va416xx/src/dma/periph_id_1.rs
+++ b/va416xx/src/dma/periph_id_1.rs
@@ -16,7 +16,7 @@ impl R {
         Jep106Id3_0R::new(((self.bits >> 4) & 0x0f) as u8)
     }
 }
-#[doc = "DMA Peripheral ID 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`periph_id_1::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "DMA Peripheral ID 1\n\nYou can [`read`](crate::Reg::read) this register and get [`periph_id_1::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct PeriphId1Spec;
 impl crate::RegisterSpec for PeriphId1Spec {
     type Ux = u32;
diff --git a/va416xx/src/dma/periph_id_2.rs b/va416xx/src/dma/periph_id_2.rs
index 8f7bcf2..ee84e75 100644
--- a/va416xx/src/dma/periph_id_2.rs
+++ b/va416xx/src/dma/periph_id_2.rs
@@ -34,24 +34,21 @@ impl R {
 impl W {
     #[doc = "Bits 0:2 - JEP106"]
     #[inline(always)]
-    #[must_use]
     pub fn jep106_id_6_4(&mut self) -> Jep106Id6_4W<PeriphId2Spec> {
         Jep106Id6_4W::new(self, 0)
     }
     #[doc = "Bit 3 - JEDEC"]
     #[inline(always)]
-    #[must_use]
     pub fn jedec_used(&mut self) -> JedecUsedW<PeriphId2Spec> {
         JedecUsedW::new(self, 3)
     }
     #[doc = "Bits 4:7 - Revision"]
     #[inline(always)]
-    #[must_use]
     pub fn revision(&mut self) -> RevisionW<PeriphId2Spec> {
         RevisionW::new(self, 4)
     }
 }
-#[doc = "DMA Peripheral ID 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`periph_id_2::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`periph_id_2::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "DMA Peripheral ID 2\n\nYou can [`read`](crate::Reg::read) this register and get [`periph_id_2::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`periph_id_2::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct PeriphId2Spec;
 impl crate::RegisterSpec for PeriphId2Spec {
     type Ux = u32;
diff --git a/va416xx/src/dma/periph_id_3.rs b/va416xx/src/dma/periph_id_3.rs
index 94d92ce..7c72872 100644
--- a/va416xx/src/dma/periph_id_3.rs
+++ b/va416xx/src/dma/periph_id_3.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:3 - Controller Modifications"]
     #[inline(always)]
-    #[must_use]
     pub fn mod_number(&mut self) -> ModNumberW<PeriphId3Spec> {
         ModNumberW::new(self, 0)
     }
 }
-#[doc = "DMA Peripheral ID 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`periph_id_3::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`periph_id_3::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "DMA Peripheral ID 3\n\nYou can [`read`](crate::Reg::read) this register and get [`periph_id_3::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`periph_id_3::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct PeriphId3Spec;
 impl crate::RegisterSpec for PeriphId3Spec {
     type Ux = u32;
diff --git a/va416xx/src/dma/periph_id_4.rs b/va416xx/src/dma/periph_id_4.rs
index 215d604..44c9e2d 100644
--- a/va416xx/src/dma/periph_id_4.rs
+++ b/va416xx/src/dma/periph_id_4.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:3 - JEP106"]
     #[inline(always)]
-    #[must_use]
     pub fn jep106_c_code(&mut self) -> Jep106CCodeW<PeriphId4Spec> {
         Jep106CCodeW::new(self, 0)
     }
     #[doc = "Bits 4:7 - The Number of 4k Address Blocks Required"]
     #[inline(always)]
-    #[must_use]
     pub fn block_count(&mut self) -> BlockCountW<PeriphId4Spec> {
         BlockCountW::new(self, 4)
     }
 }
-#[doc = "DMA Peripheral ID 4\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`periph_id_4::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`periph_id_4::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "DMA Peripheral ID 4\n\nYou can [`read`](crate::Reg::read) this register and get [`periph_id_4::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`periph_id_4::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct PeriphId4Spec;
 impl crate::RegisterSpec for PeriphId4Spec {
     type Ux = u32;
diff --git a/va416xx/src/dma/primecell_id_0.rs b/va416xx/src/dma/primecell_id_0.rs
index 21fa74f..ab2420e 100644
--- a/va416xx/src/dma/primecell_id_0.rs
+++ b/va416xx/src/dma/primecell_id_0.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - PrimeCell Identification"]
     #[inline(always)]
-    #[must_use]
     pub fn primecell_id_0(&mut self) -> PrimecellId0W<PrimecellId0Spec> {
         PrimecellId0W::new(self, 0)
     }
 }
-#[doc = "DMA PrimeCell ID 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`primecell_id_0::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`primecell_id_0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "DMA PrimeCell ID 0\n\nYou can [`read`](crate::Reg::read) this register and get [`primecell_id_0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`primecell_id_0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct PrimecellId0Spec;
 impl crate::RegisterSpec for PrimecellId0Spec {
     type Ux = u32;
diff --git a/va416xx/src/dma/primecell_id_1.rs b/va416xx/src/dma/primecell_id_1.rs
index 7afe1c7..a082f1c 100644
--- a/va416xx/src/dma/primecell_id_1.rs
+++ b/va416xx/src/dma/primecell_id_1.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - PrimeCell Identification"]
     #[inline(always)]
-    #[must_use]
     pub fn primecell_id_1(&mut self) -> PrimecellId1W<PrimecellId1Spec> {
         PrimecellId1W::new(self, 0)
     }
 }
-#[doc = "DMA PrimeCell ID 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`primecell_id_1::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`primecell_id_1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "DMA PrimeCell ID 1\n\nYou can [`read`](crate::Reg::read) this register and get [`primecell_id_1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`primecell_id_1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct PrimecellId1Spec;
 impl crate::RegisterSpec for PrimecellId1Spec {
     type Ux = u32;
diff --git a/va416xx/src/dma/primecell_id_2.rs b/va416xx/src/dma/primecell_id_2.rs
index 9f593e2..af81f60 100644
--- a/va416xx/src/dma/primecell_id_2.rs
+++ b/va416xx/src/dma/primecell_id_2.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - PrimeCell Identification"]
     #[inline(always)]
-    #[must_use]
     pub fn primecell_id_2(&mut self) -> PrimecellId2W<PrimecellId2Spec> {
         PrimecellId2W::new(self, 0)
     }
 }
-#[doc = "DMA PrimeCell ID 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`primecell_id_2::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`primecell_id_2::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "DMA PrimeCell ID 2\n\nYou can [`read`](crate::Reg::read) this register and get [`primecell_id_2::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`primecell_id_2::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct PrimecellId2Spec;
 impl crate::RegisterSpec for PrimecellId2Spec {
     type Ux = u32;
diff --git a/va416xx/src/dma/primecell_id_3.rs b/va416xx/src/dma/primecell_id_3.rs
index 36e5875..5e2df47 100644
--- a/va416xx/src/dma/primecell_id_3.rs
+++ b/va416xx/src/dma/primecell_id_3.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - PrimeCell Identification"]
     #[inline(always)]
-    #[must_use]
     pub fn primecell_id_3(&mut self) -> PrimecellId3W<PrimecellId3Spec> {
         PrimecellId3W::new(self, 0)
     }
 }
-#[doc = "DMA PrimeCell ID 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`primecell_id_3::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`primecell_id_3::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "DMA PrimeCell ID 3\n\nYou can [`read`](crate::Reg::read) this register and get [`primecell_id_3::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`primecell_id_3::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct PrimecellId3Spec;
 impl crate::RegisterSpec for PrimecellId3Spec {
     type Ux = u32;
diff --git a/va416xx/src/dma/stall_status.rs b/va416xx/src/dma/stall_status.rs
index 067c1ae..0af31a8 100644
--- a/va416xx/src/dma/stall_status.rs
+++ b/va416xx/src/dma/stall_status.rs
@@ -12,7 +12,7 @@ impl R {
     }
 }
 impl W {}
-#[doc = "DMA stall status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`stall_status::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`stall_status::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "DMA stall status\n\nYou can [`read`](crate::Reg::read) this register and get [`stall_status::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`stall_status::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct StallStatusSpec;
 impl crate::RegisterSpec for StallStatusSpec {
     type Ux = u32;
diff --git a/va416xx/src/dma/status.rs b/va416xx/src/dma/status.rs
index 65dfd07..866022d 100644
--- a/va416xx/src/dma/status.rs
+++ b/va416xx/src/dma/status.rs
@@ -30,7 +30,7 @@ impl R {
         TestStatusR::new(((self.bits >> 28) & 0x0f) as u8)
     }
 }
-#[doc = "DMA Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`status::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "DMA Status\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct StatusSpec;
 impl crate::RegisterSpec for StatusSpec {
     type Ux = u32;
diff --git a/va416xx/src/dma/waitonreq_status.rs b/va416xx/src/dma/waitonreq_status.rs
index a5cdb49..6e9ca87 100644
--- a/va416xx/src/dma/waitonreq_status.rs
+++ b/va416xx/src/dma/waitonreq_status.rs
@@ -30,7 +30,7 @@ impl R {
         Ch3R::new(((self.bits >> 3) & 1) != 0)
     }
 }
-#[doc = "DMA channel wait on request status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`waitonreq_status::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "DMA channel wait on request status\n\nYou can [`read`](crate::Reg::read) this register and get [`waitonreq_status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct WaitonreqStatusSpec;
 impl crate::RegisterSpec for WaitonreqStatusSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth.rs b/va416xx/src/eth.rs
index d547318..dcddd35 100644
--- a/va416xx/src/eth.rs
+++ b/va416xx/src/eth.rs
@@ -585,571 +585,571 @@ impl RegisterBlock {
         &self.dma_curr_rx_bufr_addr
     }
 }
-#[doc = "MAC_CONFIG (rw) register accessor: Operation mode register for the MAC\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_config::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mac_config::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_config`]
+#[doc = "MAC_CONFIG (rw) register accessor: Operation mode register for the MAC\n\nYou can [`read`](crate::Reg::read) this register and get [`mac_config::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mac_config::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_config`]
 module"]
 #[doc(alias = "MAC_CONFIG")]
 pub type MacConfig = crate::Reg<mac_config::MacConfigSpec>;
 #[doc = "Operation mode register for the MAC"]
 pub mod mac_config;
-#[doc = "MAC_FRAME_FLTR (rw) register accessor: Contains the frame filtering controls\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_frame_fltr::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mac_frame_fltr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_frame_fltr`]
+#[doc = "MAC_FRAME_FLTR (rw) register accessor: Contains the frame filtering controls\n\nYou can [`read`](crate::Reg::read) this register and get [`mac_frame_fltr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mac_frame_fltr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_frame_fltr`]
 module"]
 #[doc(alias = "MAC_FRAME_FLTR")]
 pub type MacFrameFltr = crate::Reg<mac_frame_fltr::MacFrameFltrSpec>;
 #[doc = "Contains the frame filtering controls"]
 pub mod mac_frame_fltr;
-#[doc = "MAC_GMII_ADDR (rw) register accessor: Controls the management cycles to an external PHY\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_gmii_addr::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mac_gmii_addr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_gmii_addr`]
+#[doc = "MAC_GMII_ADDR (rw) register accessor: Controls the management cycles to an external PHY\n\nYou can [`read`](crate::Reg::read) this register and get [`mac_gmii_addr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mac_gmii_addr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_gmii_addr`]
 module"]
 #[doc(alias = "MAC_GMII_ADDR")]
 pub type MacGmiiAddr = crate::Reg<mac_gmii_addr::MacGmiiAddrSpec>;
 #[doc = "Controls the management cycles to an external PHY"]
 pub mod mac_gmii_addr;
-#[doc = "MAC_GMII_DATA (rw) register accessor: Contains the data to be written to or read from the PHY register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_gmii_data::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mac_gmii_data::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_gmii_data`]
+#[doc = "MAC_GMII_DATA (rw) register accessor: Contains the data to be written to or read from the PHY register\n\nYou can [`read`](crate::Reg::read) this register and get [`mac_gmii_data::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mac_gmii_data::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_gmii_data`]
 module"]
 #[doc(alias = "MAC_GMII_DATA")]
 pub type MacGmiiData = crate::Reg<mac_gmii_data::MacGmiiDataSpec>;
 #[doc = "Contains the data to be written to or read from the PHY register"]
 pub mod mac_gmii_data;
-#[doc = "MAC_FLOW_CTRL (rw) register accessor: Controls the generation of control frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_flow_ctrl::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mac_flow_ctrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_flow_ctrl`]
+#[doc = "MAC_FLOW_CTRL (rw) register accessor: Controls the generation of control frames\n\nYou can [`read`](crate::Reg::read) this register and get [`mac_flow_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mac_flow_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_flow_ctrl`]
 module"]
 #[doc(alias = "MAC_FLOW_CTRL")]
 pub type MacFlowCtrl = crate::Reg<mac_flow_ctrl::MacFlowCtrlSpec>;
 #[doc = "Controls the generation of control frames"]
 pub mod mac_flow_ctrl;
-#[doc = "MAC_VLAN_TAG (rw) register accessor: Identifies IEEE 802.1Q VLAN type frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_vlan_tag::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mac_vlan_tag::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_vlan_tag`]
+#[doc = "MAC_VLAN_TAG (rw) register accessor: Identifies IEEE 802.1Q VLAN type frames\n\nYou can [`read`](crate::Reg::read) this register and get [`mac_vlan_tag::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mac_vlan_tag::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_vlan_tag`]
 module"]
 #[doc(alias = "MAC_VLAN_TAG")]
 pub type MacVlanTag = crate::Reg<mac_vlan_tag::MacVlanTagSpec>;
 #[doc = "Identifies IEEE 802.1Q VLAN type frames"]
 pub mod mac_vlan_tag;
-#[doc = "MAC_DEBUG (r) register accessor: Gives the status of the various internal blocks for debugging\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_debug::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_debug`]
+#[doc = "MAC_DEBUG (r) register accessor: Gives the status of the various internal blocks for debugging\n\nYou can [`read`](crate::Reg::read) this register and get [`mac_debug::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_debug`]
 module"]
 #[doc(alias = "MAC_DEBUG")]
 pub type MacDebug = crate::Reg<mac_debug::MacDebugSpec>;
 #[doc = "Gives the status of the various internal blocks for debugging"]
 pub mod mac_debug;
-#[doc = "MAC_INTR_STAT (r) register accessor: Contains the interrupt status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_intr_stat::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_intr_stat`]
+#[doc = "MAC_INTR_STAT (r) register accessor: Contains the interrupt status\n\nYou can [`read`](crate::Reg::read) this register and get [`mac_intr_stat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_intr_stat`]
 module"]
 #[doc(alias = "MAC_INTR_STAT")]
 pub type MacIntrStat = crate::Reg<mac_intr_stat::MacIntrStatSpec>;
 #[doc = "Contains the interrupt status"]
 pub mod mac_intr_stat;
-#[doc = "MAC_INTR_MASK (rw) register accessor: Contains the masks for generating interrupt\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_intr_mask::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mac_intr_mask::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_intr_mask`]
+#[doc = "MAC_INTR_MASK (rw) register accessor: Contains the masks for generating interrupt\n\nYou can [`read`](crate::Reg::read) this register and get [`mac_intr_mask::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mac_intr_mask::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_intr_mask`]
 module"]
 #[doc(alias = "MAC_INTR_MASK")]
 pub type MacIntrMask = crate::Reg<mac_intr_mask::MacIntrMaskSpec>;
 #[doc = "Contains the masks for generating interrupt"]
 pub mod mac_intr_mask;
-#[doc = "MAC_ADDR_H (rw) register accessor: Contains the high 16-bits of the first MAC Address\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_addr_h::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mac_addr_h::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_addr_h`]
+#[doc = "MAC_ADDR_H (rw) register accessor: Contains the high 16-bits of the first MAC Address\n\nYou can [`read`](crate::Reg::read) this register and get [`mac_addr_h::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mac_addr_h::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_addr_h`]
 module"]
 #[doc(alias = "MAC_ADDR_H")]
 pub type MacAddrH = crate::Reg<mac_addr_h::MacAddrHSpec>;
 #[doc = "Contains the high 16-bits of the first MAC Address"]
 pub mod mac_addr_h;
-#[doc = "MAC_ADDR_L (rw) register accessor: Contains the Low 32-bits of the first MAC Address\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_addr_l::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mac_addr_l::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_addr_l`]
+#[doc = "MAC_ADDR_L (rw) register accessor: Contains the Low 32-bits of the first MAC Address\n\nYou can [`read`](crate::Reg::read) this register and get [`mac_addr_l::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mac_addr_l::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_addr_l`]
 module"]
 #[doc(alias = "MAC_ADDR_L")]
 pub type MacAddrL = crate::Reg<mac_addr_l::MacAddrLSpec>;
 #[doc = "Contains the Low 32-bits of the first MAC Address"]
 pub mod mac_addr_l;
-#[doc = "MAC_WDOG_TO (rw) register accessor: Controls the watchdog time-out for received frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_wdog_to::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mac_wdog_to::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_wdog_to`]
+#[doc = "MAC_WDOG_TO (rw) register accessor: Controls the watchdog time-out for received frames\n\nYou can [`read`](crate::Reg::read) this register and get [`mac_wdog_to::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mac_wdog_to::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_wdog_to`]
 module"]
 #[doc(alias = "MAC_WDOG_TO")]
 pub type MacWdogTo = crate::Reg<mac_wdog_to::MacWdogToSpec>;
 #[doc = "Controls the watchdog time-out for received frames"]
 pub mod mac_wdog_to;
-#[doc = "MMC_CNTRL (rw) register accessor: MMC Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mmc_cntrl::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mmc_cntrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mmc_cntrl`]
+#[doc = "MMC_CNTRL (rw) register accessor: MMC Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mmc_cntrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mmc_cntrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mmc_cntrl`]
 module"]
 #[doc(alias = "MMC_CNTRL")]
 pub type MmcCntrl = crate::Reg<mmc_cntrl::MmcCntrlSpec>;
 #[doc = "MMC Control Register"]
 pub mod mmc_cntrl;
-#[doc = "MMC_INTR_RX (rw) register accessor: MMC Receive Interrupt Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mmc_intr_rx::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mmc_intr_rx::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mmc_intr_rx`]
+#[doc = "MMC_INTR_RX (rw) register accessor: MMC Receive Interrupt Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mmc_intr_rx::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mmc_intr_rx::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mmc_intr_rx`]
 module"]
 #[doc(alias = "MMC_INTR_RX")]
 pub type MmcIntrRx = crate::Reg<mmc_intr_rx::MmcIntrRxSpec>;
 #[doc = "MMC Receive Interrupt Register"]
 pub mod mmc_intr_rx;
-#[doc = "MMC_INTR_TX (rw) register accessor: MMC Transmit Interrupt Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mmc_intr_tx::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mmc_intr_tx::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mmc_intr_tx`]
+#[doc = "MMC_INTR_TX (rw) register accessor: MMC Transmit Interrupt Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mmc_intr_tx::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mmc_intr_tx::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mmc_intr_tx`]
 module"]
 #[doc(alias = "MMC_INTR_TX")]
 pub type MmcIntrTx = crate::Reg<mmc_intr_tx::MmcIntrTxSpec>;
 #[doc = "MMC Transmit Interrupt Register"]
 pub mod mmc_intr_tx;
-#[doc = "MMC_INTR_MASK_RX (rw) register accessor: MMC Receive Interrupt Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mmc_intr_mask_rx::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mmc_intr_mask_rx::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mmc_intr_mask_rx`]
+#[doc = "MMC_INTR_MASK_RX (rw) register accessor: MMC Receive Interrupt Mask Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mmc_intr_mask_rx::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mmc_intr_mask_rx::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mmc_intr_mask_rx`]
 module"]
 #[doc(alias = "MMC_INTR_MASK_RX")]
 pub type MmcIntrMaskRx = crate::Reg<mmc_intr_mask_rx::MmcIntrMaskRxSpec>;
 #[doc = "MMC Receive Interrupt Mask Register"]
 pub mod mmc_intr_mask_rx;
-#[doc = "MMC_INTR_MASK_TX (rw) register accessor: MMC Transmit Interrupt Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mmc_intr_mask_tx::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mmc_intr_mask_tx::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mmc_intr_mask_tx`]
+#[doc = "MMC_INTR_MASK_TX (rw) register accessor: MMC Transmit Interrupt Mask Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mmc_intr_mask_tx::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mmc_intr_mask_tx::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mmc_intr_mask_tx`]
 module"]
 #[doc(alias = "MMC_INTR_MASK_TX")]
 pub type MmcIntrMaskTx = crate::Reg<mmc_intr_mask_tx::MmcIntrMaskTxSpec>;
 #[doc = "MMC Transmit Interrupt Mask Register"]
 pub mod mmc_intr_mask_tx;
-#[doc = "TXOCTETCOUNT_GB (r) register accessor: MMC Transmit Count\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txoctetcount_gb::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txoctetcount_gb`]
+#[doc = "TXOCTETCOUNT_GB (r) register accessor: MMC Transmit Count\n\nYou can [`read`](crate::Reg::read) this register and get [`txoctetcount_gb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txoctetcount_gb`]
 module"]
 #[doc(alias = "TXOCTETCOUNT_GB")]
 pub type TxoctetcountGb = crate::Reg<txoctetcount_gb::TxoctetcountGbSpec>;
 #[doc = "MMC Transmit Count"]
 pub mod txoctetcount_gb;
-#[doc = "TXFRAMECOUNT_GB (r) register accessor: MMC Frame Count Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txframecount_gb::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txframecount_gb`]
+#[doc = "TXFRAMECOUNT_GB (r) register accessor: MMC Frame Count Register\n\nYou can [`read`](crate::Reg::read) this register and get [`txframecount_gb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txframecount_gb`]
 module"]
 #[doc(alias = "TXFRAMECOUNT_GB")]
 pub type TxframecountGb = crate::Reg<txframecount_gb::TxframecountGbSpec>;
 #[doc = "MMC Frame Count Register"]
 pub mod txframecount_gb;
-#[doc = "TXBCASTFRAMES_G (r) register accessor: MMC Good Broadcast Frames Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txbcastframes_g::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txbcastframes_g`]
+#[doc = "TXBCASTFRAMES_G (r) register accessor: MMC Good Broadcast Frames Register\n\nYou can [`read`](crate::Reg::read) this register and get [`txbcastframes_g::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txbcastframes_g`]
 module"]
 #[doc(alias = "TXBCASTFRAMES_G")]
 pub type TxbcastframesG = crate::Reg<txbcastframes_g::TxbcastframesGSpec>;
 #[doc = "MMC Good Broadcast Frames Register"]
 pub mod txbcastframes_g;
-#[doc = "TXMCASTFRAMES_G (r) register accessor: MMC Good Multicast Frames Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txmcastframes_g::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txmcastframes_g`]
+#[doc = "TXMCASTFRAMES_G (r) register accessor: MMC Good Multicast Frames Register\n\nYou can [`read`](crate::Reg::read) this register and get [`txmcastframes_g::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txmcastframes_g`]
 module"]
 #[doc(alias = "TXMCASTFRAMES_G")]
 pub type TxmcastframesG = crate::Reg<txmcastframes_g::TxmcastframesGSpec>;
 #[doc = "MMC Good Multicast Frames Register"]
 pub mod txmcastframes_g;
-#[doc = "TX64OCT_GB (r) register accessor: MMC Good and bad Frames transmitted with length 64\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx64oct_gb::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx64oct_gb`]
+#[doc = "TX64OCT_GB (r) register accessor: MMC Good and bad Frames transmitted with length 64\n\nYou can [`read`](crate::Reg::read) this register and get [`tx64oct_gb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx64oct_gb`]
 module"]
 #[doc(alias = "TX64OCT_GB")]
 pub type Tx64octGb = crate::Reg<tx64oct_gb::Tx64octGbSpec>;
 #[doc = "MMC Good and bad Frames transmitted with length 64"]
 pub mod tx64oct_gb;
-#[doc = "TX65TO127OCT_GB (r) register accessor: MMC Good and bad Frames transmitted with length 65 to 127\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx65to127oct_gb::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx65to127oct_gb`]
+#[doc = "TX65TO127OCT_GB (r) register accessor: MMC Good and bad Frames transmitted with length 65 to 127\n\nYou can [`read`](crate::Reg::read) this register and get [`tx65to127oct_gb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx65to127oct_gb`]
 module"]
 #[doc(alias = "TX65TO127OCT_GB")]
 pub type Tx65to127octGb = crate::Reg<tx65to127oct_gb::Tx65to127octGbSpec>;
 #[doc = "MMC Good and bad Frames transmitted with length 65 to 127"]
 pub mod tx65to127oct_gb;
-#[doc = "TX128TO255OCT_GB (r) register accessor: MMC Good and bad Frames transmitted with length 128 to 255\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx128to255oct_gb::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx128to255oct_gb`]
+#[doc = "TX128TO255OCT_GB (r) register accessor: MMC Good and bad Frames transmitted with length 128 to 255\n\nYou can [`read`](crate::Reg::read) this register and get [`tx128to255oct_gb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx128to255oct_gb`]
 module"]
 #[doc(alias = "TX128TO255OCT_GB")]
 pub type Tx128to255octGb = crate::Reg<tx128to255oct_gb::Tx128to255octGbSpec>;
 #[doc = "MMC Good and bad Frames transmitted with length 128 to 255"]
 pub mod tx128to255oct_gb;
-#[doc = "TX256TO511OCT_GB (r) register accessor: MMC Good and bad Frames transmitted with length 256 to 511\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx256to511oct_gb::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx256to511oct_gb`]
+#[doc = "TX256TO511OCT_GB (r) register accessor: MMC Good and bad Frames transmitted with length 256 to 511\n\nYou can [`read`](crate::Reg::read) this register and get [`tx256to511oct_gb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx256to511oct_gb`]
 module"]
 #[doc(alias = "TX256TO511OCT_GB")]
 pub type Tx256to511octGb = crate::Reg<tx256to511oct_gb::Tx256to511octGbSpec>;
 #[doc = "MMC Good and bad Frames transmitted with length 256 to 511"]
 pub mod tx256to511oct_gb;
-#[doc = "TX512TO1023OCT_GB (r) register accessor: MMC Good and bad Frames transmitted with length 512 to 1023\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx512to1023oct_gb::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx512to1023oct_gb`]
+#[doc = "TX512TO1023OCT_GB (r) register accessor: MMC Good and bad Frames transmitted with length 512 to 1023\n\nYou can [`read`](crate::Reg::read) this register and get [`tx512to1023oct_gb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx512to1023oct_gb`]
 module"]
 #[doc(alias = "TX512TO1023OCT_GB")]
 pub type Tx512to1023octGb = crate::Reg<tx512to1023oct_gb::Tx512to1023octGbSpec>;
 #[doc = "MMC Good and bad Frames transmitted with length 512 to 1023"]
 pub mod tx512to1023oct_gb;
-#[doc = "TX1024MAXOCT_GB (r) register accessor: MMC Good and bad Frames transmitted with length 1024 to max bytes\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx1024maxoct_gb::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx1024maxoct_gb`]
+#[doc = "TX1024MAXOCT_GB (r) register accessor: MMC Good and bad Frames transmitted with length 1024 to max bytes\n\nYou can [`read`](crate::Reg::read) this register and get [`tx1024maxoct_gb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx1024maxoct_gb`]
 module"]
 #[doc(alias = "TX1024MAXOCT_GB")]
 pub type Tx1024maxoctGb = crate::Reg<tx1024maxoct_gb::Tx1024maxoctGbSpec>;
 #[doc = "MMC Good and bad Frames transmitted with length 1024 to max bytes"]
 pub mod tx1024maxoct_gb;
-#[doc = "TXUCASTFRAME_GB (r) register accessor: MMC number of good and bad unicast frames transmitted\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txucastframe_gb::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txucastframe_gb`]
+#[doc = "TXUCASTFRAME_GB (r) register accessor: MMC number of good and bad unicast frames transmitted\n\nYou can [`read`](crate::Reg::read) this register and get [`txucastframe_gb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txucastframe_gb`]
 module"]
 #[doc(alias = "TXUCASTFRAME_GB")]
 pub type TxucastframeGb = crate::Reg<txucastframe_gb::TxucastframeGbSpec>;
 #[doc = "MMC number of good and bad unicast frames transmitted"]
 pub mod txucastframe_gb;
-#[doc = "TXMCASTFRAME_GB (r) register accessor: MMC number of good and bad MULTIcast frames transmitted\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txmcastframe_gb::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txmcastframe_gb`]
+#[doc = "TXMCASTFRAME_GB (r) register accessor: MMC number of good and bad MULTIcast frames transmitted\n\nYou can [`read`](crate::Reg::read) this register and get [`txmcastframe_gb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txmcastframe_gb`]
 module"]
 #[doc(alias = "TXMCASTFRAME_GB")]
 pub type TxmcastframeGb = crate::Reg<txmcastframe_gb::TxmcastframeGbSpec>;
 #[doc = "MMC number of good and bad MULTIcast frames transmitted"]
 pub mod txmcastframe_gb;
-#[doc = "TXBCASTFRAME_GB (r) register accessor: MMC number of good and bad broadcast frames transmitted\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txbcastframe_gb::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txbcastframe_gb`]
+#[doc = "TXBCASTFRAME_GB (r) register accessor: MMC number of good and bad broadcast frames transmitted\n\nYou can [`read`](crate::Reg::read) this register and get [`txbcastframe_gb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txbcastframe_gb`]
 module"]
 #[doc(alias = "TXBCASTFRAME_GB")]
 pub type TxbcastframeGb = crate::Reg<txbcastframe_gb::TxbcastframeGbSpec>;
 #[doc = "MMC number of good and bad broadcast frames transmitted"]
 pub mod txbcastframe_gb;
-#[doc = "TXUNDERERR (r) register accessor: MMC number of frames aborted because of frame underflow error\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txundererr::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txundererr`]
+#[doc = "TXUNDERERR (r) register accessor: MMC number of frames aborted because of frame underflow error\n\nYou can [`read`](crate::Reg::read) this register and get [`txundererr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txundererr`]
 module"]
 #[doc(alias = "TXUNDERERR")]
 pub type Txundererr = crate::Reg<txundererr::TxundererrSpec>;
 #[doc = "MMC number of frames aborted because of frame underflow error"]
 pub mod txundererr;
-#[doc = "TXSINGLECOL_G (r) register accessor: MMC Number of successfully transmitted frames after a single collision\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txsinglecol_g::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txsinglecol_g`]
+#[doc = "TXSINGLECOL_G (r) register accessor: MMC Number of successfully transmitted frames after a single collision\n\nYou can [`read`](crate::Reg::read) this register and get [`txsinglecol_g::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txsinglecol_g`]
 module"]
 #[doc(alias = "TXSINGLECOL_G")]
 pub type TxsinglecolG = crate::Reg<txsinglecol_g::TxsinglecolGSpec>;
 #[doc = "MMC Number of successfully transmitted frames after a single collision"]
 pub mod txsinglecol_g;
-#[doc = "TXMULTICOL_G (r) register accessor: MMC Number of successfully transmitted frames after multiple collisions\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txmulticol_g::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txmulticol_g`]
+#[doc = "TXMULTICOL_G (r) register accessor: MMC Number of successfully transmitted frames after multiple collisions\n\nYou can [`read`](crate::Reg::read) this register and get [`txmulticol_g::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txmulticol_g`]
 module"]
 #[doc(alias = "TXMULTICOL_G")]
 pub type TxmulticolG = crate::Reg<txmulticol_g::TxmulticolGSpec>;
 #[doc = "MMC Number of successfully transmitted frames after multiple collisions"]
 pub mod txmulticol_g;
-#[doc = "TXDEFERRED (r) register accessor: MMC Number of successfully transmitted frames after a deferral\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txdeferred::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txdeferred`]
+#[doc = "TXDEFERRED (r) register accessor: MMC Number of successfully transmitted frames after a deferral\n\nYou can [`read`](crate::Reg::read) this register and get [`txdeferred::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txdeferred`]
 module"]
 #[doc(alias = "TXDEFERRED")]
 pub type Txdeferred = crate::Reg<txdeferred::TxdeferredSpec>;
 #[doc = "MMC Number of successfully transmitted frames after a deferral"]
 pub mod txdeferred;
-#[doc = "TXLATECOL (r) register accessor: MMC Number of aborted frames because of late collision error\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txlatecol::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txlatecol`]
+#[doc = "TXLATECOL (r) register accessor: MMC Number of aborted frames because of late collision error\n\nYou can [`read`](crate::Reg::read) this register and get [`txlatecol::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txlatecol`]
 module"]
 #[doc(alias = "TXLATECOL")]
 pub type Txlatecol = crate::Reg<txlatecol::TxlatecolSpec>;
 #[doc = "MMC Number of aborted frames because of late collision error"]
 pub mod txlatecol;
-#[doc = "TXEXESSCOL (r) register accessor: MMC Number of aborted frames because of excessive collision errors\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txexesscol::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txexesscol`]
+#[doc = "TXEXESSCOL (r) register accessor: MMC Number of aborted frames because of excessive collision errors\n\nYou can [`read`](crate::Reg::read) this register and get [`txexesscol::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txexesscol`]
 module"]
 #[doc(alias = "TXEXESSCOL")]
 pub type Txexesscol = crate::Reg<txexesscol::TxexesscolSpec>;
 #[doc = "MMC Number of aborted frames because of excessive collision errors"]
 pub mod txexesscol;
-#[doc = "TXCARRIERERROR (r) register accessor: MMC Number of aborted frames because of carrier sense error\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txcarriererror::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txcarriererror`]
+#[doc = "TXCARRIERERROR (r) register accessor: MMC Number of aborted frames because of carrier sense error\n\nYou can [`read`](crate::Reg::read) this register and get [`txcarriererror::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txcarriererror`]
 module"]
 #[doc(alias = "TXCARRIERERROR")]
 pub type Txcarriererror = crate::Reg<txcarriererror::TxcarriererrorSpec>;
 #[doc = "MMC Number of aborted frames because of carrier sense error"]
 pub mod txcarriererror;
-#[doc = "TXOCTETCOUNT_G (r) register accessor: MMC Number of bytes transmitted frames only in good frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txoctetcount_g::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txoctetcount_g`]
+#[doc = "TXOCTETCOUNT_G (r) register accessor: MMC Number of bytes transmitted frames only in good frames\n\nYou can [`read`](crate::Reg::read) this register and get [`txoctetcount_g::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txoctetcount_g`]
 module"]
 #[doc(alias = "TXOCTETCOUNT_G")]
 pub type TxoctetcountG = crate::Reg<txoctetcount_g::TxoctetcountGSpec>;
 #[doc = "MMC Number of bytes transmitted frames only in good frames"]
 pub mod txoctetcount_g;
-#[doc = "TXFRAMECOUNT_G (r) register accessor: MMC Number of good frames transmitted\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txframecount_g::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txframecount_g`]
+#[doc = "TXFRAMECOUNT_G (r) register accessor: MMC Number of good frames transmitted\n\nYou can [`read`](crate::Reg::read) this register and get [`txframecount_g::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txframecount_g`]
 module"]
 #[doc(alias = "TXFRAMECOUNT_G")]
 pub type TxframecountG = crate::Reg<txframecount_g::TxframecountGSpec>;
 #[doc = "MMC Number of good frames transmitted"]
 pub mod txframecount_g;
-#[doc = "TXEXCESSDEF (r) register accessor: MMC Number of frames aborted because of excessive deferral error\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txexcessdef::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txexcessdef`]
+#[doc = "TXEXCESSDEF (r) register accessor: MMC Number of frames aborted because of excessive deferral error\n\nYou can [`read`](crate::Reg::read) this register and get [`txexcessdef::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txexcessdef`]
 module"]
 #[doc(alias = "TXEXCESSDEF")]
 pub type Txexcessdef = crate::Reg<txexcessdef::TxexcessdefSpec>;
 #[doc = "MMC Number of frames aborted because of excessive deferral error"]
 pub mod txexcessdef;
-#[doc = "TXPAUSEFRAMES (r) register accessor: MMC Number of good pause frames transmitted\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txpauseframes::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txpauseframes`]
+#[doc = "TXPAUSEFRAMES (r) register accessor: MMC Number of good pause frames transmitted\n\nYou can [`read`](crate::Reg::read) this register and get [`txpauseframes::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txpauseframes`]
 module"]
 #[doc(alias = "TXPAUSEFRAMES")]
 pub type Txpauseframes = crate::Reg<txpauseframes::TxpauseframesSpec>;
 #[doc = "MMC Number of good pause frames transmitted"]
 pub mod txpauseframes;
-#[doc = "TXLANFRAMES_G (r) register accessor: MMC Number of good VLAN frames transmitted\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txlanframes_g::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txlanframes_g`]
+#[doc = "TXLANFRAMES_G (r) register accessor: MMC Number of good VLAN frames transmitted\n\nYou can [`read`](crate::Reg::read) this register and get [`txlanframes_g::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txlanframes_g`]
 module"]
 #[doc(alias = "TXLANFRAMES_G")]
 pub type TxlanframesG = crate::Reg<txlanframes_g::TxlanframesGSpec>;
 #[doc = "MMC Number of good VLAN frames transmitted"]
 pub mod txlanframes_g;
-#[doc = "TXOVERSIZE_G (r) register accessor: MMC Number of frames transmitted without errors\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txoversize_g::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txoversize_g`]
+#[doc = "TXOVERSIZE_G (r) register accessor: MMC Number of frames transmitted without errors\n\nYou can [`read`](crate::Reg::read) this register and get [`txoversize_g::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txoversize_g`]
 module"]
 #[doc(alias = "TXOVERSIZE_G")]
 pub type TxoversizeG = crate::Reg<txoversize_g::TxoversizeGSpec>;
 #[doc = "MMC Number of frames transmitted without errors"]
 pub mod txoversize_g;
-#[doc = "RXFRAMECOUNT_GB (r) register accessor: MMC Number of good and bad frames received\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxframecount_gb::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxframecount_gb`]
+#[doc = "RXFRAMECOUNT_GB (r) register accessor: MMC Number of good and bad frames received\n\nYou can [`read`](crate::Reg::read) this register and get [`rxframecount_gb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxframecount_gb`]
 module"]
 #[doc(alias = "RXFRAMECOUNT_GB")]
 pub type RxframecountGb = crate::Reg<rxframecount_gb::RxframecountGbSpec>;
 #[doc = "MMC Number of good and bad frames received"]
 pub mod rxframecount_gb;
-#[doc = "RXOCTETCOUNT_GB (r) register accessor: MMC Number of bytes received in good and bad frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxoctetcount_gb::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxoctetcount_gb`]
+#[doc = "RXOCTETCOUNT_GB (r) register accessor: MMC Number of bytes received in good and bad frames\n\nYou can [`read`](crate::Reg::read) this register and get [`rxoctetcount_gb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxoctetcount_gb`]
 module"]
 #[doc(alias = "RXOCTETCOUNT_GB")]
 pub type RxoctetcountGb = crate::Reg<rxoctetcount_gb::RxoctetcountGbSpec>;
 #[doc = "MMC Number of bytes received in good and bad frames"]
 pub mod rxoctetcount_gb;
-#[doc = "RXOCTETCOUNT_G (r) register accessor: MMC Number of bytes received in good frames only\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxoctetcount_g::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxoctetcount_g`]
+#[doc = "RXOCTETCOUNT_G (r) register accessor: MMC Number of bytes received in good frames only\n\nYou can [`read`](crate::Reg::read) this register and get [`rxoctetcount_g::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxoctetcount_g`]
 module"]
 #[doc(alias = "RXOCTETCOUNT_G")]
 pub type RxoctetcountG = crate::Reg<rxoctetcount_g::RxoctetcountGSpec>;
 #[doc = "MMC Number of bytes received in good frames only"]
 pub mod rxoctetcount_g;
-#[doc = "RXBCASTFRAMES_G (r) register accessor: MMC Number of good broadcast frames received\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxbcastframes_g::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxbcastframes_g`]
+#[doc = "RXBCASTFRAMES_G (r) register accessor: MMC Number of good broadcast frames received\n\nYou can [`read`](crate::Reg::read) this register and get [`rxbcastframes_g::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxbcastframes_g`]
 module"]
 #[doc(alias = "RXBCASTFRAMES_G")]
 pub type RxbcastframesG = crate::Reg<rxbcastframes_g::RxbcastframesGSpec>;
 #[doc = "MMC Number of good broadcast frames received"]
 pub mod rxbcastframes_g;
-#[doc = "RXMCASTFRAMES_G (r) register accessor: MMC Number of good multicast frames received\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxmcastframes_g::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxmcastframes_g`]
+#[doc = "RXMCASTFRAMES_G (r) register accessor: MMC Number of good multicast frames received\n\nYou can [`read`](crate::Reg::read) this register and get [`rxmcastframes_g::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxmcastframes_g`]
 module"]
 #[doc(alias = "RXMCASTFRAMES_G")]
 pub type RxmcastframesG = crate::Reg<rxmcastframes_g::RxmcastframesGSpec>;
 #[doc = "MMC Number of good multicast frames received"]
 pub mod rxmcastframes_g;
-#[doc = "RXCRCERROR (r) register accessor: MMC Number of frames received with CRC error\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxcrcerror::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxcrcerror`]
+#[doc = "RXCRCERROR (r) register accessor: MMC Number of frames received with CRC error\n\nYou can [`read`](crate::Reg::read) this register and get [`rxcrcerror::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxcrcerror`]
 module"]
 #[doc(alias = "RXCRCERROR")]
 pub type Rxcrcerror = crate::Reg<rxcrcerror::RxcrcerrorSpec>;
 #[doc = "MMC Number of frames received with CRC error"]
 pub mod rxcrcerror;
-#[doc = "RXALIGNERROR (r) register accessor: MMC Number of frames received with alignment error\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxalignerror::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxalignerror`]
+#[doc = "RXALIGNERROR (r) register accessor: MMC Number of frames received with alignment error\n\nYou can [`read`](crate::Reg::read) this register and get [`rxalignerror::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxalignerror`]
 module"]
 #[doc(alias = "RXALIGNERROR")]
 pub type Rxalignerror = crate::Reg<rxalignerror::RxalignerrorSpec>;
 #[doc = "MMC Number of frames received with alignment error"]
 pub mod rxalignerror;
-#[doc = "RXRUNTERROR (r) register accessor: MMC Number of frames received with runt error\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxrunterror::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxrunterror`]
+#[doc = "RXRUNTERROR (r) register accessor: MMC Number of frames received with runt error\n\nYou can [`read`](crate::Reg::read) this register and get [`rxrunterror::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxrunterror`]
 module"]
 #[doc(alias = "RXRUNTERROR")]
 pub type Rxrunterror = crate::Reg<rxrunterror::RxrunterrorSpec>;
 #[doc = "MMC Number of frames received with runt error"]
 pub mod rxrunterror;
-#[doc = "RXJABBERERROR (r) register accessor: MMC Number of giant frames received with length greater than 1518 bytes and with CRC error\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxjabbererror::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxjabbererror`]
+#[doc = "RXJABBERERROR (r) register accessor: MMC Number of giant frames received with length greater than 1518 bytes and with CRC error\n\nYou can [`read`](crate::Reg::read) this register and get [`rxjabbererror::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxjabbererror`]
 module"]
 #[doc(alias = "RXJABBERERROR")]
 pub type Rxjabbererror = crate::Reg<rxjabbererror::RxjabbererrorSpec>;
 #[doc = "MMC Number of giant frames received with length greater than 1518 bytes and with CRC error"]
 pub mod rxjabbererror;
-#[doc = "RXUNDERSIZE_G (r) register accessor: MMC Number of frames received with length less than 64 bytes\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxundersize_g::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxundersize_g`]
+#[doc = "RXUNDERSIZE_G (r) register accessor: MMC Number of frames received with length less than 64 bytes\n\nYou can [`read`](crate::Reg::read) this register and get [`rxundersize_g::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxundersize_g`]
 module"]
 #[doc(alias = "RXUNDERSIZE_G")]
 pub type RxundersizeG = crate::Reg<rxundersize_g::RxundersizeGSpec>;
 #[doc = "MMC Number of frames received with length less than 64 bytes"]
 pub mod rxundersize_g;
-#[doc = "RXOVERSIZE_G (r) register accessor: MMC Number of frames received without errors with length greater than the max size\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxoversize_g::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxoversize_g`]
+#[doc = "RXOVERSIZE_G (r) register accessor: MMC Number of frames received without errors with length greater than the max size\n\nYou can [`read`](crate::Reg::read) this register and get [`rxoversize_g::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxoversize_g`]
 module"]
 #[doc(alias = "RXOVERSIZE_G")]
 pub type RxoversizeG = crate::Reg<rxoversize_g::RxoversizeGSpec>;
 #[doc = "MMC Number of frames received without errors with length greater than the max size"]
 pub mod rxoversize_g;
-#[doc = "RX64OCTETS_GB (r) register accessor: MMC Number of good and bad frames received with length 64 bytes\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx64octets_gb::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx64octets_gb`]
+#[doc = "RX64OCTETS_GB (r) register accessor: MMC Number of good and bad frames received with length 64 bytes\n\nYou can [`read`](crate::Reg::read) this register and get [`rx64octets_gb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx64octets_gb`]
 module"]
 #[doc(alias = "RX64OCTETS_GB")]
 pub type Rx64octetsGb = crate::Reg<rx64octets_gb::Rx64octetsGbSpec>;
 #[doc = "MMC Number of good and bad frames received with length 64 bytes"]
 pub mod rx64octets_gb;
-#[doc = "RX65TO127OCT_GB (r) register accessor: MMC Number of good and bad frames received with length between 65 and 127 bytes\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx65to127oct_gb::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx65to127oct_gb`]
+#[doc = "RX65TO127OCT_GB (r) register accessor: MMC Number of good and bad frames received with length between 65 and 127 bytes\n\nYou can [`read`](crate::Reg::read) this register and get [`rx65to127oct_gb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx65to127oct_gb`]
 module"]
 #[doc(alias = "RX65TO127OCT_GB")]
 pub type Rx65to127octGb = crate::Reg<rx65to127oct_gb::Rx65to127octGbSpec>;
 #[doc = "MMC Number of good and bad frames received with length between 65 and 127 bytes"]
 pub mod rx65to127oct_gb;
-#[doc = "RX128TO255OCT_GB (r) register accessor: MMC Number of good and bad frames received with length between 128 and 255 bytes\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx128to255oct_gb::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx128to255oct_gb`]
+#[doc = "RX128TO255OCT_GB (r) register accessor: MMC Number of good and bad frames received with length between 128 and 255 bytes\n\nYou can [`read`](crate::Reg::read) this register and get [`rx128to255oct_gb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx128to255oct_gb`]
 module"]
 #[doc(alias = "RX128TO255OCT_GB")]
 pub type Rx128to255octGb = crate::Reg<rx128to255oct_gb::Rx128to255octGbSpec>;
 #[doc = "MMC Number of good and bad frames received with length between 128 and 255 bytes"]
 pub mod rx128to255oct_gb;
-#[doc = "RX256TO511OCT_GB (r) register accessor: MMC Number of good and bad frames received with length between 256 and 511 bytes\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx256to511oct_gb::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx256to511oct_gb`]
+#[doc = "RX256TO511OCT_GB (r) register accessor: MMC Number of good and bad frames received with length between 256 and 511 bytes\n\nYou can [`read`](crate::Reg::read) this register and get [`rx256to511oct_gb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx256to511oct_gb`]
 module"]
 #[doc(alias = "RX256TO511OCT_GB")]
 pub type Rx256to511octGb = crate::Reg<rx256to511oct_gb::Rx256to511octGbSpec>;
 #[doc = "MMC Number of good and bad frames received with length between 256 and 511 bytes"]
 pub mod rx256to511oct_gb;
-#[doc = "RX512TO1023OCT_GB (r) register accessor: MMC Number of good and bad frames received with length between 512 and 1023 bytes\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx512to1023oct_gb::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx512to1023oct_gb`]
+#[doc = "RX512TO1023OCT_GB (r) register accessor: MMC Number of good and bad frames received with length between 512 and 1023 bytes\n\nYou can [`read`](crate::Reg::read) this register and get [`rx512to1023oct_gb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx512to1023oct_gb`]
 module"]
 #[doc(alias = "RX512TO1023OCT_GB")]
 pub type Rx512to1023octGb = crate::Reg<rx512to1023oct_gb::Rx512to1023octGbSpec>;
 #[doc = "MMC Number of good and bad frames received with length between 512 and 1023 bytes"]
 pub mod rx512to1023oct_gb;
-#[doc = "RX1024MAXOCT_GB (r) register accessor: MMC Number of good and bad frames received with length between 1024 and max size bytes\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx1024maxoct_gb::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx1024maxoct_gb`]
+#[doc = "RX1024MAXOCT_GB (r) register accessor: MMC Number of good and bad frames received with length between 1024 and max size bytes\n\nYou can [`read`](crate::Reg::read) this register and get [`rx1024maxoct_gb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx1024maxoct_gb`]
 module"]
 #[doc(alias = "RX1024MAXOCT_GB")]
 pub type Rx1024maxoctGb = crate::Reg<rx1024maxoct_gb::Rx1024maxoctGbSpec>;
 #[doc = "MMC Number of good and bad frames received with length between 1024 and max size bytes"]
 pub mod rx1024maxoct_gb;
-#[doc = "RXUCASTFRAMES_G (r) register accessor: MMC Number of received good unicast frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxucastframes_g::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxucastframes_g`]
+#[doc = "RXUCASTFRAMES_G (r) register accessor: MMC Number of received good unicast frames\n\nYou can [`read`](crate::Reg::read) this register and get [`rxucastframes_g::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxucastframes_g`]
 module"]
 #[doc(alias = "RXUCASTFRAMES_G")]
 pub type RxucastframesG = crate::Reg<rxucastframes_g::RxucastframesGSpec>;
 #[doc = "MMC Number of received good unicast frames"]
 pub mod rxucastframes_g;
-#[doc = "RXLENGTHERROR (r) register accessor: MMC Number of frames received with length error\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxlengtherror::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxlengtherror`]
+#[doc = "RXLENGTHERROR (r) register accessor: MMC Number of frames received with length error\n\nYou can [`read`](crate::Reg::read) this register and get [`rxlengtherror::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxlengtherror`]
 module"]
 #[doc(alias = "RXLENGTHERROR")]
 pub type Rxlengtherror = crate::Reg<rxlengtherror::RxlengtherrorSpec>;
 #[doc = "MMC Number of frames received with length error"]
 pub mod rxlengtherror;
-#[doc = "RXOUTRANGETYPE (r) register accessor: MMC Number of frames received with length field not equal to the valid frame size\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxoutrangetype::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxoutrangetype`]
+#[doc = "RXOUTRANGETYPE (r) register accessor: MMC Number of frames received with length field not equal to the valid frame size\n\nYou can [`read`](crate::Reg::read) this register and get [`rxoutrangetype::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxoutrangetype`]
 module"]
 #[doc(alias = "RXOUTRANGETYPE")]
 pub type Rxoutrangetype = crate::Reg<rxoutrangetype::RxoutrangetypeSpec>;
 #[doc = "MMC Number of frames received with length field not equal to the valid frame size"]
 pub mod rxoutrangetype;
-#[doc = "RXPAUSEFRAMES (r) register accessor: MMC Number of good and valid Pause frames received\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxpauseframes::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxpauseframes`]
+#[doc = "RXPAUSEFRAMES (r) register accessor: MMC Number of good and valid Pause frames received\n\nYou can [`read`](crate::Reg::read) this register and get [`rxpauseframes::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxpauseframes`]
 module"]
 #[doc(alias = "RXPAUSEFRAMES")]
 pub type Rxpauseframes = crate::Reg<rxpauseframes::RxpauseframesSpec>;
 #[doc = "MMC Number of good and valid Pause frames received"]
 pub mod rxpauseframes;
-#[doc = "RXFIFOOVERFLOW (r) register accessor: MMC Number of missed received frames because of FIFO overflow\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxfifooverflow::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxfifooverflow`]
+#[doc = "RXFIFOOVERFLOW (r) register accessor: MMC Number of missed received frames because of FIFO overflow\n\nYou can [`read`](crate::Reg::read) this register and get [`rxfifooverflow::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxfifooverflow`]
 module"]
 #[doc(alias = "RXFIFOOVERFLOW")]
 pub type Rxfifooverflow = crate::Reg<rxfifooverflow::RxfifooverflowSpec>;
 #[doc = "MMC Number of missed received frames because of FIFO overflow"]
 pub mod rxfifooverflow;
-#[doc = "RXVLANFRAMES_GB (r) register accessor: MMC Number of good and bad VLAN frames received\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxvlanframes_gb::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxvlanframes_gb`]
+#[doc = "RXVLANFRAMES_GB (r) register accessor: MMC Number of good and bad VLAN frames received\n\nYou can [`read`](crate::Reg::read) this register and get [`rxvlanframes_gb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxvlanframes_gb`]
 module"]
 #[doc(alias = "RXVLANFRAMES_GB")]
 pub type RxvlanframesGb = crate::Reg<rxvlanframes_gb::RxvlanframesGbSpec>;
 #[doc = "MMC Number of good and bad VLAN frames received"]
 pub mod rxvlanframes_gb;
-#[doc = "RXWDOGERROR (r) register accessor: MMC Number of frames received with error because of watchdog timeout error\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxwdogerror::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxwdogerror`]
+#[doc = "RXWDOGERROR (r) register accessor: MMC Number of frames received with error because of watchdog timeout error\n\nYou can [`read`](crate::Reg::read) this register and get [`rxwdogerror::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxwdogerror`]
 module"]
 #[doc(alias = "RXWDOGERROR")]
 pub type Rxwdogerror = crate::Reg<rxwdogerror::RxwdogerrorSpec>;
 #[doc = "MMC Number of frames received with error because of watchdog timeout error"]
 pub mod rxwdogerror;
-#[doc = "RXRCVERROR (r) register accessor: MMC Number of frames received with Receive error or Frame Extension error\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxrcverror::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxrcverror`]
+#[doc = "RXRCVERROR (r) register accessor: MMC Number of frames received with Receive error or Frame Extension error\n\nYou can [`read`](crate::Reg::read) this register and get [`rxrcverror::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxrcverror`]
 module"]
 #[doc(alias = "RXRCVERROR")]
 pub type Rxrcverror = crate::Reg<rxrcverror::RxrcverrorSpec>;
 #[doc = "MMC Number of frames received with Receive error or Frame Extension error"]
 pub mod rxrcverror;
-#[doc = "RXCTRLFRAMES_G (r) register accessor: MMC Number of received good control frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxctrlframes_g::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxctrlframes_g`]
+#[doc = "RXCTRLFRAMES_G (r) register accessor: MMC Number of received good control frames\n\nYou can [`read`](crate::Reg::read) this register and get [`rxctrlframes_g::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxctrlframes_g`]
 module"]
 #[doc(alias = "RXCTRLFRAMES_G")]
 pub type RxctrlframesG = crate::Reg<rxctrlframes_g::RxctrlframesGSpec>;
 #[doc = "MMC Number of received good control frames"]
 pub mod rxctrlframes_g;
-#[doc = "VLAN_INCREPLACE (rw) register accessor: Holds the VLAN Tag for insertion into or replacement in the transmit frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`vlan_increplace::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`vlan_increplace::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@vlan_increplace`]
+#[doc = "VLAN_INCREPLACE (rw) register accessor: Holds the VLAN Tag for insertion into or replacement in the transmit frames\n\nYou can [`read`](crate::Reg::read) this register and get [`vlan_increplace::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`vlan_increplace::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@vlan_increplace`]
 module"]
 #[doc(alias = "VLAN_INCREPLACE")]
 pub type VlanIncreplace = crate::Reg<vlan_increplace::VlanIncreplaceSpec>;
 #[doc = "Holds the VLAN Tag for insertion into or replacement in the transmit frames"]
 pub mod vlan_increplace;
-#[doc = "VLAN_HASHTABLE (rw) register accessor: Holds the VLAN Hash Table\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`vlan_hashtable::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`vlan_hashtable::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@vlan_hashtable`]
+#[doc = "VLAN_HASHTABLE (rw) register accessor: Holds the VLAN Hash Table\n\nYou can [`read`](crate::Reg::read) this register and get [`vlan_hashtable::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`vlan_hashtable::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@vlan_hashtable`]
 module"]
 #[doc(alias = "VLAN_HASHTABLE")]
 pub type VlanHashtable = crate::Reg<vlan_hashtable::VlanHashtableSpec>;
 #[doc = "Holds the VLAN Hash Table"]
 pub mod vlan_hashtable;
-#[doc = "TIMESTAMP_CTRL (rw) register accessor: Controls the IEEE 1588 timestamp generation and update logic\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`timestamp_ctrl::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`timestamp_ctrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timestamp_ctrl`]
+#[doc = "TIMESTAMP_CTRL (rw) register accessor: Controls the IEEE 1588 timestamp generation and update logic\n\nYou can [`read`](crate::Reg::read) this register and get [`timestamp_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timestamp_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timestamp_ctrl`]
 module"]
 #[doc(alias = "TIMESTAMP_CTRL")]
 pub type TimestampCtrl = crate::Reg<timestamp_ctrl::TimestampCtrlSpec>;
 #[doc = "Controls the IEEE 1588 timestamp generation and update logic"]
 pub mod timestamp_ctrl;
-#[doc = "SUBSEC_INC (rw) register accessor: Holds the 8-bit value by which the Sub-Second register is incremented\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`subsec_inc::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`subsec_inc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@subsec_inc`]
+#[doc = "SUBSEC_INC (rw) register accessor: Holds the 8-bit value by which the Sub-Second register is incremented\n\nYou can [`read`](crate::Reg::read) this register and get [`subsec_inc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`subsec_inc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@subsec_inc`]
 module"]
 #[doc(alias = "SUBSEC_INC")]
 pub type SubsecInc = crate::Reg<subsec_inc::SubsecIncSpec>;
 #[doc = "Holds the 8-bit value by which the Sub-Second register is incremented"]
 pub mod subsec_inc;
-#[doc = "SYSTIME_SECONDS (r) register accessor: Holds the lower 32 bits of the second field of the system time\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`systime_seconds::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@systime_seconds`]
+#[doc = "SYSTIME_SECONDS (r) register accessor: Holds the lower 32 bits of the second field of the system time\n\nYou can [`read`](crate::Reg::read) this register and get [`systime_seconds::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@systime_seconds`]
 module"]
 #[doc(alias = "SYSTIME_SECONDS")]
 pub type SystimeSeconds = crate::Reg<systime_seconds::SystimeSecondsSpec>;
 #[doc = "Holds the lower 32 bits of the second field of the system time"]
 pub mod systime_seconds;
-#[doc = "SYSTIME_NANOSEC (r) register accessor: Holds 32 bits of the nano-second field of the system time\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`systime_nanosec::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@systime_nanosec`]
+#[doc = "SYSTIME_NANOSEC (r) register accessor: Holds 32 bits of the nano-second field of the system time\n\nYou can [`read`](crate::Reg::read) this register and get [`systime_nanosec::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@systime_nanosec`]
 module"]
 #[doc(alias = "SYSTIME_NANOSEC")]
 pub type SystimeNanosec = crate::Reg<systime_nanosec::SystimeNanosecSpec>;
 #[doc = "Holds 32 bits of the nano-second field of the system time"]
 pub mod systime_nanosec;
-#[doc = "SYSTIME_SECSUPDAT (rw) register accessor: Holds the lower 32 bits of the second field to be written to, added to, or subtracted from the system time value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`systime_secsupdat::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`systime_secsupdat::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@systime_secsupdat`]
+#[doc = "SYSTIME_SECSUPDAT (rw) register accessor: Holds the lower 32 bits of the second field to be written to, added to, or subtracted from the system time value\n\nYou can [`read`](crate::Reg::read) this register and get [`systime_secsupdat::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`systime_secsupdat::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@systime_secsupdat`]
 module"]
 #[doc(alias = "SYSTIME_SECSUPDAT")]
 pub type SystimeSecsupdat = crate::Reg<systime_secsupdat::SystimeSecsupdatSpec>;
 #[doc = "Holds the lower 32 bits of the second field to be written to, added to, or subtracted from the system time value"]
 pub mod systime_secsupdat;
-#[doc = "SYSTIME_NSECUP (rw) register accessor: Holds 32 bits of the nano-second field to be written to, added to, or subtracted from the system time value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`systime_nsecup::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`systime_nsecup::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@systime_nsecup`]
+#[doc = "SYSTIME_NSECUP (rw) register accessor: Holds 32 bits of the nano-second field to be written to, added to, or subtracted from the system time value\n\nYou can [`read`](crate::Reg::read) this register and get [`systime_nsecup::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`systime_nsecup::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@systime_nsecup`]
 module"]
 #[doc(alias = "SYSTIME_NSECUP")]
 pub type SystimeNsecup = crate::Reg<systime_nsecup::SystimeNsecupSpec>;
 #[doc = "Holds 32 bits of the nano-second field to be written to, added to, or subtracted from the system time value"]
 pub mod systime_nsecup;
-#[doc = "TIMESTAMPADDEND (rw) register accessor: This register is used by software to re-adjust the clock frequency linearly to match the Master clock frequency\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`timestampaddend::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`timestampaddend::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timestampaddend`]
+#[doc = "TIMESTAMPADDEND (rw) register accessor: This register is used by software to re-adjust the clock frequency linearly to match the Master clock frequency\n\nYou can [`read`](crate::Reg::read) this register and get [`timestampaddend::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timestampaddend::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timestampaddend`]
 module"]
 #[doc(alias = "TIMESTAMPADDEND")]
 pub type Timestampaddend = crate::Reg<timestampaddend::TimestampaddendSpec>;
 #[doc = "This register is used by software to re-adjust the clock frequency linearly to match the Master clock frequency"]
 pub mod timestampaddend;
-#[doc = "TARGET_TIME_SECS (rw) register accessor: Holds the high 32-bits of time to be compared with the system time\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`target_time_secs::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`target_time_secs::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@target_time_secs`]
+#[doc = "TARGET_TIME_SECS (rw) register accessor: Holds the high 32-bits of time to be compared with the system time\n\nYou can [`read`](crate::Reg::read) this register and get [`target_time_secs::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`target_time_secs::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@target_time_secs`]
 module"]
 #[doc(alias = "TARGET_TIME_SECS")]
 pub type TargetTimeSecs = crate::Reg<target_time_secs::TargetTimeSecsSpec>;
 #[doc = "Holds the high 32-bits of time to be compared with the system time"]
 pub mod target_time_secs;
-#[doc = "TARGET_TIME_NSEC (rw) register accessor: Holds the lower 32-bits of time to be compared with the system time\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`target_time_nsec::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`target_time_nsec::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@target_time_nsec`]
+#[doc = "TARGET_TIME_NSEC (rw) register accessor: Holds the lower 32-bits of time to be compared with the system time\n\nYou can [`read`](crate::Reg::read) this register and get [`target_time_nsec::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`target_time_nsec::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@target_time_nsec`]
 module"]
 #[doc(alias = "TARGET_TIME_NSEC")]
 pub type TargetTimeNsec = crate::Reg<target_time_nsec::TargetTimeNsecSpec>;
 #[doc = "Holds the lower 32-bits of time to be compared with the system time"]
 pub mod target_time_nsec;
-#[doc = "DMA_BUS_MODE (rw) register accessor: Controls the DMA Host Interface Mode\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_bus_mode::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_bus_mode::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_bus_mode`]
+#[doc = "DMA_BUS_MODE (rw) register accessor: Controls the DMA Host Interface Mode\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_bus_mode::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_bus_mode::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_bus_mode`]
 module"]
 #[doc(alias = "DMA_BUS_MODE")]
 pub type DmaBusMode = crate::Reg<dma_bus_mode::DmaBusModeSpec>;
 #[doc = "Controls the DMA Host Interface Mode"]
 pub mod dma_bus_mode;
-#[doc = "DMA_TX_POLL_DEMAND (rw) register accessor: Used by the host to instruct the DMA to poll the transmit Descriptor list\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_tx_poll_demand::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_tx_poll_demand::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_tx_poll_demand`]
+#[doc = "DMA_TX_POLL_DEMAND (rw) register accessor: Used by the host to instruct the DMA to poll the transmit Descriptor list\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_tx_poll_demand::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_tx_poll_demand::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_tx_poll_demand`]
 module"]
 #[doc(alias = "DMA_TX_POLL_DEMAND")]
 pub type DmaTxPollDemand = crate::Reg<dma_tx_poll_demand::DmaTxPollDemandSpec>;
 #[doc = "Used by the host to instruct the DMA to poll the transmit Descriptor list"]
 pub mod dma_tx_poll_demand;
-#[doc = "DMA_RX_POLL_DEMAND (rw) register accessor: Used by the host to instruct the DMA to poll the Receive Descriptor list\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_rx_poll_demand::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_rx_poll_demand::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_rx_poll_demand`]
+#[doc = "DMA_RX_POLL_DEMAND (rw) register accessor: Used by the host to instruct the DMA to poll the Receive Descriptor list\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_rx_poll_demand::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_rx_poll_demand::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_rx_poll_demand`]
 module"]
 #[doc(alias = "DMA_RX_POLL_DEMAND")]
 pub type DmaRxPollDemand = crate::Reg<dma_rx_poll_demand::DmaRxPollDemandSpec>;
 #[doc = "Used by the host to instruct the DMA to poll the Receive Descriptor list"]
 pub mod dma_rx_poll_demand;
-#[doc = "DMA_RX_DESC_LIST_ADDR (rw) register accessor: Points the DMA to the start of the Receive Descriptor list\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_rx_desc_list_addr::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_rx_desc_list_addr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_rx_desc_list_addr`]
+#[doc = "DMA_RX_DESC_LIST_ADDR (rw) register accessor: Points the DMA to the start of the Receive Descriptor list\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_rx_desc_list_addr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_rx_desc_list_addr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_rx_desc_list_addr`]
 module"]
 #[doc(alias = "DMA_RX_DESC_LIST_ADDR")]
 pub type DmaRxDescListAddr = crate::Reg<dma_rx_desc_list_addr::DmaRxDescListAddrSpec>;
 #[doc = "Points the DMA to the start of the Receive Descriptor list"]
 pub mod dma_rx_desc_list_addr;
-#[doc = "DMA_TX_DESC_LIST_ADDR (rw) register accessor: Points the DMA to the start of the Transmit Descriptor list\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_tx_desc_list_addr::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_tx_desc_list_addr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_tx_desc_list_addr`]
+#[doc = "DMA_TX_DESC_LIST_ADDR (rw) register accessor: Points the DMA to the start of the Transmit Descriptor list\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_tx_desc_list_addr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_tx_desc_list_addr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_tx_desc_list_addr`]
 module"]
 #[doc(alias = "DMA_TX_DESC_LIST_ADDR")]
 pub type DmaTxDescListAddr = crate::Reg<dma_tx_desc_list_addr::DmaTxDescListAddrSpec>;
 #[doc = "Points the DMA to the start of the Transmit Descriptor list"]
 pub mod dma_tx_desc_list_addr;
-#[doc = "DMA_STATUS (r) register accessor: Used to determine the status of the DMA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_status::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_status`]
+#[doc = "DMA_STATUS (r) register accessor: Used to determine the status of the DMA\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_status`]
 module"]
 #[doc(alias = "DMA_STATUS")]
 pub type DmaStatus = crate::Reg<dma_status::DmaStatusSpec>;
 #[doc = "Used to determine the status of the DMA"]
 pub mod dma_status;
-#[doc = "DMA_OPER_MODE (rw) register accessor: Sets the Receive and Transmit operation mode and command\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_oper_mode::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_oper_mode::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_oper_mode`]
+#[doc = "DMA_OPER_MODE (rw) register accessor: Sets the Receive and Transmit operation mode and command\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_oper_mode::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_oper_mode::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_oper_mode`]
 module"]
 #[doc(alias = "DMA_OPER_MODE")]
 pub type DmaOperMode = crate::Reg<dma_oper_mode::DmaOperModeSpec>;
 #[doc = "Sets the Receive and Transmit operation mode and command"]
 pub mod dma_oper_mode;
-#[doc = "DMA_INTR_EN (rw) register accessor: Enables the interrupts reported in the status register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_intr_en::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_intr_en::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_intr_en`]
+#[doc = "DMA_INTR_EN (rw) register accessor: Enables the interrupts reported in the status register\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_intr_en::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_intr_en::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_intr_en`]
 module"]
 #[doc(alias = "DMA_INTR_EN")]
 pub type DmaIntrEn = crate::Reg<dma_intr_en::DmaIntrEnSpec>;
 #[doc = "Enables the interrupts reported in the status register"]
 pub mod dma_intr_en;
-#[doc = "DMA_MISS_OVER_COUNTER (rw) register accessor: Contains the counters for discarded frames because no Receive Descriptor is available\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_miss_over_counter::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_miss_over_counter::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_miss_over_counter`]
+#[doc = "DMA_MISS_OVER_COUNTER (rw) register accessor: Contains the counters for discarded frames because no Receive Descriptor is available\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_miss_over_counter::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_miss_over_counter::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_miss_over_counter`]
 module"]
 #[doc(alias = "DMA_MISS_OVER_COUNTER")]
 pub type DmaMissOverCounter = crate::Reg<dma_miss_over_counter::DmaMissOverCounterSpec>;
 #[doc = "Contains the counters for discarded frames because no Receive Descriptor is available"]
 pub mod dma_miss_over_counter;
-#[doc = "DMA_RX_INTR_WDOG_TIMER (rw) register accessor: Watchdog timeout for Receive Interrupt from DMA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_rx_intr_wdog_timer::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_rx_intr_wdog_timer::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_rx_intr_wdog_timer`]
+#[doc = "DMA_RX_INTR_WDOG_TIMER (rw) register accessor: Watchdog timeout for Receive Interrupt from DMA\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_rx_intr_wdog_timer::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_rx_intr_wdog_timer::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_rx_intr_wdog_timer`]
 module"]
 #[doc(alias = "DMA_RX_INTR_WDOG_TIMER")]
 pub type DmaRxIntrWdogTimer = crate::Reg<dma_rx_intr_wdog_timer::DmaRxIntrWdogTimerSpec>;
 #[doc = "Watchdog timeout for Receive Interrupt from DMA"]
 pub mod dma_rx_intr_wdog_timer;
-#[doc = "DMA_AHB_STATUS (rw) register accessor: Provides the active status of the read and write channels of the AHB master interface\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_ahb_status::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_ahb_status::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_ahb_status`]
+#[doc = "DMA_AHB_STATUS (rw) register accessor: Provides the active status of the read and write channels of the AHB master interface\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_ahb_status::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_ahb_status::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_ahb_status`]
 module"]
 #[doc(alias = "DMA_AHB_STATUS")]
 pub type DmaAhbStatus = crate::Reg<dma_ahb_status::DmaAhbStatusSpec>;
 #[doc = "Provides the active status of the read and write channels of the AHB master interface"]
 pub mod dma_ahb_status;
-#[doc = "DMA_CURR_TX_DESC (rw) register accessor: Contains the start address of the current Transmit Descriptor read by the DMA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_curr_tx_desc::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_curr_tx_desc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_curr_tx_desc`]
+#[doc = "DMA_CURR_TX_DESC (rw) register accessor: Contains the start address of the current Transmit Descriptor read by the DMA\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_curr_tx_desc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_curr_tx_desc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_curr_tx_desc`]
 module"]
 #[doc(alias = "DMA_CURR_TX_DESC")]
 pub type DmaCurrTxDesc = crate::Reg<dma_curr_tx_desc::DmaCurrTxDescSpec>;
 #[doc = "Contains the start address of the current Transmit Descriptor read by the DMA"]
 pub mod dma_curr_tx_desc;
-#[doc = "DMA_CURR_RX_DESC (rw) register accessor: Contains the start address of the current Receive Descriptor read by the DMA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_curr_rx_desc::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_curr_rx_desc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_curr_rx_desc`]
+#[doc = "DMA_CURR_RX_DESC (rw) register accessor: Contains the start address of the current Receive Descriptor read by the DMA\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_curr_rx_desc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_curr_rx_desc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_curr_rx_desc`]
 module"]
 #[doc(alias = "DMA_CURR_RX_DESC")]
 pub type DmaCurrRxDesc = crate::Reg<dma_curr_rx_desc::DmaCurrRxDescSpec>;
 #[doc = "Contains the start address of the current Receive Descriptor read by the DMA"]
 pub mod dma_curr_rx_desc;
-#[doc = "DMA_CURR_TX_BUFR_ADDR (rw) register accessor: Contains the start address of the current Receive Descriptor read by the DMA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_curr_tx_bufr_addr::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_curr_tx_bufr_addr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_curr_tx_bufr_addr`]
+#[doc = "DMA_CURR_TX_BUFR_ADDR (rw) register accessor: Contains the start address of the current Receive Descriptor read by the DMA\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_curr_tx_bufr_addr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_curr_tx_bufr_addr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_curr_tx_bufr_addr`]
 module"]
 #[doc(alias = "DMA_CURR_TX_BUFR_ADDR")]
 pub type DmaCurrTxBufrAddr = crate::Reg<dma_curr_tx_bufr_addr::DmaCurrTxBufrAddrSpec>;
 #[doc = "Contains the start address of the current Receive Descriptor read by the DMA"]
 pub mod dma_curr_tx_bufr_addr;
-#[doc = "DMA_CURR_RX_BUFR_ADDR (rw) register accessor: Contains the current Receive Buffer address read by the DMA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_curr_rx_bufr_addr::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_curr_rx_bufr_addr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_curr_rx_bufr_addr`]
+#[doc = "DMA_CURR_RX_BUFR_ADDR (rw) register accessor: Contains the current Receive Buffer address read by the DMA\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_curr_rx_bufr_addr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_curr_rx_bufr_addr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_curr_rx_bufr_addr`]
 module"]
 #[doc(alias = "DMA_CURR_RX_BUFR_ADDR")]
 pub type DmaCurrRxBufrAddr = crate::Reg<dma_curr_rx_bufr_addr::DmaCurrRxBufrAddrSpec>;
diff --git a/va416xx/src/eth/dma_ahb_status.rs b/va416xx/src/eth/dma_ahb_status.rs
index bb66213..e424b06 100644
--- a/va416xx/src/eth/dma_ahb_status.rs
+++ b/va416xx/src/eth/dma_ahb_status.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bit 0 - When high, indicates that the AHB master interface FSMs are in the non-idle state"]
     #[inline(always)]
-    #[must_use]
     pub fn ahbmastrsts(&mut self) -> AhbmastrstsW<DmaAhbStatusSpec> {
         AhbmastrstsW::new(self, 0)
     }
 }
-#[doc = "Provides the active status of the read and write channels of the AHB master interface\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_ahb_status::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_ahb_status::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Provides the active status of the read and write channels of the AHB master interface\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_ahb_status::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_ahb_status::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct DmaAhbStatusSpec;
 impl crate::RegisterSpec for DmaAhbStatusSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/dma_bus_mode.rs b/va416xx/src/eth/dma_bus_mode.rs
index 73f8249..4470705 100644
--- a/va416xx/src/eth/dma_bus_mode.rs
+++ b/va416xx/src/eth/dma_bus_mode.rs
@@ -133,90 +133,76 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Software Reset (Read, Write Set, and Self Clear)"]
     #[inline(always)]
-    #[must_use]
     pub fn swr(&mut self) -> SwrW<DmaBusModeSpec> {
         SwrW::new(self, 0)
     }
     #[doc = "Bit 1 - DMA Arbitration Scheme"]
     #[inline(always)]
-    #[must_use]
     pub fn da(&mut self) -> DaW<DmaBusModeSpec> {
         DaW::new(self, 1)
     }
     #[doc = "Bits 2:6 - Descriptor Skip Length"]
     #[inline(always)]
-    #[must_use]
     pub fn dsl(&mut self) -> DslW<DmaBusModeSpec> {
         DslW::new(self, 2)
     }
     #[doc = "Bits 8:13 - Programmable Burst Lengthe"]
     #[inline(always)]
-    #[must_use]
     pub fn pbl(&mut self) -> PblW<DmaBusModeSpec> {
         PblW::new(self, 8)
     }
     #[doc = "Bits 14:15 - Priority Ratio"]
     #[inline(always)]
-    #[must_use]
     pub fn pr(&mut self) -> PrW<DmaBusModeSpec> {
         PrW::new(self, 14)
     }
     #[doc = "Bit 16 - Fixed Burste"]
     #[inline(always)]
-    #[must_use]
     pub fn fb(&mut self) -> FbW<DmaBusModeSpec> {
         FbW::new(self, 16)
     }
     #[doc = "Bits 17:22 - Rx DMA PBL"]
     #[inline(always)]
-    #[must_use]
     pub fn rpbl(&mut self) -> RpblW<DmaBusModeSpec> {
         RpblW::new(self, 17)
     }
     #[doc = "Bit 23 - Use Separate PBL"]
     #[inline(always)]
-    #[must_use]
     pub fn usp(&mut self) -> UspW<DmaBusModeSpec> {
         UspW::new(self, 23)
     }
     #[doc = "Bit 24 - PBLx8 Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn pblx8(&mut self) -> Pblx8W<DmaBusModeSpec> {
         Pblx8W::new(self, 24)
     }
     #[doc = "Bit 25 - Address-Aligned Beats"]
     #[inline(always)]
-    #[must_use]
     pub fn aal(&mut self) -> AalW<DmaBusModeSpec> {
         AalW::new(self, 25)
     }
     #[doc = "Bit 26 - Mixed Burst"]
     #[inline(always)]
-    #[must_use]
     pub fn mb(&mut self) -> MbW<DmaBusModeSpec> {
         MbW::new(self, 26)
     }
     #[doc = "Bit 27 - Transmit Priority"]
     #[inline(always)]
-    #[must_use]
     pub fn txpr(&mut self) -> TxprW<DmaBusModeSpec> {
         TxprW::new(self, 27)
     }
     #[doc = "Bits 28:29 - Channel Priority Weights"]
     #[inline(always)]
-    #[must_use]
     pub fn prwg(&mut self) -> PrwgW<DmaBusModeSpec> {
         PrwgW::new(self, 28)
     }
     #[doc = "Bit 31 - Rebuild INCRx Burst"]
     #[inline(always)]
-    #[must_use]
     pub fn rib(&mut self) -> RibW<DmaBusModeSpec> {
         RibW::new(self, 31)
     }
 }
-#[doc = "Controls the DMA Host Interface Mode\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_bus_mode::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_bus_mode::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Controls the DMA Host Interface Mode\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_bus_mode::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_bus_mode::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct DmaBusModeSpec;
 impl crate::RegisterSpec for DmaBusModeSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/dma_curr_rx_bufr_addr.rs b/va416xx/src/eth/dma_curr_rx_bufr_addr.rs
index 7d24d1c..d4ac52f 100644
--- a/va416xx/src/eth/dma_curr_rx_bufr_addr.rs
+++ b/va416xx/src/eth/dma_curr_rx_bufr_addr.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:31 - Cleared on Reset. Pointer updated by the DMA during operation."]
     #[inline(always)]
-    #[must_use]
     pub fn curtbufaptr(&mut self) -> CurtbufaptrW<DmaCurrRxBufrAddrSpec> {
         CurtbufaptrW::new(self, 0)
     }
 }
-#[doc = "Contains the current Receive Buffer address read by the DMA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_curr_rx_bufr_addr::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_curr_rx_bufr_addr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Contains the current Receive Buffer address read by the DMA\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_curr_rx_bufr_addr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_curr_rx_bufr_addr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct DmaCurrRxBufrAddrSpec;
 impl crate::RegisterSpec for DmaCurrRxBufrAddrSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/dma_curr_rx_desc.rs b/va416xx/src/eth/dma_curr_rx_desc.rs
index 5eb5692..1e3106b 100644
--- a/va416xx/src/eth/dma_curr_rx_desc.rs
+++ b/va416xx/src/eth/dma_curr_rx_desc.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:31 - Cleared on Reset. Pointer updated by the DMA during operation."]
     #[inline(always)]
-    #[must_use]
     pub fn currdesaptr(&mut self) -> CurrdesaptrW<DmaCurrRxDescSpec> {
         CurrdesaptrW::new(self, 0)
     }
 }
-#[doc = "Contains the start address of the current Receive Descriptor read by the DMA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_curr_rx_desc::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_curr_rx_desc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Contains the start address of the current Receive Descriptor read by the DMA\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_curr_rx_desc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_curr_rx_desc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct DmaCurrRxDescSpec;
 impl crate::RegisterSpec for DmaCurrRxDescSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/dma_curr_tx_bufr_addr.rs b/va416xx/src/eth/dma_curr_tx_bufr_addr.rs
index 9734955..c4dbbb9 100644
--- a/va416xx/src/eth/dma_curr_tx_bufr_addr.rs
+++ b/va416xx/src/eth/dma_curr_tx_bufr_addr.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:31 - Cleared on Reset. Pointer updated by the DMA during operation."]
     #[inline(always)]
-    #[must_use]
     pub fn curtbufaptr(&mut self) -> CurtbufaptrW<DmaCurrTxBufrAddrSpec> {
         CurtbufaptrW::new(self, 0)
     }
 }
-#[doc = "Contains the start address of the current Receive Descriptor read by the DMA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_curr_tx_bufr_addr::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_curr_tx_bufr_addr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Contains the start address of the current Receive Descriptor read by the DMA\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_curr_tx_bufr_addr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_curr_tx_bufr_addr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct DmaCurrTxBufrAddrSpec;
 impl crate::RegisterSpec for DmaCurrTxBufrAddrSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/dma_curr_tx_desc.rs b/va416xx/src/eth/dma_curr_tx_desc.rs
index 940e775..570116f 100644
--- a/va416xx/src/eth/dma_curr_tx_desc.rs
+++ b/va416xx/src/eth/dma_curr_tx_desc.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:31 - Cleared on Reset. Pointer updated by the DMA during operation."]
     #[inline(always)]
-    #[must_use]
     pub fn curtdesaptr(&mut self) -> CurtdesaptrW<DmaCurrTxDescSpec> {
         CurtdesaptrW::new(self, 0)
     }
 }
-#[doc = "Contains the start address of the current Transmit Descriptor read by the DMA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_curr_tx_desc::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_curr_tx_desc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Contains the start address of the current Transmit Descriptor read by the DMA\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_curr_tx_desc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_curr_tx_desc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct DmaCurrTxDescSpec;
 impl crate::RegisterSpec for DmaCurrTxDescSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/dma_intr_en.rs b/va416xx/src/eth/dma_intr_en.rs
index ae6834d..92cbff1 100644
--- a/va416xx/src/eth/dma_intr_en.rs
+++ b/va416xx/src/eth/dma_intr_en.rs
@@ -142,96 +142,81 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Transmit Interrupt Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn tie(&mut self) -> TieW<DmaIntrEnSpec> {
         TieW::new(self, 0)
     }
     #[doc = "Bit 1 - Transmit Stopped Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn tse(&mut self) -> TseW<DmaIntrEnSpec> {
         TseW::new(self, 1)
     }
     #[doc = "Bit 2 - Transmit Buffer Unavailable Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn tue(&mut self) -> TueW<DmaIntrEnSpec> {
         TueW::new(self, 2)
     }
     #[doc = "Bit 3 - Transmit Jabber Timeout Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn the(&mut self) -> TheW<DmaIntrEnSpec> {
         TheW::new(self, 3)
     }
     #[doc = "Bit 4 - Overflow Interrupt Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn ove(&mut self) -> OveW<DmaIntrEnSpec> {
         OveW::new(self, 4)
     }
     #[doc = "Bit 5 - Underflow Interrupt Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn une(&mut self) -> UneW<DmaIntrEnSpec> {
         UneW::new(self, 5)
     }
     #[doc = "Bit 6 - Receive Interrupt Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn rie(&mut self) -> RieW<DmaIntrEnSpec> {
         RieW::new(self, 6)
     }
     #[doc = "Bit 7 - Receive Buffer Unavailable Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn rue(&mut self) -> RueW<DmaIntrEnSpec> {
         RueW::new(self, 7)
     }
     #[doc = "Bit 8 - Receive Stopped Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn rse(&mut self) -> RseW<DmaIntrEnSpec> {
         RseW::new(self, 8)
     }
     #[doc = "Bit 9 - Receive Watchdog Timeout Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn rwe(&mut self) -> RweW<DmaIntrEnSpec> {
         RweW::new(self, 9)
     }
     #[doc = "Bit 10 - Early Transmit Interrupt Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn ete(&mut self) -> EteW<DmaIntrEnSpec> {
         EteW::new(self, 10)
     }
     #[doc = "Bit 13 - Fatal Bus Error Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn fbe(&mut self) -> FbeW<DmaIntrEnSpec> {
         FbeW::new(self, 13)
     }
     #[doc = "Bit 14 - Early Receive Interrupt Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn ere(&mut self) -> EreW<DmaIntrEnSpec> {
         EreW::new(self, 14)
     }
     #[doc = "Bit 15 - Abnormal Interrupt Summary Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn aie(&mut self) -> AieW<DmaIntrEnSpec> {
         AieW::new(self, 15)
     }
     #[doc = "Bit 16 - Normal Interrupt Summary Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn nie(&mut self) -> NieW<DmaIntrEnSpec> {
         NieW::new(self, 16)
     }
 }
-#[doc = "Enables the interrupts reported in the status register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_intr_en::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_intr_en::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Enables the interrupts reported in the status register\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_intr_en::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_intr_en::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct DmaIntrEnSpec;
 impl crate::RegisterSpec for DmaIntrEnSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/dma_miss_over_counter.rs b/va416xx/src/eth/dma_miss_over_counter.rs
index 14f5065..d020db2 100644
--- a/va416xx/src/eth/dma_miss_over_counter.rs
+++ b/va416xx/src/eth/dma_miss_over_counter.rs
@@ -43,30 +43,26 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - This field indicates the number of frames missed by the controller because of the Host Receive Buffer being unavailable."]
     #[inline(always)]
-    #[must_use]
     pub fn misfrmcnt(&mut self) -> MisfrmcntW<DmaMissOverCounterSpec> {
         MisfrmcntW::new(self, 0)
     }
     #[doc = "Bit 16 - This bit is set every time Missed Frame Counter (Bits\\[15:0\\]) overflows"]
     #[inline(always)]
-    #[must_use]
     pub fn miscntovf(&mut self) -> MiscntovfW<DmaMissOverCounterSpec> {
         MiscntovfW::new(self, 16)
     }
     #[doc = "Bits 17:27 - This field indicates the number of frames missed by the application"]
     #[inline(always)]
-    #[must_use]
     pub fn ovffrmcnt(&mut self) -> OvffrmcntW<DmaMissOverCounterSpec> {
         OvffrmcntW::new(self, 17)
     }
     #[doc = "Bit 28 - This bit is set every time the Overflow Frame Counter (Bits\\[27:17\\])overflows"]
     #[inline(always)]
-    #[must_use]
     pub fn ovfcntovf(&mut self) -> OvfcntovfW<DmaMissOverCounterSpec> {
         OvfcntovfW::new(self, 28)
     }
 }
-#[doc = "Contains the counters for discarded frames because no Receive Descriptor is available\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_miss_over_counter::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_miss_over_counter::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Contains the counters for discarded frames because no Receive Descriptor is available\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_miss_over_counter::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_miss_over_counter::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct DmaMissOverCounterSpec;
 impl crate::RegisterSpec for DmaMissOverCounterSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/dma_oper_mode.rs b/va416xx/src/eth/dma_oper_mode.rs
index 8830bd5..8bce9bd 100644
--- a/va416xx/src/eth/dma_oper_mode.rs
+++ b/va416xx/src/eth/dma_oper_mode.rs
@@ -142,96 +142,81 @@ impl R {
 impl W {
     #[doc = "Bit 1 - Start or Stop Receive"]
     #[inline(always)]
-    #[must_use]
     pub fn sr(&mut self) -> SrW<DmaOperModeSpec> {
         SrW::new(self, 1)
     }
     #[doc = "Bit 2 - Operate on Second Frame"]
     #[inline(always)]
-    #[must_use]
     pub fn osf(&mut self) -> OsfW<DmaOperModeSpec> {
         OsfW::new(self, 2)
     }
     #[doc = "Bits 3:4 - Receive Threshold Control"]
     #[inline(always)]
-    #[must_use]
     pub fn rtc(&mut self) -> RtcW<DmaOperModeSpec> {
         RtcW::new(self, 3)
     }
     #[doc = "Bit 5 - Drop Giant Frames"]
     #[inline(always)]
-    #[must_use]
     pub fn dgf(&mut self) -> DgfW<DmaOperModeSpec> {
         DgfW::new(self, 5)
     }
     #[doc = "Bit 6 - Forward Undersized Good Frames"]
     #[inline(always)]
-    #[must_use]
     pub fn fuf(&mut self) -> FufW<DmaOperModeSpec> {
         FufW::new(self, 6)
     }
     #[doc = "Bit 7 - Forward Error Frames"]
     #[inline(always)]
-    #[must_use]
     pub fn fef(&mut self) -> FefW<DmaOperModeSpec> {
         FefW::new(self, 7)
     }
     #[doc = "Bits 9:10 - Threshold for Activating Flow Control"]
     #[inline(always)]
-    #[must_use]
     pub fn rfa(&mut self) -> RfaW<DmaOperModeSpec> {
         RfaW::new(self, 9)
     }
     #[doc = "Bits 11:12 - Threshold for Deactivating Flow Control"]
     #[inline(always)]
-    #[must_use]
     pub fn rfd(&mut self) -> RfdW<DmaOperModeSpec> {
         RfdW::new(self, 11)
     }
     #[doc = "Bit 13 - Start or Stop Transmission Command"]
     #[inline(always)]
-    #[must_use]
     pub fn st(&mut self) -> StW<DmaOperModeSpec> {
         StW::new(self, 13)
     }
     #[doc = "Bits 14:16 - Transmit Threshold Control"]
     #[inline(always)]
-    #[must_use]
     pub fn ttc(&mut self) -> TtcW<DmaOperModeSpec> {
         TtcW::new(self, 14)
     }
     #[doc = "Bit 20 - Flush Transmit FIFO"]
     #[inline(always)]
-    #[must_use]
     pub fn ftf(&mut self) -> FtfW<DmaOperModeSpec> {
         FtfW::new(self, 20)
     }
     #[doc = "Bit 21 - Transmit Store and Forward"]
     #[inline(always)]
-    #[must_use]
     pub fn tsf(&mut self) -> TsfW<DmaOperModeSpec> {
         TsfW::new(self, 21)
     }
     #[doc = "Bit 24 - Disable Flushing of Received Frames"]
     #[inline(always)]
-    #[must_use]
     pub fn dff(&mut self) -> DffW<DmaOperModeSpec> {
         DffW::new(self, 24)
     }
     #[doc = "Bit 25 - Receive Store and Forward"]
     #[inline(always)]
-    #[must_use]
     pub fn rsf(&mut self) -> RsfW<DmaOperModeSpec> {
         RsfW::new(self, 25)
     }
     #[doc = "Bit 26 - Disable Dropping of TCP/IP Checksum Error Frames"]
     #[inline(always)]
-    #[must_use]
     pub fn dt(&mut self) -> DtW<DmaOperModeSpec> {
         DtW::new(self, 26)
     }
 }
-#[doc = "Sets the Receive and Transmit operation mode and command\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_oper_mode::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_oper_mode::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Sets the Receive and Transmit operation mode and command\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_oper_mode::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_oper_mode::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct DmaOperModeSpec;
 impl crate::RegisterSpec for DmaOperModeSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/dma_rx_desc_list_addr.rs b/va416xx/src/eth/dma_rx_desc_list_addr.rs
index 124dc86..bbc43f4 100644
--- a/va416xx/src/eth/dma_rx_desc_list_addr.rs
+++ b/va416xx/src/eth/dma_rx_desc_list_addr.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:31 - Start of Receive List"]
     #[inline(always)]
-    #[must_use]
     pub fn rdesla(&mut self) -> RdeslaW<DmaRxDescListAddrSpec> {
         RdeslaW::new(self, 0)
     }
 }
-#[doc = "Points the DMA to the start of the Receive Descriptor list\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_rx_desc_list_addr::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_rx_desc_list_addr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Points the DMA to the start of the Receive Descriptor list\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_rx_desc_list_addr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_rx_desc_list_addr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct DmaRxDescListAddrSpec;
 impl crate::RegisterSpec for DmaRxDescListAddrSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/dma_rx_intr_wdog_timer.rs b/va416xx/src/eth/dma_rx_intr_wdog_timer.rs
index d4ef2f0..eb10c0c 100644
--- a/va416xx/src/eth/dma_rx_intr_wdog_timer.rs
+++ b/va416xx/src/eth/dma_rx_intr_wdog_timer.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - These bits indicate the number of system clock cycles x 256 for which the watchdog timer is set."]
     #[inline(always)]
-    #[must_use]
     pub fn riwt(&mut self) -> RiwtW<DmaRxIntrWdogTimerSpec> {
         RiwtW::new(self, 0)
     }
 }
-#[doc = "Watchdog timeout for Receive Interrupt from DMA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_rx_intr_wdog_timer::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_rx_intr_wdog_timer::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Watchdog timeout for Receive Interrupt from DMA\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_rx_intr_wdog_timer::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_rx_intr_wdog_timer::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct DmaRxIntrWdogTimerSpec;
 impl crate::RegisterSpec for DmaRxIntrWdogTimerSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/dma_rx_poll_demand.rs b/va416xx/src/eth/dma_rx_poll_demand.rs
index df87347..e50a408 100644
--- a/va416xx/src/eth/dma_rx_poll_demand.rs
+++ b/va416xx/src/eth/dma_rx_poll_demand.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:31 - Receive Poll Demand (Read Only and Write Trigger)"]
     #[inline(always)]
-    #[must_use]
     pub fn rpd(&mut self) -> RpdW<DmaRxPollDemandSpec> {
         RpdW::new(self, 0)
     }
 }
-#[doc = "Used by the host to instruct the DMA to poll the Receive Descriptor list\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_rx_poll_demand::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_rx_poll_demand::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Used by the host to instruct the DMA to poll the Receive Descriptor list\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_rx_poll_demand::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_rx_poll_demand::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct DmaRxPollDemandSpec;
 impl crate::RegisterSpec for DmaRxPollDemandSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/dma_status.rs b/va416xx/src/eth/dma_status.rs
index cc4d93d..ed4f16c 100644
--- a/va416xx/src/eth/dma_status.rs
+++ b/va416xx/src/eth/dma_status.rs
@@ -142,7 +142,7 @@ impl R {
         TtiR::new(((self.bits >> 29) & 1) != 0)
     }
 }
-#[doc = "Used to determine the status of the DMA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_status::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Used to determine the status of the DMA\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct DmaStatusSpec;
 impl crate::RegisterSpec for DmaStatusSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/dma_tx_desc_list_addr.rs b/va416xx/src/eth/dma_tx_desc_list_addr.rs
index 123386b..6bdb559 100644
--- a/va416xx/src/eth/dma_tx_desc_list_addr.rs
+++ b/va416xx/src/eth/dma_tx_desc_list_addr.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:31 - Start of Transmit List"]
     #[inline(always)]
-    #[must_use]
     pub fn tdesla(&mut self) -> TdeslaW<DmaTxDescListAddrSpec> {
         TdeslaW::new(self, 0)
     }
 }
-#[doc = "Points the DMA to the start of the Transmit Descriptor list\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_tx_desc_list_addr::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_tx_desc_list_addr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Points the DMA to the start of the Transmit Descriptor list\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_tx_desc_list_addr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_tx_desc_list_addr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct DmaTxDescListAddrSpec;
 impl crate::RegisterSpec for DmaTxDescListAddrSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/dma_tx_poll_demand.rs b/va416xx/src/eth/dma_tx_poll_demand.rs
index b5d9b31..2e50aed 100644
--- a/va416xx/src/eth/dma_tx_poll_demand.rs
+++ b/va416xx/src/eth/dma_tx_poll_demand.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:31 - Transmit Poll Demand (Read Only and Write Trigger)"]
     #[inline(always)]
-    #[must_use]
     pub fn tpd(&mut self) -> TpdW<DmaTxPollDemandSpec> {
         TpdW::new(self, 0)
     }
 }
-#[doc = "Used by the host to instruct the DMA to poll the transmit Descriptor list\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_tx_poll_demand::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_tx_poll_demand::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Used by the host to instruct the DMA to poll the transmit Descriptor list\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_tx_poll_demand::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_tx_poll_demand::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct DmaTxPollDemandSpec;
 impl crate::RegisterSpec for DmaTxPollDemandSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/mac_addr_h.rs b/va416xx/src/eth/mac_addr_h.rs
index 45fd510..7d2fe2c 100644
--- a/va416xx/src/eth/mac_addr_h.rs
+++ b/va416xx/src/eth/mac_addr_h.rs
@@ -19,7 +19,7 @@ impl R {
     }
 }
 impl W {}
-#[doc = "Contains the high 16-bits of the first MAC Address\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_addr_h::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mac_addr_h::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Contains the high 16-bits of the first MAC Address\n\nYou can [`read`](crate::Reg::read) this register and get [`mac_addr_h::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mac_addr_h::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct MacAddrHSpec;
 impl crate::RegisterSpec for MacAddrHSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/mac_addr_l.rs b/va416xx/src/eth/mac_addr_l.rs
index 7a60fd7..e17aa97 100644
--- a/va416xx/src/eth/mac_addr_l.rs
+++ b/va416xx/src/eth/mac_addr_l.rs
@@ -12,7 +12,7 @@ impl R {
     }
 }
 impl W {}
-#[doc = "Contains the Low 32-bits of the first MAC Address\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_addr_l::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mac_addr_l::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Contains the Low 32-bits of the first MAC Address\n\nYou can [`read`](crate::Reg::read) this register and get [`mac_addr_l::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mac_addr_l::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct MacAddrLSpec;
 impl crate::RegisterSpec for MacAddrLSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/mac_config.rs b/va416xx/src/eth/mac_config.rs
index c855b13..72826d1 100644
--- a/va416xx/src/eth/mac_config.rs
+++ b/va416xx/src/eth/mac_config.rs
@@ -178,120 +178,101 @@ impl R {
 impl W {
     #[doc = "Bits 0:1 - Preamble Length for Transmit frames"]
     #[inline(always)]
-    #[must_use]
     pub fn prelen(&mut self) -> PrelenW<MacConfigSpec> {
         PrelenW::new(self, 0)
     }
     #[doc = "Bit 2 - Receiver Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn re(&mut self) -> ReW<MacConfigSpec> {
         ReW::new(self, 2)
     }
     #[doc = "Bit 3 - Transmitter Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn te(&mut self) -> TeW<MacConfigSpec> {
         TeW::new(self, 3)
     }
     #[doc = "Bit 4 - Deferral Check"]
     #[inline(always)]
-    #[must_use]
     pub fn dc(&mut self) -> DcW<MacConfigSpec> {
         DcW::new(self, 4)
     }
     #[doc = "Bits 5:6 - Back-Off-Limit"]
     #[inline(always)]
-    #[must_use]
     pub fn bl(&mut self) -> BlW<MacConfigSpec> {
         BlW::new(self, 5)
     }
     #[doc = "Bit 7 - Automatic Pad, or CRC Stripping"]
     #[inline(always)]
-    #[must_use]
     pub fn acs(&mut self) -> AcsW<MacConfigSpec> {
         AcsW::new(self, 7)
     }
     #[doc = "Bit 9 - Disable Retry"]
     #[inline(always)]
-    #[must_use]
     pub fn dr(&mut self) -> DrW<MacConfigSpec> {
         DrW::new(self, 9)
     }
     #[doc = "Bit 10 - Checksum Offload"]
     #[inline(always)]
-    #[must_use]
     pub fn ipc(&mut self) -> IpcW<MacConfigSpec> {
         IpcW::new(self, 10)
     }
     #[doc = "Bit 11 - Duplex Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn dm(&mut self) -> DmW<MacConfigSpec> {
         DmW::new(self, 11)
     }
     #[doc = "Bit 12 - Loopback Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn lm(&mut self) -> LmW<MacConfigSpec> {
         LmW::new(self, 12)
     }
     #[doc = "Bit 13 - Disable Receive Own"]
     #[inline(always)]
-    #[must_use]
     pub fn dro(&mut self) -> DroW<MacConfigSpec> {
         DroW::new(self, 13)
     }
     #[doc = "Bit 14 - Speed"]
     #[inline(always)]
-    #[must_use]
     pub fn fes(&mut self) -> FesW<MacConfigSpec> {
         FesW::new(self, 14)
     }
     #[doc = "Bit 15 - Port Select"]
     #[inline(always)]
-    #[must_use]
     pub fn ps(&mut self) -> PsW<MacConfigSpec> {
         PsW::new(self, 15)
     }
     #[doc = "Bit 16 - Disable Carrier Sense During Transmission"]
     #[inline(always)]
-    #[must_use]
     pub fn dcrs(&mut self) -> DcrsW<MacConfigSpec> {
         DcrsW::new(self, 16)
     }
     #[doc = "Bits 17:19 - Inter-Frame Gap"]
     #[inline(always)]
-    #[must_use]
     pub fn ifg(&mut self) -> IfgW<MacConfigSpec> {
         IfgW::new(self, 17)
     }
     #[doc = "Bit 20 - Jumbo Frame Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn je(&mut self) -> JeW<MacConfigSpec> {
         JeW::new(self, 20)
     }
     #[doc = "Bit 21 - Frame Burst Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn be(&mut self) -> BeW<MacConfigSpec> {
         BeW::new(self, 21)
     }
     #[doc = "Bit 22 - Jabber Disable"]
     #[inline(always)]
-    #[must_use]
     pub fn jd(&mut self) -> JdW<MacConfigSpec> {
         JdW::new(self, 22)
     }
     #[doc = "Bit 23 - Watchdog disable"]
     #[inline(always)]
-    #[must_use]
     pub fn wd(&mut self) -> WdW<MacConfigSpec> {
         WdW::new(self, 23)
     }
 }
-#[doc = "Operation mode register for the MAC\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_config::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mac_config::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Operation mode register for the MAC\n\nYou can [`read`](crate::Reg::read) this register and get [`mac_config::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mac_config::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct MacConfigSpec;
 impl crate::RegisterSpec for MacConfigSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/mac_debug.rs b/va416xx/src/eth/mac_debug.rs
index b95f3d4..b5ac42a 100644
--- a/va416xx/src/eth/mac_debug.rs
+++ b/va416xx/src/eth/mac_debug.rs
@@ -86,7 +86,7 @@ impl R {
         TxstsfstsR::new(((self.bits >> 25) & 1) != 0)
     }
 }
-#[doc = "Gives the status of the various internal blocks for debugging\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_debug::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Gives the status of the various internal blocks for debugging\n\nYou can [`read`](crate::Reg::read) this register and get [`mac_debug::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct MacDebugSpec;
 impl crate::RegisterSpec for MacDebugSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/mac_flow_ctrl.rs b/va416xx/src/eth/mac_flow_ctrl.rs
index 27f4bd2..65e71cb 100644
--- a/va416xx/src/eth/mac_flow_ctrl.rs
+++ b/va416xx/src/eth/mac_flow_ctrl.rs
@@ -70,48 +70,41 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Flow Control Busy or Backpressure Activate"]
     #[inline(always)]
-    #[must_use]
     pub fn fcb_bpa(&mut self) -> FcbBpaW<MacFlowCtrlSpec> {
         FcbBpaW::new(self, 0)
     }
     #[doc = "Bit 1 - Transmit Flow Control Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn tfe(&mut self) -> TfeW<MacFlowCtrlSpec> {
         TfeW::new(self, 1)
     }
     #[doc = "Bit 2 - Receive Flow Control Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn rfe(&mut self) -> RfeW<MacFlowCtrlSpec> {
         RfeW::new(self, 2)
     }
     #[doc = "Bit 3 - Unicast Pause Frame Detect"]
     #[inline(always)]
-    #[must_use]
     pub fn up(&mut self) -> UpW<MacFlowCtrlSpec> {
         UpW::new(self, 3)
     }
     #[doc = "Bits 4:5 - Pause Low Threshold"]
     #[inline(always)]
-    #[must_use]
     pub fn plt(&mut self) -> PltW<MacFlowCtrlSpec> {
         PltW::new(self, 4)
     }
     #[doc = "Bit 7 - Disable Zero-Quanta Pause"]
     #[inline(always)]
-    #[must_use]
     pub fn dzpq(&mut self) -> DzpqW<MacFlowCtrlSpec> {
         DzpqW::new(self, 7)
     }
     #[doc = "Bits 16:31 - Pause time"]
     #[inline(always)]
-    #[must_use]
     pub fn pt(&mut self) -> PtW<MacFlowCtrlSpec> {
         PtW::new(self, 16)
     }
 }
-#[doc = "Controls the generation of control frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_flow_ctrl::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mac_flow_ctrl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Controls the generation of control frames\n\nYou can [`read`](crate::Reg::read) this register and get [`mac_flow_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mac_flow_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct MacFlowCtrlSpec;
 impl crate::RegisterSpec for MacFlowCtrlSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/mac_frame_fltr.rs b/va416xx/src/eth/mac_frame_fltr.rs
index 4ac7cd2..126f36d 100644
--- a/va416xx/src/eth/mac_frame_fltr.rs
+++ b/va416xx/src/eth/mac_frame_fltr.rs
@@ -124,84 +124,71 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Promiscuous Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn pr(&mut self) -> PrW<MacFrameFltrSpec> {
         PrW::new(self, 0)
     }
     #[doc = "Bit 1 - Hash Unicast"]
     #[inline(always)]
-    #[must_use]
     pub fn huc(&mut self) -> HucW<MacFrameFltrSpec> {
         HucW::new(self, 1)
     }
     #[doc = "Bit 2 - Hash Multicast"]
     #[inline(always)]
-    #[must_use]
     pub fn hmc(&mut self) -> HmcW<MacFrameFltrSpec> {
         HmcW::new(self, 2)
     }
     #[doc = "Bit 3 - DA Inverse Filtering"]
     #[inline(always)]
-    #[must_use]
     pub fn daif(&mut self) -> DaifW<MacFrameFltrSpec> {
         DaifW::new(self, 3)
     }
     #[doc = "Bit 4 - Pass All Multicast"]
     #[inline(always)]
-    #[must_use]
     pub fn pm(&mut self) -> PmW<MacFrameFltrSpec> {
         PmW::new(self, 4)
     }
     #[doc = "Bit 5 - Disable Broadcast Frames"]
     #[inline(always)]
-    #[must_use]
     pub fn dbf(&mut self) -> DbfW<MacFrameFltrSpec> {
         DbfW::new(self, 5)
     }
     #[doc = "Bits 6:7 - Pass Control Frames"]
     #[inline(always)]
-    #[must_use]
     pub fn pcf(&mut self) -> PcfW<MacFrameFltrSpec> {
         PcfW::new(self, 6)
     }
     #[doc = "Bit 8 - SA Inverse Filtering"]
     #[inline(always)]
-    #[must_use]
     pub fn saif(&mut self) -> SaifW<MacFrameFltrSpec> {
         SaifW::new(self, 8)
     }
     #[doc = "Bit 9 - Source Address Filter Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn saf(&mut self) -> SafW<MacFrameFltrSpec> {
         SafW::new(self, 9)
     }
     #[doc = "Bit 10 - Hash or Perfect Filter"]
     #[inline(always)]
-    #[must_use]
     pub fn hdf(&mut self) -> HdfW<MacFrameFltrSpec> {
         HdfW::new(self, 10)
     }
     #[doc = "Bit 16 - VLAN Tag Filter Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn vfte(&mut self) -> VfteW<MacFrameFltrSpec> {
         VfteW::new(self, 16)
     }
     #[doc = "Bit 21 - Drop non TCP/UDP over IP Frames"]
     #[inline(always)]
-    #[must_use]
     pub fn dntu(&mut self) -> DntuW<MacFrameFltrSpec> {
         DntuW::new(self, 21)
     }
     #[doc = "Bit 31 - Receive All"]
     #[inline(always)]
-    #[must_use]
     pub fn ra(&mut self) -> RaW<MacFrameFltrSpec> {
         RaW::new(self, 31)
     }
 }
-#[doc = "Contains the frame filtering controls\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_frame_fltr::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mac_frame_fltr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Contains the frame filtering controls\n\nYou can [`read`](crate::Reg::read) this register and get [`mac_frame_fltr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mac_frame_fltr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct MacFrameFltrSpec;
 impl crate::RegisterSpec for MacFrameFltrSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/mac_gmii_addr.rs b/va416xx/src/eth/mac_gmii_addr.rs
index 3e2ad77..e8ca1bb 100644
--- a/va416xx/src/eth/mac_gmii_addr.rs
+++ b/va416xx/src/eth/mac_gmii_addr.rs
@@ -52,36 +52,31 @@ impl R {
 impl W {
     #[doc = "Bit 0 - GMII Busy"]
     #[inline(always)]
-    #[must_use]
     pub fn gb(&mut self) -> GbW<MacGmiiAddrSpec> {
         GbW::new(self, 0)
     }
     #[doc = "Bit 1 - GMII Write/Read"]
     #[inline(always)]
-    #[must_use]
     pub fn gw(&mut self) -> GwW<MacGmiiAddrSpec> {
         GwW::new(self, 1)
     }
     #[doc = "Bits 2:5 - CSR Clock Range"]
     #[inline(always)]
-    #[must_use]
     pub fn cr(&mut self) -> CrW<MacGmiiAddrSpec> {
         CrW::new(self, 2)
     }
     #[doc = "Bits 6:10 - GMII Register"]
     #[inline(always)]
-    #[must_use]
     pub fn gr(&mut self) -> GrW<MacGmiiAddrSpec> {
         GrW::new(self, 6)
     }
     #[doc = "Bits 11:15 - Physical Layer Address"]
     #[inline(always)]
-    #[must_use]
     pub fn pa(&mut self) -> PaW<MacGmiiAddrSpec> {
         PaW::new(self, 11)
     }
 }
-#[doc = "Controls the management cycles to an external PHY\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_gmii_addr::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mac_gmii_addr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Controls the management cycles to an external PHY\n\nYou can [`read`](crate::Reg::read) this register and get [`mac_gmii_addr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mac_gmii_addr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct MacGmiiAddrSpec;
 impl crate::RegisterSpec for MacGmiiAddrSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/mac_gmii_data.rs b/va416xx/src/eth/mac_gmii_data.rs
index 8fee346..9e3977c 100644
--- a/va416xx/src/eth/mac_gmii_data.rs
+++ b/va416xx/src/eth/mac_gmii_data.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - GMII Data"]
     #[inline(always)]
-    #[must_use]
     pub fn gd(&mut self) -> GdW<MacGmiiDataSpec> {
         GdW::new(self, 0)
     }
 }
-#[doc = "Contains the data to be written to or read from the PHY register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_gmii_data::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mac_gmii_data::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Contains the data to be written to or read from the PHY register\n\nYou can [`read`](crate::Reg::read) this register and get [`mac_gmii_data::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mac_gmii_data::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct MacGmiiDataSpec;
 impl crate::RegisterSpec for MacGmiiDataSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/mac_intr_mask.rs b/va416xx/src/eth/mac_intr_mask.rs
index fd3b25b..96f7212 100644
--- a/va416xx/src/eth/mac_intr_mask.rs
+++ b/va416xx/src/eth/mac_intr_mask.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bit 9 - Timestamp Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn tsim(&mut self) -> TsimW<MacIntrMaskSpec> {
         TsimW::new(self, 9)
     }
 }
-#[doc = "Contains the masks for generating interrupt\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_intr_mask::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mac_intr_mask::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Contains the masks for generating interrupt\n\nYou can [`read`](crate::Reg::read) this register and get [`mac_intr_mask::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mac_intr_mask::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct MacIntrMaskSpec;
 impl crate::RegisterSpec for MacIntrMaskSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/mac_intr_stat.rs b/va416xx/src/eth/mac_intr_stat.rs
index c5289b2..dedcbc5 100644
--- a/va416xx/src/eth/mac_intr_stat.rs
+++ b/va416xx/src/eth/mac_intr_stat.rs
@@ -37,7 +37,7 @@ impl R {
         TsisR::new(((self.bits >> 9) & 1) != 0)
     }
 }
-#[doc = "Contains the interrupt status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_intr_stat::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Contains the interrupt status\n\nYou can [`read`](crate::Reg::read) this register and get [`mac_intr_stat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct MacIntrStatSpec;
 impl crate::RegisterSpec for MacIntrStatSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/mac_vlan_tag.rs b/va416xx/src/eth/mac_vlan_tag.rs
index ffddabc..4af0695 100644
--- a/va416xx/src/eth/mac_vlan_tag.rs
+++ b/va416xx/src/eth/mac_vlan_tag.rs
@@ -43,30 +43,26 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - VLAN Tag identifier for Receive Frames"]
     #[inline(always)]
-    #[must_use]
     pub fn vl(&mut self) -> VlW<MacVlanTagSpec> {
         VlW::new(self, 0)
     }
     #[doc = "Bit 16 - Enable 12-Bit VLAN Tag Comparison"]
     #[inline(always)]
-    #[must_use]
     pub fn etv(&mut self) -> EtvW<MacVlanTagSpec> {
         EtvW::new(self, 16)
     }
     #[doc = "Bit 17 - VLAN Tag Inverse Match Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn vtim(&mut self) -> VtimW<MacVlanTagSpec> {
         VtimW::new(self, 17)
     }
     #[doc = "Bit 18 - Enable S-VLAN"]
     #[inline(always)]
-    #[must_use]
     pub fn esvl(&mut self) -> EsvlW<MacVlanTagSpec> {
         EsvlW::new(self, 18)
     }
 }
-#[doc = "Identifies IEEE 802.1Q VLAN type frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_vlan_tag::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mac_vlan_tag::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Identifies IEEE 802.1Q VLAN type frames\n\nYou can [`read`](crate::Reg::read) this register and get [`mac_vlan_tag::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mac_vlan_tag::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct MacVlanTagSpec;
 impl crate::RegisterSpec for MacVlanTagSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/mac_wdog_to.rs b/va416xx/src/eth/mac_wdog_to.rs
index a0ba4b0..5cc71a4 100644
--- a/va416xx/src/eth/mac_wdog_to.rs
+++ b/va416xx/src/eth/mac_wdog_to.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:13 - Watchdog Timeout"]
     #[inline(always)]
-    #[must_use]
     pub fn wto(&mut self) -> WtoW<MacWdogToSpec> {
         WtoW::new(self, 0)
     }
     #[doc = "Bit 16 - Programmable Watchdog Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn pwe(&mut self) -> PweW<MacWdogToSpec> {
         PweW::new(self, 16)
     }
 }
-#[doc = "Controls the watchdog time-out for received frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_wdog_to::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mac_wdog_to::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Controls the watchdog time-out for received frames\n\nYou can [`read`](crate::Reg::read) this register and get [`mac_wdog_to::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mac_wdog_to::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct MacWdogToSpec;
 impl crate::RegisterSpec for MacWdogToSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/mmc_cntrl.rs b/va416xx/src/eth/mmc_cntrl.rs
index 7d4c70a..e86e2aa 100644
--- a/va416xx/src/eth/mmc_cntrl.rs
+++ b/va416xx/src/eth/mmc_cntrl.rs
@@ -70,48 +70,41 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Counters Reset"]
     #[inline(always)]
-    #[must_use]
     pub fn cntrst(&mut self) -> CntrstW<MmcCntrlSpec> {
         CntrstW::new(self, 0)
     }
     #[doc = "Bit 1 - Counter Stop Rollover"]
     #[inline(always)]
-    #[must_use]
     pub fn cntstopro(&mut self) -> CntstoproW<MmcCntrlSpec> {
         CntstoproW::new(self, 1)
     }
     #[doc = "Bit 2 - Reset on Read"]
     #[inline(always)]
-    #[must_use]
     pub fn rstonrd(&mut self) -> RstonrdW<MmcCntrlSpec> {
         RstonrdW::new(self, 2)
     }
     #[doc = "Bit 3 - MMC Counter Freeze"]
     #[inline(always)]
-    #[must_use]
     pub fn cntfreez(&mut self) -> CntfreezW<MmcCntrlSpec> {
         CntfreezW::new(self, 3)
     }
     #[doc = "Bit 4 - Counters Preset"]
     #[inline(always)]
-    #[must_use]
     pub fn cntprst(&mut self) -> CntprstW<MmcCntrlSpec> {
         CntprstW::new(self, 4)
     }
     #[doc = "Bit 5 - Full-Half Preset"]
     #[inline(always)]
-    #[must_use]
     pub fn cntprstlvl(&mut self) -> CntprstlvlW<MmcCntrlSpec> {
         CntprstlvlW::new(self, 5)
     }
     #[doc = "Bit 8 - Update MMC Counters for Dropped Broadcast Frames"]
     #[inline(always)]
-    #[must_use]
     pub fn ucdbc(&mut self) -> UcdbcW<MmcCntrlSpec> {
         UcdbcW::new(self, 8)
     }
 }
-#[doc = "MMC Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mmc_cntrl::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mmc_cntrl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "MMC Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mmc_cntrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mmc_cntrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct MmcCntrlSpec;
 impl crate::RegisterSpec for MmcCntrlSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/mmc_intr_mask_rx.rs b/va416xx/src/eth/mmc_intr_mask_rx.rs
index 6e771f2..db470bd 100644
--- a/va416xx/src/eth/mmc_intr_mask_rx.rs
+++ b/va416xx/src/eth/mmc_intr_mask_rx.rs
@@ -241,162 +241,136 @@ impl R {
 impl W {
     #[doc = "Bit 0 - MMC Receive Good Bad Frame Counter Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn rxgbfrmim(&mut self) -> RxgbfrmimW<MmcIntrMaskRxSpec> {
         RxgbfrmimW::new(self, 0)
     }
     #[doc = "Bit 1 - MMC Receive Good Bad Octet Counter Interrupt Mask."]
     #[inline(always)]
-    #[must_use]
     pub fn rxgboctim(&mut self) -> RxgboctimW<MmcIntrMaskRxSpec> {
         RxgboctimW::new(self, 1)
     }
     #[doc = "Bit 2 - MMC Receive Good Octet Counter Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn rxgoctim(&mut self) -> RxgoctimW<MmcIntrMaskRxSpec> {
         RxgoctimW::new(self, 2)
     }
     #[doc = "Bit 3 - MMC Receive Broadcast Good Frame Counter Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn rxbcgfim(&mut self) -> RxbcgfimW<MmcIntrMaskRxSpec> {
         RxbcgfimW::new(self, 3)
     }
     #[doc = "Bit 4 - MMC Receive Multicast Good Frame Counter Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn rxmcgfim(&mut self) -> RxmcgfimW<MmcIntrMaskRxSpec> {
         RxmcgfimW::new(self, 4)
     }
     #[doc = "Bit 5 - MMC Receive CRC Error Frame Counter Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn rxcrcerfim(&mut self) -> RxcrcerfimW<MmcIntrMaskRxSpec> {
         RxcrcerfimW::new(self, 5)
     }
     #[doc = "Bit 6 - MMC Receive Alignment Error Frame Counter Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn rxalgnerfim(&mut self) -> RxalgnerfimW<MmcIntrMaskRxSpec> {
         RxalgnerfimW::new(self, 6)
     }
     #[doc = "Bit 7 - MMC Receive Runt Frame Counter Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn rxruntfim(&mut self) -> RxruntfimW<MmcIntrMaskRxSpec> {
         RxruntfimW::new(self, 7)
     }
     #[doc = "Bit 8 - MMC Receive Jabber Error Frame Counter Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn rxjaberfim(&mut self) -> RxjaberfimW<MmcIntrMaskRxSpec> {
         RxjaberfimW::new(self, 8)
     }
     #[doc = "Bit 9 - MMC Receive Undersize Good Frame Counter Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn rxusizegfim(&mut self) -> RxusizegfimW<MmcIntrMaskRxSpec> {
         RxusizegfimW::new(self, 9)
     }
     #[doc = "Bit 10 - MMC Receive Oversize Good Frame Counter Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn rxosizegfim(&mut self) -> RxosizegfimW<MmcIntrMaskRxSpec> {
         RxosizegfimW::new(self, 10)
     }
     #[doc = "Bit 11 - MMC Receive 64 Octet Good Bad Frame Counter Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn rx64octgbfim(&mut self) -> Rx64octgbfimW<MmcIntrMaskRxSpec> {
         Rx64octgbfimW::new(self, 11)
     }
     #[doc = "Bit 12 - MMC Receive 65 to 127 Octet Good Bad Frame Counter Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn rx65t127octgbfim(&mut self) -> Rx65t127octgbfimW<MmcIntrMaskRxSpec> {
         Rx65t127octgbfimW::new(self, 12)
     }
     #[doc = "Bit 13 - MMC Receive 128 to 255 Octet Good Bad Frame Counter Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn rx128t255octgbfim(&mut self) -> Rx128t255octgbfimW<MmcIntrMaskRxSpec> {
         Rx128t255octgbfimW::new(self, 13)
     }
     #[doc = "Bit 14 - MMC Receive 256 to 511 Octet Good Bad Frame Counter Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn rx256t511octgbfim(&mut self) -> Rx256t511octgbfimW<MmcIntrMaskRxSpec> {
         Rx256t511octgbfimW::new(self, 14)
     }
     #[doc = "Bit 15 - MMC Receive 512 to 1023 Octet Good Bad Frame Counter Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn rx512t1023octgbfim(&mut self) -> Rx512t1023octgbfimW<MmcIntrMaskRxSpec> {
         Rx512t1023octgbfimW::new(self, 15)
     }
     #[doc = "Bit 16 - MMC Receive 1024 to Maximum Octet Good Bad Frame Counter Interrupt Mask."]
     #[inline(always)]
-    #[must_use]
     pub fn rx1024tmaxoctgbfim(&mut self) -> Rx1024tmaxoctgbfimW<MmcIntrMaskRxSpec> {
         Rx1024tmaxoctgbfimW::new(self, 16)
     }
     #[doc = "Bit 17 - MMC Receive Unicast Good Frame Counter Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn rxucgfim(&mut self) -> RxucgfimW<MmcIntrMaskRxSpec> {
         RxucgfimW::new(self, 17)
     }
     #[doc = "Bit 18 - MMC Receive Length Error Frame Counter Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn rxlenerfim(&mut self) -> RxlenerfimW<MmcIntrMaskRxSpec> {
         RxlenerfimW::new(self, 18)
     }
     #[doc = "Bit 19 - MMC Receive Out Of Range Error Frame Counter Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn rxorangefim(&mut self) -> RxorangefimW<MmcIntrMaskRxSpec> {
         RxorangefimW::new(self, 19)
     }
     #[doc = "Bit 20 - MMC Receive Pause Frame Counter Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn rxpausfim(&mut self) -> RxpausfimW<MmcIntrMaskRxSpec> {
         RxpausfimW::new(self, 20)
     }
     #[doc = "Bit 21 - MMC Receive FIFO Overflow Frame Counter Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn rxfovfim(&mut self) -> RxfovfimW<MmcIntrMaskRxSpec> {
         RxfovfimW::new(self, 21)
     }
     #[doc = "Bit 22 - MMC Receive VLAN Good Bad Frame Counter Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn rxvlangbfim(&mut self) -> RxvlangbfimW<MmcIntrMaskRxSpec> {
         RxvlangbfimW::new(self, 22)
     }
     #[doc = "Bit 23 - MMC Receive Watchdog Error Frame Counter Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn rxwdogfim(&mut self) -> RxwdogfimW<MmcIntrMaskRxSpec> {
         RxwdogfimW::new(self, 23)
     }
     #[doc = "Bit 24 - MMC Receive Error Frame Counter Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn rxrcverrfim(&mut self) -> RxrcverrfimW<MmcIntrMaskRxSpec> {
         RxrcverrfimW::new(self, 24)
     }
     #[doc = "Bit 25 - MMC Receive Control Frame Counter Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn rxctrlfim(&mut self) -> RxctrlfimW<MmcIntrMaskRxSpec> {
         RxctrlfimW::new(self, 25)
     }
 }
-#[doc = "MMC Receive Interrupt Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mmc_intr_mask_rx::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mmc_intr_mask_rx::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "MMC Receive Interrupt Mask Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mmc_intr_mask_rx::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mmc_intr_mask_rx::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct MmcIntrMaskRxSpec;
 impl crate::RegisterSpec for MmcIntrMaskRxSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/mmc_intr_mask_tx.rs b/va416xx/src/eth/mmc_intr_mask_tx.rs
index 4867da8..c7af471 100644
--- a/va416xx/src/eth/mmc_intr_mask_tx.rs
+++ b/va416xx/src/eth/mmc_intr_mask_tx.rs
@@ -241,162 +241,136 @@ impl R {
 impl W {
     #[doc = "Bit 0 - MMC Transmit Good Bad Octet Counter Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn txgboctim(&mut self) -> TxgboctimW<MmcIntrMaskTxSpec> {
         TxgboctimW::new(self, 0)
     }
     #[doc = "Bit 1 - MMC Transmit Good Bad Frame Counter Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn txgbfrmim(&mut self) -> TxgbfrmimW<MmcIntrMaskTxSpec> {
         TxgbfrmimW::new(self, 1)
     }
     #[doc = "Bit 2 - MMC Transmit Broadcast Good Frame Counter Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn txbcgfim(&mut self) -> TxbcgfimW<MmcIntrMaskTxSpec> {
         TxbcgfimW::new(self, 2)
     }
     #[doc = "Bit 3 - MMC Transmit Multicast Good Frame Counter Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn txmcgfim(&mut self) -> TxmcgfimW<MmcIntrMaskTxSpec> {
         TxmcgfimW::new(self, 3)
     }
     #[doc = "Bit 4 - MMC Transmit 64 Octet Good Bad Frame Counter Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn tx64octgbfim(&mut self) -> Tx64octgbfimW<MmcIntrMaskTxSpec> {
         Tx64octgbfimW::new(self, 4)
     }
     #[doc = "Bit 5 - MMC Transmit 65 to 127 Octet Good Bad Frame Counter Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn tx65t127octgbfim(&mut self) -> Tx65t127octgbfimW<MmcIntrMaskTxSpec> {
         Tx65t127octgbfimW::new(self, 5)
     }
     #[doc = "Bit 6 - MMC Transmit 128 to 255 Octet Good Bad Frame Counter Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn tx128t255octgbfim(&mut self) -> Tx128t255octgbfimW<MmcIntrMaskTxSpec> {
         Tx128t255octgbfimW::new(self, 6)
     }
     #[doc = "Bit 7 - MC Transmit 256 to 511 Octet Good Bad Frame Counter Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn tx256t511octgbfim(&mut self) -> Tx256t511octgbfimW<MmcIntrMaskTxSpec> {
         Tx256t511octgbfimW::new(self, 7)
     }
     #[doc = "Bit 8 - MMC Transmit 512 to 1023 Octet Good Bad Frame Counter Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn tx512t1023octgbfim(&mut self) -> Tx512t1023octgbfimW<MmcIntrMaskTxSpec> {
         Tx512t1023octgbfimW::new(self, 8)
     }
     #[doc = "Bit 9 - MMC Transmit 1024 to Maximum Octet Good Bad Frame Counter Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn tx1024tmaxoctgbfim(&mut self) -> Tx1024tmaxoctgbfimW<MmcIntrMaskTxSpec> {
         Tx1024tmaxoctgbfimW::new(self, 9)
     }
     #[doc = "Bit 10 - MMC Transmit Unicast Good Bad Frame Counter Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn txucgbfim(&mut self) -> TxucgbfimW<MmcIntrMaskTxSpec> {
         TxucgbfimW::new(self, 10)
     }
     #[doc = "Bit 11 - MMC Transmit Multicast Good Bad Frame Counter Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn txmcgbfim(&mut self) -> TxmcgbfimW<MmcIntrMaskTxSpec> {
         TxmcgbfimW::new(self, 11)
     }
     #[doc = "Bit 12 - MMC Transmit Broadcast Good Bad Frame Counter Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn txbcgbfim(&mut self) -> TxbcgbfimW<MmcIntrMaskTxSpec> {
         TxbcgbfimW::new(self, 12)
     }
     #[doc = "Bit 13 - MMC Transmit Underflow Error Frame Counter Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn txuflowerfim(&mut self) -> TxuflowerfimW<MmcIntrMaskTxSpec> {
         TxuflowerfimW::new(self, 13)
     }
     #[doc = "Bit 14 - MMC Transmit Single Collision Good Frame Counter Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn txscolgfim(&mut self) -> TxscolgfimW<MmcIntrMaskTxSpec> {
         TxscolgfimW::new(self, 14)
     }
     #[doc = "Bit 15 - MMC Transmit Multiple Collision Good Frame Counter Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn txmcolgfim(&mut self) -> TxmcolgfimW<MmcIntrMaskTxSpec> {
         TxmcolgfimW::new(self, 15)
     }
     #[doc = "Bit 16 - MMC Transmit Deferred Frame Counter Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn txdeffim(&mut self) -> TxdeffimW<MmcIntrMaskTxSpec> {
         TxdeffimW::new(self, 16)
     }
     #[doc = "Bit 17 - MMC Transmit Late Collision Frame Counter Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn txlatcolfim(&mut self) -> TxlatcolfimW<MmcIntrMaskTxSpec> {
         TxlatcolfimW::new(self, 17)
     }
     #[doc = "Bit 18 - MMC Transmit Excessive Collision Frame Counter Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn txexcolfim(&mut self) -> TxexcolfimW<MmcIntrMaskTxSpec> {
         TxexcolfimW::new(self, 18)
     }
     #[doc = "Bit 19 - MMC Transmit Carrier Error Frame Counter Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn txcarerfim(&mut self) -> TxcarerfimW<MmcIntrMaskTxSpec> {
         TxcarerfimW::new(self, 19)
     }
     #[doc = "Bit 20 - MMC Transmit Good Octet Counter Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn txgoctim(&mut self) -> TxgoctimW<MmcIntrMaskTxSpec> {
         TxgoctimW::new(self, 20)
     }
     #[doc = "Bit 21 - MMC Transmit Good Frame Counter Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn txgfrmim(&mut self) -> TxgfrmimW<MmcIntrMaskTxSpec> {
         TxgfrmimW::new(self, 21)
     }
     #[doc = "Bit 22 - MMC Transmit Excessive Deferral Frame Counter Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn txexdeffim(&mut self) -> TxexdeffimW<MmcIntrMaskTxSpec> {
         TxexdeffimW::new(self, 22)
     }
     #[doc = "Bit 23 - MMC Transmit Pause Frame Counter Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn txpausfim(&mut self) -> TxpausfimW<MmcIntrMaskTxSpec> {
         TxpausfimW::new(self, 23)
     }
     #[doc = "Bit 24 - MMC Transmit VLAN Good Frame Counter Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn txvlangfim(&mut self) -> TxvlangfimW<MmcIntrMaskTxSpec> {
         TxvlangfimW::new(self, 24)
     }
     #[doc = "Bit 25 - MMC Transmit Oversize Good Frame Counter Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn txosizegfim(&mut self) -> TxosizegfimW<MmcIntrMaskTxSpec> {
         TxosizegfimW::new(self, 25)
     }
 }
-#[doc = "MMC Transmit Interrupt Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mmc_intr_mask_tx::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mmc_intr_mask_tx::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "MMC Transmit Interrupt Mask Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mmc_intr_mask_tx::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mmc_intr_mask_tx::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct MmcIntrMaskTxSpec;
 impl crate::RegisterSpec for MmcIntrMaskTxSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/mmc_intr_rx.rs b/va416xx/src/eth/mmc_intr_rx.rs
index 78123ca..f995080 100644
--- a/va416xx/src/eth/mmc_intr_rx.rs
+++ b/va416xx/src/eth/mmc_intr_rx.rs
@@ -241,162 +241,136 @@ impl R {
 impl W {
     #[doc = "Bit 0 - MMC Receive Good Bad Frame Counter Interrupt Status"]
     #[inline(always)]
-    #[must_use]
     pub fn rxgbfrmis(&mut self) -> RxgbfrmisW<MmcIntrRxSpec> {
         RxgbfrmisW::new(self, 0)
     }
     #[doc = "Bit 1 - MMC Receive Good Bad Octet Counter Interrupt Status"]
     #[inline(always)]
-    #[must_use]
     pub fn rxgboctis(&mut self) -> RxgboctisW<MmcIntrRxSpec> {
         RxgboctisW::new(self, 1)
     }
     #[doc = "Bit 2 - MMC Receive Good Octet Counter Interrupt Status"]
     #[inline(always)]
-    #[must_use]
     pub fn rxgoctis(&mut self) -> RxgoctisW<MmcIntrRxSpec> {
         RxgoctisW::new(self, 2)
     }
     #[doc = "Bit 3 - MMC Receive Broadcast Good Frame Counter Interrupt Status"]
     #[inline(always)]
-    #[must_use]
     pub fn rxbcgfis(&mut self) -> RxbcgfisW<MmcIntrRxSpec> {
         RxbcgfisW::new(self, 3)
     }
     #[doc = "Bit 4 - MMC Receive Multicast Good Frame Counter Interrupt Status"]
     #[inline(always)]
-    #[must_use]
     pub fn rxmcgfis(&mut self) -> RxmcgfisW<MmcIntrRxSpec> {
         RxmcgfisW::new(self, 4)
     }
     #[doc = "Bit 5 - MMC Receive CRC Error Frame Counter Interrupt Status"]
     #[inline(always)]
-    #[must_use]
     pub fn rxcrcerfis(&mut self) -> RxcrcerfisW<MmcIntrRxSpec> {
         RxcrcerfisW::new(self, 5)
     }
     #[doc = "Bit 6 - MMC Receive Alignment Error Frame Counter Interrupt Status"]
     #[inline(always)]
-    #[must_use]
     pub fn rxalgnerfis(&mut self) -> RxalgnerfisW<MmcIntrRxSpec> {
         RxalgnerfisW::new(self, 6)
     }
     #[doc = "Bit 7 - MMC Receive Runt Frame Counter Interrupt Status"]
     #[inline(always)]
-    #[must_use]
     pub fn rxruntfis(&mut self) -> RxruntfisW<MmcIntrRxSpec> {
         RxruntfisW::new(self, 7)
     }
     #[doc = "Bit 8 - MMC Receive Jabber Error Frame Counter Interrupt Status"]
     #[inline(always)]
-    #[must_use]
     pub fn rxjaberfis(&mut self) -> RxjaberfisW<MmcIntrRxSpec> {
         RxjaberfisW::new(self, 8)
     }
     #[doc = "Bit 9 - MMC Receive Undersize Good Frame Counter Interrupt Status"]
     #[inline(always)]
-    #[must_use]
     pub fn rxusizegfis(&mut self) -> RxusizegfisW<MmcIntrRxSpec> {
         RxusizegfisW::new(self, 9)
     }
     #[doc = "Bit 10 - MMC Receive Oversize Good Frame Counter Interrupt Status"]
     #[inline(always)]
-    #[must_use]
     pub fn rxosizegfis(&mut self) -> RxosizegfisW<MmcIntrRxSpec> {
         RxosizegfisW::new(self, 10)
     }
     #[doc = "Bit 11 - MMC Receive 64 Octet Good Bad Frame Counter Interrupt Status"]
     #[inline(always)]
-    #[must_use]
     pub fn rx64octgbfis(&mut self) -> Rx64octgbfisW<MmcIntrRxSpec> {
         Rx64octgbfisW::new(self, 11)
     }
     #[doc = "Bit 12 - MMC Receive 65 to 127 Octet Good Bad Frame Counter Interrupt Status"]
     #[inline(always)]
-    #[must_use]
     pub fn rx65t127octgbfis(&mut self) -> Rx65t127octgbfisW<MmcIntrRxSpec> {
         Rx65t127octgbfisW::new(self, 12)
     }
     #[doc = "Bit 13 - MMC Receive 128 to 255 Octet Good Bad Frame Counter Interrupt Status"]
     #[inline(always)]
-    #[must_use]
     pub fn rx128t255octgbfis(&mut self) -> Rx128t255octgbfisW<MmcIntrRxSpec> {
         Rx128t255octgbfisW::new(self, 13)
     }
     #[doc = "Bit 14 - MMC Receive 256 to 511 Octet Good Bad Frame Counter Interrupt Status"]
     #[inline(always)]
-    #[must_use]
     pub fn rx256t511octgbfis(&mut self) -> Rx256t511octgbfisW<MmcIntrRxSpec> {
         Rx256t511octgbfisW::new(self, 14)
     }
     #[doc = "Bit 15 - MMC Receive 512 to 1023 Octet Good Bad Frame Counter Interrupt Status"]
     #[inline(always)]
-    #[must_use]
     pub fn rx512t1023octgbfis(&mut self) -> Rx512t1023octgbfisW<MmcIntrRxSpec> {
         Rx512t1023octgbfisW::new(self, 15)
     }
     #[doc = "Bit 16 - MMC Receive 1024 to Maximum Octet Good Bad Frame Counter Interrupt Status."]
     #[inline(always)]
-    #[must_use]
     pub fn rx1024tmaxoctgbfis(&mut self) -> Rx1024tmaxoctgbfisW<MmcIntrRxSpec> {
         Rx1024tmaxoctgbfisW::new(self, 16)
     }
     #[doc = "Bit 17 - MMC Receive Unicast Good Frame Counter Interrupt Status"]
     #[inline(always)]
-    #[must_use]
     pub fn rxucgfis(&mut self) -> RxucgfisW<MmcIntrRxSpec> {
         RxucgfisW::new(self, 17)
     }
     #[doc = "Bit 18 - MMC Receive Length Error Frame Counter Interrupt Status"]
     #[inline(always)]
-    #[must_use]
     pub fn rxlenerfis(&mut self) -> RxlenerfisW<MmcIntrRxSpec> {
         RxlenerfisW::new(self, 18)
     }
     #[doc = "Bit 19 - MMC Receive Out Of Range Error Frame Counter Interrupt Status."]
     #[inline(always)]
-    #[must_use]
     pub fn rxorangefis(&mut self) -> RxorangefisW<MmcIntrRxSpec> {
         RxorangefisW::new(self, 19)
     }
     #[doc = "Bit 20 - MMC Receive Pause Frame Counter Interrupt Status"]
     #[inline(always)]
-    #[must_use]
     pub fn rxpausfis(&mut self) -> RxpausfisW<MmcIntrRxSpec> {
         RxpausfisW::new(self, 20)
     }
     #[doc = "Bit 21 - MMC Receive FIFO Overflow Frame Counter Interrupt Status"]
     #[inline(always)]
-    #[must_use]
     pub fn rxfovfis(&mut self) -> RxfovfisW<MmcIntrRxSpec> {
         RxfovfisW::new(self, 21)
     }
     #[doc = "Bit 22 - MMC Receive VLAN Good Bad Frame Counter Interrupt Status"]
     #[inline(always)]
-    #[must_use]
     pub fn rxvlangbfis(&mut self) -> RxvlangbfisW<MmcIntrRxSpec> {
         RxvlangbfisW::new(self, 22)
     }
     #[doc = "Bit 23 - MMC Receive Watchdog Error Frame Counter Interrupt Status"]
     #[inline(always)]
-    #[must_use]
     pub fn rxwdogfis(&mut self) -> RxwdogfisW<MmcIntrRxSpec> {
         RxwdogfisW::new(self, 23)
     }
     #[doc = "Bit 24 - MMC Receive Error Frame Counter Interrupt Status"]
     #[inline(always)]
-    #[must_use]
     pub fn rxrcverrfis(&mut self) -> RxrcverrfisW<MmcIntrRxSpec> {
         RxrcverrfisW::new(self, 24)
     }
     #[doc = "Bit 25 - MMC Receive Control Frame Counter Interrupt Status"]
     #[inline(always)]
-    #[must_use]
     pub fn rxctrlfis(&mut self) -> RxctrlfisW<MmcIntrRxSpec> {
         RxctrlfisW::new(self, 25)
     }
 }
-#[doc = "MMC Receive Interrupt Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mmc_intr_rx::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mmc_intr_rx::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "MMC Receive Interrupt Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mmc_intr_rx::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mmc_intr_rx::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct MmcIntrRxSpec;
 impl crate::RegisterSpec for MmcIntrRxSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/mmc_intr_tx.rs b/va416xx/src/eth/mmc_intr_tx.rs
index 7069df4..a0c5c9f 100644
--- a/va416xx/src/eth/mmc_intr_tx.rs
+++ b/va416xx/src/eth/mmc_intr_tx.rs
@@ -241,162 +241,136 @@ impl R {
 impl W {
     #[doc = "Bit 0 - MMC Transmit Good Bad Octet Counter Interrupt Status"]
     #[inline(always)]
-    #[must_use]
     pub fn txgboctis(&mut self) -> TxgboctisW<MmcIntrTxSpec> {
         TxgboctisW::new(self, 0)
     }
     #[doc = "Bit 1 - MMC Transmit Good Bad Frame Counter Interrupt Status"]
     #[inline(always)]
-    #[must_use]
     pub fn txgbfrmis(&mut self) -> TxgbfrmisW<MmcIntrTxSpec> {
         TxgbfrmisW::new(self, 1)
     }
     #[doc = "Bit 2 - MMC Transmit Broadcast Good Frame Counter Interrupt Status"]
     #[inline(always)]
-    #[must_use]
     pub fn txbcgfis(&mut self) -> TxbcgfisW<MmcIntrTxSpec> {
         TxbcgfisW::new(self, 2)
     }
     #[doc = "Bit 3 - MMC Transmit Multicast Good Frame Counter Interrupt Status"]
     #[inline(always)]
-    #[must_use]
     pub fn txmcgfis(&mut self) -> TxmcgfisW<MmcIntrTxSpec> {
         TxmcgfisW::new(self, 3)
     }
     #[doc = "Bit 4 - MMC Transmit 64 Octet Good Bad Frame Counter Interrupt Status"]
     #[inline(always)]
-    #[must_use]
     pub fn tx64octgbfis(&mut self) -> Tx64octgbfisW<MmcIntrTxSpec> {
         Tx64octgbfisW::new(self, 4)
     }
     #[doc = "Bit 5 - MMC Transmit 65 to 127 Octet Good Bad Frame Counter Interrupt Status"]
     #[inline(always)]
-    #[must_use]
     pub fn tx65t127octgbfis(&mut self) -> Tx65t127octgbfisW<MmcIntrTxSpec> {
         Tx65t127octgbfisW::new(self, 5)
     }
     #[doc = "Bit 6 - MMC Transmit 128 to 255 Octet Good Bad Frame Counter Interrupt Status"]
     #[inline(always)]
-    #[must_use]
     pub fn tx128t255octgbfis(&mut self) -> Tx128t255octgbfisW<MmcIntrTxSpec> {
         Tx128t255octgbfisW::new(self, 6)
     }
     #[doc = "Bit 7 - MMC Transmit 256 to 511 Octet Good Bad Frame Counter Interrupt Status"]
     #[inline(always)]
-    #[must_use]
     pub fn tx256t511octgbfis(&mut self) -> Tx256t511octgbfisW<MmcIntrTxSpec> {
         Tx256t511octgbfisW::new(self, 7)
     }
     #[doc = "Bit 8 - MMC Transmit 512 to 1023 Octet Good Bad Frame Counter Interrupt Status"]
     #[inline(always)]
-    #[must_use]
     pub fn tx512t1023octgbfis(&mut self) -> Tx512t1023octgbfisW<MmcIntrTxSpec> {
         Tx512t1023octgbfisW::new(self, 8)
     }
     #[doc = "Bit 9 - MMC Transmit 1024 to Maximum Octet Good Bad Frame Counter"]
     #[inline(always)]
-    #[must_use]
     pub fn tx1024tmaxoctgbfis(&mut self) -> Tx1024tmaxoctgbfisW<MmcIntrTxSpec> {
         Tx1024tmaxoctgbfisW::new(self, 9)
     }
     #[doc = "Bit 10 - MMC Transmit Unicast Good Bad Frame Counter Interrupt Status"]
     #[inline(always)]
-    #[must_use]
     pub fn txucgbfis(&mut self) -> TxucgbfisW<MmcIntrTxSpec> {
         TxucgbfisW::new(self, 10)
     }
     #[doc = "Bit 11 - MMC Transmit Multicast Good Bad Frame Counter Interrupt Status"]
     #[inline(always)]
-    #[must_use]
     pub fn txmcgbfis(&mut self) -> TxmcgbfisW<MmcIntrTxSpec> {
         TxmcgbfisW::new(self, 11)
     }
     #[doc = "Bit 12 - MMC Transmit Broadcast Good Bad Frame Counter Interrupt Status"]
     #[inline(always)]
-    #[must_use]
     pub fn txbcgbfis(&mut self) -> TxbcgbfisW<MmcIntrTxSpec> {
         TxbcgbfisW::new(self, 12)
     }
     #[doc = "Bit 13 - MMC Transmit Underflow Error Frame Counter Interrupt Status"]
     #[inline(always)]
-    #[must_use]
     pub fn txuflowerfis(&mut self) -> TxuflowerfisW<MmcIntrTxSpec> {
         TxuflowerfisW::new(self, 13)
     }
     #[doc = "Bit 14 - MMC Transmit Single Collision Good Frame Counter Interrupt Status"]
     #[inline(always)]
-    #[must_use]
     pub fn txscolgfis(&mut self) -> TxscolgfisW<MmcIntrTxSpec> {
         TxscolgfisW::new(self, 14)
     }
     #[doc = "Bit 15 - MMC Transmit Multiple Collision Good Frame Counter Interrupt Status"]
     #[inline(always)]
-    #[must_use]
     pub fn txmcolgfis(&mut self) -> TxmcolgfisW<MmcIntrTxSpec> {
         TxmcolgfisW::new(self, 15)
     }
     #[doc = "Bit 16 - MMC Transmit Deferred Frame Counter Interrupt Status"]
     #[inline(always)]
-    #[must_use]
     pub fn txdeffis(&mut self) -> TxdeffisW<MmcIntrTxSpec> {
         TxdeffisW::new(self, 16)
     }
     #[doc = "Bit 17 - MMC Transmit Late Collision Frame Counter Interrupt Status"]
     #[inline(always)]
-    #[must_use]
     pub fn txlatcolfis(&mut self) -> TxlatcolfisW<MmcIntrTxSpec> {
         TxlatcolfisW::new(self, 17)
     }
     #[doc = "Bit 18 - MMC Transmit Excessive Collision Frame Counter Interrupt Status"]
     #[inline(always)]
-    #[must_use]
     pub fn txexcolfis(&mut self) -> TxexcolfisW<MmcIntrTxSpec> {
         TxexcolfisW::new(self, 18)
     }
     #[doc = "Bit 19 - MMC Transmit Carrier Error Frame Counter Interrupt Status"]
     #[inline(always)]
-    #[must_use]
     pub fn txcarerfis(&mut self) -> TxcarerfisW<MmcIntrTxSpec> {
         TxcarerfisW::new(self, 19)
     }
     #[doc = "Bit 20 - MMC Transmit Good Octet Counter Interrupt Status"]
     #[inline(always)]
-    #[must_use]
     pub fn txgoctis(&mut self) -> TxgoctisW<MmcIntrTxSpec> {
         TxgoctisW::new(self, 20)
     }
     #[doc = "Bit 21 - MMC Transmit Good Frame Counter Interrupt Status"]
     #[inline(always)]
-    #[must_use]
     pub fn txgfrmis(&mut self) -> TxgfrmisW<MmcIntrTxSpec> {
         TxgfrmisW::new(self, 21)
     }
     #[doc = "Bit 22 - MMC Transmit Excessive Deferral Frame Counter Interrupt Status"]
     #[inline(always)]
-    #[must_use]
     pub fn txexdeffis(&mut self) -> TxexdeffisW<MmcIntrTxSpec> {
         TxexdeffisW::new(self, 22)
     }
     #[doc = "Bit 23 - MMC Transmit Pause Frame Counter Interrupt Status"]
     #[inline(always)]
-    #[must_use]
     pub fn txpausfis(&mut self) -> TxpausfisW<MmcIntrTxSpec> {
         TxpausfisW::new(self, 23)
     }
     #[doc = "Bit 24 - MMC Transmit VLAN Good Frame Counter Interrupt Status"]
     #[inline(always)]
-    #[must_use]
     pub fn txvlangfis(&mut self) -> TxvlangfisW<MmcIntrTxSpec> {
         TxvlangfisW::new(self, 24)
     }
     #[doc = "Bit 25 - MMC Transmit Oversize Good Frame Counter Interrupt Status"]
     #[inline(always)]
-    #[must_use]
     pub fn txosizegfis(&mut self) -> TxosizegfisW<MmcIntrTxSpec> {
         TxosizegfisW::new(self, 25)
     }
 }
-#[doc = "MMC Transmit Interrupt Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mmc_intr_tx::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mmc_intr_tx::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "MMC Transmit Interrupt Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mmc_intr_tx::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mmc_intr_tx::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct MmcIntrTxSpec;
 impl crate::RegisterSpec for MmcIntrTxSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/rx1024maxoct_gb.rs b/va416xx/src/eth/rx1024maxoct_gb.rs
index aed43cc..973a1cb 100644
--- a/va416xx/src/eth/rx1024maxoct_gb.rs
+++ b/va416xx/src/eth/rx1024maxoct_gb.rs
@@ -9,7 +9,7 @@ impl R {
         CountR::new(self.bits)
     }
 }
-#[doc = "MMC Number of good and bad frames received with length between 1024 and max size bytes\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx1024maxoct_gb::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "MMC Number of good and bad frames received with length between 1024 and max size bytes\n\nYou can [`read`](crate::Reg::read) this register and get [`rx1024maxoct_gb::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Rx1024maxoctGbSpec;
 impl crate::RegisterSpec for Rx1024maxoctGbSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/rx128to255oct_gb.rs b/va416xx/src/eth/rx128to255oct_gb.rs
index 570447e..f6ecf1b 100644
--- a/va416xx/src/eth/rx128to255oct_gb.rs
+++ b/va416xx/src/eth/rx128to255oct_gb.rs
@@ -9,7 +9,7 @@ impl R {
         CountR::new(self.bits)
     }
 }
-#[doc = "MMC Number of good and bad frames received with length between 128 and 255 bytes\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx128to255oct_gb::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "MMC Number of good and bad frames received with length between 128 and 255 bytes\n\nYou can [`read`](crate::Reg::read) this register and get [`rx128to255oct_gb::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Rx128to255octGbSpec;
 impl crate::RegisterSpec for Rx128to255octGbSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/rx256to511oct_gb.rs b/va416xx/src/eth/rx256to511oct_gb.rs
index 298d61c..bf94996 100644
--- a/va416xx/src/eth/rx256to511oct_gb.rs
+++ b/va416xx/src/eth/rx256to511oct_gb.rs
@@ -9,7 +9,7 @@ impl R {
         CountR::new(self.bits)
     }
 }
-#[doc = "MMC Number of good and bad frames received with length between 256 and 511 bytes\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx256to511oct_gb::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "MMC Number of good and bad frames received with length between 256 and 511 bytes\n\nYou can [`read`](crate::Reg::read) this register and get [`rx256to511oct_gb::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Rx256to511octGbSpec;
 impl crate::RegisterSpec for Rx256to511octGbSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/rx512to1023oct_gb.rs b/va416xx/src/eth/rx512to1023oct_gb.rs
index a02df66..007665c 100644
--- a/va416xx/src/eth/rx512to1023oct_gb.rs
+++ b/va416xx/src/eth/rx512to1023oct_gb.rs
@@ -9,7 +9,7 @@ impl R {
         CountR::new(self.bits)
     }
 }
-#[doc = "MMC Number of good and bad frames received with length between 512 and 1023 bytes\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx512to1023oct_gb::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "MMC Number of good and bad frames received with length between 512 and 1023 bytes\n\nYou can [`read`](crate::Reg::read) this register and get [`rx512to1023oct_gb::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Rx512to1023octGbSpec;
 impl crate::RegisterSpec for Rx512to1023octGbSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/rx64octets_gb.rs b/va416xx/src/eth/rx64octets_gb.rs
index a5f714d..406c7a8 100644
--- a/va416xx/src/eth/rx64octets_gb.rs
+++ b/va416xx/src/eth/rx64octets_gb.rs
@@ -9,7 +9,7 @@ impl R {
         CountR::new(self.bits)
     }
 }
-#[doc = "MMC Number of good and bad frames received with length 64 bytes\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx64octets_gb::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "MMC Number of good and bad frames received with length 64 bytes\n\nYou can [`read`](crate::Reg::read) this register and get [`rx64octets_gb::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Rx64octetsGbSpec;
 impl crate::RegisterSpec for Rx64octetsGbSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/rx65to127oct_gb.rs b/va416xx/src/eth/rx65to127oct_gb.rs
index dd691e8..1eda28b 100644
--- a/va416xx/src/eth/rx65to127oct_gb.rs
+++ b/va416xx/src/eth/rx65to127oct_gb.rs
@@ -9,7 +9,7 @@ impl R {
         CountR::new(self.bits)
     }
 }
-#[doc = "MMC Number of good and bad frames received with length between 65 and 127 bytes\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx65to127oct_gb::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "MMC Number of good and bad frames received with length between 65 and 127 bytes\n\nYou can [`read`](crate::Reg::read) this register and get [`rx65to127oct_gb::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Rx65to127octGbSpec;
 impl crate::RegisterSpec for Rx65to127octGbSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/rxalignerror.rs b/va416xx/src/eth/rxalignerror.rs
index 433b904..6ead57a 100644
--- a/va416xx/src/eth/rxalignerror.rs
+++ b/va416xx/src/eth/rxalignerror.rs
@@ -9,7 +9,7 @@ impl R {
         CountR::new(self.bits)
     }
 }
-#[doc = "MMC Number of frames received with alignment error\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxalignerror::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "MMC Number of frames received with alignment error\n\nYou can [`read`](crate::Reg::read) this register and get [`rxalignerror::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct RxalignerrorSpec;
 impl crate::RegisterSpec for RxalignerrorSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/rxbcastframes_g.rs b/va416xx/src/eth/rxbcastframes_g.rs
index 2074e5e..183d726 100644
--- a/va416xx/src/eth/rxbcastframes_g.rs
+++ b/va416xx/src/eth/rxbcastframes_g.rs
@@ -9,7 +9,7 @@ impl R {
         CountR::new(self.bits)
     }
 }
-#[doc = "MMC Number of good broadcast frames received\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxbcastframes_g::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "MMC Number of good broadcast frames received\n\nYou can [`read`](crate::Reg::read) this register and get [`rxbcastframes_g::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct RxbcastframesGSpec;
 impl crate::RegisterSpec for RxbcastframesGSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/rxcrcerror.rs b/va416xx/src/eth/rxcrcerror.rs
index 33d47f1..e5177ad 100644
--- a/va416xx/src/eth/rxcrcerror.rs
+++ b/va416xx/src/eth/rxcrcerror.rs
@@ -9,7 +9,7 @@ impl R {
         CountR::new(self.bits)
     }
 }
-#[doc = "MMC Number of frames received with CRC error\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxcrcerror::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "MMC Number of frames received with CRC error\n\nYou can [`read`](crate::Reg::read) this register and get [`rxcrcerror::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct RxcrcerrorSpec;
 impl crate::RegisterSpec for RxcrcerrorSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/rxctrlframes_g.rs b/va416xx/src/eth/rxctrlframes_g.rs
index 949f2c9..d82c2a3 100644
--- a/va416xx/src/eth/rxctrlframes_g.rs
+++ b/va416xx/src/eth/rxctrlframes_g.rs
@@ -9,7 +9,7 @@ impl R {
         CountR::new(self.bits)
     }
 }
-#[doc = "MMC Number of received good control frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxctrlframes_g::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "MMC Number of received good control frames\n\nYou can [`read`](crate::Reg::read) this register and get [`rxctrlframes_g::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct RxctrlframesGSpec;
 impl crate::RegisterSpec for RxctrlframesGSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/rxfifooverflow.rs b/va416xx/src/eth/rxfifooverflow.rs
index e149320..c2b2c85 100644
--- a/va416xx/src/eth/rxfifooverflow.rs
+++ b/va416xx/src/eth/rxfifooverflow.rs
@@ -9,7 +9,7 @@ impl R {
         CountR::new(self.bits)
     }
 }
-#[doc = "MMC Number of missed received frames because of FIFO overflow\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxfifooverflow::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "MMC Number of missed received frames because of FIFO overflow\n\nYou can [`read`](crate::Reg::read) this register and get [`rxfifooverflow::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct RxfifooverflowSpec;
 impl crate::RegisterSpec for RxfifooverflowSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/rxframecount_gb.rs b/va416xx/src/eth/rxframecount_gb.rs
index 0b6cad3..4d77b47 100644
--- a/va416xx/src/eth/rxframecount_gb.rs
+++ b/va416xx/src/eth/rxframecount_gb.rs
@@ -9,7 +9,7 @@ impl R {
         CountR::new(self.bits)
     }
 }
-#[doc = "MMC Number of good and bad frames received\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxframecount_gb::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "MMC Number of good and bad frames received\n\nYou can [`read`](crate::Reg::read) this register and get [`rxframecount_gb::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct RxframecountGbSpec;
 impl crate::RegisterSpec for RxframecountGbSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/rxjabbererror.rs b/va416xx/src/eth/rxjabbererror.rs
index 88ba0fe..98a494d 100644
--- a/va416xx/src/eth/rxjabbererror.rs
+++ b/va416xx/src/eth/rxjabbererror.rs
@@ -9,7 +9,7 @@ impl R {
         CountR::new(self.bits)
     }
 }
-#[doc = "MMC Number of giant frames received with length greater than 1518 bytes and with CRC error\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxjabbererror::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "MMC Number of giant frames received with length greater than 1518 bytes and with CRC error\n\nYou can [`read`](crate::Reg::read) this register and get [`rxjabbererror::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct RxjabbererrorSpec;
 impl crate::RegisterSpec for RxjabbererrorSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/rxlengtherror.rs b/va416xx/src/eth/rxlengtherror.rs
index f838621..7dc8c42 100644
--- a/va416xx/src/eth/rxlengtherror.rs
+++ b/va416xx/src/eth/rxlengtherror.rs
@@ -9,7 +9,7 @@ impl R {
         CountR::new(self.bits)
     }
 }
-#[doc = "MMC Number of frames received with length error\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxlengtherror::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "MMC Number of frames received with length error\n\nYou can [`read`](crate::Reg::read) this register and get [`rxlengtherror::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct RxlengtherrorSpec;
 impl crate::RegisterSpec for RxlengtherrorSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/rxmcastframes_g.rs b/va416xx/src/eth/rxmcastframes_g.rs
index 3c2c4e7..de4162d 100644
--- a/va416xx/src/eth/rxmcastframes_g.rs
+++ b/va416xx/src/eth/rxmcastframes_g.rs
@@ -9,7 +9,7 @@ impl R {
         CountR::new(self.bits)
     }
 }
-#[doc = "MMC Number of good multicast frames received\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxmcastframes_g::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "MMC Number of good multicast frames received\n\nYou can [`read`](crate::Reg::read) this register and get [`rxmcastframes_g::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct RxmcastframesGSpec;
 impl crate::RegisterSpec for RxmcastframesGSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/rxoctetcount_g.rs b/va416xx/src/eth/rxoctetcount_g.rs
index 69e5aab..dc4e62d 100644
--- a/va416xx/src/eth/rxoctetcount_g.rs
+++ b/va416xx/src/eth/rxoctetcount_g.rs
@@ -9,7 +9,7 @@ impl R {
         CountR::new(self.bits)
     }
 }
-#[doc = "MMC Number of bytes received in good frames only\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxoctetcount_g::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "MMC Number of bytes received in good frames only\n\nYou can [`read`](crate::Reg::read) this register and get [`rxoctetcount_g::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct RxoctetcountGSpec;
 impl crate::RegisterSpec for RxoctetcountGSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/rxoctetcount_gb.rs b/va416xx/src/eth/rxoctetcount_gb.rs
index 2673785..4c8f772 100644
--- a/va416xx/src/eth/rxoctetcount_gb.rs
+++ b/va416xx/src/eth/rxoctetcount_gb.rs
@@ -9,7 +9,7 @@ impl R {
         CountR::new(self.bits)
     }
 }
-#[doc = "MMC Number of bytes received in good and bad frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxoctetcount_gb::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "MMC Number of bytes received in good and bad frames\n\nYou can [`read`](crate::Reg::read) this register and get [`rxoctetcount_gb::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct RxoctetcountGbSpec;
 impl crate::RegisterSpec for RxoctetcountGbSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/rxoutrangetype.rs b/va416xx/src/eth/rxoutrangetype.rs
index bbf7a57..dad61a0 100644
--- a/va416xx/src/eth/rxoutrangetype.rs
+++ b/va416xx/src/eth/rxoutrangetype.rs
@@ -9,7 +9,7 @@ impl R {
         CountR::new(self.bits)
     }
 }
-#[doc = "MMC Number of frames received with length field not equal to the valid frame size\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxoutrangetype::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "MMC Number of frames received with length field not equal to the valid frame size\n\nYou can [`read`](crate::Reg::read) this register and get [`rxoutrangetype::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct RxoutrangetypeSpec;
 impl crate::RegisterSpec for RxoutrangetypeSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/rxoversize_g.rs b/va416xx/src/eth/rxoversize_g.rs
index 5767117..31bcefb 100644
--- a/va416xx/src/eth/rxoversize_g.rs
+++ b/va416xx/src/eth/rxoversize_g.rs
@@ -9,7 +9,7 @@ impl R {
         CountR::new(self.bits)
     }
 }
-#[doc = "MMC Number of frames received without errors with length greater than the max size\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxoversize_g::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "MMC Number of frames received without errors with length greater than the max size\n\nYou can [`read`](crate::Reg::read) this register and get [`rxoversize_g::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct RxoversizeGSpec;
 impl crate::RegisterSpec for RxoversizeGSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/rxpauseframes.rs b/va416xx/src/eth/rxpauseframes.rs
index 71376de..268e479 100644
--- a/va416xx/src/eth/rxpauseframes.rs
+++ b/va416xx/src/eth/rxpauseframes.rs
@@ -9,7 +9,7 @@ impl R {
         CountR::new(self.bits)
     }
 }
-#[doc = "MMC Number of good and valid Pause frames received\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxpauseframes::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "MMC Number of good and valid Pause frames received\n\nYou can [`read`](crate::Reg::read) this register and get [`rxpauseframes::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct RxpauseframesSpec;
 impl crate::RegisterSpec for RxpauseframesSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/rxrcverror.rs b/va416xx/src/eth/rxrcverror.rs
index bc1b9d3..f338ecb 100644
--- a/va416xx/src/eth/rxrcverror.rs
+++ b/va416xx/src/eth/rxrcverror.rs
@@ -9,7 +9,7 @@ impl R {
         CountR::new(self.bits)
     }
 }
-#[doc = "MMC Number of frames received with Receive error or Frame Extension error\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxrcverror::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "MMC Number of frames received with Receive error or Frame Extension error\n\nYou can [`read`](crate::Reg::read) this register and get [`rxrcverror::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct RxrcverrorSpec;
 impl crate::RegisterSpec for RxrcverrorSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/rxrunterror.rs b/va416xx/src/eth/rxrunterror.rs
index 383a955..1e25d06 100644
--- a/va416xx/src/eth/rxrunterror.rs
+++ b/va416xx/src/eth/rxrunterror.rs
@@ -9,7 +9,7 @@ impl R {
         CountR::new(self.bits)
     }
 }
-#[doc = "MMC Number of frames received with runt error\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxrunterror::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "MMC Number of frames received with runt error\n\nYou can [`read`](crate::Reg::read) this register and get [`rxrunterror::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct RxrunterrorSpec;
 impl crate::RegisterSpec for RxrunterrorSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/rxucastframes_g.rs b/va416xx/src/eth/rxucastframes_g.rs
index 3e53f7f..064ad7e 100644
--- a/va416xx/src/eth/rxucastframes_g.rs
+++ b/va416xx/src/eth/rxucastframes_g.rs
@@ -9,7 +9,7 @@ impl R {
         CountR::new(self.bits)
     }
 }
-#[doc = "MMC Number of received good unicast frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxucastframes_g::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "MMC Number of received good unicast frames\n\nYou can [`read`](crate::Reg::read) this register and get [`rxucastframes_g::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct RxucastframesGSpec;
 impl crate::RegisterSpec for RxucastframesGSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/rxundersize_g.rs b/va416xx/src/eth/rxundersize_g.rs
index 4464266..57f45ae 100644
--- a/va416xx/src/eth/rxundersize_g.rs
+++ b/va416xx/src/eth/rxundersize_g.rs
@@ -9,7 +9,7 @@ impl R {
         CountR::new(self.bits)
     }
 }
-#[doc = "MMC Number of frames received with length less than 64 bytes\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxundersize_g::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "MMC Number of frames received with length less than 64 bytes\n\nYou can [`read`](crate::Reg::read) this register and get [`rxundersize_g::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct RxundersizeGSpec;
 impl crate::RegisterSpec for RxundersizeGSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/rxvlanframes_gb.rs b/va416xx/src/eth/rxvlanframes_gb.rs
index 81088d7..fa7385a 100644
--- a/va416xx/src/eth/rxvlanframes_gb.rs
+++ b/va416xx/src/eth/rxvlanframes_gb.rs
@@ -9,7 +9,7 @@ impl R {
         CountR::new(self.bits)
     }
 }
-#[doc = "MMC Number of good and bad VLAN frames received\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxvlanframes_gb::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "MMC Number of good and bad VLAN frames received\n\nYou can [`read`](crate::Reg::read) this register and get [`rxvlanframes_gb::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct RxvlanframesGbSpec;
 impl crate::RegisterSpec for RxvlanframesGbSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/rxwdogerror.rs b/va416xx/src/eth/rxwdogerror.rs
index 6d6d922..a10371c 100644
--- a/va416xx/src/eth/rxwdogerror.rs
+++ b/va416xx/src/eth/rxwdogerror.rs
@@ -9,7 +9,7 @@ impl R {
         CountR::new(self.bits)
     }
 }
-#[doc = "MMC Number of frames received with error because of watchdog timeout error\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxwdogerror::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "MMC Number of frames received with error because of watchdog timeout error\n\nYou can [`read`](crate::Reg::read) this register and get [`rxwdogerror::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct RxwdogerrorSpec;
 impl crate::RegisterSpec for RxwdogerrorSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/subsec_inc.rs b/va416xx/src/eth/subsec_inc.rs
index 02dd4a6..f1b6bd1 100644
--- a/va416xx/src/eth/subsec_inc.rs
+++ b/va416xx/src/eth/subsec_inc.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Sub-Second Increment Valuee"]
     #[inline(always)]
-    #[must_use]
     pub fn ssinc(&mut self) -> SsincW<SubsecIncSpec> {
         SsincW::new(self, 0)
     }
 }
-#[doc = "Holds the 8-bit value by which the Sub-Second register is incremented\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`subsec_inc::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`subsec_inc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Holds the 8-bit value by which the Sub-Second register is incremented\n\nYou can [`read`](crate::Reg::read) this register and get [`subsec_inc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`subsec_inc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct SubsecIncSpec;
 impl crate::RegisterSpec for SubsecIncSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/systime_nanosec.rs b/va416xx/src/eth/systime_nanosec.rs
index 0d91afe..b2bcf07 100644
--- a/va416xx/src/eth/systime_nanosec.rs
+++ b/va416xx/src/eth/systime_nanosec.rs
@@ -9,7 +9,7 @@ impl R {
         TsssR::new(self.bits & 0x7fff_ffff)
     }
 }
-#[doc = "Holds 32 bits of the nano-second field of the system time\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`systime_nanosec::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Holds 32 bits of the nano-second field of the system time\n\nYou can [`read`](crate::Reg::read) this register and get [`systime_nanosec::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct SystimeNanosecSpec;
 impl crate::RegisterSpec for SystimeNanosecSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/systime_nsecup.rs b/va416xx/src/eth/systime_nsecup.rs
index f2a86de..8bbbbaf 100644
--- a/va416xx/src/eth/systime_nsecup.rs
+++ b/va416xx/src/eth/systime_nsecup.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:30 - Timestamp Sub Seconds"]
     #[inline(always)]
-    #[must_use]
     pub fn tsss(&mut self) -> TsssW<SystimeNsecupSpec> {
         TsssW::new(self, 0)
     }
     #[doc = "Bit 31 - Add or Subtract Time"]
     #[inline(always)]
-    #[must_use]
     pub fn addsub(&mut self) -> AddsubW<SystimeNsecupSpec> {
         AddsubW::new(self, 31)
     }
 }
-#[doc = "Holds 32 bits of the nano-second field to be written to, added to, or subtracted from the system time value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`systime_nsecup::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`systime_nsecup::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Holds 32 bits of the nano-second field to be written to, added to, or subtracted from the system time value\n\nYou can [`read`](crate::Reg::read) this register and get [`systime_nsecup::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`systime_nsecup::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct SystimeNsecupSpec;
 impl crate::RegisterSpec for SystimeNsecupSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/systime_seconds.rs b/va416xx/src/eth/systime_seconds.rs
index 202f06c..c902101 100644
--- a/va416xx/src/eth/systime_seconds.rs
+++ b/va416xx/src/eth/systime_seconds.rs
@@ -9,7 +9,7 @@ impl R {
         TssR::new(self.bits)
     }
 }
-#[doc = "Holds the lower 32 bits of the second field of the system time\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`systime_seconds::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Holds the lower 32 bits of the second field of the system time\n\nYou can [`read`](crate::Reg::read) this register and get [`systime_seconds::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct SystimeSecondsSpec;
 impl crate::RegisterSpec for SystimeSecondsSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/systime_secsupdat.rs b/va416xx/src/eth/systime_secsupdat.rs
index 30d3328..09b3fba 100644
--- a/va416xx/src/eth/systime_secsupdat.rs
+++ b/va416xx/src/eth/systime_secsupdat.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:31 - Timestamp Second"]
     #[inline(always)]
-    #[must_use]
     pub fn tss(&mut self) -> TssW<SystimeSecsupdatSpec> {
         TssW::new(self, 0)
     }
 }
-#[doc = "Holds the lower 32 bits of the second field to be written to, added to, or subtracted from the system time value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`systime_secsupdat::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`systime_secsupdat::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Holds the lower 32 bits of the second field to be written to, added to, or subtracted from the system time value\n\nYou can [`read`](crate::Reg::read) this register and get [`systime_secsupdat::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`systime_secsupdat::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct SystimeSecsupdatSpec;
 impl crate::RegisterSpec for SystimeSecsupdatSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/target_time_nsec.rs b/va416xx/src/eth/target_time_nsec.rs
index 4e91ab0..dd3834d 100644
--- a/va416xx/src/eth/target_time_nsec.rs
+++ b/va416xx/src/eth/target_time_nsec.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:30 - Target Timestamp Low Register"]
     #[inline(always)]
-    #[must_use]
     pub fn ttslo(&mut self) -> TtsloW<TargetTimeNsecSpec> {
         TtsloW::new(self, 0)
     }
     #[doc = "Bit 31 - 32 Bits of Hash Table"]
     #[inline(always)]
-    #[must_use]
     pub fn trgtbusy(&mut self) -> TrgtbusyW<TargetTimeNsecSpec> {
         TrgtbusyW::new(self, 31)
     }
 }
-#[doc = "Holds the lower 32-bits of time to be compared with the system time\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`target_time_nsec::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`target_time_nsec::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Holds the lower 32-bits of time to be compared with the system time\n\nYou can [`read`](crate::Reg::read) this register and get [`target_time_nsec::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`target_time_nsec::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct TargetTimeNsecSpec;
 impl crate::RegisterSpec for TargetTimeNsecSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/target_time_secs.rs b/va416xx/src/eth/target_time_secs.rs
index b5d9c4d..bc56f6b 100644
--- a/va416xx/src/eth/target_time_secs.rs
+++ b/va416xx/src/eth/target_time_secs.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:31 - Target Time Seconds Registe"]
     #[inline(always)]
-    #[must_use]
     pub fn tstr(&mut self) -> TstrW<TargetTimeSecsSpec> {
         TstrW::new(self, 0)
     }
 }
-#[doc = "Holds the high 32-bits of time to be compared with the system time\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`target_time_secs::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`target_time_secs::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Holds the high 32-bits of time to be compared with the system time\n\nYou can [`read`](crate::Reg::read) this register and get [`target_time_secs::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`target_time_secs::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct TargetTimeSecsSpec;
 impl crate::RegisterSpec for TargetTimeSecsSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/timestamp_ctrl.rs b/va416xx/src/eth/timestamp_ctrl.rs
index e41dce4..b92a1f1 100644
--- a/va416xx/src/eth/timestamp_ctrl.rs
+++ b/va416xx/src/eth/timestamp_ctrl.rs
@@ -196,132 +196,111 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Timestamp Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn tsena(&mut self) -> TsenaW<TimestampCtrlSpec> {
         TsenaW::new(self, 0)
     }
     #[doc = "Bit 1 - Timestamp Fine or Coarse Update"]
     #[inline(always)]
-    #[must_use]
     pub fn tscfupdt(&mut self) -> TscfupdtW<TimestampCtrlSpec> {
         TscfupdtW::new(self, 1)
     }
     #[doc = "Bit 2 - Timestamp Initialize"]
     #[inline(always)]
-    #[must_use]
     pub fn tsinit(&mut self) -> TsinitW<TimestampCtrlSpec> {
         TsinitW::new(self, 2)
     }
     #[doc = "Bit 3 - Timestamp Update"]
     #[inline(always)]
-    #[must_use]
     pub fn tsupdt(&mut self) -> TsupdtW<TimestampCtrlSpec> {
         TsupdtW::new(self, 3)
     }
     #[doc = "Bit 4 - Timestamp Interrupt Trigger Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn tstrig(&mut self) -> TstrigW<TimestampCtrlSpec> {
         TstrigW::new(self, 4)
     }
     #[doc = "Bit 5 - Addend Reg Update"]
     #[inline(always)]
-    #[must_use]
     pub fn tsaddrreg(&mut self) -> TsaddrregW<TimestampCtrlSpec> {
         TsaddrregW::new(self, 5)
     }
     #[doc = "Bit 8 - Enable Timestamp for All Frames"]
     #[inline(always)]
-    #[must_use]
     pub fn tsenall(&mut self) -> TsenallW<TimestampCtrlSpec> {
         TsenallW::new(self, 8)
     }
     #[doc = "Bit 9 - Timestamp Digital or Binary Rollover Control"]
     #[inline(always)]
-    #[must_use]
     pub fn tsctrlssr(&mut self) -> TsctrlssrW<TimestampCtrlSpec> {
         TsctrlssrW::new(self, 9)
     }
     #[doc = "Bit 10 - Enable PTP packet Processing for Version 2 Format"]
     #[inline(always)]
-    #[must_use]
     pub fn tsver2ena(&mut self) -> Tsver2enaW<TimestampCtrlSpec> {
         Tsver2enaW::new(self, 10)
     }
     #[doc = "Bit 11 - Enable Processing of PTP over Ethernet Frames"]
     #[inline(always)]
-    #[must_use]
     pub fn tsipena(&mut self) -> TsipenaW<TimestampCtrlSpec> {
         TsipenaW::new(self, 11)
     }
     #[doc = "Bit 12 - Enable Processing of PTP Frames Sent over IPv6-UDP"]
     #[inline(always)]
-    #[must_use]
     pub fn tsipv6ena(&mut self) -> Tsipv6enaW<TimestampCtrlSpec> {
         Tsipv6enaW::new(self, 12)
     }
     #[doc = "Bit 13 - Enable Processing of PTP Frames Sent over IPv4-UDP"]
     #[inline(always)]
-    #[must_use]
     pub fn tsipv4ena(&mut self) -> Tsipv4enaW<TimestampCtrlSpec> {
         Tsipv4enaW::new(self, 13)
     }
     #[doc = "Bit 14 - Enable Timestamp Snapshot for Event Messages"]
     #[inline(always)]
-    #[must_use]
     pub fn tsevntena(&mut self) -> TsevntenaW<TimestampCtrlSpec> {
         TsevntenaW::new(self, 14)
     }
     #[doc = "Bit 15 - Enable Snapshot for Messages Relevant to Master"]
     #[inline(always)]
-    #[must_use]
     pub fn tsmstrena(&mut self) -> TsmstrenaW<TimestampCtrlSpec> {
         TsmstrenaW::new(self, 15)
     }
     #[doc = "Bits 16:17 - Select PTP packets for Taking Snapshots"]
     #[inline(always)]
-    #[must_use]
     pub fn snaptypsel(&mut self) -> SnaptypselW<TimestampCtrlSpec> {
         SnaptypselW::new(self, 16)
     }
     #[doc = "Bit 18 - Enable MAC address for PTP Frame Filtering"]
     #[inline(always)]
-    #[must_use]
     pub fn tsenmacaddr(&mut self) -> TsenmacaddrW<TimestampCtrlSpec> {
         TsenmacaddrW::new(self, 18)
     }
     #[doc = "Bit 24 - Auxiliary Snapshot FIFO Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn atsfc(&mut self) -> AtsfcW<TimestampCtrlSpec> {
         AtsfcW::new(self, 24)
     }
     #[doc = "Bit 25 - Auxiliary Snapshot 0 Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn atsen0(&mut self) -> Atsen0W<TimestampCtrlSpec> {
         Atsen0W::new(self, 25)
     }
     #[doc = "Bit 26 - Auxiliary Snapshot 1 Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn atsen1(&mut self) -> Atsen1W<TimestampCtrlSpec> {
         Atsen1W::new(self, 26)
     }
     #[doc = "Bit 27 - Auxiliary Snapshot 2 Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn atsen2(&mut self) -> Atsen2W<TimestampCtrlSpec> {
         Atsen2W::new(self, 27)
     }
     #[doc = "Bit 28 - Auxiliary Snapshot 3 Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn atsen3(&mut self) -> Atsen3W<TimestampCtrlSpec> {
         Atsen3W::new(self, 28)
     }
 }
-#[doc = "Controls the IEEE 1588 timestamp generation and update logic\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`timestamp_ctrl::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`timestamp_ctrl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Controls the IEEE 1588 timestamp generation and update logic\n\nYou can [`read`](crate::Reg::read) this register and get [`timestamp_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timestamp_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct TimestampCtrlSpec;
 impl crate::RegisterSpec for TimestampCtrlSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/timestampaddend.rs b/va416xx/src/eth/timestampaddend.rs
index 3b76f70..a0b2d56 100644
--- a/va416xx/src/eth/timestampaddend.rs
+++ b/va416xx/src/eth/timestampaddend.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:31 - Timestamp Addend Register"]
     #[inline(always)]
-    #[must_use]
     pub fn tsar(&mut self) -> TsarW<TimestampaddendSpec> {
         TsarW::new(self, 0)
     }
 }
-#[doc = "This register is used by software to re-adjust the clock frequency linearly to match the Master clock frequency\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`timestampaddend::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`timestampaddend::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "This register is used by software to re-adjust the clock frequency linearly to match the Master clock frequency\n\nYou can [`read`](crate::Reg::read) this register and get [`timestampaddend::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timestampaddend::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct TimestampaddendSpec;
 impl crate::RegisterSpec for TimestampaddendSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/tx1024maxoct_gb.rs b/va416xx/src/eth/tx1024maxoct_gb.rs
index 6f1c043..5279700 100644
--- a/va416xx/src/eth/tx1024maxoct_gb.rs
+++ b/va416xx/src/eth/tx1024maxoct_gb.rs
@@ -9,7 +9,7 @@ impl R {
         CountR::new(self.bits)
     }
 }
-#[doc = "MMC Good and bad Frames transmitted with length 1024 to max bytes\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx1024maxoct_gb::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "MMC Good and bad Frames transmitted with length 1024 to max bytes\n\nYou can [`read`](crate::Reg::read) this register and get [`tx1024maxoct_gb::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Tx1024maxoctGbSpec;
 impl crate::RegisterSpec for Tx1024maxoctGbSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/tx128to255oct_gb.rs b/va416xx/src/eth/tx128to255oct_gb.rs
index 021b3d8..a31872b 100644
--- a/va416xx/src/eth/tx128to255oct_gb.rs
+++ b/va416xx/src/eth/tx128to255oct_gb.rs
@@ -9,7 +9,7 @@ impl R {
         CountR::new(self.bits)
     }
 }
-#[doc = "MMC Good and bad Frames transmitted with length 128 to 255\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx128to255oct_gb::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "MMC Good and bad Frames transmitted with length 128 to 255\n\nYou can [`read`](crate::Reg::read) this register and get [`tx128to255oct_gb::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Tx128to255octGbSpec;
 impl crate::RegisterSpec for Tx128to255octGbSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/tx256to511oct_gb.rs b/va416xx/src/eth/tx256to511oct_gb.rs
index f131a58..9576106 100644
--- a/va416xx/src/eth/tx256to511oct_gb.rs
+++ b/va416xx/src/eth/tx256to511oct_gb.rs
@@ -9,7 +9,7 @@ impl R {
         CountR::new(self.bits)
     }
 }
-#[doc = "MMC Good and bad Frames transmitted with length 256 to 511\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx256to511oct_gb::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "MMC Good and bad Frames transmitted with length 256 to 511\n\nYou can [`read`](crate::Reg::read) this register and get [`tx256to511oct_gb::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Tx256to511octGbSpec;
 impl crate::RegisterSpec for Tx256to511octGbSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/tx512to1023oct_gb.rs b/va416xx/src/eth/tx512to1023oct_gb.rs
index e0451c5..57e95cb 100644
--- a/va416xx/src/eth/tx512to1023oct_gb.rs
+++ b/va416xx/src/eth/tx512to1023oct_gb.rs
@@ -9,7 +9,7 @@ impl R {
         CountR::new(self.bits)
     }
 }
-#[doc = "MMC Good and bad Frames transmitted with length 512 to 1023\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx512to1023oct_gb::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "MMC Good and bad Frames transmitted with length 512 to 1023\n\nYou can [`read`](crate::Reg::read) this register and get [`tx512to1023oct_gb::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Tx512to1023octGbSpec;
 impl crate::RegisterSpec for Tx512to1023octGbSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/tx64oct_gb.rs b/va416xx/src/eth/tx64oct_gb.rs
index ed2432d..cdd3d94 100644
--- a/va416xx/src/eth/tx64oct_gb.rs
+++ b/va416xx/src/eth/tx64oct_gb.rs
@@ -9,7 +9,7 @@ impl R {
         CountR::new(self.bits)
     }
 }
-#[doc = "MMC Good and bad Frames transmitted with length 64\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx64oct_gb::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "MMC Good and bad Frames transmitted with length 64\n\nYou can [`read`](crate::Reg::read) this register and get [`tx64oct_gb::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Tx64octGbSpec;
 impl crate::RegisterSpec for Tx64octGbSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/tx65to127oct_gb.rs b/va416xx/src/eth/tx65to127oct_gb.rs
index 9a36048..8de383d 100644
--- a/va416xx/src/eth/tx65to127oct_gb.rs
+++ b/va416xx/src/eth/tx65to127oct_gb.rs
@@ -9,7 +9,7 @@ impl R {
         CountR::new(self.bits)
     }
 }
-#[doc = "MMC Good and bad Frames transmitted with length 65 to 127\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx65to127oct_gb::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "MMC Good and bad Frames transmitted with length 65 to 127\n\nYou can [`read`](crate::Reg::read) this register and get [`tx65to127oct_gb::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Tx65to127octGbSpec;
 impl crate::RegisterSpec for Tx65to127octGbSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/txbcastframe_gb.rs b/va416xx/src/eth/txbcastframe_gb.rs
index 650735f..68e9d6a 100644
--- a/va416xx/src/eth/txbcastframe_gb.rs
+++ b/va416xx/src/eth/txbcastframe_gb.rs
@@ -9,7 +9,7 @@ impl R {
         CountR::new(self.bits)
     }
 }
-#[doc = "MMC number of good and bad broadcast frames transmitted\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txbcastframe_gb::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "MMC number of good and bad broadcast frames transmitted\n\nYou can [`read`](crate::Reg::read) this register and get [`txbcastframe_gb::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct TxbcastframeGbSpec;
 impl crate::RegisterSpec for TxbcastframeGbSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/txbcastframes_g.rs b/va416xx/src/eth/txbcastframes_g.rs
index 6ad1301..c85ae06 100644
--- a/va416xx/src/eth/txbcastframes_g.rs
+++ b/va416xx/src/eth/txbcastframes_g.rs
@@ -9,7 +9,7 @@ impl R {
         CountR::new(self.bits)
     }
 }
-#[doc = "MMC Good Broadcast Frames Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txbcastframes_g::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "MMC Good Broadcast Frames Register\n\nYou can [`read`](crate::Reg::read) this register and get [`txbcastframes_g::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct TxbcastframesGSpec;
 impl crate::RegisterSpec for TxbcastframesGSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/txcarriererror.rs b/va416xx/src/eth/txcarriererror.rs
index 48b8c3e..22314ed 100644
--- a/va416xx/src/eth/txcarriererror.rs
+++ b/va416xx/src/eth/txcarriererror.rs
@@ -9,7 +9,7 @@ impl R {
         CountR::new(self.bits)
     }
 }
-#[doc = "MMC Number of aborted frames because of carrier sense error\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txcarriererror::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "MMC Number of aborted frames because of carrier sense error\n\nYou can [`read`](crate::Reg::read) this register and get [`txcarriererror::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct TxcarriererrorSpec;
 impl crate::RegisterSpec for TxcarriererrorSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/txdeferred.rs b/va416xx/src/eth/txdeferred.rs
index 879b8e9..86babe3 100644
--- a/va416xx/src/eth/txdeferred.rs
+++ b/va416xx/src/eth/txdeferred.rs
@@ -9,7 +9,7 @@ impl R {
         CountR::new(self.bits)
     }
 }
-#[doc = "MMC Number of successfully transmitted frames after a deferral\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txdeferred::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "MMC Number of successfully transmitted frames after a deferral\n\nYou can [`read`](crate::Reg::read) this register and get [`txdeferred::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct TxdeferredSpec;
 impl crate::RegisterSpec for TxdeferredSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/txexcessdef.rs b/va416xx/src/eth/txexcessdef.rs
index 49dba0b..861d64b 100644
--- a/va416xx/src/eth/txexcessdef.rs
+++ b/va416xx/src/eth/txexcessdef.rs
@@ -9,7 +9,7 @@ impl R {
         CountR::new(self.bits)
     }
 }
-#[doc = "MMC Number of frames aborted because of excessive deferral error\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txexcessdef::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "MMC Number of frames aborted because of excessive deferral error\n\nYou can [`read`](crate::Reg::read) this register and get [`txexcessdef::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct TxexcessdefSpec;
 impl crate::RegisterSpec for TxexcessdefSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/txexesscol.rs b/va416xx/src/eth/txexesscol.rs
index 1fda568..c73094c 100644
--- a/va416xx/src/eth/txexesscol.rs
+++ b/va416xx/src/eth/txexesscol.rs
@@ -9,7 +9,7 @@ impl R {
         CountR::new(self.bits)
     }
 }
-#[doc = "MMC Number of aborted frames because of excessive collision errors\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txexesscol::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "MMC Number of aborted frames because of excessive collision errors\n\nYou can [`read`](crate::Reg::read) this register and get [`txexesscol::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct TxexesscolSpec;
 impl crate::RegisterSpec for TxexesscolSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/txframecount_g.rs b/va416xx/src/eth/txframecount_g.rs
index 1828751..da04df8 100644
--- a/va416xx/src/eth/txframecount_g.rs
+++ b/va416xx/src/eth/txframecount_g.rs
@@ -9,7 +9,7 @@ impl R {
         CountR::new(self.bits)
     }
 }
-#[doc = "MMC Number of good frames transmitted\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txframecount_g::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "MMC Number of good frames transmitted\n\nYou can [`read`](crate::Reg::read) this register and get [`txframecount_g::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct TxframecountGSpec;
 impl crate::RegisterSpec for TxframecountGSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/txframecount_gb.rs b/va416xx/src/eth/txframecount_gb.rs
index 7327de5..8a0dc33 100644
--- a/va416xx/src/eth/txframecount_gb.rs
+++ b/va416xx/src/eth/txframecount_gb.rs
@@ -9,7 +9,7 @@ impl R {
         CountR::new(self.bits)
     }
 }
-#[doc = "MMC Frame Count Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txframecount_gb::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "MMC Frame Count Register\n\nYou can [`read`](crate::Reg::read) this register and get [`txframecount_gb::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct TxframecountGbSpec;
 impl crate::RegisterSpec for TxframecountGbSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/txlanframes_g.rs b/va416xx/src/eth/txlanframes_g.rs
index 3006719..7c8eae2 100644
--- a/va416xx/src/eth/txlanframes_g.rs
+++ b/va416xx/src/eth/txlanframes_g.rs
@@ -9,7 +9,7 @@ impl R {
         CountR::new(self.bits)
     }
 }
-#[doc = "MMC Number of good VLAN frames transmitted\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txlanframes_g::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "MMC Number of good VLAN frames transmitted\n\nYou can [`read`](crate::Reg::read) this register and get [`txlanframes_g::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct TxlanframesGSpec;
 impl crate::RegisterSpec for TxlanframesGSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/txlatecol.rs b/va416xx/src/eth/txlatecol.rs
index 2041d11..5f23671 100644
--- a/va416xx/src/eth/txlatecol.rs
+++ b/va416xx/src/eth/txlatecol.rs
@@ -9,7 +9,7 @@ impl R {
         CountR::new(self.bits)
     }
 }
-#[doc = "MMC Number of aborted frames because of late collision error\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txlatecol::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "MMC Number of aborted frames because of late collision error\n\nYou can [`read`](crate::Reg::read) this register and get [`txlatecol::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct TxlatecolSpec;
 impl crate::RegisterSpec for TxlatecolSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/txmcastframe_gb.rs b/va416xx/src/eth/txmcastframe_gb.rs
index 478ff2c..8ac0982 100644
--- a/va416xx/src/eth/txmcastframe_gb.rs
+++ b/va416xx/src/eth/txmcastframe_gb.rs
@@ -9,7 +9,7 @@ impl R {
         CountR::new(self.bits)
     }
 }
-#[doc = "MMC number of good and bad MULTIcast frames transmitted\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txmcastframe_gb::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "MMC number of good and bad MULTIcast frames transmitted\n\nYou can [`read`](crate::Reg::read) this register and get [`txmcastframe_gb::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct TxmcastframeGbSpec;
 impl crate::RegisterSpec for TxmcastframeGbSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/txmcastframes_g.rs b/va416xx/src/eth/txmcastframes_g.rs
index b165a17..d4a725c 100644
--- a/va416xx/src/eth/txmcastframes_g.rs
+++ b/va416xx/src/eth/txmcastframes_g.rs
@@ -9,7 +9,7 @@ impl R {
         CountR::new(self.bits)
     }
 }
-#[doc = "MMC Good Multicast Frames Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txmcastframes_g::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "MMC Good Multicast Frames Register\n\nYou can [`read`](crate::Reg::read) this register and get [`txmcastframes_g::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct TxmcastframesGSpec;
 impl crate::RegisterSpec for TxmcastframesGSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/txmulticol_g.rs b/va416xx/src/eth/txmulticol_g.rs
index 6d1c3a3..a3f1089 100644
--- a/va416xx/src/eth/txmulticol_g.rs
+++ b/va416xx/src/eth/txmulticol_g.rs
@@ -9,7 +9,7 @@ impl R {
         CountR::new(self.bits)
     }
 }
-#[doc = "MMC Number of successfully transmitted frames after multiple collisions\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txmulticol_g::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "MMC Number of successfully transmitted frames after multiple collisions\n\nYou can [`read`](crate::Reg::read) this register and get [`txmulticol_g::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct TxmulticolGSpec;
 impl crate::RegisterSpec for TxmulticolGSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/txoctetcount_g.rs b/va416xx/src/eth/txoctetcount_g.rs
index d48556e..7688e8c 100644
--- a/va416xx/src/eth/txoctetcount_g.rs
+++ b/va416xx/src/eth/txoctetcount_g.rs
@@ -9,7 +9,7 @@ impl R {
         CountR::new(self.bits)
     }
 }
-#[doc = "MMC Number of bytes transmitted frames only in good frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txoctetcount_g::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "MMC Number of bytes transmitted frames only in good frames\n\nYou can [`read`](crate::Reg::read) this register and get [`txoctetcount_g::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct TxoctetcountGSpec;
 impl crate::RegisterSpec for TxoctetcountGSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/txoctetcount_gb.rs b/va416xx/src/eth/txoctetcount_gb.rs
index 77d2143..a45ef7d 100644
--- a/va416xx/src/eth/txoctetcount_gb.rs
+++ b/va416xx/src/eth/txoctetcount_gb.rs
@@ -9,7 +9,7 @@ impl R {
         CountR::new(self.bits)
     }
 }
-#[doc = "MMC Transmit Count\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txoctetcount_gb::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "MMC Transmit Count\n\nYou can [`read`](crate::Reg::read) this register and get [`txoctetcount_gb::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct TxoctetcountGbSpec;
 impl crate::RegisterSpec for TxoctetcountGbSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/txoversize_g.rs b/va416xx/src/eth/txoversize_g.rs
index df066e9..0a543a0 100644
--- a/va416xx/src/eth/txoversize_g.rs
+++ b/va416xx/src/eth/txoversize_g.rs
@@ -9,7 +9,7 @@ impl R {
         CountR::new(self.bits)
     }
 }
-#[doc = "MMC Number of frames transmitted without errors\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txoversize_g::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "MMC Number of frames transmitted without errors\n\nYou can [`read`](crate::Reg::read) this register and get [`txoversize_g::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct TxoversizeGSpec;
 impl crate::RegisterSpec for TxoversizeGSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/txpauseframes.rs b/va416xx/src/eth/txpauseframes.rs
index e495689..28bc091 100644
--- a/va416xx/src/eth/txpauseframes.rs
+++ b/va416xx/src/eth/txpauseframes.rs
@@ -9,7 +9,7 @@ impl R {
         CountR::new(self.bits)
     }
 }
-#[doc = "MMC Number of good pause frames transmitted\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txpauseframes::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "MMC Number of good pause frames transmitted\n\nYou can [`read`](crate::Reg::read) this register and get [`txpauseframes::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct TxpauseframesSpec;
 impl crate::RegisterSpec for TxpauseframesSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/txsinglecol_g.rs b/va416xx/src/eth/txsinglecol_g.rs
index 4fc0ccf..dafcfb1 100644
--- a/va416xx/src/eth/txsinglecol_g.rs
+++ b/va416xx/src/eth/txsinglecol_g.rs
@@ -9,7 +9,7 @@ impl R {
         CountR::new(self.bits)
     }
 }
-#[doc = "MMC Number of successfully transmitted frames after a single collision\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txsinglecol_g::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "MMC Number of successfully transmitted frames after a single collision\n\nYou can [`read`](crate::Reg::read) this register and get [`txsinglecol_g::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct TxsinglecolGSpec;
 impl crate::RegisterSpec for TxsinglecolGSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/txucastframe_gb.rs b/va416xx/src/eth/txucastframe_gb.rs
index 951c3d9..0a253ae 100644
--- a/va416xx/src/eth/txucastframe_gb.rs
+++ b/va416xx/src/eth/txucastframe_gb.rs
@@ -9,7 +9,7 @@ impl R {
         CountR::new(self.bits)
     }
 }
-#[doc = "MMC number of good and bad unicast frames transmitted\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txucastframe_gb::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "MMC number of good and bad unicast frames transmitted\n\nYou can [`read`](crate::Reg::read) this register and get [`txucastframe_gb::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct TxucastframeGbSpec;
 impl crate::RegisterSpec for TxucastframeGbSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/txundererr.rs b/va416xx/src/eth/txundererr.rs
index 03d9c8f..1fb7952 100644
--- a/va416xx/src/eth/txundererr.rs
+++ b/va416xx/src/eth/txundererr.rs
@@ -9,7 +9,7 @@ impl R {
         CountR::new(self.bits)
     }
 }
-#[doc = "MMC number of frames aborted because of frame underflow error\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txundererr::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "MMC number of frames aborted because of frame underflow error\n\nYou can [`read`](crate::Reg::read) this register and get [`txundererr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct TxundererrSpec;
 impl crate::RegisterSpec for TxundererrSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/vlan_hashtable.rs b/va416xx/src/eth/vlan_hashtable.rs
index f6166d5..172b6a1 100644
--- a/va416xx/src/eth/vlan_hashtable.rs
+++ b/va416xx/src/eth/vlan_hashtable.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - VLAN Hash Table"]
     #[inline(always)]
-    #[must_use]
     pub fn vlht(&mut self) -> VlhtW<VlanHashtableSpec> {
         VlhtW::new(self, 0)
     }
 }
-#[doc = "Holds the VLAN Hash Table\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`vlan_hashtable::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`vlan_hashtable::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Holds the VLAN Hash Table\n\nYou can [`read`](crate::Reg::read) this register and get [`vlan_hashtable::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`vlan_hashtable::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct VlanHashtableSpec;
 impl crate::RegisterSpec for VlanHashtableSpec {
     type Ux = u32;
diff --git a/va416xx/src/eth/vlan_increplace.rs b/va416xx/src/eth/vlan_increplace.rs
index d733b5a..dfb537a 100644
--- a/va416xx/src/eth/vlan_increplace.rs
+++ b/va416xx/src/eth/vlan_increplace.rs
@@ -43,30 +43,26 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - VLAN Tag for Transmit Frames"]
     #[inline(always)]
-    #[must_use]
     pub fn vlt(&mut self) -> VltW<VlanIncreplaceSpec> {
         VltW::new(self, 0)
     }
     #[doc = "Bits 16:17 - VLAN Tag Control in Transmit Frames"]
     #[inline(always)]
-    #[must_use]
     pub fn vlc(&mut self) -> VlcW<VlanIncreplaceSpec> {
         VlcW::new(self, 16)
     }
     #[doc = "Bit 18 - VLAN Priority Control"]
     #[inline(always)]
-    #[must_use]
     pub fn vlp(&mut self) -> VlpW<VlanIncreplaceSpec> {
         VlpW::new(self, 18)
     }
     #[doc = "Bit 19 - C-VLAN or S-VLAN"]
     #[inline(always)]
-    #[must_use]
     pub fn csvl(&mut self) -> CsvlW<VlanIncreplaceSpec> {
         CsvlW::new(self, 19)
     }
 }
-#[doc = "Holds the VLAN Tag for insertion into or replacement in the transmit frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`vlan_increplace::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`vlan_increplace::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Holds the VLAN Tag for insertion into or replacement in the transmit frames\n\nYou can [`read`](crate::Reg::read) this register and get [`vlan_increplace::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`vlan_increplace::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct VlanIncreplaceSpec;
 impl crate::RegisterSpec for VlanIncreplaceSpec {
     type Ux = u32;
diff --git a/va416xx/src/generic.rs b/va416xx/src/generic.rs
index 45ebed1..59eec56 100644
--- a/va416xx/src/generic.rs
+++ b/va416xx/src/generic.rs
@@ -82,169 +82,6 @@ pub trait Resettable: RegisterSpec {
         Self::RESET_VALUE
     }
 }
-#[doc = " This structure provides volatile access to registers."]
-#[repr(transparent)]
-pub struct Reg<REG: RegisterSpec> {
-    register: vcell::VolatileCell<REG::Ux>,
-    _marker: marker::PhantomData<REG>,
-}
-unsafe impl<REG: RegisterSpec> Send for Reg<REG> where REG::Ux: Send {}
-impl<REG: RegisterSpec> Reg<REG> {
-    #[doc = " Returns the underlying memory address of register."]
-    #[doc = ""]
-    #[doc = " ```ignore"]
-    #[doc = " let reg_ptr = periph.reg.as_ptr();"]
-    #[doc = " ```"]
-    #[inline(always)]
-    pub fn as_ptr(&self) -> *mut REG::Ux {
-        self.register.as_ptr()
-    }
-}
-impl<REG: Readable> Reg<REG> {
-    #[doc = " Reads the contents of a `Readable` register."]
-    #[doc = ""]
-    #[doc = " You can read the raw contents of a register by using `bits`:"]
-    #[doc = " ```ignore"]
-    #[doc = " let bits = periph.reg.read().bits();"]
-    #[doc = " ```"]
-    #[doc = " or get the content of a particular field of a register:"]
-    #[doc = " ```ignore"]
-    #[doc = " let reader = periph.reg.read();"]
-    #[doc = " let bits = reader.field1().bits();"]
-    #[doc = " let flag = reader.field2().bit_is_set();"]
-    #[doc = " ```"]
-    #[inline(always)]
-    pub fn read(&self) -> R<REG> {
-        R {
-            bits: self.register.get(),
-            _reg: marker::PhantomData,
-        }
-    }
-}
-impl<REG: Resettable + Writable> Reg<REG> {
-    #[doc = " Writes the reset value to `Writable` register."]
-    #[doc = ""]
-    #[doc = " Resets the register to its initial state."]
-    #[inline(always)]
-    pub fn reset(&self) {
-        self.register.set(REG::RESET_VALUE)
-    }
-    #[doc = " Writes bits to a `Writable` register."]
-    #[doc = ""]
-    #[doc = " You can write raw bits into a register:"]
-    #[doc = " ```ignore"]
-    #[doc = " periph.reg.write(|w| unsafe { w.bits(rawbits) });"]
-    #[doc = " ```"]
-    #[doc = " or write only the fields you need:"]
-    #[doc = " ```ignore"]
-    #[doc = " periph.reg.write(|w| w"]
-    #[doc = "     .field1().bits(newfield1bits)"]
-    #[doc = "     .field2().set_bit()"]
-    #[doc = "     .field3().variant(VARIANT)"]
-    #[doc = " );"]
-    #[doc = " ```"]
-    #[doc = " or an alternative way of saying the same:"]
-    #[doc = " ```ignore"]
-    #[doc = " periph.reg.write(|w| {"]
-    #[doc = "     w.field1().bits(newfield1bits);"]
-    #[doc = "     w.field2().set_bit();"]
-    #[doc = "     w.field3().variant(VARIANT)"]
-    #[doc = " });"]
-    #[doc = " ```"]
-    #[doc = " In the latter case, other fields will be set to their reset value."]
-    #[inline(always)]
-    pub fn write<F>(&self, f: F)
-    where
-        F: FnOnce(&mut W<REG>) -> &mut W<REG>,
-    {
-        self.register.set(
-            f(&mut W {
-                bits: REG::RESET_VALUE & !REG::ONE_TO_MODIFY_FIELDS_BITMAP
-                    | REG::ZERO_TO_MODIFY_FIELDS_BITMAP,
-                _reg: marker::PhantomData,
-            })
-            .bits,
-        );
-    }
-}
-impl<REG: Writable> Reg<REG> {
-    #[doc = " Writes 0 to a `Writable` register."]
-    #[doc = ""]
-    #[doc = " Similar to `write`, but unused bits will contain 0."]
-    #[doc = ""]
-    #[doc = " # Safety"]
-    #[doc = ""]
-    #[doc = " Unsafe to use with registers which don't allow to write 0."]
-    #[inline(always)]
-    pub unsafe fn write_with_zero<F>(&self, f: F)
-    where
-        F: FnOnce(&mut W<REG>) -> &mut W<REG>,
-    {
-        self.register.set(
-            f(&mut W {
-                bits: REG::Ux::default(),
-                _reg: marker::PhantomData,
-            })
-            .bits,
-        );
-    }
-}
-impl<REG: Readable + Writable> Reg<REG> {
-    #[doc = " Modifies the contents of the register by reading and then writing it."]
-    #[doc = ""]
-    #[doc = " E.g. to do a read-modify-write sequence to change parts of a register:"]
-    #[doc = " ```ignore"]
-    #[doc = " periph.reg.modify(|r, w| unsafe { w.bits("]
-    #[doc = "    r.bits() | 3"]
-    #[doc = " ) });"]
-    #[doc = " ```"]
-    #[doc = " or"]
-    #[doc = " ```ignore"]
-    #[doc = " periph.reg.modify(|_, w| w"]
-    #[doc = "     .field1().bits(newfield1bits)"]
-    #[doc = "     .field2().set_bit()"]
-    #[doc = "     .field3().variant(VARIANT)"]
-    #[doc = " );"]
-    #[doc = " ```"]
-    #[doc = " or an alternative way of saying the same:"]
-    #[doc = " ```ignore"]
-    #[doc = " periph.reg.modify(|_, w| {"]
-    #[doc = "     w.field1().bits(newfield1bits);"]
-    #[doc = "     w.field2().set_bit();"]
-    #[doc = "     w.field3().variant(VARIANT)"]
-    #[doc = " });"]
-    #[doc = " ```"]
-    #[doc = " Other fields will have the value they had before the call to `modify`."]
-    #[inline(always)]
-    pub fn modify<F>(&self, f: F)
-    where
-        for<'w> F: FnOnce(&R<REG>, &'w mut W<REG>) -> &'w mut W<REG>,
-    {
-        let bits = self.register.get();
-        self.register.set(
-            f(
-                &R {
-                    bits,
-                    _reg: marker::PhantomData,
-                },
-                &mut W {
-                    bits: bits & !REG::ONE_TO_MODIFY_FIELDS_BITMAP
-                        | REG::ZERO_TO_MODIFY_FIELDS_BITMAP,
-                    _reg: marker::PhantomData,
-                },
-            )
-            .bits,
-        );
-    }
-}
-impl<REG: Readable> core::fmt::Debug for crate::generic::Reg<REG>
-where
-    R<REG>: core::fmt::Debug,
-{
-    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
-        core::fmt::Debug::fmt(&self.read(), f)
-    }
-}
 #[doc(hidden)]
 pub mod raw;
 #[doc = " Register reader."]
@@ -369,7 +206,7 @@ pub struct RangeTo<const MAX: u64>;
 #[doc = " Write field Proxy"]
 pub type FieldWriter<'a, REG, const WI: u8, FI = u8, Safety = Unsafe> =
     raw::FieldWriter<'a, REG, WI, FI, Safety>;
-impl<'a, REG, const WI: u8, FI, Safety> FieldWriter<'a, REG, WI, FI, Safety>
+impl<REG, const WI: u8, FI, Safety> FieldWriter<'_, REG, WI, FI, Safety>
 where
     REG: Writable + RegisterSpec,
     FI: FieldSpec,
@@ -616,3 +453,278 @@ where
         self.w
     }
 }
+#[doc = " This structure provides volatile access to registers."]
+#[repr(transparent)]
+pub struct Reg<REG: RegisterSpec> {
+    register: vcell::VolatileCell<REG::Ux>,
+    _marker: marker::PhantomData<REG>,
+}
+unsafe impl<REG: RegisterSpec> Send for Reg<REG> where REG::Ux: Send {}
+impl<REG: RegisterSpec> Reg<REG> {
+    #[doc = " Returns the underlying memory address of register."]
+    #[doc = ""]
+    #[doc = " ```ignore"]
+    #[doc = " let reg_ptr = periph.reg.as_ptr();"]
+    #[doc = " ```"]
+    #[inline(always)]
+    pub fn as_ptr(&self) -> *mut REG::Ux {
+        self.register.as_ptr()
+    }
+}
+impl<REG: Readable> Reg<REG> {
+    #[doc = " Reads the contents of a `Readable` register."]
+    #[doc = ""]
+    #[doc = " You can read the raw contents of a register by using `bits`:"]
+    #[doc = " ```ignore"]
+    #[doc = " let bits = periph.reg.read().bits();"]
+    #[doc = " ```"]
+    #[doc = " or get the content of a particular field of a register:"]
+    #[doc = " ```ignore"]
+    #[doc = " let reader = periph.reg.read();"]
+    #[doc = " let bits = reader.field1().bits();"]
+    #[doc = " let flag = reader.field2().bit_is_set();"]
+    #[doc = " ```"]
+    #[inline(always)]
+    pub fn read(&self) -> R<REG> {
+        R {
+            bits: self.register.get(),
+            _reg: marker::PhantomData,
+        }
+    }
+}
+impl<REG: Resettable + Writable> Reg<REG> {
+    #[doc = " Writes the reset value to `Writable` register."]
+    #[doc = ""]
+    #[doc = " Resets the register to its initial state."]
+    #[inline(always)]
+    pub fn reset(&self) {
+        self.register.set(REG::RESET_VALUE)
+    }
+    #[doc = " Writes bits to a `Writable` register."]
+    #[doc = ""]
+    #[doc = " You can write raw bits into a register:"]
+    #[doc = " ```ignore"]
+    #[doc = " periph.reg.write(|w| unsafe { w.bits(rawbits) });"]
+    #[doc = " ```"]
+    #[doc = " or write only the fields you need:"]
+    #[doc = " ```ignore"]
+    #[doc = " periph.reg.write(|w| w"]
+    #[doc = "     .field1().bits(newfield1bits)"]
+    #[doc = "     .field2().set_bit()"]
+    #[doc = "     .field3().variant(VARIANT)"]
+    #[doc = " );"]
+    #[doc = " ```"]
+    #[doc = " or an alternative way of saying the same:"]
+    #[doc = " ```ignore"]
+    #[doc = " periph.reg.write(|w| {"]
+    #[doc = "     w.field1().bits(newfield1bits);"]
+    #[doc = "     w.field2().set_bit();"]
+    #[doc = "     w.field3().variant(VARIANT)"]
+    #[doc = " });"]
+    #[doc = " ```"]
+    #[doc = " In the latter case, other fields will be set to their reset value."]
+    #[inline(always)]
+    pub fn write<F>(&self, f: F) -> REG::Ux
+    where
+        F: FnOnce(&mut W<REG>) -> &mut W<REG>,
+    {
+        let value = f(&mut W {
+            bits: REG::RESET_VALUE & !REG::ONE_TO_MODIFY_FIELDS_BITMAP
+                | REG::ZERO_TO_MODIFY_FIELDS_BITMAP,
+            _reg: marker::PhantomData,
+        })
+        .bits;
+        self.register.set(value);
+        value
+    }
+    #[doc = " Writes bits to a `Writable` register and produce a value."]
+    #[doc = ""]
+    #[doc = " You can write raw bits into a register:"]
+    #[doc = " ```ignore"]
+    #[doc = " periph.reg.write_and(|w| unsafe { w.bits(rawbits); });"]
+    #[doc = " ```"]
+    #[doc = " or write only the fields you need:"]
+    #[doc = " ```ignore"]
+    #[doc = " periph.reg.write_and(|w| {"]
+    #[doc = "     w.field1().bits(newfield1bits)"]
+    #[doc = "         .field2().set_bit()"]
+    #[doc = "         .field3().variant(VARIANT);"]
+    #[doc = " });"]
+    #[doc = " ```"]
+    #[doc = " or an alternative way of saying the same:"]
+    #[doc = " ```ignore"]
+    #[doc = " periph.reg.write_and(|w| {"]
+    #[doc = "     w.field1().bits(newfield1bits);"]
+    #[doc = "     w.field2().set_bit();"]
+    #[doc = "     w.field3().variant(VARIANT);"]
+    #[doc = " });"]
+    #[doc = " ```"]
+    #[doc = " In the latter case, other fields will be set to their reset value."]
+    #[doc = ""]
+    #[doc = " Values can be returned from the closure:"]
+    #[doc = " ```ignore"]
+    #[doc = " let state = periph.reg.write_and(|w| State::set(w.field1()));"]
+    #[doc = " ```"]
+    #[inline(always)]
+    pub fn from_write<F, T>(&self, f: F) -> T
+    where
+        F: FnOnce(&mut W<REG>) -> T,
+    {
+        let mut writer = W {
+            bits: REG::RESET_VALUE & !REG::ONE_TO_MODIFY_FIELDS_BITMAP
+                | REG::ZERO_TO_MODIFY_FIELDS_BITMAP,
+            _reg: marker::PhantomData,
+        };
+        let result = f(&mut writer);
+        self.register.set(writer.bits);
+        result
+    }
+}
+impl<REG: Writable> Reg<REG> {
+    #[doc = " Writes 0 to a `Writable` register."]
+    #[doc = ""]
+    #[doc = " Similar to `write`, but unused bits will contain 0."]
+    #[doc = ""]
+    #[doc = " # Safety"]
+    #[doc = ""]
+    #[doc = " Unsafe to use with registers which don't allow to write 0."]
+    #[inline(always)]
+    pub unsafe fn write_with_zero<F>(&self, f: F) -> REG::Ux
+    where
+        F: FnOnce(&mut W<REG>) -> &mut W<REG>,
+    {
+        let value = f(&mut W {
+            bits: REG::Ux::default(),
+            _reg: marker::PhantomData,
+        })
+        .bits;
+        self.register.set(value);
+        value
+    }
+    #[doc = " Writes 0 to a `Writable` register and produces a value."]
+    #[doc = ""]
+    #[doc = " Similar to `write`, but unused bits will contain 0."]
+    #[doc = ""]
+    #[doc = " # Safety"]
+    #[doc = ""]
+    #[doc = " Unsafe to use with registers which don't allow to write 0."]
+    #[inline(always)]
+    pub unsafe fn from_write_with_zero<F, T>(&self, f: F) -> T
+    where
+        F: FnOnce(&mut W<REG>) -> T,
+    {
+        let mut writer = W {
+            bits: REG::Ux::default(),
+            _reg: marker::PhantomData,
+        };
+        let result = f(&mut writer);
+        self.register.set(writer.bits);
+        result
+    }
+}
+impl<REG: Readable + Writable> Reg<REG> {
+    #[doc = " Modifies the contents of the register by reading and then writing it."]
+    #[doc = ""]
+    #[doc = " E.g. to do a read-modify-write sequence to change parts of a register:"]
+    #[doc = " ```ignore"]
+    #[doc = " periph.reg.modify(|r, w| unsafe { w.bits("]
+    #[doc = "    r.bits() | 3"]
+    #[doc = " ) });"]
+    #[doc = " ```"]
+    #[doc = " or"]
+    #[doc = " ```ignore"]
+    #[doc = " periph.reg.modify(|_, w| w"]
+    #[doc = "     .field1().bits(newfield1bits)"]
+    #[doc = "     .field2().set_bit()"]
+    #[doc = "     .field3().variant(VARIANT)"]
+    #[doc = " );"]
+    #[doc = " ```"]
+    #[doc = " or an alternative way of saying the same:"]
+    #[doc = " ```ignore"]
+    #[doc = " periph.reg.modify(|_, w| {"]
+    #[doc = "     w.field1().bits(newfield1bits);"]
+    #[doc = "     w.field2().set_bit();"]
+    #[doc = "     w.field3().variant(VARIANT)"]
+    #[doc = " });"]
+    #[doc = " ```"]
+    #[doc = " Other fields will have the value they had before the call to `modify`."]
+    #[inline(always)]
+    pub fn modify<F>(&self, f: F) -> REG::Ux
+    where
+        for<'w> F: FnOnce(&R<REG>, &'w mut W<REG>) -> &'w mut W<REG>,
+    {
+        let bits = self.register.get();
+        let value = f(
+            &R {
+                bits,
+                _reg: marker::PhantomData,
+            },
+            &mut W {
+                bits: bits & !REG::ONE_TO_MODIFY_FIELDS_BITMAP | REG::ZERO_TO_MODIFY_FIELDS_BITMAP,
+                _reg: marker::PhantomData,
+            },
+        )
+        .bits;
+        self.register.set(value);
+        value
+    }
+    #[doc = " Modifies the contents of the register by reading and then writing it"]
+    #[doc = " and produces a value."]
+    #[doc = ""]
+    #[doc = " E.g. to do a read-modify-write sequence to change parts of a register:"]
+    #[doc = " ```ignore"]
+    #[doc = " let bits = periph.reg.modify(|r, w| {"]
+    #[doc = "     let new_bits = r.bits() | 3;"]
+    #[doc = "     unsafe {"]
+    #[doc = "         w.bits(new_bits);"]
+    #[doc = "     }"]
+    #[doc = ""]
+    #[doc = "     new_bits"]
+    #[doc = " });"]
+    #[doc = " ```"]
+    #[doc = " or"]
+    #[doc = " ```ignore"]
+    #[doc = " periph.reg.modify(|_, w| {"]
+    #[doc = "     w.field1().bits(newfield1bits)"]
+    #[doc = "         .field2().set_bit()"]
+    #[doc = "         .field3().variant(VARIANT);"]
+    #[doc = " });"]
+    #[doc = " ```"]
+    #[doc = " or an alternative way of saying the same:"]
+    #[doc = " ```ignore"]
+    #[doc = " periph.reg.modify(|_, w| {"]
+    #[doc = "     w.field1().bits(newfield1bits);"]
+    #[doc = "     w.field2().set_bit();"]
+    #[doc = "     w.field3().variant(VARIANT);"]
+    #[doc = " });"]
+    #[doc = " ```"]
+    #[doc = " Other fields will have the value they had before the call to `modify`."]
+    #[inline(always)]
+    pub fn from_modify<F, T>(&self, f: F) -> T
+    where
+        for<'w> F: FnOnce(&R<REG>, &'w mut W<REG>) -> T,
+    {
+        let bits = self.register.get();
+        let mut writer = W {
+            bits: bits & !REG::ONE_TO_MODIFY_FIELDS_BITMAP | REG::ZERO_TO_MODIFY_FIELDS_BITMAP,
+            _reg: marker::PhantomData,
+        };
+        let result = f(
+            &R {
+                bits,
+                _reg: marker::PhantomData,
+            },
+            &mut writer,
+        );
+        self.register.set(writer.bits);
+        result
+    }
+}
+impl<REG: Readable> core::fmt::Debug for crate::generic::Reg<REG>
+where
+    R<REG>: core::fmt::Debug,
+{
+    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
+        core::fmt::Debug::fmt(&self.read(), f)
+    }
+}
diff --git a/va416xx/src/generic/raw.rs b/va416xx/src/generic/raw.rs
index 81f5779..d60a23a 100644
--- a/va416xx/src/generic/raw.rs
+++ b/va416xx/src/generic/raw.rs
@@ -41,6 +41,7 @@ impl<FI> BitReader<FI> {
         }
     }
 }
+#[must_use = "after creating `FieldWriter` you need to call field value setting method"]
 pub struct FieldWriter<'a, REG, const WI: u8, FI = u8, Safety = Unsafe>
 where
     REG: Writable + RegisterSpec,
@@ -66,6 +67,7 @@ where
         }
     }
 }
+#[must_use = "after creating `BitWriter` you need to call bit setting method"]
 pub struct BitWriter<'a, REG, FI = bool, M = BitM>
 where
     REG: Writable + RegisterSpec,
diff --git a/va416xx/src/i2c0.rs b/va416xx/src/i2c0.rs
index 2492ae0..fca725e 100644
--- a/va416xx/src/i2c0.rs
+++ b/va416xx/src/i2c0.rs
@@ -240,67 +240,67 @@ impl RegisterBlock {
         &self.perid
     }
 }
-#[doc = "CTRL (rw) register accessor: Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctrl::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`]
+#[doc = "CTRL (rw) register accessor: Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`]
 module"]
 #[doc(alias = "CTRL")]
 pub type Ctrl = crate::Reg<ctrl::CtrlSpec>;
 #[doc = "Control Register"]
 pub mod ctrl;
-#[doc = "CLKSCALE (rw) register accessor: Clock Scale divide value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clkscale::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clkscale::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkscale`]
+#[doc = "CLKSCALE (rw) register accessor: Clock Scale divide value\n\nYou can [`read`](crate::Reg::read) this register and get [`clkscale::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkscale::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkscale`]
 module"]
 #[doc(alias = "CLKSCALE")]
 pub type Clkscale = crate::Reg<clkscale::ClkscaleSpec>;
 #[doc = "Clock Scale divide value"]
 pub mod clkscale;
-#[doc = "WORDS (rw) register accessor: Word Count value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`words::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`words::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@words`]
+#[doc = "WORDS (rw) register accessor: Word Count value\n\nYou can [`read`](crate::Reg::read) this register and get [`words::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`words::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@words`]
 module"]
 #[doc(alias = "WORDS")]
 pub type Words = crate::Reg<words::WordsSpec>;
 #[doc = "Word Count value"]
 pub mod words;
-#[doc = "ADDRESS (rw) register accessor: I2C Address value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`address::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`address::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@address`]
+#[doc = "ADDRESS (rw) register accessor: I2C Address value\n\nYou can [`read`](crate::Reg::read) this register and get [`address::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`address::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@address`]
 module"]
 #[doc(alias = "ADDRESS")]
 pub type Address = crate::Reg<address::AddressSpec>;
 #[doc = "I2C Address value"]
 pub mod address;
-#[doc = "DATA (rw) register accessor: Data Input/Output\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data`]
+#[doc = "DATA (rw) register accessor: Data Input/Output\n\nYou can [`read`](crate::Reg::read) this register and get [`data::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data`]
 module"]
 #[doc(alias = "DATA")]
 pub type Data = crate::Reg<data::DataSpec>;
 #[doc = "Data Input/Output"]
 pub mod data;
-#[doc = "CMD (rw) register accessor: Command Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cmd::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cmd::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmd`]
+#[doc = "CMD (rw) register accessor: Command Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cmd::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmd`]
 module"]
 #[doc(alias = "CMD")]
 pub type Cmd = crate::Reg<cmd::CmdSpec>;
 #[doc = "Command Register"]
 pub mod cmd;
-#[doc = "STATUS (rw) register accessor: I2C Controller Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`status::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`status::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`]
+#[doc = "STATUS (rw) register accessor: I2C Controller Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`status::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`]
 module"]
 #[doc(alias = "STATUS")]
 pub type Status = crate::Reg<status::StatusSpec>;
 #[doc = "I2C Controller Status Register"]
 pub mod status;
-#[doc = "STATE (r) register accessor: Internal STATE of I2C Master Controller\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`state::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@state`]
+#[doc = "STATE (r) register accessor: Internal STATE of I2C Master Controller\n\nYou can [`read`](crate::Reg::read) this register and get [`state::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@state`]
 module"]
 #[doc(alias = "STATE")]
 pub type State = crate::Reg<state::StateSpec>;
 #[doc = "Internal STATE of I2C Master Controller"]
 pub mod state;
-#[doc = "TXCOUNT (r) register accessor: TX Count Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txcount::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txcount`]
+#[doc = "TXCOUNT (r) register accessor: TX Count Register\n\nYou can [`read`](crate::Reg::read) this register and get [`txcount::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txcount`]
 module"]
 #[doc(alias = "TXCOUNT")]
 pub type Txcount = crate::Reg<txcount::TxcountSpec>;
 #[doc = "TX Count Register"]
 pub mod txcount;
-#[doc = "RXCOUNT (r) register accessor: RX Count Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxcount::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxcount`]
+#[doc = "RXCOUNT (r) register accessor: RX Count Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rxcount::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxcount`]
 module"]
 #[doc(alias = "RXCOUNT")]
 pub type Rxcount = crate::Reg<rxcount::RxcountSpec>;
 #[doc = "RX Count Register"]
 pub mod rxcount;
-#[doc = "IRQ_ENB (rw) register accessor: Interrupt Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_enb::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`irq_enb::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_enb`]
+#[doc = "IRQ_ENB (rw) register accessor: Interrupt Enable Register\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_enb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`irq_enb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_enb`]
 module"]
 #[doc(alias = "IRQ_ENB")]
 pub type IrqEnb = crate::Reg<irq_enb::IrqEnbSpec>;
@@ -312,97 +312,97 @@ pub use irq_enb as irq_clr;
 pub use IrqEnb as IrqRaw;
 pub use IrqEnb as IrqEnd;
 pub use IrqEnb as IrqClr;
-#[doc = "RXFIFOIRQTRG (rw) register accessor: Rx FIFO IRQ Trigger Level\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxfifoirqtrg::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rxfifoirqtrg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxfifoirqtrg`]
+#[doc = "RXFIFOIRQTRG (rw) register accessor: Rx FIFO IRQ Trigger Level\n\nYou can [`read`](crate::Reg::read) this register and get [`rxfifoirqtrg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rxfifoirqtrg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxfifoirqtrg`]
 module"]
 #[doc(alias = "RXFIFOIRQTRG")]
 pub type Rxfifoirqtrg = crate::Reg<rxfifoirqtrg::RxfifoirqtrgSpec>;
 #[doc = "Rx FIFO IRQ Trigger Level"]
 pub mod rxfifoirqtrg;
-#[doc = "TXFIFOIRQTRG (rw) register accessor: Tx FIFO IRQ Trigger Level\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txfifoirqtrg::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`txfifoirqtrg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txfifoirqtrg`]
+#[doc = "TXFIFOIRQTRG (rw) register accessor: Tx FIFO IRQ Trigger Level\n\nYou can [`read`](crate::Reg::read) this register and get [`txfifoirqtrg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`txfifoirqtrg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txfifoirqtrg`]
 module"]
 #[doc(alias = "TXFIFOIRQTRG")]
 pub type Txfifoirqtrg = crate::Reg<txfifoirqtrg::TxfifoirqtrgSpec>;
 #[doc = "Tx FIFO IRQ Trigger Level"]
 pub mod txfifoirqtrg;
-#[doc = "FIFO_CLR (w) register accessor: Clear FIFO Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fifo_clr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fifo_clr`]
+#[doc = "FIFO_CLR (w) register accessor: Clear FIFO Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fifo_clr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fifo_clr`]
 module"]
 #[doc(alias = "FIFO_CLR")]
 pub type FifoClr = crate::Reg<fifo_clr::FifoClrSpec>;
 #[doc = "Clear FIFO Register"]
 pub mod fifo_clr;
-#[doc = "TMCONFIG (rw) register accessor: Timing Config Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tmconfig::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tmconfig::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tmconfig`]
+#[doc = "TMCONFIG (rw) register accessor: Timing Config Register\n\nYou can [`read`](crate::Reg::read) this register and get [`tmconfig::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tmconfig::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tmconfig`]
 module"]
 #[doc(alias = "TMCONFIG")]
 pub type Tmconfig = crate::Reg<tmconfig::TmconfigSpec>;
 #[doc = "Timing Config Register"]
 pub mod tmconfig;
-#[doc = "CLKTOLIMIT (rw) register accessor: Clock Low Timeout Limit Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clktolimit::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clktolimit::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clktolimit`]
+#[doc = "CLKTOLIMIT (rw) register accessor: Clock Low Timeout Limit Register\n\nYou can [`read`](crate::Reg::read) this register and get [`clktolimit::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clktolimit::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clktolimit`]
 module"]
 #[doc(alias = "CLKTOLIMIT")]
 pub type Clktolimit = crate::Reg<clktolimit::ClktolimitSpec>;
 #[doc = "Clock Low Timeout Limit Register"]
 pub mod clktolimit;
-#[doc = "S0_CTRL (rw) register accessor: Slave Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`s0_ctrl::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`s0_ctrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@s0_ctrl`]
+#[doc = "S0_CTRL (rw) register accessor: Slave Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`s0_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`s0_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@s0_ctrl`]
 module"]
 #[doc(alias = "S0_CTRL")]
 pub type S0Ctrl = crate::Reg<s0_ctrl::S0CtrlSpec>;
 #[doc = "Slave Control Register"]
 pub mod s0_ctrl;
-#[doc = "S0_MAXWORDS (rw) register accessor: Slave MaxWords Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`s0_maxwords::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`s0_maxwords::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@s0_maxwords`]
+#[doc = "S0_MAXWORDS (rw) register accessor: Slave MaxWords Register\n\nYou can [`read`](crate::Reg::read) this register and get [`s0_maxwords::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`s0_maxwords::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@s0_maxwords`]
 module"]
 #[doc(alias = "S0_MAXWORDS")]
 pub type S0Maxwords = crate::Reg<s0_maxwords::S0MaxwordsSpec>;
 #[doc = "Slave MaxWords Register"]
 pub mod s0_maxwords;
-#[doc = "S0_ADDRESS (rw) register accessor: Slave I2C Address Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`s0_address::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`s0_address::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@s0_address`]
+#[doc = "S0_ADDRESS (rw) register accessor: Slave I2C Address Value\n\nYou can [`read`](crate::Reg::read) this register and get [`s0_address::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`s0_address::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@s0_address`]
 module"]
 #[doc(alias = "S0_ADDRESS")]
 pub type S0Address = crate::Reg<s0_address::S0AddressSpec>;
 #[doc = "Slave I2C Address Value"]
 pub mod s0_address;
-#[doc = "S0_ADDRESSMASK (rw) register accessor: Slave I2C Address Mask value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`s0_addressmask::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`s0_addressmask::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@s0_addressmask`]
+#[doc = "S0_ADDRESSMASK (rw) register accessor: Slave I2C Address Mask value\n\nYou can [`read`](crate::Reg::read) this register and get [`s0_addressmask::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`s0_addressmask::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@s0_addressmask`]
 module"]
 #[doc(alias = "S0_ADDRESSMASK")]
 pub type S0Addressmask = crate::Reg<s0_addressmask::S0AddressmaskSpec>;
 #[doc = "Slave I2C Address Mask value"]
 pub mod s0_addressmask;
-#[doc = "S0_DATA (rw) register accessor: Slave Data Input/Output\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`s0_data::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`s0_data::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@s0_data`]
+#[doc = "S0_DATA (rw) register accessor: Slave Data Input/Output\n\nYou can [`read`](crate::Reg::read) this register and get [`s0_data::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`s0_data::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@s0_data`]
 module"]
 #[doc(alias = "S0_DATA")]
 pub type S0Data = crate::Reg<s0_data::S0DataSpec>;
 #[doc = "Slave Data Input/Output"]
 pub mod s0_data;
-#[doc = "S0_LASTADDRESS (r) register accessor: Slave I2C Last Address value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`s0_lastaddress::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@s0_lastaddress`]
+#[doc = "S0_LASTADDRESS (r) register accessor: Slave I2C Last Address value\n\nYou can [`read`](crate::Reg::read) this register and get [`s0_lastaddress::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@s0_lastaddress`]
 module"]
 #[doc(alias = "S0_LASTADDRESS")]
 pub type S0Lastaddress = crate::Reg<s0_lastaddress::S0LastaddressSpec>;
 #[doc = "Slave I2C Last Address value"]
 pub mod s0_lastaddress;
-#[doc = "S0_STATUS (r) register accessor: Slave I2C Controller Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`s0_status::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@s0_status`]
+#[doc = "S0_STATUS (r) register accessor: Slave I2C Controller Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`s0_status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@s0_status`]
 module"]
 #[doc(alias = "S0_STATUS")]
 pub type S0Status = crate::Reg<s0_status::S0StatusSpec>;
 #[doc = "Slave I2C Controller Status Register"]
 pub mod s0_status;
-#[doc = "S0_STATE (r) register accessor: Internal STATE of I2C Slave Controller\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`s0_state::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@s0_state`]
+#[doc = "S0_STATE (r) register accessor: Internal STATE of I2C Slave Controller\n\nYou can [`read`](crate::Reg::read) this register and get [`s0_state::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@s0_state`]
 module"]
 #[doc(alias = "S0_STATE")]
 pub type S0State = crate::Reg<s0_state::S0StateSpec>;
 #[doc = "Internal STATE of I2C Slave Controller"]
 pub mod s0_state;
-#[doc = "S0_TXCOUNT (r) register accessor: Slave TX Count Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`s0_txcount::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@s0_txcount`]
+#[doc = "S0_TXCOUNT (r) register accessor: Slave TX Count Register\n\nYou can [`read`](crate::Reg::read) this register and get [`s0_txcount::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@s0_txcount`]
 module"]
 #[doc(alias = "S0_TXCOUNT")]
 pub type S0Txcount = crate::Reg<s0_txcount::S0TxcountSpec>;
 #[doc = "Slave TX Count Register"]
 pub mod s0_txcount;
-#[doc = "S0_RXCOUNT (r) register accessor: Slave RX Count Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`s0_rxcount::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@s0_rxcount`]
+#[doc = "S0_RXCOUNT (r) register accessor: Slave RX Count Register\n\nYou can [`read`](crate::Reg::read) this register and get [`s0_rxcount::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@s0_rxcount`]
 module"]
 #[doc(alias = "S0_RXCOUNT")]
 pub type S0Rxcount = crate::Reg<s0_rxcount::S0RxcountSpec>;
 #[doc = "Slave RX Count Register"]
 pub mod s0_rxcount;
-#[doc = "S0_IRQ_ENB (rw) register accessor: Slave Interrupt Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`s0_irq_enb::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`s0_irq_enb::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@s0_irq_enb`]
+#[doc = "S0_IRQ_ENB (rw) register accessor: Slave Interrupt Enable Register\n\nYou can [`read`](crate::Reg::read) this register and get [`s0_irq_enb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`s0_irq_enb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@s0_irq_enb`]
 module"]
 #[doc(alias = "S0_IRQ_ENB")]
 pub type S0IrqEnb = crate::Reg<s0_irq_enb::S0IrqEnbSpec>;
@@ -414,37 +414,37 @@ pub use s0_irq_enb as s0_irq_clr;
 pub use S0IrqEnb as S0IrqRaw;
 pub use S0IrqEnb as S0IrqEnd;
 pub use S0IrqEnb as S0IrqClr;
-#[doc = "S0_RXFIFOIRQTRG (rw) register accessor: Slave Rx FIFO IRQ Trigger Level\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`s0_rxfifoirqtrg::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`s0_rxfifoirqtrg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@s0_rxfifoirqtrg`]
+#[doc = "S0_RXFIFOIRQTRG (rw) register accessor: Slave Rx FIFO IRQ Trigger Level\n\nYou can [`read`](crate::Reg::read) this register and get [`s0_rxfifoirqtrg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`s0_rxfifoirqtrg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@s0_rxfifoirqtrg`]
 module"]
 #[doc(alias = "S0_RXFIFOIRQTRG")]
 pub type S0Rxfifoirqtrg = crate::Reg<s0_rxfifoirqtrg::S0RxfifoirqtrgSpec>;
 #[doc = "Slave Rx FIFO IRQ Trigger Level"]
 pub mod s0_rxfifoirqtrg;
-#[doc = "S0_TXFIFOIRQTRG (rw) register accessor: Slave Tx FIFO IRQ Trigger Level\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`s0_txfifoirqtrg::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`s0_txfifoirqtrg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@s0_txfifoirqtrg`]
+#[doc = "S0_TXFIFOIRQTRG (rw) register accessor: Slave Tx FIFO IRQ Trigger Level\n\nYou can [`read`](crate::Reg::read) this register and get [`s0_txfifoirqtrg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`s0_txfifoirqtrg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@s0_txfifoirqtrg`]
 module"]
 #[doc(alias = "S0_TXFIFOIRQTRG")]
 pub type S0Txfifoirqtrg = crate::Reg<s0_txfifoirqtrg::S0TxfifoirqtrgSpec>;
 #[doc = "Slave Tx FIFO IRQ Trigger Level"]
 pub mod s0_txfifoirqtrg;
-#[doc = "S0_FIFO_CLR (w) register accessor: Slave Clear FIFO Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`s0_fifo_clr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@s0_fifo_clr`]
+#[doc = "S0_FIFO_CLR (w) register accessor: Slave Clear FIFO Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`s0_fifo_clr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@s0_fifo_clr`]
 module"]
 #[doc(alias = "S0_FIFO_CLR")]
 pub type S0FifoClr = crate::Reg<s0_fifo_clr::S0FifoClrSpec>;
 #[doc = "Slave Clear FIFO Register"]
 pub mod s0_fifo_clr;
-#[doc = "S0_ADDRESSB (rw) register accessor: Slave I2C Address B Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`s0_addressb::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`s0_addressb::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@s0_addressb`]
+#[doc = "S0_ADDRESSB (rw) register accessor: Slave I2C Address B Value\n\nYou can [`read`](crate::Reg::read) this register and get [`s0_addressb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`s0_addressb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@s0_addressb`]
 module"]
 #[doc(alias = "S0_ADDRESSB")]
 pub type S0Addressb = crate::Reg<s0_addressb::S0AddressbSpec>;
 #[doc = "Slave I2C Address B Value"]
 pub mod s0_addressb;
-#[doc = "S0_ADDRESSMASKB (rw) register accessor: Slave I2C Address B Mask value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`s0_addressmaskb::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`s0_addressmaskb::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@s0_addressmaskb`]
+#[doc = "S0_ADDRESSMASKB (rw) register accessor: Slave I2C Address B Mask value\n\nYou can [`read`](crate::Reg::read) this register and get [`s0_addressmaskb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`s0_addressmaskb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@s0_addressmaskb`]
 module"]
 #[doc(alias = "S0_ADDRESSMASKB")]
 pub type S0Addressmaskb = crate::Reg<s0_addressmaskb::S0AddressmaskbSpec>;
 #[doc = "Slave I2C Address B Mask value"]
 pub mod s0_addressmaskb;
-#[doc = "PERID (r) register accessor: Peripheral ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`perid::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@perid`]
+#[doc = "PERID (r) register accessor: Peripheral ID Register\n\nYou can [`read`](crate::Reg::read) this register and get [`perid::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@perid`]
 module"]
 #[doc(alias = "PERID")]
 pub type Perid = crate::Reg<perid::PeridSpec>;
diff --git a/va416xx/src/i2c0/address.rs b/va416xx/src/i2c0/address.rs
index 4733ce9..51f6c13 100644
--- a/va416xx/src/i2c0/address.rs
+++ b/va416xx/src/i2c0/address.rs
@@ -8,7 +8,7 @@ impl core::fmt::Debug for R {
     }
 }
 impl W {}
-#[doc = "I2C Address value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`address::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`address::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "I2C Address value\n\nYou can [`read`](crate::Reg::read) this register and get [`address::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`address::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct AddressSpec;
 impl crate::RegisterSpec for AddressSpec {
     type Ux = u32;
diff --git a/va416xx/src/i2c0/clkscale.rs b/va416xx/src/i2c0/clkscale.rs
index ad9dbd5..2989232 100644
--- a/va416xx/src/i2c0/clkscale.rs
+++ b/va416xx/src/i2c0/clkscale.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:30 - Enable FastMode"]
     #[inline(always)]
-    #[must_use]
     pub fn value(&mut self) -> ValueW<ClkscaleSpec> {
         ValueW::new(self, 0)
     }
     #[doc = "Bit 31 - Enable FastMode"]
     #[inline(always)]
-    #[must_use]
     pub fn fastmode(&mut self) -> FastmodeW<ClkscaleSpec> {
         FastmodeW::new(self, 31)
     }
 }
-#[doc = "Clock Scale divide value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clkscale::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clkscale::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Clock Scale divide value\n\nYou can [`read`](crate::Reg::read) this register and get [`clkscale::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkscale::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct ClkscaleSpec;
 impl crate::RegisterSpec for ClkscaleSpec {
     type Ux = u32;
diff --git a/va416xx/src/i2c0/clktolimit.rs b/va416xx/src/i2c0/clktolimit.rs
index 2c0569d..7816c03 100644
--- a/va416xx/src/i2c0/clktolimit.rs
+++ b/va416xx/src/i2c0/clktolimit.rs
@@ -8,7 +8,7 @@ impl core::fmt::Debug for R {
     }
 }
 impl W {}
-#[doc = "Clock Low Timeout Limit Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clktolimit::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clktolimit::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Clock Low Timeout Limit Register\n\nYou can [`read`](crate::Reg::read) this register and get [`clktolimit::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clktolimit::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct ClktolimitSpec;
 impl crate::RegisterSpec for ClktolimitSpec {
     type Ux = u32;
diff --git a/va416xx/src/i2c0/cmd.rs b/va416xx/src/i2c0/cmd.rs
index aee7ef2..67d22b0 100644
--- a/va416xx/src/i2c0/cmd.rs
+++ b/va416xx/src/i2c0/cmd.rs
@@ -8,7 +8,7 @@ impl core::fmt::Debug for R {
     }
 }
 impl W {}
-#[doc = "Command Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cmd::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cmd::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Command Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cmd::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct CmdSpec;
 impl crate::RegisterSpec for CmdSpec {
     type Ux = u32;
diff --git a/va416xx/src/i2c0/ctrl.rs b/va416xx/src/i2c0/ctrl.rs
index 203c9d3..bda794b 100644
--- a/va416xx/src/i2c0/ctrl.rs
+++ b/va416xx/src/i2c0/ctrl.rs
@@ -88,60 +88,51 @@ impl R {
 impl W {
     #[doc = "Bit 0 - I2C CLK Enabled"]
     #[inline(always)]
-    #[must_use]
     pub fn clkenabled(&mut self) -> ClkenabledW<CtrlSpec> {
         ClkenabledW::new(self, 0)
     }
     #[doc = "Bit 1 - I2C Activated"]
     #[inline(always)]
-    #[must_use]
     pub fn enabled(&mut self) -> EnabledW<CtrlSpec> {
         EnabledW::new(self, 1)
     }
     #[doc = "Bit 2 - I2C Active"]
     #[inline(always)]
-    #[must_use]
     pub fn enable(&mut self) -> EnableW<CtrlSpec> {
         EnableW::new(self, 2)
     }
     #[doc = "Bit 3 - TX FIFIO Empty Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn txfemd(&mut self) -> TxfemdW<CtrlSpec> {
         TxfemdW::new(self, 3)
     }
     #[doc = "Bit 4 - RX FIFO Full Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn rxffmd(&mut self) -> RxffmdW<CtrlSpec> {
         RxffmdW::new(self, 4)
     }
     #[doc = "Bit 5 - Enable Input Analog Glitch Filter"]
     #[inline(always)]
-    #[must_use]
     pub fn algfilter(&mut self) -> AlgfilterW<CtrlSpec> {
         AlgfilterW::new(self, 5)
     }
     #[doc = "Bit 6 - Enable Input Digital Glitch Filter"]
     #[inline(always)]
-    #[must_use]
     pub fn dlgfilter(&mut self) -> DlgfilterW<CtrlSpec> {
         DlgfilterW::new(self, 6)
     }
     #[doc = "Bit 8 - Enable LoopBack Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn loopback(&mut self) -> LoopbackW<CtrlSpec> {
         LoopbackW::new(self, 8)
     }
     #[doc = "Bit 9 - Enable Timing Config Register"]
     #[inline(always)]
-    #[must_use]
     pub fn tmconfigenb(&mut self) -> TmconfigenbW<CtrlSpec> {
         TmconfigenbW::new(self, 9)
     }
 }
-#[doc = "Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctrl::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctrl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct CtrlSpec;
 impl crate::RegisterSpec for CtrlSpec {
     type Ux = u32;
diff --git a/va416xx/src/i2c0/data.rs b/va416xx/src/i2c0/data.rs
index 30b85c9..b981752 100644
--- a/va416xx/src/i2c0/data.rs
+++ b/va416xx/src/i2c0/data.rs
@@ -8,7 +8,7 @@ impl core::fmt::Debug for R {
     }
 }
 impl W {}
-#[doc = "Data Input/Output\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Data Input/Output\n\nYou can [`read`](crate::Reg::read) this register and get [`data::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct DataSpec;
 impl crate::RegisterSpec for DataSpec {
     type Ux = u32;
diff --git a/va416xx/src/i2c0/fifo_clr.rs b/va416xx/src/i2c0/fifo_clr.rs
index 156da87..af272ab 100644
--- a/va416xx/src/i2c0/fifo_clr.rs
+++ b/va416xx/src/i2c0/fifo_clr.rs
@@ -7,18 +7,16 @@ pub type TxfifoW<'a, REG> = crate::BitWriter<'a, REG>;
 impl W {
     #[doc = "Bit 0 - Clear Rx FIFO"]
     #[inline(always)]
-    #[must_use]
     pub fn rxfifo(&mut self) -> RxfifoW<FifoClrSpec> {
         RxfifoW::new(self, 0)
     }
     #[doc = "Bit 1 - Clear Tx FIFO"]
     #[inline(always)]
-    #[must_use]
     pub fn txfifo(&mut self) -> TxfifoW<FifoClrSpec> {
         TxfifoW::new(self, 1)
     }
 }
-#[doc = "Clear FIFO Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fifo_clr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Clear FIFO Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fifo_clr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct FifoClrSpec;
 impl crate::RegisterSpec for FifoClrSpec {
     type Ux = u32;
diff --git a/va416xx/src/i2c0/irq_enb.rs b/va416xx/src/i2c0/irq_enb.rs
index 4eba067..e6ef1c7 100644
--- a/va416xx/src/i2c0/irq_enb.rs
+++ b/va416xx/src/i2c0/irq_enb.rs
@@ -133,90 +133,76 @@ impl R {
 impl W {
     #[doc = "Bit 0 - I2C Bus is Idle"]
     #[inline(always)]
-    #[must_use]
     pub fn i2cidle(&mut self) -> I2cidleW<IrqEnbSpec> {
         I2cidleW::new(self, 0)
     }
     #[doc = "Bit 1 - Controller is Idle"]
     #[inline(always)]
-    #[must_use]
     pub fn idle(&mut self) -> IdleW<IrqEnbSpec> {
         IdleW::new(self, 1)
     }
     #[doc = "Bit 2 - Controller is Waiting"]
     #[inline(always)]
-    #[must_use]
     pub fn waiting(&mut self) -> WaitingW<IrqEnbSpec> {
         WaitingW::new(self, 2)
     }
     #[doc = "Bit 3 - Controller is Stalled"]
     #[inline(always)]
-    #[must_use]
     pub fn stalled(&mut self) -> StalledW<IrqEnbSpec> {
         StalledW::new(self, 3)
     }
     #[doc = "Bit 4 - I2C Arbitration was lost"]
     #[inline(always)]
-    #[must_use]
     pub fn arblost(&mut self) -> ArblostW<IrqEnbSpec> {
         ArblostW::new(self, 4)
     }
     #[doc = "Bit 5 - I2C Address was not Acknowledged"]
     #[inline(always)]
-    #[must_use]
     pub fn nackaddr(&mut self) -> NackaddrW<IrqEnbSpec> {
         NackaddrW::new(self, 5)
     }
     #[doc = "Bit 6 - I2C Data was not Acknowledged"]
     #[inline(always)]
-    #[must_use]
     pub fn nackdata(&mut self) -> NackdataW<IrqEnbSpec> {
         NackdataW::new(self, 6)
     }
     #[doc = "Bit 7 - I2C Clock Low Timeout"]
     #[inline(always)]
-    #[must_use]
     pub fn clkloto(&mut self) -> ClklotoW<IrqEnbSpec> {
         ClklotoW::new(self, 7)
     }
     #[doc = "Bit 10 - TX FIFO Overflowed"]
     #[inline(always)]
-    #[must_use]
     pub fn txoverflow(&mut self) -> TxoverflowW<IrqEnbSpec> {
         TxoverflowW::new(self, 10)
     }
     #[doc = "Bit 11 - TX FIFO Overflowed"]
     #[inline(always)]
-    #[must_use]
     pub fn rxoverflow(&mut self) -> RxoverflowW<IrqEnbSpec> {
         RxoverflowW::new(self, 11)
     }
     #[doc = "Bit 12 - TX FIFO Ready"]
     #[inline(always)]
-    #[must_use]
     pub fn txready(&mut self) -> TxreadyW<IrqEnbSpec> {
         TxreadyW::new(self, 12)
     }
     #[doc = "Bit 13 - RX FIFO Ready"]
     #[inline(always)]
-    #[must_use]
     pub fn rxready(&mut self) -> RxreadyW<IrqEnbSpec> {
         RxreadyW::new(self, 13)
     }
     #[doc = "Bit 14 - TX FIFO Empty"]
     #[inline(always)]
-    #[must_use]
     pub fn txempty(&mut self) -> TxemptyW<IrqEnbSpec> {
         TxemptyW::new(self, 14)
     }
     #[doc = "Bit 15 - RX FIFO Full"]
     #[inline(always)]
-    #[must_use]
     pub fn rxfull(&mut self) -> RxfullW<IrqEnbSpec> {
         RxfullW::new(self, 15)
     }
 }
-#[doc = "Interrupt Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_enb::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`irq_enb::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Interrupt Enable Register\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_enb::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`irq_enb::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct IrqEnbSpec;
 impl crate::RegisterSpec for IrqEnbSpec {
     type Ux = u32;
diff --git a/va416xx/src/i2c0/perid.rs b/va416xx/src/i2c0/perid.rs
index 832d608..5e1b8ec 100644
--- a/va416xx/src/i2c0/perid.rs
+++ b/va416xx/src/i2c0/perid.rs
@@ -5,7 +5,7 @@ impl core::fmt::Debug for R {
         write!(f, "{}", self.bits())
     }
 }
-#[doc = "Peripheral ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`perid::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Peripheral ID Register\n\nYou can [`read`](crate::Reg::read) this register and get [`perid::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct PeridSpec;
 impl crate::RegisterSpec for PeridSpec {
     type Ux = u32;
diff --git a/va416xx/src/i2c0/rxcount.rs b/va416xx/src/i2c0/rxcount.rs
index b7b6d5a..f0d332e 100644
--- a/va416xx/src/i2c0/rxcount.rs
+++ b/va416xx/src/i2c0/rxcount.rs
@@ -5,7 +5,7 @@ impl core::fmt::Debug for R {
         write!(f, "{}", self.bits())
     }
 }
-#[doc = "RX Count Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxcount::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "RX Count Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rxcount::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct RxcountSpec;
 impl crate::RegisterSpec for RxcountSpec {
     type Ux = u32;
diff --git a/va416xx/src/i2c0/rxfifoirqtrg.rs b/va416xx/src/i2c0/rxfifoirqtrg.rs
index 46124d5..8376847 100644
--- a/va416xx/src/i2c0/rxfifoirqtrg.rs
+++ b/va416xx/src/i2c0/rxfifoirqtrg.rs
@@ -8,7 +8,7 @@ impl core::fmt::Debug for R {
     }
 }
 impl W {}
-#[doc = "Rx FIFO IRQ Trigger Level\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxfifoirqtrg::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rxfifoirqtrg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Rx FIFO IRQ Trigger Level\n\nYou can [`read`](crate::Reg::read) this register and get [`rxfifoirqtrg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rxfifoirqtrg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct RxfifoirqtrgSpec;
 impl crate::RegisterSpec for RxfifoirqtrgSpec {
     type Ux = u32;
diff --git a/va416xx/src/i2c0/s0_address.rs b/va416xx/src/i2c0/s0_address.rs
index 69d3dbe..7d6b0d6 100644
--- a/va416xx/src/i2c0/s0_address.rs
+++ b/va416xx/src/i2c0/s0_address.rs
@@ -34,24 +34,21 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Read/Write value"]
     #[inline(always)]
-    #[must_use]
     pub fn rw(&mut self) -> RwW<S0AddressSpec> {
         RwW::new(self, 0)
     }
     #[doc = "Bits 1:10 - Address value"]
     #[inline(always)]
-    #[must_use]
     pub fn address(&mut self) -> AddressW<S0AddressSpec> {
         AddressW::new(self, 1)
     }
     #[doc = "Bit 15 - Enable 10b address mode"]
     #[inline(always)]
-    #[must_use]
     pub fn a10mode(&mut self) -> A10modeW<S0AddressSpec> {
         A10modeW::new(self, 15)
     }
 }
-#[doc = "Slave I2C Address Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`s0_address::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`s0_address::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Slave I2C Address Value\n\nYou can [`read`](crate::Reg::read) this register and get [`s0_address::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`s0_address::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct S0AddressSpec;
 impl crate::RegisterSpec for S0AddressSpec {
     type Ux = u32;
diff --git a/va416xx/src/i2c0/s0_addressb.rs b/va416xx/src/i2c0/s0_addressb.rs
index c82d283..1b420f0 100644
--- a/va416xx/src/i2c0/s0_addressb.rs
+++ b/va416xx/src/i2c0/s0_addressb.rs
@@ -34,24 +34,21 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Read write value"]
     #[inline(always)]
-    #[must_use]
     pub fn rw(&mut self) -> RwW<S0AddressbSpec> {
         RwW::new(self, 0)
     }
     #[doc = "Bits 1:10 - Address value"]
     #[inline(always)]
-    #[must_use]
     pub fn address(&mut self) -> AddressW<S0AddressbSpec> {
         AddressW::new(self, 1)
     }
     #[doc = "Bit 15 - Enable Address B"]
     #[inline(always)]
-    #[must_use]
     pub fn addressben(&mut self) -> AddressbenW<S0AddressbSpec> {
         AddressbenW::new(self, 15)
     }
 }
-#[doc = "Slave I2C Address B Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`s0_addressb::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`s0_addressb::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Slave I2C Address B Value\n\nYou can [`read`](crate::Reg::read) this register and get [`s0_addressb::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`s0_addressb::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct S0AddressbSpec;
 impl crate::RegisterSpec for S0AddressbSpec {
     type Ux = u32;
diff --git a/va416xx/src/i2c0/s0_addressmask.rs b/va416xx/src/i2c0/s0_addressmask.rs
index bcc7051..4b5b77c 100644
--- a/va416xx/src/i2c0/s0_addressmask.rs
+++ b/va416xx/src/i2c0/s0_addressmask.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Read/Write mask"]
     #[inline(always)]
-    #[must_use]
     pub fn rwmask(&mut self) -> RwmaskW<S0AddressmaskSpec> {
         RwmaskW::new(self, 0)
     }
     #[doc = "Bits 1:10 - Address mask value"]
     #[inline(always)]
-    #[must_use]
     pub fn mask(&mut self) -> MaskW<S0AddressmaskSpec> {
         MaskW::new(self, 1)
     }
 }
-#[doc = "Slave I2C Address Mask value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`s0_addressmask::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`s0_addressmask::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Slave I2C Address Mask value\n\nYou can [`read`](crate::Reg::read) this register and get [`s0_addressmask::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`s0_addressmask::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct S0AddressmaskSpec;
 impl crate::RegisterSpec for S0AddressmaskSpec {
     type Ux = u32;
diff --git a/va416xx/src/i2c0/s0_addressmaskb.rs b/va416xx/src/i2c0/s0_addressmaskb.rs
index a7b22f0..1710929 100644
--- a/va416xx/src/i2c0/s0_addressmaskb.rs
+++ b/va416xx/src/i2c0/s0_addressmaskb.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Read write mask"]
     #[inline(always)]
-    #[must_use]
     pub fn rwmask(&mut self) -> RwmaskW<S0AddressmaskbSpec> {
         RwmaskW::new(self, 0)
     }
     #[doc = "Bits 1:10 - Address mask value"]
     #[inline(always)]
-    #[must_use]
     pub fn mask(&mut self) -> MaskW<S0AddressmaskbSpec> {
         MaskW::new(self, 1)
     }
 }
-#[doc = "Slave I2C Address B Mask value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`s0_addressmaskb::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`s0_addressmaskb::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Slave I2C Address B Mask value\n\nYou can [`read`](crate::Reg::read) this register and get [`s0_addressmaskb::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`s0_addressmaskb::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct S0AddressmaskbSpec;
 impl crate::RegisterSpec for S0AddressmaskbSpec {
     type Ux = u32;
diff --git a/va416xx/src/i2c0/s0_ctrl.rs b/va416xx/src/i2c0/s0_ctrl.rs
index c22d6de..ef6554f 100644
--- a/va416xx/src/i2c0/s0_ctrl.rs
+++ b/va416xx/src/i2c0/s0_ctrl.rs
@@ -52,36 +52,31 @@ impl R {
 impl W {
     #[doc = "Bit 0 - I2C Enabled"]
     #[inline(always)]
-    #[must_use]
     pub fn clkenabled(&mut self) -> ClkenabledW<S0CtrlSpec> {
         ClkenabledW::new(self, 0)
     }
     #[doc = "Bit 1 - I2C Activated"]
     #[inline(always)]
-    #[must_use]
     pub fn enabled(&mut self) -> EnabledW<S0CtrlSpec> {
         EnabledW::new(self, 1)
     }
     #[doc = "Bit 2 - I2C Active"]
     #[inline(always)]
-    #[must_use]
     pub fn enable(&mut self) -> EnableW<S0CtrlSpec> {
         EnableW::new(self, 2)
     }
     #[doc = "Bit 3 - TX FIFIO Empty Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn txfemd(&mut self) -> TxfemdW<S0CtrlSpec> {
         TxfemdW::new(self, 3)
     }
     #[doc = "Bit 4 - RX FIFO Full Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn rxffmd(&mut self) -> RxffmdW<S0CtrlSpec> {
         RxffmdW::new(self, 4)
     }
 }
-#[doc = "Slave Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`s0_ctrl::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`s0_ctrl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Slave Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`s0_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`s0_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct S0CtrlSpec;
 impl crate::RegisterSpec for S0CtrlSpec {
     type Ux = u32;
diff --git a/va416xx/src/i2c0/s0_data.rs b/va416xx/src/i2c0/s0_data.rs
index 0429280..ec0d5a7 100644
--- a/va416xx/src/i2c0/s0_data.rs
+++ b/va416xx/src/i2c0/s0_data.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - I2C data value"]
     #[inline(always)]
-    #[must_use]
     pub fn value(&mut self) -> ValueW<S0DataSpec> {
         ValueW::new(self, 0)
     }
 }
-#[doc = "Slave Data Input/Output\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`s0_data::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`s0_data::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Slave Data Input/Output\n\nYou can [`read`](crate::Reg::read) this register and get [`s0_data::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`s0_data::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct S0DataSpec;
 impl crate::RegisterSpec for S0DataSpec {
     type Ux = u32;
diff --git a/va416xx/src/i2c0/s0_fifo_clr.rs b/va416xx/src/i2c0/s0_fifo_clr.rs
index 0d5dd60..84cc53a 100644
--- a/va416xx/src/i2c0/s0_fifo_clr.rs
+++ b/va416xx/src/i2c0/s0_fifo_clr.rs
@@ -7,18 +7,16 @@ pub type TxfifoW<'a, REG> = crate::BitWriter<'a, REG>;
 impl W {
     #[doc = "Bit 0 - Clear Rx FIFO"]
     #[inline(always)]
-    #[must_use]
     pub fn rxfifo(&mut self) -> RxfifoW<S0FifoClrSpec> {
         RxfifoW::new(self, 0)
     }
     #[doc = "Bit 1 - Clear Tx FIFO"]
     #[inline(always)]
-    #[must_use]
     pub fn txfifo(&mut self) -> TxfifoW<S0FifoClrSpec> {
         TxfifoW::new(self, 1)
     }
 }
-#[doc = "Slave Clear FIFO Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`s0_fifo_clr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Slave Clear FIFO Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`s0_fifo_clr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct S0FifoClrSpec;
 impl crate::RegisterSpec for S0FifoClrSpec {
     type Ux = u32;
diff --git a/va416xx/src/i2c0/s0_irq_enb.rs b/va416xx/src/i2c0/s0_irq_enb.rs
index a6a30e2..5779751 100644
--- a/va416xx/src/i2c0/s0_irq_enb.rs
+++ b/va416xx/src/i2c0/s0_irq_enb.rs
@@ -151,102 +151,86 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Controller Complted a Transaction"]
     #[inline(always)]
-    #[must_use]
     pub fn completed(&mut self) -> CompletedW<S0IrqEnbSpec> {
         CompletedW::new(self, 0)
     }
     #[doc = "Bit 1 - Controller is Idle"]
     #[inline(always)]
-    #[must_use]
     pub fn idle(&mut self) -> IdleW<S0IrqEnbSpec> {
         IdleW::new(self, 1)
     }
     #[doc = "Bit 2 - Controller is Waiting"]
     #[inline(always)]
-    #[must_use]
     pub fn waiting(&mut self) -> WaitingW<S0IrqEnbSpec> {
         WaitingW::new(self, 2)
     }
     #[doc = "Bit 3 - Controller is Tx Stalled"]
     #[inline(always)]
-    #[must_use]
     pub fn txstalled(&mut self) -> TxstalledW<S0IrqEnbSpec> {
         TxstalledW::new(self, 3)
     }
     #[doc = "Bit 4 - Controller is Rx Stalled"]
     #[inline(always)]
-    #[must_use]
     pub fn rxstalled(&mut self) -> RxstalledW<S0IrqEnbSpec> {
         RxstalledW::new(self, 4)
     }
     #[doc = "Bit 5 - I2C Address Match"]
     #[inline(always)]
-    #[must_use]
     pub fn addressmatch(&mut self) -> AddressmatchW<S0IrqEnbSpec> {
         AddressmatchW::new(self, 5)
     }
     #[doc = "Bit 6 - I2C Data was not Acknowledged"]
     #[inline(always)]
-    #[must_use]
     pub fn nackdata(&mut self) -> NackdataW<S0IrqEnbSpec> {
         NackdataW::new(self, 6)
     }
     #[doc = "Bit 7 - Pending Data is first Byte following Address"]
     #[inline(always)]
-    #[must_use]
     pub fn rxdatafirst(&mut self) -> RxdatafirstW<S0IrqEnbSpec> {
         RxdatafirstW::new(self, 7)
     }
     #[doc = "Bit 8 - I2C Start Condition"]
     #[inline(always)]
-    #[must_use]
     pub fn i2c_start(&mut self) -> I2cStartW<S0IrqEnbSpec> {
         I2cStartW::new(self, 8)
     }
     #[doc = "Bit 9 - I2C Stop Condition"]
     #[inline(always)]
-    #[must_use]
     pub fn i2c_stop(&mut self) -> I2cStopW<S0IrqEnbSpec> {
         I2cStopW::new(self, 9)
     }
     #[doc = "Bit 10 - TX FIFO Underflowed"]
     #[inline(always)]
-    #[must_use]
     pub fn txunderflow(&mut self) -> TxunderflowW<S0IrqEnbSpec> {
         TxunderflowW::new(self, 10)
     }
     #[doc = "Bit 11 - TX FIFO Overflowed"]
     #[inline(always)]
-    #[must_use]
     pub fn rxoverflow(&mut self) -> RxoverflowW<S0IrqEnbSpec> {
         RxoverflowW::new(self, 11)
     }
     #[doc = "Bit 12 - TX FIFO Ready"]
     #[inline(always)]
-    #[must_use]
     pub fn txready(&mut self) -> TxreadyW<S0IrqEnbSpec> {
         TxreadyW::new(self, 12)
     }
     #[doc = "Bit 13 - RX FIFO Ready"]
     #[inline(always)]
-    #[must_use]
     pub fn rxready(&mut self) -> RxreadyW<S0IrqEnbSpec> {
         RxreadyW::new(self, 13)
     }
     #[doc = "Bit 14 - TX FIFO Empty"]
     #[inline(always)]
-    #[must_use]
     pub fn txempty(&mut self) -> TxemptyW<S0IrqEnbSpec> {
         TxemptyW::new(self, 14)
     }
     #[doc = "Bit 15 - RX FIFO Full"]
     #[inline(always)]
-    #[must_use]
     pub fn rxfull(&mut self) -> RxfullW<S0IrqEnbSpec> {
         RxfullW::new(self, 15)
     }
 }
-#[doc = "Slave Interrupt Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`s0_irq_enb::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`s0_irq_enb::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Slave Interrupt Enable Register\n\nYou can [`read`](crate::Reg::read) this register and get [`s0_irq_enb::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`s0_irq_enb::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct S0IrqEnbSpec;
 impl crate::RegisterSpec for S0IrqEnbSpec {
     type Ux = u32;
diff --git a/va416xx/src/i2c0/s0_lastaddress.rs b/va416xx/src/i2c0/s0_lastaddress.rs
index 98ac58d..8dc2f9f 100644
--- a/va416xx/src/i2c0/s0_lastaddress.rs
+++ b/va416xx/src/i2c0/s0_lastaddress.rs
@@ -16,7 +16,7 @@ impl R {
         AddressR::new(((self.bits >> 1) & 0x03ff) as u16)
     }
 }
-#[doc = "Slave I2C Last Address value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`s0_lastaddress::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Slave I2C Last Address value\n\nYou can [`read`](crate::Reg::read) this register and get [`s0_lastaddress::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct S0LastaddressSpec;
 impl crate::RegisterSpec for S0LastaddressSpec {
     type Ux = u32;
diff --git a/va416xx/src/i2c0/s0_maxwords.rs b/va416xx/src/i2c0/s0_maxwords.rs
index e5fbd32..6939dc7 100644
--- a/va416xx/src/i2c0/s0_maxwords.rs
+++ b/va416xx/src/i2c0/s0_maxwords.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:10 - Max Word Count"]
     #[inline(always)]
-    #[must_use]
     pub fn maxword(&mut self) -> MaxwordW<S0MaxwordsSpec> {
         MaxwordW::new(self, 0)
     }
     #[doc = "Bit 31 - Enables the max word count"]
     #[inline(always)]
-    #[must_use]
     pub fn enable(&mut self) -> EnableW<S0MaxwordsSpec> {
         EnableW::new(self, 31)
     }
 }
-#[doc = "Slave MaxWords Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`s0_maxwords::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`s0_maxwords::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Slave MaxWords Register\n\nYou can [`read`](crate::Reg::read) this register and get [`s0_maxwords::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`s0_maxwords::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct S0MaxwordsSpec;
 impl crate::RegisterSpec for S0MaxwordsSpec {
     type Ux = u32;
diff --git a/va416xx/src/i2c0/s0_rxcount.rs b/va416xx/src/i2c0/s0_rxcount.rs
index b01fd37..aa88340 100644
--- a/va416xx/src/i2c0/s0_rxcount.rs
+++ b/va416xx/src/i2c0/s0_rxcount.rs
@@ -9,7 +9,7 @@ impl R {
         ValueR::new((self.bits & 0x07ff) as u16)
     }
 }
-#[doc = "Slave RX Count Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`s0_rxcount::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Slave RX Count Register\n\nYou can [`read`](crate::Reg::read) this register and get [`s0_rxcount::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct S0RxcountSpec;
 impl crate::RegisterSpec for S0RxcountSpec {
     type Ux = u32;
diff --git a/va416xx/src/i2c0/s0_rxfifoirqtrg.rs b/va416xx/src/i2c0/s0_rxfifoirqtrg.rs
index 2c8f823..6068a57 100644
--- a/va416xx/src/i2c0/s0_rxfifoirqtrg.rs
+++ b/va416xx/src/i2c0/s0_rxfifoirqtrg.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:4 - Half full level for the Rx FIFO"]
     #[inline(always)]
-    #[must_use]
     pub fn level(&mut self) -> LevelW<S0RxfifoirqtrgSpec> {
         LevelW::new(self, 0)
     }
 }
-#[doc = "Slave Rx FIFO IRQ Trigger Level\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`s0_rxfifoirqtrg::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`s0_rxfifoirqtrg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Slave Rx FIFO IRQ Trigger Level\n\nYou can [`read`](crate::Reg::read) this register and get [`s0_rxfifoirqtrg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`s0_rxfifoirqtrg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct S0RxfifoirqtrgSpec;
 impl crate::RegisterSpec for S0RxfifoirqtrgSpec {
     type Ux = u32;
diff --git a/va416xx/src/i2c0/s0_state.rs b/va416xx/src/i2c0/s0_state.rs
index 473fd77..9be0a91 100644
--- a/va416xx/src/i2c0/s0_state.rs
+++ b/va416xx/src/i2c0/s0_state.rs
@@ -5,7 +5,7 @@ impl core::fmt::Debug for R {
         write!(f, "{}", self.bits())
     }
 }
-#[doc = "Internal STATE of I2C Slave Controller\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`s0_state::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Internal STATE of I2C Slave Controller\n\nYou can [`read`](crate::Reg::read) this register and get [`s0_state::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct S0StateSpec;
 impl crate::RegisterSpec for S0StateSpec {
     type Ux = u32;
diff --git a/va416xx/src/i2c0/s0_status.rs b/va416xx/src/i2c0/s0_status.rs
index 1a79596..d6b5208 100644
--- a/va416xx/src/i2c0/s0_status.rs
+++ b/va416xx/src/i2c0/s0_status.rs
@@ -121,7 +121,7 @@ impl R {
         RawSclR::new(((self.bits >> 31) & 1) != 0)
     }
 }
-#[doc = "Slave I2C Controller Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`s0_status::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Slave I2C Controller Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`s0_status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct S0StatusSpec;
 impl crate::RegisterSpec for S0StatusSpec {
     type Ux = u32;
diff --git a/va416xx/src/i2c0/s0_txcount.rs b/va416xx/src/i2c0/s0_txcount.rs
index 43bdd00..024a410 100644
--- a/va416xx/src/i2c0/s0_txcount.rs
+++ b/va416xx/src/i2c0/s0_txcount.rs
@@ -9,7 +9,7 @@ impl R {
         ValueR::new((self.bits & 0x07ff) as u16)
     }
 }
-#[doc = "Slave TX Count Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`s0_txcount::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Slave TX Count Register\n\nYou can [`read`](crate::Reg::read) this register and get [`s0_txcount::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct S0TxcountSpec;
 impl crate::RegisterSpec for S0TxcountSpec {
     type Ux = u32;
diff --git a/va416xx/src/i2c0/s0_txfifoirqtrg.rs b/va416xx/src/i2c0/s0_txfifoirqtrg.rs
index 2d8881a..e3ae3a2 100644
--- a/va416xx/src/i2c0/s0_txfifoirqtrg.rs
+++ b/va416xx/src/i2c0/s0_txfifoirqtrg.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:4 - Half full level for the Rx FIFO"]
     #[inline(always)]
-    #[must_use]
     pub fn level(&mut self) -> LevelW<S0TxfifoirqtrgSpec> {
         LevelW::new(self, 0)
     }
 }
-#[doc = "Slave Tx FIFO IRQ Trigger Level\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`s0_txfifoirqtrg::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`s0_txfifoirqtrg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Slave Tx FIFO IRQ Trigger Level\n\nYou can [`read`](crate::Reg::read) this register and get [`s0_txfifoirqtrg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`s0_txfifoirqtrg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct S0TxfifoirqtrgSpec;
 impl crate::RegisterSpec for S0TxfifoirqtrgSpec {
     type Ux = u32;
diff --git a/va416xx/src/i2c0/state.rs b/va416xx/src/i2c0/state.rs
index fe3c04e..81fe633 100644
--- a/va416xx/src/i2c0/state.rs
+++ b/va416xx/src/i2c0/state.rs
@@ -5,7 +5,7 @@ impl core::fmt::Debug for R {
         write!(f, "{}", self.bits())
     }
 }
-#[doc = "Internal STATE of I2C Master Controller\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`state::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Internal STATE of I2C Master Controller\n\nYou can [`read`](crate::Reg::read) this register and get [`state::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct StateSpec;
 impl crate::RegisterSpec for StateSpec {
     type Ux = u32;
diff --git a/va416xx/src/i2c0/status.rs b/va416xx/src/i2c0/status.rs
index 2735cab..5a7f06c 100644
--- a/va416xx/src/i2c0/status.rs
+++ b/va416xx/src/i2c0/status.rs
@@ -142,96 +142,81 @@ impl R {
 impl W {
     #[doc = "Bit 0 - I2C bus is idle"]
     #[inline(always)]
-    #[must_use]
     pub fn i2cidle(&mut self) -> I2cidleW<StatusSpec> {
         I2cidleW::new(self, 0)
     }
     #[doc = "Bit 1 - I2C controller is Idle"]
     #[inline(always)]
-    #[must_use]
     pub fn idle(&mut self) -> IdleW<StatusSpec> {
         IdleW::new(self, 1)
     }
     #[doc = "Bit 2 - Controller is Waiting"]
     #[inline(always)]
-    #[must_use]
     pub fn waiting(&mut self) -> WaitingW<StatusSpec> {
         WaitingW::new(self, 2)
     }
     #[doc = "Bit 3 - Controller is Stalled"]
     #[inline(always)]
-    #[must_use]
     pub fn stalled(&mut self) -> StalledW<StatusSpec> {
         StalledW::new(self, 3)
     }
     #[doc = "Bit 4 - I2C Arbitration was lost"]
     #[inline(always)]
-    #[must_use]
     pub fn arblost(&mut self) -> ArblostW<StatusSpec> {
         ArblostW::new(self, 4)
     }
     #[doc = "Bit 5 - I2C Address was not Acknowledged"]
     #[inline(always)]
-    #[must_use]
     pub fn nackaddr(&mut self) -> NackaddrW<StatusSpec> {
         NackaddrW::new(self, 5)
     }
     #[doc = "Bit 6 - I2C Data was not Acknowledged"]
     #[inline(always)]
-    #[must_use]
     pub fn nackdata(&mut self) -> NackdataW<StatusSpec> {
         NackdataW::new(self, 6)
     }
     #[doc = "Bit 8 - RX FIFO is Not Empty"]
     #[inline(always)]
-    #[must_use]
     pub fn rxnempty(&mut self) -> RxnemptyW<StatusSpec> {
         RxnemptyW::new(self, 8)
     }
     #[doc = "Bit 9 - RX FIFO is Full"]
     #[inline(always)]
-    #[must_use]
     pub fn rxfull(&mut self) -> RxfullW<StatusSpec> {
         RxfullW::new(self, 9)
     }
     #[doc = "Bit 11 - RX FIFO Above Trigger Level"]
     #[inline(always)]
-    #[must_use]
     pub fn rxtrigger(&mut self) -> RxtriggerW<StatusSpec> {
         RxtriggerW::new(self, 11)
     }
     #[doc = "Bit 12 - TX FIFO is Empty"]
     #[inline(always)]
-    #[must_use]
     pub fn txempty(&mut self) -> TxemptyW<StatusSpec> {
         TxemptyW::new(self, 12)
     }
     #[doc = "Bit 13 - TX FIFO is Full"]
     #[inline(always)]
-    #[must_use]
     pub fn txnfull(&mut self) -> TxnfullW<StatusSpec> {
         TxnfullW::new(self, 13)
     }
     #[doc = "Bit 15 - TX FIFO Below Trigger Level"]
     #[inline(always)]
-    #[must_use]
     pub fn txtrigger(&mut self) -> TxtriggerW<StatusSpec> {
         TxtriggerW::new(self, 15)
     }
     #[doc = "Bit 30 - I2C Raw SDA value"]
     #[inline(always)]
-    #[must_use]
     pub fn raw_sda(&mut self) -> RawSdaW<StatusSpec> {
         RawSdaW::new(self, 30)
     }
     #[doc = "Bit 31 - I2C Raw SCL value"]
     #[inline(always)]
-    #[must_use]
     pub fn raw_scl(&mut self) -> RawSclW<StatusSpec> {
         RawSclW::new(self, 31)
     }
 }
-#[doc = "I2C Controller Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`status::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`status::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "I2C Controller Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`status::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct StatusSpec;
 impl crate::RegisterSpec for StatusSpec {
     type Ux = u32;
diff --git a/va416xx/src/i2c0/tmconfig.rs b/va416xx/src/i2c0/tmconfig.rs
index 2d0e025..aa219ba 100644
--- a/va416xx/src/i2c0/tmconfig.rs
+++ b/va416xx/src/i2c0/tmconfig.rs
@@ -8,7 +8,7 @@ impl core::fmt::Debug for R {
     }
 }
 impl W {}
-#[doc = "Timing Config Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tmconfig::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tmconfig::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Timing Config Register\n\nYou can [`read`](crate::Reg::read) this register and get [`tmconfig::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tmconfig::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct TmconfigSpec;
 impl crate::RegisterSpec for TmconfigSpec {
     type Ux = u32;
diff --git a/va416xx/src/i2c0/txcount.rs b/va416xx/src/i2c0/txcount.rs
index ae64e43..41e1987 100644
--- a/va416xx/src/i2c0/txcount.rs
+++ b/va416xx/src/i2c0/txcount.rs
@@ -5,7 +5,7 @@ impl core::fmt::Debug for R {
         write!(f, "{}", self.bits())
     }
 }
-#[doc = "TX Count Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txcount::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "TX Count Register\n\nYou can [`read`](crate::Reg::read) this register and get [`txcount::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct TxcountSpec;
 impl crate::RegisterSpec for TxcountSpec {
     type Ux = u32;
diff --git a/va416xx/src/i2c0/txfifoirqtrg.rs b/va416xx/src/i2c0/txfifoirqtrg.rs
index 0d13e54..8d0ae92 100644
--- a/va416xx/src/i2c0/txfifoirqtrg.rs
+++ b/va416xx/src/i2c0/txfifoirqtrg.rs
@@ -8,7 +8,7 @@ impl core::fmt::Debug for R {
     }
 }
 impl W {}
-#[doc = "Tx FIFO IRQ Trigger Level\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txfifoirqtrg::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`txfifoirqtrg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Tx FIFO IRQ Trigger Level\n\nYou can [`read`](crate::Reg::read) this register and get [`txfifoirqtrg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`txfifoirqtrg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct TxfifoirqtrgSpec;
 impl crate::RegisterSpec for TxfifoirqtrgSpec {
     type Ux = u32;
diff --git a/va416xx/src/i2c0/words.rs b/va416xx/src/i2c0/words.rs
index 9aedb52..2b890bf 100644
--- a/va416xx/src/i2c0/words.rs
+++ b/va416xx/src/i2c0/words.rs
@@ -8,7 +8,7 @@ impl core::fmt::Debug for R {
     }
 }
 impl W {}
-#[doc = "Word Count value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`words::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`words::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Word Count value\n\nYou can [`read`](crate::Reg::read) this register and get [`words::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`words::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct WordsSpec;
 impl crate::RegisterSpec for WordsSpec {
     type Ux = u32;
diff --git a/va416xx/src/ioconfig.rs b/va416xx/src/ioconfig.rs
index b6a329e..6314e6a 100644
--- a/va416xx/src/ioconfig.rs
+++ b/va416xx/src/ioconfig.rs
@@ -144,7 +144,7 @@ impl RegisterBlock {
         &self.perid
     }
 }
-#[doc = "PORTA (rw) register accessor: PORTA Pin Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`porta::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`porta::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@porta`]
+#[doc = "PORTA (rw) register accessor: PORTA Pin Configuration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`porta::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`porta::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@porta`]
 module"]
 #[doc(alias = "PORTA")]
 pub type Porta = crate::Reg<porta::PortaSpec>;
@@ -162,55 +162,55 @@ pub use Porta as Portd;
 pub use Porta as Porte;
 pub use Porta as Portf;
 pub use Porta as Portg;
-#[doc = "CLKDIV0 (r) register accessor: Clock divide value. 0 will disable the clock\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clkdiv0::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkdiv0`]
+#[doc = "CLKDIV0 (r) register accessor: Clock divide value. 0 will disable the clock\n\nYou can [`read`](crate::Reg::read) this register and get [`clkdiv0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkdiv0`]
 module"]
 #[doc(alias = "CLKDIV0")]
 pub type Clkdiv0 = crate::Reg<clkdiv0::Clkdiv0Spec>;
 #[doc = "Clock divide value. 0 will disable the clock"]
 pub mod clkdiv0;
-#[doc = "CLKDIV1 (rw) register accessor: Clock divide value. 0 will disable the clock\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clkdiv1::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clkdiv1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkdiv1`]
+#[doc = "CLKDIV1 (rw) register accessor: Clock divide value. 0 will disable the clock\n\nYou can [`read`](crate::Reg::read) this register and get [`clkdiv1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkdiv1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkdiv1`]
 module"]
 #[doc(alias = "CLKDIV1")]
 pub type Clkdiv1 = crate::Reg<clkdiv1::Clkdiv1Spec>;
 #[doc = "Clock divide value. 0 will disable the clock"]
 pub mod clkdiv1;
-#[doc = "CLKDIV2 (rw) register accessor: Clock divide value. 0 will disable the clock\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clkdiv2::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clkdiv2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkdiv2`]
+#[doc = "CLKDIV2 (rw) register accessor: Clock divide value. 0 will disable the clock\n\nYou can [`read`](crate::Reg::read) this register and get [`clkdiv2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkdiv2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkdiv2`]
 module"]
 #[doc(alias = "CLKDIV2")]
 pub type Clkdiv2 = crate::Reg<clkdiv2::Clkdiv2Spec>;
 #[doc = "Clock divide value. 0 will disable the clock"]
 pub mod clkdiv2;
-#[doc = "CLKDIV3 (rw) register accessor: Clock divide value. 0 will disable the clock\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clkdiv3::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clkdiv3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkdiv3`]
+#[doc = "CLKDIV3 (rw) register accessor: Clock divide value. 0 will disable the clock\n\nYou can [`read`](crate::Reg::read) this register and get [`clkdiv3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkdiv3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkdiv3`]
 module"]
 #[doc(alias = "CLKDIV3")]
 pub type Clkdiv3 = crate::Reg<clkdiv3::Clkdiv3Spec>;
 #[doc = "Clock divide value. 0 will disable the clock"]
 pub mod clkdiv3;
-#[doc = "CLKDIV4 (rw) register accessor: Clock divide value. 0 will disable the clock\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clkdiv4::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clkdiv4::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkdiv4`]
+#[doc = "CLKDIV4 (rw) register accessor: Clock divide value. 0 will disable the clock\n\nYou can [`read`](crate::Reg::read) this register and get [`clkdiv4::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkdiv4::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkdiv4`]
 module"]
 #[doc(alias = "CLKDIV4")]
 pub type Clkdiv4 = crate::Reg<clkdiv4::Clkdiv4Spec>;
 #[doc = "Clock divide value. 0 will disable the clock"]
 pub mod clkdiv4;
-#[doc = "CLKDIV5 (rw) register accessor: Clock divide value. 0 will disable the clock\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clkdiv5::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clkdiv5::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkdiv5`]
+#[doc = "CLKDIV5 (rw) register accessor: Clock divide value. 0 will disable the clock\n\nYou can [`read`](crate::Reg::read) this register and get [`clkdiv5::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkdiv5::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkdiv5`]
 module"]
 #[doc(alias = "CLKDIV5")]
 pub type Clkdiv5 = crate::Reg<clkdiv5::Clkdiv5Spec>;
 #[doc = "Clock divide value. 0 will disable the clock"]
 pub mod clkdiv5;
-#[doc = "CLKDIV6 (rw) register accessor: Clock divide value. 0 will disable the clock\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clkdiv6::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clkdiv6::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkdiv6`]
+#[doc = "CLKDIV6 (rw) register accessor: Clock divide value. 0 will disable the clock\n\nYou can [`read`](crate::Reg::read) this register and get [`clkdiv6::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkdiv6::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkdiv6`]
 module"]
 #[doc(alias = "CLKDIV6")]
 pub type Clkdiv6 = crate::Reg<clkdiv6::Clkdiv6Spec>;
 #[doc = "Clock divide value. 0 will disable the clock"]
 pub mod clkdiv6;
-#[doc = "CLKDIV7 (rw) register accessor: Clock divide value. 0 will disable the clock\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clkdiv7::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clkdiv7::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkdiv7`]
+#[doc = "CLKDIV7 (rw) register accessor: Clock divide value. 0 will disable the clock\n\nYou can [`read`](crate::Reg::read) this register and get [`clkdiv7::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkdiv7::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkdiv7`]
 module"]
 #[doc(alias = "CLKDIV7")]
 pub type Clkdiv7 = crate::Reg<clkdiv7::Clkdiv7Spec>;
 #[doc = "Clock divide value. 0 will disable the clock"]
 pub mod clkdiv7;
-#[doc = "PERID (r) register accessor: Peripheral ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`perid::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@perid`]
+#[doc = "PERID (r) register accessor: Peripheral ID Register\n\nYou can [`read`](crate::Reg::read) this register and get [`perid::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@perid`]
 module"]
 #[doc(alias = "PERID")]
 pub type Perid = crate::Reg<perid::PeridSpec>;
diff --git a/va416xx/src/ioconfig/clkdiv0.rs b/va416xx/src/ioconfig/clkdiv0.rs
index 387ae41..b31bf69 100644
--- a/va416xx/src/ioconfig/clkdiv0.rs
+++ b/va416xx/src/ioconfig/clkdiv0.rs
@@ -5,7 +5,7 @@ impl core::fmt::Debug for R {
         write!(f, "{}", self.bits())
     }
 }
-#[doc = "Clock divide value. 0 will disable the clock\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clkdiv0::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Clock divide value. 0 will disable the clock\n\nYou can [`read`](crate::Reg::read) this register and get [`clkdiv0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Clkdiv0Spec;
 impl crate::RegisterSpec for Clkdiv0Spec {
     type Ux = u32;
diff --git a/va416xx/src/ioconfig/clkdiv1.rs b/va416xx/src/ioconfig/clkdiv1.rs
index 3bc2701..f5e0ba5 100644
--- a/va416xx/src/ioconfig/clkdiv1.rs
+++ b/va416xx/src/ioconfig/clkdiv1.rs
@@ -8,7 +8,7 @@ impl core::fmt::Debug for R {
     }
 }
 impl W {}
-#[doc = "Clock divide value. 0 will disable the clock\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clkdiv1::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clkdiv1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Clock divide value. 0 will disable the clock\n\nYou can [`read`](crate::Reg::read) this register and get [`clkdiv1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkdiv1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Clkdiv1Spec;
 impl crate::RegisterSpec for Clkdiv1Spec {
     type Ux = u32;
diff --git a/va416xx/src/ioconfig/clkdiv2.rs b/va416xx/src/ioconfig/clkdiv2.rs
index 80e2943..826224c 100644
--- a/va416xx/src/ioconfig/clkdiv2.rs
+++ b/va416xx/src/ioconfig/clkdiv2.rs
@@ -8,7 +8,7 @@ impl core::fmt::Debug for R {
     }
 }
 impl W {}
-#[doc = "Clock divide value. 0 will disable the clock\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clkdiv2::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clkdiv2::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Clock divide value. 0 will disable the clock\n\nYou can [`read`](crate::Reg::read) this register and get [`clkdiv2::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkdiv2::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Clkdiv2Spec;
 impl crate::RegisterSpec for Clkdiv2Spec {
     type Ux = u32;
diff --git a/va416xx/src/ioconfig/clkdiv3.rs b/va416xx/src/ioconfig/clkdiv3.rs
index d7ed7d0..a9e1662 100644
--- a/va416xx/src/ioconfig/clkdiv3.rs
+++ b/va416xx/src/ioconfig/clkdiv3.rs
@@ -8,7 +8,7 @@ impl core::fmt::Debug for R {
     }
 }
 impl W {}
-#[doc = "Clock divide value. 0 will disable the clock\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clkdiv3::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clkdiv3::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Clock divide value. 0 will disable the clock\n\nYou can [`read`](crate::Reg::read) this register and get [`clkdiv3::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkdiv3::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Clkdiv3Spec;
 impl crate::RegisterSpec for Clkdiv3Spec {
     type Ux = u32;
diff --git a/va416xx/src/ioconfig/clkdiv4.rs b/va416xx/src/ioconfig/clkdiv4.rs
index 72ccd13..9198928 100644
--- a/va416xx/src/ioconfig/clkdiv4.rs
+++ b/va416xx/src/ioconfig/clkdiv4.rs
@@ -8,7 +8,7 @@ impl core::fmt::Debug for R {
     }
 }
 impl W {}
-#[doc = "Clock divide value. 0 will disable the clock\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clkdiv4::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clkdiv4::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Clock divide value. 0 will disable the clock\n\nYou can [`read`](crate::Reg::read) this register and get [`clkdiv4::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkdiv4::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Clkdiv4Spec;
 impl crate::RegisterSpec for Clkdiv4Spec {
     type Ux = u32;
diff --git a/va416xx/src/ioconfig/clkdiv5.rs b/va416xx/src/ioconfig/clkdiv5.rs
index 2481bef..d57a955 100644
--- a/va416xx/src/ioconfig/clkdiv5.rs
+++ b/va416xx/src/ioconfig/clkdiv5.rs
@@ -8,7 +8,7 @@ impl core::fmt::Debug for R {
     }
 }
 impl W {}
-#[doc = "Clock divide value. 0 will disable the clock\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clkdiv5::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clkdiv5::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Clock divide value. 0 will disable the clock\n\nYou can [`read`](crate::Reg::read) this register and get [`clkdiv5::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkdiv5::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Clkdiv5Spec;
 impl crate::RegisterSpec for Clkdiv5Spec {
     type Ux = u32;
diff --git a/va416xx/src/ioconfig/clkdiv6.rs b/va416xx/src/ioconfig/clkdiv6.rs
index cbd5c0a..b066fe5 100644
--- a/va416xx/src/ioconfig/clkdiv6.rs
+++ b/va416xx/src/ioconfig/clkdiv6.rs
@@ -8,7 +8,7 @@ impl core::fmt::Debug for R {
     }
 }
 impl W {}
-#[doc = "Clock divide value. 0 will disable the clock\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clkdiv6::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clkdiv6::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Clock divide value. 0 will disable the clock\n\nYou can [`read`](crate::Reg::read) this register and get [`clkdiv6::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkdiv6::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Clkdiv6Spec;
 impl crate::RegisterSpec for Clkdiv6Spec {
     type Ux = u32;
diff --git a/va416xx/src/ioconfig/clkdiv7.rs b/va416xx/src/ioconfig/clkdiv7.rs
index f461430..b68af9c 100644
--- a/va416xx/src/ioconfig/clkdiv7.rs
+++ b/va416xx/src/ioconfig/clkdiv7.rs
@@ -8,7 +8,7 @@ impl core::fmt::Debug for R {
     }
 }
 impl W {}
-#[doc = "Clock divide value. 0 will disable the clock\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clkdiv7::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clkdiv7::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Clock divide value. 0 will disable the clock\n\nYou can [`read`](crate::Reg::read) this register and get [`clkdiv7::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkdiv7::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Clkdiv7Spec;
 impl crate::RegisterSpec for Clkdiv7Spec {
     type Ux = u32;
diff --git a/va416xx/src/ioconfig/perid.rs b/va416xx/src/ioconfig/perid.rs
index 6966c57..b01da2f 100644
--- a/va416xx/src/ioconfig/perid.rs
+++ b/va416xx/src/ioconfig/perid.rs
@@ -5,7 +5,7 @@ impl core::fmt::Debug for R {
         write!(f, "{}", self.bits())
     }
 }
-#[doc = "Peripheral ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`perid::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Peripheral ID Register\n\nYou can [`read`](crate::Reg::read) this register and get [`perid::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct PeridSpec;
 impl crate::RegisterSpec for PeridSpec {
     type Ux = u32;
diff --git a/va416xx/src/ioconfig/porta.rs b/va416xx/src/ioconfig/porta.rs
index b068faa..32e9ef5 100644
--- a/va416xx/src/ioconfig/porta.rs
+++ b/va416xx/src/ioconfig/porta.rs
@@ -214,72 +214,61 @@ impl R {
 impl W {
     #[doc = "Bits 0:2 - Input Filter Selectoin"]
     #[inline(always)]
-    #[must_use]
     pub fn flttype(&mut self) -> FlttypeW<PortaSpec> {
         FlttypeW::new(self, 0)
     }
     #[doc = "Bits 3:5 - Input Filter Clock Selection"]
     #[inline(always)]
-    #[must_use]
     pub fn fltclk(&mut self) -> FltclkW<PortaSpec> {
         FltclkW::new(self, 3)
     }
     #[doc = "Bit 6 - Input Invert Selection"]
     #[inline(always)]
-    #[must_use]
     pub fn invinp(&mut self) -> InvinpW<PortaSpec> {
         InvinpW::new(self, 6)
     }
     #[doc = "Bit 7 - Input Enable While Output enabled"]
     #[inline(always)]
-    #[must_use]
     pub fn iewo(&mut self) -> IewoW<PortaSpec> {
         IewoW::new(self, 7)
     }
     #[doc = "Bit 8 - Output Open Drain Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn opendrn(&mut self) -> OpendrnW<PortaSpec> {
         OpendrnW::new(self, 8)
     }
     #[doc = "Bit 9 - Output Invert Selection"]
     #[inline(always)]
-    #[must_use]
     pub fn invout(&mut self) -> InvoutW<PortaSpec> {
         InvoutW::new(self, 9)
     }
     #[doc = "Bit 10 - Internal Pull up/down level"]
     #[inline(always)]
-    #[must_use]
     pub fn plevel(&mut self) -> PlevelW<PortaSpec> {
         PlevelW::new(self, 10)
     }
     #[doc = "Bit 11 - Enable Internal Pull up/down"]
     #[inline(always)]
-    #[must_use]
     pub fn pen(&mut self) -> PenW<PortaSpec> {
         PenW::new(self, 11)
     }
     #[doc = "Bit 12 - Enable Pull when output active"]
     #[inline(always)]
-    #[must_use]
     pub fn pwoa(&mut self) -> PwoaW<PortaSpec> {
         PwoaW::new(self, 12)
     }
     #[doc = "Bits 13:15 - Pin Function Selection"]
     #[inline(always)]
-    #[must_use]
     pub fn funsel(&mut self) -> FunselW<PortaSpec> {
         FunselW::new(self, 13)
     }
     #[doc = "Bit 16 - IO Pin Disable"]
     #[inline(always)]
-    #[must_use]
     pub fn iodis(&mut self) -> IodisW<PortaSpec> {
         IodisW::new(self, 16)
     }
 }
-#[doc = "PORTA Pin Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`porta::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`porta::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "PORTA Pin Configuration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`porta::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`porta::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct PortaSpec;
 impl crate::RegisterSpec for PortaSpec {
     type Ux = u32;
diff --git a/va416xx/src/irq_router.rs b/va416xx/src/irq_router.rs
index af90499..50f8ebd 100644
--- a/va416xx/src/irq_router.rs
+++ b/va416xx/src/irq_router.rs
@@ -95,91 +95,91 @@ impl RegisterBlock {
         &self.perid
     }
 }
-#[doc = "DMASEL0 (rw) register accessor: Interrupt select for DMA channel 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dmasel0::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dmasel0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmasel0`]
+#[doc = "DMASEL0 (rw) register accessor: Interrupt select for DMA channel 0\n\nYou can [`read`](crate::Reg::read) this register and get [`dmasel0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dmasel0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmasel0`]
 module"]
 #[doc(alias = "DMASEL0")]
 pub type Dmasel0 = crate::Reg<dmasel0::Dmasel0Spec>;
 #[doc = "Interrupt select for DMA channel 0"]
 pub mod dmasel0;
-#[doc = "DMASEL1 (rw) register accessor: Interrupt select for DMA channel 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dmasel1::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dmasel1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmasel1`]
+#[doc = "DMASEL1 (rw) register accessor: Interrupt select for DMA channel 1\n\nYou can [`read`](crate::Reg::read) this register and get [`dmasel1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dmasel1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmasel1`]
 module"]
 #[doc(alias = "DMASEL1")]
 pub type Dmasel1 = crate::Reg<dmasel1::Dmasel1Spec>;
 #[doc = "Interrupt select for DMA channel 1"]
 pub mod dmasel1;
-#[doc = "DMASEL2 (rw) register accessor: Interrupt select for DMA channel 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dmasel2::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dmasel2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmasel2`]
+#[doc = "DMASEL2 (rw) register accessor: Interrupt select for DMA channel 2\n\nYou can [`read`](crate::Reg::read) this register and get [`dmasel2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dmasel2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmasel2`]
 module"]
 #[doc(alias = "DMASEL2")]
 pub type Dmasel2 = crate::Reg<dmasel2::Dmasel2Spec>;
 #[doc = "Interrupt select for DMA channel 2"]
 pub mod dmasel2;
-#[doc = "DMASEL3 (rw) register accessor: Interrupt select for DMA channel 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dmasel3::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dmasel3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmasel3`]
+#[doc = "DMASEL3 (rw) register accessor: Interrupt select for DMA channel 3\n\nYou can [`read`](crate::Reg::read) this register and get [`dmasel3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dmasel3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmasel3`]
 module"]
 #[doc(alias = "DMASEL3")]
 pub type Dmasel3 = crate::Reg<dmasel3::Dmasel3Spec>;
 #[doc = "Interrupt select for DMA channel 3"]
 pub mod dmasel3;
-#[doc = "DMATTSEL (rw) register accessor: Trigger select for the DMA channels\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dmattsel::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dmattsel::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmattsel`]
+#[doc = "DMATTSEL (rw) register accessor: Trigger select for the DMA channels\n\nYou can [`read`](crate::Reg::read) this register and get [`dmattsel::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dmattsel::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmattsel`]
 module"]
 #[doc(alias = "DMATTSEL")]
 pub type Dmattsel = crate::Reg<dmattsel::DmattselSpec>;
 #[doc = "Trigger select for the DMA channels"]
 pub mod dmattsel;
-#[doc = "ADCSEL (rw) register accessor: Interrupt select for ADC\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`adcsel::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`adcsel::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@adcsel`]
+#[doc = "ADCSEL (rw) register accessor: Interrupt select for ADC\n\nYou can [`read`](crate::Reg::read) this register and get [`adcsel::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`adcsel::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@adcsel`]
 module"]
 #[doc(alias = "ADCSEL")]
 pub type Adcsel = crate::Reg<adcsel::AdcselSpec>;
 #[doc = "Interrupt select for ADC"]
 pub mod adcsel;
-#[doc = "DACSEL0 (rw) register accessor: Interrupt select for DAC0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dacsel0::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dacsel0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dacsel0`]
+#[doc = "DACSEL0 (rw) register accessor: Interrupt select for DAC0\n\nYou can [`read`](crate::Reg::read) this register and get [`dacsel0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dacsel0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dacsel0`]
 module"]
 #[doc(alias = "DACSEL0")]
 pub type Dacsel0 = crate::Reg<dacsel0::Dacsel0Spec>;
 #[doc = "Interrupt select for DAC0"]
 pub mod dacsel0;
-#[doc = "DACSEL1 (rw) register accessor: Interrupt select for DAC1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dacsel1::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dacsel1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dacsel1`]
+#[doc = "DACSEL1 (rw) register accessor: Interrupt select for DAC1\n\nYou can [`read`](crate::Reg::read) this register and get [`dacsel1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dacsel1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dacsel1`]
 module"]
 #[doc(alias = "DACSEL1")]
 pub type Dacsel1 = crate::Reg<dacsel1::Dacsel1Spec>;
 #[doc = "Interrupt select for DAC1"]
 pub mod dacsel1;
-#[doc = "IRQ_OUT0 (r) register accessor: DEBUG IRQ_OUT\\[31:0\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_out0::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_out0`]
+#[doc = "IRQ_OUT0 (r) register accessor: DEBUG IRQ_OUT\\[31:0\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_out0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_out0`]
 module"]
 #[doc(alias = "IRQ_OUT0")]
 pub type IrqOut0 = crate::Reg<irq_out0::IrqOut0Spec>;
 #[doc = "DEBUG IRQ_OUT\\[31:0\\]"]
 pub mod irq_out0;
-#[doc = "IRQ_OUT1 (r) register accessor: DEBUG IRQ_OUT\\[63:32\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_out1::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_out1`]
+#[doc = "IRQ_OUT1 (r) register accessor: DEBUG IRQ_OUT\\[63:32\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_out1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_out1`]
 module"]
 #[doc(alias = "IRQ_OUT1")]
 pub type IrqOut1 = crate::Reg<irq_out1::IrqOut1Spec>;
 #[doc = "DEBUG IRQ_OUT\\[63:32\\]"]
 pub mod irq_out1;
-#[doc = "IRQ_OUT2 (r) register accessor: DEBUG IRQ_OUT\\[95:64\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_out2::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_out2`]
+#[doc = "IRQ_OUT2 (r) register accessor: DEBUG IRQ_OUT\\[95:64\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_out2::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_out2`]
 module"]
 #[doc(alias = "IRQ_OUT2")]
 pub type IrqOut2 = crate::Reg<irq_out2::IrqOut2Spec>;
 #[doc = "DEBUG IRQ_OUT\\[95:64\\]"]
 pub mod irq_out2;
-#[doc = "IRQ_OUT3 (r) register accessor: DEBUG IRQ_OUT\\[127:96\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_out3::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_out3`]
+#[doc = "IRQ_OUT3 (r) register accessor: DEBUG IRQ_OUT\\[127:96\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_out3::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_out3`]
 module"]
 #[doc(alias = "IRQ_OUT3")]
 pub type IrqOut3 = crate::Reg<irq_out3::IrqOut3Spec>;
 #[doc = "DEBUG IRQ_OUT\\[127:96\\]"]
 pub mod irq_out3;
-#[doc = "IRQ_OUT4 (r) register accessor: DEBUG IRQ_OUT\\[159:128\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_out4::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_out4`]
+#[doc = "IRQ_OUT4 (r) register accessor: DEBUG IRQ_OUT\\[159:128\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_out4::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_out4`]
 module"]
 #[doc(alias = "IRQ_OUT4")]
 pub type IrqOut4 = crate::Reg<irq_out4::IrqOut4Spec>;
 #[doc = "DEBUG IRQ_OUT\\[159:128\\]"]
 pub mod irq_out4;
-#[doc = "IRQ_OUT5 (r) register accessor: DEBUG IRQ_OUT\\[179:160\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_out5::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_out5`]
+#[doc = "IRQ_OUT5 (r) register accessor: DEBUG IRQ_OUT\\[179:160\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_out5::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_out5`]
 module"]
 #[doc(alias = "IRQ_OUT5")]
 pub type IrqOut5 = crate::Reg<irq_out5::IrqOut5Spec>;
 #[doc = "DEBUG IRQ_OUT\\[179:160\\]"]
 pub mod irq_out5;
-#[doc = "PERID (r) register accessor: Peripheral ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`perid::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@perid`]
+#[doc = "PERID (r) register accessor: Peripheral ID Register\n\nYou can [`read`](crate::Reg::read) this register and get [`perid::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@perid`]
 module"]
 #[doc(alias = "PERID")]
 pub type Perid = crate::Reg<perid::PeridSpec>;
diff --git a/va416xx/src/irq_router/adcsel.rs b/va416xx/src/irq_router/adcsel.rs
index 849fcdd..b999a3c 100644
--- a/va416xx/src/irq_router/adcsel.rs
+++ b/va416xx/src/irq_router/adcsel.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:4 - ADC trigger source selection value"]
     #[inline(always)]
-    #[must_use]
     pub fn adcsel(&mut self) -> AdcselW<AdcselSpec> {
         AdcselW::new(self, 0)
     }
 }
-#[doc = "Interrupt select for ADC\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`adcsel::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`adcsel::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Interrupt select for ADC\n\nYou can [`read`](crate::Reg::read) this register and get [`adcsel::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`adcsel::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct AdcselSpec;
 impl crate::RegisterSpec for AdcselSpec {
     type Ux = u32;
diff --git a/va416xx/src/irq_router/dacsel0.rs b/va416xx/src/irq_router/dacsel0.rs
index 4ca1863..7ac1ac5 100644
--- a/va416xx/src/irq_router/dacsel0.rs
+++ b/va416xx/src/irq_router/dacsel0.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:4 - DAC trigger source selection value"]
     #[inline(always)]
-    #[must_use]
     pub fn dacsel(&mut self) -> DacselW<Dacsel0Spec> {
         DacselW::new(self, 0)
     }
 }
-#[doc = "Interrupt select for DAC0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dacsel0::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dacsel0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Interrupt select for DAC0\n\nYou can [`read`](crate::Reg::read) this register and get [`dacsel0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dacsel0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Dacsel0Spec;
 impl crate::RegisterSpec for Dacsel0Spec {
     type Ux = u32;
diff --git a/va416xx/src/irq_router/dacsel1.rs b/va416xx/src/irq_router/dacsel1.rs
index 7142161..fa27e82 100644
--- a/va416xx/src/irq_router/dacsel1.rs
+++ b/va416xx/src/irq_router/dacsel1.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:4 - DAC trigger source selection value"]
     #[inline(always)]
-    #[must_use]
     pub fn dacsel(&mut self) -> DacselW<Dacsel1Spec> {
         DacselW::new(self, 0)
     }
 }
-#[doc = "Interrupt select for DAC1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dacsel1::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dacsel1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Interrupt select for DAC1\n\nYou can [`read`](crate::Reg::read) this register and get [`dacsel1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dacsel1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Dacsel1Spec;
 impl crate::RegisterSpec for Dacsel1Spec {
     type Ux = u32;
diff --git a/va416xx/src/irq_router/dmasel0.rs b/va416xx/src/irq_router/dmasel0.rs
index 870f94e..66661c8 100644
--- a/va416xx/src/irq_router/dmasel0.rs
+++ b/va416xx/src/irq_router/dmasel0.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:6 - DMA trigger source selection value"]
     #[inline(always)]
-    #[must_use]
     pub fn dmasel(&mut self) -> DmaselW<Dmasel0Spec> {
         DmaselW::new(self, 0)
     }
 }
-#[doc = "Interrupt select for DMA channel 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dmasel0::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dmasel0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Interrupt select for DMA channel 0\n\nYou can [`read`](crate::Reg::read) this register and get [`dmasel0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dmasel0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Dmasel0Spec;
 impl crate::RegisterSpec for Dmasel0Spec {
     type Ux = u32;
diff --git a/va416xx/src/irq_router/dmasel1.rs b/va416xx/src/irq_router/dmasel1.rs
index e9c43c3..fea2726 100644
--- a/va416xx/src/irq_router/dmasel1.rs
+++ b/va416xx/src/irq_router/dmasel1.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:6 - DMA trigger source selection value"]
     #[inline(always)]
-    #[must_use]
     pub fn dmasel(&mut self) -> DmaselW<Dmasel1Spec> {
         DmaselW::new(self, 0)
     }
 }
-#[doc = "Interrupt select for DMA channel 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dmasel1::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dmasel1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Interrupt select for DMA channel 1\n\nYou can [`read`](crate::Reg::read) this register and get [`dmasel1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dmasel1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Dmasel1Spec;
 impl crate::RegisterSpec for Dmasel1Spec {
     type Ux = u32;
diff --git a/va416xx/src/irq_router/dmasel2.rs b/va416xx/src/irq_router/dmasel2.rs
index 02285a2..953ce6e 100644
--- a/va416xx/src/irq_router/dmasel2.rs
+++ b/va416xx/src/irq_router/dmasel2.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:6 - DMA trigger source selection value"]
     #[inline(always)]
-    #[must_use]
     pub fn dmasel(&mut self) -> DmaselW<Dmasel2Spec> {
         DmaselW::new(self, 0)
     }
 }
-#[doc = "Interrupt select for DMA channel 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dmasel2::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dmasel2::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Interrupt select for DMA channel 2\n\nYou can [`read`](crate::Reg::read) this register and get [`dmasel2::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dmasel2::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Dmasel2Spec;
 impl crate::RegisterSpec for Dmasel2Spec {
     type Ux = u32;
diff --git a/va416xx/src/irq_router/dmasel3.rs b/va416xx/src/irq_router/dmasel3.rs
index 2d4d1e8..7396609 100644
--- a/va416xx/src/irq_router/dmasel3.rs
+++ b/va416xx/src/irq_router/dmasel3.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:6 - DMA trigger source selection value"]
     #[inline(always)]
-    #[must_use]
     pub fn dmasel(&mut self) -> DmaselW<Dmasel3Spec> {
         DmaselW::new(self, 0)
     }
 }
-#[doc = "Interrupt select for DMA channel 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dmasel3::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dmasel3::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Interrupt select for DMA channel 3\n\nYou can [`read`](crate::Reg::read) this register and get [`dmasel3::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dmasel3::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Dmasel3Spec;
 impl crate::RegisterSpec for Dmasel3Spec {
     type Ux = u32;
diff --git a/va416xx/src/irq_router/dmattsel.rs b/va416xx/src/irq_router/dmattsel.rs
index 76e73c4..d8add4b 100644
--- a/va416xx/src/irq_router/dmattsel.rs
+++ b/va416xx/src/irq_router/dmattsel.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:3 - DMA trigger type selection value"]
     #[inline(always)]
-    #[must_use]
     pub fn dmattsel(&mut self) -> DmattselW<DmattselSpec> {
         DmattselW::new(self, 0)
     }
 }
-#[doc = "Trigger select for the DMA channels\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dmattsel::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dmattsel::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Trigger select for the DMA channels\n\nYou can [`read`](crate::Reg::read) this register and get [`dmattsel::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dmattsel::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct DmattselSpec;
 impl crate::RegisterSpec for DmattselSpec {
     type Ux = u32;
diff --git a/va416xx/src/irq_router/irq_out0.rs b/va416xx/src/irq_router/irq_out0.rs
index 2fbde74..5d5a833 100644
--- a/va416xx/src/irq_router/irq_out0.rs
+++ b/va416xx/src/irq_router/irq_out0.rs
@@ -9,7 +9,7 @@ impl R {
         IrqOut0R::new(self.bits)
     }
 }
-#[doc = "DEBUG IRQ_OUT\\[31:0\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_out0::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "DEBUG IRQ_OUT\\[31:0\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_out0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct IrqOut0Spec;
 impl crate::RegisterSpec for IrqOut0Spec {
     type Ux = u32;
diff --git a/va416xx/src/irq_router/irq_out1.rs b/va416xx/src/irq_router/irq_out1.rs
index aff0f39..3699f29 100644
--- a/va416xx/src/irq_router/irq_out1.rs
+++ b/va416xx/src/irq_router/irq_out1.rs
@@ -9,7 +9,7 @@ impl R {
         IrqOut1R::new(self.bits)
     }
 }
-#[doc = "DEBUG IRQ_OUT\\[63:32\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_out1::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "DEBUG IRQ_OUT\\[63:32\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_out1::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct IrqOut1Spec;
 impl crate::RegisterSpec for IrqOut1Spec {
     type Ux = u32;
diff --git a/va416xx/src/irq_router/irq_out2.rs b/va416xx/src/irq_router/irq_out2.rs
index 4f3275c..9ef9c88 100644
--- a/va416xx/src/irq_router/irq_out2.rs
+++ b/va416xx/src/irq_router/irq_out2.rs
@@ -9,7 +9,7 @@ impl R {
         IrqOut2R::new(self.bits)
     }
 }
-#[doc = "DEBUG IRQ_OUT\\[95:64\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_out2::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "DEBUG IRQ_OUT\\[95:64\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_out2::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct IrqOut2Spec;
 impl crate::RegisterSpec for IrqOut2Spec {
     type Ux = u32;
diff --git a/va416xx/src/irq_router/irq_out3.rs b/va416xx/src/irq_router/irq_out3.rs
index adb5998..60137e9 100644
--- a/va416xx/src/irq_router/irq_out3.rs
+++ b/va416xx/src/irq_router/irq_out3.rs
@@ -9,7 +9,7 @@ impl R {
         IrqOut3R::new(self.bits)
     }
 }
-#[doc = "DEBUG IRQ_OUT\\[127:96\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_out3::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "DEBUG IRQ_OUT\\[127:96\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_out3::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct IrqOut3Spec;
 impl crate::RegisterSpec for IrqOut3Spec {
     type Ux = u32;
diff --git a/va416xx/src/irq_router/irq_out4.rs b/va416xx/src/irq_router/irq_out4.rs
index 2fd418a..eec96b0 100644
--- a/va416xx/src/irq_router/irq_out4.rs
+++ b/va416xx/src/irq_router/irq_out4.rs
@@ -9,7 +9,7 @@ impl R {
         IrqOut4R::new(self.bits)
     }
 }
-#[doc = "DEBUG IRQ_OUT\\[159:128\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_out4::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "DEBUG IRQ_OUT\\[159:128\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_out4::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct IrqOut4Spec;
 impl crate::RegisterSpec for IrqOut4Spec {
     type Ux = u32;
diff --git a/va416xx/src/irq_router/irq_out5.rs b/va416xx/src/irq_router/irq_out5.rs
index efb2f8c..9efe34d 100644
--- a/va416xx/src/irq_router/irq_out5.rs
+++ b/va416xx/src/irq_router/irq_out5.rs
@@ -9,7 +9,7 @@ impl R {
         IrqOut5R::new(self.bits & 0x000f_ffff)
     }
 }
-#[doc = "DEBUG IRQ_OUT\\[179:160\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_out5::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "DEBUG IRQ_OUT\\[179:160\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_out5::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct IrqOut5Spec;
 impl crate::RegisterSpec for IrqOut5Spec {
     type Ux = u32;
diff --git a/va416xx/src/irq_router/perid.rs b/va416xx/src/irq_router/perid.rs
index 4ad66bc..11f4ce5 100644
--- a/va416xx/src/irq_router/perid.rs
+++ b/va416xx/src/irq_router/perid.rs
@@ -5,7 +5,7 @@ impl core::fmt::Debug for R {
         write!(f, "{}", self.bits())
     }
 }
-#[doc = "Peripheral ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`perid::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Peripheral ID Register\n\nYou can [`read`](crate::Reg::read) this register and get [`perid::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct PeridSpec;
 impl crate::RegisterSpec for PeridSpec {
     type Ux = u32;
diff --git a/va416xx/src/lib.rs b/va416xx/src/lib.rs
index aed7d6d..ca3163f 100644
--- a/va416xx/src/lib.rs
+++ b/va416xx/src/lib.rs
@@ -1,5 +1,5 @@
-#![doc = "Peripheral access API for VA416XX microcontrollers (generated using svd2rust v0.33.3 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next]
-svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.33.3/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"]
+#![doc = "Peripheral access API for VA416XX microcontrollers (generated using svd2rust v0.35.0 (e10f920 2025-02-12))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next]
+svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.35.0/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"]
 #![allow(non_camel_case_types)]
 #![allow(non_snake_case)]
 #![no_std]
@@ -3584,174 +3584,62 @@ impl Peripherals {
     pub unsafe fn steal() -> Self {
         DEVICE_PERIPHERALS = true;
         Peripherals {
-            clkgen: Clkgen {
-                _marker: PhantomData,
-            },
-            sysconfig: Sysconfig {
-                _marker: PhantomData,
-            },
-            dma: Dma {
-                _marker: PhantomData,
-            },
-            ioconfig: Ioconfig {
-                _marker: PhantomData,
-            },
-            utility: Utility {
-                _marker: PhantomData,
-            },
-            porta: Porta {
-                _marker: PhantomData,
-            },
-            portb: Portb {
-                _marker: PhantomData,
-            },
-            portc: Portc {
-                _marker: PhantomData,
-            },
-            portd: Portd {
-                _marker: PhantomData,
-            },
-            porte: Porte {
-                _marker: PhantomData,
-            },
-            portf: Portf {
-                _marker: PhantomData,
-            },
-            portg: Portg {
-                _marker: PhantomData,
-            },
-            tim0: Tim0 {
-                _marker: PhantomData,
-            },
-            tim1: Tim1 {
-                _marker: PhantomData,
-            },
-            tim2: Tim2 {
-                _marker: PhantomData,
-            },
-            tim3: Tim3 {
-                _marker: PhantomData,
-            },
-            tim4: Tim4 {
-                _marker: PhantomData,
-            },
-            tim5: Tim5 {
-                _marker: PhantomData,
-            },
-            tim6: Tim6 {
-                _marker: PhantomData,
-            },
-            tim7: Tim7 {
-                _marker: PhantomData,
-            },
-            tim8: Tim8 {
-                _marker: PhantomData,
-            },
-            tim9: Tim9 {
-                _marker: PhantomData,
-            },
-            tim10: Tim10 {
-                _marker: PhantomData,
-            },
-            tim11: Tim11 {
-                _marker: PhantomData,
-            },
-            tim12: Tim12 {
-                _marker: PhantomData,
-            },
-            tim13: Tim13 {
-                _marker: PhantomData,
-            },
-            tim14: Tim14 {
-                _marker: PhantomData,
-            },
-            tim15: Tim15 {
-                _marker: PhantomData,
-            },
-            tim16: Tim16 {
-                _marker: PhantomData,
-            },
-            tim17: Tim17 {
-                _marker: PhantomData,
-            },
-            tim18: Tim18 {
-                _marker: PhantomData,
-            },
-            tim19: Tim19 {
-                _marker: PhantomData,
-            },
-            tim20: Tim20 {
-                _marker: PhantomData,
-            },
-            tim21: Tim21 {
-                _marker: PhantomData,
-            },
-            tim22: Tim22 {
-                _marker: PhantomData,
-            },
-            tim23: Tim23 {
-                _marker: PhantomData,
-            },
-            uart0: Uart0 {
-                _marker: PhantomData,
-            },
-            uart1: Uart1 {
-                _marker: PhantomData,
-            },
-            uart2: Uart2 {
-                _marker: PhantomData,
-            },
-            spi0: Spi0 {
-                _marker: PhantomData,
-            },
-            spi1: Spi1 {
-                _marker: PhantomData,
-            },
-            spi2: Spi2 {
-                _marker: PhantomData,
-            },
-            spi3: Spi3 {
-                _marker: PhantomData,
-            },
-            i2c0: I2c0 {
-                _marker: PhantomData,
-            },
-            i2c1: I2c1 {
-                _marker: PhantomData,
-            },
-            i2c2: I2c2 {
-                _marker: PhantomData,
-            },
-            can0: Can0 {
-                _marker: PhantomData,
-            },
-            can1: Can1 {
-                _marker: PhantomData,
-            },
-            adc: Adc {
-                _marker: PhantomData,
-            },
-            dac0: Dac0 {
-                _marker: PhantomData,
-            },
-            dac1: Dac1 {
-                _marker: PhantomData,
-            },
-            spw: Spw {
-                _marker: PhantomData,
-            },
-            irq_router: IrqRouter {
-                _marker: PhantomData,
-            },
-            watch_dog: WatchDog {
-                _marker: PhantomData,
-            },
-            trng: Trng {
-                _marker: PhantomData,
-            },
-            eth: Eth {
-                _marker: PhantomData,
-            },
+            clkgen: Clkgen::steal(),
+            sysconfig: Sysconfig::steal(),
+            dma: Dma::steal(),
+            ioconfig: Ioconfig::steal(),
+            utility: Utility::steal(),
+            porta: Porta::steal(),
+            portb: Portb::steal(),
+            portc: Portc::steal(),
+            portd: Portd::steal(),
+            porte: Porte::steal(),
+            portf: Portf::steal(),
+            portg: Portg::steal(),
+            tim0: Tim0::steal(),
+            tim1: Tim1::steal(),
+            tim2: Tim2::steal(),
+            tim3: Tim3::steal(),
+            tim4: Tim4::steal(),
+            tim5: Tim5::steal(),
+            tim6: Tim6::steal(),
+            tim7: Tim7::steal(),
+            tim8: Tim8::steal(),
+            tim9: Tim9::steal(),
+            tim10: Tim10::steal(),
+            tim11: Tim11::steal(),
+            tim12: Tim12::steal(),
+            tim13: Tim13::steal(),
+            tim14: Tim14::steal(),
+            tim15: Tim15::steal(),
+            tim16: Tim16::steal(),
+            tim17: Tim17::steal(),
+            tim18: Tim18::steal(),
+            tim19: Tim19::steal(),
+            tim20: Tim20::steal(),
+            tim21: Tim21::steal(),
+            tim22: Tim22::steal(),
+            tim23: Tim23::steal(),
+            uart0: Uart0::steal(),
+            uart1: Uart1::steal(),
+            uart2: Uart2::steal(),
+            spi0: Spi0::steal(),
+            spi1: Spi1::steal(),
+            spi2: Spi2::steal(),
+            spi3: Spi3::steal(),
+            i2c0: I2c0::steal(),
+            i2c1: I2c1::steal(),
+            i2c2: I2c2::steal(),
+            can0: Can0::steal(),
+            can1: Can1::steal(),
+            adc: Adc::steal(),
+            dac0: Dac0::steal(),
+            dac1: Dac1::steal(),
+            spw: Spw::steal(),
+            irq_router: IrqRouter::steal(),
+            watch_dog: WatchDog::steal(),
+            trng: Trng::steal(),
+            eth: Eth::steal(),
         }
     }
 }
diff --git a/va416xx/src/porta.rs b/va416xx/src/porta.rs
index 2a15691..7b239c2 100644
--- a/va416xx/src/porta.rs
+++ b/va416xx/src/porta.rs
@@ -1,6 +1,3 @@
-// Added manually.
-#![allow(clippy::identity_op)]
-
 #[repr(C)]
 #[doc = "Register block"]
 pub struct RegisterBlock {
@@ -33,247 +30,246 @@ impl RegisterBlock {
     pub const fn datainbyte(&self, n: usize) -> &Datainbyte {
         #[allow(clippy::no_effect)]
         [(); 4][n];
-        unsafe { &*(self as *const Self).cast::<u8>().add(0).add(1 * n).cast() }
+        unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(n).cast() }
     }
     #[doc = "Iterator for array of:"]
     #[doc = "0x00 - Data In Register by Byte"]
     #[inline(always)]
     pub fn datainbyte_iter(&self) -> impl Iterator<Item = &Datainbyte> {
-        (0..4)
-            .map(move |n| unsafe { &*(self as *const Self).cast::<u8>().add(0).add(1 * n).cast() })
+        (0..4).map(move |n| unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(n).cast() })
     }
     #[doc = "0x00 - Data In Register"]
     #[inline(always)]
     pub const fn datain(&self) -> &Datain {
-        unsafe { &*(self as *const Self).cast::<u8>().add(0).cast() }
+        unsafe { &*core::ptr::from_ref(self).cast::<u8>().cast() }
     }
     #[doc = "0x04 - Data In Raw Register by Byte"]
     #[inline(always)]
     pub const fn datainrawbyte0(&self, n: usize) -> &Datainrawbyte {
         #[allow(clippy::no_effect)]
         [(); 4][n];
-        unsafe { &*(self as *const Self).cast::<u8>().add(4).add(1 * n).cast() }
+        unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(4).add(n).cast() }
     }
     #[doc = "Iterator for array of:"]
     #[doc = "0x04 - Data In Raw Register by Byte"]
     #[inline(always)]
     pub fn datainrawbyte0_iter(&self) -> impl Iterator<Item = &Datainrawbyte> {
         (0..4)
-            .map(move |n| unsafe { &*(self as *const Self).cast::<u8>().add(4).add(1 * n).cast() })
+            .map(move |n| unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(4).add(n).cast() })
     }
     #[doc = "0x04 - Data In Raw Register"]
     #[inline(always)]
     pub const fn datainraw(&self) -> &Datainraw {
-        unsafe { &*(self as *const Self).cast::<u8>().add(4).cast() }
+        unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(4).cast() }
     }
     #[doc = "0x08 - Data Out Register by Byte"]
     #[inline(always)]
     pub const fn dataoutbyte(&self, n: usize) -> &Dataoutbyte {
         #[allow(clippy::no_effect)]
         [(); 4][n];
-        unsafe { &*(self as *const Self).cast::<u8>().add(8).add(1 * n).cast() }
+        unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(8).add(n).cast() }
     }
     #[doc = "Iterator for array of:"]
     #[doc = "0x08 - Data Out Register by Byte"]
     #[inline(always)]
     pub fn dataoutbyte_iter(&self) -> impl Iterator<Item = &Dataoutbyte> {
         (0..4)
-            .map(move |n| unsafe { &*(self as *const Self).cast::<u8>().add(8).add(1 * n).cast() })
+            .map(move |n| unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(8).add(n).cast() })
     }
     #[doc = "0x08 - Data Out Register"]
     #[inline(always)]
     pub const fn dataout(&self) -> &Dataout {
-        unsafe { &*(self as *const Self).cast::<u8>().add(8).cast() }
+        unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(8).cast() }
     }
     #[doc = "0x0c - Data Out Register by Byte"]
     #[inline(always)]
     pub const fn dataoutrawbyte0(&self, n: usize) -> &Dataoutrawbyte {
         #[allow(clippy::no_effect)]
         [(); 4][n];
-        unsafe { &*(self as *const Self).cast::<u8>().add(12).add(1 * n).cast() }
+        unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(12).add(n).cast() }
     }
     #[doc = "Iterator for array of:"]
     #[doc = "0x0c - Data Out Register by Byte"]
     #[inline(always)]
     pub fn dataoutrawbyte0_iter(&self) -> impl Iterator<Item = &Dataoutrawbyte> {
         (0..4)
-            .map(move |n| unsafe { &*(self as *const Self).cast::<u8>().add(12).add(1 * n).cast() })
+            .map(move |n| unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(12).add(n).cast() })
     }
     #[doc = "0x0c - Data Out Register"]
     #[inline(always)]
     pub const fn dataoutraw(&self) -> &Dataoutraw {
-        unsafe { &*(self as *const Self).cast::<u8>().add(12).cast() }
+        unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(12).cast() }
     }
     #[doc = "0x10 - Set Out Register by Byte"]
     #[inline(always)]
     pub const fn setoutbyte0(&self, n: usize) -> &Setoutbyte {
         #[allow(clippy::no_effect)]
         [(); 4][n];
-        unsafe { &*(self as *const Self).cast::<u8>().add(16).add(1 * n).cast() }
+        unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(16).add(n).cast() }
     }
     #[doc = "Iterator for array of:"]
     #[doc = "0x10 - Set Out Register by Byte"]
     #[inline(always)]
     pub fn setoutbyte0_iter(&self) -> impl Iterator<Item = &Setoutbyte> {
         (0..4)
-            .map(move |n| unsafe { &*(self as *const Self).cast::<u8>().add(16).add(1 * n).cast() })
+            .map(move |n| unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(16).add(n).cast() })
     }
     #[doc = "0x10 - Set Out Register"]
     #[inline(always)]
     pub const fn setout(&self) -> &Setout {
-        unsafe { &*(self as *const Self).cast::<u8>().add(16).cast() }
+        unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(16).cast() }
     }
     #[doc = "0x14 - Clear Out Register by Byte"]
     #[inline(always)]
     pub const fn clroutbyte0(&self, n: usize) -> &Clroutbyte {
         #[allow(clippy::no_effect)]
         [(); 4][n];
-        unsafe { &*(self as *const Self).cast::<u8>().add(20).add(1 * n).cast() }
+        unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(20).add(n).cast() }
     }
     #[doc = "Iterator for array of:"]
     #[doc = "0x14 - Clear Out Register by Byte"]
     #[inline(always)]
     pub fn clroutbyte0_iter(&self) -> impl Iterator<Item = &Clroutbyte> {
         (0..4)
-            .map(move |n| unsafe { &*(self as *const Self).cast::<u8>().add(20).add(1 * n).cast() })
+            .map(move |n| unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(20).add(n).cast() })
     }
     #[doc = "0x14 - Clear Out Register"]
     #[inline(always)]
     pub const fn clrout(&self) -> &Clrout {
-        unsafe { &*(self as *const Self).cast::<u8>().add(20).cast() }
+        unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(20).cast() }
     }
     #[doc = "0x18 - Toggle Out Register by Byte"]
     #[inline(always)]
     pub const fn togoutbyte0(&self, n: usize) -> &Togoutbyte {
         #[allow(clippy::no_effect)]
         [(); 4][n];
-        unsafe { &*(self as *const Self).cast::<u8>().add(24).add(1 * n).cast() }
+        unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(24).add(n).cast() }
     }
     #[doc = "Iterator for array of:"]
     #[doc = "0x18 - Toggle Out Register by Byte"]
     #[inline(always)]
     pub fn togoutbyte0_iter(&self) -> impl Iterator<Item = &Togoutbyte> {
         (0..4)
-            .map(move |n| unsafe { &*(self as *const Self).cast::<u8>().add(24).add(1 * n).cast() })
+            .map(move |n| unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(24).add(n).cast() })
     }
     #[doc = "0x18 - Toggle Out Register"]
     #[inline(always)]
     pub const fn togout(&self) -> &Togout {
-        unsafe { &*(self as *const Self).cast::<u8>().add(24).cast() }
+        unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(24).cast() }
     }
     #[doc = "0x1c - Data Out Register by Byte"]
     #[inline(always)]
     pub const fn datamaskbyte(&self, n: usize) -> &Datamaskbyte {
         #[allow(clippy::no_effect)]
         [(); 4][n];
-        unsafe { &*(self as *const Self).cast::<u8>().add(28).add(1 * n).cast() }
+        unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(28).add(n).cast() }
     }
     #[doc = "Iterator for array of:"]
     #[doc = "0x1c - Data Out Register by Byte"]
     #[inline(always)]
     pub fn datamaskbyte_iter(&self) -> impl Iterator<Item = &Datamaskbyte> {
         (0..4)
-            .map(move |n| unsafe { &*(self as *const Self).cast::<u8>().add(28).add(1 * n).cast() })
+            .map(move |n| unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(28).add(n).cast() })
     }
     #[doc = "0x1c - Data mask Register"]
     #[inline(always)]
     pub const fn datamask(&self) -> &Datamask {
-        unsafe { &*(self as *const Self).cast::<u8>().add(28).cast() }
+        unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(28).cast() }
     }
     #[doc = "0x20 - Direction Register by Byte"]
     #[inline(always)]
     pub const fn dirbyte0(&self, n: usize) -> &Dirbyte {
         #[allow(clippy::no_effect)]
         [(); 4][n];
-        unsafe { &*(self as *const Self).cast::<u8>().add(32).add(1 * n).cast() }
+        unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(32).add(n).cast() }
     }
     #[doc = "Iterator for array of:"]
     #[doc = "0x20 - Direction Register by Byte"]
     #[inline(always)]
     pub fn dirbyte0_iter(&self) -> impl Iterator<Item = &Dirbyte> {
         (0..4)
-            .map(move |n| unsafe { &*(self as *const Self).cast::<u8>().add(32).add(1 * n).cast() })
+            .map(move |n| unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(32).add(n).cast() })
     }
     #[doc = "0x20 - Direction Register (1:Output, 0:Input)"]
     #[inline(always)]
     pub const fn dir(&self) -> &Dir {
-        unsafe { &*(self as *const Self).cast::<u8>().add(32).cast() }
+        unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(32).cast() }
     }
     #[doc = "0x24 - Pulse Mode Register by Byte"]
     #[inline(always)]
     pub const fn pulsebyte0(&self, n: usize) -> &Pulsebyte {
         #[allow(clippy::no_effect)]
         [(); 4][n];
-        unsafe { &*(self as *const Self).cast::<u8>().add(36).add(1 * n).cast() }
+        unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(36).add(n).cast() }
     }
     #[doc = "Iterator for array of:"]
     #[doc = "0x24 - Pulse Mode Register by Byte"]
     #[inline(always)]
     pub fn pulsebyte0_iter(&self) -> impl Iterator<Item = &Pulsebyte> {
         (0..4)
-            .map(move |n| unsafe { &*(self as *const Self).cast::<u8>().add(36).add(1 * n).cast() })
+            .map(move |n| unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(36).add(n).cast() })
     }
     #[doc = "0x24 - Pulse Mode Register"]
     #[inline(always)]
     pub const fn pulse(&self) -> &Pulse {
-        unsafe { &*(self as *const Self).cast::<u8>().add(36).cast() }
+        unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(36).cast() }
     }
     #[doc = "0x28 - Pulse Base Mode Register by Byte"]
     #[inline(always)]
     pub const fn pulsebasebyte0(&self, n: usize) -> &Pulsebasebyte {
         #[allow(clippy::no_effect)]
         [(); 4][n];
-        unsafe { &*(self as *const Self).cast::<u8>().add(40).add(1 * n).cast() }
+        unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(40).add(n).cast() }
     }
     #[doc = "Iterator for array of:"]
     #[doc = "0x28 - Pulse Base Mode Register by Byte"]
     #[inline(always)]
     pub fn pulsebasebyte0_iter(&self) -> impl Iterator<Item = &Pulsebasebyte> {
         (0..4)
-            .map(move |n| unsafe { &*(self as *const Self).cast::<u8>().add(40).add(1 * n).cast() })
+            .map(move |n| unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(40).add(n).cast() })
     }
     #[doc = "0x28 - Pulse Base Value Register"]
     #[inline(always)]
     pub const fn pulsebase(&self) -> &Pulsebase {
-        unsafe { &*(self as *const Self).cast::<u8>().add(40).cast() }
+        unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(40).cast() }
     }
     #[doc = "0x2c - Delay1 Register by Byte"]
     #[inline(always)]
     pub const fn delay1byte0(&self, n: usize) -> &Delay1byte {
         #[allow(clippy::no_effect)]
         [(); 4][n];
-        unsafe { &*(self as *const Self).cast::<u8>().add(44).add(1 * n).cast() }
+        unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(44).add(n).cast() }
     }
     #[doc = "Iterator for array of:"]
     #[doc = "0x2c - Delay1 Register by Byte"]
     #[inline(always)]
     pub fn delay1byte0_iter(&self) -> impl Iterator<Item = &Delay1byte> {
         (0..4)
-            .map(move |n| unsafe { &*(self as *const Self).cast::<u8>().add(44).add(1 * n).cast() })
+            .map(move |n| unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(44).add(n).cast() })
     }
     #[doc = "0x2c - Delay1 Register"]
     #[inline(always)]
     pub const fn delay1(&self) -> &Delay1 {
-        unsafe { &*(self as *const Self).cast::<u8>().add(44).cast() }
+        unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(44).cast() }
     }
     #[doc = "0x30 - Delay2 Register by Byte"]
     #[inline(always)]
     pub const fn delay2byte0(&self, n: usize) -> &Delay2byte {
         #[allow(clippy::no_effect)]
         [(); 4][n];
-        unsafe { &*(self as *const Self).cast::<u8>().add(48).add(1 * n).cast() }
+        unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(48).add(n).cast() }
     }
     #[doc = "Iterator for array of:"]
     #[doc = "0x30 - Delay2 Register by Byte"]
     #[inline(always)]
     pub fn delay2byte0_iter(&self) -> impl Iterator<Item = &Delay2byte> {
         (0..4)
-            .map(move |n| unsafe { &*(self as *const Self).cast::<u8>().add(48).add(1 * n).cast() })
+            .map(move |n| unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(48).add(n).cast() })
     }
     #[doc = "0x30 - Delay2 Register"]
     #[inline(always)]
     pub const fn delay2(&self) -> &Delay2 {
-        unsafe { &*(self as *const Self).cast::<u8>().add(48).cast() }
+        unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(48).cast() }
     }
     #[doc = "0x34 - Interrupt Sense Register (1:Level Sensitive, 0:Edge Sensitive)"]
     #[inline(always)]
@@ -316,13 +312,13 @@ impl RegisterBlock {
         &self.perid
     }
 }
-#[doc = "DATAIN (r) register accessor: Data In Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`datain::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@datain`]
+#[doc = "DATAIN (r) register accessor: Data In Register\n\nYou can [`read`](crate::Reg::read) this register and get [`datain::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@datain`]
 module"]
 #[doc(alias = "DATAIN")]
 pub type Datain = crate::Reg<datain::DatainSpec>;
 #[doc = "Data In Register"]
 pub mod datain;
-#[doc = "DATAINBYTE (r) register accessor: Data In Register by Byte\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`datainbyte::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@datainbyte`]
+#[doc = "DATAINBYTE (r) register accessor: Data In Register by Byte\n\nYou can [`read`](crate::Reg::read) this register and get [`datainbyte::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@datainbyte`]
 module"]
 #[doc(alias = "DATAINBYTE")]
 pub type Datainbyte = crate::Reg<datainbyte::DatainbyteSpec>;
@@ -332,13 +328,13 @@ pub use datain as datainraw;
 pub use datainbyte as datainrawbyte;
 pub use Datain as Datainraw;
 pub use Datainbyte as Datainrawbyte;
-#[doc = "DATAOUT (w) register accessor: Data Out Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dataout::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dataout`]
+#[doc = "DATAOUT (w) register accessor: Data Out Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dataout::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dataout`]
 module"]
 #[doc(alias = "DATAOUT")]
 pub type Dataout = crate::Reg<dataout::DataoutSpec>;
 #[doc = "Data Out Register"]
 pub mod dataout;
-#[doc = "DATAOUTBYTE (w) register accessor: Data Out Register by Byte\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dataoutbyte::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dataoutbyte`]
+#[doc = "DATAOUTBYTE (w) register accessor: Data Out Register by Byte\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dataoutbyte::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dataoutbyte`]
 module"]
 #[doc(alias = "DATAOUTBYTE")]
 pub type Dataoutbyte = crate::Reg<dataoutbyte::DataoutbyteSpec>;
@@ -360,13 +356,13 @@ pub use Dataoutbyte as Dataoutrawbyte;
 pub use Dataoutbyte as Setoutbyte;
 pub use Dataoutbyte as Clroutbyte;
 pub use Dataoutbyte as Togoutbyte;
-#[doc = "DATAMASK (rw) register accessor: Data mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`datamask::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`datamask::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@datamask`]
+#[doc = "DATAMASK (rw) register accessor: Data mask Register\n\nYou can [`read`](crate::Reg::read) this register and get [`datamask::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`datamask::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@datamask`]
 module"]
 #[doc(alias = "DATAMASK")]
 pub type Datamask = crate::Reg<datamask::DatamaskSpec>;
 #[doc = "Data mask Register"]
 pub mod datamask;
-#[doc = "DATAMASKBYTE (rw) register accessor: Data Out Register by Byte\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`datamaskbyte::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`datamaskbyte::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@datamaskbyte`]
+#[doc = "DATAMASKBYTE (rw) register accessor: Data Out Register by Byte\n\nYou can [`read`](crate::Reg::read) this register and get [`datamaskbyte::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`datamaskbyte::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@datamaskbyte`]
 module"]
 #[doc(alias = "DATAMASKBYTE")]
 pub type Datamaskbyte = crate::Reg<datamaskbyte::DatamaskbyteSpec>;
@@ -392,49 +388,49 @@ pub use Datamaskbyte as Pulsebyte;
 pub use Datamaskbyte as Pulsebasebyte;
 pub use Datamaskbyte as Delay1byte;
 pub use Datamaskbyte as Delay2byte;
-#[doc = "IRQ_SEN (rw) register accessor: Interrupt Sense Register (1:Level Sensitive, 0:Edge Sensitive)\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_sen::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`irq_sen::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_sen`]
+#[doc = "IRQ_SEN (rw) register accessor: Interrupt Sense Register (1:Level Sensitive, 0:Edge Sensitive)\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_sen::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`irq_sen::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_sen`]
 module"]
 #[doc(alias = "IRQ_SEN")]
 pub type IrqSen = crate::Reg<irq_sen::IrqSenSpec>;
 #[doc = "Interrupt Sense Register (1:Level Sensitive, 0:Edge Sensitive)"]
 pub mod irq_sen;
-#[doc = "IRQ_EDGE (rw) register accessor: Interrupt Both Edge Register (1:Both Edges, 0:Single Edge)\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_edge::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`irq_edge::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_edge`]
+#[doc = "IRQ_EDGE (rw) register accessor: Interrupt Both Edge Register (1:Both Edges, 0:Single Edge)\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_edge::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`irq_edge::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_edge`]
 module"]
 #[doc(alias = "IRQ_EDGE")]
 pub type IrqEdge = crate::Reg<irq_edge::IrqEdgeSpec>;
 #[doc = "Interrupt Both Edge Register (1:Both Edges, 0:Single Edge)"]
 pub mod irq_edge;
-#[doc = "IRQ_EVT (rw) register accessor: Interrupt Event Register (1:HighLevel/L->H Edge, 0:LowLevel/H->L Edge)\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_evt::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`irq_evt::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_evt`]
+#[doc = "IRQ_EVT (rw) register accessor: Interrupt Event Register (1:HighLevel/L->H Edge, 0:LowLevel/H->L Edge)\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_evt::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`irq_evt::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_evt`]
 module"]
 #[doc(alias = "IRQ_EVT")]
 pub type IrqEvt = crate::Reg<irq_evt::IrqEvtSpec>;
 #[doc = "Interrupt Event Register (1:HighLevel/L->H Edge, 0:LowLevel/H->L Edge)"]
 pub mod irq_evt;
-#[doc = "IRQ_ENB (rw) register accessor: Interrupt Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_enb::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`irq_enb::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_enb`]
+#[doc = "IRQ_ENB (rw) register accessor: Interrupt Enable Register\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_enb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`irq_enb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_enb`]
 module"]
 #[doc(alias = "IRQ_ENB")]
 pub type IrqEnb = crate::Reg<irq_enb::IrqEnbSpec>;
 #[doc = "Interrupt Enable Register"]
 pub mod irq_enb;
-#[doc = "IRQ_RAW (r) register accessor: Raw Interrupt Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_raw::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_raw`]
+#[doc = "IRQ_RAW (r) register accessor: Raw Interrupt Status\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_raw::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_raw`]
 module"]
 #[doc(alias = "IRQ_RAW")]
 pub type IrqRaw = crate::Reg<irq_raw::IrqRawSpec>;
 #[doc = "Raw Interrupt Status"]
 pub mod irq_raw;
-#[doc = "IRQ_END (r) register accessor: Masked Interrupt Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_end::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_end`]
+#[doc = "IRQ_END (r) register accessor: Masked Interrupt Status\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_end::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_end`]
 module"]
 #[doc(alias = "IRQ_END")]
 pub type IrqEnd = crate::Reg<irq_end::IrqEndSpec>;
 #[doc = "Masked Interrupt Status"]
 pub mod irq_end;
-#[doc = "EDGE_STATUS (rw) register accessor: Edge Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`edge_status::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`edge_status::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@edge_status`]
+#[doc = "EDGE_STATUS (rw) register accessor: Edge Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`edge_status::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`edge_status::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@edge_status`]
 module"]
 #[doc(alias = "EDGE_STATUS")]
 pub type EdgeStatus = crate::Reg<edge_status::EdgeStatusSpec>;
 #[doc = "Edge Status Register"]
 pub mod edge_status;
-#[doc = "PERID (r) register accessor: Peripheral ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`perid::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@perid`]
+#[doc = "PERID (r) register accessor: Peripheral ID Register\n\nYou can [`read`](crate::Reg::read) this register and get [`perid::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@perid`]
 module"]
 #[doc(alias = "PERID")]
 pub type Perid = crate::Reg<perid::PeridSpec>;
diff --git a/va416xx/src/porta/datain.rs b/va416xx/src/porta/datain.rs
index 5f6a720..10c0f7c 100644
--- a/va416xx/src/porta/datain.rs
+++ b/va416xx/src/porta/datain.rs
@@ -5,7 +5,7 @@ impl core::fmt::Debug for R {
         write!(f, "{}", self.bits())
     }
 }
-#[doc = "Data In Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`datain::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Data In Register\n\nYou can [`read`](crate::Reg::read) this register and get [`datain::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct DatainSpec;
 impl crate::RegisterSpec for DatainSpec {
     type Ux = u32;
diff --git a/va416xx/src/porta/datainbyte.rs b/va416xx/src/porta/datainbyte.rs
index 06d7f67..975ec65 100644
--- a/va416xx/src/porta/datainbyte.rs
+++ b/va416xx/src/porta/datainbyte.rs
@@ -5,7 +5,7 @@ impl core::fmt::Debug for R {
         write!(f, "{}", self.bits())
     }
 }
-#[doc = "Data In Register by Byte\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`datainbyte::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Data In Register by Byte\n\nYou can [`read`](crate::Reg::read) this register and get [`datainbyte::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct DatainbyteSpec;
 impl crate::RegisterSpec for DatainbyteSpec {
     type Ux = u8;
diff --git a/va416xx/src/porta/datamask.rs b/va416xx/src/porta/datamask.rs
index 6df9aac..5185323 100644
--- a/va416xx/src/porta/datamask.rs
+++ b/va416xx/src/porta/datamask.rs
@@ -8,7 +8,7 @@ impl core::fmt::Debug for R {
     }
 }
 impl W {}
-#[doc = "Data mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`datamask::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`datamask::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Data mask Register\n\nYou can [`read`](crate::Reg::read) this register and get [`datamask::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`datamask::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct DatamaskSpec;
 impl crate::RegisterSpec for DatamaskSpec {
     type Ux = u32;
diff --git a/va416xx/src/porta/datamaskbyte.rs b/va416xx/src/porta/datamaskbyte.rs
index 29ecd88..5ac5d4c 100644
--- a/va416xx/src/porta/datamaskbyte.rs
+++ b/va416xx/src/porta/datamaskbyte.rs
@@ -8,7 +8,7 @@ impl core::fmt::Debug for R {
     }
 }
 impl W {}
-#[doc = "Data Out Register by Byte\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`datamaskbyte::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`datamaskbyte::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Data Out Register by Byte\n\nYou can [`read`](crate::Reg::read) this register and get [`datamaskbyte::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`datamaskbyte::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct DatamaskbyteSpec;
 impl crate::RegisterSpec for DatamaskbyteSpec {
     type Ux = u8;
diff --git a/va416xx/src/porta/dataout.rs b/va416xx/src/porta/dataout.rs
index 6250016..f36ae05 100644
--- a/va416xx/src/porta/dataout.rs
+++ b/va416xx/src/porta/dataout.rs
@@ -6,7 +6,7 @@ impl core::fmt::Debug for crate::generic::Reg<DataoutSpec> {
     }
 }
 impl W {}
-#[doc = "Data Out Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dataout::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Data Out Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dataout::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct DataoutSpec;
 impl crate::RegisterSpec for DataoutSpec {
     type Ux = u32;
diff --git a/va416xx/src/porta/dataoutbyte.rs b/va416xx/src/porta/dataoutbyte.rs
index a712f13..3344ad6 100644
--- a/va416xx/src/porta/dataoutbyte.rs
+++ b/va416xx/src/porta/dataoutbyte.rs
@@ -6,7 +6,7 @@ impl core::fmt::Debug for crate::generic::Reg<DataoutbyteSpec> {
     }
 }
 impl W {}
-#[doc = "Data Out Register by Byte\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dataoutbyte::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Data Out Register by Byte\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dataoutbyte::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct DataoutbyteSpec;
 impl crate::RegisterSpec for DataoutbyteSpec {
     type Ux = u8;
diff --git a/va416xx/src/porta/edge_status.rs b/va416xx/src/porta/edge_status.rs
index 0a90d70..2c33d2a 100644
--- a/va416xx/src/porta/edge_status.rs
+++ b/va416xx/src/porta/edge_status.rs
@@ -8,7 +8,7 @@ impl core::fmt::Debug for R {
     }
 }
 impl W {}
-#[doc = "Edge Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`edge_status::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`edge_status::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Edge Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`edge_status::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`edge_status::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct EdgeStatusSpec;
 impl crate::RegisterSpec for EdgeStatusSpec {
     type Ux = u32;
diff --git a/va416xx/src/porta/irq_edge.rs b/va416xx/src/porta/irq_edge.rs
index fddfc1c..1f24586 100644
--- a/va416xx/src/porta/irq_edge.rs
+++ b/va416xx/src/porta/irq_edge.rs
@@ -8,7 +8,7 @@ impl core::fmt::Debug for R {
     }
 }
 impl W {}
-#[doc = "Interrupt Both Edge Register (1:Both Edges, 0:Single Edge)\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_edge::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`irq_edge::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Interrupt Both Edge Register (1:Both Edges, 0:Single Edge)\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_edge::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`irq_edge::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct IrqEdgeSpec;
 impl crate::RegisterSpec for IrqEdgeSpec {
     type Ux = u32;
diff --git a/va416xx/src/porta/irq_enb.rs b/va416xx/src/porta/irq_enb.rs
index 2696b81..3f1c60e 100644
--- a/va416xx/src/porta/irq_enb.rs
+++ b/va416xx/src/porta/irq_enb.rs
@@ -8,7 +8,7 @@ impl core::fmt::Debug for R {
     }
 }
 impl W {}
-#[doc = "Interrupt Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_enb::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`irq_enb::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Interrupt Enable Register\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_enb::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`irq_enb::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct IrqEnbSpec;
 impl crate::RegisterSpec for IrqEnbSpec {
     type Ux = u32;
diff --git a/va416xx/src/porta/irq_end.rs b/va416xx/src/porta/irq_end.rs
index cf88a8a..9cc9e4e 100644
--- a/va416xx/src/porta/irq_end.rs
+++ b/va416xx/src/porta/irq_end.rs
@@ -5,7 +5,7 @@ impl core::fmt::Debug for R {
         write!(f, "{}", self.bits())
     }
 }
-#[doc = "Masked Interrupt Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_end::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Masked Interrupt Status\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_end::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct IrqEndSpec;
 impl crate::RegisterSpec for IrqEndSpec {
     type Ux = u32;
diff --git a/va416xx/src/porta/irq_evt.rs b/va416xx/src/porta/irq_evt.rs
index 1e98fa4..f23485c 100644
--- a/va416xx/src/porta/irq_evt.rs
+++ b/va416xx/src/porta/irq_evt.rs
@@ -8,7 +8,7 @@ impl core::fmt::Debug for R {
     }
 }
 impl W {}
-#[doc = "Interrupt Event Register (1:HighLevel/L->H Edge, 0:LowLevel/H->L Edge)\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_evt::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`irq_evt::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Interrupt Event Register (1:HighLevel/L->H Edge, 0:LowLevel/H->L Edge)\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_evt::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`irq_evt::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct IrqEvtSpec;
 impl crate::RegisterSpec for IrqEvtSpec {
     type Ux = u32;
diff --git a/va416xx/src/porta/irq_raw.rs b/va416xx/src/porta/irq_raw.rs
index 0e153ef..d30086c 100644
--- a/va416xx/src/porta/irq_raw.rs
+++ b/va416xx/src/porta/irq_raw.rs
@@ -5,7 +5,7 @@ impl core::fmt::Debug for R {
         write!(f, "{}", self.bits())
     }
 }
-#[doc = "Raw Interrupt Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_raw::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Raw Interrupt Status\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_raw::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct IrqRawSpec;
 impl crate::RegisterSpec for IrqRawSpec {
     type Ux = u32;
diff --git a/va416xx/src/porta/irq_sen.rs b/va416xx/src/porta/irq_sen.rs
index 5b4c44a..70346cc 100644
--- a/va416xx/src/porta/irq_sen.rs
+++ b/va416xx/src/porta/irq_sen.rs
@@ -8,7 +8,7 @@ impl core::fmt::Debug for R {
     }
 }
 impl W {}
-#[doc = "Interrupt Sense Register (1:Level Sensitive, 0:Edge Sensitive)\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_sen::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`irq_sen::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Interrupt Sense Register (1:Level Sensitive, 0:Edge Sensitive)\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_sen::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`irq_sen::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct IrqSenSpec;
 impl crate::RegisterSpec for IrqSenSpec {
     type Ux = u32;
diff --git a/va416xx/src/porta/perid.rs b/va416xx/src/porta/perid.rs
index a5e57df..02cb718 100644
--- a/va416xx/src/porta/perid.rs
+++ b/va416xx/src/porta/perid.rs
@@ -5,7 +5,7 @@ impl core::fmt::Debug for R {
         write!(f, "{}", self.bits())
     }
 }
-#[doc = "Peripheral ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`perid::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Peripheral ID Register\n\nYou can [`read`](crate::Reg::read) this register and get [`perid::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct PeridSpec;
 impl crate::RegisterSpec for PeridSpec {
     type Ux = u32;
diff --git a/va416xx/src/spi0.rs b/va416xx/src/spi0.rs
index e8f0c47..5cb5dde 100644
--- a/va416xx/src/spi0.rs
+++ b/va416xx/src/spi0.rs
@@ -89,37 +89,37 @@ impl RegisterBlock {
         &self.perid
     }
 }
-#[doc = "CTRL0 (rw) register accessor: Control Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctrl0::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctrl0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl0`]
+#[doc = "CTRL0 (rw) register accessor: Control Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl0`]
 module"]
 #[doc(alias = "CTRL0")]
 pub type Ctrl0 = crate::Reg<ctrl0::Ctrl0Spec>;
 #[doc = "Control Register 0"]
 pub mod ctrl0;
-#[doc = "CTRL1 (rw) register accessor: Control Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctrl1::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctrl1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl1`]
+#[doc = "CTRL1 (rw) register accessor: Control Register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl1`]
 module"]
 #[doc(alias = "CTRL1")]
 pub type Ctrl1 = crate::Reg<ctrl1::Ctrl1Spec>;
 #[doc = "Control Register 1"]
 pub mod ctrl1;
-#[doc = "DATA (rw) register accessor: Data Input/Output\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data`]
+#[doc = "DATA (rw) register accessor: Data Input/Output\n\nYou can [`read`](crate::Reg::read) this register and get [`data::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data`]
 module"]
 #[doc(alias = "DATA")]
 pub type Data = crate::Reg<data::DataSpec>;
 #[doc = "Data Input/Output"]
 pub mod data;
-#[doc = "STATUS (r) register accessor: Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`status::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`]
+#[doc = "STATUS (r) register accessor: Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`]
 module"]
 #[doc(alias = "STATUS")]
 pub type Status = crate::Reg<status::StatusSpec>;
 #[doc = "Status Register"]
 pub mod status;
-#[doc = "CLKPRESCALE (rw) register accessor: Clock Pre Scale divide value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clkprescale::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clkprescale::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkprescale`]
+#[doc = "CLKPRESCALE (rw) register accessor: Clock Pre Scale divide value\n\nYou can [`read`](crate::Reg::read) this register and get [`clkprescale::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkprescale::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkprescale`]
 module"]
 #[doc(alias = "CLKPRESCALE")]
 pub type Clkprescale = crate::Reg<clkprescale::ClkprescaleSpec>;
 #[doc = "Clock Pre Scale divide value"]
 pub mod clkprescale;
-#[doc = "IRQ_ENB (rw) register accessor: Interrupt Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_enb::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`irq_enb::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_enb`]
+#[doc = "IRQ_ENB (rw) register accessor: Interrupt Enable Register\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_enb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`irq_enb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_enb`]
 module"]
 #[doc(alias = "IRQ_ENB")]
 pub type IrqEnb = crate::Reg<irq_enb::IrqEnbSpec>;
@@ -131,31 +131,31 @@ pub use irq_enb as irq_clr;
 pub use IrqEnb as IrqRaw;
 pub use IrqEnb as IrqEnd;
 pub use IrqEnb as IrqClr;
-#[doc = "RXFIFOIRQTRG (rw) register accessor: Rx FIFO IRQ Trigger Level\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxfifoirqtrg::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rxfifoirqtrg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxfifoirqtrg`]
+#[doc = "RXFIFOIRQTRG (rw) register accessor: Rx FIFO IRQ Trigger Level\n\nYou can [`read`](crate::Reg::read) this register and get [`rxfifoirqtrg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rxfifoirqtrg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxfifoirqtrg`]
 module"]
 #[doc(alias = "RXFIFOIRQTRG")]
 pub type Rxfifoirqtrg = crate::Reg<rxfifoirqtrg::RxfifoirqtrgSpec>;
 #[doc = "Rx FIFO IRQ Trigger Level"]
 pub mod rxfifoirqtrg;
-#[doc = "TXFIFOIRQTRG (rw) register accessor: Tx FIFO IRQ Trigger Level\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txfifoirqtrg::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`txfifoirqtrg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txfifoirqtrg`]
+#[doc = "TXFIFOIRQTRG (rw) register accessor: Tx FIFO IRQ Trigger Level\n\nYou can [`read`](crate::Reg::read) this register and get [`txfifoirqtrg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`txfifoirqtrg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txfifoirqtrg`]
 module"]
 #[doc(alias = "TXFIFOIRQTRG")]
 pub type Txfifoirqtrg = crate::Reg<txfifoirqtrg::TxfifoirqtrgSpec>;
 #[doc = "Tx FIFO IRQ Trigger Level"]
 pub mod txfifoirqtrg;
-#[doc = "FIFO_CLR (w) register accessor: Clear FIFO Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fifo_clr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fifo_clr`]
+#[doc = "FIFO_CLR (w) register accessor: Clear FIFO Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fifo_clr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fifo_clr`]
 module"]
 #[doc(alias = "FIFO_CLR")]
 pub type FifoClr = crate::Reg<fifo_clr::FifoClrSpec>;
 #[doc = "Clear FIFO Register"]
 pub mod fifo_clr;
-#[doc = "STATE (r) register accessor: Internal STATE of SPI Controller\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`state::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@state`]
+#[doc = "STATE (r) register accessor: Internal STATE of SPI Controller\n\nYou can [`read`](crate::Reg::read) this register and get [`state::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@state`]
 module"]
 #[doc(alias = "STATE")]
 pub type State = crate::Reg<state::StateSpec>;
 #[doc = "Internal STATE of SPI Controller"]
 pub mod state;
-#[doc = "PERID (r) register accessor: Peripheral ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`perid::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@perid`]
+#[doc = "PERID (r) register accessor: Peripheral ID Register\n\nYou can [`read`](crate::Reg::read) this register and get [`perid::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@perid`]
 module"]
 #[doc(alias = "PERID")]
 pub type Perid = crate::Reg<perid::PeridSpec>;
diff --git a/va416xx/src/spi0/clkprescale.rs b/va416xx/src/spi0/clkprescale.rs
index ea5249f..bcf8350 100644
--- a/va416xx/src/spi0/clkprescale.rs
+++ b/va416xx/src/spi0/clkprescale.rs
@@ -8,7 +8,7 @@ impl core::fmt::Debug for R {
     }
 }
 impl W {}
-#[doc = "Clock Pre Scale divide value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clkprescale::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clkprescale::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Clock Pre Scale divide value\n\nYou can [`read`](crate::Reg::read) this register and get [`clkprescale::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkprescale::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct ClkprescaleSpec;
 impl crate::RegisterSpec for ClkprescaleSpec {
     type Ux = u32;
diff --git a/va416xx/src/spi0/ctrl0.rs b/va416xx/src/spi0/ctrl0.rs
index 4e41012..a596dfe 100644
--- a/va416xx/src/spi0/ctrl0.rs
+++ b/va416xx/src/spi0/ctrl0.rs
@@ -43,30 +43,26 @@ impl R {
 impl W {
     #[doc = "Bits 0:3 - Data Size(0x3=>4, 0xf=>16)"]
     #[inline(always)]
-    #[must_use]
     pub fn size(&mut self) -> SizeW<Ctrl0Spec> {
         SizeW::new(self, 0)
     }
     #[doc = "Bit 6 - SPI Clock Polarity"]
     #[inline(always)]
-    #[must_use]
     pub fn spo(&mut self) -> SpoW<Ctrl0Spec> {
         SpoW::new(self, 6)
     }
     #[doc = "Bit 7 - SPI Clock Phase"]
     #[inline(always)]
-    #[must_use]
     pub fn sph(&mut self) -> SphW<Ctrl0Spec> {
         SphW::new(self, 7)
     }
     #[doc = "Bits 8:15 - Serial Clock Rate divide+1 value"]
     #[inline(always)]
-    #[must_use]
     pub fn scrdv(&mut self) -> ScrdvW<Ctrl0Spec> {
         ScrdvW::new(self, 8)
     }
 }
-#[doc = "Control Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctrl0::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctrl0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Control Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Ctrl0Spec;
 impl crate::RegisterSpec for Ctrl0Spec {
     type Ux = u32;
diff --git a/va416xx/src/spi0/ctrl1.rs b/va416xx/src/spi0/ctrl1.rs
index 45d9ec8..461ed99 100644
--- a/va416xx/src/spi0/ctrl1.rs
+++ b/va416xx/src/spi0/ctrl1.rs
@@ -97,66 +97,56 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Loop Back"]
     #[inline(always)]
-    #[must_use]
     pub fn lbm(&mut self) -> LbmW<Ctrl1Spec> {
         LbmW::new(self, 0)
     }
     #[doc = "Bit 1 - Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn enable(&mut self) -> EnableW<Ctrl1Spec> {
         EnableW::new(self, 1)
     }
     #[doc = "Bit 2 - Master/Slave (0:Master, 1:Slave)"]
     #[inline(always)]
-    #[must_use]
     pub fn ms(&mut self) -> MsW<Ctrl1Spec> {
         MsW::new(self, 2)
     }
     #[doc = "Bit 3 - Slave output Disable"]
     #[inline(always)]
-    #[must_use]
     pub fn sod(&mut self) -> SodW<Ctrl1Spec> {
         SodW::new(self, 3)
     }
     #[doc = "Bits 4:6 - Slave Select"]
     #[inline(always)]
-    #[must_use]
     pub fn ss(&mut self) -> SsW<Ctrl1Spec> {
         SsW::new(self, 4)
     }
     #[doc = "Bit 7 - Block Mode Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn blockmode(&mut self) -> BlockmodeW<Ctrl1Spec> {
         BlockmodeW::new(self, 7)
     }
     #[doc = "Bit 8 - Block Mode Start Status Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn bmstart(&mut self) -> BmstartW<Ctrl1Spec> {
         BmstartW::new(self, 8)
     }
     #[doc = "Bit 9 - Block Mode Stall Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn bmstall(&mut self) -> BmstallW<Ctrl1Spec> {
         BmstallW::new(self, 9)
     }
     #[doc = "Bit 10 - Master Delayed Capture Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn mdlycap(&mut self) -> MdlycapW<Ctrl1Spec> {
         MdlycapW::new(self, 10)
     }
     #[doc = "Bit 11 - Master Tx Pause Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn mtxpause(&mut self) -> MtxpauseW<Ctrl1Spec> {
         MtxpauseW::new(self, 11)
     }
 }
-#[doc = "Control Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctrl1::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctrl1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Control Register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Ctrl1Spec;
 impl crate::RegisterSpec for Ctrl1Spec {
     type Ux = u32;
diff --git a/va416xx/src/spi0/data.rs b/va416xx/src/spi0/data.rs
index 30b85c9..b981752 100644
--- a/va416xx/src/spi0/data.rs
+++ b/va416xx/src/spi0/data.rs
@@ -8,7 +8,7 @@ impl core::fmt::Debug for R {
     }
 }
 impl W {}
-#[doc = "Data Input/Output\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Data Input/Output\n\nYou can [`read`](crate::Reg::read) this register and get [`data::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct DataSpec;
 impl crate::RegisterSpec for DataSpec {
     type Ux = u32;
diff --git a/va416xx/src/spi0/fifo_clr.rs b/va416xx/src/spi0/fifo_clr.rs
index 156da87..af272ab 100644
--- a/va416xx/src/spi0/fifo_clr.rs
+++ b/va416xx/src/spi0/fifo_clr.rs
@@ -7,18 +7,16 @@ pub type TxfifoW<'a, REG> = crate::BitWriter<'a, REG>;
 impl W {
     #[doc = "Bit 0 - Clear Rx FIFO"]
     #[inline(always)]
-    #[must_use]
     pub fn rxfifo(&mut self) -> RxfifoW<FifoClrSpec> {
         RxfifoW::new(self, 0)
     }
     #[doc = "Bit 1 - Clear Tx FIFO"]
     #[inline(always)]
-    #[must_use]
     pub fn txfifo(&mut self) -> TxfifoW<FifoClrSpec> {
         TxfifoW::new(self, 1)
     }
 }
-#[doc = "Clear FIFO Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fifo_clr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Clear FIFO Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fifo_clr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct FifoClrSpec;
 impl crate::RegisterSpec for FifoClrSpec {
     type Ux = u32;
diff --git a/va416xx/src/spi0/irq_enb.rs b/va416xx/src/spi0/irq_enb.rs
index 68d93bc..d2af91a 100644
--- a/va416xx/src/spi0/irq_enb.rs
+++ b/va416xx/src/spi0/irq_enb.rs
@@ -43,30 +43,26 @@ impl R {
 impl W {
     #[doc = "Bit 0 - RX Overrun"]
     #[inline(always)]
-    #[must_use]
     pub fn rorim(&mut self) -> RorimW<IrqEnbSpec> {
         RorimW::new(self, 0)
     }
     #[doc = "Bit 1 - RX Timeout"]
     #[inline(always)]
-    #[must_use]
     pub fn rtim(&mut self) -> RtimW<IrqEnbSpec> {
         RtimW::new(self, 1)
     }
     #[doc = "Bit 2 - RX Fifo is at least half full"]
     #[inline(always)]
-    #[must_use]
     pub fn rxim(&mut self) -> RximW<IrqEnbSpec> {
         RximW::new(self, 2)
     }
     #[doc = "Bit 3 - TX Fifo is at least half empty"]
     #[inline(always)]
-    #[must_use]
     pub fn txim(&mut self) -> TximW<IrqEnbSpec> {
         TximW::new(self, 3)
     }
 }
-#[doc = "Interrupt Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_enb::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`irq_enb::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Interrupt Enable Register\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_enb::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`irq_enb::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct IrqEnbSpec;
 impl crate::RegisterSpec for IrqEnbSpec {
     type Ux = u32;
diff --git a/va416xx/src/spi0/perid.rs b/va416xx/src/spi0/perid.rs
index 9d82261..dd964dd 100644
--- a/va416xx/src/spi0/perid.rs
+++ b/va416xx/src/spi0/perid.rs
@@ -5,7 +5,7 @@ impl core::fmt::Debug for R {
         write!(f, "{}", self.bits())
     }
 }
-#[doc = "Peripheral ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`perid::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Peripheral ID Register\n\nYou can [`read`](crate::Reg::read) this register and get [`perid::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct PeridSpec;
 impl crate::RegisterSpec for PeridSpec {
     type Ux = u32;
diff --git a/va416xx/src/spi0/rxfifoirqtrg.rs b/va416xx/src/spi0/rxfifoirqtrg.rs
index 46124d5..8376847 100644
--- a/va416xx/src/spi0/rxfifoirqtrg.rs
+++ b/va416xx/src/spi0/rxfifoirqtrg.rs
@@ -8,7 +8,7 @@ impl core::fmt::Debug for R {
     }
 }
 impl W {}
-#[doc = "Rx FIFO IRQ Trigger Level\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxfifoirqtrg::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rxfifoirqtrg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Rx FIFO IRQ Trigger Level\n\nYou can [`read`](crate::Reg::read) this register and get [`rxfifoirqtrg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rxfifoirqtrg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct RxfifoirqtrgSpec;
 impl crate::RegisterSpec for RxfifoirqtrgSpec {
     type Ux = u32;
diff --git a/va416xx/src/spi0/state.rs b/va416xx/src/spi0/state.rs
index aaa69d0..96de72f 100644
--- a/va416xx/src/spi0/state.rs
+++ b/va416xx/src/spi0/state.rs
@@ -5,7 +5,7 @@ impl core::fmt::Debug for R {
         write!(f, "{}", self.bits())
     }
 }
-#[doc = "Internal STATE of SPI Controller\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`state::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Internal STATE of SPI Controller\n\nYou can [`read`](crate::Reg::read) this register and get [`state::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct StateSpec;
 impl crate::RegisterSpec for StateSpec {
     type Ux = u32;
diff --git a/va416xx/src/spi0/status.rs b/va416xx/src/spi0/status.rs
index d076d06..1bb2587 100644
--- a/va416xx/src/spi0/status.rs
+++ b/va416xx/src/spi0/status.rs
@@ -58,7 +58,7 @@ impl R {
         TxtriggerR::new(((self.bits >> 7) & 1) != 0)
     }
 }
-#[doc = "Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`status::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct StatusSpec;
 impl crate::RegisterSpec for StatusSpec {
     type Ux = u32;
diff --git a/va416xx/src/spi0/txfifoirqtrg.rs b/va416xx/src/spi0/txfifoirqtrg.rs
index 0d13e54..8d0ae92 100644
--- a/va416xx/src/spi0/txfifoirqtrg.rs
+++ b/va416xx/src/spi0/txfifoirqtrg.rs
@@ -8,7 +8,7 @@ impl core::fmt::Debug for R {
     }
 }
 impl W {}
-#[doc = "Tx FIFO IRQ Trigger Level\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txfifoirqtrg::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`txfifoirqtrg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Tx FIFO IRQ Trigger Level\n\nYou can [`read`](crate::Reg::read) this register and get [`txfifoirqtrg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`txfifoirqtrg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct TxfifoirqtrgSpec;
 impl crate::RegisterSpec for TxfifoirqtrgSpec {
     type Ux = u32;
diff --git a/va416xx/src/spw.rs b/va416xx/src/spw.rs
index 5e89f66..f7304e2 100644
--- a/va416xx/src/spw.rs
+++ b/va416xx/src/spw.rs
@@ -77,73 +77,73 @@ impl RegisterBlock {
         &self.dmaaddr0
     }
 }
-#[doc = "CTRL (rw) register accessor: Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctrl::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`]
+#[doc = "CTRL (rw) register accessor: Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`]
 module"]
 #[doc(alias = "CTRL")]
 pub type Ctrl = crate::Reg<ctrl::CtrlSpec>;
 #[doc = "Control Register"]
 pub mod ctrl;
-#[doc = "STS (rw) register accessor: Status/Interrupt Source Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sts::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sts::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sts`]
+#[doc = "STS (rw) register accessor: Status/Interrupt Source Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sts::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sts::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sts`]
 module"]
 #[doc(alias = "STS")]
 pub type Sts = crate::Reg<sts::StsSpec>;
 #[doc = "Status/Interrupt Source Register"]
 pub mod sts;
-#[doc = "DEFADDR (rw) register accessor: Node Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`defaddr::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`defaddr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@defaddr`]
+#[doc = "DEFADDR (rw) register accessor: Node Address Register\n\nYou can [`read`](crate::Reg::read) this register and get [`defaddr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`defaddr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@defaddr`]
 module"]
 #[doc(alias = "DEFADDR")]
 pub type Defaddr = crate::Reg<defaddr::DefaddrSpec>;
 #[doc = "Node Address Register"]
 pub mod defaddr;
-#[doc = "CLKDIV (rw) register accessor: Clock Divisor Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clkdiv::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clkdiv::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkdiv`]
+#[doc = "CLKDIV (rw) register accessor: Clock Divisor Register\n\nYou can [`read`](crate::Reg::read) this register and get [`clkdiv::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkdiv::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkdiv`]
 module"]
 #[doc(alias = "CLKDIV")]
 pub type Clkdiv = crate::Reg<clkdiv::ClkdivSpec>;
 #[doc = "Clock Divisor Register"]
 pub mod clkdiv;
-#[doc = "DKEY (rw) register accessor: Destination Key\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dkey::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dkey::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dkey`]
+#[doc = "DKEY (rw) register accessor: Destination Key\n\nYou can [`read`](crate::Reg::read) this register and get [`dkey::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dkey::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dkey`]
 module"]
 #[doc(alias = "DKEY")]
 pub type Dkey = crate::Reg<dkey::DkeySpec>;
 #[doc = "Destination Key"]
 pub mod dkey;
-#[doc = "TC (rw) register accessor: Time Code Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tc::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tc`]
+#[doc = "TC (rw) register accessor: Time Code Register\n\nYou can [`read`](crate::Reg::read) this register and get [`tc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tc`]
 module"]
 #[doc(alias = "TC")]
 pub type Tc = crate::Reg<tc::TcSpec>;
 #[doc = "Time Code Register"]
 pub mod tc;
-#[doc = "TDR (r) register accessor: Timer and Disconnect Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tdr::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tdr`]
+#[doc = "TDR (r) register accessor: Timer and Disconnect Register\n\nYou can [`read`](crate::Reg::read) this register and get [`tdr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tdr`]
 module"]
 #[doc(alias = "TDR")]
 pub type Tdr = crate::Reg<tdr::TdrSpec>;
 #[doc = "Timer and Disconnect Register"]
 pub mod tdr;
-#[doc = "DMACTRL0 (rw) register accessor: DMA Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dmactrl0::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dmactrl0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmactrl0`]
+#[doc = "DMACTRL0 (rw) register accessor: DMA Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dmactrl0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dmactrl0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmactrl0`]
 module"]
 #[doc(alias = "DMACTRL0")]
 pub type Dmactrl0 = crate::Reg<dmactrl0::Dmactrl0Spec>;
 #[doc = "DMA Control Register"]
 pub mod dmactrl0;
-#[doc = "DMAMAXLEN0 (rw) register accessor: DMA RX Maximum Length Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dmamaxlen0::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dmamaxlen0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmamaxlen0`]
+#[doc = "DMAMAXLEN0 (rw) register accessor: DMA RX Maximum Length Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dmamaxlen0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dmamaxlen0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmamaxlen0`]
 module"]
 #[doc(alias = "DMAMAXLEN0")]
 pub type Dmamaxlen0 = crate::Reg<dmamaxlen0::Dmamaxlen0Spec>;
 #[doc = "DMA RX Maximum Length Register"]
 pub mod dmamaxlen0;
-#[doc = "DMATXDESC0 (rw) register accessor: DMA Transmitter Descriptor Table Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dmatxdesc0::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dmatxdesc0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmatxdesc0`]
+#[doc = "DMATXDESC0 (rw) register accessor: DMA Transmitter Descriptor Table Address Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dmatxdesc0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dmatxdesc0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmatxdesc0`]
 module"]
 #[doc(alias = "DMATXDESC0")]
 pub type Dmatxdesc0 = crate::Reg<dmatxdesc0::Dmatxdesc0Spec>;
 #[doc = "DMA Transmitter Descriptor Table Address Register"]
 pub mod dmatxdesc0;
-#[doc = "DMARXDESC0 (rw) register accessor: DMA Receiver Table Destination Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dmarxdesc0::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dmarxdesc0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmarxdesc0`]
+#[doc = "DMARXDESC0 (rw) register accessor: DMA Receiver Table Destination Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dmarxdesc0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dmarxdesc0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmarxdesc0`]
 module"]
 #[doc(alias = "DMARXDESC0")]
 pub type Dmarxdesc0 = crate::Reg<dmarxdesc0::Dmarxdesc0Spec>;
 #[doc = "DMA Receiver Table Destination Register"]
 pub mod dmarxdesc0;
-#[doc = "DMAADDR0 (rw) register accessor: DMA Receiver Table Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dmaaddr0::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dmaaddr0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmaaddr0`]
+#[doc = "DMAADDR0 (rw) register accessor: DMA Receiver Table Address Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dmaaddr0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dmaaddr0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmaaddr0`]
 module"]
 #[doc(alias = "DMAADDR0")]
 pub type Dmaaddr0 = crate::Reg<dmaaddr0::Dmaaddr0Spec>;
diff --git a/va416xx/src/spw/clkdiv.rs b/va416xx/src/spw/clkdiv.rs
index ab8ee77..3f6196f 100644
--- a/va416xx/src/spw/clkdiv.rs
+++ b/va416xx/src/spw/clkdiv.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - 8-bit Clock divisor value used for the clock-divider when the link-interface is in the run-state"]
     #[inline(always)]
-    #[must_use]
     pub fn clkdivrun(&mut self) -> ClkdivrunW<ClkdivSpec> {
         ClkdivrunW::new(self, 0)
     }
     #[doc = "Bits 8:15 - 8-bit Clock divisor value used for the clock-divider during startup"]
     #[inline(always)]
-    #[must_use]
     pub fn clkdivstart(&mut self) -> ClkdivstartW<ClkdivSpec> {
         ClkdivstartW::new(self, 8)
     }
 }
-#[doc = "Clock Divisor Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clkdiv::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clkdiv::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Clock Divisor Register\n\nYou can [`read`](crate::Reg::read) this register and get [`clkdiv::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkdiv::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct ClkdivSpec;
 impl crate::RegisterSpec for ClkdivSpec {
     type Ux = u32;
diff --git a/va416xx/src/spw/ctrl.rs b/va416xx/src/spw/ctrl.rs
index 097fdd5..e9308d3 100644
--- a/va416xx/src/spw/ctrl.rs
+++ b/va416xx/src/spw/ctrl.rs
@@ -234,120 +234,101 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Disable the SpaceWire CODEC"]
     #[inline(always)]
-    #[must_use]
     pub fn ld(&mut self) -> LdW<CtrlSpec> {
         LdW::new(self, 0)
     }
     #[doc = "Bit 1 - Start the link"]
     #[inline(always)]
-    #[must_use]
     pub fn ls(&mut self) -> LsW<CtrlSpec> {
         LsW::new(self, 1)
     }
     #[doc = "Bit 2 - Automatically start the link when a NULL has been received"]
     #[inline(always)]
-    #[must_use]
     pub fn as_(&mut self) -> AsW<CtrlSpec> {
         AsW::new(self, 2)
     }
     #[doc = "Bit 3 - If set, an interrupt is generated when one or both of bit 8 to 9 is set and its corresponding event occurs"]
     #[inline(always)]
-    #[must_use]
     pub fn ie(&mut self) -> IeW<CtrlSpec> {
         IeW::new(self, 3)
     }
     #[doc = "Bit 4 - The host can generate a tick by writing a one to this field"]
     #[inline(always)]
-    #[must_use]
     pub fn ti(&mut self) -> TiW<CtrlSpec> {
         TiW::new(self, 4)
     }
     #[doc = "Bit 5 - Enable Promiscuous mode"]
     #[inline(always)]
-    #[must_use]
     pub fn pm(&mut self) -> PmW<CtrlSpec> {
         PmW::new(self, 5)
     }
     #[doc = "Bit 6 - Make complete reset of the SpaceWire node. Self-clearing"]
     #[inline(always)]
-    #[must_use]
     pub fn rs(&mut self) -> RsW<CtrlSpec> {
         RsW::new(self, 6)
     }
     #[doc = "Bit 8 - Generate interrupt when a valid time-code is received"]
     #[inline(always)]
-    #[must_use]
     pub fn tq(&mut self) -> TqW<CtrlSpec> {
         TqW::new(self, 8)
     }
     #[doc = "Bit 9 - Generate interrupt when link error occurs"]
     #[inline(always)]
-    #[must_use]
     pub fn li(&mut self) -> LiW<CtrlSpec> {
         LiW::new(self, 9)
     }
     #[doc = "Bit 10 - Enable time-code transmissions"]
     #[inline(always)]
-    #[must_use]
     pub fn tt(&mut self) -> TtW<CtrlSpec> {
         TtW::new(self, 10)
     }
     #[doc = "Bit 11 - Enable time-code receptions"]
     #[inline(always)]
-    #[must_use]
     pub fn tr(&mut self) -> TrW<CtrlSpec> {
         TrW::new(self, 11)
     }
     #[doc = "Bit 12 - Time-code Flag Filter"]
     #[inline(always)]
-    #[must_use]
     pub fn tf(&mut self) -> TfW<CtrlSpec> {
         TfW::new(self, 12)
     }
     #[doc = "Bit 13 - Transmitter Enable Lock Control"]
     #[inline(always)]
-    #[must_use]
     pub fn tl(&mut self) -> TlW<CtrlSpec> {
         TlW::new(self, 13)
     }
     #[doc = "Bit 15 - SpW Plug-and-Play Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn pe(&mut self) -> PeW<CtrlSpec> {
         PeW::new(self, 15)
     }
     #[doc = "Bit 16 - Enable RMAP command handler"]
     #[inline(always)]
-    #[must_use]
     pub fn re(&mut self) -> ReW<CtrlSpec> {
         ReW::new(self, 16)
     }
     #[doc = "Bit 17 - If set only one RMAP buffer is used"]
     #[inline(always)]
-    #[must_use]
     pub fn rd(&mut self) -> RdW<CtrlSpec> {
         RdW::new(self, 17)
     }
     #[doc = "Bit 20 - Disable port force"]
     #[inline(always)]
-    #[must_use]
     pub fn np(&mut self) -> NpW<CtrlSpec> {
         NpW::new(self, 20)
     }
     #[doc = "Bit 21 - Selects the active port when the no port force bit is zero"]
     #[inline(always)]
-    #[must_use]
     pub fn ps(&mut self) -> PsW<CtrlSpec> {
         PsW::new(self, 21)
     }
     #[doc = "Bit 22 - Loop-back Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn le(&mut self) -> LeW<CtrlSpec> {
         LeW::new(self, 22)
     }
 }
-#[doc = "Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctrl::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctrl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct CtrlSpec;
 impl crate::RegisterSpec for CtrlSpec {
     type Ux = u32;
diff --git a/va416xx/src/spw/defaddr.rs b/va416xx/src/spw/defaddr.rs
index 3231286..cfc6982 100644
--- a/va416xx/src/spw/defaddr.rs
+++ b/va416xx/src/spw/defaddr.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - 8-bit node address used for node identification on the SpaceWire network"]
     #[inline(always)]
-    #[must_use]
     pub fn defaddr(&mut self) -> DefaddrW<DefaddrSpec> {
         DefaddrW::new(self, 0)
     }
     #[doc = "Bits 8:15 - 8-bit default mask used for node identification on the SpaceWire network"]
     #[inline(always)]
-    #[must_use]
     pub fn defmask(&mut self) -> DefmaskW<DefaddrSpec> {
         DefmaskW::new(self, 8)
     }
 }
-#[doc = "Node Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`defaddr::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`defaddr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Node Address Register\n\nYou can [`read`](crate::Reg::read) this register and get [`defaddr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`defaddr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct DefaddrSpec;
 impl crate::RegisterSpec for DefaddrSpec {
     type Ux = u32;
diff --git a/va416xx/src/spw/dkey.rs b/va416xx/src/spw/dkey.rs
index 8b6dec4..7793357 100644
--- a/va416xx/src/spw/dkey.rs
+++ b/va416xx/src/spw/dkey.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - RMAP destination key"]
     #[inline(always)]
-    #[must_use]
     pub fn destkey(&mut self) -> DestkeyW<DkeySpec> {
         DestkeyW::new(self, 0)
     }
 }
-#[doc = "Destination Key\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dkey::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dkey::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Destination Key\n\nYou can [`read`](crate::Reg::read) this register and get [`dkey::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dkey::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct DkeySpec;
 impl crate::RegisterSpec for DkeySpec {
     type Ux = u32;
diff --git a/va416xx/src/spw/dmaaddr0.rs b/va416xx/src/spw/dmaaddr0.rs
index 321fb26..b403f28 100644
--- a/va416xx/src/spw/dmaaddr0.rs
+++ b/va416xx/src/spw/dmaaddr0.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Address"]
     #[inline(always)]
-    #[must_use]
     pub fn addr(&mut self) -> AddrW<Dmaaddr0Spec> {
         AddrW::new(self, 0)
     }
     #[doc = "Bits 8:15 - Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn mask(&mut self) -> MaskW<Dmaaddr0Spec> {
         MaskW::new(self, 8)
     }
 }
-#[doc = "DMA Receiver Table Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dmaaddr0::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dmaaddr0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "DMA Receiver Table Address Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dmaaddr0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dmaaddr0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Dmaaddr0Spec;
 impl crate::RegisterSpec for Dmaaddr0Spec {
     type Ux = u32;
diff --git a/va416xx/src/spw/dmactrl0.rs b/va416xx/src/spw/dmactrl0.rs
index 583e94f..51d9005 100644
--- a/va416xx/src/spw/dmactrl0.rs
+++ b/va416xx/src/spw/dmactrl0.rs
@@ -228,144 +228,121 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Write a one to this bit each time new descriptors are activated in the table"]
     #[inline(always)]
-    #[must_use]
     pub fn te(&mut self) -> TeW<Dmactrl0Spec> {
         TeW::new(self, 0)
     }
     #[doc = "Bit 1 - Packets are allowed to be received to this channel"]
     #[inline(always)]
-    #[must_use]
     pub fn re(&mut self) -> ReW<Dmactrl0Spec> {
         ReW::new(self, 1)
     }
     #[doc = "Bit 2 - An interrupt will be generated each time a packet is transmitted"]
     #[inline(always)]
-    #[must_use]
     pub fn ti(&mut self) -> TiW<Dmactrl0Spec> {
         TiW::new(self, 2)
     }
     #[doc = "Bit 3 - An interrupt will be generated each time a packet has been received"]
     #[inline(always)]
-    #[must_use]
     pub fn ri(&mut self) -> RiW<Dmactrl0Spec> {
         RiW::new(self, 3)
     }
     #[doc = "Bit 4 - An interrupt will be generated each time an AHB error occurs when this DMA channel is accessing the bus"]
     #[inline(always)]
-    #[must_use]
     pub fn ai(&mut self) -> AiW<Dmactrl0Spec> {
         AiW::new(self, 4)
     }
     #[doc = "Bit 5 - Set each time a packet has been sent"]
     #[inline(always)]
-    #[must_use]
     pub fn ps(&mut self) -> PsW<Dmactrl0Spec> {
         PsW::new(self, 5)
     }
     #[doc = "Bit 6 - Set each time a packet has been received"]
     #[inline(always)]
-    #[must_use]
     pub fn pr(&mut self) -> PrW<Dmactrl0Spec> {
         PrW::new(self, 6)
     }
     #[doc = "Bit 7 - An error response was detected on the AHB bus - DMA transmit"]
     #[inline(always)]
-    #[must_use]
     pub fn ta(&mut self) -> TaW<Dmactrl0Spec> {
         TaW::new(self, 7)
     }
     #[doc = "Bit 8 - An error response was detected on the AHB bus - DMA receive"]
     #[inline(always)]
-    #[must_use]
     pub fn ra(&mut self) -> RaW<Dmactrl0Spec> {
         RaW::new(self, 8)
     }
     #[doc = "Bit 11 - Indicates to the GRSPW that there are enabled descriptors in the descriptor table"]
     #[inline(always)]
-    #[must_use]
     pub fn rd(&mut self) -> RdW<Dmactrl0Spec> {
         RdW::new(self, 11)
     }
     #[doc = "Bit 12 - If cleared, packets will be discarded when a packet is arriving and there are no active descriptors. If set, the GRSPW will wait for a descriptor to be activated"]
     #[inline(always)]
-    #[must_use]
     pub fn ns(&mut self) -> NsW<Dmactrl0Spec> {
         NsW::new(self, 12)
     }
     #[doc = "Bit 13 - Enable Address"]
     #[inline(always)]
-    #[must_use]
     pub fn en(&mut self) -> EnW<Dmactrl0Spec> {
         EnW::new(self, 13)
     }
     #[doc = "Bit 14 - Strip Address"]
     #[inline(always)]
-    #[must_use]
     pub fn sa(&mut self) -> SaW<Dmactrl0Spec> {
         SaW::new(self, 14)
     }
     #[doc = "Bit 15 - Strip PID"]
     #[inline(always)]
-    #[must_use]
     pub fn sp(&mut self) -> SpW<Dmactrl0Spec> {
         SpW::new(self, 15)
     }
     #[doc = "Bit 16 - Disable transmitter when a link error occurs"]
     #[inline(always)]
-    #[must_use]
     pub fn le(&mut self) -> LeW<Dmactrl0Spec> {
         LeW::new(self, 16)
     }
     #[doc = "Bit 17 - Transmit Enable Lock"]
     #[inline(always)]
-    #[must_use]
     pub fn tl(&mut self) -> TlW<Dmactrl0Spec> {
         TlW::new(self, 17)
     }
     #[doc = "Bit 18 - Transmit Packet IRQ"]
     #[inline(always)]
-    #[must_use]
     pub fn tp(&mut self) -> TpW<Dmactrl0Spec> {
         TpW::new(self, 18)
     }
     #[doc = "Bit 19 - Receive Packet IRQ"]
     #[inline(always)]
-    #[must_use]
     pub fn rp(&mut self) -> RpW<Dmactrl0Spec> {
         RpW::new(self, 19)
     }
     #[doc = "Bit 20 - Interrupt code transmit enable on truncation"]
     #[inline(always)]
-    #[must_use]
     pub fn it(&mut self) -> ItW<Dmactrl0Spec> {
         ItW::new(self, 20)
     }
     #[doc = "Bit 21 - Interrupt code transmit enable on EEP"]
     #[inline(always)]
-    #[must_use]
     pub fn ie(&mut self) -> IeW<Dmactrl0Spec> {
         IeW::new(self, 21)
     }
     #[doc = "Bit 22 - Truncated"]
     #[inline(always)]
-    #[must_use]
     pub fn tr(&mut self) -> TrW<Dmactrl0Spec> {
         TrW::new(self, 22)
     }
     #[doc = "Bit 23 - EEP Termination"]
     #[inline(always)]
-    #[must_use]
     pub fn ep(&mut self) -> EpW<Dmactrl0Spec> {
         EpW::new(self, 23)
     }
     #[doc = "Bits 26:31 - Interrupt number used for this channel"]
     #[inline(always)]
-    #[must_use]
     pub fn intnum(&mut self) -> IntnumW<Dmactrl0Spec> {
         IntnumW::new(self, 26)
     }
 }
-#[doc = "DMA Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dmactrl0::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dmactrl0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "DMA Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dmactrl0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dmactrl0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Dmactrl0Spec;
 impl crate::RegisterSpec for Dmactrl0Spec {
     type Ux = u32;
diff --git a/va416xx/src/spw/dmamaxlen0.rs b/va416xx/src/spw/dmamaxlen0.rs
index d809bbf..1494853 100644
--- a/va416xx/src/spw/dmamaxlen0.rs
+++ b/va416xx/src/spw/dmamaxlen0.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 2:24 - Receiver packet maximum length in bytes"]
     #[inline(always)]
-    #[must_use]
     pub fn rxmaxlen(&mut self) -> RxmaxlenW<Dmamaxlen0Spec> {
         RxmaxlenW::new(self, 2)
     }
 }
-#[doc = "DMA RX Maximum Length Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dmamaxlen0::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dmamaxlen0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "DMA RX Maximum Length Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dmamaxlen0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dmamaxlen0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Dmamaxlen0Spec;
 impl crate::RegisterSpec for Dmamaxlen0Spec {
     type Ux = u32;
diff --git a/va416xx/src/spw/dmarxdesc0.rs b/va416xx/src/spw/dmarxdesc0.rs
index 50b31d3..e0d68a9 100644
--- a/va416xx/src/spw/dmarxdesc0.rs
+++ b/va416xx/src/spw/dmarxdesc0.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 3:9 - Offset into the descriptor table"]
     #[inline(always)]
-    #[must_use]
     pub fn descsel(&mut self) -> DescselW<Dmarxdesc0Spec> {
         DescselW::new(self, 3)
     }
     #[doc = "Bits 10:31 - Sets the base address of the descriptor table"]
     #[inline(always)]
-    #[must_use]
     pub fn descbaseaddr(&mut self) -> DescbaseaddrW<Dmarxdesc0Spec> {
         DescbaseaddrW::new(self, 10)
     }
 }
-#[doc = "DMA Receiver Table Destination Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dmarxdesc0::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dmarxdesc0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "DMA Receiver Table Destination Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dmarxdesc0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dmarxdesc0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Dmarxdesc0Spec;
 impl crate::RegisterSpec for Dmarxdesc0Spec {
     type Ux = u32;
diff --git a/va416xx/src/spw/dmatxdesc0.rs b/va416xx/src/spw/dmatxdesc0.rs
index baf9a6d..da1242b 100644
--- a/va416xx/src/spw/dmatxdesc0.rs
+++ b/va416xx/src/spw/dmatxdesc0.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 4:9 - Offset into the descriptor table"]
     #[inline(always)]
-    #[must_use]
     pub fn descsel(&mut self) -> DescselW<Dmatxdesc0Spec> {
         DescselW::new(self, 4)
     }
     #[doc = "Bits 10:31 - Sets the base address of the descriptor table"]
     #[inline(always)]
-    #[must_use]
     pub fn descbaseaddr(&mut self) -> DescbaseaddrW<Dmatxdesc0Spec> {
         DescbaseaddrW::new(self, 10)
     }
 }
-#[doc = "DMA Transmitter Descriptor Table Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dmatxdesc0::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dmatxdesc0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "DMA Transmitter Descriptor Table Address Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dmatxdesc0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dmatxdesc0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Dmatxdesc0Spec;
 impl crate::RegisterSpec for Dmatxdesc0Spec {
     type Ux = u32;
diff --git a/va416xx/src/spw/sts.rs b/va416xx/src/spw/sts.rs
index 1dc5074..b4524d5 100644
--- a/va416xx/src/spw/sts.rs
+++ b/va416xx/src/spw/sts.rs
@@ -115,78 +115,66 @@ impl R {
 impl W {
     #[doc = "Bit 0 - A new time count value was received"]
     #[inline(always)]
-    #[must_use]
     pub fn to(&mut self) -> ToW<StsSpec> {
         ToW::new(self, 0)
     }
     #[doc = "Bit 1 - Credit has occurred"]
     #[inline(always)]
-    #[must_use]
     pub fn ce(&mut self) -> CeW<StsSpec> {
         CeW::new(self, 1)
     }
     #[doc = "Bit 2 - Escape error has occurred"]
     #[inline(always)]
-    #[must_use]
     pub fn er(&mut self) -> ErW<StsSpec> {
         ErW::new(self, 2)
     }
     #[doc = "Bit 3 - Disconnection error has occurred"]
     #[inline(always)]
-    #[must_use]
     pub fn de(&mut self) -> DeW<StsSpec> {
         DeW::new(self, 3)
     }
     #[doc = "Bit 4 - Parity error has occurred"]
     #[inline(always)]
-    #[must_use]
     pub fn pe(&mut self) -> PeW<StsSpec> {
         PeW::new(self, 4)
     }
     #[doc = "Bit 6 - A synchronization problem has occurred when receiving NChars"]
     #[inline(always)]
-    #[must_use]
     pub fn we(&mut self) -> WeW<StsSpec> {
         WeW::new(self, 6)
     }
     #[doc = "Bit 7 - Packet is received with an invalid destination address field"]
     #[inline(always)]
-    #[must_use]
     pub fn ia(&mut self) -> IaW<StsSpec> {
         IaW::new(self, 7)
     }
     #[doc = "Bit 8 - Set to one when a packet is received with an EOP after the first byte for a non-RMAP packet and after the second byte for a RMAP packet"]
     #[inline(always)]
-    #[must_use]
     pub fn ee(&mut self) -> EeW<StsSpec> {
         EeW::new(self, 8)
     }
     #[doc = "Bit 9 - Active port"]
     #[inline(always)]
-    #[must_use]
     pub fn ap(&mut self) -> ApW<StsSpec> {
         ApW::new(self, 9)
     }
     #[doc = "Bits 21:23 - Link State"]
     #[inline(always)]
-    #[must_use]
     pub fn ls(&mut self) -> LsW<StsSpec> {
         LsW::new(self, 21)
     }
     #[doc = "Bits 24:25 - Number of Transmit Descriptors"]
     #[inline(always)]
-    #[must_use]
     pub fn ntxd(&mut self) -> NtxdW<StsSpec> {
         NtxdW::new(self, 24)
     }
     #[doc = "Bits 26:27 - Number of Receive Descriptors"]
     #[inline(always)]
-    #[must_use]
     pub fn nrxd(&mut self) -> NrxdW<StsSpec> {
         NrxdW::new(self, 26)
     }
 }
-#[doc = "Status/Interrupt Source Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sts::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sts::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Status/Interrupt Source Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sts::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sts::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct StsSpec;
 impl crate::RegisterSpec for StsSpec {
     type Ux = u32;
diff --git a/va416xx/src/spw/tc.rs b/va416xx/src/spw/tc.rs
index 5f44ccb..b1a20f1 100644
--- a/va416xx/src/spw/tc.rs
+++ b/va416xx/src/spw/tc.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:5 - The current value of the system time counter"]
     #[inline(always)]
-    #[must_use]
     pub fn timecnt(&mut self) -> TimecntW<TcSpec> {
         TimecntW::new(self, 0)
     }
     #[doc = "Bits 6:7 - The current value of the time control flags"]
     #[inline(always)]
-    #[must_use]
     pub fn tirq_end(&mut self) -> TirqEndW<TcSpec> {
         TirqEndW::new(self, 6)
     }
 }
-#[doc = "Time Code Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tc::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Time Code Register\n\nYou can [`read`](crate::Reg::read) this register and get [`tc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct TcSpec;
 impl crate::RegisterSpec for TcSpec {
     type Ux = u32;
diff --git a/va416xx/src/spw/tdr.rs b/va416xx/src/spw/tdr.rs
index 9945a45..44be157 100644
--- a/va416xx/src/spw/tdr.rs
+++ b/va416xx/src/spw/tdr.rs
@@ -16,7 +16,7 @@ impl R {
         DisconnectR::new(((self.bits >> 12) & 0x03ff) as u16)
     }
 }
-#[doc = "Timer and Disconnect Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tdr::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Timer and Disconnect Register\n\nYou can [`read`](crate::Reg::read) this register and get [`tdr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct TdrSpec;
 impl crate::RegisterSpec for TdrSpec {
     type Ux = u32;
diff --git a/va416xx/src/sysconfig.rs b/va416xx/src/sysconfig.rs
index 52d41fa..fc7b9f4 100644
--- a/va416xx/src/sysconfig.rs
+++ b/va416xx/src/sysconfig.rs
@@ -281,7 +281,7 @@ impl RegisterBlock {
         &self.perid
     }
 }
-#[doc = "RST_STAT (rw) register accessor: System Reset Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rst_stat::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rst_stat::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rst_stat`]
+#[doc = "RST_STAT (rw) register accessor: System Reset Status\n\nYou can [`read`](crate::Reg::read) this register and get [`rst_stat::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rst_stat::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rst_stat`]
 module"]
 #[doc(alias = "RST_STAT")]
 pub type RstStat = crate::Reg<rst_stat::RstStatSpec>;
@@ -293,13 +293,13 @@ pub use rst_stat as rst_cntl_ram1;
 pub use RstStat as RstCntlRom;
 pub use RstStat as RstCntlRam0;
 pub use RstStat as RstCntlRam1;
-#[doc = "ROM_PROT (rw) register accessor: ROM Protection Configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rom_prot::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rom_prot::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rom_prot`]
+#[doc = "ROM_PROT (rw) register accessor: ROM Protection Configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`rom_prot::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rom_prot::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rom_prot`]
 module"]
 #[doc(alias = "ROM_PROT")]
 pub type RomProt = crate::Reg<rom_prot::RomProtSpec>;
 #[doc = "ROM Protection Configuration"]
 pub mod rom_prot;
-#[doc = "ROM_SCRUB (rw) register accessor: ROM Scrub Period Configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rom_scrub::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rom_scrub::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rom_scrub`]
+#[doc = "ROM_SCRUB (rw) register accessor: ROM Scrub Period Configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`rom_scrub::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rom_scrub::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rom_scrub`]
 module"]
 #[doc(alias = "ROM_SCRUB")]
 pub type RomScrub = crate::Reg<rom_scrub::RomScrubSpec>;
@@ -309,7 +309,7 @@ pub use rom_scrub as ram0_scrub;
 pub use rom_scrub as ram1_scrub;
 pub use RomScrub as Ram0Scrub;
 pub use RomScrub as Ram1Scrub;
-#[doc = "IRQ_ENB (rw) register accessor: Enable EDAC Error Interrupt Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_enb::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`irq_enb::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_enb`]
+#[doc = "IRQ_ENB (rw) register accessor: Enable EDAC Error Interrupt Register\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_enb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`irq_enb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_enb`]
 module"]
 #[doc(alias = "IRQ_ENB")]
 pub type IrqEnb = crate::Reg<irq_enb::IrqEnbSpec>;
@@ -321,7 +321,7 @@ pub use irq_enb as irq_clr;
 pub use IrqEnb as IrqRaw;
 pub use IrqEnb as IrqEnd;
 pub use IrqEnb as IrqClr;
-#[doc = "RAM0_SBE (rw) register accessor: Count of RAM0 EDAC Single Bit Errors\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ram0_sbe::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ram0_sbe::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ram0_sbe`]
+#[doc = "RAM0_SBE (rw) register accessor: Count of RAM0 EDAC Single Bit Errors\n\nYou can [`read`](crate::Reg::read) this register and get [`ram0_sbe::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ram0_sbe::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ram0_sbe`]
 module"]
 #[doc(alias = "RAM0_SBE")]
 pub type Ram0Sbe = crate::Reg<ram0_sbe::Ram0SbeSpec>;
@@ -329,7 +329,7 @@ pub type Ram0Sbe = crate::Reg<ram0_sbe::Ram0SbeSpec>;
 pub mod ram0_sbe;
 pub use ram0_sbe as ram1_sbe;
 pub use Ram0Sbe as Ram1Sbe;
-#[doc = "RAM0_MBE (rw) register accessor: Count of RAM0 EDAC Multi Bit Errors\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ram0_mbe::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ram0_mbe::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ram0_mbe`]
+#[doc = "RAM0_MBE (rw) register accessor: Count of RAM0 EDAC Multi Bit Errors\n\nYou can [`read`](crate::Reg::read) this register and get [`ram0_mbe::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ram0_mbe::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ram0_mbe`]
 module"]
 #[doc(alias = "RAM0_MBE")]
 pub type Ram0Mbe = crate::Reg<ram0_mbe::Ram0MbeSpec>;
@@ -341,31 +341,31 @@ pub use ram0_sbe as rom_sbe;
 pub use Ram0Mbe as Ram1Mbe;
 pub use Ram0Mbe as RomMbe;
 pub use Ram0Sbe as RomSbe;
-#[doc = "ROM_RETRIES (r) register accessor: ROM BOOT Retry count\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rom_retries::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rom_retries`]
+#[doc = "ROM_RETRIES (r) register accessor: ROM BOOT Retry count\n\nYou can [`read`](crate::Reg::read) this register and get [`rom_retries::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rom_retries`]
 module"]
 #[doc(alias = "ROM_RETRIES")]
 pub type RomRetries = crate::Reg<rom_retries::RomRetriesSpec>;
 #[doc = "ROM BOOT Retry count"]
 pub mod rom_retries;
-#[doc = "REFRESH_CONFIG_H (rw) register accessor: Register Refresh Rate for TMR registers\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`refresh_config_h::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`refresh_config_h::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@refresh_config_h`]
+#[doc = "REFRESH_CONFIG_H (rw) register accessor: Register Refresh Rate for TMR registers\n\nYou can [`read`](crate::Reg::read) this register and get [`refresh_config_h::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`refresh_config_h::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@refresh_config_h`]
 module"]
 #[doc(alias = "REFRESH_CONFIG_H")]
 pub type RefreshConfigH = crate::Reg<refresh_config_h::RefreshConfigHSpec>;
 #[doc = "Register Refresh Rate for TMR registers"]
 pub mod refresh_config_h;
-#[doc = "TIM_RESET (rw) register accessor: TIM Reset Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tim_reset::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tim_reset::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tim_reset`]
+#[doc = "TIM_RESET (rw) register accessor: TIM Reset Control\n\nYou can [`read`](crate::Reg::read) this register and get [`tim_reset::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tim_reset::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tim_reset`]
 module"]
 #[doc(alias = "TIM_RESET")]
 pub type TimReset = crate::Reg<tim_reset::TimResetSpec>;
 #[doc = "TIM Reset Control"]
 pub mod tim_reset;
-#[doc = "TIM_CLK_ENABLE (rw) register accessor: TIM Enable Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tim_clk_enable::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tim_clk_enable::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tim_clk_enable`]
+#[doc = "TIM_CLK_ENABLE (rw) register accessor: TIM Enable Control\n\nYou can [`read`](crate::Reg::read) this register and get [`tim_clk_enable::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tim_clk_enable::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tim_clk_enable`]
 module"]
 #[doc(alias = "TIM_CLK_ENABLE")]
 pub type TimClkEnable = crate::Reg<tim_clk_enable::TimClkEnableSpec>;
 #[doc = "TIM Enable Control"]
 pub mod tim_clk_enable;
-#[doc = "PERIPHERAL_RESET (rw) register accessor: Peripheral Reset Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`peripheral_reset::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`peripheral_reset::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@peripheral_reset`]
+#[doc = "PERIPHERAL_RESET (rw) register accessor: Peripheral Reset Control\n\nYou can [`read`](crate::Reg::read) this register and get [`peripheral_reset::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`peripheral_reset::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@peripheral_reset`]
 module"]
 #[doc(alias = "PERIPHERAL_RESET")]
 pub type PeripheralReset = crate::Reg<peripheral_reset::PeripheralResetSpec>;
@@ -373,25 +373,25 @@ pub type PeripheralReset = crate::Reg<peripheral_reset::PeripheralResetSpec>;
 pub mod peripheral_reset;
 pub use peripheral_reset as peripheral_clk_enable;
 pub use PeripheralReset as PeripheralClkEnable;
-#[doc = "SPW_M4_CTRL (rw) register accessor: SPW M4 control register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`spw_m4_ctrl::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`spw_m4_ctrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@spw_m4_ctrl`]
+#[doc = "SPW_M4_CTRL (rw) register accessor: SPW M4 control register\n\nYou can [`read`](crate::Reg::read) this register and get [`spw_m4_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`spw_m4_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@spw_m4_ctrl`]
 module"]
 #[doc(alias = "SPW_M4_CTRL")]
 pub type SpwM4Ctrl = crate::Reg<spw_m4_ctrl::SpwM4CtrlSpec>;
 #[doc = "SPW M4 control register"]
 pub mod spw_m4_ctrl;
-#[doc = "PMU_CTRL (rw) register accessor: PMU Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pmu_ctrl::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pmu_ctrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pmu_ctrl`]
+#[doc = "PMU_CTRL (rw) register accessor: PMU Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pmu_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pmu_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pmu_ctrl`]
 module"]
 #[doc(alias = "PMU_CTRL")]
 pub type PmuCtrl = crate::Reg<pmu_ctrl::PmuCtrlSpec>;
 #[doc = "PMU Control Register"]
 pub mod pmu_ctrl;
-#[doc = "WAKEUP_CNT (rw) register accessor: Wakeup Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wakeup_cnt::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`wakeup_cnt::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wakeup_cnt`]
+#[doc = "WAKEUP_CNT (rw) register accessor: Wakeup Control\n\nYou can [`read`](crate::Reg::read) this register and get [`wakeup_cnt::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wakeup_cnt::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wakeup_cnt`]
 module"]
 #[doc(alias = "WAKEUP_CNT")]
 pub type WakeupCnt = crate::Reg<wakeup_cnt::WakeupCntSpec>;
 #[doc = "Wakeup Control"]
 pub mod wakeup_cnt;
-#[doc = "EBI_CFG0 (rw) register accessor: EBI Config Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ebi_cfg0::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ebi_cfg0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ebi_cfg0`]
+#[doc = "EBI_CFG0 (rw) register accessor: EBI Config Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`ebi_cfg0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ebi_cfg0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ebi_cfg0`]
 module"]
 #[doc(alias = "EBI_CFG0")]
 pub type EbiCfg0 = crate::Reg<ebi_cfg0::EbiCfg0Spec>;
@@ -403,91 +403,91 @@ pub use ebi_cfg0 as ebi_cfg3;
 pub use EbiCfg0 as EbiCfg1;
 pub use EbiCfg0 as EbiCfg2;
 pub use EbiCfg0 as EbiCfg3;
-#[doc = "ANALOG_CNTL (rw) register accessor: Analog Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`analog_cntl::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`analog_cntl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@analog_cntl`]
+#[doc = "ANALOG_CNTL (rw) register accessor: Analog Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`analog_cntl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`analog_cntl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@analog_cntl`]
 module"]
 #[doc(alias = "ANALOG_CNTL")]
 pub type AnalogCntl = crate::Reg<analog_cntl::AnalogCntlSpec>;
 #[doc = "Analog Control Register"]
 pub mod analog_cntl;
-#[doc = "SW_CLKDIV10 (rw) register accessor: Initial SpW Clock Divider Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sw_clkdiv10::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sw_clkdiv10::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sw_clkdiv10`]
+#[doc = "SW_CLKDIV10 (rw) register accessor: Initial SpW Clock Divider Value\n\nYou can [`read`](crate::Reg::read) this register and get [`sw_clkdiv10::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sw_clkdiv10::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sw_clkdiv10`]
 module"]
 #[doc(alias = "SW_CLKDIV10")]
 pub type SwClkdiv10 = crate::Reg<sw_clkdiv10::SwClkdiv10Spec>;
 #[doc = "Initial SpW Clock Divider Value"]
 pub mod sw_clkdiv10;
-#[doc = "REFRESH_CONFIG_L (rw) register accessor: Register Refresh Rate for TMR registers\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`refresh_config_l::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`refresh_config_l::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@refresh_config_l`]
+#[doc = "REFRESH_CONFIG_L (rw) register accessor: Register Refresh Rate for TMR registers\n\nYou can [`read`](crate::Reg::read) this register and get [`refresh_config_l::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`refresh_config_l::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@refresh_config_l`]
 module"]
 #[doc(alias = "REFRESH_CONFIG_L")]
 pub type RefreshConfigL = crate::Reg<refresh_config_l::RefreshConfigLSpec>;
 #[doc = "Register Refresh Rate for TMR registers"]
 pub mod refresh_config_l;
-#[doc = "DAC0_CAL (r) register accessor: DAC0 Calibration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dac0_cal::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dac0_cal`]
+#[doc = "DAC0_CAL (r) register accessor: DAC0 Calibration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dac0_cal::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dac0_cal`]
 module"]
 #[doc(alias = "DAC0_CAL")]
 pub type Dac0Cal = crate::Reg<dac0_cal::Dac0CalSpec>;
 #[doc = "DAC0 Calibration Register"]
 pub mod dac0_cal;
-#[doc = "DAC1_CAL (r) register accessor: DAC1 Calibration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dac1_cal::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dac1_cal`]
+#[doc = "DAC1_CAL (r) register accessor: DAC1 Calibration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dac1_cal::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dac1_cal`]
 module"]
 #[doc(alias = "DAC1_CAL")]
 pub type Dac1Cal = crate::Reg<dac1_cal::Dac1CalSpec>;
 #[doc = "DAC1 Calibration Register"]
 pub mod dac1_cal;
-#[doc = "ADC_CAL (r) register accessor: ADC Calibration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`adc_cal::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@adc_cal`]
+#[doc = "ADC_CAL (r) register accessor: ADC Calibration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`adc_cal::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@adc_cal`]
 module"]
 #[doc(alias = "ADC_CAL")]
 pub type AdcCal = crate::Reg<adc_cal::AdcCalSpec>;
 #[doc = "ADC Calibration Register"]
 pub mod adc_cal;
-#[doc = "BG_CAL (r) register accessor: Bandgap Calibration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`bg_cal::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bg_cal`]
+#[doc = "BG_CAL (r) register accessor: Bandgap Calibration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`bg_cal::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bg_cal`]
 module"]
 #[doc(alias = "BG_CAL")]
 pub type BgCal = crate::Reg<bg_cal::BgCalSpec>;
 #[doc = "Bandgap Calibration Register"]
 pub mod bg_cal;
-#[doc = "DREG_CAL (r) register accessor: Digital LDO Regulator Calibration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dreg_cal::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dreg_cal`]
+#[doc = "DREG_CAL (r) register accessor: Digital LDO Regulator Calibration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dreg_cal::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dreg_cal`]
 module"]
 #[doc(alias = "DREG_CAL")]
 pub type DregCal = crate::Reg<dreg_cal::DregCalSpec>;
 #[doc = "Digital LDO Regulator Calibration Register"]
 pub mod dreg_cal;
-#[doc = "AREG_CAL (r) register accessor: Analog LDO Regulator Calibration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`areg_cal::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@areg_cal`]
+#[doc = "AREG_CAL (r) register accessor: Analog LDO Regulator Calibration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`areg_cal::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@areg_cal`]
 module"]
 #[doc(alias = "AREG_CAL")]
 pub type AregCal = crate::Reg<areg_cal::AregCalSpec>;
 #[doc = "Analog LDO Regulator Calibration Register"]
 pub mod areg_cal;
-#[doc = "HBO_CAL (r) register accessor: Heart Beat OSC Calibration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hbo_cal::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hbo_cal`]
+#[doc = "HBO_CAL (r) register accessor: Heart Beat OSC Calibration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`hbo_cal::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hbo_cal`]
 module"]
 #[doc(alias = "HBO_CAL")]
 pub type HboCal = crate::Reg<hbo_cal::HboCalSpec>;
 #[doc = "Heart Beat OSC Calibration Register"]
 pub mod hbo_cal;
-#[doc = "EF_CONFIG (r) register accessor: EFuse Config Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ef_config::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ef_config`]
+#[doc = "EF_CONFIG (r) register accessor: EFuse Config Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ef_config::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ef_config`]
 module"]
 #[doc(alias = "EF_CONFIG")]
 pub type EfConfig = crate::Reg<ef_config::EfConfigSpec>;
 #[doc = "EFuse Config Register"]
 pub mod ef_config;
-#[doc = "EF_ID0 (r) register accessor: EFuse ID0 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ef_id0::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ef_id0`]
+#[doc = "EF_ID0 (r) register accessor: EFuse ID0 Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ef_id0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ef_id0`]
 module"]
 #[doc(alias = "EF_ID0")]
 pub type EfId0 = crate::Reg<ef_id0::EfId0Spec>;
 #[doc = "EFuse ID0 Register"]
 pub mod ef_id0;
-#[doc = "EF_ID1 (r) register accessor: EFuse ID1 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ef_id1::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ef_id1`]
+#[doc = "EF_ID1 (r) register accessor: EFuse ID1 Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ef_id1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ef_id1`]
 module"]
 #[doc(alias = "EF_ID1")]
 pub type EfId1 = crate::Reg<ef_id1::EfId1Spec>;
 #[doc = "EFuse ID1 Register"]
 pub mod ef_id1;
-#[doc = "PROCID (r) register accessor: Processor ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`procid::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@procid`]
+#[doc = "PROCID (r) register accessor: Processor ID Register\n\nYou can [`read`](crate::Reg::read) this register and get [`procid::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@procid`]
 module"]
 #[doc(alias = "PROCID")]
 pub type Procid = crate::Reg<procid::ProcidSpec>;
 #[doc = "Processor ID Register"]
 pub mod procid;
-#[doc = "PERID (r) register accessor: Peripheral ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`perid::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@perid`]
+#[doc = "PERID (r) register accessor: Peripheral ID Register\n\nYou can [`read`](crate::Reg::read) this register and get [`perid::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@perid`]
 module"]
 #[doc(alias = "PERID")]
 pub type Perid = crate::Reg<perid::PeridSpec>;
diff --git a/va416xx/src/sysconfig/adc_cal.rs b/va416xx/src/sysconfig/adc_cal.rs
index c06c3e1..079a8a0 100644
--- a/va416xx/src/sysconfig/adc_cal.rs
+++ b/va416xx/src/sysconfig/adc_cal.rs
@@ -9,7 +9,7 @@ impl R {
         AdcCalR::new((self.bits & 0x1f) as u8)
     }
 }
-#[doc = "ADC Calibration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`adc_cal::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "ADC Calibration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`adc_cal::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct AdcCalSpec;
 impl crate::RegisterSpec for AdcCalSpec {
     type Ux = u32;
diff --git a/va416xx/src/sysconfig/analog_cntl.rs b/va416xx/src/sysconfig/analog_cntl.rs
index 6001d88..5763009 100644
--- a/va416xx/src/sysconfig/analog_cntl.rs
+++ b/va416xx/src/sysconfig/analog_cntl.rs
@@ -133,90 +133,76 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Test Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn tmosc(&mut self) -> TmoscW<AnalogCntlSpec> {
         TmoscW::new(self, 0)
     }
     #[doc = "Bit 1 - Test Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn tmpokdis(&mut self) -> TmpokdisW<AnalogCntlSpec> {
         TmpokdisW::new(self, 1)
     }
     #[doc = "Bit 2 - Test Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn tm_adcmux_n(&mut self) -> TmAdcmuxNW<AnalogCntlSpec> {
         TmAdcmuxNW::new(self, 2)
     }
     #[doc = "Bit 3 - Test Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn tm_adcmux_p(&mut self) -> TmAdcmuxPW<AnalogCntlSpec> {
         TmAdcmuxPW::new(self, 3)
     }
     #[doc = "Bit 4 - Test Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn tmratio(&mut self) -> TmratioW<AnalogCntlSpec> {
         TmratioW::new(self, 4)
     }
     #[doc = "Bits 5:6 - Test Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn tmatomux(&mut self) -> TmatomuxW<AnalogCntlSpec> {
         TmatomuxW::new(self, 5)
     }
     #[doc = "Bits 9:12 - Number of clocks for sample time"]
     #[inline(always)]
-    #[must_use]
     pub fn adc_stest(&mut self) -> AdcStestW<AnalogCntlSpec> {
         AdcStestW::new(self, 9)
     }
     #[doc = "Bit 14 - Enable normal test clock"]
     #[inline(always)]
-    #[must_use]
     pub fn rclk_pos_en(&mut self) -> RclkPosEnW<AnalogCntlSpec> {
         RclkPosEnW::new(self, 14)
     }
     #[doc = "Bit 15 - Enable inverted test clock"]
     #[inline(always)]
-    #[must_use]
     pub fn rclk_neg_en(&mut self) -> RclkNegEnW<AnalogCntlSpec> {
         RclkNegEnW::new(self, 15)
     }
     #[doc = "Bit 16 - Enable normal APB2CLK for test output"]
     #[inline(always)]
-    #[must_use]
     pub fn apb2clk_pos_en(&mut self) -> Apb2clkPosEnW<AnalogCntlSpec> {
         Apb2clkPosEnW::new(self, 16)
     }
     #[doc = "Bit 17 - Enable inverted APB2CLK for test output"]
     #[inline(always)]
-    #[must_use]
     pub fn apb2clk_neg_en(&mut self) -> Apb2clkNegEnW<AnalogCntlSpec> {
         Apb2clkNegEnW::new(self, 17)
     }
     #[doc = "Bit 18 - Enables pull down on analog pads"]
     #[inline(always)]
-    #[must_use]
     pub fn tm_analog_pd_en(&mut self) -> TmAnalogPdEnW<AnalogCntlSpec> {
         TmAnalogPdEnW::new(self, 18)
     }
     #[doc = "Bit 19 - Enables a skip of all delay counters and eFuse read"]
     #[inline(always)]
-    #[must_use]
     pub fn jmp2boot(&mut self) -> Jmp2bootW<AnalogCntlSpec> {
         Jmp2bootW::new(self, 19)
     }
     #[doc = "Bit 20 - Enables a skip of all delay counters, eFuse read, and boot"]
     #[inline(always)]
-    #[must_use]
     pub fn skipboot(&mut self) -> SkipbootW<AnalogCntlSpec> {
         SkipbootW::new(self, 20)
     }
 }
-#[doc = "Analog Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`analog_cntl::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`analog_cntl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Analog Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`analog_cntl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`analog_cntl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct AnalogCntlSpec;
 impl crate::RegisterSpec for AnalogCntlSpec {
     type Ux = u32;
diff --git a/va416xx/src/sysconfig/areg_cal.rs b/va416xx/src/sysconfig/areg_cal.rs
index afc4b2f..d217f7a 100644
--- a/va416xx/src/sysconfig/areg_cal.rs
+++ b/va416xx/src/sysconfig/areg_cal.rs
@@ -9,7 +9,7 @@ impl R {
         AregCalR::new((self.bits & 0x01ff) as u16)
     }
 }
-#[doc = "Analog LDO Regulator Calibration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`areg_cal::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Analog LDO Regulator Calibration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`areg_cal::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct AregCalSpec;
 impl crate::RegisterSpec for AregCalSpec {
     type Ux = u32;
diff --git a/va416xx/src/sysconfig/bg_cal.rs b/va416xx/src/sysconfig/bg_cal.rs
index 8e21f23..c109c9a 100644
--- a/va416xx/src/sysconfig/bg_cal.rs
+++ b/va416xx/src/sysconfig/bg_cal.rs
@@ -9,7 +9,7 @@ impl R {
         BgCalR::new((self.bits & 7) as u8)
     }
 }
-#[doc = "Bandgap Calibration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`bg_cal::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Bandgap Calibration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`bg_cal::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct BgCalSpec;
 impl crate::RegisterSpec for BgCalSpec {
     type Ux = u32;
diff --git a/va416xx/src/sysconfig/dac0_cal.rs b/va416xx/src/sysconfig/dac0_cal.rs
index ba817c9..b7e07ae 100644
--- a/va416xx/src/sysconfig/dac0_cal.rs
+++ b/va416xx/src/sysconfig/dac0_cal.rs
@@ -9,7 +9,7 @@ impl R {
         Dac0CalR::new((self.bits & 0x1f) as u8)
     }
 }
-#[doc = "DAC0 Calibration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dac0_cal::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "DAC0 Calibration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dac0_cal::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Dac0CalSpec;
 impl crate::RegisterSpec for Dac0CalSpec {
     type Ux = u32;
diff --git a/va416xx/src/sysconfig/dac1_cal.rs b/va416xx/src/sysconfig/dac1_cal.rs
index 28d6dcc..800c47f 100644
--- a/va416xx/src/sysconfig/dac1_cal.rs
+++ b/va416xx/src/sysconfig/dac1_cal.rs
@@ -9,7 +9,7 @@ impl R {
         Dac1CalR::new((self.bits & 0x1f) as u8)
     }
 }
-#[doc = "DAC1 Calibration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dac1_cal::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "DAC1 Calibration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dac1_cal::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Dac1CalSpec;
 impl crate::RegisterSpec for Dac1CalSpec {
     type Ux = u32;
diff --git a/va416xx/src/sysconfig/dreg_cal.rs b/va416xx/src/sysconfig/dreg_cal.rs
index c6778db..e4dfa09 100644
--- a/va416xx/src/sysconfig/dreg_cal.rs
+++ b/va416xx/src/sysconfig/dreg_cal.rs
@@ -9,7 +9,7 @@ impl R {
         DregCalR::new((self.bits & 0x01ff) as u16)
     }
 }
-#[doc = "Digital LDO Regulator Calibration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dreg_cal::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Digital LDO Regulator Calibration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dreg_cal::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct DregCalSpec;
 impl crate::RegisterSpec for DregCalSpec {
     type Ux = u32;
diff --git a/va416xx/src/sysconfig/ebi_cfg0.rs b/va416xx/src/sysconfig/ebi_cfg0.rs
index 08bb521..27b763e 100644
--- a/va416xx/src/sysconfig/ebi_cfg0.rs
+++ b/va416xx/src/sysconfig/ebi_cfg0.rs
@@ -61,42 +61,36 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Lower bound address for CEN0"]
     #[inline(always)]
-    #[must_use]
     pub fn addrlow0(&mut self) -> Addrlow0W<EbiCfg0Spec> {
         Addrlow0W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Upper bound address for CEN0"]
     #[inline(always)]
-    #[must_use]
     pub fn addrhigh0(&mut self) -> Addrhigh0W<EbiCfg0Spec> {
         Addrhigh0W::new(self, 8)
     }
     #[doc = "Bits 16:18 - Number of cycles for a read - N plus 1"]
     #[inline(always)]
-    #[must_use]
     pub fn cfgreadcycle(&mut self) -> CfgreadcycleW<EbiCfg0Spec> {
         CfgreadcycleW::new(self, 16)
     }
     #[doc = "Bits 19:21 - Number of cycles for a write - N plus 1"]
     #[inline(always)]
-    #[must_use]
     pub fn cfgwritecycle(&mut self) -> CfgwritecycleW<EbiCfg0Spec> {
         CfgwritecycleW::new(self, 19)
     }
     #[doc = "Bits 22:24 - Number of cycles for turnaround - N plus 1"]
     #[inline(always)]
-    #[must_use]
     pub fn cfgturnaroundcycle(&mut self) -> CfgturnaroundcycleW<EbiCfg0Spec> {
         CfgturnaroundcycleW::new(self, 22)
     }
     #[doc = "Bit 25 - 8 bit (0) or 16 bit (1) port size"]
     #[inline(always)]
-    #[must_use]
     pub fn cfgsize(&mut self) -> CfgsizeW<EbiCfg0Spec> {
         CfgsizeW::new(self, 25)
     }
 }
-#[doc = "EBI Config Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ebi_cfg0::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ebi_cfg0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "EBI Config Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`ebi_cfg0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ebi_cfg0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct EbiCfg0Spec;
 impl crate::RegisterSpec for EbiCfg0Spec {
     type Ux = u32;
diff --git a/va416xx/src/sysconfig/ef_config.rs b/va416xx/src/sysconfig/ef_config.rs
index 462b89e..003f68f 100644
--- a/va416xx/src/sysconfig/ef_config.rs
+++ b/va416xx/src/sysconfig/ef_config.rs
@@ -79,7 +79,7 @@ impl R {
         WmR::new(((self.bits >> 28) & 1) != 0)
     }
 }
-#[doc = "EFuse Config Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ef_config::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "EFuse Config Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ef_config::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct EfConfigSpec;
 impl crate::RegisterSpec for EfConfigSpec {
     type Ux = u32;
diff --git a/va416xx/src/sysconfig/ef_id0.rs b/va416xx/src/sysconfig/ef_id0.rs
index 1cc8166..bd02128 100644
--- a/va416xx/src/sysconfig/ef_id0.rs
+++ b/va416xx/src/sysconfig/ef_id0.rs
@@ -5,7 +5,7 @@ impl core::fmt::Debug for R {
         write!(f, "{}", self.bits())
     }
 }
-#[doc = "EFuse ID0 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ef_id0::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "EFuse ID0 Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ef_id0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct EfId0Spec;
 impl crate::RegisterSpec for EfId0Spec {
     type Ux = u32;
diff --git a/va416xx/src/sysconfig/ef_id1.rs b/va416xx/src/sysconfig/ef_id1.rs
index 4470af5..4d82c27 100644
--- a/va416xx/src/sysconfig/ef_id1.rs
+++ b/va416xx/src/sysconfig/ef_id1.rs
@@ -5,7 +5,7 @@ impl core::fmt::Debug for R {
         write!(f, "{}", self.bits())
     }
 }
-#[doc = "EFuse ID1 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ef_id1::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "EFuse ID1 Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ef_id1::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct EfId1Spec;
 impl crate::RegisterSpec for EfId1Spec {
     type Ux = u32;
diff --git a/va416xx/src/sysconfig/hbo_cal.rs b/va416xx/src/sysconfig/hbo_cal.rs
index 6817d67..b88ca62 100644
--- a/va416xx/src/sysconfig/hbo_cal.rs
+++ b/va416xx/src/sysconfig/hbo_cal.rs
@@ -16,7 +16,7 @@ impl R {
         OscCalR::new(((self.bits >> 3) & 1) != 0)
     }
 }
-#[doc = "Heart Beat OSC Calibration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hbo_cal::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Heart Beat OSC Calibration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`hbo_cal::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct HboCalSpec;
 impl crate::RegisterSpec for HboCalSpec {
     type Ux = u32;
diff --git a/va416xx/src/sysconfig/irq_enb.rs b/va416xx/src/sysconfig/irq_enb.rs
index 2f4635f..97d7103 100644
--- a/va416xx/src/sysconfig/irq_enb.rs
+++ b/va416xx/src/sysconfig/irq_enb.rs
@@ -61,42 +61,36 @@ impl R {
 impl W {
     #[doc = "Bit 0 - ROM Multi Bit Interrupt"]
     #[inline(always)]
-    #[must_use]
     pub fn rommbe(&mut self) -> RommbeW<IrqEnbSpec> {
         RommbeW::new(self, 0)
     }
     #[doc = "Bit 1 - ROM Single Bit Interrupt"]
     #[inline(always)]
-    #[must_use]
     pub fn romsbe(&mut self) -> RomsbeW<IrqEnbSpec> {
         RomsbeW::new(self, 1)
     }
     #[doc = "Bit 2 - RAM0 Multi Bit Interrupt"]
     #[inline(always)]
-    #[must_use]
     pub fn ram0mbe(&mut self) -> Ram0mbeW<IrqEnbSpec> {
         Ram0mbeW::new(self, 2)
     }
     #[doc = "Bit 3 - RAM0 Single Bit Interrupt"]
     #[inline(always)]
-    #[must_use]
     pub fn ram0sbe(&mut self) -> Ram0sbeW<IrqEnbSpec> {
         Ram0sbeW::new(self, 3)
     }
     #[doc = "Bit 4 - RAM1 Multi Bit Interrupt"]
     #[inline(always)]
-    #[must_use]
     pub fn ram1mbe(&mut self) -> Ram1mbeW<IrqEnbSpec> {
         Ram1mbeW::new(self, 4)
     }
     #[doc = "Bit 5 - RAM1 Single Bit Interrupt"]
     #[inline(always)]
-    #[must_use]
     pub fn ram1sbe(&mut self) -> Ram1sbeW<IrqEnbSpec> {
         Ram1sbeW::new(self, 5)
     }
 }
-#[doc = "Enable EDAC Error Interrupt Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_enb::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`irq_enb::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Enable EDAC Error Interrupt Register\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_enb::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`irq_enb::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct IrqEnbSpec;
 impl crate::RegisterSpec for IrqEnbSpec {
     type Ux = u32;
diff --git a/va416xx/src/sysconfig/perid.rs b/va416xx/src/sysconfig/perid.rs
index 5ba23b5..33f5643 100644
--- a/va416xx/src/sysconfig/perid.rs
+++ b/va416xx/src/sysconfig/perid.rs
@@ -23,7 +23,7 @@ impl R {
         PeripheralVerR::new(((self.bits >> 24) & 0xff) as u8)
     }
 }
-#[doc = "Peripheral ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`perid::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Peripheral ID Register\n\nYou can [`read`](crate::Reg::read) this register and get [`perid::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct PeridSpec;
 impl crate::RegisterSpec for PeridSpec {
     type Ux = u32;
diff --git a/va416xx/src/sysconfig/peripheral_reset.rs b/va416xx/src/sysconfig/peripheral_reset.rs
index ae813cc..779f4bc 100644
--- a/va416xx/src/sysconfig/peripheral_reset.rs
+++ b/va416xx/src/sysconfig/peripheral_reset.rs
@@ -286,192 +286,161 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Resetn of SPI0"]
     #[inline(always)]
-    #[must_use]
     pub fn spi0(&mut self) -> Spi0W<PeripheralResetSpec> {
         Spi0W::new(self, 0)
     }
     #[doc = "Bit 1 - Resetn of SPI1"]
     #[inline(always)]
-    #[must_use]
     pub fn spi1(&mut self) -> Spi1W<PeripheralResetSpec> {
         Spi1W::new(self, 1)
     }
     #[doc = "Bit 2 - Resetn of SPI2"]
     #[inline(always)]
-    #[must_use]
     pub fn spi2(&mut self) -> Spi2W<PeripheralResetSpec> {
         Spi2W::new(self, 2)
     }
     #[doc = "Bit 3 - Resetn of SPI3"]
     #[inline(always)]
-    #[must_use]
     pub fn spi3(&mut self) -> Spi3W<PeripheralResetSpec> {
         Spi3W::new(self, 3)
     }
     #[doc = "Bit 4 - Resetn of UART0"]
     #[inline(always)]
-    #[must_use]
     pub fn uart0(&mut self) -> Uart0W<PeripheralResetSpec> {
         Uart0W::new(self, 4)
     }
     #[doc = "Bit 5 - Resetn of UART1"]
     #[inline(always)]
-    #[must_use]
     pub fn uart1(&mut self) -> Uart1W<PeripheralResetSpec> {
         Uart1W::new(self, 5)
     }
     #[doc = "Bit 6 - Resetn of UART2"]
     #[inline(always)]
-    #[must_use]
     pub fn uart2(&mut self) -> Uart2W<PeripheralResetSpec> {
         Uart2W::new(self, 6)
     }
     #[doc = "Bit 7 - Resetn of I2C0"]
     #[inline(always)]
-    #[must_use]
     pub fn i2c0(&mut self) -> I2c0W<PeripheralResetSpec> {
         I2c0W::new(self, 7)
     }
     #[doc = "Bit 8 - Resetn of I2C1"]
     #[inline(always)]
-    #[must_use]
     pub fn i2c1(&mut self) -> I2c1W<PeripheralResetSpec> {
         I2c1W::new(self, 8)
     }
     #[doc = "Bit 9 - Resetn of I2C2"]
     #[inline(always)]
-    #[must_use]
     pub fn i2c2(&mut self) -> I2c2W<PeripheralResetSpec> {
         I2c2W::new(self, 9)
     }
     #[doc = "Bit 10 - Resetn of CAN0"]
     #[inline(always)]
-    #[must_use]
     pub fn can0(&mut self) -> Can0W<PeripheralResetSpec> {
         Can0W::new(self, 10)
     }
     #[doc = "Bit 11 - Resetn of CAN1"]
     #[inline(always)]
-    #[must_use]
     pub fn can1(&mut self) -> Can1W<PeripheralResetSpec> {
         Can1W::new(self, 11)
     }
     #[doc = "Bit 12 - Resetn of TRNG"]
     #[inline(always)]
-    #[must_use]
     pub fn trng(&mut self) -> TrngW<PeripheralResetSpec> {
         TrngW::new(self, 12)
     }
     #[doc = "Bit 13 - Resetn of ADC"]
     #[inline(always)]
-    #[must_use]
     pub fn adc(&mut self) -> AdcW<PeripheralResetSpec> {
         AdcW::new(self, 13)
     }
     #[doc = "Bit 14 - Resetn of DAC"]
     #[inline(always)]
-    #[must_use]
     pub fn dac(&mut self) -> DacW<PeripheralResetSpec> {
         DacW::new(self, 14)
     }
     #[doc = "Bit 15 - Resetn of DMA"]
     #[inline(always)]
-    #[must_use]
     pub fn dma(&mut self) -> DmaW<PeripheralResetSpec> {
         DmaW::new(self, 15)
     }
     #[doc = "Bit 16 - Resetn of EBI"]
     #[inline(always)]
-    #[must_use]
     pub fn ebi(&mut self) -> EbiW<PeripheralResetSpec> {
         EbiW::new(self, 16)
     }
     #[doc = "Bit 17 - Resetn of Ethernet"]
     #[inline(always)]
-    #[must_use]
     pub fn eth(&mut self) -> EthW<PeripheralResetSpec> {
         EthW::new(self, 17)
     }
     #[doc = "Bit 18 - Resetn of SpaceWire"]
     #[inline(always)]
-    #[must_use]
     pub fn spw(&mut self) -> SpwW<PeripheralResetSpec> {
         SpwW::new(self, 18)
     }
     #[doc = "Bit 19 - RESETn of PLL in Clock Generation Module"]
     #[inline(always)]
-    #[must_use]
     pub fn clkgen(&mut self) -> ClkgenW<PeripheralResetSpec> {
         ClkgenW::new(self, 19)
     }
     #[doc = "Bit 20 - Resetn of IRQ Router"]
     #[inline(always)]
-    #[must_use]
     pub fn irq(&mut self) -> IrqW<PeripheralResetSpec> {
         IrqW::new(self, 20)
     }
     #[doc = "Bit 21 - Resetn of IO CONFIG"]
     #[inline(always)]
-    #[must_use]
     pub fn ioconfig(&mut self) -> IoconfigW<PeripheralResetSpec> {
         IoconfigW::new(self, 21)
     }
     #[doc = "Bit 22 - Resetn of UTILITY peripheral"]
     #[inline(always)]
-    #[must_use]
     pub fn utility(&mut self) -> UtilityW<PeripheralResetSpec> {
         UtilityW::new(self, 22)
     }
     #[doc = "Bit 23 - Resetn of WDOG"]
     #[inline(always)]
-    #[must_use]
     pub fn wdog(&mut self) -> WdogW<PeripheralResetSpec> {
         WdogW::new(self, 23)
     }
     #[doc = "Bit 24 - Resetn of PORTA"]
     #[inline(always)]
-    #[must_use]
     pub fn porta(&mut self) -> PortaW<PeripheralResetSpec> {
         PortaW::new(self, 24)
     }
     #[doc = "Bit 25 - Resetn of PORTB"]
     #[inline(always)]
-    #[must_use]
     pub fn portb(&mut self) -> PortbW<PeripheralResetSpec> {
         PortbW::new(self, 25)
     }
     #[doc = "Bit 26 - Resetn of PORTC"]
     #[inline(always)]
-    #[must_use]
     pub fn portc(&mut self) -> PortcW<PeripheralResetSpec> {
         PortcW::new(self, 26)
     }
     #[doc = "Bit 27 - Resetn of PORTD"]
     #[inline(always)]
-    #[must_use]
     pub fn portd(&mut self) -> PortdW<PeripheralResetSpec> {
         PortdW::new(self, 27)
     }
     #[doc = "Bit 28 - Resetn of PORTE"]
     #[inline(always)]
-    #[must_use]
     pub fn porte(&mut self) -> PorteW<PeripheralResetSpec> {
         PorteW::new(self, 28)
     }
     #[doc = "Bit 29 - Resetn of PORTF"]
     #[inline(always)]
-    #[must_use]
     pub fn portf(&mut self) -> PortfW<PeripheralResetSpec> {
         PortfW::new(self, 29)
     }
     #[doc = "Bit 30 - Resetn of PORTG"]
     #[inline(always)]
-    #[must_use]
     pub fn portg(&mut self) -> PortgW<PeripheralResetSpec> {
         PortgW::new(self, 30)
     }
 }
-#[doc = "Peripheral Reset Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`peripheral_reset::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`peripheral_reset::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Peripheral Reset Control\n\nYou can [`read`](crate::Reg::read) this register and get [`peripheral_reset::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`peripheral_reset::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct PeripheralResetSpec;
 impl crate::RegisterSpec for PeripheralResetSpec {
     type Ux = u32;
diff --git a/va416xx/src/sysconfig/pmu_ctrl.rs b/va416xx/src/sysconfig/pmu_ctrl.rs
index 6fae35d..3c43eb9 100644
--- a/va416xx/src/sysconfig/pmu_ctrl.rs
+++ b/va416xx/src/sysconfig/pmu_ctrl.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:1 - Select the POK detect level"]
     #[inline(always)]
-    #[must_use]
     pub fn lvl_slct(&mut self) -> LvlSlctW<PmuCtrlSpec> {
         LvlSlctW::new(self, 0)
     }
 }
-#[doc = "PMU Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pmu_ctrl::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pmu_ctrl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "PMU Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pmu_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pmu_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct PmuCtrlSpec;
 impl crate::RegisterSpec for PmuCtrlSpec {
     type Ux = u32;
diff --git a/va416xx/src/sysconfig/procid.rs b/va416xx/src/sysconfig/procid.rs
index ae1cf1b..e73a814 100644
--- a/va416xx/src/sysconfig/procid.rs
+++ b/va416xx/src/sysconfig/procid.rs
@@ -5,7 +5,7 @@ impl core::fmt::Debug for R {
         write!(f, "{}", self.bits())
     }
 }
-#[doc = "Processor ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`procid::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Processor ID Register\n\nYou can [`read`](crate::Reg::read) this register and get [`procid::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct ProcidSpec;
 impl crate::RegisterSpec for ProcidSpec {
     type Ux = u32;
diff --git a/va416xx/src/sysconfig/ram0_mbe.rs b/va416xx/src/sysconfig/ram0_mbe.rs
index d6d6207..0b5d27d 100644
--- a/va416xx/src/sysconfig/ram0_mbe.rs
+++ b/va416xx/src/sysconfig/ram0_mbe.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - RAM0 Multi Bit Errors"]
     #[inline(always)]
-    #[must_use]
     pub fn count(&mut self) -> CountW<Ram0MbeSpec> {
         CountW::new(self, 0)
     }
 }
-#[doc = "Count of RAM0 EDAC Multi Bit Errors\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ram0_mbe::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ram0_mbe::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Count of RAM0 EDAC Multi Bit Errors\n\nYou can [`read`](crate::Reg::read) this register and get [`ram0_mbe::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ram0_mbe::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Ram0MbeSpec;
 impl crate::RegisterSpec for Ram0MbeSpec {
     type Ux = u32;
diff --git a/va416xx/src/sysconfig/ram0_sbe.rs b/va416xx/src/sysconfig/ram0_sbe.rs
index c84d091..0cb384c 100644
--- a/va416xx/src/sysconfig/ram0_sbe.rs
+++ b/va416xx/src/sysconfig/ram0_sbe.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - RAM0 EDAC Single Bit Errors"]
     #[inline(always)]
-    #[must_use]
     pub fn count(&mut self) -> CountW<Ram0SbeSpec> {
         CountW::new(self, 0)
     }
 }
-#[doc = "Count of RAM0 EDAC Single Bit Errors\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ram0_sbe::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ram0_sbe::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Count of RAM0 EDAC Single Bit Errors\n\nYou can [`read`](crate::Reg::read) this register and get [`ram0_sbe::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ram0_sbe::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Ram0SbeSpec;
 impl crate::RegisterSpec for Ram0SbeSpec {
     type Ux = u32;
diff --git a/va416xx/src/sysconfig/refresh_config_h.rs b/va416xx/src/sysconfig/refresh_config_h.rs
index 6573d77..0c8909b 100644
--- a/va416xx/src/sysconfig/refresh_config_h.rs
+++ b/va416xx/src/sysconfig/refresh_config_h.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Upper 8-bits of the Refresh Rate Counter. Registers are refreshed every DIVCOUNT+1 cycles"]
     #[inline(always)]
-    #[must_use]
     pub fn divcount(&mut self) -> DivcountW<RefreshConfigHSpec> {
         DivcountW::new(self, 0)
     }
     #[doc = "Bits 30:31 - Special Test Mode Configuration. 00/01=normal. 10=Force refresh off. 11=Force refresh on constantly."]
     #[inline(always)]
-    #[must_use]
     pub fn testmode(&mut self) -> TestmodeW<RefreshConfigHSpec> {
         TestmodeW::new(self, 30)
     }
 }
-#[doc = "Register Refresh Rate for TMR registers\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`refresh_config_h::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`refresh_config_h::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Register Refresh Rate for TMR registers\n\nYou can [`read`](crate::Reg::read) this register and get [`refresh_config_h::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`refresh_config_h::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct RefreshConfigHSpec;
 impl crate::RegisterSpec for RefreshConfigHSpec {
     type Ux = u32;
diff --git a/va416xx/src/sysconfig/refresh_config_l.rs b/va416xx/src/sysconfig/refresh_config_l.rs
index c8d1367..8ab138f 100644
--- a/va416xx/src/sysconfig/refresh_config_l.rs
+++ b/va416xx/src/sysconfig/refresh_config_l.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:31 - Lower 32-bits of the Refresh Rate Counter. Registers are refreshed every DIVCOUNT+1 cycles"]
     #[inline(always)]
-    #[must_use]
     pub fn divcount(&mut self) -> DivcountW<RefreshConfigLSpec> {
         DivcountW::new(self, 0)
     }
 }
-#[doc = "Register Refresh Rate for TMR registers\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`refresh_config_l::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`refresh_config_l::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Register Refresh Rate for TMR registers\n\nYou can [`read`](crate::Reg::read) this register and get [`refresh_config_l::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`refresh_config_l::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct RefreshConfigLSpec;
 impl crate::RegisterSpec for RefreshConfigLSpec {
     type Ux = u32;
diff --git a/va416xx/src/sysconfig/rom_prot.rs b/va416xx/src/sysconfig/rom_prot.rs
index 657c3ab..4206d2a 100644
--- a/va416xx/src/sysconfig/rom_prot.rs
+++ b/va416xx/src/sysconfig/rom_prot.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bit 0 - ROM Write Enable Bit"]
     #[inline(always)]
-    #[must_use]
     pub fn wren(&mut self) -> WrenW<RomProtSpec> {
         WrenW::new(self, 0)
     }
 }
-#[doc = "ROM Protection Configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rom_prot::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rom_prot::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "ROM Protection Configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`rom_prot::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rom_prot::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct RomProtSpec;
 impl crate::RegisterSpec for RomProtSpec {
     type Ux = u32;
diff --git a/va416xx/src/sysconfig/rom_retries.rs b/va416xx/src/sysconfig/rom_retries.rs
index 8f60e8a..cb7f32c 100644
--- a/va416xx/src/sysconfig/rom_retries.rs
+++ b/va416xx/src/sysconfig/rom_retries.rs
@@ -9,7 +9,7 @@ impl R {
         CountR::new((self.bits & 0xff) as u8)
     }
 }
-#[doc = "ROM BOOT Retry count\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rom_retries::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "ROM BOOT Retry count\n\nYou can [`read`](crate::Reg::read) this register and get [`rom_retries::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct RomRetriesSpec;
 impl crate::RegisterSpec for RomRetriesSpec {
     type Ux = u32;
diff --git a/va416xx/src/sysconfig/rom_scrub.rs b/va416xx/src/sysconfig/rom_scrub.rs
index 20d5262..906cfdc 100644
--- a/va416xx/src/sysconfig/rom_scrub.rs
+++ b/va416xx/src/sysconfig/rom_scrub.rs
@@ -18,18 +18,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:23 - Counter divide value"]
     #[inline(always)]
-    #[must_use]
     pub fn value(&mut self) -> ValueW<RomScrubSpec> {
         ValueW::new(self, 0)
     }
     #[doc = "Bit 31 - Reset Counter"]
     #[inline(always)]
-    #[must_use]
     pub fn reset(&mut self) -> ResetW<RomScrubSpec> {
         ResetW::new(self, 31)
     }
 }
-#[doc = "ROM Scrub Period Configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rom_scrub::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rom_scrub::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "ROM Scrub Period Configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`rom_scrub::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rom_scrub::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct RomScrubSpec;
 impl crate::RegisterSpec for RomScrubSpec {
     type Ux = u32;
diff --git a/va416xx/src/sysconfig/rst_stat.rs b/va416xx/src/sysconfig/rst_stat.rs
index 2424cab..867d1da 100644
--- a/va416xx/src/sysconfig/rst_stat.rs
+++ b/va416xx/src/sysconfig/rst_stat.rs
@@ -59,36 +59,31 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Power On Reset Status"]
     #[inline(always)]
-    #[must_use]
     pub fn por(&mut self) -> PorW<RstStatSpec> {
         PorW::new(self, 0)
     }
     #[doc = "Bit 1 - External Reset Status"]
     #[inline(always)]
-    #[must_use]
     pub fn extrst(&mut self) -> ExtrstW<RstStatSpec> {
         ExtrstW::new(self, 1)
     }
     #[doc = "Bit 2 - SYSRESETREQ Reset Status"]
     #[inline(always)]
-    #[must_use]
     pub fn sysrstreq(&mut self) -> SysrstreqW<RstStatSpec> {
         SysrstreqW::new(self, 2)
     }
     #[doc = "Bit 3 - LOOKUP Reset Status"]
     #[inline(always)]
-    #[must_use]
     pub fn lookup(&mut self) -> LookupW<RstStatSpec> {
         LookupW::new(self, 3)
     }
     #[doc = "Bit 4 - WATCHDOG Reset Status"]
     #[inline(always)]
-    #[must_use]
     pub fn watchdog(&mut self) -> WatchdogW<RstStatSpec> {
         WatchdogW::new(self, 4)
     }
 }
-#[doc = "System Reset Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rst_stat::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rst_stat::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "System Reset Status\n\nYou can [`read`](crate::Reg::read) this register and get [`rst_stat::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rst_stat::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct RstStatSpec;
 impl crate::RegisterSpec for RstStatSpec {
     type Ux = u32;
diff --git a/va416xx/src/sysconfig/spw_m4_ctrl.rs b/va416xx/src/sysconfig/spw_m4_ctrl.rs
index 98b6e0e..73d2d57 100644
--- a/va416xx/src/sysconfig/spw_m4_ctrl.rs
+++ b/va416xx/src/sysconfig/spw_m4_ctrl.rs
@@ -34,24 +34,21 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - Fuse-analog register writes enabled when key = 0xfeed"]
     #[inline(always)]
-    #[must_use]
     pub fn reg_wr_key(&mut self) -> RegWrKeyW<SpwM4CtrlSpec> {
         RegWrKeyW::new(self, 0)
     }
     #[doc = "Bit 16 - SPW pad enable"]
     #[inline(always)]
-    #[must_use]
     pub fn spw_pad_en(&mut self) -> SpwPadEnW<SpwM4CtrlSpec> {
         SpwPadEnW::new(self, 16)
     }
     #[doc = "Bit 17 - Lockup reset enable"]
     #[inline(always)]
-    #[must_use]
     pub fn lren(&mut self) -> LrenW<SpwM4CtrlSpec> {
         LrenW::new(self, 17)
     }
 }
-#[doc = "SPW M4 control register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`spw_m4_ctrl::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`spw_m4_ctrl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "SPW M4 control register\n\nYou can [`read`](crate::Reg::read) this register and get [`spw_m4_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`spw_m4_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct SpwM4CtrlSpec;
 impl crate::RegisterSpec for SpwM4CtrlSpec {
     type Ux = u32;
diff --git a/va416xx/src/sysconfig/sw_clkdiv10.rs b/va416xx/src/sysconfig/sw_clkdiv10.rs
index 966c53e..09d0c03 100644
--- a/va416xx/src/sysconfig/sw_clkdiv10.rs
+++ b/va416xx/src/sysconfig/sw_clkdiv10.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Defines the initial value for the SpW clock, defaults to divide by ten"]
     #[inline(always)]
-    #[must_use]
     pub fn sw_clkdiv10(&mut self) -> SwClkdiv10W<SwClkdiv10Spec> {
         SwClkdiv10W::new(self, 0)
     }
 }
-#[doc = "Initial SpW Clock Divider Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sw_clkdiv10::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sw_clkdiv10::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Initial SpW Clock Divider Value\n\nYou can [`read`](crate::Reg::read) this register and get [`sw_clkdiv10::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sw_clkdiv10::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct SwClkdiv10Spec;
 impl crate::RegisterSpec for SwClkdiv10Spec {
     type Ux = u32;
diff --git a/va416xx/src/sysconfig/tim_clk_enable.rs b/va416xx/src/sysconfig/tim_clk_enable.rs
index 20fbf6d..fda0be7 100644
--- a/va416xx/src/sysconfig/tim_clk_enable.rs
+++ b/va416xx/src/sysconfig/tim_clk_enable.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:23 - Clock enable of a given TIMER"]
     #[inline(always)]
-    #[must_use]
     pub fn timers(&mut self) -> TimersW<TimClkEnableSpec> {
         TimersW::new(self, 0)
     }
 }
-#[doc = "TIM Enable Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tim_clk_enable::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tim_clk_enable::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "TIM Enable Control\n\nYou can [`read`](crate::Reg::read) this register and get [`tim_clk_enable::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tim_clk_enable::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct TimClkEnableSpec;
 impl crate::RegisterSpec for TimClkEnableSpec {
     type Ux = u32;
diff --git a/va416xx/src/sysconfig/tim_reset.rs b/va416xx/src/sysconfig/tim_reset.rs
index dee7acf..5c1dfdc 100644
--- a/va416xx/src/sysconfig/tim_reset.rs
+++ b/va416xx/src/sysconfig/tim_reset.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:23 - Reset of a given TIMER"]
     #[inline(always)]
-    #[must_use]
     pub fn tim_reset(&mut self) -> TimResetW<TimResetSpec> {
         TimResetW::new(self, 0)
     }
 }
-#[doc = "TIM Reset Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tim_reset::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tim_reset::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "TIM Reset Control\n\nYou can [`read`](crate::Reg::read) this register and get [`tim_reset::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tim_reset::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct TimResetSpec;
 impl crate::RegisterSpec for TimResetSpec {
     type Ux = u32;
diff --git a/va416xx/src/sysconfig/wakeup_cnt.rs b/va416xx/src/sysconfig/wakeup_cnt.rs
index d83ae80..b024e73 100644
--- a/va416xx/src/sysconfig/wakeup_cnt.rs
+++ b/va416xx/src/sysconfig/wakeup_cnt.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:2 - Used to set a time to wake up the processor after the device has been put in a low power state"]
     #[inline(always)]
-    #[must_use]
     pub fn wkup_cnt(&mut self) -> WkupCntW<WakeupCntSpec> {
         WkupCntW::new(self, 0)
     }
     #[doc = "Bit 3 - Launch SLP mode in analog block"]
     #[inline(always)]
-    #[must_use]
     pub fn cntstrt(&mut self) -> CntstrtW<WakeupCntSpec> {
         CntstrtW::new(self, 3)
     }
 }
-#[doc = "Wakeup Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wakeup_cnt::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`wakeup_cnt::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Wakeup Control\n\nYou can [`read`](crate::Reg::read) this register and get [`wakeup_cnt::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wakeup_cnt::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct WakeupCntSpec;
 impl crate::RegisterSpec for WakeupCntSpec {
     type Ux = u32;
diff --git a/va416xx/src/tim0.rs b/va416xx/src/tim0.rs
index 2423944..b5931d7 100644
--- a/va416xx/src/tim0.rs
+++ b/va416xx/src/tim0.rs
@@ -58,12 +58,12 @@ impl RegisterBlock {
     #[doc = "0x20 - The Pulse Width Modulation ValueA"]
     #[inline(always)]
     pub const fn pwma_value(&self) -> &PwmaValue {
-        unsafe { &*(self as *const Self).cast::<u8>().add(32).cast() }
+        unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(32).cast() }
     }
     #[doc = "0x20 - The Pulse Width Modulation Value"]
     #[inline(always)]
     pub const fn pwm_value(&self) -> &PwmValue {
-        unsafe { &*(self as *const Self).cast::<u8>().add(32).cast() }
+        unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(32).cast() }
     }
     #[doc = "0x24 - The Pulse Width Modulation ValueB"]
     #[inline(always)]
@@ -76,37 +76,37 @@ impl RegisterBlock {
         &self.perid
     }
 }
-#[doc = "CTRL (rw) register accessor: Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctrl::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`]
+#[doc = "CTRL (rw) register accessor: Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`]
 module"]
 #[doc(alias = "CTRL")]
 pub type Ctrl = crate::Reg<ctrl::CtrlSpec>;
 #[doc = "Control Register"]
 pub mod ctrl;
-#[doc = "RST_VALUE (rw) register accessor: The value that counter start from after reaching 0.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rst_value::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rst_value::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rst_value`]
+#[doc = "RST_VALUE (rw) register accessor: The value that counter start from after reaching 0.\n\nYou can [`read`](crate::Reg::read) this register and get [`rst_value::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rst_value::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rst_value`]
 module"]
 #[doc(alias = "RST_VALUE")]
 pub type RstValue = crate::Reg<rst_value::RstValueSpec>;
 #[doc = "The value that counter start from after reaching 0."]
 pub mod rst_value;
-#[doc = "CNT_VALUE (rw) register accessor: The current value of the counter\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cnt_value::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cnt_value::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnt_value`]
+#[doc = "CNT_VALUE (rw) register accessor: The current value of the counter\n\nYou can [`read`](crate::Reg::read) this register and get [`cnt_value::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnt_value::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnt_value`]
 module"]
 #[doc(alias = "CNT_VALUE")]
 pub type CntValue = crate::Reg<cnt_value::CntValueSpec>;
 #[doc = "The current value of the counter"]
 pub mod cnt_value;
-#[doc = "ENABLE (rw) register accessor: Alternate access to the Counter ENABLE bit in the CTRL Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`enable::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`enable::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@enable`]
+#[doc = "ENABLE (rw) register accessor: Alternate access to the Counter ENABLE bit in the CTRL Register\n\nYou can [`read`](crate::Reg::read) this register and get [`enable::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`enable::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@enable`]
 module"]
 #[doc(alias = "ENABLE")]
 pub type Enable = crate::Reg<enable::EnableSpec>;
 #[doc = "Alternate access to the Counter ENABLE bit in the CTRL Register"]
 pub mod enable;
-#[doc = "CSD_CTRL (rw) register accessor: The Cascade Control Register. Controls the counter external enable signals\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`csd_ctrl::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`csd_ctrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@csd_ctrl`]
+#[doc = "CSD_CTRL (rw) register accessor: The Cascade Control Register. Controls the counter external enable signals\n\nYou can [`read`](crate::Reg::read) this register and get [`csd_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`csd_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@csd_ctrl`]
 module"]
 #[doc(alias = "CSD_CTRL")]
 pub type CsdCtrl = crate::Reg<csd_ctrl::CsdCtrlSpec>;
 #[doc = "The Cascade Control Register. Controls the counter external enable signals"]
 pub mod csd_ctrl;
-#[doc = "CASCADE0 (rw) register accessor: Cascade Enable Selection\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cascade0::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cascade0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cascade0`]
+#[doc = "CASCADE0 (rw) register accessor: Cascade Enable Selection\n\nYou can [`read`](crate::Reg::read) this register and get [`cascade0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cascade0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cascade0`]
 module"]
 #[doc(alias = "CASCADE0")]
 pub type Cascade0 = crate::Reg<cascade0::Cascade0Spec>;
@@ -116,25 +116,25 @@ pub use cascade0 as cascade1;
 pub use cascade0 as cascade2;
 pub use Cascade0 as Cascade1;
 pub use Cascade0 as Cascade2;
-#[doc = "PWM_VALUE (rw) register accessor: The Pulse Width Modulation Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pwm_value::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pwm_value::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pwm_value`]
+#[doc = "PWM_VALUE (rw) register accessor: The Pulse Width Modulation Value\n\nYou can [`read`](crate::Reg::read) this register and get [`pwm_value::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pwm_value::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pwm_value`]
 module"]
 #[doc(alias = "PWM_VALUE")]
 pub type PwmValue = crate::Reg<pwm_value::PwmValueSpec>;
 #[doc = "The Pulse Width Modulation Value"]
 pub mod pwm_value;
-#[doc = "PWMA_VALUE (rw) register accessor: The Pulse Width Modulation ValueA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pwma_value::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pwma_value::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pwma_value`]
+#[doc = "PWMA_VALUE (rw) register accessor: The Pulse Width Modulation ValueA\n\nYou can [`read`](crate::Reg::read) this register and get [`pwma_value::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pwma_value::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pwma_value`]
 module"]
 #[doc(alias = "PWMA_VALUE")]
 pub type PwmaValue = crate::Reg<pwma_value::PwmaValueSpec>;
 #[doc = "The Pulse Width Modulation ValueA"]
 pub mod pwma_value;
-#[doc = "PWMB_VALUE (rw) register accessor: The Pulse Width Modulation ValueB\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pwmb_value::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pwmb_value::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pwmb_value`]
+#[doc = "PWMB_VALUE (rw) register accessor: The Pulse Width Modulation ValueB\n\nYou can [`read`](crate::Reg::read) this register and get [`pwmb_value::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pwmb_value::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pwmb_value`]
 module"]
 #[doc(alias = "PWMB_VALUE")]
 pub type PwmbValue = crate::Reg<pwmb_value::PwmbValueSpec>;
 #[doc = "The Pulse Width Modulation ValueB"]
 pub mod pwmb_value;
-#[doc = "PERID (r) register accessor: Peripheral ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`perid::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@perid`]
+#[doc = "PERID (r) register accessor: Peripheral ID Register\n\nYou can [`read`](crate::Reg::read) this register and get [`perid::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@perid`]
 module"]
 #[doc(alias = "PERID")]
 pub type Perid = crate::Reg<perid::PeridSpec>;
diff --git a/va416xx/src/tim0/cascade0.rs b/va416xx/src/tim0/cascade0.rs
index 984dd73..3714cd5 100644
--- a/va416xx/src/tim0/cascade0.rs
+++ b/va416xx/src/tim0/cascade0.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Cascade Selection"]
     #[inline(always)]
-    #[must_use]
     pub fn cassel(&mut self) -> CasselW<Cascade0Spec> {
         CasselW::new(self, 0)
     }
 }
-#[doc = "Cascade Enable Selection\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cascade0::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cascade0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Cascade Enable Selection\n\nYou can [`read`](crate::Reg::read) this register and get [`cascade0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cascade0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Cascade0Spec;
 impl crate::RegisterSpec for Cascade0Spec {
     type Ux = u32;
diff --git a/va416xx/src/tim0/cnt_value.rs b/va416xx/src/tim0/cnt_value.rs
index f5ee38a..7ae8efe 100644
--- a/va416xx/src/tim0/cnt_value.rs
+++ b/va416xx/src/tim0/cnt_value.rs
@@ -8,7 +8,7 @@ impl core::fmt::Debug for R {
     }
 }
 impl W {}
-#[doc = "The current value of the counter\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cnt_value::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cnt_value::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "The current value of the counter\n\nYou can [`read`](crate::Reg::read) this register and get [`cnt_value::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnt_value::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct CntValueSpec;
 impl crate::RegisterSpec for CntValueSpec {
     type Ux = u32;
diff --git a/va416xx/src/tim0/csd_ctrl.rs b/va416xx/src/tim0/csd_ctrl.rs
index d7827ed..840d2d2 100644
--- a/va416xx/src/tim0/csd_ctrl.rs
+++ b/va416xx/src/tim0/csd_ctrl.rs
@@ -97,66 +97,56 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Cascade 0 Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn csden0(&mut self) -> Csden0W<CsdCtrlSpec> {
         Csden0W::new(self, 0)
     }
     #[doc = "Bit 1 - Cascade 0 Invert"]
     #[inline(always)]
-    #[must_use]
     pub fn csdinv0(&mut self) -> Csdinv0W<CsdCtrlSpec> {
         Csdinv0W::new(self, 1)
     }
     #[doc = "Bit 2 - Cascade 1 Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn csden1(&mut self) -> Csden1W<CsdCtrlSpec> {
         Csden1W::new(self, 2)
     }
     #[doc = "Bit 3 - Cascade 1 Invert"]
     #[inline(always)]
-    #[must_use]
     pub fn csdinv1(&mut self) -> Csdinv1W<CsdCtrlSpec> {
         Csdinv1W::new(self, 3)
     }
     #[doc = "Bit 4 - Dual Cascade Operation (0:AND, 1:OR)"]
     #[inline(always)]
-    #[must_use]
     pub fn dcasop(&mut self) -> DcasopW<CsdCtrlSpec> {
         DcasopW::new(self, 4)
     }
     #[doc = "Bit 6 - Cascade 0 Enabled as Trigger"]
     #[inline(always)]
-    #[must_use]
     pub fn csdtrg0(&mut self) -> Csdtrg0W<CsdCtrlSpec> {
         Csdtrg0W::new(self, 6)
     }
     #[doc = "Bit 7 - Cascade 1 Enabled as Trigger"]
     #[inline(always)]
-    #[must_use]
     pub fn csdtrg1(&mut self) -> Csdtrg1W<CsdCtrlSpec> {
         Csdtrg1W::new(self, 7)
     }
     #[doc = "Bit 8 - Cascade 2 Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn csden2(&mut self) -> Csden2W<CsdCtrlSpec> {
         Csden2W::new(self, 8)
     }
     #[doc = "Bit 9 - Cascade 2 Invert"]
     #[inline(always)]
-    #[must_use]
     pub fn csdinv2(&mut self) -> Csdinv2W<CsdCtrlSpec> {
         Csdinv2W::new(self, 9)
     }
     #[doc = "Bit 10 - Cascade 2 Trigger mode"]
     #[inline(always)]
-    #[must_use]
     pub fn csdtrg2(&mut self) -> Csdtrg2W<CsdCtrlSpec> {
         Csdtrg2W::new(self, 10)
     }
 }
-#[doc = "The Cascade Control Register. Controls the counter external enable signals\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`csd_ctrl::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`csd_ctrl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "The Cascade Control Register. Controls the counter external enable signals\n\nYou can [`read`](crate::Reg::read) this register and get [`csd_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`csd_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct CsdCtrlSpec;
 impl crate::RegisterSpec for CsdCtrlSpec {
     type Ux = u32;
diff --git a/va416xx/src/tim0/ctrl.rs b/va416xx/src/tim0/ctrl.rs
index 32b2b66..ca33018 100644
--- a/va416xx/src/tim0/ctrl.rs
+++ b/va416xx/src/tim0/ctrl.rs
@@ -32,11 +32,11 @@ pub enum StatusSel {
     Toggle = 2,
     #[doc = "3: Selects the Pulse Width Modulated output. It 1 when the counter value is >= the PWMA_VALUE"]
     Pwma = 3,
-    #[doc = "4: Selects the Pulse Width Modulated output. It 1 when the counter value is &lt; the PWMA_VALUE and value is > PWMA_VALUE"]
+    #[doc = "4: Selects the Pulse Width Modulated output. It 1 when the counter value is < the PWMA_VALUE and value is > PWMA_VALUE"]
     Pwmb = 4,
     #[doc = "5: Returns the counter ENABLED bit"]
     Enabled = 5,
-    #[doc = "6: Selects the Pulse Width Modulated output. It 1 when the counter value is &lt;= the PWMA_VALUE and value is >= 0"]
+    #[doc = "6: Selects the Pulse Width Modulated output. It 1 when the counter value is <= the PWMA_VALUE and value is >= 0"]
     PwmaActive = 6,
 }
 impl From<StatusSel> for u8 {
@@ -86,7 +86,7 @@ impl StatusSelR {
     pub fn is_pwma(&self) -> bool {
         *self == StatusSel::Pwma
     }
-    #[doc = "Selects the Pulse Width Modulated output. It 1 when the counter value is &lt; the PWMA_VALUE and value is > PWMA_VALUE"]
+    #[doc = "Selects the Pulse Width Modulated output. It 1 when the counter value is < the PWMA_VALUE and value is > PWMA_VALUE"]
     #[inline(always)]
     pub fn is_pwmb(&self) -> bool {
         *self == StatusSel::Pwmb
@@ -96,7 +96,7 @@ impl StatusSelR {
     pub fn is_enabled(&self) -> bool {
         *self == StatusSel::Enabled
     }
-    #[doc = "Selects the Pulse Width Modulated output. It 1 when the counter value is &lt;= the PWMA_VALUE and value is >= 0"]
+    #[doc = "Selects the Pulse Width Modulated output. It 1 when the counter value is <= the PWMA_VALUE and value is >= 0"]
     #[inline(always)]
     pub fn is_pwma_active(&self) -> bool {
         *self == StatusSel::PwmaActive
@@ -129,7 +129,7 @@ where
     pub fn pwma(self) -> &'a mut crate::W<REG> {
         self.variant(StatusSel::Pwma)
     }
-    #[doc = "Selects the Pulse Width Modulated output. It 1 when the counter value is &lt; the PWMA_VALUE and value is > PWMA_VALUE"]
+    #[doc = "Selects the Pulse Width Modulated output. It 1 when the counter value is < the PWMA_VALUE and value is > PWMA_VALUE"]
     #[inline(always)]
     pub fn pwmb(self) -> &'a mut crate::W<REG> {
         self.variant(StatusSel::Pwmb)
@@ -139,7 +139,7 @@ where
     pub fn enabled(self) -> &'a mut crate::W<REG> {
         self.variant(StatusSel::Enabled)
     }
-    #[doc = "Selects the Pulse Width Modulated output. It 1 when the counter value is &lt;= the PWMA_VALUE and value is >= 0"]
+    #[doc = "Selects the Pulse Width Modulated output. It 1 when the counter value is <= the PWMA_VALUE and value is >= 0"]
     #[inline(always)]
     pub fn pwma_active(self) -> &'a mut crate::W<REG> {
         self.variant(StatusSel::PwmaActive)
@@ -198,48 +198,41 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Counter Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn enable(&mut self) -> EnableW<CtrlSpec> {
         EnableW::new(self, 0)
     }
     #[doc = "Bit 2 - Auto Disables the counter (set ENABLE to 0) when the count reaches 0"]
     #[inline(always)]
-    #[must_use]
     pub fn auto_disable(&mut self) -> AutoDisableW<CtrlSpec> {
         AutoDisableW::new(self, 2)
     }
     #[doc = "Bit 3 - Auto Deactivate the counter (set ACTIVE to 0) when the count reaches 0"]
     #[inline(always)]
-    #[must_use]
     pub fn auto_deactivate(&mut self) -> AutoDeactivateW<CtrlSpec> {
         AutoDeactivateW::new(self, 3)
     }
     #[doc = "Bit 4 - Interrupt Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn irq_enb(&mut self) -> IrqEnbW<CtrlSpec> {
         IrqEnbW::new(self, 4)
     }
     #[doc = "Bits 5:7 - Counter Status Selection"]
     #[inline(always)]
-    #[must_use]
     pub fn status_sel(&mut self) -> StatusSelW<CtrlSpec> {
         StatusSelW::new(self, 5)
     }
     #[doc = "Bit 8 - Invert the Output Status"]
     #[inline(always)]
-    #[must_use]
     pub fn status_inv(&mut self) -> StatusInvW<CtrlSpec> {
         StatusInvW::new(self, 8)
     }
     #[doc = "Bit 9 - Stop Request"]
     #[inline(always)]
-    #[must_use]
     pub fn req_stop(&mut self) -> ReqStopW<CtrlSpec> {
         ReqStopW::new(self, 9)
     }
 }
-#[doc = "Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctrl::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctrl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct CtrlSpec;
 impl crate::RegisterSpec for CtrlSpec {
     type Ux = u32;
diff --git a/va416xx/src/tim0/enable.rs b/va416xx/src/tim0/enable.rs
index 2064cab..924e2a8 100644
--- a/va416xx/src/tim0/enable.rs
+++ b/va416xx/src/tim0/enable.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Counter Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn enable(&mut self) -> EnableW<EnableSpec> {
         EnableW::new(self, 0)
     }
 }
-#[doc = "Alternate access to the Counter ENABLE bit in the CTRL Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`enable::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`enable::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Alternate access to the Counter ENABLE bit in the CTRL Register\n\nYou can [`read`](crate::Reg::read) this register and get [`enable::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`enable::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct EnableSpec;
 impl crate::RegisterSpec for EnableSpec {
     type Ux = u32;
diff --git a/va416xx/src/tim0/perid.rs b/va416xx/src/tim0/perid.rs
index 9266a0a..d48a2d8 100644
--- a/va416xx/src/tim0/perid.rs
+++ b/va416xx/src/tim0/perid.rs
@@ -5,7 +5,7 @@ impl core::fmt::Debug for R {
         write!(f, "{}", self.bits())
     }
 }
-#[doc = "Peripheral ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`perid::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Peripheral ID Register\n\nYou can [`read`](crate::Reg::read) this register and get [`perid::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct PeridSpec;
 impl crate::RegisterSpec for PeridSpec {
     type Ux = u32;
diff --git a/va416xx/src/tim0/pwm_value.rs b/va416xx/src/tim0/pwm_value.rs
index b3b1480..0501c17 100644
--- a/va416xx/src/tim0/pwm_value.rs
+++ b/va416xx/src/tim0/pwm_value.rs
@@ -8,7 +8,7 @@ impl core::fmt::Debug for R {
     }
 }
 impl W {}
-#[doc = "The Pulse Width Modulation Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pwm_value::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pwm_value::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "The Pulse Width Modulation Value\n\nYou can [`read`](crate::Reg::read) this register and get [`pwm_value::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pwm_value::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct PwmValueSpec;
 impl crate::RegisterSpec for PwmValueSpec {
     type Ux = u32;
diff --git a/va416xx/src/tim0/pwma_value.rs b/va416xx/src/tim0/pwma_value.rs
index ec26532..9536145 100644
--- a/va416xx/src/tim0/pwma_value.rs
+++ b/va416xx/src/tim0/pwma_value.rs
@@ -8,7 +8,7 @@ impl core::fmt::Debug for R {
     }
 }
 impl W {}
-#[doc = "The Pulse Width Modulation ValueA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pwma_value::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pwma_value::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "The Pulse Width Modulation ValueA\n\nYou can [`read`](crate::Reg::read) this register and get [`pwma_value::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pwma_value::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct PwmaValueSpec;
 impl crate::RegisterSpec for PwmaValueSpec {
     type Ux = u32;
diff --git a/va416xx/src/tim0/pwmb_value.rs b/va416xx/src/tim0/pwmb_value.rs
index 587cb50..803f9df 100644
--- a/va416xx/src/tim0/pwmb_value.rs
+++ b/va416xx/src/tim0/pwmb_value.rs
@@ -8,7 +8,7 @@ impl core::fmt::Debug for R {
     }
 }
 impl W {}
-#[doc = "The Pulse Width Modulation ValueB\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pwmb_value::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pwmb_value::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "The Pulse Width Modulation ValueB\n\nYou can [`read`](crate::Reg::read) this register and get [`pwmb_value::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pwmb_value::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct PwmbValueSpec;
 impl crate::RegisterSpec for PwmbValueSpec {
     type Ux = u32;
diff --git a/va416xx/src/tim0/rst_value.rs b/va416xx/src/tim0/rst_value.rs
index 2dfa5b4..76c0ddb 100644
--- a/va416xx/src/tim0/rst_value.rs
+++ b/va416xx/src/tim0/rst_value.rs
@@ -8,7 +8,7 @@ impl core::fmt::Debug for R {
     }
 }
 impl W {}
-#[doc = "The value that counter start from after reaching 0.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rst_value::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rst_value::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "The value that counter start from after reaching 0.\n\nYou can [`read`](crate::Reg::read) this register and get [`rst_value::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rst_value::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct RstValueSpec;
 impl crate::RegisterSpec for RstValueSpec {
     type Ux = u32;
diff --git a/va416xx/src/trng.rs b/va416xx/src/trng.rs
index c748ffd..2b56091 100644
--- a/va416xx/src/trng.rs
+++ b/va416xx/src/trng.rs
@@ -134,37 +134,37 @@ impl RegisterBlock {
         &self.bist_cntr2
     }
 }
-#[doc = "IMR (rw) register accessor: Interrupt Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`imr::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`imr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@imr`]
+#[doc = "IMR (rw) register accessor: Interrupt Mask Register\n\nYou can [`read`](crate::Reg::read) this register and get [`imr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`imr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@imr`]
 module"]
 #[doc(alias = "IMR")]
 pub type Imr = crate::Reg<imr::ImrSpec>;
 #[doc = "Interrupt Mask Register"]
 pub mod imr;
-#[doc = "ISR (r) register accessor: Interrupt Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`isr::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@isr`]
+#[doc = "ISR (r) register accessor: Interrupt Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`isr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@isr`]
 module"]
 #[doc(alias = "ISR")]
 pub type Isr = crate::Reg<isr::IsrSpec>;
 #[doc = "Interrupt Status Register"]
 pub mod isr;
-#[doc = "ICR (rw) register accessor: Interrupt Clear Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`icr::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`icr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@icr`]
+#[doc = "ICR (rw) register accessor: Interrupt Clear Register\n\nYou can [`read`](crate::Reg::read) this register and get [`icr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`icr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@icr`]
 module"]
 #[doc(alias = "ICR")]
 pub type Icr = crate::Reg<icr::IcrSpec>;
 #[doc = "Interrupt Clear Register"]
 pub mod icr;
-#[doc = "CONFIG (rw) register accessor: Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`config::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`config::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@config`]
+#[doc = "CONFIG (rw) register accessor: Configuration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`config::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`config::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@config`]
 module"]
 #[doc(alias = "CONFIG")]
 pub type Config = crate::Reg<config::ConfigSpec>;
 #[doc = "Configuration Register"]
 pub mod config;
-#[doc = "VALID (r) register accessor: Valid Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`valid::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@valid`]
+#[doc = "VALID (r) register accessor: Valid Register\n\nYou can [`read`](crate::Reg::read) this register and get [`valid::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@valid`]
 module"]
 #[doc(alias = "VALID")]
 pub type Valid = crate::Reg<valid::ValidSpec>;
 #[doc = "Valid Register"]
 pub mod valid;
-#[doc = "EHR_DATA0 (r) register accessor: Entropy Holding Register Data Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ehr_data0::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ehr_data0`]
+#[doc = "EHR_DATA0 (r) register accessor: Entropy Holding Register Data Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ehr_data0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ehr_data0`]
 module"]
 #[doc(alias = "EHR_DATA0")]
 pub type EhrData0 = crate::Reg<ehr_data0::EhrData0Spec>;
@@ -180,49 +180,49 @@ pub use EhrData0 as EhrData2;
 pub use EhrData0 as EhrData3;
 pub use EhrData0 as EhrData4;
 pub use EhrData0 as EhrData5;
-#[doc = "RND_SOURCE_ENABLE (rw) register accessor: Random Source Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rnd_source_enable::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rnd_source_enable::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rnd_source_enable`]
+#[doc = "RND_SOURCE_ENABLE (rw) register accessor: Random Source Enable Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rnd_source_enable::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rnd_source_enable::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rnd_source_enable`]
 module"]
 #[doc(alias = "RND_SOURCE_ENABLE")]
 pub type RndSourceEnable = crate::Reg<rnd_source_enable::RndSourceEnableSpec>;
 #[doc = "Random Source Enable Register"]
 pub mod rnd_source_enable;
-#[doc = "SAMPLE_CNT1 (rw) register accessor: Section TBD\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sample_cnt1::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sample_cnt1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sample_cnt1`]
+#[doc = "SAMPLE_CNT1 (rw) register accessor: Section TBD\n\nYou can [`read`](crate::Reg::read) this register and get [`sample_cnt1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sample_cnt1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sample_cnt1`]
 module"]
 #[doc(alias = "SAMPLE_CNT1")]
 pub type SampleCnt1 = crate::Reg<sample_cnt1::SampleCnt1Spec>;
 #[doc = "Section TBD"]
 pub mod sample_cnt1;
-#[doc = "AUTOCORR_STATISTIC (rw) register accessor: Auto-correlator Statistic Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`autocorr_statistic::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`autocorr_statistic::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@autocorr_statistic`]
+#[doc = "AUTOCORR_STATISTIC (rw) register accessor: Auto-correlator Statistic Register\n\nYou can [`read`](crate::Reg::read) this register and get [`autocorr_statistic::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`autocorr_statistic::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@autocorr_statistic`]
 module"]
 #[doc(alias = "AUTOCORR_STATISTIC")]
 pub type AutocorrStatistic = crate::Reg<autocorr_statistic::AutocorrStatisticSpec>;
 #[doc = "Auto-correlator Statistic Register"]
 pub mod autocorr_statistic;
-#[doc = "DEBUG_CONTROL (rw) register accessor: Section TBD\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`debug_control::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`debug_control::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@debug_control`]
+#[doc = "DEBUG_CONTROL (rw) register accessor: Section TBD\n\nYou can [`read`](crate::Reg::read) this register and get [`debug_control::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`debug_control::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@debug_control`]
 module"]
 #[doc(alias = "DEBUG_CONTROL")]
 pub type DebugControl = crate::Reg<debug_control::DebugControlSpec>;
 #[doc = "Section TBD"]
 pub mod debug_control;
-#[doc = "SW_RESET (rw) register accessor: Reset Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sw_reset::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sw_reset::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sw_reset`]
+#[doc = "SW_RESET (rw) register accessor: Reset Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sw_reset::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sw_reset::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sw_reset`]
 module"]
 #[doc(alias = "SW_RESET")]
 pub type SwReset = crate::Reg<sw_reset::SwResetSpec>;
 #[doc = "Reset Register"]
 pub mod sw_reset;
-#[doc = "BUSY (r) register accessor: Busy Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`busy::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@busy`]
+#[doc = "BUSY (r) register accessor: Busy Register\n\nYou can [`read`](crate::Reg::read) this register and get [`busy::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@busy`]
 module"]
 #[doc(alias = "BUSY")]
 pub type Busy = crate::Reg<busy::BusySpec>;
 #[doc = "Busy Register"]
 pub mod busy;
-#[doc = "RST_BITS_COUNTER (rw) register accessor: Reset Bits Counter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rst_bits_counter::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rst_bits_counter::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rst_bits_counter`]
+#[doc = "RST_BITS_COUNTER (rw) register accessor: Reset Bits Counter Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rst_bits_counter::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rst_bits_counter::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rst_bits_counter`]
 module"]
 #[doc(alias = "RST_BITS_COUNTER")]
 pub type RstBitsCounter = crate::Reg<rst_bits_counter::RstBitsCounterSpec>;
 #[doc = "Reset Bits Counter Register"]
 pub mod rst_bits_counter;
-#[doc = "BIST_CNTR0 (r) register accessor: BIST Counter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`bist_cntr0::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bist_cntr0`]
+#[doc = "BIST_CNTR0 (r) register accessor: BIST Counter Register\n\nYou can [`read`](crate::Reg::read) this register and get [`bist_cntr0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bist_cntr0`]
 module"]
 #[doc(alias = "BIST_CNTR0")]
 pub type BistCntr0 = crate::Reg<bist_cntr0::BistCntr0Spec>;
diff --git a/va416xx/src/trng/autocorr_statistic.rs b/va416xx/src/trng/autocorr_statistic.rs
index e919aee..70d2ef4 100644
--- a/va416xx/src/trng/autocorr_statistic.rs
+++ b/va416xx/src/trng/autocorr_statistic.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:13 - Count each time an autocorrelation test starts"]
     #[inline(always)]
-    #[must_use]
     pub fn autocorr_trys(&mut self) -> AutocorrTrysW<AutocorrStatisticSpec> {
         AutocorrTrysW::new(self, 0)
     }
     #[doc = "Bits 14:21 - Count each time an autocorrelation test fails"]
     #[inline(always)]
-    #[must_use]
     pub fn autocorr_fails(&mut self) -> AutocorrFailsW<AutocorrStatisticSpec> {
         AutocorrFailsW::new(self, 14)
     }
 }
-#[doc = "Auto-correlator Statistic Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`autocorr_statistic::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`autocorr_statistic::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Auto-correlator Statistic Register\n\nYou can [`read`](crate::Reg::read) this register and get [`autocorr_statistic::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`autocorr_statistic::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct AutocorrStatisticSpec;
 impl crate::RegisterSpec for AutocorrStatisticSpec {
     type Ux = u32;
diff --git a/va416xx/src/trng/bist_cntr0.rs b/va416xx/src/trng/bist_cntr0.rs
index 36bca68..7a9759e 100644
--- a/va416xx/src/trng/bist_cntr0.rs
+++ b/va416xx/src/trng/bist_cntr0.rs
@@ -9,7 +9,7 @@ impl R {
         RoscCntrValR::new(self.bits & 0x003f_ffff)
     }
 }
-#[doc = "BIST Counter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`bist_cntr0::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "BIST Counter Register\n\nYou can [`read`](crate::Reg::read) this register and get [`bist_cntr0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct BistCntr0Spec;
 impl crate::RegisterSpec for BistCntr0Spec {
     type Ux = u32;
diff --git a/va416xx/src/trng/busy.rs b/va416xx/src/trng/busy.rs
index a34661c..f12cb24 100644
--- a/va416xx/src/trng/busy.rs
+++ b/va416xx/src/trng/busy.rs
@@ -9,7 +9,7 @@ impl R {
         BusyR::new((self.bits & 1) != 0)
     }
 }
-#[doc = "Busy Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`busy::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Busy Register\n\nYou can [`read`](crate::Reg::read) this register and get [`busy::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct BusySpec;
 impl crate::RegisterSpec for BusySpec {
     type Ux = u32;
diff --git a/va416xx/src/trng/config.rs b/va416xx/src/trng/config.rs
index 83a2884..2efa7f2 100644
--- a/va416xx/src/trng/config.rs
+++ b/va416xx/src/trng/config.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:1 - Selects the number of inverters (out of four possible selections) in the ring oscillator"]
     #[inline(always)]
-    #[must_use]
     pub fn rnd_src_sel(&mut self) -> RndSrcSelW<ConfigSpec> {
         RndSrcSelW::new(self, 0)
     }
 }
-#[doc = "Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`config::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`config::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Configuration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`config::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`config::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct ConfigSpec;
 impl crate::RegisterSpec for ConfigSpec {
     type Ux = u32;
diff --git a/va416xx/src/trng/debug_control.rs b/va416xx/src/trng/debug_control.rs
index aed3a3f..b0daa2c 100644
--- a/va416xx/src/trng/debug_control.rs
+++ b/va416xx/src/trng/debug_control.rs
@@ -34,24 +34,21 @@ impl R {
 impl W {
     #[doc = "Bit 1 - The Von Neumann balancer is bypassed"]
     #[inline(always)]
-    #[must_use]
     pub fn vnc_pypass(&mut self) -> VncPypassW<DebugControlSpec> {
         VncPypassW::new(self, 1)
     }
     #[doc = "Bit 2 - The CRNGT test in the TRNG is bypassed"]
     #[inline(always)]
-    #[must_use]
     pub fn crngt_bypass(&mut self) -> CrngtBypassW<DebugControlSpec> {
         CrngtBypassW::new(self, 2)
     }
     #[doc = "Bit 3 - The autocorrelation test in the TRNG module is bypassed"]
     #[inline(always)]
-    #[must_use]
     pub fn auto_correlate_bypass(&mut self) -> AutoCorrelateBypassW<DebugControlSpec> {
         AutoCorrelateBypassW::new(self, 3)
     }
 }
-#[doc = "Section TBD\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`debug_control::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`debug_control::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Section TBD\n\nYou can [`read`](crate::Reg::read) this register and get [`debug_control::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`debug_control::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct DebugControlSpec;
 impl crate::RegisterSpec for DebugControlSpec {
     type Ux = u32;
diff --git a/va416xx/src/trng/ehr_data0.rs b/va416xx/src/trng/ehr_data0.rs
index 1c6e91f..75fe94f 100644
--- a/va416xx/src/trng/ehr_data0.rs
+++ b/va416xx/src/trng/ehr_data0.rs
@@ -9,7 +9,7 @@ impl R {
         EhrDataR::new(self.bits)
     }
 }
-#[doc = "Entropy Holding Register Data Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ehr_data0::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Entropy Holding Register Data Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ehr_data0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct EhrData0Spec;
 impl crate::RegisterSpec for EhrData0Spec {
     type Ux = u32;
diff --git a/va416xx/src/trng/icr.rs b/va416xx/src/trng/icr.rs
index 89ec323..a055e5d 100644
--- a/va416xx/src/trng/icr.rs
+++ b/va416xx/src/trng/icr.rs
@@ -47,30 +47,26 @@ impl W {
     #[doc = "Bit 0 - Set to 1 after the EHR_DATA\\[0,1,2,3,4,5\\]
 registers have been read"]
     #[inline(always)]
-    #[must_use]
     pub fn ehr_valid(&mut self) -> EhrValidW<IcrSpec> {
         EhrValidW::new(self, 0)
     }
     #[doc = "Bit 1 - Software cannot clear this bit. Only a TRNG reset can clear this bit"]
     #[inline(always)]
-    #[must_use]
     pub fn autocorr_err(&mut self) -> AutocorrErrW<IcrSpec> {
         AutocorrErrW::new(self, 1)
     }
     #[doc = "Bit 2 - Clear a Continuous Random Number Generation Testing (CRNGT) error"]
     #[inline(always)]
-    #[must_use]
     pub fn crngt_err(&mut self) -> CrngtErrW<IcrSpec> {
         CrngtErrW::new(self, 2)
     }
     #[doc = "Bit 3 - Clears a Von Neumann error"]
     #[inline(always)]
-    #[must_use]
     pub fn vn_err(&mut self) -> VnErrW<IcrSpec> {
         VnErrW::new(self, 3)
     }
 }
-#[doc = "Interrupt Clear Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`icr::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`icr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Interrupt Clear Register\n\nYou can [`read`](crate::Reg::read) this register and get [`icr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`icr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct IcrSpec;
 impl crate::RegisterSpec for IcrSpec {
     type Ux = u32;
diff --git a/va416xx/src/trng/imr.rs b/va416xx/src/trng/imr.rs
index b3137fa..ba6a14d 100644
--- a/va416xx/src/trng/imr.rs
+++ b/va416xx/src/trng/imr.rs
@@ -43,30 +43,26 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Mask when the TRNG has collected 192 bits"]
     #[inline(always)]
-    #[must_use]
     pub fn ehr_valid_int_mask(&mut self) -> EhrValidIntMaskW<ImrSpec> {
         EhrValidIntMaskW::new(self, 0)
     }
     #[doc = "Bit 1 - Mask the Autocorrelation error"]
     #[inline(always)]
-    #[must_use]
     pub fn autocorr_err_int_mask(&mut self) -> AutocorrErrIntMaskW<ImrSpec> {
         AutocorrErrIntMaskW::new(self, 1)
     }
     #[doc = "Bit 2 - Mask the CRNGT error"]
     #[inline(always)]
-    #[must_use]
     pub fn crngt_err_int_mask(&mut self) -> CrngtErrIntMaskW<ImrSpec> {
         CrngtErrIntMaskW::new(self, 2)
     }
     #[doc = "Bit 3 - Mask the Von Neumann error"]
     #[inline(always)]
-    #[must_use]
     pub fn vn_err_int_mask(&mut self) -> VnErrIntMaskW<ImrSpec> {
         VnErrIntMaskW::new(self, 3)
     }
 }
-#[doc = "Interrupt Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`imr::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`imr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Interrupt Mask Register\n\nYou can [`read`](crate::Reg::read) this register and get [`imr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`imr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct ImrSpec;
 impl crate::RegisterSpec for ImrSpec {
     type Ux = u32;
diff --git a/va416xx/src/trng/isr.rs b/va416xx/src/trng/isr.rs
index 57bdab4..239a8e5 100644
--- a/va416xx/src/trng/isr.rs
+++ b/va416xx/src/trng/isr.rs
@@ -30,7 +30,7 @@ impl R {
         VnErrR::new(((self.bits >> 3) & 1) != 0)
     }
 }
-#[doc = "Interrupt Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`isr::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Interrupt Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`isr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct IsrSpec;
 impl crate::RegisterSpec for IsrSpec {
     type Ux = u32;
diff --git a/va416xx/src/trng/rnd_source_enable.rs b/va416xx/src/trng/rnd_source_enable.rs
index 194e5e0..2f8291c 100644
--- a/va416xx/src/trng/rnd_source_enable.rs
+++ b/va416xx/src/trng/rnd_source_enable.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bit 0 - The entropy source, ring oscillator, is enabled"]
     #[inline(always)]
-    #[must_use]
     pub fn rnd_src_en(&mut self) -> RndSrcEnW<RndSourceEnableSpec> {
         RndSrcEnW::new(self, 0)
     }
 }
-#[doc = "Random Source Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rnd_source_enable::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rnd_source_enable::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Random Source Enable Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rnd_source_enable::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rnd_source_enable::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct RndSourceEnableSpec;
 impl crate::RegisterSpec for RndSourceEnableSpec {
     type Ux = u32;
diff --git a/va416xx/src/trng/rst_bits_counter.rs b/va416xx/src/trng/rst_bits_counter.rs
index 1ec18a0..f000a85 100644
--- a/va416xx/src/trng/rst_bits_counter.rs
+++ b/va416xx/src/trng/rst_bits_counter.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Writing any value to this bit resets the bits counter and TRNG valid registers"]
     #[inline(always)]
-    #[must_use]
     pub fn rst_bits_counter(&mut self) -> RstBitsCounterW<RstBitsCounterSpec> {
         RstBitsCounterW::new(self, 0)
     }
 }
-#[doc = "Reset Bits Counter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rst_bits_counter::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rst_bits_counter::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Reset Bits Counter Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rst_bits_counter::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rst_bits_counter::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct RstBitsCounterSpec;
 impl crate::RegisterSpec for RstBitsCounterSpec {
     type Ux = u32;
diff --git a/va416xx/src/trng/sample_cnt1.rs b/va416xx/src/trng/sample_cnt1.rs
index 21e445e..c173786 100644
--- a/va416xx/src/trng/sample_cnt1.rs
+++ b/va416xx/src/trng/sample_cnt1.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:31 - Sets the number of clk cycles between two consecutive ring oscillator samples"]
     #[inline(always)]
-    #[must_use]
     pub fn sample_cntr1(&mut self) -> SampleCntr1W<SampleCnt1Spec> {
         SampleCntr1W::new(self, 0)
     }
 }
-#[doc = "Section TBD\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sample_cnt1::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sample_cnt1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Section TBD\n\nYou can [`read`](crate::Reg::read) this register and get [`sample_cnt1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sample_cnt1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct SampleCnt1Spec;
 impl crate::RegisterSpec for SampleCnt1Spec {
     type Ux = u32;
diff --git a/va416xx/src/trng/sw_reset.rs b/va416xx/src/trng/sw_reset.rs
index 585f61e..5a6df3f 100644
--- a/va416xx/src/trng/sw_reset.rs
+++ b/va416xx/src/trng/sw_reset.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Writing 1 to this register causes an internal TRNG reset"]
     #[inline(always)]
-    #[must_use]
     pub fn sw_reset(&mut self) -> SwResetW<SwResetSpec> {
         SwResetW::new(self, 0)
     }
 }
-#[doc = "Reset Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sw_reset::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sw_reset::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Reset Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sw_reset::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sw_reset::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct SwResetSpec;
 impl crate::RegisterSpec for SwResetSpec {
     type Ux = u32;
diff --git a/va416xx/src/trng/valid.rs b/va416xx/src/trng/valid.rs
index 770e5ed..bca1489 100644
--- a/va416xx/src/trng/valid.rs
+++ b/va416xx/src/trng/valid.rs
@@ -9,7 +9,7 @@ impl R {
         EhrValidR::new((self.bits & 1) != 0)
     }
 }
-#[doc = "Valid Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`valid::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Valid Register\n\nYou can [`read`](crate::Reg::read) this register and get [`valid::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct ValidSpec;
 impl crate::RegisterSpec for ValidSpec {
     type Ux = u32;
diff --git a/va416xx/src/uart0.rs b/va416xx/src/uart0.rs
index 71aa47b..0a056ad 100644
--- a/va416xx/src/uart0.rs
+++ b/va416xx/src/uart0.rs
@@ -119,67 +119,67 @@ impl RegisterBlock {
         &self.perid
     }
 }
-#[doc = "DATA (rw) register accessor: Data In/Out Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data`]
+#[doc = "DATA (rw) register accessor: Data In/Out Register\n\nYou can [`read`](crate::Reg::read) this register and get [`data::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data`]
 module"]
 #[doc(alias = "DATA")]
 pub type Data = crate::Reg<data::DataSpec>;
 #[doc = "Data In/Out Register"]
 pub mod data;
-#[doc = "ENABLE (rw) register accessor: Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`enable::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`enable::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@enable`]
+#[doc = "ENABLE (rw) register accessor: Enable Register\n\nYou can [`read`](crate::Reg::read) this register and get [`enable::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`enable::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@enable`]
 module"]
 #[doc(alias = "ENABLE")]
 pub type Enable = crate::Reg<enable::EnableSpec>;
 #[doc = "Enable Register"]
 pub mod enable;
-#[doc = "CTRL (rw) register accessor: Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctrl::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`]
+#[doc = "CTRL (rw) register accessor: Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`]
 module"]
 #[doc(alias = "CTRL")]
 pub type Ctrl = crate::Reg<ctrl::CtrlSpec>;
 #[doc = "Control Register"]
 pub mod ctrl;
-#[doc = "CLKSCALE (rw) register accessor: Clock Scale Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clkscale::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clkscale::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkscale`]
+#[doc = "CLKSCALE (rw) register accessor: Clock Scale Register\n\nYou can [`read`](crate::Reg::read) this register and get [`clkscale::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkscale::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkscale`]
 module"]
 #[doc(alias = "CLKSCALE")]
 pub type Clkscale = crate::Reg<clkscale::ClkscaleSpec>;
 #[doc = "Clock Scale Register"]
 pub mod clkscale;
-#[doc = "RXSTATUS (r) register accessor: Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxstatus::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxstatus`]
+#[doc = "RXSTATUS (r) register accessor: Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rxstatus::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxstatus`]
 module"]
 #[doc(alias = "RXSTATUS")]
 pub type Rxstatus = crate::Reg<rxstatus::RxstatusSpec>;
 #[doc = "Status Register"]
 pub mod rxstatus;
-#[doc = "TXSTATUS (r) register accessor: Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txstatus::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txstatus`]
+#[doc = "TXSTATUS (r) register accessor: Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`txstatus::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txstatus`]
 module"]
 #[doc(alias = "TXSTATUS")]
 pub type Txstatus = crate::Reg<txstatus::TxstatusSpec>;
 #[doc = "Status Register"]
 pub mod txstatus;
-#[doc = "FIFO_CLR (w) register accessor: Clear FIFO Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fifo_clr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fifo_clr`]
+#[doc = "FIFO_CLR (w) register accessor: Clear FIFO Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fifo_clr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fifo_clr`]
 module"]
 #[doc(alias = "FIFO_CLR")]
 pub type FifoClr = crate::Reg<fifo_clr::FifoClrSpec>;
 #[doc = "Clear FIFO Register"]
 pub mod fifo_clr;
-#[doc = "TXBREAK (w) register accessor: Break Transmit Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`txbreak::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txbreak`]
+#[doc = "TXBREAK (w) register accessor: Break Transmit Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`txbreak::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txbreak`]
 module"]
 #[doc(alias = "TXBREAK")]
 pub type Txbreak = crate::Reg<txbreak::TxbreakSpec>;
 #[doc = "Break Transmit Register"]
 pub mod txbreak;
-#[doc = "ADDR9 (rw) register accessor: Address9 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`addr9::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`addr9::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@addr9`]
+#[doc = "ADDR9 (rw) register accessor: Address9 Register\n\nYou can [`read`](crate::Reg::read) this register and get [`addr9::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`addr9::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@addr9`]
 module"]
 #[doc(alias = "ADDR9")]
 pub type Addr9 = crate::Reg<addr9::Addr9Spec>;
 #[doc = "Address9 Register"]
 pub mod addr9;
-#[doc = "ADDR9MASK (rw) register accessor: Address9 Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`addr9mask::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`addr9mask::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@addr9mask`]
+#[doc = "ADDR9MASK (rw) register accessor: Address9 Mask Register\n\nYou can [`read`](crate::Reg::read) this register and get [`addr9mask::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`addr9mask::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@addr9mask`]
 module"]
 #[doc(alias = "ADDR9MASK")]
 pub type Addr9mask = crate::Reg<addr9mask::Addr9maskSpec>;
 #[doc = "Address9 Mask Register"]
 pub mod addr9mask;
-#[doc = "IRQ_ENB (rw) register accessor: IRQ Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_enb::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`irq_enb::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_enb`]
+#[doc = "IRQ_ENB (rw) register accessor: IRQ Enable Register\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_enb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`irq_enb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_enb`]
 module"]
 #[doc(alias = "IRQ_ENB")]
 pub type IrqEnb = crate::Reg<irq_enb::IrqEnbSpec>;
@@ -191,31 +191,31 @@ pub use irq_enb as irq_clr;
 pub use IrqEnb as IrqRaw;
 pub use IrqEnb as IrqEnd;
 pub use IrqEnb as IrqClr;
-#[doc = "RXFIFOIRQTRG (rw) register accessor: Rx FIFO IRQ Trigger Level\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxfifoirqtrg::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rxfifoirqtrg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxfifoirqtrg`]
+#[doc = "RXFIFOIRQTRG (rw) register accessor: Rx FIFO IRQ Trigger Level\n\nYou can [`read`](crate::Reg::read) this register and get [`rxfifoirqtrg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rxfifoirqtrg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxfifoirqtrg`]
 module"]
 #[doc(alias = "RXFIFOIRQTRG")]
 pub type Rxfifoirqtrg = crate::Reg<rxfifoirqtrg::RxfifoirqtrgSpec>;
 #[doc = "Rx FIFO IRQ Trigger Level"]
 pub mod rxfifoirqtrg;
-#[doc = "TXFIFOIRQTRG (rw) register accessor: Tx FIFO IRQ Trigger Level\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txfifoirqtrg::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`txfifoirqtrg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txfifoirqtrg`]
+#[doc = "TXFIFOIRQTRG (rw) register accessor: Tx FIFO IRQ Trigger Level\n\nYou can [`read`](crate::Reg::read) this register and get [`txfifoirqtrg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`txfifoirqtrg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txfifoirqtrg`]
 module"]
 #[doc(alias = "TXFIFOIRQTRG")]
 pub type Txfifoirqtrg = crate::Reg<txfifoirqtrg::TxfifoirqtrgSpec>;
 #[doc = "Tx FIFO IRQ Trigger Level"]
 pub mod txfifoirqtrg;
-#[doc = "RXFIFORTSTRG (rw) register accessor: Rx FIFO RTS Trigger Level\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxfifortstrg::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rxfifortstrg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxfifortstrg`]
+#[doc = "RXFIFORTSTRG (rw) register accessor: Rx FIFO RTS Trigger Level\n\nYou can [`read`](crate::Reg::read) this register and get [`rxfifortstrg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rxfifortstrg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxfifortstrg`]
 module"]
 #[doc(alias = "RXFIFORTSTRG")]
 pub type Rxfifortstrg = crate::Reg<rxfifortstrg::RxfifortstrgSpec>;
 #[doc = "Rx FIFO RTS Trigger Level"]
 pub mod rxfifortstrg;
-#[doc = "STATE (r) register accessor: Internal STATE of UART Controller\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`state::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@state`]
+#[doc = "STATE (r) register accessor: Internal STATE of UART Controller\n\nYou can [`read`](crate::Reg::read) this register and get [`state::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@state`]
 module"]
 #[doc(alias = "STATE")]
 pub type State = crate::Reg<state::StateSpec>;
 #[doc = "Internal STATE of UART Controller"]
 pub mod state;
-#[doc = "PERID (r) register accessor: Peripheral ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`perid::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@perid`]
+#[doc = "PERID (r) register accessor: Peripheral ID Register\n\nYou can [`read`](crate::Reg::read) this register and get [`perid::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@perid`]
 module"]
 #[doc(alias = "PERID")]
 pub type Perid = crate::Reg<perid::PeridSpec>;
diff --git a/va416xx/src/uart0/addr9.rs b/va416xx/src/uart0/addr9.rs
index bca4484..0c011f2 100644
--- a/va416xx/src/uart0/addr9.rs
+++ b/va416xx/src/uart0/addr9.rs
@@ -8,7 +8,7 @@ impl core::fmt::Debug for R {
     }
 }
 impl W {}
-#[doc = "Address9 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`addr9::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`addr9::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Address9 Register\n\nYou can [`read`](crate::Reg::read) this register and get [`addr9::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`addr9::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Addr9Spec;
 impl crate::RegisterSpec for Addr9Spec {
     type Ux = u32;
diff --git a/va416xx/src/uart0/addr9mask.rs b/va416xx/src/uart0/addr9mask.rs
index f96e772..d130f41 100644
--- a/va416xx/src/uart0/addr9mask.rs
+++ b/va416xx/src/uart0/addr9mask.rs
@@ -8,7 +8,7 @@ impl core::fmt::Debug for R {
     }
 }
 impl W {}
-#[doc = "Address9 Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`addr9mask::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`addr9mask::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Address9 Mask Register\n\nYou can [`read`](crate::Reg::read) this register and get [`addr9mask::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`addr9mask::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Addr9maskSpec;
 impl crate::RegisterSpec for Addr9maskSpec {
     type Ux = u32;
diff --git a/va416xx/src/uart0/clkscale.rs b/va416xx/src/uart0/clkscale.rs
index 14a5e79..a8943ac 100644
--- a/va416xx/src/uart0/clkscale.rs
+++ b/va416xx/src/uart0/clkscale.rs
@@ -27,24 +27,21 @@ impl R {
 impl W {
     #[doc = "Bits 0:5 - Fractional Divide (64ths)"]
     #[inline(always)]
-    #[must_use]
     pub fn frac(&mut self) -> FracW<ClkscaleSpec> {
         FracW::new(self, 0)
     }
     #[doc = "Bits 6:23 - Integer Divide"]
     #[inline(always)]
-    #[must_use]
     pub fn int(&mut self) -> IntW<ClkscaleSpec> {
         IntW::new(self, 6)
     }
     #[doc = "Bit 31 - Reset Baud Counter"]
     #[inline(always)]
-    #[must_use]
     pub fn reset(&mut self) -> ResetW<ClkscaleSpec> {
         ResetW::new(self, 31)
     }
 }
-#[doc = "Clock Scale Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clkscale::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clkscale::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Clock Scale Register\n\nYou can [`read`](crate::Reg::read) this register and get [`clkscale::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkscale::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct ClkscaleSpec;
 impl crate::RegisterSpec for ClkscaleSpec {
     type Ux = u32;
diff --git a/va416xx/src/uart0/ctrl.rs b/va416xx/src/uart0/ctrl.rs
index 965c45a..f802a55 100644
--- a/va416xx/src/uart0/ctrl.rs
+++ b/va416xx/src/uart0/ctrl.rs
@@ -106,72 +106,61 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Parity Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn paren(&mut self) -> ParenW<CtrlSpec> {
         ParenW::new(self, 0)
     }
     #[doc = "Bit 1 - Parity Even/Odd(1/0)"]
     #[inline(always)]
-    #[must_use]
     pub fn pareven(&mut self) -> ParevenW<CtrlSpec> {
         ParevenW::new(self, 1)
     }
     #[doc = "Bit 2 - Parity Sticky"]
     #[inline(always)]
-    #[must_use]
     pub fn parstk(&mut self) -> ParstkW<CtrlSpec> {
         ParstkW::new(self, 2)
     }
     #[doc = "Bit 3 - Stop Bits 1/2(0/1)"]
     #[inline(always)]
-    #[must_use]
     pub fn stopbits(&mut self) -> StopbitsW<CtrlSpec> {
         StopbitsW::new(self, 3)
     }
     #[doc = "Bits 4:5 - Word Size in Bits 5/6/7/8(00/01/10/11)"]
     #[inline(always)]
-    #[must_use]
     pub fn wordsize(&mut self) -> WordsizeW<CtrlSpec> {
         WordsizeW::new(self, 4)
     }
     #[doc = "Bit 6 - Loopback Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn loopback(&mut self) -> LoopbackW<CtrlSpec> {
         LoopbackW::new(self, 6)
     }
     #[doc = "Bit 7 - Loopback Block"]
     #[inline(always)]
-    #[must_use]
     pub fn loopbackblk(&mut self) -> LoopbackblkW<CtrlSpec> {
         LoopbackblkW::new(self, 7)
     }
     #[doc = "Bit 8 - Enable Auto CTS mode"]
     #[inline(always)]
-    #[must_use]
     pub fn autocts(&mut self) -> AutoctsW<CtrlSpec> {
         AutoctsW::new(self, 8)
     }
     #[doc = "Bit 9 - Default RTSn value"]
     #[inline(always)]
-    #[must_use]
     pub fn defrts(&mut self) -> DefrtsW<CtrlSpec> {
         DefrtsW::new(self, 9)
     }
     #[doc = "Bit 10 - Enable Auto RTS mode"]
     #[inline(always)]
-    #[must_use]
     pub fn autorts(&mut self) -> AutortsW<CtrlSpec> {
         AutortsW::new(self, 10)
     }
     #[doc = "Bit 11 - Enable BAUD8 mode"]
     #[inline(always)]
-    #[must_use]
     pub fn baud8(&mut self) -> Baud8W<CtrlSpec> {
         Baud8W::new(self, 11)
     }
 }
-#[doc = "Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctrl::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctrl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct CtrlSpec;
 impl crate::RegisterSpec for CtrlSpec {
     type Ux = u32;
diff --git a/va416xx/src/uart0/data.rs b/va416xx/src/uart0/data.rs
index bc64a6c..f4f09cb 100644
--- a/va416xx/src/uart0/data.rs
+++ b/va416xx/src/uart0/data.rs
@@ -8,7 +8,7 @@ impl core::fmt::Debug for R {
     }
 }
 impl W {}
-#[doc = "Data In/Out Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Data In/Out Register\n\nYou can [`read`](crate::Reg::read) this register and get [`data::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct DataSpec;
 impl crate::RegisterSpec for DataSpec {
     type Ux = u32;
diff --git a/va416xx/src/uart0/enable.rs b/va416xx/src/uart0/enable.rs
index ad6f797..1ca5964 100644
--- a/va416xx/src/uart0/enable.rs
+++ b/va416xx/src/uart0/enable.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Rx Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn rxenable(&mut self) -> RxenableW<EnableSpec> {
         RxenableW::new(self, 0)
     }
     #[doc = "Bit 1 - Tx Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn txenable(&mut self) -> TxenableW<EnableSpec> {
         TxenableW::new(self, 1)
     }
 }
-#[doc = "Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`enable::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`enable::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Enable Register\n\nYou can [`read`](crate::Reg::read) this register and get [`enable::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`enable::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct EnableSpec;
 impl crate::RegisterSpec for EnableSpec {
     type Ux = u32;
diff --git a/va416xx/src/uart0/fifo_clr.rs b/va416xx/src/uart0/fifo_clr.rs
index 156da87..af272ab 100644
--- a/va416xx/src/uart0/fifo_clr.rs
+++ b/va416xx/src/uart0/fifo_clr.rs
@@ -7,18 +7,16 @@ pub type TxfifoW<'a, REG> = crate::BitWriter<'a, REG>;
 impl W {
     #[doc = "Bit 0 - Clear Rx FIFO"]
     #[inline(always)]
-    #[must_use]
     pub fn rxfifo(&mut self) -> RxfifoW<FifoClrSpec> {
         RxfifoW::new(self, 0)
     }
     #[doc = "Bit 1 - Clear Tx FIFO"]
     #[inline(always)]
-    #[must_use]
     pub fn txfifo(&mut self) -> TxfifoW<FifoClrSpec> {
         TxfifoW::new(self, 1)
     }
 }
-#[doc = "Clear FIFO Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fifo_clr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Clear FIFO Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fifo_clr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct FifoClrSpec;
 impl crate::RegisterSpec for FifoClrSpec {
     type Ux = u32;
diff --git a/va416xx/src/uart0/irq_enb.rs b/va416xx/src/uart0/irq_enb.rs
index 6702628..afadd51 100644
--- a/va416xx/src/uart0/irq_enb.rs
+++ b/va416xx/src/uart0/irq_enb.rs
@@ -70,48 +70,41 @@ impl R {
 impl W {
     #[doc = "Bit 0 - RX Interrupt"]
     #[inline(always)]
-    #[must_use]
     pub fn irq_rx(&mut self) -> IrqRxW<IrqEnbSpec> {
         IrqRxW::new(self, 0)
     }
     #[doc = "Bit 1 - RX Status Interrupt"]
     #[inline(always)]
-    #[must_use]
     pub fn irq_rx_status(&mut self) -> IrqRxStatusW<IrqEnbSpec> {
         IrqRxStatusW::new(self, 1)
     }
     #[doc = "Bit 2 - RX Timeout Interrupt"]
     #[inline(always)]
-    #[must_use]
     pub fn irq_rx_to(&mut self) -> IrqRxToW<IrqEnbSpec> {
         IrqRxToW::new(self, 2)
     }
     #[doc = "Bit 4 - TX Interrupt"]
     #[inline(always)]
-    #[must_use]
     pub fn irq_tx(&mut self) -> IrqTxW<IrqEnbSpec> {
         IrqTxW::new(self, 4)
     }
     #[doc = "Bit 5 - TX Status Interrupt"]
     #[inline(always)]
-    #[must_use]
     pub fn irq_tx_status(&mut self) -> IrqTxStatusW<IrqEnbSpec> {
         IrqTxStatusW::new(self, 5)
     }
     #[doc = "Bit 6 - TX Empty Interrupt"]
     #[inline(always)]
-    #[must_use]
     pub fn irq_tx_empty(&mut self) -> IrqTxEmptyW<IrqEnbSpec> {
         IrqTxEmptyW::new(self, 6)
     }
     #[doc = "Bit 7 - TX CTS Change Interrupt"]
     #[inline(always)]
-    #[must_use]
     pub fn irq_tx_cts(&mut self) -> IrqTxCtsW<IrqEnbSpec> {
         IrqTxCtsW::new(self, 7)
     }
 }
-#[doc = "IRQ Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_enb::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`irq_enb::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "IRQ Enable Register\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_enb::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`irq_enb::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct IrqEnbSpec;
 impl crate::RegisterSpec for IrqEnbSpec {
     type Ux = u32;
diff --git a/va416xx/src/uart0/perid.rs b/va416xx/src/uart0/perid.rs
index c2b57d9..391ae4a 100644
--- a/va416xx/src/uart0/perid.rs
+++ b/va416xx/src/uart0/perid.rs
@@ -5,7 +5,7 @@ impl core::fmt::Debug for R {
         write!(f, "{}", self.bits())
     }
 }
-#[doc = "Peripheral ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`perid::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Peripheral ID Register\n\nYou can [`read`](crate::Reg::read) this register and get [`perid::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct PeridSpec;
 impl crate::RegisterSpec for PeridSpec {
     type Ux = u32;
diff --git a/va416xx/src/uart0/rxfifoirqtrg.rs b/va416xx/src/uart0/rxfifoirqtrg.rs
index 46124d5..8376847 100644
--- a/va416xx/src/uart0/rxfifoirqtrg.rs
+++ b/va416xx/src/uart0/rxfifoirqtrg.rs
@@ -8,7 +8,7 @@ impl core::fmt::Debug for R {
     }
 }
 impl W {}
-#[doc = "Rx FIFO IRQ Trigger Level\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxfifoirqtrg::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rxfifoirqtrg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Rx FIFO IRQ Trigger Level\n\nYou can [`read`](crate::Reg::read) this register and get [`rxfifoirqtrg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rxfifoirqtrg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct RxfifoirqtrgSpec;
 impl crate::RegisterSpec for RxfifoirqtrgSpec {
     type Ux = u32;
diff --git a/va416xx/src/uart0/rxfifortstrg.rs b/va416xx/src/uart0/rxfifortstrg.rs
index dd8afea..2938f15 100644
--- a/va416xx/src/uart0/rxfifortstrg.rs
+++ b/va416xx/src/uart0/rxfifortstrg.rs
@@ -8,7 +8,7 @@ impl core::fmt::Debug for R {
     }
 }
 impl W {}
-#[doc = "Rx FIFO RTS Trigger Level\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxfifortstrg::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rxfifortstrg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Rx FIFO RTS Trigger Level\n\nYou can [`read`](crate::Reg::read) this register and get [`rxfifortstrg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rxfifortstrg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct RxfifortstrgSpec;
 impl crate::RegisterSpec for RxfifortstrgSpec {
     type Ux = u32;
diff --git a/va416xx/src/uart0/rxstatus.rs b/va416xx/src/uart0/rxstatus.rs
index c519eb8..ce5172d 100644
--- a/va416xx/src/uart0/rxstatus.rs
+++ b/va416xx/src/uart0/rxstatus.rs
@@ -79,7 +79,7 @@ impl R {
         RxrtsnR::new(((self.bits >> 15) & 1) != 0)
     }
 }
-#[doc = "Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxstatus::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rxstatus::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct RxstatusSpec;
 impl crate::RegisterSpec for RxstatusSpec {
     type Ux = u32;
diff --git a/va416xx/src/uart0/state.rs b/va416xx/src/uart0/state.rs
index 17ec5bc..ecdf97f 100644
--- a/va416xx/src/uart0/state.rs
+++ b/va416xx/src/uart0/state.rs
@@ -5,7 +5,7 @@ impl core::fmt::Debug for R {
         write!(f, "{}", self.bits())
     }
 }
-#[doc = "Internal STATE of UART Controller\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`state::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Internal STATE of UART Controller\n\nYou can [`read`](crate::Reg::read) this register and get [`state::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct StateSpec;
 impl crate::RegisterSpec for StateSpec {
     type Ux = u32;
diff --git a/va416xx/src/uart0/txbreak.rs b/va416xx/src/uart0/txbreak.rs
index 69a167f..5e5002f 100644
--- a/va416xx/src/uart0/txbreak.rs
+++ b/va416xx/src/uart0/txbreak.rs
@@ -6,7 +6,7 @@ impl core::fmt::Debug for crate::generic::Reg<TxbreakSpec> {
     }
 }
 impl W {}
-#[doc = "Break Transmit Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`txbreak::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Break Transmit Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`txbreak::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct TxbreakSpec;
 impl crate::RegisterSpec for TxbreakSpec {
     type Ux = u32;
diff --git a/va416xx/src/uart0/txfifoirqtrg.rs b/va416xx/src/uart0/txfifoirqtrg.rs
index 0d13e54..8d0ae92 100644
--- a/va416xx/src/uart0/txfifoirqtrg.rs
+++ b/va416xx/src/uart0/txfifoirqtrg.rs
@@ -8,7 +8,7 @@ impl core::fmt::Debug for R {
     }
 }
 impl W {}
-#[doc = "Tx FIFO IRQ Trigger Level\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txfifoirqtrg::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`txfifoirqtrg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Tx FIFO IRQ Trigger Level\n\nYou can [`read`](crate::Reg::read) this register and get [`txfifoirqtrg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`txfifoirqtrg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct TxfifoirqtrgSpec;
 impl crate::RegisterSpec for TxfifoirqtrgSpec {
     type Ux = u32;
diff --git a/va416xx/src/uart0/txstatus.rs b/va416xx/src/uart0/txstatus.rs
index 42852d9..76789f2 100644
--- a/va416xx/src/uart0/txstatus.rs
+++ b/va416xx/src/uart0/txstatus.rs
@@ -37,7 +37,7 @@ impl R {
         TxctsnR::new(((self.bits >> 15) & 1) != 0)
     }
 }
-#[doc = "Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txstatus::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`txstatus::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct TxstatusSpec;
 impl crate::RegisterSpec for TxstatusSpec {
     type Ux = u32;
diff --git a/va416xx/src/utility.rs b/va416xx/src/utility.rs
index 9866ff5..b979c8e 100644
--- a/va416xx/src/utility.rs
+++ b/va416xx/src/utility.rs
@@ -96,91 +96,91 @@ impl RegisterBlock {
         &self.perid
     }
 }
-#[doc = "SYND_DATA (rw) register accessor: Data Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`synd_data::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`synd_data::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@synd_data`]
+#[doc = "SYND_DATA (rw) register accessor: Data Register\n\nYou can [`read`](crate::Reg::read) this register and get [`synd_data::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`synd_data::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@synd_data`]
 module"]
 #[doc(alias = "SYND_DATA")]
 pub type SyndData = crate::Reg<synd_data::SyndDataSpec>;
 #[doc = "Data Register"]
 pub mod synd_data;
-#[doc = "SYND_SYND (rw) register accessor: Syndrome Data Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`synd_synd::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`synd_synd::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@synd_synd`]
+#[doc = "SYND_SYND (rw) register accessor: Syndrome Data Register\n\nYou can [`read`](crate::Reg::read) this register and get [`synd_synd::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`synd_synd::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@synd_synd`]
 module"]
 #[doc(alias = "SYND_SYND")]
 pub type SyndSynd = crate::Reg<synd_synd::SyndSyndSpec>;
 #[doc = "Syndrome Data Register"]
 pub mod synd_synd;
-#[doc = "SYND_ENC_32_44 (rw) register accessor: EDAC Encode\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`synd_enc_32_44::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`synd_enc_32_44::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@synd_enc_32_44`]
+#[doc = "SYND_ENC_32_44 (rw) register accessor: EDAC Encode\n\nYou can [`read`](crate::Reg::read) this register and get [`synd_enc_32_44::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`synd_enc_32_44::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@synd_enc_32_44`]
 module"]
 #[doc(alias = "SYND_ENC_32_44")]
 pub type SyndEnc32_44 = crate::Reg<synd_enc_32_44::SyndEnc32_44Spec>;
 #[doc = "EDAC Encode"]
 pub mod synd_enc_32_44;
-#[doc = "SYND_CHECK_32_44_DATA (r) register accessor: EDAC Decode Data\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`synd_check_32_44_data::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@synd_check_32_44_data`]
+#[doc = "SYND_CHECK_32_44_DATA (r) register accessor: EDAC Decode Data\n\nYou can [`read`](crate::Reg::read) this register and get [`synd_check_32_44_data::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@synd_check_32_44_data`]
 module"]
 #[doc(alias = "SYND_CHECK_32_44_DATA")]
 pub type SyndCheck32_44Data = crate::Reg<synd_check_32_44_data::SyndCheck32_44DataSpec>;
 #[doc = "EDAC Decode Data"]
 pub mod synd_check_32_44_data;
-#[doc = "SYND_CHECK_32_44_SYND (r) register accessor: EDAC Decode Syndrome\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`synd_check_32_44_synd::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@synd_check_32_44_synd`]
+#[doc = "SYND_CHECK_32_44_SYND (r) register accessor: EDAC Decode Syndrome\n\nYou can [`read`](crate::Reg::read) this register and get [`synd_check_32_44_synd::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@synd_check_32_44_synd`]
 module"]
 #[doc(alias = "SYND_CHECK_32_44_SYND")]
 pub type SyndCheck32_44Synd = crate::Reg<synd_check_32_44_synd::SyndCheck32_44SyndSpec>;
 #[doc = "EDAC Decode Syndrome"]
 pub mod synd_check_32_44_synd;
-#[doc = "ROM_TRAP_ADDRESS (rw) register accessor: ROM EDAC Trap Address\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rom_trap_address::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rom_trap_address::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rom_trap_address`]
+#[doc = "ROM_TRAP_ADDRESS (rw) register accessor: ROM EDAC Trap Address\n\nYou can [`read`](crate::Reg::read) this register and get [`rom_trap_address::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rom_trap_address::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rom_trap_address`]
 module"]
 #[doc(alias = "ROM_TRAP_ADDRESS")]
 pub type RomTrapAddress = crate::Reg<rom_trap_address::RomTrapAddressSpec>;
 #[doc = "ROM EDAC Trap Address"]
 pub mod rom_trap_address;
-#[doc = "ROM_TRAP_SYND (rw) register accessor: ROM EDAC Trap Syndrome\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rom_trap_synd::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rom_trap_synd::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rom_trap_synd`]
+#[doc = "ROM_TRAP_SYND (rw) register accessor: ROM EDAC Trap Syndrome\n\nYou can [`read`](crate::Reg::read) this register and get [`rom_trap_synd::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rom_trap_synd::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rom_trap_synd`]
 module"]
 #[doc(alias = "ROM_TRAP_SYND")]
 pub type RomTrapSynd = crate::Reg<rom_trap_synd::RomTrapSyndSpec>;
 #[doc = "ROM EDAC Trap Syndrome"]
 pub mod rom_trap_synd;
-#[doc = "RAM_TRAP_ADDR0 (rw) register accessor: RAM0 EDAC Trap Address\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ram_trap_addr0::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ram_trap_addr0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ram_trap_addr0`]
+#[doc = "RAM_TRAP_ADDR0 (rw) register accessor: RAM0 EDAC Trap Address\n\nYou can [`read`](crate::Reg::read) this register and get [`ram_trap_addr0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ram_trap_addr0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ram_trap_addr0`]
 module"]
 #[doc(alias = "RAM_TRAP_ADDR0")]
 pub type RamTrapAddr0 = crate::Reg<ram_trap_addr0::RamTrapAddr0Spec>;
 #[doc = "RAM0 EDAC Trap Address"]
 pub mod ram_trap_addr0;
-#[doc = "RAM_TRAP_SYND0 (rw) register accessor: RAM0 EDAC Trap Syndrome\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ram_trap_synd0::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ram_trap_synd0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ram_trap_synd0`]
+#[doc = "RAM_TRAP_SYND0 (rw) register accessor: RAM0 EDAC Trap Syndrome\n\nYou can [`read`](crate::Reg::read) this register and get [`ram_trap_synd0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ram_trap_synd0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ram_trap_synd0`]
 module"]
 #[doc(alias = "RAM_TRAP_SYND0")]
 pub type RamTrapSynd0 = crate::Reg<ram_trap_synd0::RamTrapSynd0Spec>;
 #[doc = "RAM0 EDAC Trap Syndrome"]
 pub mod ram_trap_synd0;
-#[doc = "RAM_TRAP_ADDR1 (rw) register accessor: RAM1 EDAC Trap Address\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ram_trap_addr1::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ram_trap_addr1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ram_trap_addr1`]
+#[doc = "RAM_TRAP_ADDR1 (rw) register accessor: RAM1 EDAC Trap Address\n\nYou can [`read`](crate::Reg::read) this register and get [`ram_trap_addr1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ram_trap_addr1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ram_trap_addr1`]
 module"]
 #[doc(alias = "RAM_TRAP_ADDR1")]
 pub type RamTrapAddr1 = crate::Reg<ram_trap_addr1::RamTrapAddr1Spec>;
 #[doc = "RAM1 EDAC Trap Address"]
 pub mod ram_trap_addr1;
-#[doc = "RAM_TRAP_SYND1 (rw) register accessor: RAM1 EDAC Trap Syndrome\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ram_trap_synd1::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ram_trap_synd1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ram_trap_synd1`]
+#[doc = "RAM_TRAP_SYND1 (rw) register accessor: RAM1 EDAC Trap Syndrome\n\nYou can [`read`](crate::Reg::read) this register and get [`ram_trap_synd1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ram_trap_synd1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ram_trap_synd1`]
 module"]
 #[doc(alias = "RAM_TRAP_SYND1")]
 pub type RamTrapSynd1 = crate::Reg<ram_trap_synd1::RamTrapSynd1Spec>;
 #[doc = "RAM1 EDAC Trap Syndrome"]
 pub mod ram_trap_synd1;
-#[doc = "SYND_ENC_32_52 (r) register accessor: EDAC Encode\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`synd_enc_32_52::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@synd_enc_32_52`]
+#[doc = "SYND_ENC_32_52 (r) register accessor: EDAC Encode\n\nYou can [`read`](crate::Reg::read) this register and get [`synd_enc_32_52::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@synd_enc_32_52`]
 module"]
 #[doc(alias = "SYND_ENC_32_52")]
 pub type SyndEnc32_52 = crate::Reg<synd_enc_32_52::SyndEnc32_52Spec>;
 #[doc = "EDAC Encode"]
 pub mod synd_enc_32_52;
-#[doc = "SYND_CHECK_32_52_DATA (r) register accessor: EDAC Decode Data\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`synd_check_32_52_data::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@synd_check_32_52_data`]
+#[doc = "SYND_CHECK_32_52_DATA (r) register accessor: EDAC Decode Data\n\nYou can [`read`](crate::Reg::read) this register and get [`synd_check_32_52_data::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@synd_check_32_52_data`]
 module"]
 #[doc(alias = "SYND_CHECK_32_52_DATA")]
 pub type SyndCheck32_52Data = crate::Reg<synd_check_32_52_data::SyndCheck32_52DataSpec>;
 #[doc = "EDAC Decode Data"]
 pub mod synd_check_32_52_data;
-#[doc = "SYND_CHECK_32_52_SYND (r) register accessor: EDAC Decode Syndrome\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`synd_check_32_52_synd::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@synd_check_32_52_synd`]
+#[doc = "SYND_CHECK_32_52_SYND (r) register accessor: EDAC Decode Syndrome\n\nYou can [`read`](crate::Reg::read) this register and get [`synd_check_32_52_synd::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@synd_check_32_52_synd`]
 module"]
 #[doc(alias = "SYND_CHECK_32_52_SYND")]
 pub type SyndCheck32_52Synd = crate::Reg<synd_check_32_52_synd::SyndCheck32_52SyndSpec>;
 #[doc = "EDAC Decode Syndrome"]
 pub mod synd_check_32_52_synd;
-#[doc = "PERID (r) register accessor: Peripheral ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`perid::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@perid`]
+#[doc = "PERID (r) register accessor: Peripheral ID Register\n\nYou can [`read`](crate::Reg::read) this register and get [`perid::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@perid`]
 module"]
 #[doc(alias = "PERID")]
 pub type Perid = crate::Reg<perid::PeridSpec>;
diff --git a/va416xx/src/utility/perid.rs b/va416xx/src/utility/perid.rs
index 8a3adc5..8884bb7 100644
--- a/va416xx/src/utility/perid.rs
+++ b/va416xx/src/utility/perid.rs
@@ -5,7 +5,7 @@ impl core::fmt::Debug for R {
         write!(f, "{}", self.bits())
     }
 }
-#[doc = "Peripheral ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`perid::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Peripheral ID Register\n\nYou can [`read`](crate::Reg::read) this register and get [`perid::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct PeridSpec;
 impl crate::RegisterSpec for PeridSpec {
     type Ux = u32;
diff --git a/va416xx/src/utility/ram_trap_addr0.rs b/va416xx/src/utility/ram_trap_addr0.rs
index d29dd1a..e48d3d3 100644
--- a/va416xx/src/utility/ram_trap_addr0.rs
+++ b/va416xx/src/utility/ram_trap_addr0.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 2:30 - Address bits for trap match"]
     #[inline(always)]
-    #[must_use]
     pub fn addr(&mut self) -> AddrW<RamTrapAddr0Spec> {
         AddrW::new(self, 2)
     }
     #[doc = "Bit 31 - Enable Trap mode"]
     #[inline(always)]
-    #[must_use]
     pub fn enable(&mut self) -> EnableW<RamTrapAddr0Spec> {
         EnableW::new(self, 31)
     }
 }
-#[doc = "RAM0 EDAC Trap Address\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ram_trap_addr0::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ram_trap_addr0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "RAM0 EDAC Trap Address\n\nYou can [`read`](crate::Reg::read) this register and get [`ram_trap_addr0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ram_trap_addr0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct RamTrapAddr0Spec;
 impl crate::RegisterSpec for RamTrapAddr0Spec {
     type Ux = u32;
diff --git a/va416xx/src/utility/ram_trap_addr1.rs b/va416xx/src/utility/ram_trap_addr1.rs
index ce2b329..6414a05 100644
--- a/va416xx/src/utility/ram_trap_addr1.rs
+++ b/va416xx/src/utility/ram_trap_addr1.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 2:30 - Address bits for trap match"]
     #[inline(always)]
-    #[must_use]
     pub fn addr(&mut self) -> AddrW<RamTrapAddr1Spec> {
         AddrW::new(self, 2)
     }
     #[doc = "Bit 31 - Enable Trap mode"]
     #[inline(always)]
-    #[must_use]
     pub fn enable(&mut self) -> EnableW<RamTrapAddr1Spec> {
         EnableW::new(self, 31)
     }
 }
-#[doc = "RAM1 EDAC Trap Address\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ram_trap_addr1::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ram_trap_addr1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "RAM1 EDAC Trap Address\n\nYou can [`read`](crate::Reg::read) this register and get [`ram_trap_addr1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ram_trap_addr1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct RamTrapAddr1Spec;
 impl crate::RegisterSpec for RamTrapAddr1Spec {
     type Ux = u32;
diff --git a/va416xx/src/utility/ram_trap_synd0.rs b/va416xx/src/utility/ram_trap_synd0.rs
index 7eaf19f..82cd995 100644
--- a/va416xx/src/utility/ram_trap_synd0.rs
+++ b/va416xx/src/utility/ram_trap_synd0.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:5 - 6-bit syndrome value for bits 15-0"]
     #[inline(always)]
-    #[must_use]
     pub fn ram_synd_7_0(&mut self) -> RamSynd7_0W<RamTrapSynd0Spec> {
         RamSynd7_0W::new(self, 0)
     }
     #[doc = "Bits 6:11 - 6-bit syndrome value for bits 31-16"]
     #[inline(always)]
-    #[must_use]
     pub fn ram_synd_31_16(&mut self) -> RamSynd31_16W<RamTrapSynd0Spec> {
         RamSynd31_16W::new(self, 6)
     }
 }
-#[doc = "RAM0 EDAC Trap Syndrome\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ram_trap_synd0::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ram_trap_synd0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "RAM0 EDAC Trap Syndrome\n\nYou can [`read`](crate::Reg::read) this register and get [`ram_trap_synd0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ram_trap_synd0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct RamTrapSynd0Spec;
 impl crate::RegisterSpec for RamTrapSynd0Spec {
     type Ux = u32;
diff --git a/va416xx/src/utility/ram_trap_synd1.rs b/va416xx/src/utility/ram_trap_synd1.rs
index adf1ba5..ea32757 100644
--- a/va416xx/src/utility/ram_trap_synd1.rs
+++ b/va416xx/src/utility/ram_trap_synd1.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:5 - 6-bit syndrome value for bits 15-0"]
     #[inline(always)]
-    #[must_use]
     pub fn ram_synd_7_0(&mut self) -> RamSynd7_0W<RamTrapSynd1Spec> {
         RamSynd7_0W::new(self, 0)
     }
     #[doc = "Bits 6:11 - 6-bit syndrome value for bits 31-16"]
     #[inline(always)]
-    #[must_use]
     pub fn ram_synd_31_16(&mut self) -> RamSynd31_16W<RamTrapSynd1Spec> {
         RamSynd31_16W::new(self, 6)
     }
 }
-#[doc = "RAM1 EDAC Trap Syndrome\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ram_trap_synd1::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ram_trap_synd1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "RAM1 EDAC Trap Syndrome\n\nYou can [`read`](crate::Reg::read) this register and get [`ram_trap_synd1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ram_trap_synd1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct RamTrapSynd1Spec;
 impl crate::RegisterSpec for RamTrapSynd1Spec {
     type Ux = u32;
diff --git a/va416xx/src/utility/rom_trap_address.rs b/va416xx/src/utility/rom_trap_address.rs
index 722dc0c..7e6b9b8 100644
--- a/va416xx/src/utility/rom_trap_address.rs
+++ b/va416xx/src/utility/rom_trap_address.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 2:30 - Address bits for trap match"]
     #[inline(always)]
-    #[must_use]
     pub fn addr(&mut self) -> AddrW<RomTrapAddressSpec> {
         AddrW::new(self, 2)
     }
     #[doc = "Bit 31 - Enable Trap mode"]
     #[inline(always)]
-    #[must_use]
     pub fn enable(&mut self) -> EnableW<RomTrapAddressSpec> {
         EnableW::new(self, 31)
     }
 }
-#[doc = "ROM EDAC Trap Address\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rom_trap_address::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rom_trap_address::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "ROM EDAC Trap Address\n\nYou can [`read`](crate::Reg::read) this register and get [`rom_trap_address::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rom_trap_address::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct RomTrapAddressSpec;
 impl crate::RegisterSpec for RomTrapAddressSpec {
     type Ux = u32;
diff --git a/va416xx/src/utility/rom_trap_synd.rs b/va416xx/src/utility/rom_trap_synd.rs
index 81faf4e..ed7cf18 100644
--- a/va416xx/src/utility/rom_trap_synd.rs
+++ b/va416xx/src/utility/rom_trap_synd.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:5 - 6-bit syndrome value for bits 15-0"]
     #[inline(always)]
-    #[must_use]
     pub fn rom_synd_7_0(&mut self) -> RomSynd7_0W<RomTrapSyndSpec> {
         RomSynd7_0W::new(self, 0)
     }
     #[doc = "Bits 6:11 - 6-bit syndrome value for bits 31-16"]
     #[inline(always)]
-    #[must_use]
     pub fn r0m_synd_31_16(&mut self) -> R0mSynd31_16W<RomTrapSyndSpec> {
         R0mSynd31_16W::new(self, 6)
     }
 }
-#[doc = "ROM EDAC Trap Syndrome\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rom_trap_synd::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rom_trap_synd::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "ROM EDAC Trap Syndrome\n\nYou can [`read`](crate::Reg::read) this register and get [`rom_trap_synd::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rom_trap_synd::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct RomTrapSyndSpec;
 impl crate::RegisterSpec for RomTrapSyndSpec {
     type Ux = u32;
diff --git a/va416xx/src/utility/synd_check_32_44_data.rs b/va416xx/src/utility/synd_check_32_44_data.rs
index 0adfd8b..ca46fcd 100644
--- a/va416xx/src/utility/synd_check_32_44_data.rs
+++ b/va416xx/src/utility/synd_check_32_44_data.rs
@@ -5,7 +5,7 @@ impl core::fmt::Debug for R {
         write!(f, "{}", self.bits())
     }
 }
-#[doc = "EDAC Decode Data\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`synd_check_32_44_data::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "EDAC Decode Data\n\nYou can [`read`](crate::Reg::read) this register and get [`synd_check_32_44_data::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct SyndCheck32_44DataSpec;
 impl crate::RegisterSpec for SyndCheck32_44DataSpec {
     type Ux = u32;
diff --git a/va416xx/src/utility/synd_check_32_44_synd.rs b/va416xx/src/utility/synd_check_32_44_synd.rs
index a0d7f6b..f00807c 100644
--- a/va416xx/src/utility/synd_check_32_44_synd.rs
+++ b/va416xx/src/utility/synd_check_32_44_synd.rs
@@ -23,7 +23,7 @@ impl R {
         MbeR::new(((self.bits >> 14) & 3) as u8)
     }
 }
-#[doc = "EDAC Decode Syndrome\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`synd_check_32_44_synd::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "EDAC Decode Syndrome\n\nYou can [`read`](crate::Reg::read) this register and get [`synd_check_32_44_synd::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct SyndCheck32_44SyndSpec;
 impl crate::RegisterSpec for SyndCheck32_44SyndSpec {
     type Ux = u32;
diff --git a/va416xx/src/utility/synd_check_32_52_data.rs b/va416xx/src/utility/synd_check_32_52_data.rs
index df77cde..61c912c 100644
--- a/va416xx/src/utility/synd_check_32_52_data.rs
+++ b/va416xx/src/utility/synd_check_32_52_data.rs
@@ -5,7 +5,7 @@ impl core::fmt::Debug for R {
         write!(f, "{}", self.bits())
     }
 }
-#[doc = "EDAC Decode Data\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`synd_check_32_52_data::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "EDAC Decode Data\n\nYou can [`read`](crate::Reg::read) this register and get [`synd_check_32_52_data::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct SyndCheck32_52DataSpec;
 impl crate::RegisterSpec for SyndCheck32_52DataSpec {
     type Ux = u32;
diff --git a/va416xx/src/utility/synd_check_32_52_synd.rs b/va416xx/src/utility/synd_check_32_52_synd.rs
index 55fea27..069481a 100644
--- a/va416xx/src/utility/synd_check_32_52_synd.rs
+++ b/va416xx/src/utility/synd_check_32_52_synd.rs
@@ -23,7 +23,7 @@ impl R {
         MbeR::new(((self.bits >> 28) & 0x0f) as u8)
     }
 }
-#[doc = "EDAC Decode Syndrome\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`synd_check_32_52_synd::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "EDAC Decode Syndrome\n\nYou can [`read`](crate::Reg::read) this register and get [`synd_check_32_52_synd::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct SyndCheck32_52SyndSpec;
 impl crate::RegisterSpec for SyndCheck32_52SyndSpec {
     type Ux = u32;
diff --git a/va416xx/src/utility/synd_data.rs b/va416xx/src/utility/synd_data.rs
index 044ed82..5ad1d07 100644
--- a/va416xx/src/utility/synd_data.rs
+++ b/va416xx/src/utility/synd_data.rs
@@ -8,7 +8,7 @@ impl core::fmt::Debug for R {
     }
 }
 impl W {}
-#[doc = "Data Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`synd_data::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`synd_data::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Data Register\n\nYou can [`read`](crate::Reg::read) this register and get [`synd_data::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`synd_data::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct SyndDataSpec;
 impl crate::RegisterSpec for SyndDataSpec {
     type Ux = u32;
diff --git a/va416xx/src/utility/synd_enc_32_44.rs b/va416xx/src/utility/synd_enc_32_44.rs
index adc5116..9a39c9a 100644
--- a/va416xx/src/utility/synd_enc_32_44.rs
+++ b/va416xx/src/utility/synd_enc_32_44.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:5 - Computed syndrome value for bits 15-0"]
     #[inline(always)]
-    #[must_use]
     pub fn synd_enc_7_0(&mut self) -> SyndEnc7_0W<SyndEnc32_44Spec> {
         SyndEnc7_0W::new(self, 0)
     }
     #[doc = "Bits 6:11 - Computed syndrome value for bits 31-16"]
     #[inline(always)]
-    #[must_use]
     pub fn synd_enc_31_16(&mut self) -> SyndEnc31_16W<SyndEnc32_44Spec> {
         SyndEnc31_16W::new(self, 6)
     }
 }
-#[doc = "EDAC Encode\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`synd_enc_32_44::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`synd_enc_32_44::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "EDAC Encode\n\nYou can [`read`](crate::Reg::read) this register and get [`synd_enc_32_44::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`synd_enc_32_44::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct SyndEnc32_44Spec;
 impl crate::RegisterSpec for SyndEnc32_44Spec {
     type Ux = u32;
diff --git a/va416xx/src/utility/synd_enc_32_52.rs b/va416xx/src/utility/synd_enc_32_52.rs
index a8abc21..233415d 100644
--- a/va416xx/src/utility/synd_enc_32_52.rs
+++ b/va416xx/src/utility/synd_enc_32_52.rs
@@ -9,7 +9,7 @@ impl R {
         SyndEnc32_52R::new(self.bits & 0x000f_ffff)
     }
 }
-#[doc = "EDAC Encode\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`synd_enc_32_52::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "EDAC Encode\n\nYou can [`read`](crate::Reg::read) this register and get [`synd_enc_32_52::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct SyndEnc32_52Spec;
 impl crate::RegisterSpec for SyndEnc32_52Spec {
     type Ux = u32;
diff --git a/va416xx/src/utility/synd_synd.rs b/va416xx/src/utility/synd_synd.rs
index be106b1..bfb6c6f 100644
--- a/va416xx/src/utility/synd_synd.rs
+++ b/va416xx/src/utility/synd_synd.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:11 - Provides bits 11:0 for syndrome, 2x6-bit"]
     #[inline(always)]
-    #[must_use]
     pub fn synd_synd(&mut self) -> SyndSyndW<SyndSyndSpec> {
         SyndSyndW::new(self, 0)
     }
 }
-#[doc = "Syndrome Data Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`synd_synd::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`synd_synd::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Syndrome Data Register\n\nYou can [`read`](crate::Reg::read) this register and get [`synd_synd::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`synd_synd::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct SyndSyndSpec;
 impl crate::RegisterSpec for SyndSyndSpec {
     type Ux = u32;
diff --git a/va416xx/src/watch_dog.rs b/va416xx/src/watch_dog.rs
index 2ec0e75..9449064 100644
--- a/va416xx/src/watch_dog.rs
+++ b/va416xx/src/watch_dog.rs
@@ -109,103 +109,103 @@ impl RegisterBlock {
         &self.wdogpcellid3
     }
 }
-#[doc = "WDOGLOAD (rw) register accessor: Counter Start Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdogload::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`wdogload::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdogload`]
+#[doc = "WDOGLOAD (rw) register accessor: Counter Start Value\n\nYou can [`read`](crate::Reg::read) this register and get [`wdogload::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wdogload::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdogload`]
 module"]
 #[doc(alias = "WDOGLOAD")]
 pub type Wdogload = crate::Reg<wdogload::WdogloadSpec>;
 #[doc = "Counter Start Value"]
 pub mod wdogload;
-#[doc = "WDOGVALUE (r) register accessor: Down Counter Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdogvalue::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdogvalue`]
+#[doc = "WDOGVALUE (r) register accessor: Down Counter Value\n\nYou can [`read`](crate::Reg::read) this register and get [`wdogvalue::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdogvalue`]
 module"]
 #[doc(alias = "WDOGVALUE")]
 pub type Wdogvalue = crate::Reg<wdogvalue::WdogvalueSpec>;
 #[doc = "Down Counter Value"]
 pub mod wdogvalue;
-#[doc = "WDOGCONTROL (rw) register accessor: Enable for block reset and interrupt\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdogcontrol::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`wdogcontrol::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdogcontrol`]
+#[doc = "WDOGCONTROL (rw) register accessor: Enable for block reset and interrupt\n\nYou can [`read`](crate::Reg::read) this register and get [`wdogcontrol::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wdogcontrol::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdogcontrol`]
 module"]
 #[doc(alias = "WDOGCONTROL")]
 pub type Wdogcontrol = crate::Reg<wdogcontrol::WdogcontrolSpec>;
 #[doc = "Enable for block reset and interrupt"]
 pub mod wdogcontrol;
-#[doc = "WDOGINTCLR (rw) register accessor: A write of any value clears the WDT module interrupt, and reloads the counter from the value in the WDOGLOAD Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdogintclr::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`wdogintclr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdogintclr`]
+#[doc = "WDOGINTCLR (rw) register accessor: A write of any value clears the WDT module interrupt, and reloads the counter from the value in the WDOGLOAD Register\n\nYou can [`read`](crate::Reg::read) this register and get [`wdogintclr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wdogintclr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdogintclr`]
 module"]
 #[doc(alias = "WDOGINTCLR")]
 pub type Wdogintclr = crate::Reg<wdogintclr::WdogintclrSpec>;
 #[doc = "A write of any value clears the WDT module interrupt, and reloads the counter from the value in the WDOGLOAD Register"]
 pub mod wdogintclr;
-#[doc = "WDOGRIS (r) register accessor: Raw interrupt status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdogris::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdogris`]
+#[doc = "WDOGRIS (r) register accessor: Raw interrupt status\n\nYou can [`read`](crate::Reg::read) this register and get [`wdogris::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdogris`]
 module"]
 #[doc(alias = "WDOGRIS")]
 pub type Wdogris = crate::Reg<wdogris::WdogrisSpec>;
 #[doc = "Raw interrupt status"]
 pub mod wdogris;
-#[doc = "WDOGMIS (r) register accessor: Interrupt status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdogmis::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdogmis`]
+#[doc = "WDOGMIS (r) register accessor: Interrupt status\n\nYou can [`read`](crate::Reg::read) this register and get [`wdogmis::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdogmis`]
 module"]
 #[doc(alias = "WDOGMIS")]
 pub type Wdogmis = crate::Reg<wdogmis::WdogmisSpec>;
 #[doc = "Interrupt status"]
 pub mod wdogmis;
-#[doc = "WDOGLOCK (rw) register accessor: Lock\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdoglock::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`wdoglock::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdoglock`]
+#[doc = "WDOGLOCK (rw) register accessor: Lock\n\nYou can [`read`](crate::Reg::read) this register and get [`wdoglock::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wdoglock::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdoglock`]
 module"]
 #[doc(alias = "WDOGLOCK")]
 pub type Wdoglock = crate::Reg<wdoglock::WdoglockSpec>;
 #[doc = "Lock"]
 pub mod wdoglock;
-#[doc = "WDOGITCR (rw) register accessor: Integration test control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdogitcr::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`wdogitcr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdogitcr`]
+#[doc = "WDOGITCR (rw) register accessor: Integration test control\n\nYou can [`read`](crate::Reg::read) this register and get [`wdogitcr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wdogitcr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdogitcr`]
 module"]
 #[doc(alias = "WDOGITCR")]
 pub type Wdogitcr = crate::Reg<wdogitcr::WdogitcrSpec>;
 #[doc = "Integration test control"]
 pub mod wdogitcr;
-#[doc = "WDOGITOP (rw) register accessor: Integration test output set\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdogitop::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`wdogitop::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdogitop`]
+#[doc = "WDOGITOP (rw) register accessor: Integration test output set\n\nYou can [`read`](crate::Reg::read) this register and get [`wdogitop::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wdogitop::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdogitop`]
 module"]
 #[doc(alias = "WDOGITOP")]
 pub type Wdogitop = crate::Reg<wdogitop::WdogitopSpec>;
 #[doc = "Integration test output set"]
 pub mod wdogitop;
-#[doc = "WDOGPERIPHID0 (r) register accessor: Peripheral ID\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdogperiphid0::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdogperiphid0`]
+#[doc = "WDOGPERIPHID0 (r) register accessor: Peripheral ID\n\nYou can [`read`](crate::Reg::read) this register and get [`wdogperiphid0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdogperiphid0`]
 module"]
 #[doc(alias = "WDOGPERIPHID0")]
 pub type Wdogperiphid0 = crate::Reg<wdogperiphid0::Wdogperiphid0Spec>;
 #[doc = "Peripheral ID"]
 pub mod wdogperiphid0;
-#[doc = "WDOGPERIPHID1 (r) register accessor: Peripheral ID\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdogperiphid1::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdogperiphid1`]
+#[doc = "WDOGPERIPHID1 (r) register accessor: Peripheral ID\n\nYou can [`read`](crate::Reg::read) this register and get [`wdogperiphid1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdogperiphid1`]
 module"]
 #[doc(alias = "WDOGPERIPHID1")]
 pub type Wdogperiphid1 = crate::Reg<wdogperiphid1::Wdogperiphid1Spec>;
 #[doc = "Peripheral ID"]
 pub mod wdogperiphid1;
-#[doc = "WDOGPERIPHID2 (r) register accessor: Peripheral ID\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdogperiphid2::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdogperiphid2`]
+#[doc = "WDOGPERIPHID2 (r) register accessor: Peripheral ID\n\nYou can [`read`](crate::Reg::read) this register and get [`wdogperiphid2::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdogperiphid2`]
 module"]
 #[doc(alias = "WDOGPERIPHID2")]
 pub type Wdogperiphid2 = crate::Reg<wdogperiphid2::Wdogperiphid2Spec>;
 #[doc = "Peripheral ID"]
 pub mod wdogperiphid2;
-#[doc = "WDOGPERIPHID3 (r) register accessor: Peripheral ID\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdogperiphid3::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdogperiphid3`]
+#[doc = "WDOGPERIPHID3 (r) register accessor: Peripheral ID\n\nYou can [`read`](crate::Reg::read) this register and get [`wdogperiphid3::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdogperiphid3`]
 module"]
 #[doc(alias = "WDOGPERIPHID3")]
 pub type Wdogperiphid3 = crate::Reg<wdogperiphid3::Wdogperiphid3Spec>;
 #[doc = "Peripheral ID"]
 pub mod wdogperiphid3;
-#[doc = "WDOGPCELLID0 (r) register accessor: PrimeCell ID\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdogpcellid0::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdogpcellid0`]
+#[doc = "WDOGPCELLID0 (r) register accessor: PrimeCell ID\n\nYou can [`read`](crate::Reg::read) this register and get [`wdogpcellid0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdogpcellid0`]
 module"]
 #[doc(alias = "WDOGPCELLID0")]
 pub type Wdogpcellid0 = crate::Reg<wdogpcellid0::Wdogpcellid0Spec>;
 #[doc = "PrimeCell ID"]
 pub mod wdogpcellid0;
-#[doc = "WDOGPCELLID1 (r) register accessor: PrimeCell ID\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdogpcellid1::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdogpcellid1`]
+#[doc = "WDOGPCELLID1 (r) register accessor: PrimeCell ID\n\nYou can [`read`](crate::Reg::read) this register and get [`wdogpcellid1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdogpcellid1`]
 module"]
 #[doc(alias = "WDOGPCELLID1")]
 pub type Wdogpcellid1 = crate::Reg<wdogpcellid1::Wdogpcellid1Spec>;
 #[doc = "PrimeCell ID"]
 pub mod wdogpcellid1;
-#[doc = "WDOGPCELLID2 (r) register accessor: PrimeCell ID\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdogpcellid2::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdogpcellid2`]
+#[doc = "WDOGPCELLID2 (r) register accessor: PrimeCell ID\n\nYou can [`read`](crate::Reg::read) this register and get [`wdogpcellid2::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdogpcellid2`]
 module"]
 #[doc(alias = "WDOGPCELLID2")]
 pub type Wdogpcellid2 = crate::Reg<wdogpcellid2::Wdogpcellid2Spec>;
 #[doc = "PrimeCell ID"]
 pub mod wdogpcellid2;
-#[doc = "WDOGPCELLID3 (r) register accessor: PrimeCell ID\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdogpcellid3::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdogpcellid3`]
+#[doc = "WDOGPCELLID3 (r) register accessor: PrimeCell ID\n\nYou can [`read`](crate::Reg::read) this register and get [`wdogpcellid3::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdogpcellid3`]
 module"]
 #[doc(alias = "WDOGPCELLID3")]
 pub type Wdogpcellid3 = crate::Reg<wdogpcellid3::Wdogpcellid3Spec>;
diff --git a/va416xx/src/watch_dog/wdogcontrol.rs b/va416xx/src/watch_dog/wdogcontrol.rs
index 3749f4f..386a5b7 100644
--- a/va416xx/src/watch_dog/wdogcontrol.rs
+++ b/va416xx/src/watch_dog/wdogcontrol.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Enable watchdog interrupt"]
     #[inline(always)]
-    #[must_use]
     pub fn inten(&mut self) -> IntenW<WdogcontrolSpec> {
         IntenW::new(self, 0)
     }
     #[doc = "Bit 1 - Enable watchdog reset output"]
     #[inline(always)]
-    #[must_use]
     pub fn resen(&mut self) -> ResenW<WdogcontrolSpec> {
         ResenW::new(self, 1)
     }
 }
-#[doc = "Enable for block reset and interrupt\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdogcontrol::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`wdogcontrol::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Enable for block reset and interrupt\n\nYou can [`read`](crate::Reg::read) this register and get [`wdogcontrol::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wdogcontrol::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct WdogcontrolSpec;
 impl crate::RegisterSpec for WdogcontrolSpec {
     type Ux = u32;
diff --git a/va416xx/src/watch_dog/wdogintclr.rs b/va416xx/src/watch_dog/wdogintclr.rs
index e4e036c..d821377 100644
--- a/va416xx/src/watch_dog/wdogintclr.rs
+++ b/va416xx/src/watch_dog/wdogintclr.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:31 - Write any value to clear interrupt"]
     #[inline(always)]
-    #[must_use]
     pub fn clear(&mut self) -> ClearW<WdogintclrSpec> {
         ClearW::new(self, 0)
     }
 }
-#[doc = "A write of any value clears the WDT module interrupt, and reloads the counter from the value in the WDOGLOAD Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdogintclr::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`wdogintclr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "A write of any value clears the WDT module interrupt, and reloads the counter from the value in the WDOGLOAD Register\n\nYou can [`read`](crate::Reg::read) this register and get [`wdogintclr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wdogintclr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct WdogintclrSpec;
 impl crate::RegisterSpec for WdogintclrSpec {
     type Ux = u32;
diff --git a/va416xx/src/watch_dog/wdogitcr.rs b/va416xx/src/watch_dog/wdogitcr.rs
index 682fa54..74f43a1 100644
--- a/va416xx/src/watch_dog/wdogitcr.rs
+++ b/va416xx/src/watch_dog/wdogitcr.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Enable test mode of WDOGINT and WDOGRES"]
     #[inline(always)]
-    #[must_use]
     pub fn test_mode_en(&mut self) -> TestModeEnW<WdogitcrSpec> {
         TestModeEnW::new(self, 0)
     }
 }
-#[doc = "Integration test control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdogitcr::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`wdogitcr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Integration test control\n\nYou can [`read`](crate::Reg::read) this register and get [`wdogitcr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wdogitcr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct WdogitcrSpec;
 impl crate::RegisterSpec for WdogitcrSpec {
     type Ux = u32;
diff --git a/va416xx/src/watch_dog/wdogitop.rs b/va416xx/src/watch_dog/wdogitop.rs
index 25eedbe..e3b75c4 100644
--- a/va416xx/src/watch_dog/wdogitop.rs
+++ b/va416xx/src/watch_dog/wdogitop.rs
@@ -25,18 +25,16 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Set output value"]
     #[inline(always)]
-    #[must_use]
     pub fn wdogres(&mut self) -> WdogresW<WdogitopSpec> {
         WdogresW::new(self, 0)
     }
     #[doc = "Bit 1 - Set output value"]
     #[inline(always)]
-    #[must_use]
     pub fn wdogint(&mut self) -> WdogintW<WdogitopSpec> {
         WdogintW::new(self, 1)
     }
 }
-#[doc = "Integration test output set\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdogitop::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`wdogitop::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Integration test output set\n\nYou can [`read`](crate::Reg::read) this register and get [`wdogitop::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wdogitop::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct WdogitopSpec;
 impl crate::RegisterSpec for WdogitopSpec {
     type Ux = u32;
diff --git a/va416xx/src/watch_dog/wdogload.rs b/va416xx/src/watch_dog/wdogload.rs
index 4d21910..e631c3c 100644
--- a/va416xx/src/watch_dog/wdogload.rs
+++ b/va416xx/src/watch_dog/wdogload.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:31 - Count to load"]
     #[inline(always)]
-    #[must_use]
     pub fn cnt(&mut self) -> CntW<WdogloadSpec> {
         CntW::new(self, 0)
     }
 }
-#[doc = "Counter Start Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdogload::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`wdogload::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Counter Start Value\n\nYou can [`read`](crate::Reg::read) this register and get [`wdogload::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wdogload::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct WdogloadSpec;
 impl crate::RegisterSpec for WdogloadSpec {
     type Ux = u32;
diff --git a/va416xx/src/watch_dog/wdoglock.rs b/va416xx/src/watch_dog/wdoglock.rs
index c92b686..bf71352 100644
--- a/va416xx/src/watch_dog/wdoglock.rs
+++ b/va416xx/src/watch_dog/wdoglock.rs
@@ -16,12 +16,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:31 - Register write enable status"]
     #[inline(always)]
-    #[must_use]
     pub fn reg_wr_en(&mut self) -> RegWrEnW<WdoglockSpec> {
         RegWrEnW::new(self, 0)
     }
 }
-#[doc = "Lock\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdoglock::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`wdoglock::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Lock\n\nYou can [`read`](crate::Reg::read) this register and get [`wdoglock::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wdoglock::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct WdoglockSpec;
 impl crate::RegisterSpec for WdoglockSpec {
     type Ux = u32;
diff --git a/va416xx/src/watch_dog/wdogmis.rs b/va416xx/src/watch_dog/wdogmis.rs
index 94b8e40..f9398e1 100644
--- a/va416xx/src/watch_dog/wdogmis.rs
+++ b/va416xx/src/watch_dog/wdogmis.rs
@@ -9,7 +9,7 @@ impl R {
         InterruptR::new((self.bits & 1) != 0)
     }
 }
-#[doc = "Interrupt status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdogmis::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Interrupt status\n\nYou can [`read`](crate::Reg::read) this register and get [`wdogmis::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct WdogmisSpec;
 impl crate::RegisterSpec for WdogmisSpec {
     type Ux = u32;
diff --git a/va416xx/src/watch_dog/wdogpcellid0.rs b/va416xx/src/watch_dog/wdogpcellid0.rs
index 3e9b39b..df5eb89 100644
--- a/va416xx/src/watch_dog/wdogpcellid0.rs
+++ b/va416xx/src/watch_dog/wdogpcellid0.rs
@@ -9,7 +9,7 @@ impl R {
         PcellidR::new((self.bits & 0xff) as u8)
     }
 }
-#[doc = "PrimeCell ID\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdogpcellid0::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "PrimeCell ID\n\nYou can [`read`](crate::Reg::read) this register and get [`wdogpcellid0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Wdogpcellid0Spec;
 impl crate::RegisterSpec for Wdogpcellid0Spec {
     type Ux = u32;
diff --git a/va416xx/src/watch_dog/wdogpcellid1.rs b/va416xx/src/watch_dog/wdogpcellid1.rs
index 33483b0..51d134a 100644
--- a/va416xx/src/watch_dog/wdogpcellid1.rs
+++ b/va416xx/src/watch_dog/wdogpcellid1.rs
@@ -9,7 +9,7 @@ impl R {
         PcellidR::new((self.bits & 0xff) as u8)
     }
 }
-#[doc = "PrimeCell ID\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdogpcellid1::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "PrimeCell ID\n\nYou can [`read`](crate::Reg::read) this register and get [`wdogpcellid1::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Wdogpcellid1Spec;
 impl crate::RegisterSpec for Wdogpcellid1Spec {
     type Ux = u32;
diff --git a/va416xx/src/watch_dog/wdogpcellid2.rs b/va416xx/src/watch_dog/wdogpcellid2.rs
index d1c1831..c53aa5f 100644
--- a/va416xx/src/watch_dog/wdogpcellid2.rs
+++ b/va416xx/src/watch_dog/wdogpcellid2.rs
@@ -9,7 +9,7 @@ impl R {
         PcellidR::new((self.bits & 0xff) as u8)
     }
 }
-#[doc = "PrimeCell ID\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdogpcellid2::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "PrimeCell ID\n\nYou can [`read`](crate::Reg::read) this register and get [`wdogpcellid2::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Wdogpcellid2Spec;
 impl crate::RegisterSpec for Wdogpcellid2Spec {
     type Ux = u32;
diff --git a/va416xx/src/watch_dog/wdogpcellid3.rs b/va416xx/src/watch_dog/wdogpcellid3.rs
index ae59c49..9432d19 100644
--- a/va416xx/src/watch_dog/wdogpcellid3.rs
+++ b/va416xx/src/watch_dog/wdogpcellid3.rs
@@ -9,7 +9,7 @@ impl R {
         PcellidR::new((self.bits & 0xff) as u8)
     }
 }
-#[doc = "PrimeCell ID\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdogpcellid3::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "PrimeCell ID\n\nYou can [`read`](crate::Reg::read) this register and get [`wdogpcellid3::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Wdogpcellid3Spec;
 impl crate::RegisterSpec for Wdogpcellid3Spec {
     type Ux = u32;
diff --git a/va416xx/src/watch_dog/wdogperiphid0.rs b/va416xx/src/watch_dog/wdogperiphid0.rs
index 8bad2f1..6f4d16f 100644
--- a/va416xx/src/watch_dog/wdogperiphid0.rs
+++ b/va416xx/src/watch_dog/wdogperiphid0.rs
@@ -9,7 +9,7 @@ impl R {
         PeriphidR::new((self.bits & 0xff) as u8)
     }
 }
-#[doc = "Peripheral ID\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdogperiphid0::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Peripheral ID\n\nYou can [`read`](crate::Reg::read) this register and get [`wdogperiphid0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Wdogperiphid0Spec;
 impl crate::RegisterSpec for Wdogperiphid0Spec {
     type Ux = u32;
diff --git a/va416xx/src/watch_dog/wdogperiphid1.rs b/va416xx/src/watch_dog/wdogperiphid1.rs
index d4ca76a..e0b761f 100644
--- a/va416xx/src/watch_dog/wdogperiphid1.rs
+++ b/va416xx/src/watch_dog/wdogperiphid1.rs
@@ -9,7 +9,7 @@ impl R {
         PeriphidR::new((self.bits & 0xff) as u8)
     }
 }
-#[doc = "Peripheral ID\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdogperiphid1::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Peripheral ID\n\nYou can [`read`](crate::Reg::read) this register and get [`wdogperiphid1::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Wdogperiphid1Spec;
 impl crate::RegisterSpec for Wdogperiphid1Spec {
     type Ux = u32;
diff --git a/va416xx/src/watch_dog/wdogperiphid2.rs b/va416xx/src/watch_dog/wdogperiphid2.rs
index c277ee4..013a22b 100644
--- a/va416xx/src/watch_dog/wdogperiphid2.rs
+++ b/va416xx/src/watch_dog/wdogperiphid2.rs
@@ -9,7 +9,7 @@ impl R {
         PeriphidR::new((self.bits & 0xff) as u8)
     }
 }
-#[doc = "Peripheral ID\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdogperiphid2::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Peripheral ID\n\nYou can [`read`](crate::Reg::read) this register and get [`wdogperiphid2::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Wdogperiphid2Spec;
 impl crate::RegisterSpec for Wdogperiphid2Spec {
     type Ux = u32;
diff --git a/va416xx/src/watch_dog/wdogperiphid3.rs b/va416xx/src/watch_dog/wdogperiphid3.rs
index 1ec1ad4..d236e0f 100644
--- a/va416xx/src/watch_dog/wdogperiphid3.rs
+++ b/va416xx/src/watch_dog/wdogperiphid3.rs
@@ -9,7 +9,7 @@ impl R {
         PeriphidR::new((self.bits & 0xff) as u8)
     }
 }
-#[doc = "Peripheral ID\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdogperiphid3::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Peripheral ID\n\nYou can [`read`](crate::Reg::read) this register and get [`wdogperiphid3::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct Wdogperiphid3Spec;
 impl crate::RegisterSpec for Wdogperiphid3Spec {
     type Ux = u32;
diff --git a/va416xx/src/watch_dog/wdogris.rs b/va416xx/src/watch_dog/wdogris.rs
index 3e8dfd4..a7885d7 100644
--- a/va416xx/src/watch_dog/wdogris.rs
+++ b/va416xx/src/watch_dog/wdogris.rs
@@ -9,7 +9,7 @@ impl R {
         InterruptR::new((self.bits & 1) != 0)
     }
 }
-#[doc = "Raw interrupt status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdogris::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Raw interrupt status\n\nYou can [`read`](crate::Reg::read) this register and get [`wdogris::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct WdogrisSpec;
 impl crate::RegisterSpec for WdogrisSpec {
     type Ux = u32;
diff --git a/va416xx/src/watch_dog/wdogvalue.rs b/va416xx/src/watch_dog/wdogvalue.rs
index cf1335e..843338f 100644
--- a/va416xx/src/watch_dog/wdogvalue.rs
+++ b/va416xx/src/watch_dog/wdogvalue.rs
@@ -9,7 +9,7 @@ impl R {
         CntR::new(self.bits)
     }
 }
-#[doc = "Down Counter Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdogvalue::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "Down Counter Value\n\nYou can [`read`](crate::Reg::read) this register and get [`wdogvalue::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct WdogvalueSpec;
 impl crate::RegisterSpec for WdogvalueSpec {
     type Ux = u32;