UART, WDT and CLKGEN

examples/simple/Cargo.toml

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+[package]
+name = "simple_examples"
+version = "0.1.0"
+edition = "2021"
+
+[dependencies]
+cortex-m-rt = "0.7"
+va416xx-hal = { path = "../../va416xx-hal" }
+panic-rtt-target = { version = "0.1.3" }
+rtt-target = { version = "0.5" }
+cortex-m = { version = "0.7", features = ["critical-section-single-core"]}
+embedded-hal = "1"
+embedded-hal-nb = "1"
+nb = "1"
+embedded-io = "0.6"
+panic-halt = "0.2"

examples/simple/examples/blinky-hal.rs

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+//! Simple blinky example using the HAL
+#![no_main]
+#![no_std]
+
+use cortex_m_rt::entry;
+use embedded_hal::digital::StatefulOutputPin;
+use panic_rtt_target as _;
+use rtt_target::{rprintln, rtt_init_print};
+use va416xx_hal::{gpio::PinsG, pac};
+
+#[entry]
+fn main() -> ! {
+    rtt_init_print!();
+    rprintln!("VA416xx HAL blinky example");
+
+    let mut dp = pac::Peripherals::take().unwrap();
+    let portg = PinsG::new(&mut dp.sysconfig, Some(dp.ioconfig), dp.portg);
+    let mut led = portg.pg5.into_readable_push_pull_output();
+    //let mut delay = CountDownTimer::new(&mut dp.SYSCONFIG, 50.mhz(), dp.TIM0);
+    loop {
+        cortex_m::asm::delay(2_000_000);
+        led.toggle().ok();
+    }
+}

examples/simple/examples/blinky-pac.rs

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+//! Simple blinky example
+#![no_main]
+#![no_std]
+
+use cortex_m_rt::entry;
+use panic_halt as _;
+use va416xx_hal::pac;
+
+// Mask for the LED
+const LED_PG5: u32 = 1 << 5;
+
+#[entry]
+fn main() -> ! {
+    let dp = pac::Peripherals::take().unwrap();
+    // Enable all peripheral clocks
+    dp.sysconfig
+        .peripheral_clk_enable()
+        .modify(|_, w| unsafe { w.bits(0xffffffff) });
+    dp.portg.dir().modify(|_, w| unsafe { w.bits(LED_PG5) });
+    dp.portg
+        .datamask()
+        .modify(|_, w| unsafe { w.bits(LED_PG5) });
+    for _ in 0..10 {
+        dp.portg.clrout().write(|w| unsafe { w.bits(LED_PG5) });
+        cortex_m::asm::delay(2_000_000);
+        dp.portg.setout().write(|w| unsafe { w.bits(LED_PG5) });
+        cortex_m::asm::delay(2_000_000);
+    }
+    loop {
+        dp.portg.togout().write(|w| unsafe { w.bits(LED_PG5) });
+        cortex_m::asm::delay(2_000_000);
+    }
+}

examples/simple/examples/rtt-log.rs

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+// Code to test RTT logger functionality.
+#![no_main]
+#![no_std]
+
+use cortex_m_rt::entry;
+use panic_rtt_target as _;
+use rtt_target::{rprintln, rtt_init_print};
+use va416xx_hal::pac;
+
+// Mask for the LED
+const LED_PG5: u32 = 1 << 5;
+
+#[entry]
+fn main() -> ! {
+    let dp = pac::Peripherals::take().unwrap();
+    // Enable all peripheral clocks
+    dp.sysconfig
+        .peripheral_clk_enable()
+        .modify(|_, w| unsafe { w.bits(0xffffffff) });
+    dp.portg.dir().modify(|_, w| unsafe { w.bits(LED_PG5) });
+    dp.portg
+        .datamask()
+        .modify(|_, w| unsafe { w.bits(LED_PG5) });
+
+    rtt_init_print!();
+    rprintln!("VA416xx RTT Demo");
+    let mut counter = 0;
+    loop {
+        rprintln!("{}: Hello, world!", counter);
+        // Still toggle LED. If there are issues with the RTT log, the LED
+        // blinking ensures that the application is actually running.
+        dp.portg.togout().write(|w| unsafe { w.bits(LED_PG5) });
+        counter += 1;
+        cortex_m::asm::delay(10_000_000);
+    }
+}

examples/simple/examples/uart.rs

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+// UART example application. Sends a test string over a UART and then enters
+// echo mode
+#![no_main]
+#![no_std]
+
+use cortex_m_rt::entry;
+use embedded_hal_nb::serial::Read;
+use embedded_io::Write;
+use panic_rtt_target as _;
+use rtt_target::{rprintln, rtt_init_print};
+use simple_examples::peb1;
+use va416xx_hal::clock::ClkgenExt;
+use va416xx_hal::time::Hertz;
+use va416xx_hal::{gpio::PinsG, pac, uart};
+
+#[entry]
+fn main() -> ! {
+    rtt_init_print!();
+    rprintln!("-- VA416xx UART example application--");
+
+    let mut dp = pac::Peripherals::take().unwrap();
+
+    // Use the external clock connected to XTAL_N.
+    let clocks = dp
+        .clkgen
+        .constrain()
+        .xtal_n_clk_with_src_freq(peb1::EXTCLK_FREQ)
+        .freeze(&mut dp.sysconfig)
+        .unwrap();
+
+    let gpiob = PinsG::new(&mut dp.sysconfig, Some(dp.ioconfig), dp.portg);
+    let tx = gpiob.pg0.into_funsel_1();
+    let rx = gpiob.pg1.into_funsel_1();
+
+    let uart0 = uart::Uart::uart0(
+        dp.uart0,
+        (tx, rx),
+        Hertz::from_raw(115200),
+        &mut dp.sysconfig,
+        &clocks,
+    );
+    let (mut tx, mut rx) = uart0.split();
+    writeln!(tx, "Hello World\n\r").unwrap();
+    loop {
+        // Echo what is received on the serial link.
+        match nb::block!(rx.read()) {
+            Ok(recvd) => {
+                if let Err(e) = embedded_hal_nb::serial::Write::write(&mut tx, recvd) {
+                    rprintln!("UART TX error: {:?}", e);
+                }
+            }
+            Err(e) => {
+                rprintln!("UART RX error {:?}", e);
+            }
+        }
+    }
+}

examples/simple/examples/wdt.rs

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+// Code to test the watchdog timer.
+#![no_main]
+#![no_std]
+
+use core::cell::Cell;
+use cortex_m::interrupt::Mutex;
+use cortex_m_rt::entry;
+use panic_rtt_target as _;
+use rtt_target::{rprintln, rtt_init_print};
+use simple_examples::peb1;
+use va416xx_hal::pac::{self, interrupt};
+use va416xx_hal::prelude::*;
+use va416xx_hal::wdt::WdtController;
+
+static WDT_INTRPT_COUNT: Mutex<Cell<u32>> = Mutex::new(Cell::new(0));
+
+#[derive(Debug, PartialEq, Eq)]
+#[allow(dead_code)]
+enum TestMode {
+    // Watchdog is fed by main loop, which runs with high period.
+    FedByMain,
+    // Watchdog is fed by watchdog IRQ.
+    FedByIrq,
+    AllowReset,
+}
+const TEST_MODE: TestMode = TestMode::FedByMain;
+const WDT_ROLLOVER_MS: u32 = 100;
+
+#[entry]
+fn main() -> ! {
+    rtt_init_print!();
+    rprintln!("-- VA416xx WDT example application--");
+    let cp = cortex_m::Peripherals::take().unwrap();
+    let mut dp = pac::Peripherals::take().unwrap();
+
+    // Use the external clock connected to XTAL_N.
+    let clocks = dp
+        .clkgen
+        .constrain()
+        .xtal_n_clk_with_src_freq(peb1::EXTCLK_FREQ)
+        .freeze(&mut dp.sysconfig)
+        .unwrap();
+    let mut delay_sysclk = cortex_m::delay::Delay::new(cp.SYST, clocks.apb0().raw());
+
+    let mut last_interrupt_counter = 0;
+    let mut wdt_ctrl =
+        WdtController::start(&mut dp.sysconfig, dp.watch_dog, &clocks, WDT_ROLLOVER_MS);
+    wdt_ctrl.enable_reset();
+    loop {
+        if TEST_MODE != TestMode::AllowReset {
+            wdt_ctrl.feed();
+        }
+        let interrupt_counter = cortex_m::interrupt::free(|cs| WDT_INTRPT_COUNT.borrow(cs).get());
+        if interrupt_counter > last_interrupt_counter {
+            rprintln!("interrupt counter has increased to {}", interrupt_counter);
+            last_interrupt_counter = interrupt_counter;
+        }
+        match TEST_MODE {
+            TestMode::FedByMain => delay_sysclk.delay_ms(WDT_ROLLOVER_MS / 5),
+            TestMode::FedByIrq => delay_sysclk.delay_ms(WDT_ROLLOVER_MS),
+            _ => (),
+        }
+    }
+}
+
+#[interrupt]
+#[allow(non_snake_case)]
+fn WATCHDOG() {
+    cortex_m::interrupt::free(|cs| {
+        WDT_INTRPT_COUNT
+            .borrow(cs)
+            .set(WDT_INTRPT_COUNT.borrow(cs).get() + 1);
+    });
+    let wdt = unsafe { pac::WatchDog::steal() };
+    // Clear interrupt.
+    if TEST_MODE != TestMode::AllowReset {
+        wdt.wdogintclr().write(|w| unsafe { w.bits(1) });
+    }
+}

examples/simple/src/lib.rs

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+#![no_std]
+
+pub mod peb1 {
+    use va416xx_hal::time::Hertz;
+
+    // The clock on the PEB1 board has a 20 MHz clock which is increased to 40 MHz with a configurable
+    // PLL by default.
+    pub const EXTCLK_FREQ: Hertz = Hertz::from_raw(40_000_000);
+    pub const XTAL_FREQ: Hertz = Hertz::from_raw(10_000_000);
+}

examples/simple/src/main.rs

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+//! Dummy app which does not do anything.
+#![no_main]
+#![no_std]
+
+use cortex_m_rt::entry;
+use panic_rtt_target as _;
+
+#[entry]
+fn main() -> ! {
+    loop {
+        cortex_m::asm::nop();
+    }
+}