UART, WDT and CLKGEN

va416xx/Cargo.toml

@@ -15,6 +15,7 @@ categories = ["embedded", "no-std", "hardware-support"]
 [dependencies]
 cortex-m = "0.7"
 vcell = "0.1.3"
+critical-section = { version = "1", optional = true }
 
 [dependencies.cortex-m-rt]
 optional = true
@@ -22,3 +23,7 @@ version = ">=0.6.15,<0.8"
 
 [features]
 rt = ["cortex-m-rt/device"]
+
+[package.metadata.docs.rs]
+all-features = true
+rustdoc-args = ["--cfg", "docs_rs", "--generate-link-to-definition"]

va416xx/README.md

@@ -1,5 +1,4 @@
 [![Crates.io](https://img.shields.io/crates/v/va416xx)](https://crates.io/crates/va416xx)
-[![build](https://github.com/us-irs/va416xx-rs/actions/workflows/ci.yml/badge.svg)](https://github.com/us-irs/va416xx-rs/actions/workflows/ci.yml)
 [![docs.rs](https://img.shields.io/docsrs/va416xx)](https://docs.rs/va416xx)
 
 # PAC for the Vorago VA416xx microcontroller family

va416xx/gen-helper.sh

@@ -29,7 +29,7 @@ then
 fi
 
 svdtools patch svd/va416xx-patch.yml
-${svd2rust_bin} -i svd/va416xx.svd.patched
+${svd2rust_bin} --reexport-interrupt -i svd/va416xx.svd.patched
 
 result=$?
 if [ $result -ne 0 ]; then

va416xx/src/lib.rs

@@ -3,10 +3,16 @@ svd2rust release can be generated by cloning the svd2rust [repository], checking
 #![allow(non_camel_case_types)]
 #![allow(non_snake_case)]
 #![no_std]
+// Manually inserted.
+#![cfg_attr(docs_rs, feature(doc_auto_cfg))]
 use core::marker::PhantomData;
 use core::ops::Deref;
 #[doc = r"Number available in the NVIC for configuring priority"]
 pub const NVIC_PRIO_BITS: u8 = 4;
+#[cfg(feature = "rt")]
+pub use self::Interrupt as interrupt;
+#[cfg(feature = "rt")]
+pub use cortex_m_rt::interrupt;
 #[allow(unused_imports)]
 use generic::*;
 #[doc = r"Common register and bit access and modify traits"]

va416xx/src/porta.rs

@@ -1,4 +1,4 @@
-// Manually inserted.
+// Added manually.
 #![allow(clippy::identity_op)]
 
 #[repr(C)]