HAL update + CHANGELOG

examples/embassy/src/bin/uart-echo-with-irq.rs

@@ -32,7 +32,8 @@ use va416xx_hal::{
     uart,
 };
 
-pub type SharedUart = Mutex<CriticalSectionRawMutex, RefCell<Option<uart::RxWithIrq<pac::Uart0>>>>;
+pub type SharedUart =
+    Mutex<CriticalSectionRawMutex, RefCell<Option<uart::RxWithInterrupt<pac::Uart0>>>>;
 static RX: SharedUart = Mutex::new(RefCell::new(None));
 
 const BAUDRATE: u32 = 115200;

flashloader/src/main.rs

@@ -127,7 +127,7 @@ mod app {
 
     #[local]
     struct Local {
-        uart_rx: uart::RxWithIrq<pac::Uart0>,
+        uart_rx: uart::RxWithInterrupt<pac::Uart0>,
         uart_tx: uart::Tx<pac::Uart0>,
         rx_context: IrqContextTimeoutOrMaxSize,
         rom_spi: Option<pac::Spi3>,

va416xx-hal/CHANGELOG.md

@@ -8,6 +8,33 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 
 # [unreleased]
 
+# [v0.4.0] 2025-02-14
+
+## Changed
+
+- GPIO API: Interrupt, pulse and filter and `set_datamask` and `clear_datamask` APIs are now
+  methods which mutable modify the pin instead of consuming and returning it.
+- Simplified PWM module implementation.
+- All error types now implement `core::error::Error` by using the `thiserror::Error` derive.
+- `InvalidPinTypeError` now wraps the pin mode.
+- I2C `TimingCfg` constructor now returns explicit error instead of generic Error.
+  Removed the timing configuration error type from the generic I2C error enumeration.
+- `PinsA` and `PinsB` constructor do not expect an optional `pac::Ioconfig` argument anymore.
+- `IrqCfg` renamed to `InterruptConfig`, kept alias for old name.
+- All library provided interrupt handlers now start with common prefix `on_interrupt_*`
+- `RxWithIrq` renamed to `RxWithInterrupt`
+- `Rx::into_rx_with_irq` does not expect any arguments any more.
+- `filter_type` renamed to `configure_filter_type`.
+- `level_irq` renamed to `configure_level_interrupt`.
+- `edge_irq` renamed to `configure_edge_interrupt`.
+- UART interrupt management is now handled by the main constructor instead of later stages to
+  statically ensure one interrupt vector for the UART peripheral. `Uart::new` expects an
+  optional `InterruptConfig` argument.
+- `enable_interrupt` and `disable_interrupt` renamed to `enable_nvic_interrupt` and
+  `disable_nvic_interrupt` to distinguish them from peripheral interrupts more clearly.
+- `port_mux` renamed to `port_function_select`
+- Renamed `IrqUartErrors` to `UartErrors`.
+
 # [v0.3.0] 2024-30-09
 
 ## Changed

va416xx-hal/src/uart.rs

@@ -785,8 +785,8 @@ impl<Uart: Instance> Rx<Uart> {
         self.0.data().read().bits()
     }
 
-    pub fn into_rx_with_irq(self) -> RxWithIrq<Uart> {
+    pub fn into_rx_with_irq(self) -> RxWithInterrupt<Uart> {
-        RxWithIrq(self)
+        RxWithInterrupt(self)
     }
 
     pub fn release(self) -> Uart {
@@ -967,9 +967,9 @@ impl<Uart: Instance> embedded_io::Write for Tx<Uart> {
 ///     then call the [Self::irq_handler_max_size_or_timeout_based] in the interrupt service
 ///     routine. You have to call [Self::read_fixed_len_or_timeout_based_using_irq] in the ISR to
 ///     start reading the next packet.
-pub struct RxWithIrq<Uart>(Rx<Uart>);
+pub struct RxWithInterrupt<Uart>(Rx<Uart>);
 
-impl<Uart: Instance> RxWithIrq<Uart> {
+impl<Uart: Instance> RxWithInterrupt<Uart> {
     /// This function should be called once at initialization time if the regular
     /// [Self::irq_handler] is used to read the UART receiver to enable and start the receiver.
     pub fn start(&mut self) {