diff --git a/bootloader/Cargo.toml b/bootloader/Cargo.toml
index 692eaa2..018e85e 100644
--- a/bootloader/Cargo.toml
+++ b/bootloader/Cargo.toml
@@ -11,9 +11,11 @@ panic-rtt-target = { version = "0.1.3" }
 panic-halt = { version = "0.2" }
 rtt-target = { version = "0.5" }
 crc = "3"
+static_assertions = "1"
 
 [dependencies.va416xx-hal]
 path = "../va416xx-hal"
+features = ["va41630"]
 
 [features]
 default = []
diff --git a/bootloader/README.md b/bootloader/README.md
index 387675a..da85dc9 100644
--- a/bootloader/README.md
+++ b/bootloader/README.md
@@ -12,11 +12,11 @@ The bootloader uses the following memory map:
 | 0x0 | Bootloader start | code up to 0x3FFC bytes |
 | 0x3FFC | Bootloader CRC | word |
 | 0x4000 | App image A start | code up to 0x1DFFC (~120K) bytes |
-| 0x21FFC | App image A CRC check length | word |
-| 0x21FFE | App image A CRC check value | word |
+| 0x21FF8 | App image A CRC check length | word |
+| 0x21FFC | App image A CRC check value | word |
 | 0x22000 | App image B start | code up to 0x1DFFC (~120K) bytes |
-| 0x3FFFC | App image B CRC check length | word |
-| 0x3FFFE | App image B CRC check value | word |
+| 0x3FFF8 | App image B CRC check length | word |
+| 0x3FFFC | App image B CRC check value | word |
 | 0x40000 | End of NVM | end  |
 
 ## Additional Information
diff --git a/bootloader/src/main.rs b/bootloader/src/main.rs
index af0ba40..1997222 100644
--- a/bootloader/src/main.rs
+++ b/bootloader/src/main.rs
@@ -39,20 +39,27 @@ const RTT_PRINTOUT: bool = true;
 
 // Important bootloader addresses and offsets, vector table information.
 
+const NVM_SIZE: u32 = 0x40000;
+
 const BOOTLOADER_START_ADDR: u32 = 0x0;
+const BOOTLOADER_CRC_ADDR: u32 = BOOTLOADER_END_ADDR - 4;
 const BOOTLOADER_END_ADDR: u32 = 0x4000;
-const BOOTLOADER_CRC_ADDR: u32 = 0x3FFC;
-const APP_A_START_ADDR: u32 = 0x4000;
-pub const APP_A_END_ADDR: u32 = 0x22000;
+
+const APP_A_START_ADDR: u32 = BOOTLOADER_END_ADDR; // 0x4000
 // The actual size of the image which is relevant for CRC calculation.
-const APP_A_SIZE_ADDR: u32 = 0x21FF8;
-const APP_A_CRC_ADDR: u32 = 0x21FFC;
-const APP_B_START_ADDR: u32 = 0x22000;
-pub const APP_B_END_ADDR: u32 = 0x40000;
+const APP_A_SIZE_ADDR: u32 = APP_B_END_ADDR - 8; // 0x21FF8
+const APP_A_CRC_ADDR: u32 = APP_B_END_ADDR - 4; // 0x21FFC
+pub const APP_A_END_ADDR: u32 = APP_B_END_ADDR - BOOTLOADER_END_ADDR / 2;
+
+const APP_B_START_ADDR: u32 = APP_A_END_ADDR; //  0x22000
 // The actual size of the image which is relevant for CRC calculation.
-const APP_B_SIZE_ADDR: u32 = 0x3FFF8;
-const APP_B_CRC_ADDR: u32 = 0x3FFFC;
-pub const APP_IMG_SZ: u32 = 0x1E000;
+const APP_B_SIZE_ADDR: u32 = APP_B_END_ADDR - 8; // 0x3FFF8
+const APP_B_CRC_ADDR: u32 = APP_B_END_ADDR - 4; // 0x3FFFC
+pub const APP_B_END_ADDR: u32 = NVM_SIZE; // 0x40000
+
+pub const APP_IMG_SZ: u32 = APP_B_END_ADDR - APP_A_END_ADDR / 2;
+
+static_assertions::const_assert!((APP_B_END_ADDR - BOOTLOADER_END_ADDR) % 2 == 0);
 
 pub const VECTOR_TABLE_OFFSET: u32 = 0x0;
 pub const VECTOR_TABLE_LEN: u32 = 0x350;
diff --git a/flashloader/slot-a-blinky/Cargo.toml b/flashloader/slot-a-blinky/Cargo.toml
index 89ea213..5e7e23e 100644
--- a/flashloader/slot-a-blinky/Cargo.toml
+++ b/flashloader/slot-a-blinky/Cargo.toml
@@ -7,11 +7,11 @@ edition = "2021"
 
 [dependencies]
 cortex-m-rt = "0.7"
-va416xx-hal = { path = "../../va416xx-hal" }
 panic-rtt-target = { version = "0.1.3" }
 rtt-target = { version = "0.5" }
 cortex-m = { version = "0.7", features = ["critical-section-single-core"] }
 embedded-hal = "1"
+va416xx-hal = { path = "../../va416xx-hal", features = ["va41630"] }
 
 [profile.dev]
 codegen-units = 1
diff --git a/flashloader/slot-b-blinky/Cargo.toml b/flashloader/slot-b-blinky/Cargo.toml
index c60bdb4..1b5c3d0 100644
--- a/flashloader/slot-b-blinky/Cargo.toml
+++ b/flashloader/slot-b-blinky/Cargo.toml
@@ -7,11 +7,11 @@ edition = "2021"
 
 [dependencies]
 cortex-m-rt = "0.7"
-va416xx-hal = { path = "../../va416xx-hal" }
 panic-rtt-target = { version = "0.1.3" }
 rtt-target = { version = "0.5" }
 cortex-m = { version = "0.7", features = ["critical-section-single-core"] }
 embedded-hal = "1"
+va416xx-hal = { path = "../../va416xx-hal", features = ["va41630"] }
 
 [profile.dev]
 codegen-units = 1