diff --git a/bootloader/Cargo.toml b/bootloader/Cargo.toml index 05dd18b..f3b5bdf 100644 --- a/bootloader/Cargo.toml +++ b/bootloader/Cargo.toml @@ -13,6 +13,6 @@ crc = "3" static_assertions = "1" [dependencies.va416xx-hal] -version = "0.5" +version = "0.6" features = ["va41630", "defmt"] path = "../va416xx-hal" diff --git a/examples/embassy/Cargo.toml b/examples/embassy/Cargo.toml index bc77fa6..5bc67d69 100644 --- a/examples/embassy/Cargo.toml +++ b/examples/embassy/Cargo.toml @@ -11,7 +11,7 @@ embedded-io = "0.6" embedded-hal-async = "1" embedded-io-async = "0.6" -heapless = "0.8" +heapless = "0.9" defmt-rtt = "1" defmt = "1" panic-probe = { version = "1", features = ["print-defmt"] } @@ -21,14 +21,14 @@ ringbuf = { version = "0.4", default-features = false } nb = "1" embassy-sync = "0.7" -embassy-time = "0.4" -embassy-executor = { version = "0.7", features = [ +embassy-time = "0.5" +embassy-executor = { version = "0.9", features = [ "arch-cortex-m", "executor-thread", "executor-interrupt" ]} -va416xx-hal = { version = "0.5", path = "../../va416xx-hal", features = ["defmt"] } +va416xx-hal = { version = "0.6", path = "../../va416xx-hal", features = ["defmt"] } va416xx-embassy = { version = "0.1", path = "../../va416xx-embassy", default-features = false } [features] diff --git a/examples/embassy/src/bin/async-uart-rx.rs b/examples/embassy/src/bin/async-uart-rx.rs index 53b6fc4..3ec3449 100644 --- a/examples/embassy/src/bin/async-uart-rx.rs +++ b/examples/embassy/src/bin/async-uart-rx.rs @@ -42,7 +42,7 @@ use va416xx_hal::{ static QUEUE_UART_A: static_cell::ConstStaticCell> = static_cell::ConstStaticCell::new(Queue::new()); -static PRODUCER_UART_A: Mutex>>> = Mutex::new(RefCell::new(None)); +static PRODUCER_UART_A: Mutex>>> = Mutex::new(RefCell::new(None)); #[embassy_executor::main] async fn main(_spawner: Spawner) { diff --git a/examples/rtic/Cargo.toml b/examples/rtic/Cargo.toml index 8b0c5da..6d65e71 100644 --- a/examples/rtic/Cargo.toml +++ b/examples/rtic/Cargo.toml @@ -9,7 +9,7 @@ defmt-rtt = "1" defmt = "1" panic-probe = { version = "1", features = ["defmt"] } -va416xx-hal = { version = "0.5", path = "../../va416xx-hal", features = ["va41630"] } +va416xx-hal = { version = "0.6", path = "../../va416xx-hal", features = ["va41630"] } [dependencies.rtic] version = "2" diff --git a/examples/simple/Cargo.toml b/examples/simple/Cargo.toml index f8b5ab3..9b6053b 100644 --- a/examples/simple/Cargo.toml +++ b/examples/simple/Cargo.toml @@ -17,7 +17,7 @@ embedded-io = "0.6" panic-halt = "1" accelerometer = "0.12" -va416xx-hal = { version = "0.5", path = "../../va416xx-hal", features = ["va41630", "defmt"] } +va416xx-hal = { version = "0.6", path = "../../va416xx-hal", features = ["va41630", "defmt"] } [dependencies.vorago-peb1] path = "../../vorago-peb1" diff --git a/examples/simple/examples/spi.rs b/examples/simple/examples/spi.rs index 7196999..092f6b3 100644 --- a/examples/simple/examples/spi.rs +++ b/examples/simple/examples/spi.rs @@ -13,7 +13,7 @@ use cortex_m_rt::entry; use embedded_hal::spi::{Mode, SpiBus, MODE_0}; use simple_examples::peb1; use va416xx_hal::clock::ClockConfigurator; -use va416xx_hal::spi::{Spi, SpiClkConfig}; +use va416xx_hal::spi::{Spi, SpiClockConfig}; use va416xx_hal::timer::CountdownTimer; use va416xx_hal::{ pac, @@ -52,7 +52,7 @@ fn main() -> ! { let mut spi_cfg = SpiConfig::default() .clk_cfg( - SpiClkConfig::from_clks(&clocks, Hertz::from_raw(SPI_SPEED_KHZ)) + SpiClockConfig::from_clks(&clocks, Hertz::from_raw(SPI_SPEED_KHZ)) .expect("invalid target clock"), ) .mode(SPI_MODE) diff --git a/flashloader/Cargo.toml b/flashloader/Cargo.toml index ca9fda8..f9f86ee 100644 --- a/flashloader/Cargo.toml +++ b/flashloader/Cargo.toml @@ -16,7 +16,7 @@ once_cell = { version = "1", default-features = false, features = ["critical-sec spacepackets = { version = "0.15", default-features = false, features = ["defmt"] } cobs = { version = "0.4", default-features = false } -va416xx-hal = { version = "0.5", features = ["va41630", "defmt"], path = "../va416xx-hal" } +va416xx-hal = { version = "0.6", features = ["va41630", "defmt"], path = "../va416xx-hal" } rtic = { version = "2", features = ["thumbv7-backend"] } rtic-monotonics = { version = "2", features = ["cortex-m-systick"] } diff --git a/flashloader/slot-a-blinky/Cargo.toml b/flashloader/slot-a-blinky/Cargo.toml index 9fc40f0..d78fb23 100644 --- a/flashloader/slot-a-blinky/Cargo.toml +++ b/flashloader/slot-a-blinky/Cargo.toml @@ -7,8 +7,8 @@ edition = "2021" [dependencies] cortex-m-rt = "0.7" -panic-rtt-target = { version = "0.1.3" } -rtt-target = { version = "0.5" } +panic-rtt-target = { version = "0.2" } +rtt-target = { version = "0.6" } cortex-m = { version = "0.7", features = ["critical-section-single-core"] } embedded-hal = "1" va416xx-hal = { path = "0.4", features = ["va41630"] } diff --git a/flashloader/slot-b-blinky/Cargo.toml b/flashloader/slot-b-blinky/Cargo.toml index a9cdc70..2240360 100644 --- a/flashloader/slot-b-blinky/Cargo.toml +++ b/flashloader/slot-b-blinky/Cargo.toml @@ -7,8 +7,8 @@ edition = "2021" [dependencies] cortex-m-rt = "0.7" -panic-rtt-target = { version = "0.1.3" } -rtt-target = { version = "0.5" } +panic-rtt-target = { version = "0.2" } +rtt-target = { version = "0.6" } cortex-m = { version = "0.7", features = ["critical-section-single-core"] } embedded-hal = "1" va416xx-hal = { path = "0.4", features = ["va41630"] } diff --git a/flashloader/src/main.rs b/flashloader/src/main.rs index fb74eb7..7a2a91c 100644 --- a/flashloader/src/main.rs +++ b/flashloader/src/main.rs @@ -108,7 +108,7 @@ mod app { }; use va416xx_hal::clock::ClockConfigurator; use va416xx_hal::irq_router::enable_and_init_irq_router; - use va416xx_hal::uart::IrqContextTimeoutOrMaxSize; + use va416xx_hal::uart::InterruptContextTimeoutOrMaxSize; use va416xx_hal::{ edac, nvm::Nvm, @@ -131,7 +131,7 @@ mod app { struct Local { uart_rx: uart::RxWithInterrupt, uart_tx: uart::Tx, - rx_context: IrqContextTimeoutOrMaxSize, + rx_context: InterruptContextTimeoutOrMaxSize, rom_spi: Option, // We handle all TM in one task. tm_cons: DataConsumer, @@ -195,7 +195,7 @@ mod app { CLOCKS.set(clocks).unwrap(); let mut rx = rx.into_rx_with_irq(); - let mut rx_context = IrqContextTimeoutOrMaxSize::new(MAX_TC_FRAME_SIZE); + let mut rx_context = InterruptContextTimeoutOrMaxSize::new(MAX_TC_FRAME_SIZE); rx.read_fixed_len_or_timeout_based_using_irq(&mut rx_context) .expect("initiating UART RX failed"); pus_tc_handler::spawn().unwrap(); diff --git a/va416xx-embassy/Cargo.toml b/va416xx-embassy/Cargo.toml index 0ca2dda..dbb9682 100644 --- a/va416xx-embassy/Cargo.toml +++ b/va416xx-embassy/Cargo.toml @@ -11,7 +11,7 @@ keywords = ["no-std", "hal", "cortex-m", "vorago", "va416xx"] categories = ["aerospace", "embedded", "no-std", "hardware-support"] [dependencies] -vorago-shared-periphs = { git = "https://egit.irs.uni-stuttgart.de/rust/vorago-shared-periphs.git", rev = "c8e475cbba820a4b235b46f3d284e23d72396855", features = ["vor4x"] } +vorago-shared-hal = { git = "https://egit.irs.uni-stuttgart.de/rust/vorago-shared-hal.git", features = ["vor4x"] } va416xx-hal = { path = "../va416xx-hal" } [features] diff --git a/va416xx-embassy/src/lib.rs b/va416xx-embassy/src/lib.rs index 5f350f5..a6865c7 100644 --- a/va416xx-embassy/src/lib.rs +++ b/va416xx-embassy/src/lib.rs @@ -42,9 +42,9 @@ use va416xx_hal::{ clock::Clocks, irq_router::enable_and_init_irq_router, pac::{self, interrupt}, - timer::{TimMarker, TIM_IRQ_OFFSET}, + timer::{TimInstance, TIM_IRQ_OFFSET}, }; -use vorago_shared_periphs::embassy::time_driver; +use vorago_shared_hal::embassy::time_driver; /// Macro to define the IRQ handlers for the time driver. /// @@ -95,7 +95,7 @@ embassy_time_driver_irqs!(timekeeper_irq = TIM23, alarm_irq = TIM22); /// used TIM peripherals has to match the ID of the passed timer peripherals. Currently, this /// can only be checked at run-time, and a run-time assertion will panic on the embassy /// initialization in case of a missmatch. -pub fn init( +pub fn init( timekeeper: TimekeeperTim, alarm: AlarmTim, clocks: &Clocks, diff --git a/va416xx-hal/Cargo.toml b/va416xx-hal/Cargo.toml index eae2a32..64206d5 100644 --- a/va416xx-hal/Cargo.toml +++ b/va416xx-hal/Cargo.toml @@ -1,6 +1,6 @@ [package] name = "va416xx-hal" -version = "0.5.1" +version = "0.6.0" authors = ["Robin Mueller "] edition = "2021" description = "HAL for the Vorago VA416xx family of MCUs" @@ -12,10 +12,10 @@ categories = ["embedded", "no-std", "hardware-support"] [dependencies] cortex-m = { version = "0.7", features = ["critical-section-single-core"] } -va416xx = { version = "0.4", features = ["critical-section"], default-features = false } -derive-mmio = { git = "https://github.com/knurling-rs/derive-mmio.git", version = "0.6" } +va416xx = { version = "0.5", features = ["critical-section"], default-features = false } +derive-mmio = { git = "https://github.com/knurling-rs/derive-mmio.git", version = "0.6"} static_assertions = "1.1" -vorago-shared-periphs = { git = "https://egit.irs.uni-stuttgart.de/rust/vorago-shared-periphs.git", rev = "c8e475cbba820a4b235b46f3d284e23d72396855", features = ["vor4x"] } +vorago-shared-hal = { git = "https://egit.irs.uni-stuttgart.de/rust/vorago-shared-hal.git", features = ["vor4x"] } libm = "0.2" nb = "1" @@ -23,7 +23,7 @@ embedded-hal = "1" num_enum = { version = "0.7", default-features = false } bitflags = "2" bitbybit = "1.3" -arbitrary-int = "1.3" +arbitrary-int = "2" fugit = "0.3" embedded-can = "0.4" embassy-sync = "0.7" @@ -35,13 +35,13 @@ defmt = { version = "1", optional = true } default = ["rt", "revb"] rt = ["va416xx/rt"] alloc = [] -defmt = ["dep:defmt", "fugit/defmt", "vorago-shared-periphs/defmt"] +defmt = ["dep:defmt", "fugit/defmt", "vorago-shared-hal/defmt"] va41630 = ["device-selected"] va41620 = ["device-selected"] va41629 = ["device-selected"] -va41628 = ["device-selected", "vorago-shared-periphs/va41628"] +va41628 = ["device-selected", "vorago-shared-hal/va41628"] device-selected = [] revb = [] diff --git a/va416xx-hal/src/adc.rs b/va416xx-hal/src/adc.rs index 7d80a29..7c5be59 100644 --- a/va416xx-hal/src/adc.rs +++ b/va416xx-hal/src/adc.rs @@ -10,7 +10,7 @@ use crate::clock::Clocks; use crate::pac; use crate::time::Hertz; use num_enum::{IntoPrimitive, TryFromPrimitive}; -use vorago_shared_periphs::{enable_peripheral_clock, PeripheralSelect}; +use vorago_shared_hal::{enable_peripheral_clock, PeripheralSelect}; pub const ADC_MIN_CLK: Hertz = Hertz::from_raw(2_000_000); pub const ADC_MAX_CLK: Hertz = Hertz::from_raw(12_500_000); diff --git a/va416xx-hal/src/can/ll.rs b/va416xx-hal/src/can/ll.rs index 622e66b..a6ebd68 100644 --- a/va416xx-hal/src/can/ll.rs +++ b/va416xx-hal/src/can/ll.rs @@ -1,4 +1,4 @@ -use arbitrary_int::{u11, u15, u3, u4, Number}; +use arbitrary_int::{prelude::*, u11, u15, u3, u4}; use embedded_can::Frame; use super::{ diff --git a/va416xx-hal/src/can/mod.rs b/va416xx-hal/src/can/mod.rs index b52faaa..3f4ae6d 100644 --- a/va416xx-hal/src/can/mod.rs +++ b/va416xx-hal/src/can/mod.rs @@ -19,11 +19,11 @@ //! - [CAN example](https://egit.irs.uni-stuttgart.de/rust/va416xx-rs/src/branch/main/examples/embassy/src/bin/can.rs) use core::sync::atomic::AtomicBool; -use arbitrary_int::{u11, u15, u2, u3, u4, u7, Number}; +use arbitrary_int::{prelude::*, u11, u15, u2, u3, u4, u7}; use embedded_can::Frame; use ll::CanChannelLowLevel; use regs::{BaseId, BufferState, Control, MmioCan, TimingConfig}; -use vorago_shared_periphs::enable_nvic_interrupt; +use vorago_shared_hal::enable_nvic_interrupt; use crate::{clock::Clocks, enable_peripheral_clock, time::Hertz, PeripheralSelect}; use libm::roundf; diff --git a/va416xx-hal/src/can/regs.rs b/va416xx-hal/src/can/regs.rs index f589a44..8919fa5 100644 --- a/va416xx-hal/src/can/regs.rs +++ b/va416xx-hal/src/can/regs.rs @@ -1,7 +1,7 @@ //! Custom register definitions for the CAN register block to circumvent PAC API / SVD //! shortcomings. -use arbitrary_int::{u11, u15, u2, u3, u4, u6, u7, Number}; +use arbitrary_int::{prelude::*, u11, u15, u2, u3, u4, u6, u7}; pub const CAN_0_BASE: usize = 0x4001_4000; pub const CAN_1_BASE: usize = 0x4001_4400; diff --git a/va416xx-hal/src/clock.rs b/va416xx-hal/src/clock.rs index a5c9b43..16f7c30 100644 --- a/va416xx-hal/src/clock.rs +++ b/va416xx-hal/src/clock.rs @@ -15,8 +15,8 @@ use crate::adc::ADC_MAX_CLK; use crate::pac; use crate::time::Hertz; -pub use vorago_shared_periphs::clock::{Clocks, HBO_FREQ}; -use vorago_shared_periphs::{enable_peripheral_clock, PeripheralSelect}; +pub use vorago_shared_hal::clock::{Clocks, HBO_FREQ}; +use vorago_shared_hal::{enable_peripheral_clock, PeripheralSelect}; pub const XTAL_OSC_TSTART_MS: u32 = 15; diff --git a/va416xx-hal/src/dac.rs b/va416xx-hal/src/dac.rs index 1d77c59..f6bcc6d 100644 --- a/va416xx-hal/src/dac.rs +++ b/va416xx-hal/src/dac.rs @@ -5,7 +5,7 @@ //! - [ADC and DAC example](https://github.com/us-irs/va416xx-rs/blob/main/examples/simple/examples/dac-adc.rs) use core::ops::Deref; -use vorago_shared_periphs::{ +use vorago_shared_hal::{ disable_peripheral_clock, enable_peripheral_clock, reset_peripheral_for_cycles, PeripheralSelect, }; diff --git a/va416xx-hal/src/dma.rs b/va416xx-hal/src/dma.rs index ef1c1fa..5849ba9 100644 --- a/va416xx-hal/src/dma.rs +++ b/va416xx-hal/src/dma.rs @@ -4,9 +4,7 @@ //! //! - [Simple DMA example](https://egit.irs.uni-stuttgart.de/rust/va416xx-rs/src/branch/main/examples/simple/examples/dma.rs) use arbitrary_int::{u10, u3}; -use vorago_shared_periphs::{ - enable_peripheral_clock, reset_peripheral_for_cycles, PeripheralSelect, -}; +use vorago_shared_hal::{enable_peripheral_clock, reset_peripheral_for_cycles, PeripheralSelect}; use crate::{enable_nvic_interrupt, pac}; diff --git a/va416xx-hal/src/gpio/mod.rs b/va416xx-hal/src/gpio/mod.rs index a36c741..c20e4f8 100644 --- a/va416xx-hal/src/gpio/mod.rs +++ b/va416xx-hal/src/gpio/mod.rs @@ -17,4 +17,4 @@ //! //! - [Blinky example](https://egit.irs.uni-stuttgart.de/rust/va416xx-rs/src/branch/main/examples/simple/examples/blinky.rs) //! - [Async GPIO example](https://egit.irs.uni-stuttgart.de/rust/va416xx-rs/src/branch/main/examples/embassy/src/bin/async-gpio.rs) -pub use vorago_shared_periphs::gpio::*; +pub use vorago_shared_hal::gpio::*; diff --git a/va416xx-hal/src/i2c.rs b/va416xx-hal/src/i2c.rs index 0dafeaa..49f2417 100644 --- a/va416xx-hal/src/i2c.rs +++ b/va416xx-hal/src/i2c.rs @@ -3,4 +3,4 @@ //! ## Examples //! //! - [PEB1 accelerometer example](https://egit.irs.uni-stuttgart.de/rust/va416xx-rs/src/branch/main/examples/simple/examples/peb1-accelerometer.rs) -pub use vorago_shared_periphs::i2c::*; +pub use vorago_shared_hal::i2c::*; diff --git a/va416xx-hal/src/irq_router.rs b/va416xx-hal/src/irq_router.rs index 93d6f5e..97781e0 100644 --- a/va416xx-hal/src/irq_router.rs +++ b/va416xx-hal/src/irq_router.rs @@ -1,7 +1,5 @@ //! IRQ Router peripheral support. -use vorago_shared_periphs::{ - enable_peripheral_clock, reset_peripheral_for_cycles, PeripheralSelect, -}; +use vorago_shared_hal::{enable_peripheral_clock, reset_peripheral_for_cycles, PeripheralSelect}; use crate::pac; diff --git a/va416xx-hal/src/lib.rs b/va416xx-hal/src/lib.rs index e4c9861..c7132e9 100644 --- a/va416xx-hal/src/lib.rs +++ b/va416xx-hal/src/lib.rs @@ -59,10 +59,10 @@ pub mod adc; #[cfg(not(feature = "va41628"))] pub mod dac; -pub use vorago_shared_periphs::{ +pub use vorago_shared_hal::{ assert_peripheral_reset, deassert_peripheral_reset, disable_nvic_interrupt, disable_peripheral_clock, enable_nvic_interrupt, enable_peripheral_clock, - reset_peripheral_for_cycles, FunSel, PeripheralSelect, + reset_peripheral_for_cycles, FunctionSelect, PeripheralSelect, }; #[derive(Debug, PartialEq, Eq, thiserror::Error)] @@ -80,19 +80,19 @@ pub fn port_function_select( ioconfig: &mut pac::Ioconfig, port: Port, pin: u8, - funsel: FunSel, + funsel: FunctionSelect, ) -> Result<(), InvalidPinError> { if (port == Port::G && pin >= 8) || pin >= 16 { return Err(InvalidPinError(pin)); } let reg_block = match port { Port::A => ioconfig.porta(pin as usize), - Port::B => ioconfig.portb0(pin as usize), - Port::C => ioconfig.portc0(pin as usize), - Port::D => ioconfig.portd0(pin as usize), - Port::E => ioconfig.porte0(pin as usize), - Port::F => ioconfig.portf0(pin as usize), - Port::G => ioconfig.portg0(pin as usize), + Port::B => ioconfig.portb(pin as usize), + Port::C => ioconfig.portc(pin as usize), + Port::D => ioconfig.portd(pin as usize), + Port::E => ioconfig.porte(pin as usize), + Port::F => ioconfig.portf(pin as usize), + Port::G => ioconfig.portg(pin as usize), }; reg_block.modify(|_, w| unsafe { w.funsel().bits(funsel as u8) }); diff --git a/va416xx-hal/src/nvm.rs b/va416xx-hal/src/nvm.rs index 2c72db9..aefc747 100644 --- a/va416xx-hal/src/nvm.rs +++ b/va416xx-hal/src/nvm.rs @@ -6,14 +6,14 @@ //! //! - [Flashloader application](https://egit.irs.uni-stuttgart.de/rust/va416xx-rs/src/branch/main/flashloader) use embedded_hal::spi::MODE_0; -use vorago_shared_periphs::{ +use vorago_shared_hal::{ disable_peripheral_clock, enable_peripheral_clock, reset_peripheral_for_cycles, }; use crate::clock::Clocks; use crate::pac; use crate::spi::{ - mode_to_cpo_cph_bit, spi_clk_config_from_div, SpiMarker, WordProvider, BMSTART_BMSTOP_MASK, + mode_to_cpo_cph_bit, spi_clk_config_from_div, SpiInstance, SpiWord, BMSTART_BMSTOP_MASK, }; const NVM_CLOCK_DIV: u16 = 2; diff --git a/va416xx-hal/src/pins.rs b/va416xx-hal/src/pins.rs index 8500714..1c46616 100644 --- a/va416xx-hal/src/pins.rs +++ b/va416xx-hal/src/pins.rs @@ -3,4 +3,4 @@ //! This module contains the pin singletons. It allows creating those singletons //! to access the [Pin] structures of individual ports in a safe way with checked ownership //! rules. -pub use vorago_shared_periphs::pins::*; +pub use vorago_shared_hal::pins::*; diff --git a/va416xx-hal/src/pwm.rs b/va416xx-hal/src/pwm.rs index decede2..fb0d911 100644 --- a/va416xx-hal/src/pwm.rs +++ b/va416xx-hal/src/pwm.rs @@ -5,4 +5,4 @@ //! ## Examples //! //! - [PWM example](https://egit.irs.uni-stuttgart.de/rust/va416xx-rs/src/branch/main/examples/simple/examples/pwm.rs) -pub use vorago_shared_periphs::pwm::*; +pub use vorago_shared_hal::pwm::*; diff --git a/va416xx-hal/src/spi.rs b/va416xx-hal/src/spi.rs index 09c5580..54ed7d4 100644 --- a/va416xx-hal/src/spi.rs +++ b/va416xx-hal/src/spi.rs @@ -8,4 +8,4 @@ //! //! - [Blocking SPI example](https://egit.irs.uni-stuttgart.de/rust/va416xx-rs/src/branch/main/examples/simple/examples/spi.rs) //! - [NVM library][crate::nvm] -pub use vorago_shared_periphs::spi::*; +pub use vorago_shared_hal::spi::*; diff --git a/va416xx-hal/src/timer.rs b/va416xx-hal/src/timer.rs index 6e2b083..563a196 100644 --- a/va416xx-hal/src/timer.rs +++ b/va416xx-hal/src/timer.rs @@ -4,6 +4,6 @@ //! //! - [MS and second tick implementation](https://egit.irs.uni-stuttgart.de/rust/va416xx-rs/src/branch/main/examples/simple/examples/timer-ticks.rs) //! - [Cascade feature example](https://egit.irs.uni-stuttgart.de/rust/va416xx-rs/src/branch/main/examples/simple/examples/cascade.rs) -pub use vorago_shared_periphs::timer::*; +pub use vorago_shared_hal::timer::*; pub const TIM_IRQ_OFFSET: usize = 48; diff --git a/va416xx-hal/src/uart/mod.rs b/va416xx-hal/src/uart/mod.rs index e460508..bb7db58 100644 --- a/va416xx-hal/src/uart/mod.rs +++ b/va416xx-hal/src/uart/mod.rs @@ -14,4 +14,4 @@ //! - [Flashloader exposing a CCSDS interface via UART](https://egit.irs.uni-stuttgart.de/rust/va416xx-rs/src/branch/main/flashloader) //! - [Async UART RX example](https://egit.irs.uni-stuttgart.de/rust/va416xx-rs/src/branch/main/examples/embassy/src/bin/async-uart-rx.rs) //! - [Async UART TX example](https://egit.irs.uni-stuttgart.de/rust/va416xx-rs/src/branch/main/examples/embassy/src/bin/async-uart-tx.rs) -pub use vorago_shared_periphs::uart::*; +pub use vorago_shared_hal::uart::*; diff --git a/va416xx-hal/src/wdt.rs b/va416xx-hal/src/wdt.rs index ec7f6da..37d1b28 100644 --- a/va416xx-hal/src/wdt.rs +++ b/va416xx-hal/src/wdt.rs @@ -3,9 +3,7 @@ //! ## Examples //! //! - [Watchdog simple example](https://egit.irs.uni-stuttgart.de/rust/va416xx-rs/src/branch/main/examples/simple/examples/wdt.rs) -use vorago_shared_periphs::{ - enable_peripheral_clock, reset_peripheral_for_cycles, PeripheralSelect, -}; +use vorago_shared_hal::{enable_peripheral_clock, reset_peripheral_for_cycles, PeripheralSelect}; use crate::time::Hertz; use crate::{clock::Clocks, pac}; diff --git a/vorago-peb1/Cargo.toml b/vorago-peb1/Cargo.toml index f77acdc..c122acb 100644 --- a/vorago-peb1/Cargo.toml +++ b/vorago-peb1/Cargo.toml @@ -11,7 +11,7 @@ keywords = ["no-std", "peb1", "cortex-m", "vorago", "va416xx"] categories = ["embedded", "no-std", "hardware-support"] [dependencies] -va416xx-hal = { version = ">=0.3, <=0.5", path = "../va416xx-hal", features = ["va41630"] } +va416xx-hal = { version = "0.6", path = "../va416xx-hal", features = ["va41630"] } lis2dh12 = { version = "0.7", features = ["out_f32"] } [features]