clean up crate structure a bit

va416xx-hal/src/adc.rs

@@ -287,7 +287,7 @@ impl Adc<ChannelTagEnabled> {
 
 impl<TagEnabled> Adc<TagEnabled> {
     fn generic_new(syscfg: &mut pac::Sysconfig, adc: pac::Adc, _clocks: &Clocks) -> Self {
-        syscfg.enable_peripheral_clock(crate::clock::PeripheralSelect::Adc);
+        syscfg.enable_peripheral_clock(crate::PeripheralSelect::Adc);
         adc.ctrl().write(|w| unsafe { w.bits(0) });
         let adc = Self {
             adc,

va416xx-hal/src/can.rs

@@ -0,0 +1 @@
+

va416xx-hal/src/clock.rs

@@ -12,51 +12,13 @@
 //! - [UART example on the PEB1 board](https://egit.irs.uni-stuttgart.de/rust/va416xx-rs/src/branch/main/examples/simple/examples/uart.rs)
 #[cfg(not(feature = "va41628"))]
 use crate::adc::ADC_MAX_CLK;
-use crate::pac;
+use crate::{pac, PeripheralSelect, SyscfgExt as _};
 
 use crate::time::Hertz;
 
 pub const HBO_FREQ: Hertz = Hertz::from_raw(20_000_000);
 pub const XTAL_OSC_TSTART_MS: u32 = 15;
 
-#[derive(Debug, Copy, Clone, PartialEq)]
-#[cfg_attr(feature = "defmt", derive(defmt::Format))]
-pub enum PeripheralSelect {
-    Spi0 = 0,
-    Spi1 = 1,
-    Spi2 = 2,
-    Spi3 = 3,
-    Uart0 = 4,
-    Uart1 = 5,
-    Uart2 = 6,
-    I2c0 = 7,
-    I2c1 = 8,
-    I2c2 = 9,
-    Can0 = 10,
-    Can1 = 11,
-    Rng = 12,
-    Adc = 13,
-    Dac = 14,
-    Dma = 15,
-    Ebi = 16,
-    Eth = 17,
-    Spw = 18,
-    Clkgen = 19,
-    IrqRouter = 20,
-    IoConfig = 21,
-    Utility = 22,
-    Watchdog = 23,
-    PortA = 24,
-    PortB = 25,
-    PortC = 26,
-    PortD = 27,
-    PortE = 28,
-    PortF = 29,
-    PortG = 30,
-}
-
-pub type PeripheralClock = PeripheralSelect;
-
 #[derive(Debug, PartialEq, Eq)]
 #[cfg_attr(feature = "defmt", derive(defmt::Format))]
 pub enum FilterClkSel {
@@ -70,81 +32,6 @@ pub enum FilterClkSel {
     Clk7 = 7,
 }
 
-#[inline(always)]
-pub fn enable_peripheral_clock(syscfg: &mut pac::Sysconfig, clock: PeripheralSelect) {
-    syscfg
-        .peripheral_clk_enable()
-        .modify(|r, w| unsafe { w.bits(r.bits() | (1 << clock as u8)) });
-}
-
-#[inline(always)]
-pub fn disable_peripheral_clock(syscfg: &mut pac::Sysconfig, clock: PeripheralSelect) {
-    syscfg
-        .peripheral_clk_enable()
-        .modify(|r, w| unsafe { w.bits(r.bits() & !(1 << clock as u8)) });
-}
-
-#[inline(always)]
-pub fn assert_periph_reset(syscfg: &mut pac::Sysconfig, periph: PeripheralSelect) {
-    syscfg
-        .peripheral_reset()
-        .modify(|r, w| unsafe { w.bits(r.bits() & !(1 << periph as u8)) });
-}
-
-#[inline(always)]
-pub fn deassert_periph_reset(syscfg: &mut pac::Sysconfig, periph: PeripheralSelect) {
-    syscfg
-        .peripheral_reset()
-        .modify(|r, w| unsafe { w.bits(r.bits() | (1 << periph as u8)) });
-}
-
-#[inline(always)]
-fn assert_periph_reset_for_two_cycles(syscfg: &mut pac::Sysconfig, periph: PeripheralSelect) {
-    assert_periph_reset(syscfg, periph);
-    cortex_m::asm::nop();
-    cortex_m::asm::nop();
-    deassert_periph_reset(syscfg, periph);
-}
-
-pub trait SyscfgExt {
-    fn enable_peripheral_clock(&mut self, clock: PeripheralClock);
-
-    fn disable_peripheral_clock(&mut self, clock: PeripheralClock);
-
-    fn assert_periph_reset(&mut self, periph: PeripheralSelect);
-
-    fn deassert_periph_reset(&mut self, periph: PeripheralSelect);
-
-    fn assert_periph_reset_for_two_cycles(&mut self, periph: PeripheralSelect);
-}
-
-impl SyscfgExt for pac::Sysconfig {
-    #[inline(always)]
-    fn enable_peripheral_clock(&mut self, clock: PeripheralClock) {
-        enable_peripheral_clock(self, clock)
-    }
-
-    #[inline(always)]
-    fn disable_peripheral_clock(&mut self, clock: PeripheralClock) {
-        disable_peripheral_clock(self, clock)
-    }
-
-    #[inline(always)]
-    fn assert_periph_reset(&mut self, clock: PeripheralSelect) {
-        assert_periph_reset(self, clock)
-    }
-
-    #[inline(always)]
-    fn deassert_periph_reset(&mut self, clock: PeripheralSelect) {
-        deassert_periph_reset(self, clock)
-    }
-
-    #[inline(always)]
-    fn assert_periph_reset_for_two_cycles(&mut self, periph: PeripheralSelect) {
-        assert_periph_reset_for_two_cycles(self, periph)
-    }
-}
-
 /// Refer to chapter 8 (p.57) of the programmers guide for detailed information.
 #[derive(Debug, Copy, Clone, PartialEq, Eq)]
 #[cfg_attr(feature = "defmt", derive(defmt::Format))]

va416xx-hal/src/dac.rs

@@ -5,10 +5,7 @@
 //! - [ADC and DAC example](https://github.com/us-irs/va416xx-rs/blob/main/examples/simple/examples/dac-adc.rs)
 use core::ops::Deref;
 
-use crate::{
+use crate::{clock::Clocks, pac, PeripheralSelect, SyscfgExt as _};
-    clock::{Clocks, PeripheralSelect, SyscfgExt},
-    pac,
-};
 
 pub type DacRegisterBlock = pac::dac0::RegisterBlock;
 

va416xx-hal/src/dma.rs

@@ -5,11 +5,7 @@
 //! - [Simple DMA example](https://egit.irs.uni-stuttgart.de/rust/va416xx-rs/src/branch/main/examples/simple/examples/dma.rs)
 use arbitrary_int::{u10, u2, u3, u4};
 
-use crate::{
+use crate::{enable_nvic_interrupt, pac, PeripheralClock, PeripheralSelect, SyscfgExt as _};
-    clock::{PeripheralClock, PeripheralSelect},
-    enable_nvic_interrupt, pac,
-    prelude::*,
-};
 
 const MAX_DMA_TRANSFERS_PER_CYCLE: usize = 1024;
 const BASE_PTR_ADDR_MASK: u32 = 0b1111111;

va416xx-hal/src/i2c.rs

@@ -3,13 +3,7 @@
 //! ## Examples
 //!
 //! - [PEB1 accelerometer example](https://egit.irs.uni-stuttgart.de/rust/va416xx-rs/src/branch/main/examples/simple/examples/peb1-accelerometer.rs)
-use crate::{
+use crate::{clock::Clocks, pac, time::Hertz, typelevel::Sealed, PeripheralSelect, SyscfgExt as _};
-    clock::{Clocks, PeripheralSelect},
-    pac,
-    prelude::SyscfgExt,
-    time::Hertz,
-    typelevel::Sealed,
-};
 use core::{marker::PhantomData, ops::Deref};
 use embedded_hal::i2c::{self, Operation, SevenBitAddress, TenBitAddress};
 

va416xx-hal/src/irq_router.rs

@@ -1,8 +1,5 @@
 //! IRQ Router peripheral support.
-use crate::{
+use crate::{pac, PeripheralSelect, SyscfgExt as _};
-    clock::{PeripheralSelect, SyscfgExt},
-    pac,
-};
 
 /// This enables and initiates the peripheral.
 ///

va416xx-hal/src/lib.rs

@@ -35,6 +35,7 @@ pub use va416xx as pac;
 
 pub mod prelude;
 
+pub mod can;
 pub mod clock;
 pub mod dma;
 pub mod edac;
@@ -48,7 +49,6 @@ pub mod timer;
 pub mod typelevel;
 pub mod uart;
 pub mod wdt;
-pub mod can;
 
 #[cfg(feature = "va41630")]
 pub mod nvm;
@@ -58,6 +58,80 @@ pub mod adc;
 #[cfg(not(feature = "va41628"))]
 pub mod dac;
 
+#[derive(Debug, Copy, Clone, PartialEq)]
+#[cfg_attr(feature = "defmt", derive(defmt::Format))]
+pub enum PeripheralSelect {
+    Spi0 = 0,
+    Spi1 = 1,
+    Spi2 = 2,
+    Spi3 = 3,
+    Uart0 = 4,
+    Uart1 = 5,
+    Uart2 = 6,
+    I2c0 = 7,
+    I2c1 = 8,
+    I2c2 = 9,
+    Can0 = 10,
+    Can1 = 11,
+    Rng = 12,
+    Adc = 13,
+    Dac = 14,
+    Dma = 15,
+    Ebi = 16,
+    Eth = 17,
+    Spw = 18,
+    Clkgen = 19,
+    IrqRouter = 20,
+    IoConfig = 21,
+    Utility = 22,
+    Watchdog = 23,
+    PortA = 24,
+    PortB = 25,
+    PortC = 26,
+    PortD = 27,
+    PortE = 28,
+    PortF = 29,
+    PortG = 30,
+}
+
+pub type PeripheralClock = PeripheralSelect;
+
+#[inline(always)]
+pub fn enable_peripheral_clock(syscfg: &mut pac::Sysconfig, clock: PeripheralSelect) {
+    syscfg
+        .peripheral_clk_enable()
+        .modify(|r, w| unsafe { w.bits(r.bits() | (1 << clock as u8)) });
+}
+
+#[inline(always)]
+pub fn disable_peripheral_clock(syscfg: &mut pac::Sysconfig, clock: PeripheralSelect) {
+    syscfg
+        .peripheral_clk_enable()
+        .modify(|r, w| unsafe { w.bits(r.bits() & !(1 << clock as u8)) });
+}
+
+#[inline(always)]
+pub fn assert_periph_reset(syscfg: &mut pac::Sysconfig, periph: PeripheralSelect) {
+    syscfg
+        .peripheral_reset()
+        .modify(|r, w| unsafe { w.bits(r.bits() & !(1 << periph as u8)) });
+}
+
+#[inline(always)]
+pub fn deassert_periph_reset(syscfg: &mut pac::Sysconfig, periph: PeripheralSelect) {
+    syscfg
+        .peripheral_reset()
+        .modify(|r, w| unsafe { w.bits(r.bits() | (1 << periph as u8)) });
+}
+
+#[inline(always)]
+fn assert_periph_reset_for_two_cycles(syscfg: &mut pac::Sysconfig, periph: PeripheralSelect) {
+    assert_periph_reset(syscfg, periph);
+    cortex_m::asm::nop();
+    cortex_m::asm::nop();
+    deassert_periph_reset(syscfg, periph);
+}
+
 #[derive(Debug, Eq, Copy, Clone, PartialEq)]
 #[cfg_attr(feature = "defmt", derive(defmt::Format))]
 pub enum FunSel {
@@ -101,6 +175,45 @@ pub fn port_function_select(
     Ok(())
 }
 
+pub trait SyscfgExt {
+    fn enable_peripheral_clock(&mut self, clock: PeripheralClock);
+
+    fn disable_peripheral_clock(&mut self, clock: PeripheralClock);
+
+    fn assert_periph_reset(&mut self, periph: PeripheralSelect);
+
+    fn deassert_periph_reset(&mut self, periph: PeripheralSelect);
+
+    fn assert_periph_reset_for_two_cycles(&mut self, periph: PeripheralSelect);
+}
+
+impl SyscfgExt for pac::Sysconfig {
+    #[inline(always)]
+    fn enable_peripheral_clock(&mut self, clock: PeripheralClock) {
+        enable_peripheral_clock(self, clock)
+    }
+
+    #[inline(always)]
+    fn disable_peripheral_clock(&mut self, clock: PeripheralClock) {
+        disable_peripheral_clock(self, clock)
+    }
+
+    #[inline(always)]
+    fn assert_periph_reset(&mut self, clock: PeripheralSelect) {
+        assert_periph_reset(self, clock)
+    }
+
+    #[inline(always)]
+    fn deassert_periph_reset(&mut self, clock: PeripheralSelect) {
+        deassert_periph_reset(self, clock)
+    }
+
+    #[inline(always)]
+    fn assert_periph_reset_for_two_cycles(&mut self, periph: PeripheralSelect) {
+        assert_periph_reset_for_two_cycles(self, periph)
+    }
+}
+
 /// Enable a specific interrupt using the NVIC peripheral.
 ///
 /// # Safety

va416xx-hal/src/prelude.rs

@@ -1,4 +1,5 @@
 //! Prelude
-pub use crate::clock::{ClkgenExt, SyscfgExt};
+pub use crate::clock::ClkgenExt;
+pub use crate::SyscfgExt;
 pub use fugit::ExtU32 as _;
 pub use fugit::RateExtU32 as _;

va416xx-hal/src/spi.rs

@@ -12,7 +12,7 @@ use core::{convert::Infallible, marker::PhantomData, ops::Deref};
 use embedded_hal::spi::{Mode, MODE_0};
 
 use crate::{
-    clock::{Clocks, PeripheralSelect, SyscfgExt},
+    clock::Clocks,
     gpio::{
         AltFunc1, AltFunc2, AltFunc3, Pin, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PB0,
         PB1, PB12, PB13, PB14, PB15, PB2, PB3, PB4, PC0, PC1, PC10, PC11, PC7, PC8, PC9, PE12,
@@ -21,6 +21,7 @@ use crate::{
     pac,
     time::Hertz,
     typelevel::{NoneT, Sealed},
+    PeripheralSelect, SyscfgExt as _,
 };
 
 #[cfg(not(feature = "va41628"))]
@@ -1046,7 +1047,7 @@ where
         pins: (Sck, Miso, Mosi),
         spi_cfg: SpiConfig,
     ) -> Self {
-        crate::clock::enable_peripheral_clock(syscfg, SpiI::PERIPH_SEL);
+        crate::enable_peripheral_clock(syscfg, SpiI::PERIPH_SEL);
         // This is done in the C HAL.
         syscfg.assert_periph_reset_for_two_cycles(SpiI::PERIPH_SEL);
         let SpiConfig {

va416xx-hal/src/uart/mod.rs

@@ -15,10 +15,10 @@ use core::ops::Deref;
 use embedded_hal_nb::serial::Read;
 use fugit::RateExtU32;
 
-use crate::clock::{Clocks, PeripheralSelect, SyscfgExt};
+use crate::clock::Clocks;
 use crate::gpio::PF13;
 use crate::time::Hertz;
-use crate::{disable_nvic_interrupt, enable_nvic_interrupt};
+use crate::{disable_nvic_interrupt, enable_nvic_interrupt, PeripheralSelect, SyscfgExt as _};
 use crate::{
     gpio::{
         AltFunc1, AltFunc2, AltFunc3, Pin, PA2, PA3, PB14, PB15, PC14, PC4, PC5, PD11, PD12, PE2,
@@ -348,7 +348,7 @@ pub struct BufferTooShortError {
 
 pub trait Instance: Deref<Target = uart_base::RegisterBlock> {
     const IDX: u8;
-    const PERIPH_SEL: PeripheralSelect;
+    const PERIPH_SEL: crate::PeripheralSelect;
     const PTR: *const uart_base::RegisterBlock;
     const IRQ_RX: pac::Interrupt;
     const IRQ_TX: pac::Interrupt;
@@ -636,7 +636,7 @@ impl<TxPinInst: TxPin<UartInstance>, RxPinInst: RxPin<UartInstance>, UartInstanc
         config: impl Into<Config>,
         clocks: &Clocks,
     ) -> Self {
-        crate::clock::enable_peripheral_clock(syscfg, UartInstance::PERIPH_SEL);
+        crate::enable_peripheral_clock(syscfg, UartInstance::PERIPH_SEL);
         // This is done in the C HAL.
         syscfg.assert_periph_reset_for_two_cycles(UartInstance::PERIPH_SEL);
         Uart {
@@ -657,7 +657,7 @@ impl<TxPinInst: TxPin<UartInstance>, RxPinInst: RxPin<UartInstance>, UartInstanc
         config: impl Into<Config>,
         clock: impl Into<Hertz>,
     ) -> Self {
-        crate::clock::enable_peripheral_clock(syscfg, UartInstance::PERIPH_SEL);
+        crate::enable_peripheral_clock(syscfg, UartInstance::PERIPH_SEL);
         Uart {
             inner: UartBase {
                 uart,

va416xx-hal/src/wdt.rs

@@ -4,12 +4,8 @@
 //!
 //! - [Watchdog simple example](https://egit.irs.uni-stuttgart.de/rust/va416xx-rs/src/branch/main/examples/simple/examples/wdt.rs)
 use crate::time::Hertz;
-use crate::{
+use crate::{clock::Clocks, pac};
-    clock::{Clocks, PeripheralSelect},
+use crate::{disable_nvic_interrupt, enable_nvic_interrupt, PeripheralSelect, SyscfgExt as _};
-    pac,
-    prelude::SyscfgExt,
-};
-use crate::{disable_nvic_interrupt, enable_nvic_interrupt};
 
 pub const WDT_UNLOCK_VALUE: u32 = 0x1ACC_E551;