Merge pull request 'bugfix for updated DMA example' (#20) from dma-bugfix into main
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Reviewed-on: #20
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8d84c61327
@ -25,7 +25,8 @@ static DMA_ACTIVE_FLAG: Mutex<Cell<bool>> = Mutex::new(Cell::new(false));
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#[link_section = ".sram1"]
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static mut DMA_CTRL_BLOCK: DmaCtrlBlock = DmaCtrlBlock::new();
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// We can use statically allocated buffers for DMA transfers as well.
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// We can use statically allocated buffers for DMA transfers as well, and we can also place
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// those into SRAM1.
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#[link_section = ".sram1"]
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static mut DMA_SRC_BUF: [u16; 36] = [0; 36];
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#[link_section = ".sram1"]
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@ -135,10 +136,11 @@ fn transfer_example_8_bit(
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}
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fn transfer_example_16_bit(dma0: &mut DmaChannel, delay_ms: &mut CountdownTimer<pac::Tim0>) {
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let dest_buf_ref = unsafe { &mut *core::ptr::addr_of_mut!(DMA_DEST_BUF[0..33]) };
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unsafe {
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// Set values scaled from 0 to 65535 to verify this is really a 16-bit transfer.
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(0..32).for_each(|i| {
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DMA_SRC_BUF[i] = (i as u32 * u16::MAX as u32 / (DMA_SRC_BUF.len() - 1) as u32) as u16;
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DMA_SRC_BUF[i] = (i as u32 * u16::MAX as u32 / (dest_buf_ref.len() as u32 - 1)) as u16;
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});
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}
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cortex_m::interrupt::free(|cs| {
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@ -147,12 +149,11 @@ fn transfer_example_16_bit(dma0: &mut DmaChannel, delay_ms: &mut CountdownTimer<
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cortex_m::interrupt::free(|cs| {
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DMA_ACTIVE_FLAG.borrow(cs).set(false);
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});
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let dest_buf_ref = unsafe { &mut *core::ptr::addr_of_mut!(DMA_DEST_BUF[0..32]) };
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// Safety: The source and destination buffer are valid for the duration of the DMA transfer.
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unsafe {
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dma0.prepare_mem_to_mem_transfer_16_bit(
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&*core::ptr::addr_of!(DMA_SRC_BUF[0..32]),
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dest_buf_ref,
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&mut dest_buf_ref[0..32],
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)
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.expect("error preparing transfer");
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}
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@ -187,7 +188,7 @@ fn transfer_example_16_bit(dma0: &mut DmaChannel, delay_ms: &mut CountdownTimer<
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(0..32).for_each(|i| {
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assert_eq!(
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dest_buf_ref[i],
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(i as u32 * u16::MAX as u32 / (dest_buf_ref.len() - 1) as u32) as u16
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(i as u32 * u16::MAX as u32 / (dest_buf_ref.len() as u32 - 1)) as u16
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);
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});
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// Sentinel value, should be 0.
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