Rework library structure
Changed: - Move most library components to new [`vorago-shared-periphs`](https://egit.irs.uni-stuttgart.de/rust/vorago-shared-periphs) which is mostly re-exported in this crate. - Overhaul and simplification of several HAL APIs. The system configuration and IRQ router peripheral instance generally does not need to be passed to HAL API anymore. - All HAL drivers are now type erased. The constructors will still expect and consume the PAC singleton component for resource management purposes, but are not cached anymore. - Refactoring of GPIO library to be more inline with embassy GPIO API. Added: - I2C clock timeout feature support.
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@ -10,11 +10,10 @@ use crc::{Crc, CRC_32_ISO_HDLC};
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use defmt_rtt as _;
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use panic_probe as _;
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use va416xx_hal::{
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clock::{pll_setup_delay, ClkDivSel, ClkselSys},
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clock::{pll_setup_delay, ClkDivSel, ClkselSys, ClockConfigurator},
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edac,
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nvm::Nvm,
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pac::{self, interrupt},
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prelude::*,
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time::Hertz,
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wdt::Wdt,
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};
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@ -104,23 +103,16 @@ fn main() -> ! {
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dp.sysconfig.rom_prot().write(|w| unsafe { w.bits(1) });
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setup_edac(&mut dp.sysconfig);
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// Use the external clock connected to XTAL_N.
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let clocks = dp
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.clkgen
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.constrain()
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let clocks = ClockConfigurator::new(dp.clkgen)
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.xtal_n_clk_with_src_freq(Hertz::from_raw(EXTCLK_FREQ))
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.freeze(&mut dp.sysconfig)
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.freeze()
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.unwrap();
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let mut opt_wdt = OptWdt(None);
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if WITH_WDT {
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opt_wdt.0 = Some(Wdt::start(
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&mut dp.sysconfig,
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dp.watch_dog,
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&clocks,
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WDT_FREQ_MS,
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));
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opt_wdt.0 = Some(Wdt::start(dp.watch_dog, &clocks, WDT_FREQ_MS));
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}
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let nvm = Nvm::new(&mut dp.sysconfig, dp.spi3, &clocks);
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let nvm = Nvm::new(dp.spi3, &clocks);
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if FLASH_SELF {
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let mut first_four_bytes: [u8; 4] = [0; 4];
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