Rework library structure
Changed: - Move most library components to new [`vorago-shared-periphs`](https://egit.irs.uni-stuttgart.de/rust/vorago-shared-periphs) which is mostly re-exported in this crate. - Overhaul and simplification of several HAL APIs. The system configuration and IRQ router peripheral instance generally does not need to be passed to HAL API anymore. - All HAL drivers are now type erased. The constructors will still expect and consume the PAC singleton component for resource management purposes, but are not cached anymore. - Refactoring of GPIO library to be more inline with embassy GPIO API. Added: - I2C clock timeout feature support.
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@ -8,9 +8,9 @@ use core::marker::PhantomData;
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use crate::clock::Clocks;
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use crate::pac;
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use crate::prelude::*;
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use crate::time::Hertz;
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use num_enum::{IntoPrimitive, TryFromPrimitive};
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use vorago_shared_periphs::{enable_peripheral_clock, PeripheralSelect};
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pub const ADC_MIN_CLK: Hertz = Hertz::from_raw(2_000_000);
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pub const ADC_MAX_CLK: Hertz = Hertz::from_raw(12_500_000);
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@ -151,8 +151,8 @@ pub struct Adc<TagEnabled = ChannelTagDisabled> {
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impl Adc<ChannelTagEnabled> {}
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impl Adc<ChannelTagDisabled> {
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pub fn new(syscfg: &mut pac::Sysconfig, adc: pac::Adc, clocks: &Clocks) -> Self {
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Self::generic_new(syscfg, adc, clocks)
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pub fn new(adc: pac::Adc, clocks: &Clocks) -> Self {
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Self::generic_new(adc, clocks)
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}
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pub fn trigger_and_read_single_channel(&self, ch: ChannelSelect) -> Result<u16, AdcEmptyError> {
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@ -209,12 +209,8 @@ impl Adc<ChannelTagDisabled> {
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}
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impl Adc<ChannelTagEnabled> {
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pub fn new_with_channel_tag(
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syscfg: &mut pac::Sysconfig,
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adc: pac::Adc,
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clocks: &Clocks,
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) -> Self {
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let mut adc = Self::generic_new(syscfg, adc, clocks);
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pub fn new_with_channel_tag(adc: pac::Adc, clocks: &Clocks) -> Self {
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let mut adc = Self::generic_new(adc, clocks);
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adc.enable_channel_tag();
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adc
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}
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@ -286,8 +282,8 @@ impl Adc<ChannelTagEnabled> {
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}
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impl<TagEnabled> Adc<TagEnabled> {
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fn generic_new(syscfg: &mut pac::Sysconfig, adc: pac::Adc, _clocks: &Clocks) -> Self {
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syscfg.enable_peripheral_clock(crate::clock::PeripheralSelect::Adc);
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fn generic_new(adc: pac::Adc, _clocks: &Clocks) -> Self {
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enable_peripheral_clock(PeripheralSelect::Adc);
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adc.ctrl().write(|w| unsafe { w.bits(0) });
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let adc = Self {
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adc,
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