Rework library structure

Changed:

- Move most library components to new [`vorago-shared-periphs`](https://egit.irs.uni-stuttgart.de/rust/vorago-shared-periphs)
  which is mostly re-exported in this crate.
- Overhaul and simplification of several HAL APIs. The system configuration and IRQ router
  peripheral instance generally does not need to be passed to HAL API anymore.
- All HAL drivers are now type erased. The constructors will still expect and consume the PAC
  singleton component for resource management purposes, but are not cached anymore.
- Refactoring of GPIO library to be more inline with embassy GPIO API.

Added:

- I2C clock timeout feature support.

examples/embassy/src/bin/async-uart-rx.rs

@@ -27,8 +27,10 @@ use embedded_io::Write;
 use embedded_io_async::Read;
 use heapless::spsc::{Producer, Queue};
 use va416xx_hal::{
-    gpio::PinsG,
+    clock::ClockConfigurator,
+    gpio::{Output, PinState},
     pac::{self, interrupt},
+    pins::PinsG,
     prelude::*,
     time::Hertz,
     uart::{
@@ -46,34 +48,22 @@ static PRODUCER_UART_A: Mutex<RefCell<Option<Producer<u8, 256>>>> = Mutex::new(R
 async fn main(_spawner: Spawner) {
     defmt::println!("-- VA108xx Async UART RX Demo --");
 
-    let mut dp = pac::Peripherals::take().unwrap();
+    let dp = pac::Peripherals::take().unwrap();
 
     // Initialize the systick interrupt & obtain the token to prove that we did
     // Use the external clock connected to XTAL_N.
-    let clocks = dp
-        .clkgen
-        .constrain()
+    let clocks = ClockConfigurator::new(dp.clkgen)
         .xtal_n_clk_with_src_freq(Hertz::from_raw(EXTCLK_FREQ))
-        .freeze(&mut dp.sysconfig)
+        .freeze()
         .unwrap();
     // Safety: Only called once here.
-    unsafe {
-        va416xx_embassy::init(
-            &mut dp.sysconfig,
-            &dp.irq_router,
-            dp.tim15,
-            dp.tim14,
-            &clocks,
-        );
-    }
+    va416xx_embassy::init(dp.tim15, dp.tim14, &clocks);
 
-    let portg = PinsG::new(&mut dp.sysconfig, dp.portg);
-    let mut led = portg.pg5.into_readable_push_pull_output();
+    let portg = PinsG::new(dp.portg);
+    let mut led = Output::new(portg.pg5, PinState::Low);
 
-    let tx = portg.pg0.into_funsel_1();
-    let rx = portg.pg1.into_funsel_1();
-
-    let uarta = uart::Uart::new(&mut dp.sysconfig, dp.uart0, (tx, rx), 115200.Hz(), &clocks);
+    let uarta =
+        uart::Uart::new(dp.uart0, portg.pg0, portg.pg1, &clocks, 115200.Hz().into()).unwrap();
 
     let (mut tx_uart_a, rx_uart_a) = uarta.split();
     let (prod_uart_a, cons_uart_a) = QUEUE_UART_A.take().split();