From fb15da0ef9f10e33be7b5c9878092e0262e46c2f Mon Sep 17 00:00:00 2001 From: Robin Mueller Date: Tue, 2 Sep 2025 21:12:10 +0200 Subject: [PATCH] update PAC --- .../{def-config.toml => config.toml.template} | 0 Embed.toml.sample => Embed.toml.template | 0 README.md | 2 +- va416xx-hal/src/can/asynch.rs | 4 +- va416xx/CHANGELOG.md | 7 +- va416xx/Cargo.toml | 2 +- va416xx/src/adc.rs | 30 +- va416xx/src/adc/ctrl.rs | 18 +- va416xx/src/adc/fifo_clr.rs | 8 +- va416xx/src/adc/fifo_data.rs | 4 +- va416xx/src/adc/irq_clr.rs | 14 +- va416xx/src/adc/irq_enb.rs | 20 +- va416xx/src/adc/irq_end.rs | 4 +- va416xx/src/adc/rxfifoirqtrg.rs | 4 +- va416xx/src/adc/status.rs | 4 +- va416xx/src/can0.rs | 426 ++-- va416xx/src/can0/bmskb.rs | 50 +- va416xx/src/can0/bmskx.rs | 26 +- va416xx/src/can0/canec.rs | 10 +- va416xx/src/can0/cediag.rs | 20 +- va416xx/src/can0/cgcr.rs | 30 +- va416xx/src/can0/cicen.rs | 10 +- va416xx/src/can0/ciclr.rs | 10 +- va416xx/src/can0/cien.rs | 10 +- va416xx/src/can0/cipnd.rs | 10 +- va416xx/src/can0/cnstat_cmb0.rs | 12 +- va416xx/src/can0/cnstat_cmb1.rs | 12 +- va416xx/src/can0/cnstat_cmb10.rs | 12 +- va416xx/src/can0/cnstat_cmb11.rs | 12 +- va416xx/src/can0/cnstat_cmb12.rs | 12 +- va416xx/src/can0/cnstat_cmb13.rs | 12 +- va416xx/src/can0/cnstat_cmb14.rs | 12 +- va416xx/src/can0/cnstat_cmb2.rs | 12 +- va416xx/src/can0/cnstat_cmb3.rs | 12 +- va416xx/src/can0/cnstat_cmb4.rs | 12 +- va416xx/src/can0/cnstat_cmb5.rs | 12 +- va416xx/src/can0/cnstat_cmb6.rs | 12 +- va416xx/src/can0/cnstat_cmb7.rs | 12 +- va416xx/src/can0/cnstat_cmb8.rs | 12 +- va416xx/src/can0/cnstat_cmb9.rs | 12 +- va416xx/src/can0/cnstat_hcmb.rs | 12 +- va416xx/src/can0/cstpnd.rs | 12 +- va416xx/src/can0/ctim.rs | 14 +- va416xx/src/can0/ctmr.rs | 6 +- va416xx/src/can0/data0_cmb0.rs | 10 +- va416xx/src/can0/data0_cmb1.rs | 10 +- va416xx/src/can0/data0_cmb10.rs | 10 +- va416xx/src/can0/data0_cmb11.rs | 10 +- va416xx/src/can0/data0_cmb12.rs | 10 +- va416xx/src/can0/data0_cmb13.rs | 10 +- va416xx/src/can0/data0_cmb14.rs | 10 +- va416xx/src/can0/data0_cmb2.rs | 10 +- va416xx/src/can0/data0_cmb3.rs | 10 +- va416xx/src/can0/data0_cmb4.rs | 10 +- va416xx/src/can0/data0_cmb5.rs | 10 +- va416xx/src/can0/data0_cmb6.rs | 10 +- va416xx/src/can0/data0_cmb7.rs | 10 +- va416xx/src/can0/data0_cmb8.rs | 10 +- va416xx/src/can0/data0_cmb9.rs | 10 +- va416xx/src/can0/data0_hcmb.rs | 10 +- va416xx/src/can0/data1_cmb0.rs | 10 +- va416xx/src/can0/data1_cmb1.rs | 10 +- va416xx/src/can0/data1_cmb10.rs | 10 +- va416xx/src/can0/data1_cmb11.rs | 10 +- va416xx/src/can0/data1_cmb12.rs | 10 +- va416xx/src/can0/data1_cmb13.rs | 10 +- va416xx/src/can0/data1_cmb14.rs | 10 +- va416xx/src/can0/data1_cmb2.rs | 10 +- va416xx/src/can0/data1_cmb3.rs | 10 +- va416xx/src/can0/data1_cmb4.rs | 10 +- va416xx/src/can0/data1_cmb5.rs | 10 +- va416xx/src/can0/data1_cmb6.rs | 10 +- va416xx/src/can0/data1_cmb7.rs | 10 +- va416xx/src/can0/data1_cmb8.rs | 10 +- va416xx/src/can0/data1_cmb9.rs | 10 +- va416xx/src/can0/data1_hcmb.rs | 10 +- va416xx/src/can0/data2_cmb0.rs | 10 +- va416xx/src/can0/data2_cmb1.rs | 10 +- va416xx/src/can0/data2_cmb10.rs | 10 +- va416xx/src/can0/data2_cmb11.rs | 10 +- va416xx/src/can0/data2_cmb12.rs | 10 +- va416xx/src/can0/data2_cmb13.rs | 10 +- va416xx/src/can0/data2_cmb14.rs | 10 +- va416xx/src/can0/data2_cmb2.rs | 10 +- va416xx/src/can0/data2_cmb3.rs | 10 +- va416xx/src/can0/data2_cmb4.rs | 10 +- va416xx/src/can0/data2_cmb5.rs | 10 +- va416xx/src/can0/data2_cmb6.rs | 10 +- va416xx/src/can0/data2_cmb7.rs | 10 +- va416xx/src/can0/data2_cmb8.rs | 10 +- va416xx/src/can0/data2_cmb9.rs | 10 +- va416xx/src/can0/data2_hcmb.rs | 10 +- va416xx/src/can0/data3_cmb0.rs | 10 +- va416xx/src/can0/data3_cmb1.rs | 10 +- va416xx/src/can0/data3_cmb10.rs | 10 +- va416xx/src/can0/data3_cmb11.rs | 10 +- va416xx/src/can0/data3_cmb12.rs | 10 +- va416xx/src/can0/data3_cmb13.rs | 10 +- va416xx/src/can0/data3_cmb14.rs | 10 +- va416xx/src/can0/data3_cmb2.rs | 10 +- va416xx/src/can0/data3_cmb3.rs | 10 +- va416xx/src/can0/data3_cmb4.rs | 10 +- va416xx/src/can0/data3_cmb5.rs | 10 +- va416xx/src/can0/data3_cmb6.rs | 10 +- va416xx/src/can0/data3_cmb7.rs | 10 +- va416xx/src/can0/data3_cmb8.rs | 10 +- va416xx/src/can0/data3_cmb9.rs | 10 +- va416xx/src/can0/data3_hcmb.rs | 10 +- va416xx/src/can0/gmskb.rs | 50 +- va416xx/src/can0/gmskx.rs | 26 +- va416xx/src/can0/id0_cmb0.rs | 8 +- va416xx/src/can0/id0_cmb1.rs | 8 +- va416xx/src/can0/id0_cmb10.rs | 8 +- va416xx/src/can0/id0_cmb11.rs | 8 +- va416xx/src/can0/id0_cmb12.rs | 8 +- va416xx/src/can0/id0_cmb13.rs | 8 +- va416xx/src/can0/id0_cmb14.rs | 8 +- va416xx/src/can0/id0_cmb2.rs | 8 +- va416xx/src/can0/id0_cmb3.rs | 8 +- va416xx/src/can0/id0_cmb4.rs | 8 +- va416xx/src/can0/id0_cmb5.rs | 8 +- va416xx/src/can0/id0_cmb6.rs | 8 +- va416xx/src/can0/id0_cmb7.rs | 8 +- va416xx/src/can0/id0_cmb8.rs | 8 +- va416xx/src/can0/id0_cmb9.rs | 8 +- va416xx/src/can0/id0_hcmb.rs | 8 +- va416xx/src/can0/id1_cmb0.rs | 8 +- va416xx/src/can0/id1_cmb1.rs | 8 +- va416xx/src/can0/id1_cmb10.rs | 8 +- va416xx/src/can0/id1_cmb11.rs | 8 +- va416xx/src/can0/id1_cmb12.rs | 8 +- va416xx/src/can0/id1_cmb13.rs | 8 +- va416xx/src/can0/id1_cmb14.rs | 8 +- va416xx/src/can0/id1_cmb2.rs | 8 +- va416xx/src/can0/id1_cmb3.rs | 8 +- va416xx/src/can0/id1_cmb4.rs | 8 +- va416xx/src/can0/id1_cmb5.rs | 8 +- va416xx/src/can0/id1_cmb6.rs | 8 +- va416xx/src/can0/id1_cmb7.rs | 8 +- va416xx/src/can0/id1_cmb8.rs | 8 +- va416xx/src/can0/id1_cmb9.rs | 8 +- va416xx/src/can0/id1_hcmb.rs | 8 +- va416xx/src/can0/tstp_cmb0.rs | 8 +- va416xx/src/can0/tstp_cmb1.rs | 8 +- va416xx/src/can0/tstp_cmb10.rs | 8 +- va416xx/src/can0/tstp_cmb11.rs | 8 +- va416xx/src/can0/tstp_cmb12.rs | 8 +- va416xx/src/can0/tstp_cmb13.rs | 8 +- va416xx/src/can0/tstp_cmb14.rs | 8 +- va416xx/src/can0/tstp_cmb2.rs | 8 +- va416xx/src/can0/tstp_cmb3.rs | 8 +- va416xx/src/can0/tstp_cmb4.rs | 8 +- va416xx/src/can0/tstp_cmb5.rs | 8 +- va416xx/src/can0/tstp_cmb6.rs | 8 +- va416xx/src/can0/tstp_cmb7.rs | 8 +- va416xx/src/can0/tstp_cmb8.rs | 8 +- va416xx/src/can0/tstp_cmb9.rs | 8 +- va416xx/src/can0/tstp_hcmb.rs | 8 +- va416xx/src/clkgen.rs | 9 +- va416xx/src/clkgen/ctrl0.rs | 28 +- va416xx/src/clkgen/ctrl1.rs | 18 +- va416xx/src/clkgen/stat.rs | 4 +- va416xx/src/dac0.rs | 33 +- va416xx/src/dac0/ctrl0.rs | 10 +- va416xx/src/dac0/ctrl1.rs | 10 +- va416xx/src/dac0/fifo_clr.rs | 8 +- va416xx/src/dac0/fifo_data.rs | 8 +- va416xx/src/dac0/irq_clr.rs | 14 +- va416xx/src/dac0/irq_enb.rs | 20 +- va416xx/src/dac0/irq_end.rs | 4 +- va416xx/src/dac0/status.rs | 4 +- va416xx/src/dac0/txfifoirqtrg.rs | 4 +- va416xx/src/dma.rs | 105 +- va416xx/src/dma/alt_ctrl_base_ptr.rs | 8 +- va416xx/src/dma/cfg.rs | 10 +- va416xx/src/dma/chnl_enable_clr.rs | 14 +- va416xx/src/dma/chnl_enable_set.rs | 14 +- va416xx/src/dma/chnl_pri_alt_clr.rs | 14 +- va416xx/src/dma/chnl_pri_alt_set.rs | 14 +- va416xx/src/dma/chnl_priority_clr.rs | 14 +- va416xx/src/dma/chnl_priority_set.rs | 14 +- va416xx/src/dma/chnl_req_mask_clr.rs | 14 +- va416xx/src/dma/chnl_req_mask_set.rs | 14 +- va416xx/src/dma/chnl_sw_request.rs | 14 +- va416xx/src/dma/chnl_useburst_clr.rs | 14 +- va416xx/src/dma/chnl_useburst_set.rs | 14 +- va416xx/src/dma/ctrl_base_ptr.rs | 8 +- va416xx/src/dma/dma_active_clr.rs | 14 +- va416xx/src/dma/dma_active_set.rs | 14 +- va416xx/src/dma/dma_done_clr.rs | 14 +- va416xx/src/dma/dma_done_set.rs | 14 +- va416xx/src/dma/dma_req_status.rs | 14 +- va416xx/src/dma/dma_sreq_status.rs | 14 +- va416xx/src/dma/err_clr.rs | 8 +- va416xx/src/dma/err_set.rs | 6 +- va416xx/src/dma/integration_cfg.rs | 8 +- va416xx/src/dma/periph_id_0.rs | 4 +- va416xx/src/dma/periph_id_2.rs | 8 +- va416xx/src/dma/periph_id_3.rs | 8 +- va416xx/src/dma/periph_id_4.rs | 6 +- va416xx/src/dma/primecell_id_0.rs | 4 +- va416xx/src/dma/primecell_id_1.rs | 4 +- va416xx/src/dma/primecell_id_2.rs | 4 +- va416xx/src/dma/primecell_id_3.rs | 4 +- va416xx/src/dma/stall_status.rs | 6 +- va416xx/src/dma/status.rs | 4 +- va416xx/src/dma/waitonreq_status.rs | 4 +- va416xx/src/eth.rs | 285 +-- va416xx/src/eth/dma_ahb_status.rs | 8 +- va416xx/src/eth/dma_bus_mode.rs | 30 +- va416xx/src/eth/dma_curr_rx_bufr_addr.rs | 8 +- va416xx/src/eth/dma_curr_rx_desc.rs | 8 +- va416xx/src/eth/dma_curr_tx_bufr_addr.rs | 8 +- va416xx/src/eth/dma_curr_tx_desc.rs | 8 +- va416xx/src/eth/dma_intr_en.rs | 36 +- va416xx/src/eth/dma_miss_over_counter.rs | 14 +- va416xx/src/eth/dma_oper_mode.rs | 36 +- va416xx/src/eth/dma_rx_desc_list_addr.rs | 8 +- va416xx/src/eth/dma_rx_intr_wdog_timer.rs | 8 +- va416xx/src/eth/dma_rx_poll_demand.rs | 8 +- va416xx/src/eth/dma_status.rs | 4 +- va416xx/src/eth/dma_tx_desc_list_addr.rs | 8 +- va416xx/src/eth/dma_tx_poll_demand.rs | 8 +- va416xx/src/eth/mac_addr_h.rs | 2 - va416xx/src/eth/mac_addr_l.rs | 2 - va416xx/src/eth/mac_config.rs | 44 +- va416xx/src/eth/mac_debug.rs | 4 +- va416xx/src/eth/mac_flow_ctrl.rs | 20 +- va416xx/src/eth/mac_frame_fltr.rs | 32 +- va416xx/src/eth/mac_gmii_addr.rs | 16 +- va416xx/src/eth/mac_gmii_data.rs | 8 +- va416xx/src/eth/mac_intr_mask.rs | 8 +- va416xx/src/eth/mac_intr_stat.rs | 4 +- va416xx/src/eth/mac_vlan_tag.rs | 14 +- va416xx/src/eth/mac_wdog_to.rs | 10 +- va416xx/src/eth/mmc_cntrl.rs | 20 +- va416xx/src/eth/mmc_intr_mask_rx.rs | 58 +- va416xx/src/eth/mmc_intr_mask_tx.rs | 58 +- va416xx/src/eth/mmc_intr_rx.rs | 58 +- va416xx/src/eth/mmc_intr_tx.rs | 58 +- va416xx/src/eth/rx1024maxoct_gb.rs | 4 +- va416xx/src/eth/rx128to255oct_gb.rs | 4 +- va416xx/src/eth/rx256to511oct_gb.rs | 4 +- va416xx/src/eth/rx512to1023oct_gb.rs | 4 +- va416xx/src/eth/rx64octets_gb.rs | 4 +- va416xx/src/eth/rx65to127oct_gb.rs | 4 +- va416xx/src/eth/rxalignerror.rs | 4 +- va416xx/src/eth/rxbcastframes_g.rs | 4 +- va416xx/src/eth/rxcrcerror.rs | 4 +- va416xx/src/eth/rxctrlframes_g.rs | 4 +- va416xx/src/eth/rxfifooverflow.rs | 4 +- va416xx/src/eth/rxframecount_gb.rs | 4 +- va416xx/src/eth/rxjabbererror.rs | 4 +- va416xx/src/eth/rxlengtherror.rs | 4 +- va416xx/src/eth/rxmcastframes_g.rs | 4 +- va416xx/src/eth/rxoctetcount_g.rs | 4 +- va416xx/src/eth/rxoctetcount_gb.rs | 4 +- va416xx/src/eth/rxoutrangetype.rs | 4 +- va416xx/src/eth/rxoversize_g.rs | 4 +- va416xx/src/eth/rxpauseframes.rs | 4 +- va416xx/src/eth/rxrcverror.rs | 4 +- va416xx/src/eth/rxrunterror.rs | 4 +- va416xx/src/eth/rxucastframes_g.rs | 4 +- va416xx/src/eth/rxundersize_g.rs | 4 +- va416xx/src/eth/rxvlanframes_gb.rs | 4 +- va416xx/src/eth/rxwdogerror.rs | 4 +- va416xx/src/eth/subsec_inc.rs | 8 +- va416xx/src/eth/systime_nanosec.rs | 4 +- va416xx/src/eth/systime_nsecup.rs | 10 +- va416xx/src/eth/systime_seconds.rs | 4 +- va416xx/src/eth/systime_secsupdat.rs | 8 +- va416xx/src/eth/target_time_nsec.rs | 10 +- va416xx/src/eth/target_time_secs.rs | 8 +- va416xx/src/eth/timestamp_ctrl.rs | 48 +- va416xx/src/eth/timestampaddend.rs | 8 +- va416xx/src/eth/tx1024maxoct_gb.rs | 4 +- va416xx/src/eth/tx128to255oct_gb.rs | 4 +- va416xx/src/eth/tx256to511oct_gb.rs | 4 +- va416xx/src/eth/tx512to1023oct_gb.rs | 4 +- va416xx/src/eth/tx64oct_gb.rs | 4 +- va416xx/src/eth/tx65to127oct_gb.rs | 4 +- va416xx/src/eth/txbcastframe_gb.rs | 4 +- va416xx/src/eth/txbcastframes_g.rs | 4 +- va416xx/src/eth/txcarriererror.rs | 4 +- va416xx/src/eth/txdeferred.rs | 4 +- va416xx/src/eth/txexcessdef.rs | 4 +- va416xx/src/eth/txexesscol.rs | 4 +- va416xx/src/eth/txframecount_g.rs | 4 +- va416xx/src/eth/txframecount_gb.rs | 4 +- va416xx/src/eth/txlanframes_g.rs | 4 +- va416xx/src/eth/txlatecol.rs | 4 +- va416xx/src/eth/txmcastframe_gb.rs | 4 +- va416xx/src/eth/txmcastframes_g.rs | 4 +- va416xx/src/eth/txmulticol_g.rs | 4 +- va416xx/src/eth/txoctetcount_g.rs | 4 +- va416xx/src/eth/txoctetcount_gb.rs | 4 +- va416xx/src/eth/txoversize_g.rs | 4 +- va416xx/src/eth/txpauseframes.rs | 4 +- va416xx/src/eth/txsinglecol_g.rs | 4 +- va416xx/src/eth/txucastframe_gb.rs | 4 +- va416xx/src/eth/txundererr.rs | 4 +- va416xx/src/eth/vlan_hashtable.rs | 8 +- va416xx/src/eth/vlan_increplace.rs | 14 +- va416xx/src/generic.rs | 82 +- va416xx/src/i2c0.rs | 99 +- va416xx/src/i2c0/address.rs | 6 +- va416xx/src/i2c0/clkscale.rs | 10 +- va416xx/src/i2c0/clktolimit.rs | 6 +- va416xx/src/i2c0/cmd.rs | 6 +- va416xx/src/i2c0/ctrl.rs | 24 +- va416xx/src/i2c0/data.rs | 6 +- va416xx/src/i2c0/fifo_clr.rs | 10 +- va416xx/src/i2c0/irq_enb.rs | 34 +- va416xx/src/i2c0/rxcount.rs | 4 +- va416xx/src/i2c0/rxfifoirqtrg.rs | 6 +- va416xx/src/i2c0/s0_address.rs | 12 +- va416xx/src/i2c0/s0_addressb.rs | 12 +- va416xx/src/i2c0/s0_addressmask.rs | 10 +- va416xx/src/i2c0/s0_addressmaskb.rs | 6 +- va416xx/src/i2c0/s0_ctrl.rs | 16 +- va416xx/src/i2c0/s0_data.rs | 8 +- va416xx/src/i2c0/s0_fifo_clr.rs | 10 +- va416xx/src/i2c0/s0_irq_enb.rs | 38 +- va416xx/src/i2c0/s0_lastaddress.rs | 4 +- va416xx/src/i2c0/s0_maxwords.rs | 10 +- va416xx/src/i2c0/s0_rxcount.rs | 4 +- va416xx/src/i2c0/s0_rxfifoirqtrg.rs | 8 +- va416xx/src/i2c0/s0_state.rs | 4 +- va416xx/src/i2c0/s0_status.rs | 4 +- va416xx/src/i2c0/s0_txcount.rs | 4 +- va416xx/src/i2c0/s0_txfifoirqtrg.rs | 4 +- va416xx/src/i2c0/state.rs | 4 +- va416xx/src/i2c0/status.rs | 36 +- va416xx/src/i2c0/tmconfig.rs | 6 +- va416xx/src/i2c0/txcount.rs | 4 +- va416xx/src/i2c0/txfifoirqtrg.rs | 6 +- va416xx/src/i2c0/words.rs | 6 +- va416xx/src/ioconfig.rs | 90 +- va416xx/src/ioconfig/clkdiv0.rs | 4 +- va416xx/src/ioconfig/clkdiv1.rs | 6 +- va416xx/src/ioconfig/clkdiv2.rs | 6 +- va416xx/src/ioconfig/clkdiv3.rs | 6 +- va416xx/src/ioconfig/clkdiv4.rs | 6 +- va416xx/src/ioconfig/clkdiv5.rs | 6 +- va416xx/src/ioconfig/clkdiv6.rs | 6 +- va416xx/src/ioconfig/clkdiv7.rs | 6 +- va416xx/src/ioconfig/porta.rs | 31 +- va416xx/src/irq_router.rs | 45 +- va416xx/src/irq_router/adcsel.rs | 4 +- va416xx/src/irq_router/dacsel0.rs | 4 +- va416xx/src/irq_router/dacsel1.rs | 4 +- va416xx/src/irq_router/dmasel0.rs | 4 +- va416xx/src/irq_router/dmasel1.rs | 4 +- va416xx/src/irq_router/dmasel2.rs | 4 +- va416xx/src/irq_router/dmasel3.rs | 4 +- va416xx/src/irq_router/dmattsel.rs | 8 +- va416xx/src/irq_router/irq_out0.rs | 4 +- va416xx/src/irq_router/irq_out1.rs | 4 +- va416xx/src/irq_router/irq_out2.rs | 4 +- va416xx/src/irq_router/irq_out3.rs | 4 +- va416xx/src/irq_router/irq_out4.rs | 4 +- va416xx/src/irq_router/irq_out5.rs | 4 +- va416xx/src/lib.rs | 2190 +---------------- va416xx/src/porta.rs | 82 +- va416xx/src/porta/datain.rs | 4 +- va416xx/src/porta/datainbyte.rs | 7 +- va416xx/src/porta/datamask.rs | 6 +- va416xx/src/porta/datamaskbyte.rs | 9 +- va416xx/src/porta/dataout.rs | 6 +- va416xx/src/porta/dataoutbyte.rs | 9 +- va416xx/src/porta/edge_status.rs | 6 +- va416xx/src/porta/irq_edge.rs | 6 +- va416xx/src/porta/irq_enb.rs | 6 +- va416xx/src/porta/irq_end.rs | 4 +- va416xx/src/porta/irq_evt.rs | 6 +- va416xx/src/porta/irq_raw.rs | 4 +- va416xx/src/porta/irq_sen.rs | 6 +- va416xx/src/spi0.rs | 33 +- va416xx/src/spi0/clkprescale.rs | 6 +- va416xx/src/spi0/ctrl0.rs | 14 +- va416xx/src/spi0/ctrl1.rs | 26 +- va416xx/src/spi0/data.rs | 6 +- va416xx/src/spi0/fifo_clr.rs | 10 +- va416xx/src/spi0/irq_enb.rs | 14 +- va416xx/src/spi0/rxfifoirqtrg.rs | 6 +- va416xx/src/spi0/state.rs | 4 +- va416xx/src/spi0/status.rs | 4 +- va416xx/src/spi0/txfifoirqtrg.rs | 6 +- va416xx/src/spw.rs | 36 +- va416xx/src/spw/clkdiv.rs | 6 +- va416xx/src/spw/ctrl.rs | 40 +- va416xx/src/spw/defaddr.rs | 6 +- va416xx/src/spw/dkey.rs | 8 +- va416xx/src/spw/dmaaddr0.rs | 10 +- va416xx/src/spw/dmactrl0.rs | 52 +- va416xx/src/spw/dmamaxlen0.rs | 8 +- va416xx/src/spw/dmarxdesc0.rs | 10 +- va416xx/src/spw/dmatxdesc0.rs | 10 +- va416xx/src/spw/sts.rs | 26 +- va416xx/src/spw/tc.rs | 10 +- va416xx/src/spw/tdr.rs | 4 +- va416xx/src/sysconfig.rs | 90 +- va416xx/src/sysconfig/adc_cal.rs | 4 +- va416xx/src/sysconfig/analog_cntl.rs | 34 +- va416xx/src/sysconfig/areg_cal.rs | 4 +- va416xx/src/sysconfig/bg_cal.rs | 4 +- va416xx/src/sysconfig/dac0_cal.rs | 4 +- va416xx/src/sysconfig/dac1_cal.rs | 4 +- va416xx/src/sysconfig/dreg_cal.rs | 4 +- va416xx/src/sysconfig/ebi_cfg0.rs | 18 +- va416xx/src/sysconfig/ef_id0.rs | 4 +- va416xx/src/sysconfig/ef_id1.rs | 4 +- va416xx/src/sysconfig/hbo_cal.rs | 4 +- va416xx/src/sysconfig/irq_enb.rs | 18 +- va416xx/src/sysconfig/peripheral_reset.rs | 64 +- va416xx/src/sysconfig/pmu_ctrl.rs | 8 +- va416xx/src/sysconfig/ram0_mbe.rs | 8 +- va416xx/src/sysconfig/ram0_sbe.rs | 8 +- va416xx/src/sysconfig/refresh_config_h.rs | 10 +- va416xx/src/sysconfig/refresh_config_l.rs | 4 +- va416xx/src/sysconfig/rom_prot.rs | 8 +- va416xx/src/sysconfig/rom_retries.rs | 4 +- va416xx/src/sysconfig/rom_scrub.rs | 9 +- va416xx/src/sysconfig/rst_stat.rs | 16 +- va416xx/src/sysconfig/spw_m4_ctrl.rs | 8 +- va416xx/src/sysconfig/sw_clkdiv10.rs | 4 +- va416xx/src/sysconfig/tim_clk_enable.rs | 8 +- va416xx/src/sysconfig/tim_reset.rs | 4 +- va416xx/src/sysconfig/wakeup_cnt.rs | 6 +- va416xx/src/tim0.rs | 30 +- va416xx/src/tim0/cascade0.rs | 8 +- va416xx/src/tim0/cnt_value.rs | 6 +- va416xx/src/tim0/csd_ctrl.rs | 26 +- va416xx/src/tim0/ctrl.rs | 20 +- va416xx/src/tim0/enable.rs | 8 +- va416xx/src/tim0/pwm_value.rs | 6 +- va416xx/src/tim0/pwma_value.rs | 6 +- va416xx/src/tim0/pwmb_value.rs | 6 +- va416xx/src/tim0/rst_value.rs | 6 +- va416xx/src/trng.rs | 42 +- va416xx/src/trng/autocorr_statistic.rs | 10 +- va416xx/src/trng/bist_cntr0.rs | 4 +- va416xx/src/trng/busy.rs | 4 +- va416xx/src/trng/config.rs | 8 +- va416xx/src/trng/debug_control.rs | 12 +- va416xx/src/trng/ehr_data0.rs | 4 +- va416xx/src/trng/icr.rs | 26 +- va416xx/src/trng/imr.rs | 10 +- va416xx/src/trng/isr.rs | 4 +- va416xx/src/trng/rnd_source_enable.rs | 8 +- va416xx/src/trng/rst_bits_counter.rs | 8 +- va416xx/src/trng/sample_cnt1.rs | 4 +- va416xx/src/trng/sw_reset.rs | 8 +- va416xx/src/trng/valid.rs | 4 +- va416xx/src/uart0.rs | 48 +- va416xx/src/uart0/addr9.rs | 6 +- va416xx/src/uart0/addr9mask.rs | 6 +- va416xx/src/uart0/clkscale.rs | 12 +- va416xx/src/uart0/ctrl.rs | 28 +- va416xx/src/uart0/data.rs | 6 +- va416xx/src/uart0/enable.rs | 10 +- va416xx/src/uart0/fifo_clr.rs | 10 +- va416xx/src/uart0/irq_enb.rs | 20 +- va416xx/src/uart0/rxfifoirqtrg.rs | 6 +- va416xx/src/uart0/rxfifortstrg.rs | 6 +- va416xx/src/uart0/rxstatus.rs | 4 +- va416xx/src/uart0/state.rs | 4 +- va416xx/src/uart0/txbreak.rs | 6 +- va416xx/src/uart0/txfifoirqtrg.rs | 6 +- va416xx/src/uart0/txstatus.rs | 4 +- va416xx/src/utility.rs | 45 +- va416xx/src/utility/ram_trap_addr0.rs | 10 +- va416xx/src/utility/ram_trap_addr1.rs | 10 +- va416xx/src/utility/ram_trap_synd0.rs | 10 +- va416xx/src/utility/ram_trap_synd1.rs | 10 +- va416xx/src/utility/rom_trap_address.rs | 10 +- va416xx/src/utility/rom_trap_synd.rs | 10 +- va416xx/src/utility/synd_check_32_44_data.rs | 4 +- va416xx/src/utility/synd_check_32_44_synd.rs | 4 +- va416xx/src/utility/synd_check_32_52_data.rs | 4 +- va416xx/src/utility/synd_check_32_52_synd.rs | 4 +- va416xx/src/utility/synd_data.rs | 6 +- va416xx/src/utility/synd_enc_32_44.rs | 10 +- va416xx/src/utility/synd_enc_32_52.rs | 4 +- va416xx/src/utility/synd_synd.rs | 8 +- va416xx/src/watch_dog.rs | 51 +- va416xx/src/watch_dog/wdogcontrol.rs | 10 +- va416xx/src/watch_dog/wdogintclr.rs | 8 +- va416xx/src/watch_dog/wdogitcr.rs | 8 +- va416xx/src/watch_dog/wdogitop.rs | 10 +- va416xx/src/watch_dog/wdogload.rs | 4 +- va416xx/src/watch_dog/wdoglock.rs | 8 +- va416xx/src/watch_dog/wdogmis.rs | 4 +- va416xx/src/watch_dog/wdogperiphid3.rs | 4 +- va416xx/src/watch_dog/wdogris.rs | 4 +- 495 files changed, 2156 insertions(+), 6323 deletions(-) rename .cargo/{def-config.toml => config.toml.template} (100%) rename Embed.toml.sample => Embed.toml.template (100%) diff --git a/.cargo/def-config.toml b/.cargo/config.toml.template similarity index 100% rename from .cargo/def-config.toml rename to .cargo/config.toml.template diff --git a/Embed.toml.sample b/Embed.toml.template similarity index 100% rename from Embed.toml.sample rename to Embed.toml.template diff --git a/README.md b/README.md index 120552f..1eea4ca 100644 --- a/README.md +++ b/README.md @@ -40,7 +40,7 @@ Some parts of the HAL implementation and the Embassy-rs support are contained in Use the following command to have a starting `config.toml` file ```sh -cp .cargo/def-config.toml .cargo/config.toml +cp .cargo/config.toml.template .cargo/config.toml ``` You then can adapt the `config.toml` to your needs. For example, you can configure runners diff --git a/va416xx-hal/src/can/asynch.rs b/va416xx-hal/src/can/asynch.rs index 5b22fe2..89cefa7 100644 --- a/va416xx-hal/src/can/asynch.rs +++ b/va416xx-hal/src/can/asynch.rs @@ -102,7 +102,7 @@ pub fn on_interrupt_can( super::regs::CanInterruptId::Buffer(idx) => { let mut channel = unsafe { CanChannelLowLevel::steal_unchecked(id, idx) }; let status = channel.read_state(); - if status.is_err() { + if let Err(e) = status { let mut clr = InterruptClear::new_with_raw_value(0); clr.set_buffer(idx, true); regs.write_iclr(clr); @@ -110,7 +110,7 @@ pub fn on_interrupt_can( val.set_buffer(idx, false); val }); - return Err(InterruptError::InvalidStatus(status.unwrap_err())); + return Err(InterruptError::InvalidStatus(e)); } let buf_state = status.unwrap(); if buf_state == BufferState::TxNotActive { diff --git a/va416xx/CHANGELOG.md b/va416xx/CHANGELOG.md index 1d2df6f..5f9a68b 100644 --- a/va416xx/CHANGELOG.md +++ b/va416xx/CHANGELOG.md @@ -8,6 +8,10 @@ and this project adheres to [Semantic Versioning](http://semver.org/). ## [unreleased] +## [v0.5.0] 2025-09-03 + +- Re-generated PAC with `svd2rust` v0.37.0 + ## [v0.4.1] 2025-07-22 defmt v1 @@ -37,6 +41,7 @@ defmt v1 Clippy is disabled in CI/CD for now. - Initial release -[unreleased]: https://egit.irs.uni-stuttgart.de/rust/va416xx-rs/compare/va416xx-v0.4.1...HEAD +[unreleased]: https://egit.irs.uni-stuttgart.de/rust/va416xx-rs/compare/va416xx-v0.5.0...HEAD +[v0.5.0]: https://egit.irs.uni-stuttgart.de/rust/va416xx-rs/compare/va416xx-v0.4.1...va416xx-v0.5.0 [v0.4.1]: https://egit.irs.uni-stuttgart.de/rust/va416xx-rs/compare/va416xx-v0.4.0...va416xx-v0.4.1 [v0.4.0]: https://egit.irs.uni-stuttgart.de/rust/va416xx-rs/compare/va416xx-v0.3.0...va416xx-v0.4.0 diff --git a/va416xx/Cargo.toml b/va416xx/Cargo.toml index d40664e..e446d2a 100644 --- a/va416xx/Cargo.toml +++ b/va416xx/Cargo.toml @@ -1,6 +1,6 @@ [package] name = "va416xx" -version = "0.4.1" +version = "0.5.0" authors = ["Robin Mueller "] edition = "2021" description = "PAC for the Vorago VA416xx family of MCUs" diff --git a/va416xx/src/adc.rs b/va416xx/src/adc.rs index 336ebfd..f61d7b7 100644 --- a/va416xx/src/adc.rs +++ b/va416xx/src/adc.rs @@ -65,62 +65,52 @@ impl RegisterBlock { &self.perid } } -#[doc = "CTRL (rw) register accessor: Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`] -module"] +#[doc = "CTRL (rw) register accessor: Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`] module"] #[doc(alias = "CTRL")] pub type Ctrl = crate::Reg; #[doc = "Control Register"] pub mod ctrl; -#[doc = "FIFO_DATA (r) register accessor: FIFO data\n\nYou can [`read`](crate::Reg::read) this register and get [`fifo_data::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fifo_data`] -module"] +#[doc = "FIFO_DATA (r) register accessor: FIFO data\n\nYou can [`read`](crate::Reg::read) this register and get [`fifo_data::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fifo_data`] module"] #[doc(alias = "FIFO_DATA")] pub type FifoData = crate::Reg; #[doc = "FIFO data"] pub mod fifo_data; -#[doc = "STATUS (r) register accessor: Status\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] -module"] +#[doc = "STATUS (r) register accessor: Status\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] module"] #[doc(alias = "STATUS")] pub type Status = crate::Reg; #[doc = "Status"] pub mod status; -#[doc = "IRQ_ENB (rw) register accessor: Interrupt Enable\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_enb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`irq_enb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_enb`] -module"] +#[doc = "IRQ_ENB (rw) register accessor: Interrupt Enable\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_enb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`irq_enb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_enb`] module"] #[doc(alias = "IRQ_ENB")] pub type IrqEnb = crate::Reg; #[doc = "Interrupt Enable"] pub mod irq_enb; -#[doc = "IRQ_RAW (r) register accessor: Raw Interrupt Status\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_raw::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_raw`] -module"] +#[doc = "IRQ_RAW (r) register accessor: Raw Interrupt Status\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_raw::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_raw`] module"] #[doc(alias = "IRQ_RAW")] pub type IrqRaw = crate::Reg; #[doc = "Raw Interrupt Status"] pub mod irq_raw; -#[doc = "IRQ_END (r) register accessor: Enabled Interrupt Status\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_end::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_end`] -module"] +#[doc = "IRQ_END (r) register accessor: Enabled Interrupt Status\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_end::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_end`] module"] #[doc(alias = "IRQ_END")] pub type IrqEnd = crate::Reg; #[doc = "Enabled Interrupt Status"] pub mod irq_end; -#[doc = "IRQ_CLR (w) register accessor: Clear Interrupt\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`irq_clr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_clr`] -module"] +#[doc = "IRQ_CLR (w) register accessor: Clear Interrupt\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`irq_clr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_clr`] module"] #[doc(alias = "IRQ_CLR")] pub type IrqClr = crate::Reg; #[doc = "Clear Interrupt"] pub mod irq_clr; -#[doc = "RXFIFOIRQTRG (rw) register accessor: Receive FIFO Interrupt Trigger Value\n\nYou can [`read`](crate::Reg::read) this register and get [`rxfifoirqtrg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rxfifoirqtrg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxfifoirqtrg`] -module"] +#[doc = "RXFIFOIRQTRG (rw) register accessor: Receive FIFO Interrupt Trigger Value\n\nYou can [`read`](crate::Reg::read) this register and get [`rxfifoirqtrg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rxfifoirqtrg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxfifoirqtrg`] module"] #[doc(alias = "RXFIFOIRQTRG")] pub type Rxfifoirqtrg = crate::Reg; #[doc = "Receive FIFO Interrupt Trigger Value"] pub mod rxfifoirqtrg; -#[doc = "FIFO_CLR (rw) register accessor: FIFO Clear\n\nYou can [`read`](crate::Reg::read) this register and get [`fifo_clr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fifo_clr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fifo_clr`] -module"] +#[doc = "FIFO_CLR (rw) register accessor: FIFO Clear\n\nYou can [`read`](crate::Reg::read) this register and get [`fifo_clr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fifo_clr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fifo_clr`] module"] #[doc(alias = "FIFO_CLR")] pub type FifoClr = crate::Reg; #[doc = "FIFO Clear"] pub mod fifo_clr; -#[doc = "PERID (r) register accessor: Peripheral ID Register\n\nYou can [`read`](crate::Reg::read) this register and get [`perid::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@perid`] -module"] +#[doc = "PERID (r) register accessor: Peripheral ID Register\n\nYou can [`read`](crate::Reg::read) this register and get [`perid::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@perid`] module"] #[doc(alias = "PERID")] pub type Perid = crate::Reg; #[doc = "Peripheral ID Register"] diff --git a/va416xx/src/adc/ctrl.rs b/va416xx/src/adc/ctrl.rs index 4afc978..3256cfa 100644 --- a/va416xx/src/adc/ctrl.rs +++ b/va416xx/src/adc/ctrl.rs @@ -61,32 +61,32 @@ impl R { impl W { #[doc = "Bits 0:15 - Enables the channel for data collection"] #[inline(always)] - pub fn chan_en(&mut self) -> ChanEnW { + pub fn chan_en(&mut self) -> ChanEnW<'_, CtrlSpec> { ChanEnW::new(self, 0) } #[doc = "Bit 16 - Enables the channel tag to be saved with the ADC data"] #[inline(always)] - pub fn chan_tag_en(&mut self) -> ChanTagEnW { + pub fn chan_tag_en(&mut self) -> ChanTagEnW<'_, CtrlSpec> { ChanTagEnW::new(self, 16) } #[doc = "Bit 17 - ADC data acquisition for all enabled channel"] #[inline(always)] - pub fn sweep_en(&mut self) -> SweepEnW { + pub fn sweep_en(&mut self) -> SweepEnW<'_, CtrlSpec> { SweepEnW::new(self, 17) } #[doc = "Bit 18 - Allows the external trigger to start analog acquisition"] #[inline(always)] - pub fn ext_trig_en(&mut self) -> ExtTrigEnW { + pub fn ext_trig_en(&mut self) -> ExtTrigEnW<'_, CtrlSpec> { ExtTrigEnW::new(self, 18) } #[doc = "Bit 19 - Starts analog acquisition"] #[inline(always)] - pub fn manual_trig(&mut self) -> ManualTrigW { + pub fn manual_trig(&mut self) -> ManualTrigW<'_, CtrlSpec> { ManualTrigW::new(self, 19) } #[doc = "Bits 20:23 - Conversion count describes the number of conversions to be applied for triggers/sweeps. (N+1 conversions)"] #[inline(always)] - pub fn conv_cnt(&mut self) -> ConvCntW { + pub fn conv_cnt(&mut self) -> ConvCntW<'_, CtrlSpec> { ConvCntW::new(self, 20) } } @@ -100,10 +100,6 @@ impl crate::Readable for CtrlSpec {} #[doc = "`write(|w| ..)` method takes [`ctrl::W`](W) writer structure"] impl crate::Writable for CtrlSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTRL to value 0"] -impl crate::Resettable for CtrlSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for CtrlSpec {} diff --git a/va416xx/src/adc/fifo_clr.rs b/va416xx/src/adc/fifo_clr.rs index 8a9ce45..d1a491b 100644 --- a/va416xx/src/adc/fifo_clr.rs +++ b/va416xx/src/adc/fifo_clr.rs @@ -7,7 +7,7 @@ pub type FifoClrW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Clears the ADC FIFO. Always reads 0"] #[inline(always)] - pub fn fifo_clr(&mut self) -> FifoClrW { + pub fn fifo_clr(&mut self) -> FifoClrW<'_, FifoClrSpec> { FifoClrW::new(self, 0) } } @@ -21,10 +21,6 @@ impl crate::Readable for FifoClrSpec {} #[doc = "`write(|w| ..)` method takes [`fifo_clr::W`](W) writer structure"] impl crate::Writable for FifoClrSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets FIFO_CLR to value 0"] -impl crate::Resettable for FifoClrSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for FifoClrSpec {} diff --git a/va416xx/src/adc/fifo_data.rs b/va416xx/src/adc/fifo_data.rs index 535aa03..70f03fa 100644 --- a/va416xx/src/adc/fifo_data.rs +++ b/va416xx/src/adc/fifo_data.rs @@ -24,6 +24,4 @@ impl crate::RegisterSpec for FifoDataSpec { #[doc = "`read()` method returns [`fifo_data::R`](R) reader structure"] impl crate::Readable for FifoDataSpec {} #[doc = "`reset()` method sets FIFO_DATA to value 0"] -impl crate::Resettable for FifoDataSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for FifoDataSpec {} diff --git a/va416xx/src/adc/irq_clr.rs b/va416xx/src/adc/irq_clr.rs index 0f4566e..ba79a17 100644 --- a/va416xx/src/adc/irq_clr.rs +++ b/va416xx/src/adc/irq_clr.rs @@ -11,22 +11,22 @@ pub type TrigErrorW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Clears the FIFO overflow interrupt status. Always reads 0"] #[inline(always)] - pub fn fifo_oflow(&mut self) -> FifoOflowW { + pub fn fifo_oflow(&mut self) -> FifoOflowW<'_, IrqClrSpec> { FifoOflowW::new(self, 0) } #[doc = "Bit 1 - Clears the FIFO underflow interrupt status. Always reads 0"] #[inline(always)] - pub fn fifo_uflow(&mut self) -> FifoUflowW { + pub fn fifo_uflow(&mut self) -> FifoUflowW<'_, IrqClrSpec> { FifoUflowW::new(self, 1) } #[doc = "Bit 2 - Clears the ADC done interrupt status. Always reads 0"] #[inline(always)] - pub fn adc_done(&mut self) -> AdcDoneW { + pub fn adc_done(&mut self) -> AdcDoneW<'_, IrqClrSpec> { AdcDoneW::new(self, 2) } #[doc = "Bit 3 - Clears the trigger error interrupt status. Always reads 0"] #[inline(always)] - pub fn trig_error(&mut self) -> TrigErrorW { + pub fn trig_error(&mut self) -> TrigErrorW<'_, IrqClrSpec> { TrigErrorW::new(self, 3) } } @@ -38,10 +38,6 @@ impl crate::RegisterSpec for IrqClrSpec { #[doc = "`write(|w| ..)` method takes [`irq_clr::W`](W) writer structure"] impl crate::Writable for IrqClrSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IRQ_CLR to value 0"] -impl crate::Resettable for IrqClrSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for IrqClrSpec {} diff --git a/va416xx/src/adc/irq_enb.rs b/va416xx/src/adc/irq_enb.rs index 7fc0392..f41514d 100644 --- a/va416xx/src/adc/irq_enb.rs +++ b/va416xx/src/adc/irq_enb.rs @@ -70,37 +70,37 @@ impl R { impl W { #[doc = "Bit 0 - Enables the interrupt for FIFO empty"] #[inline(always)] - pub fn fifo_empty(&mut self) -> FifoEmptyW { + pub fn fifo_empty(&mut self) -> FifoEmptyW<'_, IrqEnbSpec> { FifoEmptyW::new(self, 0) } #[doc = "Bit 1 - Enables the interrupt for FIFO full"] #[inline(always)] - pub fn fifo_full(&mut self) -> FifoFullW { + pub fn fifo_full(&mut self) -> FifoFullW<'_, IrqEnbSpec> { FifoFullW::new(self, 1) } #[doc = "Bit 2 - Enables the interrupt for a FIFO overflow"] #[inline(always)] - pub fn fifo_oflow(&mut self) -> FifoOflowW { + pub fn fifo_oflow(&mut self) -> FifoOflowW<'_, IrqEnbSpec> { FifoOflowW::new(self, 2) } #[doc = "Bit 3 - Enables the interrupt for a FIFO underflow"] #[inline(always)] - pub fn fifo_uflow(&mut self) -> FifoUflowW { + pub fn fifo_uflow(&mut self) -> FifoUflowW<'_, IrqEnbSpec> { FifoUflowW::new(self, 3) } #[doc = "Bit 4 - Enables the interrupt for an ADC data acquisition completion"] #[inline(always)] - pub fn adc_done(&mut self) -> AdcDoneW { + pub fn adc_done(&mut self) -> AdcDoneW<'_, IrqEnbSpec> { AdcDoneW::new(self, 4) } #[doc = "Bit 5 - Enables the interrupt for a trigger error"] #[inline(always)] - pub fn trig_error(&mut self) -> TrigErrorW { + pub fn trig_error(&mut self) -> TrigErrorW<'_, IrqEnbSpec> { TrigErrorW::new(self, 5) } #[doc = "Bit 6 - Enables the interrupt for the FIFO entry count meets or exceeds the trigger level"] #[inline(always)] - pub fn fifo_depth_trig(&mut self) -> FifoDepthTrigW { + pub fn fifo_depth_trig(&mut self) -> FifoDepthTrigW<'_, IrqEnbSpec> { FifoDepthTrigW::new(self, 6) } } @@ -114,10 +114,6 @@ impl crate::Readable for IrqEnbSpec {} #[doc = "`write(|w| ..)` method takes [`irq_enb::W`](W) writer structure"] impl crate::Writable for IrqEnbSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IRQ_ENB to value 0"] -impl crate::Resettable for IrqEnbSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for IrqEnbSpec {} diff --git a/va416xx/src/adc/irq_end.rs b/va416xx/src/adc/irq_end.rs index 10bc56d..54974cc 100644 --- a/va416xx/src/adc/irq_end.rs +++ b/va416xx/src/adc/irq_end.rs @@ -59,6 +59,4 @@ impl crate::RegisterSpec for IrqEndSpec { #[doc = "`read()` method returns [`irq_end::R`](R) reader structure"] impl crate::Readable for IrqEndSpec {} #[doc = "`reset()` method sets IRQ_END to value 0"] -impl crate::Resettable for IrqEndSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for IrqEndSpec {} diff --git a/va416xx/src/adc/rxfifoirqtrg.rs b/va416xx/src/adc/rxfifoirqtrg.rs index 7c31f2b..2fc9b76 100644 --- a/va416xx/src/adc/rxfifoirqtrg.rs +++ b/va416xx/src/adc/rxfifoirqtrg.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:4 - Sets the FIFO_ENTRY_CNT value that asserts the FIFO_DEPTH_TRIG interrupt"] #[inline(always)] - pub fn level(&mut self) -> LevelW { + pub fn level(&mut self) -> LevelW<'_, RxfifoirqtrgSpec> { LevelW::new(self, 0) } } @@ -30,8 +30,6 @@ impl crate::Readable for RxfifoirqtrgSpec {} #[doc = "`write(|w| ..)` method takes [`rxfifoirqtrg::W`](W) writer structure"] impl crate::Writable for RxfifoirqtrgSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RXFIFOIRQTRG to value 0x10"] impl crate::Resettable for RxfifoirqtrgSpec { diff --git a/va416xx/src/adc/status.rs b/va416xx/src/adc/status.rs index 32aef36..a5a3384 100644 --- a/va416xx/src/adc/status.rs +++ b/va416xx/src/adc/status.rs @@ -24,6 +24,4 @@ impl crate::RegisterSpec for StatusSpec { #[doc = "`read()` method returns [`status::R`](R) reader structure"] impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0"] -impl crate::Resettable for StatusSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for StatusSpec {} diff --git a/va416xx/src/can0.rs b/va416xx/src/can0.rs index f33b2fa..46cda5e 100644 --- a/va416xx/src/can0.rs +++ b/va416xx/src/can0.rs @@ -856,854 +856,712 @@ impl RegisterBlock { &self.ctmr } } -#[doc = "CNSTAT_CMB0 (rw) register accessor: Buffer Status / Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cnstat_cmb0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnstat_cmb0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnstat_cmb0`] -module"] +#[doc = "CNSTAT_CMB0 (rw) register accessor: Buffer Status / Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cnstat_cmb0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnstat_cmb0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnstat_cmb0`] module"] #[doc(alias = "CNSTAT_CMB0")] pub type CnstatCmb0 = crate::Reg; #[doc = "Buffer Status / Control Register"] pub mod cnstat_cmb0; -#[doc = "TSTP_CMB0 (rw) register accessor: CAN Frame Timestamp\n\nYou can [`read`](crate::Reg::read) this register and get [`tstp_cmb0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tstp_cmb0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstp_cmb0`] -module"] +#[doc = "TSTP_CMB0 (rw) register accessor: CAN Frame Timestamp\n\nYou can [`read`](crate::Reg::read) this register and get [`tstp_cmb0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tstp_cmb0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstp_cmb0`] module"] #[doc(alias = "TSTP_CMB0")] pub type TstpCmb0 = crate::Reg; #[doc = "CAN Frame Timestamp"] pub mod tstp_cmb0; -#[doc = "DATA3_CMB0 (rw) register accessor: CAN Frame Data Word 3\n\nYou can [`read`](crate::Reg::read) this register and get [`data3_cmb0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data3_cmb0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data3_cmb0`] -module"] +#[doc = "DATA3_CMB0 (rw) register accessor: CAN Frame Data Word 3\n\nYou can [`read`](crate::Reg::read) this register and get [`data3_cmb0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data3_cmb0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data3_cmb0`] module"] #[doc(alias = "DATA3_CMB0")] pub type Data3Cmb0 = crate::Reg; #[doc = "CAN Frame Data Word 3"] pub mod data3_cmb0; -#[doc = "DATA2_CMB0 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data2_cmb0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data2_cmb0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data2_cmb0`] -module"] +#[doc = "DATA2_CMB0 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data2_cmb0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data2_cmb0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data2_cmb0`] module"] #[doc(alias = "DATA2_CMB0")] pub type Data2Cmb0 = crate::Reg; #[doc = "CAN Frame Data Word 2"] pub mod data2_cmb0; -#[doc = "DATA1_CMB0 (rw) register accessor: CAN Frame Data Word 1\n\nYou can [`read`](crate::Reg::read) this register and get [`data1_cmb0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data1_cmb0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data1_cmb0`] -module"] +#[doc = "DATA1_CMB0 (rw) register accessor: CAN Frame Data Word 1\n\nYou can [`read`](crate::Reg::read) this register and get [`data1_cmb0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data1_cmb0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data1_cmb0`] module"] #[doc(alias = "DATA1_CMB0")] pub type Data1Cmb0 = crate::Reg; #[doc = "CAN Frame Data Word 1"] pub mod data1_cmb0; -#[doc = "DATA0_CMB0 (rw) register accessor: CAN Frame Data Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`data0_cmb0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data0_cmb0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data0_cmb0`] -module"] +#[doc = "DATA0_CMB0 (rw) register accessor: CAN Frame Data Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`data0_cmb0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data0_cmb0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data0_cmb0`] module"] #[doc(alias = "DATA0_CMB0")] pub type Data0Cmb0 = crate::Reg; #[doc = "CAN Frame Data Word 0"] pub mod data0_cmb0; -#[doc = "ID0_CMB0 (rw) register accessor: CAN Frame Identifier Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`id0_cmb0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id0_cmb0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id0_cmb0`] -module"] +#[doc = "ID0_CMB0 (rw) register accessor: CAN Frame Identifier Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`id0_cmb0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id0_cmb0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id0_cmb0`] module"] #[doc(alias = "ID0_CMB0")] pub type Id0Cmb0 = crate::Reg; #[doc = "CAN Frame Identifier Word 0"] pub mod id0_cmb0; -#[doc = "ID1_CMB0 (rw) register accessor: CAN Frame Identifier Word 1\n\nYou can [`read`](crate::Reg::read) this register and get [`id1_cmb0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id1_cmb0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id1_cmb0`] -module"] +#[doc = "ID1_CMB0 (rw) register accessor: CAN Frame Identifier Word 1\n\nYou can [`read`](crate::Reg::read) this register and get [`id1_cmb0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id1_cmb0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id1_cmb0`] module"] #[doc(alias = "ID1_CMB0")] pub type Id1Cmb0 = crate::Reg; #[doc = "CAN Frame Identifier Word 1"] pub mod id1_cmb0; -#[doc = "CNSTAT_CMB1 (rw) register accessor: Buffer Status / Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cnstat_cmb1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnstat_cmb1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnstat_cmb1`] -module"] +#[doc = "CNSTAT_CMB1 (rw) register accessor: Buffer Status / Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cnstat_cmb1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnstat_cmb1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnstat_cmb1`] module"] #[doc(alias = "CNSTAT_CMB1")] pub type CnstatCmb1 = crate::Reg; #[doc = "Buffer Status / Control Register"] pub mod cnstat_cmb1; -#[doc = "TSTP_CMB1 (rw) register accessor: CAN Frame Timestamp\n\nYou can [`read`](crate::Reg::read) this register and get [`tstp_cmb1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tstp_cmb1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstp_cmb1`] -module"] +#[doc = "TSTP_CMB1 (rw) register accessor: CAN Frame Timestamp\n\nYou can [`read`](crate::Reg::read) this register and get [`tstp_cmb1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tstp_cmb1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstp_cmb1`] module"] #[doc(alias = "TSTP_CMB1")] pub type TstpCmb1 = crate::Reg; #[doc = "CAN Frame Timestamp"] pub mod tstp_cmb1; -#[doc = "DATA3_CMB1 (rw) register accessor: CAN Frame Data Word 3\n\nYou can [`read`](crate::Reg::read) this register and get [`data3_cmb1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data3_cmb1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data3_cmb1`] -module"] +#[doc = "DATA3_CMB1 (rw) register accessor: CAN Frame Data Word 3\n\nYou can [`read`](crate::Reg::read) this register and get [`data3_cmb1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data3_cmb1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data3_cmb1`] module"] #[doc(alias = "DATA3_CMB1")] pub type Data3Cmb1 = crate::Reg; #[doc = "CAN Frame Data Word 3"] pub mod data3_cmb1; -#[doc = "DATA2_CMB1 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data2_cmb1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data2_cmb1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data2_cmb1`] -module"] +#[doc = "DATA2_CMB1 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data2_cmb1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data2_cmb1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data2_cmb1`] module"] #[doc(alias = "DATA2_CMB1")] pub type Data2Cmb1 = crate::Reg; #[doc = "CAN Frame Data Word 2"] pub mod data2_cmb1; -#[doc = "DATA1_CMB1 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data1_cmb1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data1_cmb1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data1_cmb1`] -module"] +#[doc = "DATA1_CMB1 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data1_cmb1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data1_cmb1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data1_cmb1`] module"] #[doc(alias = "DATA1_CMB1")] pub type Data1Cmb1 = crate::Reg; #[doc = "CAN Frame Data Word 2"] pub mod data1_cmb1; -#[doc = "DATA0_CMB1 (rw) register accessor: CAN Frame Data Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`data0_cmb1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data0_cmb1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data0_cmb1`] -module"] +#[doc = "DATA0_CMB1 (rw) register accessor: CAN Frame Data Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`data0_cmb1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data0_cmb1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data0_cmb1`] module"] #[doc(alias = "DATA0_CMB1")] pub type Data0Cmb1 = crate::Reg; #[doc = "CAN Frame Data Word 0"] pub mod data0_cmb1; -#[doc = "ID0_CMB1 (rw) register accessor: CAN Frame Identifier Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`id0_cmb1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id0_cmb1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id0_cmb1`] -module"] +#[doc = "ID0_CMB1 (rw) register accessor: CAN Frame Identifier Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`id0_cmb1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id0_cmb1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id0_cmb1`] module"] #[doc(alias = "ID0_CMB1")] pub type Id0Cmb1 = crate::Reg; #[doc = "CAN Frame Identifier Word 0"] pub mod id0_cmb1; -#[doc = "ID1_CMB1 (rw) register accessor: CAN Frame Identifier Word 1\n\nYou can [`read`](crate::Reg::read) this register and get [`id1_cmb1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id1_cmb1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id1_cmb1`] -module"] +#[doc = "ID1_CMB1 (rw) register accessor: CAN Frame Identifier Word 1\n\nYou can [`read`](crate::Reg::read) this register and get [`id1_cmb1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id1_cmb1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id1_cmb1`] module"] #[doc(alias = "ID1_CMB1")] pub type Id1Cmb1 = crate::Reg; #[doc = "CAN Frame Identifier Word 1"] pub mod id1_cmb1; -#[doc = "CNSTAT_CMB2 (rw) register accessor: Buffer Status / Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cnstat_cmb2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnstat_cmb2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnstat_cmb2`] -module"] +#[doc = "CNSTAT_CMB2 (rw) register accessor: Buffer Status / Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cnstat_cmb2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnstat_cmb2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnstat_cmb2`] module"] #[doc(alias = "CNSTAT_CMB2")] pub type CnstatCmb2 = crate::Reg; #[doc = "Buffer Status / Control Register"] pub mod cnstat_cmb2; -#[doc = "TSTP_CMB2 (rw) register accessor: CAN Frame Timestamp\n\nYou can [`read`](crate::Reg::read) this register and get [`tstp_cmb2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tstp_cmb2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstp_cmb2`] -module"] +#[doc = "TSTP_CMB2 (rw) register accessor: CAN Frame Timestamp\n\nYou can [`read`](crate::Reg::read) this register and get [`tstp_cmb2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tstp_cmb2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstp_cmb2`] module"] #[doc(alias = "TSTP_CMB2")] pub type TstpCmb2 = crate::Reg; #[doc = "CAN Frame Timestamp"] pub mod tstp_cmb2; -#[doc = "DATA3_CMB2 (rw) register accessor: CAN Frame Data Word 3\n\nYou can [`read`](crate::Reg::read) this register and get [`data3_cmb2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data3_cmb2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data3_cmb2`] -module"] +#[doc = "DATA3_CMB2 (rw) register accessor: CAN Frame Data Word 3\n\nYou can [`read`](crate::Reg::read) this register and get [`data3_cmb2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data3_cmb2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data3_cmb2`] module"] #[doc(alias = "DATA3_CMB2")] pub type Data3Cmb2 = crate::Reg; #[doc = "CAN Frame Data Word 3"] pub mod data3_cmb2; -#[doc = "DATA2_CMB2 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data2_cmb2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data2_cmb2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data2_cmb2`] -module"] +#[doc = "DATA2_CMB2 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data2_cmb2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data2_cmb2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data2_cmb2`] module"] #[doc(alias = "DATA2_CMB2")] pub type Data2Cmb2 = crate::Reg; #[doc = "CAN Frame Data Word 2"] pub mod data2_cmb2; -#[doc = "DATA1_CMB2 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data1_cmb2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data1_cmb2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data1_cmb2`] -module"] +#[doc = "DATA1_CMB2 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data1_cmb2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data1_cmb2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data1_cmb2`] module"] #[doc(alias = "DATA1_CMB2")] pub type Data1Cmb2 = crate::Reg; #[doc = "CAN Frame Data Word 2"] pub mod data1_cmb2; -#[doc = "DATA0_CMB2 (rw) register accessor: CAN Frame Data Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`data0_cmb2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data0_cmb2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data0_cmb2`] -module"] +#[doc = "DATA0_CMB2 (rw) register accessor: CAN Frame Data Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`data0_cmb2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data0_cmb2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data0_cmb2`] module"] #[doc(alias = "DATA0_CMB2")] pub type Data0Cmb2 = crate::Reg; #[doc = "CAN Frame Data Word 0"] pub mod data0_cmb2; -#[doc = "ID0_CMB2 (rw) register accessor: CAN Frame Identifier Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`id0_cmb2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id0_cmb2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id0_cmb2`] -module"] +#[doc = "ID0_CMB2 (rw) register accessor: CAN Frame Identifier Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`id0_cmb2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id0_cmb2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id0_cmb2`] module"] #[doc(alias = "ID0_CMB2")] pub type Id0Cmb2 = crate::Reg; #[doc = "CAN Frame Identifier Word 0"] pub mod id0_cmb2; -#[doc = "ID1_CMB2 (rw) register accessor: CAN Frame Identifier Word 1\n\nYou can [`read`](crate::Reg::read) this register and get [`id1_cmb2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id1_cmb2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id1_cmb2`] -module"] +#[doc = "ID1_CMB2 (rw) register accessor: CAN Frame Identifier Word 1\n\nYou can [`read`](crate::Reg::read) this register and get [`id1_cmb2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id1_cmb2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id1_cmb2`] module"] #[doc(alias = "ID1_CMB2")] pub type Id1Cmb2 = crate::Reg; #[doc = "CAN Frame Identifier Word 1"] pub mod id1_cmb2; -#[doc = "CNSTAT_CMB3 (rw) register accessor: Buffer Status / Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cnstat_cmb3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnstat_cmb3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnstat_cmb3`] -module"] +#[doc = "CNSTAT_CMB3 (rw) register accessor: Buffer Status / Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cnstat_cmb3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnstat_cmb3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnstat_cmb3`] module"] #[doc(alias = "CNSTAT_CMB3")] pub type CnstatCmb3 = crate::Reg; #[doc = "Buffer Status / Control Register"] pub mod cnstat_cmb3; -#[doc = "TSTP_CMB3 (rw) register accessor: CAN Frame Timestamp\n\nYou can [`read`](crate::Reg::read) this register and get [`tstp_cmb3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tstp_cmb3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstp_cmb3`] -module"] +#[doc = "TSTP_CMB3 (rw) register accessor: CAN Frame Timestamp\n\nYou can [`read`](crate::Reg::read) this register and get [`tstp_cmb3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tstp_cmb3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstp_cmb3`] module"] #[doc(alias = "TSTP_CMB3")] pub type TstpCmb3 = crate::Reg; #[doc = "CAN Frame Timestamp"] pub mod tstp_cmb3; -#[doc = "DATA3_CMB3 (rw) register accessor: CAN Frame Data Word 3\n\nYou can [`read`](crate::Reg::read) this register and get [`data3_cmb3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data3_cmb3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data3_cmb3`] -module"] +#[doc = "DATA3_CMB3 (rw) register accessor: CAN Frame Data Word 3\n\nYou can [`read`](crate::Reg::read) this register and get [`data3_cmb3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data3_cmb3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data3_cmb3`] module"] #[doc(alias = "DATA3_CMB3")] pub type Data3Cmb3 = crate::Reg; #[doc = "CAN Frame Data Word 3"] pub mod data3_cmb3; -#[doc = "DATA2_CMB3 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data2_cmb3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data2_cmb3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data2_cmb3`] -module"] +#[doc = "DATA2_CMB3 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data2_cmb3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data2_cmb3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data2_cmb3`] module"] #[doc(alias = "DATA2_CMB3")] pub type Data2Cmb3 = crate::Reg; #[doc = "CAN Frame Data Word 2"] pub mod data2_cmb3; -#[doc = "DATA1_CMB3 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data1_cmb3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data1_cmb3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data1_cmb3`] -module"] +#[doc = "DATA1_CMB3 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data1_cmb3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data1_cmb3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data1_cmb3`] module"] #[doc(alias = "DATA1_CMB3")] pub type Data1Cmb3 = crate::Reg; #[doc = "CAN Frame Data Word 2"] pub mod data1_cmb3; -#[doc = "DATA0_CMB3 (rw) register accessor: CAN Frame Data Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`data0_cmb3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data0_cmb3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data0_cmb3`] -module"] +#[doc = "DATA0_CMB3 (rw) register accessor: CAN Frame Data Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`data0_cmb3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data0_cmb3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data0_cmb3`] module"] #[doc(alias = "DATA0_CMB3")] pub type Data0Cmb3 = crate::Reg; #[doc = "CAN Frame Data Word 0"] pub mod data0_cmb3; -#[doc = "ID0_CMB3 (rw) register accessor: CAN Frame Identifier Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`id0_cmb3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id0_cmb3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id0_cmb3`] -module"] +#[doc = "ID0_CMB3 (rw) register accessor: CAN Frame Identifier Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`id0_cmb3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id0_cmb3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id0_cmb3`] module"] #[doc(alias = "ID0_CMB3")] pub type Id0Cmb3 = crate::Reg; #[doc = "CAN Frame Identifier Word 0"] pub mod id0_cmb3; -#[doc = "ID1_CMB3 (rw) register accessor: CAN Frame Identifier Word 1\n\nYou can [`read`](crate::Reg::read) this register and get [`id1_cmb3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id1_cmb3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id1_cmb3`] -module"] +#[doc = "ID1_CMB3 (rw) register accessor: CAN Frame Identifier Word 1\n\nYou can [`read`](crate::Reg::read) this register and get [`id1_cmb3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id1_cmb3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id1_cmb3`] module"] #[doc(alias = "ID1_CMB3")] pub type Id1Cmb3 = crate::Reg; #[doc = "CAN Frame Identifier Word 1"] pub mod id1_cmb3; -#[doc = "CNSTAT_CMB4 (rw) register accessor: Buffer Status / Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cnstat_cmb4::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnstat_cmb4::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnstat_cmb4`] -module"] +#[doc = "CNSTAT_CMB4 (rw) register accessor: Buffer Status / Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cnstat_cmb4::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnstat_cmb4::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnstat_cmb4`] module"] #[doc(alias = "CNSTAT_CMB4")] pub type CnstatCmb4 = crate::Reg; #[doc = "Buffer Status / Control Register"] pub mod cnstat_cmb4; -#[doc = "TSTP_CMB4 (rw) register accessor: CAN Frame Timestamp\n\nYou can [`read`](crate::Reg::read) this register and get [`tstp_cmb4::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tstp_cmb4::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstp_cmb4`] -module"] +#[doc = "TSTP_CMB4 (rw) register accessor: CAN Frame Timestamp\n\nYou can [`read`](crate::Reg::read) this register and get [`tstp_cmb4::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tstp_cmb4::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstp_cmb4`] module"] #[doc(alias = "TSTP_CMB4")] pub type TstpCmb4 = crate::Reg; #[doc = "CAN Frame Timestamp"] pub mod tstp_cmb4; -#[doc = "DATA3_CMB4 (rw) register accessor: CAN Frame Data Word 3\n\nYou can [`read`](crate::Reg::read) this register and get [`data3_cmb4::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data3_cmb4::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data3_cmb4`] -module"] +#[doc = "DATA3_CMB4 (rw) register accessor: CAN Frame Data Word 3\n\nYou can [`read`](crate::Reg::read) this register and get [`data3_cmb4::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data3_cmb4::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data3_cmb4`] module"] #[doc(alias = "DATA3_CMB4")] pub type Data3Cmb4 = crate::Reg; #[doc = "CAN Frame Data Word 3"] pub mod data3_cmb4; -#[doc = "DATA2_CMB4 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data2_cmb4::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data2_cmb4::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data2_cmb4`] -module"] +#[doc = "DATA2_CMB4 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data2_cmb4::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data2_cmb4::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data2_cmb4`] module"] #[doc(alias = "DATA2_CMB4")] pub type Data2Cmb4 = crate::Reg; #[doc = "CAN Frame Data Word 2"] pub mod data2_cmb4; -#[doc = "DATA1_CMB4 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data1_cmb4::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data1_cmb4::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data1_cmb4`] -module"] +#[doc = "DATA1_CMB4 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data1_cmb4::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data1_cmb4::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data1_cmb4`] module"] #[doc(alias = "DATA1_CMB4")] pub type Data1Cmb4 = crate::Reg; #[doc = "CAN Frame Data Word 2"] pub mod data1_cmb4; -#[doc = "DATA0_CMB4 (rw) register accessor: CAN Frame Data Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`data0_cmb4::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data0_cmb4::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data0_cmb4`] -module"] +#[doc = "DATA0_CMB4 (rw) register accessor: CAN Frame Data Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`data0_cmb4::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data0_cmb4::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data0_cmb4`] module"] #[doc(alias = "DATA0_CMB4")] pub type Data0Cmb4 = crate::Reg; #[doc = "CAN Frame Data Word 0"] pub mod data0_cmb4; -#[doc = "ID0_CMB4 (rw) register accessor: CAN Frame Identifier Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`id0_cmb4::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id0_cmb4::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id0_cmb4`] -module"] +#[doc = "ID0_CMB4 (rw) register accessor: CAN Frame Identifier Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`id0_cmb4::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id0_cmb4::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id0_cmb4`] module"] #[doc(alias = "ID0_CMB4")] pub type Id0Cmb4 = crate::Reg; #[doc = "CAN Frame Identifier Word 0"] pub mod id0_cmb4; -#[doc = "ID1_CMB4 (rw) register accessor: CAN Frame Identifier Word 1\n\nYou can [`read`](crate::Reg::read) this register and get [`id1_cmb4::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id1_cmb4::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id1_cmb4`] -module"] +#[doc = "ID1_CMB4 (rw) register accessor: CAN Frame Identifier Word 1\n\nYou can [`read`](crate::Reg::read) this register and get [`id1_cmb4::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id1_cmb4::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id1_cmb4`] module"] #[doc(alias = "ID1_CMB4")] pub type Id1Cmb4 = crate::Reg; #[doc = "CAN Frame Identifier Word 1"] pub mod id1_cmb4; -#[doc = "CNSTAT_CMB5 (rw) register accessor: Buffer Status / Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cnstat_cmb5::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnstat_cmb5::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnstat_cmb5`] -module"] +#[doc = "CNSTAT_CMB5 (rw) register accessor: Buffer Status / Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cnstat_cmb5::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnstat_cmb5::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnstat_cmb5`] module"] #[doc(alias = "CNSTAT_CMB5")] pub type CnstatCmb5 = crate::Reg; #[doc = "Buffer Status / Control Register"] pub mod cnstat_cmb5; -#[doc = "TSTP_CMB5 (rw) register accessor: CAN Frame Timestamp\n\nYou can [`read`](crate::Reg::read) this register and get [`tstp_cmb5::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tstp_cmb5::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstp_cmb5`] -module"] +#[doc = "TSTP_CMB5 (rw) register accessor: CAN Frame Timestamp\n\nYou can [`read`](crate::Reg::read) this register and get [`tstp_cmb5::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tstp_cmb5::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstp_cmb5`] module"] #[doc(alias = "TSTP_CMB5")] pub type TstpCmb5 = crate::Reg; #[doc = "CAN Frame Timestamp"] pub mod tstp_cmb5; -#[doc = "DATA3_CMB5 (rw) register accessor: CAN Frame Data Word 3\n\nYou can [`read`](crate::Reg::read) this register and get [`data3_cmb5::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data3_cmb5::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data3_cmb5`] -module"] +#[doc = "DATA3_CMB5 (rw) register accessor: CAN Frame Data Word 3\n\nYou can [`read`](crate::Reg::read) this register and get [`data3_cmb5::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data3_cmb5::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data3_cmb5`] module"] #[doc(alias = "DATA3_CMB5")] pub type Data3Cmb5 = crate::Reg; #[doc = "CAN Frame Data Word 3"] pub mod data3_cmb5; -#[doc = "DATA2_CMB5 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data2_cmb5::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data2_cmb5::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data2_cmb5`] -module"] +#[doc = "DATA2_CMB5 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data2_cmb5::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data2_cmb5::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data2_cmb5`] module"] #[doc(alias = "DATA2_CMB5")] pub type Data2Cmb5 = crate::Reg; #[doc = "CAN Frame Data Word 2"] pub mod data2_cmb5; -#[doc = "DATA1_CMB5 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data1_cmb5::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data1_cmb5::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data1_cmb5`] -module"] +#[doc = "DATA1_CMB5 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data1_cmb5::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data1_cmb5::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data1_cmb5`] module"] #[doc(alias = "DATA1_CMB5")] pub type Data1Cmb5 = crate::Reg; #[doc = "CAN Frame Data Word 2"] pub mod data1_cmb5; -#[doc = "DATA0_CMB5 (rw) register accessor: CAN Frame Data Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`data0_cmb5::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data0_cmb5::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data0_cmb5`] -module"] +#[doc = "DATA0_CMB5 (rw) register accessor: CAN Frame Data Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`data0_cmb5::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data0_cmb5::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data0_cmb5`] module"] #[doc(alias = "DATA0_CMB5")] pub type Data0Cmb5 = crate::Reg; #[doc = "CAN Frame Data Word 0"] pub mod data0_cmb5; -#[doc = "ID0_CMB5 (rw) register accessor: CAN Frame Identifier Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`id0_cmb5::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id0_cmb5::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id0_cmb5`] -module"] +#[doc = "ID0_CMB5 (rw) register accessor: CAN Frame Identifier Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`id0_cmb5::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id0_cmb5::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id0_cmb5`] module"] #[doc(alias = "ID0_CMB5")] pub type Id0Cmb5 = crate::Reg; #[doc = "CAN Frame Identifier Word 0"] pub mod id0_cmb5; -#[doc = "ID1_CMB5 (rw) register accessor: CAN Frame Identifier Word 1\n\nYou can [`read`](crate::Reg::read) this register and get [`id1_cmb5::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id1_cmb5::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id1_cmb5`] -module"] +#[doc = "ID1_CMB5 (rw) register accessor: CAN Frame Identifier Word 1\n\nYou can [`read`](crate::Reg::read) this register and get [`id1_cmb5::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id1_cmb5::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id1_cmb5`] module"] #[doc(alias = "ID1_CMB5")] pub type Id1Cmb5 = crate::Reg; #[doc = "CAN Frame Identifier Word 1"] pub mod id1_cmb5; -#[doc = "CNSTAT_CMB6 (rw) register accessor: Buffer Status / Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cnstat_cmb6::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnstat_cmb6::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnstat_cmb6`] -module"] +#[doc = "CNSTAT_CMB6 (rw) register accessor: Buffer Status / Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cnstat_cmb6::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnstat_cmb6::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnstat_cmb6`] module"] #[doc(alias = "CNSTAT_CMB6")] pub type CnstatCmb6 = crate::Reg; #[doc = "Buffer Status / Control Register"] pub mod cnstat_cmb6; -#[doc = "TSTP_CMB6 (rw) register accessor: CAN Frame Timestamp\n\nYou can [`read`](crate::Reg::read) this register and get [`tstp_cmb6::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tstp_cmb6::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstp_cmb6`] -module"] +#[doc = "TSTP_CMB6 (rw) register accessor: CAN Frame Timestamp\n\nYou can [`read`](crate::Reg::read) this register and get [`tstp_cmb6::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tstp_cmb6::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstp_cmb6`] module"] #[doc(alias = "TSTP_CMB6")] pub type TstpCmb6 = crate::Reg; #[doc = "CAN Frame Timestamp"] pub mod tstp_cmb6; -#[doc = "DATA3_CMB6 (rw) register accessor: CAN Frame Data Word 3\n\nYou can [`read`](crate::Reg::read) this register and get [`data3_cmb6::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data3_cmb6::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data3_cmb6`] -module"] +#[doc = "DATA3_CMB6 (rw) register accessor: CAN Frame Data Word 3\n\nYou can [`read`](crate::Reg::read) this register and get [`data3_cmb6::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data3_cmb6::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data3_cmb6`] module"] #[doc(alias = "DATA3_CMB6")] pub type Data3Cmb6 = crate::Reg; #[doc = "CAN Frame Data Word 3"] pub mod data3_cmb6; -#[doc = "DATA2_CMB6 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data2_cmb6::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data2_cmb6::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data2_cmb6`] -module"] +#[doc = "DATA2_CMB6 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data2_cmb6::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data2_cmb6::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data2_cmb6`] module"] #[doc(alias = "DATA2_CMB6")] pub type Data2Cmb6 = crate::Reg; #[doc = "CAN Frame Data Word 2"] pub mod data2_cmb6; -#[doc = "DATA1_CMB6 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data1_cmb6::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data1_cmb6::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data1_cmb6`] -module"] +#[doc = "DATA1_CMB6 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data1_cmb6::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data1_cmb6::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data1_cmb6`] module"] #[doc(alias = "DATA1_CMB6")] pub type Data1Cmb6 = crate::Reg; #[doc = "CAN Frame Data Word 2"] pub mod data1_cmb6; -#[doc = "DATA0_CMB6 (rw) register accessor: CAN Frame Data Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`data0_cmb6::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data0_cmb6::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data0_cmb6`] -module"] +#[doc = "DATA0_CMB6 (rw) register accessor: CAN Frame Data Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`data0_cmb6::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data0_cmb6::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data0_cmb6`] module"] #[doc(alias = "DATA0_CMB6")] pub type Data0Cmb6 = crate::Reg; #[doc = "CAN Frame Data Word 0"] pub mod data0_cmb6; -#[doc = "ID0_CMB6 (rw) register accessor: CAN Frame Identifier Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`id0_cmb6::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id0_cmb6::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id0_cmb6`] -module"] +#[doc = "ID0_CMB6 (rw) register accessor: CAN Frame Identifier Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`id0_cmb6::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id0_cmb6::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id0_cmb6`] module"] #[doc(alias = "ID0_CMB6")] pub type Id0Cmb6 = crate::Reg; #[doc = "CAN Frame Identifier Word 0"] pub mod id0_cmb6; -#[doc = "ID1_CMB6 (rw) register accessor: CAN Frame Identifier Word 1\n\nYou can [`read`](crate::Reg::read) this register and get [`id1_cmb6::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id1_cmb6::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id1_cmb6`] -module"] +#[doc = "ID1_CMB6 (rw) register accessor: CAN Frame Identifier Word 1\n\nYou can [`read`](crate::Reg::read) this register and get [`id1_cmb6::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id1_cmb6::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id1_cmb6`] module"] #[doc(alias = "ID1_CMB6")] pub type Id1Cmb6 = crate::Reg; #[doc = "CAN Frame Identifier Word 1"] pub mod id1_cmb6; -#[doc = "CNSTAT_CMB7 (rw) register accessor: Buffer Status / Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cnstat_cmb7::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnstat_cmb7::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnstat_cmb7`] -module"] +#[doc = "CNSTAT_CMB7 (rw) register accessor: Buffer Status / Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cnstat_cmb7::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnstat_cmb7::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnstat_cmb7`] module"] #[doc(alias = "CNSTAT_CMB7")] pub type CnstatCmb7 = crate::Reg; #[doc = "Buffer Status / Control Register"] pub mod cnstat_cmb7; -#[doc = "TSTP_CMB7 (rw) register accessor: CAN Frame Timestamp\n\nYou can [`read`](crate::Reg::read) this register and get [`tstp_cmb7::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tstp_cmb7::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstp_cmb7`] -module"] +#[doc = "TSTP_CMB7 (rw) register accessor: CAN Frame Timestamp\n\nYou can [`read`](crate::Reg::read) this register and get [`tstp_cmb7::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tstp_cmb7::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstp_cmb7`] module"] #[doc(alias = "TSTP_CMB7")] pub type TstpCmb7 = crate::Reg; #[doc = "CAN Frame Timestamp"] pub mod tstp_cmb7; -#[doc = "DATA3_CMB7 (rw) register accessor: CAN Frame Data Word 3\n\nYou can [`read`](crate::Reg::read) this register and get [`data3_cmb7::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data3_cmb7::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data3_cmb7`] -module"] +#[doc = "DATA3_CMB7 (rw) register accessor: CAN Frame Data Word 3\n\nYou can [`read`](crate::Reg::read) this register and get [`data3_cmb7::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data3_cmb7::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data3_cmb7`] module"] #[doc(alias = "DATA3_CMB7")] pub type Data3Cmb7 = crate::Reg; #[doc = "CAN Frame Data Word 3"] pub mod data3_cmb7; -#[doc = "DATA2_CMB7 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data2_cmb7::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data2_cmb7::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data2_cmb7`] -module"] +#[doc = "DATA2_CMB7 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data2_cmb7::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data2_cmb7::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data2_cmb7`] module"] #[doc(alias = "DATA2_CMB7")] pub type Data2Cmb7 = crate::Reg; #[doc = "CAN Frame Data Word 2"] pub mod data2_cmb7; -#[doc = "DATA1_CMB7 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data1_cmb7::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data1_cmb7::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data1_cmb7`] -module"] +#[doc = "DATA1_CMB7 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data1_cmb7::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data1_cmb7::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data1_cmb7`] module"] #[doc(alias = "DATA1_CMB7")] pub type Data1Cmb7 = crate::Reg; #[doc = "CAN Frame Data Word 2"] pub mod data1_cmb7; -#[doc = "DATA0_CMB7 (rw) register accessor: CAN Frame Data Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`data0_cmb7::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data0_cmb7::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data0_cmb7`] -module"] +#[doc = "DATA0_CMB7 (rw) register accessor: CAN Frame Data Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`data0_cmb7::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data0_cmb7::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data0_cmb7`] module"] #[doc(alias = "DATA0_CMB7")] pub type Data0Cmb7 = crate::Reg; #[doc = "CAN Frame Data Word 0"] pub mod data0_cmb7; -#[doc = "ID0_CMB7 (rw) register accessor: CAN Frame Identifier Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`id0_cmb7::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id0_cmb7::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id0_cmb7`] -module"] +#[doc = "ID0_CMB7 (rw) register accessor: CAN Frame Identifier Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`id0_cmb7::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id0_cmb7::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id0_cmb7`] module"] #[doc(alias = "ID0_CMB7")] pub type Id0Cmb7 = crate::Reg; #[doc = "CAN Frame Identifier Word 0"] pub mod id0_cmb7; -#[doc = "ID1_CMB7 (rw) register accessor: CAN Frame Identifier Word 1\n\nYou can [`read`](crate::Reg::read) this register and get [`id1_cmb7::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id1_cmb7::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id1_cmb7`] -module"] +#[doc = "ID1_CMB7 (rw) register accessor: CAN Frame Identifier Word 1\n\nYou can [`read`](crate::Reg::read) this register and get [`id1_cmb7::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id1_cmb7::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id1_cmb7`] module"] #[doc(alias = "ID1_CMB7")] pub type Id1Cmb7 = crate::Reg; #[doc = "CAN Frame Identifier Word 1"] pub mod id1_cmb7; -#[doc = "CNSTAT_CMB8 (rw) register accessor: Buffer Status / Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cnstat_cmb8::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnstat_cmb8::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnstat_cmb8`] -module"] +#[doc = "CNSTAT_CMB8 (rw) register accessor: Buffer Status / Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cnstat_cmb8::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnstat_cmb8::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnstat_cmb8`] module"] #[doc(alias = "CNSTAT_CMB8")] pub type CnstatCmb8 = crate::Reg; #[doc = "Buffer Status / Control Register"] pub mod cnstat_cmb8; -#[doc = "TSTP_CMB8 (rw) register accessor: CAN Frame Timestamp\n\nYou can [`read`](crate::Reg::read) this register and get [`tstp_cmb8::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tstp_cmb8::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstp_cmb8`] -module"] +#[doc = "TSTP_CMB8 (rw) register accessor: CAN Frame Timestamp\n\nYou can [`read`](crate::Reg::read) this register and get [`tstp_cmb8::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tstp_cmb8::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstp_cmb8`] module"] #[doc(alias = "TSTP_CMB8")] pub type TstpCmb8 = crate::Reg; #[doc = "CAN Frame Timestamp"] pub mod tstp_cmb8; -#[doc = "DATA3_CMB8 (rw) register accessor: CAN Frame Data Word 3\n\nYou can [`read`](crate::Reg::read) this register and get [`data3_cmb8::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data3_cmb8::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data3_cmb8`] -module"] +#[doc = "DATA3_CMB8 (rw) register accessor: CAN Frame Data Word 3\n\nYou can [`read`](crate::Reg::read) this register and get [`data3_cmb8::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data3_cmb8::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data3_cmb8`] module"] #[doc(alias = "DATA3_CMB8")] pub type Data3Cmb8 = crate::Reg; #[doc = "CAN Frame Data Word 3"] pub mod data3_cmb8; -#[doc = "DATA2_CMB8 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data2_cmb8::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data2_cmb8::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data2_cmb8`] -module"] +#[doc = "DATA2_CMB8 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data2_cmb8::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data2_cmb8::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data2_cmb8`] module"] #[doc(alias = "DATA2_CMB8")] pub type Data2Cmb8 = crate::Reg; #[doc = "CAN Frame Data Word 2"] pub mod data2_cmb8; -#[doc = "DATA1_CMB8 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data1_cmb8::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data1_cmb8::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data1_cmb8`] -module"] +#[doc = "DATA1_CMB8 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data1_cmb8::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data1_cmb8::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data1_cmb8`] module"] #[doc(alias = "DATA1_CMB8")] pub type Data1Cmb8 = crate::Reg; #[doc = "CAN Frame Data Word 2"] pub mod data1_cmb8; -#[doc = "DATA0_CMB8 (rw) register accessor: CAN Frame Data Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`data0_cmb8::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data0_cmb8::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data0_cmb8`] -module"] +#[doc = "DATA0_CMB8 (rw) register accessor: CAN Frame Data Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`data0_cmb8::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data0_cmb8::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data0_cmb8`] module"] #[doc(alias = "DATA0_CMB8")] pub type Data0Cmb8 = crate::Reg; #[doc = "CAN Frame Data Word 0"] pub mod data0_cmb8; -#[doc = "ID0_CMB8 (rw) register accessor: CAN Frame Identifier Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`id0_cmb8::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id0_cmb8::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id0_cmb8`] -module"] +#[doc = "ID0_CMB8 (rw) register accessor: CAN Frame Identifier Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`id0_cmb8::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id0_cmb8::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id0_cmb8`] module"] #[doc(alias = "ID0_CMB8")] pub type Id0Cmb8 = crate::Reg; #[doc = "CAN Frame Identifier Word 0"] pub mod id0_cmb8; -#[doc = "ID1_CMB8 (rw) register accessor: CAN Frame Identifier Word 1\n\nYou can [`read`](crate::Reg::read) this register and get [`id1_cmb8::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id1_cmb8::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id1_cmb8`] -module"] +#[doc = "ID1_CMB8 (rw) register accessor: CAN Frame Identifier Word 1\n\nYou can [`read`](crate::Reg::read) this register and get [`id1_cmb8::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id1_cmb8::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id1_cmb8`] module"] #[doc(alias = "ID1_CMB8")] pub type Id1Cmb8 = crate::Reg; #[doc = "CAN Frame Identifier Word 1"] pub mod id1_cmb8; -#[doc = "CNSTAT_CMB9 (rw) register accessor: Buffer Status / Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cnstat_cmb9::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnstat_cmb9::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnstat_cmb9`] -module"] +#[doc = "CNSTAT_CMB9 (rw) register accessor: Buffer Status / Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cnstat_cmb9::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnstat_cmb9::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnstat_cmb9`] module"] #[doc(alias = "CNSTAT_CMB9")] pub type CnstatCmb9 = crate::Reg; #[doc = "Buffer Status / Control Register"] pub mod cnstat_cmb9; -#[doc = "TSTP_CMB9 (rw) register accessor: CAN Frame Timestamp\n\nYou can [`read`](crate::Reg::read) this register and get [`tstp_cmb9::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tstp_cmb9::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstp_cmb9`] -module"] +#[doc = "TSTP_CMB9 (rw) register accessor: CAN Frame Timestamp\n\nYou can [`read`](crate::Reg::read) this register and get [`tstp_cmb9::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tstp_cmb9::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstp_cmb9`] module"] #[doc(alias = "TSTP_CMB9")] pub type TstpCmb9 = crate::Reg; #[doc = "CAN Frame Timestamp"] pub mod tstp_cmb9; -#[doc = "DATA3_CMB9 (rw) register accessor: CAN Frame Data Word 3\n\nYou can [`read`](crate::Reg::read) this register and get [`data3_cmb9::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data3_cmb9::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data3_cmb9`] -module"] +#[doc = "DATA3_CMB9 (rw) register accessor: CAN Frame Data Word 3\n\nYou can [`read`](crate::Reg::read) this register and get [`data3_cmb9::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data3_cmb9::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data3_cmb9`] module"] #[doc(alias = "DATA3_CMB9")] pub type Data3Cmb9 = crate::Reg; #[doc = "CAN Frame Data Word 3"] pub mod data3_cmb9; -#[doc = "DATA2_CMB9 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data2_cmb9::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data2_cmb9::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data2_cmb9`] -module"] +#[doc = "DATA2_CMB9 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data2_cmb9::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data2_cmb9::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data2_cmb9`] module"] #[doc(alias = "DATA2_CMB9")] pub type Data2Cmb9 = crate::Reg; #[doc = "CAN Frame Data Word 2"] pub mod data2_cmb9; -#[doc = "DATA1_CMB9 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data1_cmb9::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data1_cmb9::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data1_cmb9`] -module"] +#[doc = "DATA1_CMB9 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data1_cmb9::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data1_cmb9::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data1_cmb9`] module"] #[doc(alias = "DATA1_CMB9")] pub type Data1Cmb9 = crate::Reg; #[doc = "CAN Frame Data Word 2"] pub mod data1_cmb9; -#[doc = "DATA0_CMB9 (rw) register accessor: CAN Frame Data Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`data0_cmb9::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data0_cmb9::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data0_cmb9`] -module"] +#[doc = "DATA0_CMB9 (rw) register accessor: CAN Frame Data Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`data0_cmb9::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data0_cmb9::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data0_cmb9`] module"] #[doc(alias = "DATA0_CMB9")] pub type Data0Cmb9 = crate::Reg; #[doc = "CAN Frame Data Word 0"] pub mod data0_cmb9; -#[doc = "ID0_CMB9 (rw) register accessor: CAN Frame Identifier Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`id0_cmb9::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id0_cmb9::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id0_cmb9`] -module"] +#[doc = "ID0_CMB9 (rw) register accessor: CAN Frame Identifier Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`id0_cmb9::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id0_cmb9::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id0_cmb9`] module"] #[doc(alias = "ID0_CMB9")] pub type Id0Cmb9 = crate::Reg; #[doc = "CAN Frame Identifier Word 0"] pub mod id0_cmb9; -#[doc = "ID1_CMB9 (rw) register accessor: CAN Frame Identifier Word 1\n\nYou can [`read`](crate::Reg::read) this register and get [`id1_cmb9::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id1_cmb9::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id1_cmb9`] -module"] +#[doc = "ID1_CMB9 (rw) register accessor: CAN Frame Identifier Word 1\n\nYou can [`read`](crate::Reg::read) this register and get [`id1_cmb9::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id1_cmb9::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id1_cmb9`] module"] #[doc(alias = "ID1_CMB9")] pub type Id1Cmb9 = crate::Reg; #[doc = "CAN Frame Identifier Word 1"] pub mod id1_cmb9; -#[doc = "CNSTAT_CMB10 (rw) register accessor: Buffer Status / Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cnstat_cmb10::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnstat_cmb10::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnstat_cmb10`] -module"] +#[doc = "CNSTAT_CMB10 (rw) register accessor: Buffer Status / Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cnstat_cmb10::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnstat_cmb10::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnstat_cmb10`] module"] #[doc(alias = "CNSTAT_CMB10")] pub type CnstatCmb10 = crate::Reg; #[doc = "Buffer Status / Control Register"] pub mod cnstat_cmb10; -#[doc = "TSTP_CMB10 (rw) register accessor: CAN Frame Timestamp\n\nYou can [`read`](crate::Reg::read) this register and get [`tstp_cmb10::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tstp_cmb10::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstp_cmb10`] -module"] +#[doc = "TSTP_CMB10 (rw) register accessor: CAN Frame Timestamp\n\nYou can [`read`](crate::Reg::read) this register and get [`tstp_cmb10::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tstp_cmb10::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstp_cmb10`] module"] #[doc(alias = "TSTP_CMB10")] pub type TstpCmb10 = crate::Reg; #[doc = "CAN Frame Timestamp"] pub mod tstp_cmb10; -#[doc = "DATA3_CMB10 (rw) register accessor: CAN Frame Data Word 3\n\nYou can [`read`](crate::Reg::read) this register and get [`data3_cmb10::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data3_cmb10::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data3_cmb10`] -module"] +#[doc = "DATA3_CMB10 (rw) register accessor: CAN Frame Data Word 3\n\nYou can [`read`](crate::Reg::read) this register and get [`data3_cmb10::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data3_cmb10::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data3_cmb10`] module"] #[doc(alias = "DATA3_CMB10")] pub type Data3Cmb10 = crate::Reg; #[doc = "CAN Frame Data Word 3"] pub mod data3_cmb10; -#[doc = "DATA2_CMB10 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data2_cmb10::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data2_cmb10::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data2_cmb10`] -module"] +#[doc = "DATA2_CMB10 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data2_cmb10::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data2_cmb10::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data2_cmb10`] module"] #[doc(alias = "DATA2_CMB10")] pub type Data2Cmb10 = crate::Reg; #[doc = "CAN Frame Data Word 2"] pub mod data2_cmb10; -#[doc = "DATA1_CMB10 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data1_cmb10::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data1_cmb10::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data1_cmb10`] -module"] +#[doc = "DATA1_CMB10 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data1_cmb10::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data1_cmb10::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data1_cmb10`] module"] #[doc(alias = "DATA1_CMB10")] pub type Data1Cmb10 = crate::Reg; #[doc = "CAN Frame Data Word 2"] pub mod data1_cmb10; -#[doc = "DATA0_CMB10 (rw) register accessor: CAN Frame Data Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`data0_cmb10::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data0_cmb10::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data0_cmb10`] -module"] +#[doc = "DATA0_CMB10 (rw) register accessor: CAN Frame Data Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`data0_cmb10::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data0_cmb10::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data0_cmb10`] module"] #[doc(alias = "DATA0_CMB10")] pub type Data0Cmb10 = crate::Reg; #[doc = "CAN Frame Data Word 0"] pub mod data0_cmb10; -#[doc = "ID0_CMB10 (rw) register accessor: CAN Frame Identifier Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`id0_cmb10::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id0_cmb10::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id0_cmb10`] -module"] +#[doc = "ID0_CMB10 (rw) register accessor: CAN Frame Identifier Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`id0_cmb10::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id0_cmb10::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id0_cmb10`] module"] #[doc(alias = "ID0_CMB10")] pub type Id0Cmb10 = crate::Reg; #[doc = "CAN Frame Identifier Word 0"] pub mod id0_cmb10; -#[doc = "ID1_CMB10 (rw) register accessor: CAN Frame Identifier Word 1\n\nYou can [`read`](crate::Reg::read) this register and get [`id1_cmb10::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id1_cmb10::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id1_cmb10`] -module"] +#[doc = "ID1_CMB10 (rw) register accessor: CAN Frame Identifier Word 1\n\nYou can [`read`](crate::Reg::read) this register and get [`id1_cmb10::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id1_cmb10::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id1_cmb10`] module"] #[doc(alias = "ID1_CMB10")] pub type Id1Cmb10 = crate::Reg; #[doc = "CAN Frame Identifier Word 1"] pub mod id1_cmb10; -#[doc = "CNSTAT_CMB11 (rw) register accessor: Buffer Status / Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cnstat_cmb11::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnstat_cmb11::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnstat_cmb11`] -module"] +#[doc = "CNSTAT_CMB11 (rw) register accessor: Buffer Status / Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cnstat_cmb11::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnstat_cmb11::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnstat_cmb11`] module"] #[doc(alias = "CNSTAT_CMB11")] pub type CnstatCmb11 = crate::Reg; #[doc = "Buffer Status / Control Register"] pub mod cnstat_cmb11; -#[doc = "TSTP_CMB11 (rw) register accessor: CAN Frame Timestamp\n\nYou can [`read`](crate::Reg::read) this register and get [`tstp_cmb11::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tstp_cmb11::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstp_cmb11`] -module"] +#[doc = "TSTP_CMB11 (rw) register accessor: CAN Frame Timestamp\n\nYou can [`read`](crate::Reg::read) this register and get [`tstp_cmb11::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tstp_cmb11::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstp_cmb11`] module"] #[doc(alias = "TSTP_CMB11")] pub type TstpCmb11 = crate::Reg; #[doc = "CAN Frame Timestamp"] pub mod tstp_cmb11; -#[doc = "DATA3_CMB11 (rw) register accessor: CAN Frame Data Word 3\n\nYou can [`read`](crate::Reg::read) this register and get [`data3_cmb11::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data3_cmb11::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data3_cmb11`] -module"] +#[doc = "DATA3_CMB11 (rw) register accessor: CAN Frame Data Word 3\n\nYou can [`read`](crate::Reg::read) this register and get [`data3_cmb11::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data3_cmb11::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data3_cmb11`] module"] #[doc(alias = "DATA3_CMB11")] pub type Data3Cmb11 = crate::Reg; #[doc = "CAN Frame Data Word 3"] pub mod data3_cmb11; -#[doc = "DATA2_CMB11 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data2_cmb11::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data2_cmb11::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data2_cmb11`] -module"] +#[doc = "DATA2_CMB11 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data2_cmb11::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data2_cmb11::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data2_cmb11`] module"] #[doc(alias = "DATA2_CMB11")] pub type Data2Cmb11 = crate::Reg; #[doc = "CAN Frame Data Word 2"] pub mod data2_cmb11; -#[doc = "DATA1_CMB11 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data1_cmb11::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data1_cmb11::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data1_cmb11`] -module"] +#[doc = "DATA1_CMB11 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data1_cmb11::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data1_cmb11::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data1_cmb11`] module"] #[doc(alias = "DATA1_CMB11")] pub type Data1Cmb11 = crate::Reg; #[doc = "CAN Frame Data Word 2"] pub mod data1_cmb11; -#[doc = "DATA0_CMB11 (rw) register accessor: CAN Frame Data Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`data0_cmb11::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data0_cmb11::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data0_cmb11`] -module"] +#[doc = "DATA0_CMB11 (rw) register accessor: CAN Frame Data Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`data0_cmb11::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data0_cmb11::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data0_cmb11`] module"] #[doc(alias = "DATA0_CMB11")] pub type Data0Cmb11 = crate::Reg; #[doc = "CAN Frame Data Word 0"] pub mod data0_cmb11; -#[doc = "ID0_CMB11 (rw) register accessor: CAN Frame Identifier Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`id0_cmb11::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id0_cmb11::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id0_cmb11`] -module"] +#[doc = "ID0_CMB11 (rw) register accessor: CAN Frame Identifier Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`id0_cmb11::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id0_cmb11::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id0_cmb11`] module"] #[doc(alias = "ID0_CMB11")] pub type Id0Cmb11 = crate::Reg; #[doc = "CAN Frame Identifier Word 0"] pub mod id0_cmb11; -#[doc = "ID1_CMB11 (rw) register accessor: CAN Frame Identifier Word 1\n\nYou can [`read`](crate::Reg::read) this register and get [`id1_cmb11::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id1_cmb11::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id1_cmb11`] -module"] +#[doc = "ID1_CMB11 (rw) register accessor: CAN Frame Identifier Word 1\n\nYou can [`read`](crate::Reg::read) this register and get [`id1_cmb11::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id1_cmb11::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id1_cmb11`] module"] #[doc(alias = "ID1_CMB11")] pub type Id1Cmb11 = crate::Reg; #[doc = "CAN Frame Identifier Word 1"] pub mod id1_cmb11; -#[doc = "CNSTAT_CMB12 (rw) register accessor: Buffer Status / Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cnstat_cmb12::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnstat_cmb12::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnstat_cmb12`] -module"] +#[doc = "CNSTAT_CMB12 (rw) register accessor: Buffer Status / Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cnstat_cmb12::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnstat_cmb12::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnstat_cmb12`] module"] #[doc(alias = "CNSTAT_CMB12")] pub type CnstatCmb12 = crate::Reg; #[doc = "Buffer Status / Control Register"] pub mod cnstat_cmb12; -#[doc = "TSTP_CMB12 (rw) register accessor: CAN Frame Timestamp\n\nYou can [`read`](crate::Reg::read) this register and get [`tstp_cmb12::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tstp_cmb12::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstp_cmb12`] -module"] +#[doc = "TSTP_CMB12 (rw) register accessor: CAN Frame Timestamp\n\nYou can [`read`](crate::Reg::read) this register and get [`tstp_cmb12::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tstp_cmb12::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstp_cmb12`] module"] #[doc(alias = "TSTP_CMB12")] pub type TstpCmb12 = crate::Reg; #[doc = "CAN Frame Timestamp"] pub mod tstp_cmb12; -#[doc = "DATA3_CMB12 (rw) register accessor: CAN Frame Data Word 3\n\nYou can [`read`](crate::Reg::read) this register and get [`data3_cmb12::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data3_cmb12::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data3_cmb12`] -module"] +#[doc = "DATA3_CMB12 (rw) register accessor: CAN Frame Data Word 3\n\nYou can [`read`](crate::Reg::read) this register and get [`data3_cmb12::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data3_cmb12::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data3_cmb12`] module"] #[doc(alias = "DATA3_CMB12")] pub type Data3Cmb12 = crate::Reg; #[doc = "CAN Frame Data Word 3"] pub mod data3_cmb12; -#[doc = "DATA2_CMB12 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data2_cmb12::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data2_cmb12::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data2_cmb12`] -module"] +#[doc = "DATA2_CMB12 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data2_cmb12::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data2_cmb12::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data2_cmb12`] module"] #[doc(alias = "DATA2_CMB12")] pub type Data2Cmb12 = crate::Reg; #[doc = "CAN Frame Data Word 2"] pub mod data2_cmb12; -#[doc = "DATA1_CMB12 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data1_cmb12::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data1_cmb12::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data1_cmb12`] -module"] +#[doc = "DATA1_CMB12 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data1_cmb12::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data1_cmb12::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data1_cmb12`] module"] #[doc(alias = "DATA1_CMB12")] pub type Data1Cmb12 = crate::Reg; #[doc = "CAN Frame Data Word 2"] pub mod data1_cmb12; -#[doc = "DATA0_CMB12 (rw) register accessor: CAN Frame Data Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`data0_cmb12::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data0_cmb12::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data0_cmb12`] -module"] +#[doc = "DATA0_CMB12 (rw) register accessor: CAN Frame Data Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`data0_cmb12::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data0_cmb12::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data0_cmb12`] module"] #[doc(alias = "DATA0_CMB12")] pub type Data0Cmb12 = crate::Reg; #[doc = "CAN Frame Data Word 0"] pub mod data0_cmb12; -#[doc = "ID0_CMB12 (rw) register accessor: CAN Frame Identifier Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`id0_cmb12::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id0_cmb12::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id0_cmb12`] -module"] +#[doc = "ID0_CMB12 (rw) register accessor: CAN Frame Identifier Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`id0_cmb12::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id0_cmb12::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id0_cmb12`] module"] #[doc(alias = "ID0_CMB12")] pub type Id0Cmb12 = crate::Reg; #[doc = "CAN Frame Identifier Word 0"] pub mod id0_cmb12; -#[doc = "ID1_CMB12 (rw) register accessor: CAN Frame Identifier Word 1\n\nYou can [`read`](crate::Reg::read) this register and get [`id1_cmb12::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id1_cmb12::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id1_cmb12`] -module"] +#[doc = "ID1_CMB12 (rw) register accessor: CAN Frame Identifier Word 1\n\nYou can [`read`](crate::Reg::read) this register and get [`id1_cmb12::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id1_cmb12::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id1_cmb12`] module"] #[doc(alias = "ID1_CMB12")] pub type Id1Cmb12 = crate::Reg; #[doc = "CAN Frame Identifier Word 1"] pub mod id1_cmb12; -#[doc = "CNSTAT_CMB13 (rw) register accessor: Buffer Status / Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cnstat_cmb13::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnstat_cmb13::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnstat_cmb13`] -module"] +#[doc = "CNSTAT_CMB13 (rw) register accessor: Buffer Status / Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cnstat_cmb13::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnstat_cmb13::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnstat_cmb13`] module"] #[doc(alias = "CNSTAT_CMB13")] pub type CnstatCmb13 = crate::Reg; #[doc = "Buffer Status / Control Register"] pub mod cnstat_cmb13; -#[doc = "TSTP_CMB13 (rw) register accessor: CAN Frame Timestamp\n\nYou can [`read`](crate::Reg::read) this register and get [`tstp_cmb13::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tstp_cmb13::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstp_cmb13`] -module"] +#[doc = "TSTP_CMB13 (rw) register accessor: CAN Frame Timestamp\n\nYou can [`read`](crate::Reg::read) this register and get [`tstp_cmb13::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tstp_cmb13::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstp_cmb13`] module"] #[doc(alias = "TSTP_CMB13")] pub type TstpCmb13 = crate::Reg; #[doc = "CAN Frame Timestamp"] pub mod tstp_cmb13; -#[doc = "DATA3_CMB13 (rw) register accessor: CAN Frame Data Word 3\n\nYou can [`read`](crate::Reg::read) this register and get [`data3_cmb13::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data3_cmb13::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data3_cmb13`] -module"] +#[doc = "DATA3_CMB13 (rw) register accessor: CAN Frame Data Word 3\n\nYou can [`read`](crate::Reg::read) this register and get [`data3_cmb13::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data3_cmb13::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data3_cmb13`] module"] #[doc(alias = "DATA3_CMB13")] pub type Data3Cmb13 = crate::Reg; #[doc = "CAN Frame Data Word 3"] pub mod data3_cmb13; -#[doc = "DATA2_CMB13 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data2_cmb13::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data2_cmb13::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data2_cmb13`] -module"] +#[doc = "DATA2_CMB13 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data2_cmb13::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data2_cmb13::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data2_cmb13`] module"] #[doc(alias = "DATA2_CMB13")] pub type Data2Cmb13 = crate::Reg; #[doc = "CAN Frame Data Word 2"] pub mod data2_cmb13; -#[doc = "DATA1_CMB13 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data1_cmb13::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data1_cmb13::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data1_cmb13`] -module"] +#[doc = "DATA1_CMB13 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data1_cmb13::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data1_cmb13::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data1_cmb13`] module"] #[doc(alias = "DATA1_CMB13")] pub type Data1Cmb13 = crate::Reg; #[doc = "CAN Frame Data Word 2"] pub mod data1_cmb13; -#[doc = "DATA0_CMB13 (rw) register accessor: CAN Frame Data Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`data0_cmb13::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data0_cmb13::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data0_cmb13`] -module"] +#[doc = "DATA0_CMB13 (rw) register accessor: CAN Frame Data Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`data0_cmb13::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data0_cmb13::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data0_cmb13`] module"] #[doc(alias = "DATA0_CMB13")] pub type Data0Cmb13 = crate::Reg; #[doc = "CAN Frame Data Word 0"] pub mod data0_cmb13; -#[doc = "ID0_CMB13 (rw) register accessor: CAN Frame Identifier Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`id0_cmb13::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id0_cmb13::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id0_cmb13`] -module"] +#[doc = "ID0_CMB13 (rw) register accessor: CAN Frame Identifier Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`id0_cmb13::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id0_cmb13::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id0_cmb13`] module"] #[doc(alias = "ID0_CMB13")] pub type Id0Cmb13 = crate::Reg; #[doc = "CAN Frame Identifier Word 0"] pub mod id0_cmb13; -#[doc = "ID1_CMB13 (rw) register accessor: CAN Frame Identifier Word 1\n\nYou can [`read`](crate::Reg::read) this register and get [`id1_cmb13::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id1_cmb13::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id1_cmb13`] -module"] +#[doc = "ID1_CMB13 (rw) register accessor: CAN Frame Identifier Word 1\n\nYou can [`read`](crate::Reg::read) this register and get [`id1_cmb13::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id1_cmb13::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id1_cmb13`] module"] #[doc(alias = "ID1_CMB13")] pub type Id1Cmb13 = crate::Reg; #[doc = "CAN Frame Identifier Word 1"] pub mod id1_cmb13; -#[doc = "CNSTAT_CMB14 (rw) register accessor: Buffer Status / Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cnstat_cmb14::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnstat_cmb14::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnstat_cmb14`] -module"] +#[doc = "CNSTAT_CMB14 (rw) register accessor: Buffer Status / Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cnstat_cmb14::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnstat_cmb14::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnstat_cmb14`] module"] #[doc(alias = "CNSTAT_CMB14")] pub type CnstatCmb14 = crate::Reg; #[doc = "Buffer Status / Control Register"] pub mod cnstat_cmb14; -#[doc = "TSTP_CMB14 (rw) register accessor: CAN Frame Timestamp\n\nYou can [`read`](crate::Reg::read) this register and get [`tstp_cmb14::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tstp_cmb14::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstp_cmb14`] -module"] +#[doc = "TSTP_CMB14 (rw) register accessor: CAN Frame Timestamp\n\nYou can [`read`](crate::Reg::read) this register and get [`tstp_cmb14::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tstp_cmb14::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstp_cmb14`] module"] #[doc(alias = "TSTP_CMB14")] pub type TstpCmb14 = crate::Reg; #[doc = "CAN Frame Timestamp"] pub mod tstp_cmb14; -#[doc = "DATA3_CMB14 (rw) register accessor: CAN Frame Data Word 3\n\nYou can [`read`](crate::Reg::read) this register and get [`data3_cmb14::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data3_cmb14::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data3_cmb14`] -module"] +#[doc = "DATA3_CMB14 (rw) register accessor: CAN Frame Data Word 3\n\nYou can [`read`](crate::Reg::read) this register and get [`data3_cmb14::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data3_cmb14::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data3_cmb14`] module"] #[doc(alias = "DATA3_CMB14")] pub type Data3Cmb14 = crate::Reg; #[doc = "CAN Frame Data Word 3"] pub mod data3_cmb14; -#[doc = "DATA2_CMB14 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data2_cmb14::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data2_cmb14::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data2_cmb14`] -module"] +#[doc = "DATA2_CMB14 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data2_cmb14::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data2_cmb14::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data2_cmb14`] module"] #[doc(alias = "DATA2_CMB14")] pub type Data2Cmb14 = crate::Reg; #[doc = "CAN Frame Data Word 2"] pub mod data2_cmb14; -#[doc = "DATA1_CMB14 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data1_cmb14::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data1_cmb14::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data1_cmb14`] -module"] +#[doc = "DATA1_CMB14 (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data1_cmb14::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data1_cmb14::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data1_cmb14`] module"] #[doc(alias = "DATA1_CMB14")] pub type Data1Cmb14 = crate::Reg; #[doc = "CAN Frame Data Word 2"] pub mod data1_cmb14; -#[doc = "DATA0_CMB14 (rw) register accessor: CAN Frame Data Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`data0_cmb14::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data0_cmb14::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data0_cmb14`] -module"] +#[doc = "DATA0_CMB14 (rw) register accessor: CAN Frame Data Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`data0_cmb14::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data0_cmb14::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data0_cmb14`] module"] #[doc(alias = "DATA0_CMB14")] pub type Data0Cmb14 = crate::Reg; #[doc = "CAN Frame Data Word 0"] pub mod data0_cmb14; -#[doc = "ID0_CMB14 (rw) register accessor: CAN Frame Identifier Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`id0_cmb14::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id0_cmb14::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id0_cmb14`] -module"] +#[doc = "ID0_CMB14 (rw) register accessor: CAN Frame Identifier Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`id0_cmb14::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id0_cmb14::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id0_cmb14`] module"] #[doc(alias = "ID0_CMB14")] pub type Id0Cmb14 = crate::Reg; #[doc = "CAN Frame Identifier Word 0"] pub mod id0_cmb14; -#[doc = "ID1_CMB14 (rw) register accessor: CAN Frame Identifier Word 1\n\nYou can [`read`](crate::Reg::read) this register and get [`id1_cmb14::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id1_cmb14::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id1_cmb14`] -module"] +#[doc = "ID1_CMB14 (rw) register accessor: CAN Frame Identifier Word 1\n\nYou can [`read`](crate::Reg::read) this register and get [`id1_cmb14::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id1_cmb14::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id1_cmb14`] module"] #[doc(alias = "ID1_CMB14")] pub type Id1Cmb14 = crate::Reg; #[doc = "CAN Frame Identifier Word 1"] pub mod id1_cmb14; -#[doc = "CNSTAT_HCMB (rw) register accessor: Buffer Status / Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cnstat_hcmb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnstat_hcmb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnstat_hcmb`] -module"] +#[doc = "CNSTAT_HCMB (rw) register accessor: Buffer Status / Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cnstat_hcmb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnstat_hcmb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnstat_hcmb`] module"] #[doc(alias = "CNSTAT_HCMB")] pub type CnstatHcmb = crate::Reg; #[doc = "Buffer Status / Control Register"] pub mod cnstat_hcmb; -#[doc = "TSTP_HCMB (rw) register accessor: CAN Frame Timestamp\n\nYou can [`read`](crate::Reg::read) this register and get [`tstp_hcmb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tstp_hcmb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstp_hcmb`] -module"] +#[doc = "TSTP_HCMB (rw) register accessor: CAN Frame Timestamp\n\nYou can [`read`](crate::Reg::read) this register and get [`tstp_hcmb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tstp_hcmb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstp_hcmb`] module"] #[doc(alias = "TSTP_HCMB")] pub type TstpHcmb = crate::Reg; #[doc = "CAN Frame Timestamp"] pub mod tstp_hcmb; -#[doc = "DATA3_HCMB (rw) register accessor: CAN Frame Data Word 3\n\nYou can [`read`](crate::Reg::read) this register and get [`data3_hcmb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data3_hcmb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data3_hcmb`] -module"] +#[doc = "DATA3_HCMB (rw) register accessor: CAN Frame Data Word 3\n\nYou can [`read`](crate::Reg::read) this register and get [`data3_hcmb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data3_hcmb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data3_hcmb`] module"] #[doc(alias = "DATA3_HCMB")] pub type Data3Hcmb = crate::Reg; #[doc = "CAN Frame Data Word 3"] pub mod data3_hcmb; -#[doc = "DATA2_HCMB (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data2_hcmb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data2_hcmb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data2_hcmb`] -module"] +#[doc = "DATA2_HCMB (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data2_hcmb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data2_hcmb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data2_hcmb`] module"] #[doc(alias = "DATA2_HCMB")] pub type Data2Hcmb = crate::Reg; #[doc = "CAN Frame Data Word 2"] pub mod data2_hcmb; -#[doc = "DATA1_HCMB (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data1_hcmb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data1_hcmb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data1_hcmb`] -module"] +#[doc = "DATA1_HCMB (rw) register accessor: CAN Frame Data Word 2\n\nYou can [`read`](crate::Reg::read) this register and get [`data1_hcmb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data1_hcmb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data1_hcmb`] module"] #[doc(alias = "DATA1_HCMB")] pub type Data1Hcmb = crate::Reg; #[doc = "CAN Frame Data Word 2"] pub mod data1_hcmb; -#[doc = "DATA0_HCMB (rw) register accessor: CAN Frame Data Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`data0_hcmb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data0_hcmb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data0_hcmb`] -module"] +#[doc = "DATA0_HCMB (rw) register accessor: CAN Frame Data Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`data0_hcmb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data0_hcmb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data0_hcmb`] module"] #[doc(alias = "DATA0_HCMB")] pub type Data0Hcmb = crate::Reg; #[doc = "CAN Frame Data Word 0"] pub mod data0_hcmb; -#[doc = "ID0_HCMB (rw) register accessor: CAN Frame Identifier Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`id0_hcmb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id0_hcmb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id0_hcmb`] -module"] +#[doc = "ID0_HCMB (rw) register accessor: CAN Frame Identifier Word 0\n\nYou can [`read`](crate::Reg::read) this register and get [`id0_hcmb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id0_hcmb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id0_hcmb`] module"] #[doc(alias = "ID0_HCMB")] pub type Id0Hcmb = crate::Reg; #[doc = "CAN Frame Identifier Word 0"] pub mod id0_hcmb; -#[doc = "ID1_HCMB (rw) register accessor: CAN Frame Identifier Word 1\n\nYou can [`read`](crate::Reg::read) this register and get [`id1_hcmb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id1_hcmb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id1_hcmb`] -module"] +#[doc = "ID1_HCMB (rw) register accessor: CAN Frame Identifier Word 1\n\nYou can [`read`](crate::Reg::read) this register and get [`id1_hcmb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id1_hcmb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id1_hcmb`] module"] #[doc(alias = "ID1_HCMB")] pub type Id1Hcmb = crate::Reg; #[doc = "CAN Frame Identifier Word 1"] pub mod id1_hcmb; -#[doc = "CGCR (rw) register accessor: CAN Global Configuration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cgcr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cgcr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cgcr`] -module"] +#[doc = "CGCR (rw) register accessor: CAN Global Configuration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cgcr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cgcr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cgcr`] module"] #[doc(alias = "CGCR")] pub type Cgcr = crate::Reg; #[doc = "CAN Global Configuration Register"] pub mod cgcr; -#[doc = "CTIM (rw) register accessor: CAN Timing Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ctim::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctim::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctim`] -module"] +#[doc = "CTIM (rw) register accessor: CAN Timing Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ctim::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctim::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctim`] module"] #[doc(alias = "CTIM")] pub type Ctim = crate::Reg; #[doc = "CAN Timing Register"] pub mod ctim; -#[doc = "GMSKX (rw) register accessor: CAN Global Mask Extension\n\nYou can [`read`](crate::Reg::read) this register and get [`gmskx::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gmskx::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gmskx`] -module"] +#[doc = "GMSKX (rw) register accessor: CAN Global Mask Extension\n\nYou can [`read`](crate::Reg::read) this register and get [`gmskx::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gmskx::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gmskx`] module"] #[doc(alias = "GMSKX")] pub type Gmskx = crate::Reg; #[doc = "CAN Global Mask Extension"] pub mod gmskx; -#[doc = "GMSKB (rw) register accessor: CAN Global Mask Base\n\nYou can [`read`](crate::Reg::read) this register and get [`gmskb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gmskb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gmskb`] -module"] +#[doc = "GMSKB (rw) register accessor: CAN Global Mask Base\n\nYou can [`read`](crate::Reg::read) this register and get [`gmskb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gmskb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gmskb`] module"] #[doc(alias = "GMSKB")] pub type Gmskb = crate::Reg; #[doc = "CAN Global Mask Base"] pub mod gmskb; -#[doc = "BMSKX (rw) register accessor: CAN Basic Mask Extension\n\nYou can [`read`](crate::Reg::read) this register and get [`bmskx::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bmskx::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bmskx`] -module"] +#[doc = "BMSKX (rw) register accessor: CAN Basic Mask Extension\n\nYou can [`read`](crate::Reg::read) this register and get [`bmskx::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bmskx::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bmskx`] module"] #[doc(alias = "BMSKX")] pub type Bmskx = crate::Reg; #[doc = "CAN Basic Mask Extension"] pub mod bmskx; -#[doc = "BMSKB (rw) register accessor: CAN Basic Mask Base\n\nYou can [`read`](crate::Reg::read) this register and get [`bmskb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bmskb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bmskb`] -module"] +#[doc = "BMSKB (rw) register accessor: CAN Basic Mask Base\n\nYou can [`read`](crate::Reg::read) this register and get [`bmskb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bmskb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bmskb`] module"] #[doc(alias = "BMSKB")] pub type Bmskb = crate::Reg; #[doc = "CAN Basic Mask Base"] pub mod bmskb; -#[doc = "CIEN (rw) register accessor: CAN Interrupt Enable Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cien`] -module"] +#[doc = "CIEN (rw) register accessor: CAN Interrupt Enable Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cien`] module"] #[doc(alias = "CIEN")] pub type Cien = crate::Reg; #[doc = "CAN Interrupt Enable Register"] pub mod cien; -#[doc = "CIPND (rw) register accessor: CAN Interrupt Pending Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cipnd::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cipnd::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cipnd`] -module"] +#[doc = "CIPND (rw) register accessor: CAN Interrupt Pending Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cipnd::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cipnd::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cipnd`] module"] #[doc(alias = "CIPND")] pub type Cipnd = crate::Reg; #[doc = "CAN Interrupt Pending Register"] pub mod cipnd; -#[doc = "CICLR (rw) register accessor: CAN Interrupt Clear Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ciclr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ciclr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ciclr`] -module"] +#[doc = "CICLR (rw) register accessor: CAN Interrupt Clear Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ciclr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ciclr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ciclr`] module"] #[doc(alias = "CICLR")] pub type Ciclr = crate::Reg; #[doc = "CAN Interrupt Clear Register"] pub mod ciclr; -#[doc = "CICEN (rw) register accessor: CAN Interrupt Code Enable Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cicen::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cicen::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cicen`] -module"] +#[doc = "CICEN (rw) register accessor: CAN Interrupt Code Enable Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cicen::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cicen::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cicen`] module"] #[doc(alias = "CICEN")] pub type Cicen = crate::Reg; #[doc = "CAN Interrupt Code Enable Register"] pub mod cicen; -#[doc = "CSTPND (rw) register accessor: CAN Status Pending Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cstpnd::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cstpnd::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cstpnd`] -module"] +#[doc = "CSTPND (rw) register accessor: CAN Status Pending Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cstpnd::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cstpnd::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cstpnd`] module"] #[doc(alias = "CSTPND")] pub type Cstpnd = crate::Reg; #[doc = "CAN Status Pending Register"] pub mod cstpnd; -#[doc = "CANEC (rw) register accessor: CAN Error Counter Register\n\nYou can [`read`](crate::Reg::read) this register and get [`canec::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`canec::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@canec`] -module"] +#[doc = "CANEC (rw) register accessor: CAN Error Counter Register\n\nYou can [`read`](crate::Reg::read) this register and get [`canec::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`canec::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@canec`] module"] #[doc(alias = "CANEC")] pub type Canec = crate::Reg; #[doc = "CAN Error Counter Register"] pub mod canec; -#[doc = "CEDIAG (rw) register accessor: CAN Error Diagnostic Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cediag::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cediag::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cediag`] -module"] +#[doc = "CEDIAG (rw) register accessor: CAN Error Diagnostic Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cediag::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cediag::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cediag`] module"] #[doc(alias = "CEDIAG")] pub type Cediag = crate::Reg; #[doc = "CAN Error Diagnostic Register"] pub mod cediag; -#[doc = "CTMR (rw) register accessor: CAN Timer Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ctmr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctmr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctmr`] -module"] +#[doc = "CTMR (rw) register accessor: CAN Timer Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ctmr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctmr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctmr`] module"] #[doc(alias = "CTMR")] pub type Ctmr = crate::Reg; #[doc = "CAN Timer Register"] diff --git a/va416xx/src/can0/bmskb.rs b/va416xx/src/can0/bmskb.rs index 0b72d13..8c5282b 100644 --- a/va416xx/src/can0/bmskb.rs +++ b/va416xx/src/can0/bmskb.rs @@ -2,13 +2,9 @@ pub type R = crate::R; #[doc = "Register `BMSKB` writer"] pub type W = crate::W; -#[doc = "Field `BM0` reader - BM\\[17:15\\] -- Unused in standard, ID\\[17:15\\] -in extended"] +#[doc = "Field `BM0` reader - BM\\[17:15\\] - Unused in standard, ID\\[17:15\\] in extended"] pub type Bm0R = crate::FieldReader; -#[doc = "Field `BM0` writer - BM\\[17:15\\] -- Unused in standard, ID\\[17:15\\] -in extended"] +#[doc = "Field `BM0` writer - BM\\[17:15\\] - Unused in standard, ID\\[17:15\\] in extended"] pub type Bm0W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `IDE` reader - Identifier Extension Bit"] pub type IdeR = crate::BitReader; @@ -18,20 +14,12 @@ pub type IdeW<'a, REG> = crate::BitWriter<'a, REG>; pub type RtrR = crate::BitReader; #[doc = "Field `RTR` writer - Remote Transmission Request in Standard, Substitute Remote Request (SRR) in extended"] pub type RtrW<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `BM1` reader - BM\\[28:18\\] -- ID\\[10:0\\] -in standard, ID\\[28:18\\] -in extended"] +#[doc = "Field `BM1` reader - BM\\[28:18\\] - ID\\[10:0\\] in standard, ID\\[28:18\\] in extended"] pub type Bm1R = crate::FieldReader; -#[doc = "Field `BM1` writer - BM\\[28:18\\] -- ID\\[10:0\\] -in standard, ID\\[28:18\\] -in extended"] +#[doc = "Field `BM1` writer - BM\\[28:18\\] - ID\\[10:0\\] in standard, ID\\[28:18\\] in extended"] pub type Bm1W<'a, REG> = crate::FieldWriter<'a, REG, 11, u16>; impl R { - #[doc = "Bits 0:2 - BM\\[17:15\\] -- Unused in standard, ID\\[17:15\\] -in extended"] + #[doc = "Bits 0:2 - BM\\[17:15\\] - Unused in standard, ID\\[17:15\\] in extended"] #[inline(always)] pub fn bm0(&self) -> Bm0R { Bm0R::new((self.bits & 7) as u8) @@ -46,39 +34,31 @@ in extended"] pub fn rtr(&self) -> RtrR { RtrR::new(((self.bits >> 4) & 1) != 0) } - #[doc = "Bits 5:15 - BM\\[28:18\\] -- ID\\[10:0\\] -in standard, ID\\[28:18\\] -in extended"] + #[doc = "Bits 5:15 - BM\\[28:18\\] - ID\\[10:0\\] in standard, ID\\[28:18\\] in extended"] #[inline(always)] pub fn bm1(&self) -> Bm1R { Bm1R::new(((self.bits >> 5) & 0x07ff) as u16) } } impl W { - #[doc = "Bits 0:2 - BM\\[17:15\\] -- Unused in standard, ID\\[17:15\\] -in extended"] + #[doc = "Bits 0:2 - BM\\[17:15\\] - Unused in standard, ID\\[17:15\\] in extended"] #[inline(always)] - pub fn bm0(&mut self) -> Bm0W { + pub fn bm0(&mut self) -> Bm0W<'_, BmskbSpec> { Bm0W::new(self, 0) } #[doc = "Bit 3 - Identifier Extension Bit"] #[inline(always)] - pub fn ide(&mut self) -> IdeW { + pub fn ide(&mut self) -> IdeW<'_, BmskbSpec> { IdeW::new(self, 3) } #[doc = "Bit 4 - Remote Transmission Request in Standard, Substitute Remote Request (SRR) in extended"] #[inline(always)] - pub fn rtr(&mut self) -> RtrW { + pub fn rtr(&mut self) -> RtrW<'_, BmskbSpec> { RtrW::new(self, 4) } - #[doc = "Bits 5:15 - BM\\[28:18\\] -- ID\\[10:0\\] -in standard, ID\\[28:18\\] -in extended"] + #[doc = "Bits 5:15 - BM\\[28:18\\] - ID\\[10:0\\] in standard, ID\\[28:18\\] in extended"] #[inline(always)] - pub fn bm1(&mut self) -> Bm1W { + pub fn bm1(&mut self) -> Bm1W<'_, BmskbSpec> { Bm1W::new(self, 5) } } @@ -92,10 +72,6 @@ impl crate::Readable for BmskbSpec {} #[doc = "`write(|w| ..)` method takes [`bmskb::W`](W) writer structure"] impl crate::Writable for BmskbSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets BMSKB to value 0"] -impl crate::Resettable for BmskbSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for BmskbSpec {} diff --git a/va416xx/src/can0/bmskx.rs b/va416xx/src/can0/bmskx.rs index 8dc59e4..99bd604 100644 --- a/va416xx/src/can0/bmskx.rs +++ b/va416xx/src/can0/bmskx.rs @@ -6,13 +6,9 @@ pub type W = crate::W; pub type XrtrR = crate::BitReader; #[doc = "Field `XRTR` writer - Extended Remote transmission Request Bit"] pub type XrtrW<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `BM` reader - BM\\[14:0\\] -used when an extended frame is received. ID\\[14:0\\] -in extended, unused standard"] +#[doc = "Field `BM` reader - BM\\[14:0\\] used when an extended frame is received. ID\\[14:0\\] in extended, unused standard"] pub type BmR = crate::FieldReader; -#[doc = "Field `BM` writer - BM\\[14:0\\] -used when an extended frame is received. ID\\[14:0\\] -in extended, unused standard"] +#[doc = "Field `BM` writer - BM\\[14:0\\] used when an extended frame is received. ID\\[14:0\\] in extended, unused standard"] pub type BmW<'a, REG> = crate::FieldWriter<'a, REG, 15, u16>; impl R { #[doc = "Bit 0 - Extended Remote transmission Request Bit"] @@ -20,9 +16,7 @@ impl R { pub fn xrtr(&self) -> XrtrR { XrtrR::new((self.bits & 1) != 0) } - #[doc = "Bits 1:15 - BM\\[14:0\\] -used when an extended frame is received. ID\\[14:0\\] -in extended, unused standard"] + #[doc = "Bits 1:15 - BM\\[14:0\\] used when an extended frame is received. ID\\[14:0\\] in extended, unused standard"] #[inline(always)] pub fn bm(&self) -> BmR { BmR::new(((self.bits >> 1) & 0x7fff) as u16) @@ -31,14 +25,12 @@ in extended, unused standard"] impl W { #[doc = "Bit 0 - Extended Remote transmission Request Bit"] #[inline(always)] - pub fn xrtr(&mut self) -> XrtrW { + pub fn xrtr(&mut self) -> XrtrW<'_, BmskxSpec> { XrtrW::new(self, 0) } - #[doc = "Bits 1:15 - BM\\[14:0\\] -used when an extended frame is received. ID\\[14:0\\] -in extended, unused standard"] + #[doc = "Bits 1:15 - BM\\[14:0\\] used when an extended frame is received. ID\\[14:0\\] in extended, unused standard"] #[inline(always)] - pub fn bm(&mut self) -> BmW { + pub fn bm(&mut self) -> BmW<'_, BmskxSpec> { BmW::new(self, 1) } } @@ -52,10 +44,6 @@ impl crate::Readable for BmskxSpec {} #[doc = "`write(|w| ..)` method takes [`bmskx::W`](W) writer structure"] impl crate::Writable for BmskxSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets BMSKX to value 0"] -impl crate::Resettable for BmskxSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for BmskxSpec {} diff --git a/va416xx/src/can0/canec.rs b/va416xx/src/can0/canec.rs index 4ed09b9..18f9ac1 100644 --- a/va416xx/src/can0/canec.rs +++ b/va416xx/src/can0/canec.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:7 - Transmit Error Counter"] #[inline(always)] - pub fn tec(&mut self) -> TecW { + pub fn tec(&mut self) -> TecW<'_, CanecSpec> { TecW::new(self, 0) } #[doc = "Bits 8:15 - Receive Error Counter"] #[inline(always)] - pub fn rec(&mut self) -> RecW { + pub fn rec(&mut self) -> RecW<'_, CanecSpec> { RecW::new(self, 8) } } @@ -44,10 +44,6 @@ impl crate::Readable for CanecSpec {} #[doc = "`write(|w| ..)` method takes [`canec::W`](W) writer structure"] impl crate::Writable for CanecSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CANEC to value 0"] -impl crate::Resettable for CanecSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for CanecSpec {} diff --git a/va416xx/src/can0/cediag.rs b/va416xx/src/can0/cediag.rs index e58bb8e..71e301d 100644 --- a/va416xx/src/can0/cediag.rs +++ b/va416xx/src/can0/cediag.rs @@ -70,37 +70,37 @@ impl R { impl W { #[doc = "Bits 0:3 - Error Field Identifier"] #[inline(always)] - pub fn efid(&mut self) -> EfidW { + pub fn efid(&mut self) -> EfidW<'_, CediagSpec> { EfidW::new(self, 0) } #[doc = "Bits 4:9 - Error Bit Identifier"] #[inline(always)] - pub fn ebid(&mut self) -> EbidW { + pub fn ebid(&mut self) -> EbidW<'_, CediagSpec> { EbidW::new(self, 4) } #[doc = "Bit 10 - Transmit Error"] #[inline(always)] - pub fn txe(&mut self) -> TxeW { + pub fn txe(&mut self) -> TxeW<'_, CediagSpec> { TxeW::new(self, 10) } #[doc = "Bit 11 - Stuff Error"] #[inline(always)] - pub fn stuff(&mut self) -> StuffW { + pub fn stuff(&mut self) -> StuffW<'_, CediagSpec> { StuffW::new(self, 11) } #[doc = "Bit 12 - CRC"] #[inline(always)] - pub fn crc(&mut self) -> CrcW { + pub fn crc(&mut self) -> CrcW<'_, CediagSpec> { CrcW::new(self, 12) } #[doc = "Bit 13 - Monitor"] #[inline(always)] - pub fn mon(&mut self) -> MonW { + pub fn mon(&mut self) -> MonW<'_, CediagSpec> { MonW::new(self, 13) } #[doc = "Bit 14 - Drive"] #[inline(always)] - pub fn drive(&mut self) -> DriveW { + pub fn drive(&mut self) -> DriveW<'_, CediagSpec> { DriveW::new(self, 14) } } @@ -114,10 +114,6 @@ impl crate::Readable for CediagSpec {} #[doc = "`write(|w| ..)` method takes [`cediag::W`](W) writer structure"] impl crate::Writable for CediagSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CEDIAG to value 0"] -impl crate::Resettable for CediagSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for CediagSpec {} diff --git a/va416xx/src/can0/cgcr.rs b/va416xx/src/can0/cgcr.rs index fe62e09..44604ff 100644 --- a/va416xx/src/can0/cgcr.rs +++ b/va416xx/src/can0/cgcr.rs @@ -115,62 +115,62 @@ impl R { impl W { #[doc = "Bit 0 - CAN Enable"] #[inline(always)] - pub fn canen(&mut self) -> CanenW { + pub fn canen(&mut self) -> CanenW<'_, CgcrSpec> { CanenW::new(self, 0) } #[doc = "Bit 1 - RW,Control Receive"] #[inline(always)] - pub fn crx(&mut self) -> CrxW { + pub fn crx(&mut self) -> CrxW<'_, CgcrSpec> { CrxW::new(self, 1) } #[doc = "Bit 2 - RW,Control Transmit"] #[inline(always)] - pub fn ctx(&mut self) -> CtxW { + pub fn ctx(&mut self) -> CtxW<'_, CgcrSpec> { CtxW::new(self, 2) } #[doc = "Bit 3 - Buffer Lock"] #[inline(always)] - pub fn bufflock(&mut self) -> BufflockW { + pub fn bufflock(&mut self) -> BufflockW<'_, CgcrSpec> { BufflockW::new(self, 3) } #[doc = "Bit 4 - Time Sync Enable"] #[inline(always)] - pub fn tstpen(&mut self) -> TstpenW { + pub fn tstpen(&mut self) -> TstpenW<'_, CgcrSpec> { TstpenW::new(self, 4) } #[doc = "Bit 5 - Data Direction"] #[inline(always)] - pub fn ddir(&mut self) -> DdirW { + pub fn ddir(&mut self) -> DdirW<'_, CgcrSpec> { DdirW::new(self, 5) } #[doc = "Bit 6 - Listen Only"] #[inline(always)] - pub fn lo(&mut self) -> LoW { + pub fn lo(&mut self) -> LoW<'_, CgcrSpec> { LoW::new(self, 6) } #[doc = "Bit 7 - Ignore Acknowledge"] #[inline(always)] - pub fn ignack(&mut self) -> IgnackW { + pub fn ignack(&mut self) -> IgnackW<'_, CgcrSpec> { IgnackW::new(self, 7) } #[doc = "Bit 8 - Loopback"] #[inline(always)] - pub fn loopback(&mut self) -> LoopbackW { + pub fn loopback(&mut self) -> LoopbackW<'_, CgcrSpec> { LoopbackW::new(self, 8) } #[doc = "Bit 9 - Internal"] #[inline(always)] - pub fn internal(&mut self) -> InternalW { + pub fn internal(&mut self) -> InternalW<'_, CgcrSpec> { InternalW::new(self, 9) } #[doc = "Bit 10 - Diagnostic Enable"] #[inline(always)] - pub fn diagen(&mut self) -> DiagenW { + pub fn diagen(&mut self) -> DiagenW<'_, CgcrSpec> { DiagenW::new(self, 10) } #[doc = "Bit 11 - Error Interrupt Type"] #[inline(always)] - pub fn eit(&mut self) -> EitW { + pub fn eit(&mut self) -> EitW<'_, CgcrSpec> { EitW::new(self, 11) } } @@ -184,10 +184,6 @@ impl crate::Readable for CgcrSpec {} #[doc = "`write(|w| ..)` method takes [`cgcr::W`](W) writer structure"] impl crate::Writable for CgcrSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CGCR to value 0"] -impl crate::Resettable for CgcrSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for CgcrSpec {} diff --git a/va416xx/src/can0/cicen.rs b/va416xx/src/can0/cicen.rs index d8045f8..9f623fa 100644 --- a/va416xx/src/can0/cicen.rs +++ b/va416xx/src/can0/cicen.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:14 - Buffer Interrupt Code Enable\\[14:0\\]"] #[inline(always)] - pub fn icen(&mut self) -> IcenW { + pub fn icen(&mut self) -> IcenW<'_, CicenSpec> { IcenW::new(self, 0) } #[doc = "Bit 15 - Error Interrupt Code Enable"] #[inline(always)] - pub fn eicen(&mut self) -> EicenW { + pub fn eicen(&mut self) -> EicenW<'_, CicenSpec> { EicenW::new(self, 15) } } @@ -44,10 +44,6 @@ impl crate::Readable for CicenSpec {} #[doc = "`write(|w| ..)` method takes [`cicen::W`](W) writer structure"] impl crate::Writable for CicenSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CICEN to value 0"] -impl crate::Resettable for CicenSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for CicenSpec {} diff --git a/va416xx/src/can0/ciclr.rs b/va416xx/src/can0/ciclr.rs index 7320e55..0ba3233 100644 --- a/va416xx/src/can0/ciclr.rs +++ b/va416xx/src/can0/ciclr.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:14 - Buffer Interrupt Clear\\[14:0\\]"] #[inline(always)] - pub fn iclr(&mut self) -> IclrW { + pub fn iclr(&mut self) -> IclrW<'_, CiclrSpec> { IclrW::new(self, 0) } #[doc = "Bit 15 - Error Interrupt Clear"] #[inline(always)] - pub fn eiclr(&mut self) -> EiclrW { + pub fn eiclr(&mut self) -> EiclrW<'_, CiclrSpec> { EiclrW::new(self, 15) } } @@ -44,10 +44,6 @@ impl crate::Readable for CiclrSpec {} #[doc = "`write(|w| ..)` method takes [`ciclr::W`](W) writer structure"] impl crate::Writable for CiclrSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CICLR to value 0"] -impl crate::Resettable for CiclrSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for CiclrSpec {} diff --git a/va416xx/src/can0/cien.rs b/va416xx/src/can0/cien.rs index 894b919..0cdb063 100644 --- a/va416xx/src/can0/cien.rs +++ b/va416xx/src/can0/cien.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:14 - Buffer Interrupt Enable\\[14:0\\]"] #[inline(always)] - pub fn ien(&mut self) -> IenW { + pub fn ien(&mut self) -> IenW<'_, CienSpec> { IenW::new(self, 0) } #[doc = "Bit 15 - Error Interrupt Enable"] #[inline(always)] - pub fn eien(&mut self) -> EienW { + pub fn eien(&mut self) -> EienW<'_, CienSpec> { EienW::new(self, 15) } } @@ -44,10 +44,6 @@ impl crate::Readable for CienSpec {} #[doc = "`write(|w| ..)` method takes [`cien::W`](W) writer structure"] impl crate::Writable for CienSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CIEN to value 0"] -impl crate::Resettable for CienSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for CienSpec {} diff --git a/va416xx/src/can0/cipnd.rs b/va416xx/src/can0/cipnd.rs index 5ee5d74..224864e 100644 --- a/va416xx/src/can0/cipnd.rs +++ b/va416xx/src/can0/cipnd.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:14 - Buffer Interrupt Pending\\[14:0\\]"] #[inline(always)] - pub fn ipnd(&mut self) -> IpndW { + pub fn ipnd(&mut self) -> IpndW<'_, CipndSpec> { IpndW::new(self, 0) } #[doc = "Bit 15 - Error Interrupt Pending"] #[inline(always)] - pub fn eipnd(&mut self) -> EipndW { + pub fn eipnd(&mut self) -> EipndW<'_, CipndSpec> { EipndW::new(self, 15) } } @@ -44,10 +44,6 @@ impl crate::Readable for CipndSpec {} #[doc = "`write(|w| ..)` method takes [`cipnd::W`](W) writer structure"] impl crate::Writable for CipndSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CIPND to value 0"] -impl crate::Resettable for CipndSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for CipndSpec {} diff --git a/va416xx/src/can0/cnstat_cmb0.rs b/va416xx/src/can0/cnstat_cmb0.rs index 9b051e8..586e3d4 100644 --- a/va416xx/src/can0/cnstat_cmb0.rs +++ b/va416xx/src/can0/cnstat_cmb0.rs @@ -34,17 +34,17 @@ impl R { impl W { #[doc = "Bits 0:3 - Buffer Status"] #[inline(always)] - pub fn st(&mut self) -> StW { + pub fn st(&mut self) -> StW<'_, CnstatCmb0Spec> { StW::new(self, 0) } #[doc = "Bits 4:7 - Transmit Priority Code"] #[inline(always)] - pub fn pri(&mut self) -> PriW { + pub fn pri(&mut self) -> PriW<'_, CnstatCmb0Spec> { PriW::new(self, 4) } #[doc = "Bits 12:15 - Data Length Code"] #[inline(always)] - pub fn dlc(&mut self) -> DlcW { + pub fn dlc(&mut self) -> DlcW<'_, CnstatCmb0Spec> { DlcW::new(self, 12) } } @@ -58,10 +58,6 @@ impl crate::Readable for CnstatCmb0Spec {} #[doc = "`write(|w| ..)` method takes [`cnstat_cmb0::W`](W) writer structure"] impl crate::Writable for CnstatCmb0Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CNSTAT_CMB0 to value 0"] -impl crate::Resettable for CnstatCmb0Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for CnstatCmb0Spec {} diff --git a/va416xx/src/can0/cnstat_cmb1.rs b/va416xx/src/can0/cnstat_cmb1.rs index ef01f6d..8885e06 100644 --- a/va416xx/src/can0/cnstat_cmb1.rs +++ b/va416xx/src/can0/cnstat_cmb1.rs @@ -34,17 +34,17 @@ impl R { impl W { #[doc = "Bits 0:3 - Buffer Status"] #[inline(always)] - pub fn st(&mut self) -> StW { + pub fn st(&mut self) -> StW<'_, CnstatCmb1Spec> { StW::new(self, 0) } #[doc = "Bits 4:7 - Transmit Priority Code"] #[inline(always)] - pub fn pri(&mut self) -> PriW { + pub fn pri(&mut self) -> PriW<'_, CnstatCmb1Spec> { PriW::new(self, 4) } #[doc = "Bits 12:15 - Data Length Code"] #[inline(always)] - pub fn dlc(&mut self) -> DlcW { + pub fn dlc(&mut self) -> DlcW<'_, CnstatCmb1Spec> { DlcW::new(self, 12) } } @@ -58,10 +58,6 @@ impl crate::Readable for CnstatCmb1Spec {} #[doc = "`write(|w| ..)` method takes [`cnstat_cmb1::W`](W) writer structure"] impl crate::Writable for CnstatCmb1Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CNSTAT_CMB1 to value 0"] -impl crate::Resettable for CnstatCmb1Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for CnstatCmb1Spec {} diff --git a/va416xx/src/can0/cnstat_cmb10.rs b/va416xx/src/can0/cnstat_cmb10.rs index 745adb2..95418ec 100644 --- a/va416xx/src/can0/cnstat_cmb10.rs +++ b/va416xx/src/can0/cnstat_cmb10.rs @@ -34,17 +34,17 @@ impl R { impl W { #[doc = "Bits 0:3 - Buffer Status"] #[inline(always)] - pub fn st(&mut self) -> StW { + pub fn st(&mut self) -> StW<'_, CnstatCmb10Spec> { StW::new(self, 0) } #[doc = "Bits 4:7 - Transmit Priority Code"] #[inline(always)] - pub fn pri(&mut self) -> PriW { + pub fn pri(&mut self) -> PriW<'_, CnstatCmb10Spec> { PriW::new(self, 4) } #[doc = "Bits 12:15 - Data Length Code"] #[inline(always)] - pub fn dlc(&mut self) -> DlcW { + pub fn dlc(&mut self) -> DlcW<'_, CnstatCmb10Spec> { DlcW::new(self, 12) } } @@ -58,10 +58,6 @@ impl crate::Readable for CnstatCmb10Spec {} #[doc = "`write(|w| ..)` method takes [`cnstat_cmb10::W`](W) writer structure"] impl crate::Writable for CnstatCmb10Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CNSTAT_CMB10 to value 0"] -impl crate::Resettable for CnstatCmb10Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for CnstatCmb10Spec {} diff --git a/va416xx/src/can0/cnstat_cmb11.rs b/va416xx/src/can0/cnstat_cmb11.rs index 2707985..b7f689e 100644 --- a/va416xx/src/can0/cnstat_cmb11.rs +++ b/va416xx/src/can0/cnstat_cmb11.rs @@ -34,17 +34,17 @@ impl R { impl W { #[doc = "Bits 0:3 - Buffer Status"] #[inline(always)] - pub fn st(&mut self) -> StW { + pub fn st(&mut self) -> StW<'_, CnstatCmb11Spec> { StW::new(self, 0) } #[doc = "Bits 4:7 - Transmit Priority Code"] #[inline(always)] - pub fn pri(&mut self) -> PriW { + pub fn pri(&mut self) -> PriW<'_, CnstatCmb11Spec> { PriW::new(self, 4) } #[doc = "Bits 12:15 - Data Length Code"] #[inline(always)] - pub fn dlc(&mut self) -> DlcW { + pub fn dlc(&mut self) -> DlcW<'_, CnstatCmb11Spec> { DlcW::new(self, 12) } } @@ -58,10 +58,6 @@ impl crate::Readable for CnstatCmb11Spec {} #[doc = "`write(|w| ..)` method takes [`cnstat_cmb11::W`](W) writer structure"] impl crate::Writable for CnstatCmb11Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CNSTAT_CMB11 to value 0"] -impl crate::Resettable for CnstatCmb11Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for CnstatCmb11Spec {} diff --git a/va416xx/src/can0/cnstat_cmb12.rs b/va416xx/src/can0/cnstat_cmb12.rs index 01829db..3fabc9f 100644 --- a/va416xx/src/can0/cnstat_cmb12.rs +++ b/va416xx/src/can0/cnstat_cmb12.rs @@ -34,17 +34,17 @@ impl R { impl W { #[doc = "Bits 0:3 - Buffer Status"] #[inline(always)] - pub fn st(&mut self) -> StW { + pub fn st(&mut self) -> StW<'_, CnstatCmb12Spec> { StW::new(self, 0) } #[doc = "Bits 4:7 - Transmit Priority Code"] #[inline(always)] - pub fn pri(&mut self) -> PriW { + pub fn pri(&mut self) -> PriW<'_, CnstatCmb12Spec> { PriW::new(self, 4) } #[doc = "Bits 12:15 - Data Length Code"] #[inline(always)] - pub fn dlc(&mut self) -> DlcW { + pub fn dlc(&mut self) -> DlcW<'_, CnstatCmb12Spec> { DlcW::new(self, 12) } } @@ -58,10 +58,6 @@ impl crate::Readable for CnstatCmb12Spec {} #[doc = "`write(|w| ..)` method takes [`cnstat_cmb12::W`](W) writer structure"] impl crate::Writable for CnstatCmb12Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CNSTAT_CMB12 to value 0"] -impl crate::Resettable for CnstatCmb12Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for CnstatCmb12Spec {} diff --git a/va416xx/src/can0/cnstat_cmb13.rs b/va416xx/src/can0/cnstat_cmb13.rs index 9b4a196..88a8e63 100644 --- a/va416xx/src/can0/cnstat_cmb13.rs +++ b/va416xx/src/can0/cnstat_cmb13.rs @@ -34,17 +34,17 @@ impl R { impl W { #[doc = "Bits 0:3 - Buffer Status"] #[inline(always)] - pub fn st(&mut self) -> StW { + pub fn st(&mut self) -> StW<'_, CnstatCmb13Spec> { StW::new(self, 0) } #[doc = "Bits 4:7 - Transmit Priority Code"] #[inline(always)] - pub fn pri(&mut self) -> PriW { + pub fn pri(&mut self) -> PriW<'_, CnstatCmb13Spec> { PriW::new(self, 4) } #[doc = "Bits 12:15 - Data Length Code"] #[inline(always)] - pub fn dlc(&mut self) -> DlcW { + pub fn dlc(&mut self) -> DlcW<'_, CnstatCmb13Spec> { DlcW::new(self, 12) } } @@ -58,10 +58,6 @@ impl crate::Readable for CnstatCmb13Spec {} #[doc = "`write(|w| ..)` method takes [`cnstat_cmb13::W`](W) writer structure"] impl crate::Writable for CnstatCmb13Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CNSTAT_CMB13 to value 0"] -impl crate::Resettable for CnstatCmb13Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for CnstatCmb13Spec {} diff --git a/va416xx/src/can0/cnstat_cmb14.rs b/va416xx/src/can0/cnstat_cmb14.rs index ac4bbd8..4c68312 100644 --- a/va416xx/src/can0/cnstat_cmb14.rs +++ b/va416xx/src/can0/cnstat_cmb14.rs @@ -34,17 +34,17 @@ impl R { impl W { #[doc = "Bits 0:3 - Buffer Status"] #[inline(always)] - pub fn st(&mut self) -> StW { + pub fn st(&mut self) -> StW<'_, CnstatCmb14Spec> { StW::new(self, 0) } #[doc = "Bits 4:7 - Transmit Priority Code"] #[inline(always)] - pub fn pri(&mut self) -> PriW { + pub fn pri(&mut self) -> PriW<'_, CnstatCmb14Spec> { PriW::new(self, 4) } #[doc = "Bits 12:15 - Data Length Code"] #[inline(always)] - pub fn dlc(&mut self) -> DlcW { + pub fn dlc(&mut self) -> DlcW<'_, CnstatCmb14Spec> { DlcW::new(self, 12) } } @@ -58,10 +58,6 @@ impl crate::Readable for CnstatCmb14Spec {} #[doc = "`write(|w| ..)` method takes [`cnstat_cmb14::W`](W) writer structure"] impl crate::Writable for CnstatCmb14Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CNSTAT_CMB14 to value 0"] -impl crate::Resettable for CnstatCmb14Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for CnstatCmb14Spec {} diff --git a/va416xx/src/can0/cnstat_cmb2.rs b/va416xx/src/can0/cnstat_cmb2.rs index f9a6b31..26eeb12 100644 --- a/va416xx/src/can0/cnstat_cmb2.rs +++ b/va416xx/src/can0/cnstat_cmb2.rs @@ -34,17 +34,17 @@ impl R { impl W { #[doc = "Bits 0:3 - Buffer Status"] #[inline(always)] - pub fn st(&mut self) -> StW { + pub fn st(&mut self) -> StW<'_, CnstatCmb2Spec> { StW::new(self, 0) } #[doc = "Bits 4:7 - Transmit Priority Code"] #[inline(always)] - pub fn pri(&mut self) -> PriW { + pub fn pri(&mut self) -> PriW<'_, CnstatCmb2Spec> { PriW::new(self, 4) } #[doc = "Bits 12:15 - Data Length Code"] #[inline(always)] - pub fn dlc(&mut self) -> DlcW { + pub fn dlc(&mut self) -> DlcW<'_, CnstatCmb2Spec> { DlcW::new(self, 12) } } @@ -58,10 +58,6 @@ impl crate::Readable for CnstatCmb2Spec {} #[doc = "`write(|w| ..)` method takes [`cnstat_cmb2::W`](W) writer structure"] impl crate::Writable for CnstatCmb2Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CNSTAT_CMB2 to value 0"] -impl crate::Resettable for CnstatCmb2Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for CnstatCmb2Spec {} diff --git a/va416xx/src/can0/cnstat_cmb3.rs b/va416xx/src/can0/cnstat_cmb3.rs index 5a882c8..7bce684 100644 --- a/va416xx/src/can0/cnstat_cmb3.rs +++ b/va416xx/src/can0/cnstat_cmb3.rs @@ -34,17 +34,17 @@ impl R { impl W { #[doc = "Bits 0:3 - Buffer Status"] #[inline(always)] - pub fn st(&mut self) -> StW { + pub fn st(&mut self) -> StW<'_, CnstatCmb3Spec> { StW::new(self, 0) } #[doc = "Bits 4:7 - Transmit Priority Code"] #[inline(always)] - pub fn pri(&mut self) -> PriW { + pub fn pri(&mut self) -> PriW<'_, CnstatCmb3Spec> { PriW::new(self, 4) } #[doc = "Bits 12:15 - Data Length Code"] #[inline(always)] - pub fn dlc(&mut self) -> DlcW { + pub fn dlc(&mut self) -> DlcW<'_, CnstatCmb3Spec> { DlcW::new(self, 12) } } @@ -58,10 +58,6 @@ impl crate::Readable for CnstatCmb3Spec {} #[doc = "`write(|w| ..)` method takes [`cnstat_cmb3::W`](W) writer structure"] impl crate::Writable for CnstatCmb3Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CNSTAT_CMB3 to value 0"] -impl crate::Resettable for CnstatCmb3Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for CnstatCmb3Spec {} diff --git a/va416xx/src/can0/cnstat_cmb4.rs b/va416xx/src/can0/cnstat_cmb4.rs index 8e15f47..f8f5811 100644 --- a/va416xx/src/can0/cnstat_cmb4.rs +++ b/va416xx/src/can0/cnstat_cmb4.rs @@ -34,17 +34,17 @@ impl R { impl W { #[doc = "Bits 0:3 - Buffer Status"] #[inline(always)] - pub fn st(&mut self) -> StW { + pub fn st(&mut self) -> StW<'_, CnstatCmb4Spec> { StW::new(self, 0) } #[doc = "Bits 4:7 - Transmit Priority Code"] #[inline(always)] - pub fn pri(&mut self) -> PriW { + pub fn pri(&mut self) -> PriW<'_, CnstatCmb4Spec> { PriW::new(self, 4) } #[doc = "Bits 12:15 - Data Length Code"] #[inline(always)] - pub fn dlc(&mut self) -> DlcW { + pub fn dlc(&mut self) -> DlcW<'_, CnstatCmb4Spec> { DlcW::new(self, 12) } } @@ -58,10 +58,6 @@ impl crate::Readable for CnstatCmb4Spec {} #[doc = "`write(|w| ..)` method takes [`cnstat_cmb4::W`](W) writer structure"] impl crate::Writable for CnstatCmb4Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CNSTAT_CMB4 to value 0"] -impl crate::Resettable for CnstatCmb4Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for CnstatCmb4Spec {} diff --git a/va416xx/src/can0/cnstat_cmb5.rs b/va416xx/src/can0/cnstat_cmb5.rs index 0c2f52b..ae92790 100644 --- a/va416xx/src/can0/cnstat_cmb5.rs +++ b/va416xx/src/can0/cnstat_cmb5.rs @@ -34,17 +34,17 @@ impl R { impl W { #[doc = "Bits 0:3 - Buffer Status"] #[inline(always)] - pub fn st(&mut self) -> StW { + pub fn st(&mut self) -> StW<'_, CnstatCmb5Spec> { StW::new(self, 0) } #[doc = "Bits 4:7 - Transmit Priority Code"] #[inline(always)] - pub fn pri(&mut self) -> PriW { + pub fn pri(&mut self) -> PriW<'_, CnstatCmb5Spec> { PriW::new(self, 4) } #[doc = "Bits 12:15 - Data Length Code"] #[inline(always)] - pub fn dlc(&mut self) -> DlcW { + pub fn dlc(&mut self) -> DlcW<'_, CnstatCmb5Spec> { DlcW::new(self, 12) } } @@ -58,10 +58,6 @@ impl crate::Readable for CnstatCmb5Spec {} #[doc = "`write(|w| ..)` method takes [`cnstat_cmb5::W`](W) writer structure"] impl crate::Writable for CnstatCmb5Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CNSTAT_CMB5 to value 0"] -impl crate::Resettable for CnstatCmb5Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for CnstatCmb5Spec {} diff --git a/va416xx/src/can0/cnstat_cmb6.rs b/va416xx/src/can0/cnstat_cmb6.rs index f35da45..9dc607b 100644 --- a/va416xx/src/can0/cnstat_cmb6.rs +++ b/va416xx/src/can0/cnstat_cmb6.rs @@ -34,17 +34,17 @@ impl R { impl W { #[doc = "Bits 0:3 - Buffer Status"] #[inline(always)] - pub fn st(&mut self) -> StW { + pub fn st(&mut self) -> StW<'_, CnstatCmb6Spec> { StW::new(self, 0) } #[doc = "Bits 4:7 - Transmit Priority Code"] #[inline(always)] - pub fn pri(&mut self) -> PriW { + pub fn pri(&mut self) -> PriW<'_, CnstatCmb6Spec> { PriW::new(self, 4) } #[doc = "Bits 12:15 - Data Length Code"] #[inline(always)] - pub fn dlc(&mut self) -> DlcW { + pub fn dlc(&mut self) -> DlcW<'_, CnstatCmb6Spec> { DlcW::new(self, 12) } } @@ -58,10 +58,6 @@ impl crate::Readable for CnstatCmb6Spec {} #[doc = "`write(|w| ..)` method takes [`cnstat_cmb6::W`](W) writer structure"] impl crate::Writable for CnstatCmb6Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CNSTAT_CMB6 to value 0"] -impl crate::Resettable for CnstatCmb6Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for CnstatCmb6Spec {} diff --git a/va416xx/src/can0/cnstat_cmb7.rs b/va416xx/src/can0/cnstat_cmb7.rs index 215e719..1f441a7 100644 --- a/va416xx/src/can0/cnstat_cmb7.rs +++ b/va416xx/src/can0/cnstat_cmb7.rs @@ -34,17 +34,17 @@ impl R { impl W { #[doc = "Bits 0:3 - Buffer Status"] #[inline(always)] - pub fn st(&mut self) -> StW { + pub fn st(&mut self) -> StW<'_, CnstatCmb7Spec> { StW::new(self, 0) } #[doc = "Bits 4:7 - Transmit Priority Code"] #[inline(always)] - pub fn pri(&mut self) -> PriW { + pub fn pri(&mut self) -> PriW<'_, CnstatCmb7Spec> { PriW::new(self, 4) } #[doc = "Bits 12:15 - Data Length Code"] #[inline(always)] - pub fn dlc(&mut self) -> DlcW { + pub fn dlc(&mut self) -> DlcW<'_, CnstatCmb7Spec> { DlcW::new(self, 12) } } @@ -58,10 +58,6 @@ impl crate::Readable for CnstatCmb7Spec {} #[doc = "`write(|w| ..)` method takes [`cnstat_cmb7::W`](W) writer structure"] impl crate::Writable for CnstatCmb7Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CNSTAT_CMB7 to value 0"] -impl crate::Resettable for CnstatCmb7Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for CnstatCmb7Spec {} diff --git a/va416xx/src/can0/cnstat_cmb8.rs b/va416xx/src/can0/cnstat_cmb8.rs index 031802f..42f104d 100644 --- a/va416xx/src/can0/cnstat_cmb8.rs +++ b/va416xx/src/can0/cnstat_cmb8.rs @@ -34,17 +34,17 @@ impl R { impl W { #[doc = "Bits 0:3 - Buffer Status"] #[inline(always)] - pub fn st(&mut self) -> StW { + pub fn st(&mut self) -> StW<'_, CnstatCmb8Spec> { StW::new(self, 0) } #[doc = "Bits 4:7 - Transmit Priority Code"] #[inline(always)] - pub fn pri(&mut self) -> PriW { + pub fn pri(&mut self) -> PriW<'_, CnstatCmb8Spec> { PriW::new(self, 4) } #[doc = "Bits 12:15 - Data Length Code"] #[inline(always)] - pub fn dlc(&mut self) -> DlcW { + pub fn dlc(&mut self) -> DlcW<'_, CnstatCmb8Spec> { DlcW::new(self, 12) } } @@ -58,10 +58,6 @@ impl crate::Readable for CnstatCmb8Spec {} #[doc = "`write(|w| ..)` method takes [`cnstat_cmb8::W`](W) writer structure"] impl crate::Writable for CnstatCmb8Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CNSTAT_CMB8 to value 0"] -impl crate::Resettable for CnstatCmb8Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for CnstatCmb8Spec {} diff --git a/va416xx/src/can0/cnstat_cmb9.rs b/va416xx/src/can0/cnstat_cmb9.rs index 48e5ef8..0bc36d6 100644 --- a/va416xx/src/can0/cnstat_cmb9.rs +++ b/va416xx/src/can0/cnstat_cmb9.rs @@ -34,17 +34,17 @@ impl R { impl W { #[doc = "Bits 0:3 - Buffer Status"] #[inline(always)] - pub fn st(&mut self) -> StW { + pub fn st(&mut self) -> StW<'_, CnstatCmb9Spec> { StW::new(self, 0) } #[doc = "Bits 4:7 - Transmit Priority Code"] #[inline(always)] - pub fn pri(&mut self) -> PriW { + pub fn pri(&mut self) -> PriW<'_, CnstatCmb9Spec> { PriW::new(self, 4) } #[doc = "Bits 12:15 - Data Length Code"] #[inline(always)] - pub fn dlc(&mut self) -> DlcW { + pub fn dlc(&mut self) -> DlcW<'_, CnstatCmb9Spec> { DlcW::new(self, 12) } } @@ -58,10 +58,6 @@ impl crate::Readable for CnstatCmb9Spec {} #[doc = "`write(|w| ..)` method takes [`cnstat_cmb9::W`](W) writer structure"] impl crate::Writable for CnstatCmb9Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CNSTAT_CMB9 to value 0"] -impl crate::Resettable for CnstatCmb9Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for CnstatCmb9Spec {} diff --git a/va416xx/src/can0/cnstat_hcmb.rs b/va416xx/src/can0/cnstat_hcmb.rs index 370b14a..8a73e64 100644 --- a/va416xx/src/can0/cnstat_hcmb.rs +++ b/va416xx/src/can0/cnstat_hcmb.rs @@ -34,17 +34,17 @@ impl R { impl W { #[doc = "Bits 0:3 - Buffer Status"] #[inline(always)] - pub fn st(&mut self) -> StW { + pub fn st(&mut self) -> StW<'_, CnstatHcmbSpec> { StW::new(self, 0) } #[doc = "Bits 4:7 - Transmit Priority Code"] #[inline(always)] - pub fn pri(&mut self) -> PriW { + pub fn pri(&mut self) -> PriW<'_, CnstatHcmbSpec> { PriW::new(self, 4) } #[doc = "Bits 12:15 - Data Length Code"] #[inline(always)] - pub fn dlc(&mut self) -> DlcW { + pub fn dlc(&mut self) -> DlcW<'_, CnstatHcmbSpec> { DlcW::new(self, 12) } } @@ -58,10 +58,6 @@ impl crate::Readable for CnstatHcmbSpec {} #[doc = "`write(|w| ..)` method takes [`cnstat_hcmb::W`](W) writer structure"] impl crate::Writable for CnstatHcmbSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CNSTAT_HCMB to value 0"] -impl crate::Resettable for CnstatHcmbSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for CnstatHcmbSpec {} diff --git a/va416xx/src/can0/cstpnd.rs b/va416xx/src/can0/cstpnd.rs index 0e8a552..514d5b9 100644 --- a/va416xx/src/can0/cstpnd.rs +++ b/va416xx/src/can0/cstpnd.rs @@ -34,17 +34,17 @@ impl R { impl W { #[doc = "Bits 0:3 - Interrupt Source portion of Interrupt Code"] #[inline(always)] - pub fn ist(&mut self) -> IstW { + pub fn ist(&mut self) -> IstW<'_, CstpndSpec> { IstW::new(self, 0) } #[doc = "Bit 4 - Interrupt Request portion of Interrupt Code"] #[inline(always)] - pub fn irq(&mut self) -> IrqW { + pub fn irq(&mut self) -> IrqW<'_, CstpndSpec> { IrqW::new(self, 4) } #[doc = "Bits 5:7 - CAN Node Status"] #[inline(always)] - pub fn ns(&mut self) -> NsW { + pub fn ns(&mut self) -> NsW<'_, CstpndSpec> { NsW::new(self, 5) } } @@ -58,10 +58,6 @@ impl crate::Readable for CstpndSpec {} #[doc = "`write(|w| ..)` method takes [`cstpnd::W`](W) writer structure"] impl crate::Writable for CstpndSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CSTPND to value 0"] -impl crate::Resettable for CstpndSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for CstpndSpec {} diff --git a/va416xx/src/can0/ctim.rs b/va416xx/src/can0/ctim.rs index c729eb3..b020461 100644 --- a/va416xx/src/can0/ctim.rs +++ b/va416xx/src/can0/ctim.rs @@ -43,22 +43,22 @@ impl R { impl W { #[doc = "Bits 0:2 - Time Segment 2"] #[inline(always)] - pub fn tseg2(&mut self) -> Tseg2W { + pub fn tseg2(&mut self) -> Tseg2W<'_, CtimSpec> { Tseg2W::new(self, 0) } #[doc = "Bits 3:6 - Time Segment 1"] #[inline(always)] - pub fn tseg1(&mut self) -> Tseg1W { + pub fn tseg1(&mut self) -> Tseg1W<'_, CtimSpec> { Tseg1W::new(self, 3) } #[doc = "Bits 7:8 - Synchronization Jump Width"] #[inline(always)] - pub fn sjw(&mut self) -> SjwW { + pub fn sjw(&mut self) -> SjwW<'_, CtimSpec> { SjwW::new(self, 7) } #[doc = "Bits 9:15 - Prescaler Configuration"] #[inline(always)] - pub fn psc(&mut self) -> PscW { + pub fn psc(&mut self) -> PscW<'_, CtimSpec> { PscW::new(self, 9) } } @@ -72,10 +72,6 @@ impl crate::Readable for CtimSpec {} #[doc = "`write(|w| ..)` method takes [`ctim::W`](W) writer structure"] impl crate::Writable for CtimSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTIM to value 0"] -impl crate::Resettable for CtimSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for CtimSpec {} diff --git a/va416xx/src/can0/ctmr.rs b/va416xx/src/can0/ctmr.rs index 457cb46..6439a30 100644 --- a/va416xx/src/can0/ctmr.rs +++ b/va416xx/src/can0/ctmr.rs @@ -22,10 +22,6 @@ impl crate::Readable for CtmrSpec {} #[doc = "`write(|w| ..)` method takes [`ctmr::W`](W) writer structure"] impl crate::Writable for CtmrSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTMR to value 0"] -impl crate::Resettable for CtmrSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for CtmrSpec {} diff --git a/va416xx/src/can0/data0_cmb0.rs b/va416xx/src/can0/data0_cmb0.rs index fc3f7fe..7170a43 100644 --- a/va416xx/src/can0/data0_cmb0.rs +++ b/va416xx/src/can0/data0_cmb0.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:7 - Data Byte 2"] #[inline(always)] - pub fn byte2(&mut self) -> Byte2W { + pub fn byte2(&mut self) -> Byte2W<'_, Data0Cmb0Spec> { Byte2W::new(self, 0) } #[doc = "Bits 8:15 - Data Byte 1"] #[inline(always)] - pub fn byte1(&mut self) -> Byte1W { + pub fn byte1(&mut self) -> Byte1W<'_, Data0Cmb0Spec> { Byte1W::new(self, 8) } } @@ -44,10 +44,6 @@ impl crate::Readable for Data0Cmb0Spec {} #[doc = "`write(|w| ..)` method takes [`data0_cmb0::W`](W) writer structure"] impl crate::Writable for Data0Cmb0Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA0_CMB0 to value 0"] -impl crate::Resettable for Data0Cmb0Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Data0Cmb0Spec {} diff --git a/va416xx/src/can0/data0_cmb1.rs b/va416xx/src/can0/data0_cmb1.rs index 19257bf..7daee0f 100644 --- a/va416xx/src/can0/data0_cmb1.rs +++ b/va416xx/src/can0/data0_cmb1.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:7 - Data Byte 2"] #[inline(always)] - pub fn byte2(&mut self) -> Byte2W { + pub fn byte2(&mut self) -> Byte2W<'_, Data0Cmb1Spec> { Byte2W::new(self, 0) } #[doc = "Bits 8:15 - Data Byte 1"] #[inline(always)] - pub fn byte1(&mut self) -> Byte1W { + pub fn byte1(&mut self) -> Byte1W<'_, Data0Cmb1Spec> { Byte1W::new(self, 8) } } @@ -44,10 +44,6 @@ impl crate::Readable for Data0Cmb1Spec {} #[doc = "`write(|w| ..)` method takes [`data0_cmb1::W`](W) writer structure"] impl crate::Writable for Data0Cmb1Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA0_CMB1 to value 0"] -impl crate::Resettable for Data0Cmb1Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Data0Cmb1Spec {} diff --git a/va416xx/src/can0/data0_cmb10.rs b/va416xx/src/can0/data0_cmb10.rs index 6c1d32d..9347fcf 100644 --- a/va416xx/src/can0/data0_cmb10.rs +++ b/va416xx/src/can0/data0_cmb10.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:7 - Data Byte 2"] #[inline(always)] - pub fn byte2(&mut self) -> Byte2W { + pub fn byte2(&mut self) -> Byte2W<'_, Data0Cmb10Spec> { Byte2W::new(self, 0) } #[doc = "Bits 8:15 - Data Byte 1"] #[inline(always)] - pub fn byte1(&mut self) -> Byte1W { + pub fn byte1(&mut self) -> Byte1W<'_, Data0Cmb10Spec> { Byte1W::new(self, 8) } } @@ -44,10 +44,6 @@ impl crate::Readable for Data0Cmb10Spec {} #[doc = "`write(|w| ..)` method takes [`data0_cmb10::W`](W) writer structure"] impl crate::Writable for Data0Cmb10Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA0_CMB10 to value 0"] -impl crate::Resettable for Data0Cmb10Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Data0Cmb10Spec {} diff --git a/va416xx/src/can0/data0_cmb11.rs b/va416xx/src/can0/data0_cmb11.rs index 0e5646c..4c30924 100644 --- a/va416xx/src/can0/data0_cmb11.rs +++ b/va416xx/src/can0/data0_cmb11.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:7 - Data Byte 2"] #[inline(always)] - pub fn byte2(&mut self) -> Byte2W { + pub fn byte2(&mut self) -> Byte2W<'_, Data0Cmb11Spec> { Byte2W::new(self, 0) } #[doc = "Bits 8:15 - Data Byte 1"] #[inline(always)] - pub fn byte1(&mut self) -> Byte1W { + pub fn byte1(&mut self) -> Byte1W<'_, Data0Cmb11Spec> { Byte1W::new(self, 8) } } @@ -44,10 +44,6 @@ impl crate::Readable for Data0Cmb11Spec {} #[doc = "`write(|w| ..)` method takes [`data0_cmb11::W`](W) writer structure"] impl crate::Writable for Data0Cmb11Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA0_CMB11 to value 0"] -impl crate::Resettable for Data0Cmb11Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Data0Cmb11Spec {} diff --git a/va416xx/src/can0/data0_cmb12.rs b/va416xx/src/can0/data0_cmb12.rs index 02b389a..a0db512 100644 --- a/va416xx/src/can0/data0_cmb12.rs +++ b/va416xx/src/can0/data0_cmb12.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:7 - Data Byte 2"] #[inline(always)] - pub fn byte2(&mut self) -> Byte2W { + pub fn byte2(&mut self) -> Byte2W<'_, Data0Cmb12Spec> { Byte2W::new(self, 0) } #[doc = "Bits 8:15 - Data Byte 1"] #[inline(always)] - pub fn byte1(&mut self) -> Byte1W { + pub fn byte1(&mut self) -> Byte1W<'_, Data0Cmb12Spec> { Byte1W::new(self, 8) } } @@ -44,10 +44,6 @@ impl crate::Readable for Data0Cmb12Spec {} #[doc = "`write(|w| ..)` method takes [`data0_cmb12::W`](W) writer structure"] impl crate::Writable for Data0Cmb12Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA0_CMB12 to value 0"] -impl crate::Resettable for Data0Cmb12Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Data0Cmb12Spec {} diff --git a/va416xx/src/can0/data0_cmb13.rs b/va416xx/src/can0/data0_cmb13.rs index 9aff1d2..8637644 100644 --- a/va416xx/src/can0/data0_cmb13.rs +++ b/va416xx/src/can0/data0_cmb13.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:7 - Data Byte 2"] #[inline(always)] - pub fn byte2(&mut self) -> Byte2W { + pub fn byte2(&mut self) -> Byte2W<'_, Data0Cmb13Spec> { Byte2W::new(self, 0) } #[doc = "Bits 8:15 - Data Byte 1"] #[inline(always)] - pub fn byte1(&mut self) -> Byte1W { + pub fn byte1(&mut self) -> Byte1W<'_, Data0Cmb13Spec> { Byte1W::new(self, 8) } } @@ -44,10 +44,6 @@ impl crate::Readable for Data0Cmb13Spec {} #[doc = "`write(|w| ..)` method takes [`data0_cmb13::W`](W) writer structure"] impl crate::Writable for Data0Cmb13Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA0_CMB13 to value 0"] -impl crate::Resettable for Data0Cmb13Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Data0Cmb13Spec {} diff --git a/va416xx/src/can0/data0_cmb14.rs b/va416xx/src/can0/data0_cmb14.rs index 7fc76f5..e62fb32 100644 --- a/va416xx/src/can0/data0_cmb14.rs +++ b/va416xx/src/can0/data0_cmb14.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:7 - Data Byte 2"] #[inline(always)] - pub fn byte2(&mut self) -> Byte2W { + pub fn byte2(&mut self) -> Byte2W<'_, Data0Cmb14Spec> { Byte2W::new(self, 0) } #[doc = "Bits 8:15 - Data Byte 1"] #[inline(always)] - pub fn byte1(&mut self) -> Byte1W { + pub fn byte1(&mut self) -> Byte1W<'_, Data0Cmb14Spec> { Byte1W::new(self, 8) } } @@ -44,10 +44,6 @@ impl crate::Readable for Data0Cmb14Spec {} #[doc = "`write(|w| ..)` method takes [`data0_cmb14::W`](W) writer structure"] impl crate::Writable for Data0Cmb14Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA0_CMB14 to value 0"] -impl crate::Resettable for Data0Cmb14Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Data0Cmb14Spec {} diff --git a/va416xx/src/can0/data0_cmb2.rs b/va416xx/src/can0/data0_cmb2.rs index 0ce2786..179ad4d 100644 --- a/va416xx/src/can0/data0_cmb2.rs +++ b/va416xx/src/can0/data0_cmb2.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:7 - Data Byte 2"] #[inline(always)] - pub fn byte2(&mut self) -> Byte2W { + pub fn byte2(&mut self) -> Byte2W<'_, Data0Cmb2Spec> { Byte2W::new(self, 0) } #[doc = "Bits 8:15 - Data Byte 1"] #[inline(always)] - pub fn byte1(&mut self) -> Byte1W { + pub fn byte1(&mut self) -> Byte1W<'_, Data0Cmb2Spec> { Byte1W::new(self, 8) } } @@ -44,10 +44,6 @@ impl crate::Readable for Data0Cmb2Spec {} #[doc = "`write(|w| ..)` method takes [`data0_cmb2::W`](W) writer structure"] impl crate::Writable for Data0Cmb2Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA0_CMB2 to value 0"] -impl crate::Resettable for Data0Cmb2Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Data0Cmb2Spec {} diff --git a/va416xx/src/can0/data0_cmb3.rs b/va416xx/src/can0/data0_cmb3.rs index 66eaf33..eb80122 100644 --- a/va416xx/src/can0/data0_cmb3.rs +++ b/va416xx/src/can0/data0_cmb3.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:7 - Data Byte 2"] #[inline(always)] - pub fn byte2(&mut self) -> Byte2W { + pub fn byte2(&mut self) -> Byte2W<'_, Data0Cmb3Spec> { Byte2W::new(self, 0) } #[doc = "Bits 8:15 - Data Byte 1"] #[inline(always)] - pub fn byte1(&mut self) -> Byte1W { + pub fn byte1(&mut self) -> Byte1W<'_, Data0Cmb3Spec> { Byte1W::new(self, 8) } } @@ -44,10 +44,6 @@ impl crate::Readable for Data0Cmb3Spec {} #[doc = "`write(|w| ..)` method takes [`data0_cmb3::W`](W) writer structure"] impl crate::Writable for Data0Cmb3Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA0_CMB3 to value 0"] -impl crate::Resettable for Data0Cmb3Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Data0Cmb3Spec {} diff --git a/va416xx/src/can0/data0_cmb4.rs b/va416xx/src/can0/data0_cmb4.rs index 6d31a61..6b79322 100644 --- a/va416xx/src/can0/data0_cmb4.rs +++ b/va416xx/src/can0/data0_cmb4.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:7 - Data Byte 2"] #[inline(always)] - pub fn byte2(&mut self) -> Byte2W { + pub fn byte2(&mut self) -> Byte2W<'_, Data0Cmb4Spec> { Byte2W::new(self, 0) } #[doc = "Bits 8:15 - Data Byte 1"] #[inline(always)] - pub fn byte1(&mut self) -> Byte1W { + pub fn byte1(&mut self) -> Byte1W<'_, Data0Cmb4Spec> { Byte1W::new(self, 8) } } @@ -44,10 +44,6 @@ impl crate::Readable for Data0Cmb4Spec {} #[doc = "`write(|w| ..)` method takes [`data0_cmb4::W`](W) writer structure"] impl crate::Writable for Data0Cmb4Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA0_CMB4 to value 0"] -impl crate::Resettable for Data0Cmb4Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Data0Cmb4Spec {} diff --git a/va416xx/src/can0/data0_cmb5.rs b/va416xx/src/can0/data0_cmb5.rs index 7407f0b..e3ea431 100644 --- a/va416xx/src/can0/data0_cmb5.rs +++ b/va416xx/src/can0/data0_cmb5.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:7 - Data Byte 2"] #[inline(always)] - pub fn byte2(&mut self) -> Byte2W { + pub fn byte2(&mut self) -> Byte2W<'_, Data0Cmb5Spec> { Byte2W::new(self, 0) } #[doc = "Bits 8:15 - Data Byte 1"] #[inline(always)] - pub fn byte1(&mut self) -> Byte1W { + pub fn byte1(&mut self) -> Byte1W<'_, Data0Cmb5Spec> { Byte1W::new(self, 8) } } @@ -44,10 +44,6 @@ impl crate::Readable for Data0Cmb5Spec {} #[doc = "`write(|w| ..)` method takes [`data0_cmb5::W`](W) writer structure"] impl crate::Writable for Data0Cmb5Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA0_CMB5 to value 0"] -impl crate::Resettable for Data0Cmb5Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Data0Cmb5Spec {} diff --git a/va416xx/src/can0/data0_cmb6.rs b/va416xx/src/can0/data0_cmb6.rs index bf376fe..aa2a020 100644 --- a/va416xx/src/can0/data0_cmb6.rs +++ b/va416xx/src/can0/data0_cmb6.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:7 - Data Byte 2"] #[inline(always)] - pub fn byte2(&mut self) -> Byte2W { + pub fn byte2(&mut self) -> Byte2W<'_, Data0Cmb6Spec> { Byte2W::new(self, 0) } #[doc = "Bits 8:15 - Data Byte 1"] #[inline(always)] - pub fn byte1(&mut self) -> Byte1W { + pub fn byte1(&mut self) -> Byte1W<'_, Data0Cmb6Spec> { Byte1W::new(self, 8) } } @@ -44,10 +44,6 @@ impl crate::Readable for Data0Cmb6Spec {} #[doc = "`write(|w| ..)` method takes [`data0_cmb6::W`](W) writer structure"] impl crate::Writable for Data0Cmb6Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA0_CMB6 to value 0"] -impl crate::Resettable for Data0Cmb6Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Data0Cmb6Spec {} diff --git a/va416xx/src/can0/data0_cmb7.rs b/va416xx/src/can0/data0_cmb7.rs index 96570cb..6fefb07 100644 --- a/va416xx/src/can0/data0_cmb7.rs +++ b/va416xx/src/can0/data0_cmb7.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:7 - Data Byte 2"] #[inline(always)] - pub fn byte2(&mut self) -> Byte2W { + pub fn byte2(&mut self) -> Byte2W<'_, Data0Cmb7Spec> { Byte2W::new(self, 0) } #[doc = "Bits 8:15 - Data Byte 1"] #[inline(always)] - pub fn byte1(&mut self) -> Byte1W { + pub fn byte1(&mut self) -> Byte1W<'_, Data0Cmb7Spec> { Byte1W::new(self, 8) } } @@ -44,10 +44,6 @@ impl crate::Readable for Data0Cmb7Spec {} #[doc = "`write(|w| ..)` method takes [`data0_cmb7::W`](W) writer structure"] impl crate::Writable for Data0Cmb7Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA0_CMB7 to value 0"] -impl crate::Resettable for Data0Cmb7Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Data0Cmb7Spec {} diff --git a/va416xx/src/can0/data0_cmb8.rs b/va416xx/src/can0/data0_cmb8.rs index 320e7a6..f2f6c92 100644 --- a/va416xx/src/can0/data0_cmb8.rs +++ b/va416xx/src/can0/data0_cmb8.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:7 - Data Byte 2"] #[inline(always)] - pub fn byte2(&mut self) -> Byte2W { + pub fn byte2(&mut self) -> Byte2W<'_, Data0Cmb8Spec> { Byte2W::new(self, 0) } #[doc = "Bits 8:15 - Data Byte 1"] #[inline(always)] - pub fn byte1(&mut self) -> Byte1W { + pub fn byte1(&mut self) -> Byte1W<'_, Data0Cmb8Spec> { Byte1W::new(self, 8) } } @@ -44,10 +44,6 @@ impl crate::Readable for Data0Cmb8Spec {} #[doc = "`write(|w| ..)` method takes [`data0_cmb8::W`](W) writer structure"] impl crate::Writable for Data0Cmb8Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA0_CMB8 to value 0"] -impl crate::Resettable for Data0Cmb8Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Data0Cmb8Spec {} diff --git a/va416xx/src/can0/data0_cmb9.rs b/va416xx/src/can0/data0_cmb9.rs index 85d97e2..4daf7bc 100644 --- a/va416xx/src/can0/data0_cmb9.rs +++ b/va416xx/src/can0/data0_cmb9.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:7 - Data Byte 2"] #[inline(always)] - pub fn byte2(&mut self) -> Byte2W { + pub fn byte2(&mut self) -> Byte2W<'_, Data0Cmb9Spec> { Byte2W::new(self, 0) } #[doc = "Bits 8:15 - Data Byte 1"] #[inline(always)] - pub fn byte1(&mut self) -> Byte1W { + pub fn byte1(&mut self) -> Byte1W<'_, Data0Cmb9Spec> { Byte1W::new(self, 8) } } @@ -44,10 +44,6 @@ impl crate::Readable for Data0Cmb9Spec {} #[doc = "`write(|w| ..)` method takes [`data0_cmb9::W`](W) writer structure"] impl crate::Writable for Data0Cmb9Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA0_CMB9 to value 0"] -impl crate::Resettable for Data0Cmb9Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Data0Cmb9Spec {} diff --git a/va416xx/src/can0/data0_hcmb.rs b/va416xx/src/can0/data0_hcmb.rs index 73a1216..2780207 100644 --- a/va416xx/src/can0/data0_hcmb.rs +++ b/va416xx/src/can0/data0_hcmb.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:7 - Data Byte 2"] #[inline(always)] - pub fn byte2(&mut self) -> Byte2W { + pub fn byte2(&mut self) -> Byte2W<'_, Data0HcmbSpec> { Byte2W::new(self, 0) } #[doc = "Bits 8:15 - Data Byte 1"] #[inline(always)] - pub fn byte1(&mut self) -> Byte1W { + pub fn byte1(&mut self) -> Byte1W<'_, Data0HcmbSpec> { Byte1W::new(self, 8) } } @@ -44,10 +44,6 @@ impl crate::Readable for Data0HcmbSpec {} #[doc = "`write(|w| ..)` method takes [`data0_hcmb::W`](W) writer structure"] impl crate::Writable for Data0HcmbSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA0_HCMB to value 0"] -impl crate::Resettable for Data0HcmbSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Data0HcmbSpec {} diff --git a/va416xx/src/can0/data1_cmb0.rs b/va416xx/src/can0/data1_cmb0.rs index d9f7f0f..32398e8 100644 --- a/va416xx/src/can0/data1_cmb0.rs +++ b/va416xx/src/can0/data1_cmb0.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:7 - Data Byte 4"] #[inline(always)] - pub fn byte4(&mut self) -> Byte4W { + pub fn byte4(&mut self) -> Byte4W<'_, Data1Cmb0Spec> { Byte4W::new(self, 0) } #[doc = "Bits 8:15 - Data Byte 3"] #[inline(always)] - pub fn byte3(&mut self) -> Byte3W { + pub fn byte3(&mut self) -> Byte3W<'_, Data1Cmb0Spec> { Byte3W::new(self, 8) } } @@ -44,10 +44,6 @@ impl crate::Readable for Data1Cmb0Spec {} #[doc = "`write(|w| ..)` method takes [`data1_cmb0::W`](W) writer structure"] impl crate::Writable for Data1Cmb0Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA1_CMB0 to value 0"] -impl crate::Resettable for Data1Cmb0Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Data1Cmb0Spec {} diff --git a/va416xx/src/can0/data1_cmb1.rs b/va416xx/src/can0/data1_cmb1.rs index 968722b..dbd5323 100644 --- a/va416xx/src/can0/data1_cmb1.rs +++ b/va416xx/src/can0/data1_cmb1.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:7 - Data Byte 4"] #[inline(always)] - pub fn byte4(&mut self) -> Byte4W { + pub fn byte4(&mut self) -> Byte4W<'_, Data1Cmb1Spec> { Byte4W::new(self, 0) } #[doc = "Bits 8:15 - Data Byte 3"] #[inline(always)] - pub fn byte3(&mut self) -> Byte3W { + pub fn byte3(&mut self) -> Byte3W<'_, Data1Cmb1Spec> { Byte3W::new(self, 8) } } @@ -44,10 +44,6 @@ impl crate::Readable for Data1Cmb1Spec {} #[doc = "`write(|w| ..)` method takes [`data1_cmb1::W`](W) writer structure"] impl crate::Writable for Data1Cmb1Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA1_CMB1 to value 0"] -impl crate::Resettable for Data1Cmb1Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Data1Cmb1Spec {} diff --git a/va416xx/src/can0/data1_cmb10.rs b/va416xx/src/can0/data1_cmb10.rs index deb2f8e..7546cf7 100644 --- a/va416xx/src/can0/data1_cmb10.rs +++ b/va416xx/src/can0/data1_cmb10.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:7 - Data Byte 4"] #[inline(always)] - pub fn byte4(&mut self) -> Byte4W { + pub fn byte4(&mut self) -> Byte4W<'_, Data1Cmb10Spec> { Byte4W::new(self, 0) } #[doc = "Bits 8:15 - Data Byte 3"] #[inline(always)] - pub fn byte3(&mut self) -> Byte3W { + pub fn byte3(&mut self) -> Byte3W<'_, Data1Cmb10Spec> { Byte3W::new(self, 8) } } @@ -44,10 +44,6 @@ impl crate::Readable for Data1Cmb10Spec {} #[doc = "`write(|w| ..)` method takes [`data1_cmb10::W`](W) writer structure"] impl crate::Writable for Data1Cmb10Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA1_CMB10 to value 0"] -impl crate::Resettable for Data1Cmb10Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Data1Cmb10Spec {} diff --git a/va416xx/src/can0/data1_cmb11.rs b/va416xx/src/can0/data1_cmb11.rs index c9d8acc..6451a91 100644 --- a/va416xx/src/can0/data1_cmb11.rs +++ b/va416xx/src/can0/data1_cmb11.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:7 - Data Byte 4"] #[inline(always)] - pub fn byte4(&mut self) -> Byte4W { + pub fn byte4(&mut self) -> Byte4W<'_, Data1Cmb11Spec> { Byte4W::new(self, 0) } #[doc = "Bits 8:15 - Data Byte 3"] #[inline(always)] - pub fn byte3(&mut self) -> Byte3W { + pub fn byte3(&mut self) -> Byte3W<'_, Data1Cmb11Spec> { Byte3W::new(self, 8) } } @@ -44,10 +44,6 @@ impl crate::Readable for Data1Cmb11Spec {} #[doc = "`write(|w| ..)` method takes [`data1_cmb11::W`](W) writer structure"] impl crate::Writable for Data1Cmb11Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA1_CMB11 to value 0"] -impl crate::Resettable for Data1Cmb11Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Data1Cmb11Spec {} diff --git a/va416xx/src/can0/data1_cmb12.rs b/va416xx/src/can0/data1_cmb12.rs index c7f816d..c0983df 100644 --- a/va416xx/src/can0/data1_cmb12.rs +++ b/va416xx/src/can0/data1_cmb12.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:7 - Data Byte 4"] #[inline(always)] - pub fn byte4(&mut self) -> Byte4W { + pub fn byte4(&mut self) -> Byte4W<'_, Data1Cmb12Spec> { Byte4W::new(self, 0) } #[doc = "Bits 8:15 - Data Byte 3"] #[inline(always)] - pub fn byte3(&mut self) -> Byte3W { + pub fn byte3(&mut self) -> Byte3W<'_, Data1Cmb12Spec> { Byte3W::new(self, 8) } } @@ -44,10 +44,6 @@ impl crate::Readable for Data1Cmb12Spec {} #[doc = "`write(|w| ..)` method takes [`data1_cmb12::W`](W) writer structure"] impl crate::Writable for Data1Cmb12Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA1_CMB12 to value 0"] -impl crate::Resettable for Data1Cmb12Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Data1Cmb12Spec {} diff --git a/va416xx/src/can0/data1_cmb13.rs b/va416xx/src/can0/data1_cmb13.rs index 0a3225b..630de3a 100644 --- a/va416xx/src/can0/data1_cmb13.rs +++ b/va416xx/src/can0/data1_cmb13.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:7 - Data Byte 4"] #[inline(always)] - pub fn byte4(&mut self) -> Byte4W { + pub fn byte4(&mut self) -> Byte4W<'_, Data1Cmb13Spec> { Byte4W::new(self, 0) } #[doc = "Bits 8:15 - Data Byte 3"] #[inline(always)] - pub fn byte3(&mut self) -> Byte3W { + pub fn byte3(&mut self) -> Byte3W<'_, Data1Cmb13Spec> { Byte3W::new(self, 8) } } @@ -44,10 +44,6 @@ impl crate::Readable for Data1Cmb13Spec {} #[doc = "`write(|w| ..)` method takes [`data1_cmb13::W`](W) writer structure"] impl crate::Writable for Data1Cmb13Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA1_CMB13 to value 0"] -impl crate::Resettable for Data1Cmb13Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Data1Cmb13Spec {} diff --git a/va416xx/src/can0/data1_cmb14.rs b/va416xx/src/can0/data1_cmb14.rs index 3e179d4..c83b667 100644 --- a/va416xx/src/can0/data1_cmb14.rs +++ b/va416xx/src/can0/data1_cmb14.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:7 - Data Byte 4"] #[inline(always)] - pub fn byte4(&mut self) -> Byte4W { + pub fn byte4(&mut self) -> Byte4W<'_, Data1Cmb14Spec> { Byte4W::new(self, 0) } #[doc = "Bits 8:15 - Data Byte 3"] #[inline(always)] - pub fn byte3(&mut self) -> Byte3W { + pub fn byte3(&mut self) -> Byte3W<'_, Data1Cmb14Spec> { Byte3W::new(self, 8) } } @@ -44,10 +44,6 @@ impl crate::Readable for Data1Cmb14Spec {} #[doc = "`write(|w| ..)` method takes [`data1_cmb14::W`](W) writer structure"] impl crate::Writable for Data1Cmb14Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA1_CMB14 to value 0"] -impl crate::Resettable for Data1Cmb14Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Data1Cmb14Spec {} diff --git a/va416xx/src/can0/data1_cmb2.rs b/va416xx/src/can0/data1_cmb2.rs index a20ac17..ac157c4 100644 --- a/va416xx/src/can0/data1_cmb2.rs +++ b/va416xx/src/can0/data1_cmb2.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:7 - Data Byte 4"] #[inline(always)] - pub fn byte4(&mut self) -> Byte4W { + pub fn byte4(&mut self) -> Byte4W<'_, Data1Cmb2Spec> { Byte4W::new(self, 0) } #[doc = "Bits 8:15 - Data Byte 3"] #[inline(always)] - pub fn byte3(&mut self) -> Byte3W { + pub fn byte3(&mut self) -> Byte3W<'_, Data1Cmb2Spec> { Byte3W::new(self, 8) } } @@ -44,10 +44,6 @@ impl crate::Readable for Data1Cmb2Spec {} #[doc = "`write(|w| ..)` method takes [`data1_cmb2::W`](W) writer structure"] impl crate::Writable for Data1Cmb2Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA1_CMB2 to value 0"] -impl crate::Resettable for Data1Cmb2Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Data1Cmb2Spec {} diff --git a/va416xx/src/can0/data1_cmb3.rs b/va416xx/src/can0/data1_cmb3.rs index 3665246..81d279e 100644 --- a/va416xx/src/can0/data1_cmb3.rs +++ b/va416xx/src/can0/data1_cmb3.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:7 - Data Byte 4"] #[inline(always)] - pub fn byte4(&mut self) -> Byte4W { + pub fn byte4(&mut self) -> Byte4W<'_, Data1Cmb3Spec> { Byte4W::new(self, 0) } #[doc = "Bits 8:15 - Data Byte 3"] #[inline(always)] - pub fn byte3(&mut self) -> Byte3W { + pub fn byte3(&mut self) -> Byte3W<'_, Data1Cmb3Spec> { Byte3W::new(self, 8) } } @@ -44,10 +44,6 @@ impl crate::Readable for Data1Cmb3Spec {} #[doc = "`write(|w| ..)` method takes [`data1_cmb3::W`](W) writer structure"] impl crate::Writable for Data1Cmb3Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA1_CMB3 to value 0"] -impl crate::Resettable for Data1Cmb3Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Data1Cmb3Spec {} diff --git a/va416xx/src/can0/data1_cmb4.rs b/va416xx/src/can0/data1_cmb4.rs index 0d2f179..cdd9dc1 100644 --- a/va416xx/src/can0/data1_cmb4.rs +++ b/va416xx/src/can0/data1_cmb4.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:7 - Data Byte 4"] #[inline(always)] - pub fn byte4(&mut self) -> Byte4W { + pub fn byte4(&mut self) -> Byte4W<'_, Data1Cmb4Spec> { Byte4W::new(self, 0) } #[doc = "Bits 8:15 - Data Byte 3"] #[inline(always)] - pub fn byte3(&mut self) -> Byte3W { + pub fn byte3(&mut self) -> Byte3W<'_, Data1Cmb4Spec> { Byte3W::new(self, 8) } } @@ -44,10 +44,6 @@ impl crate::Readable for Data1Cmb4Spec {} #[doc = "`write(|w| ..)` method takes [`data1_cmb4::W`](W) writer structure"] impl crate::Writable for Data1Cmb4Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA1_CMB4 to value 0"] -impl crate::Resettable for Data1Cmb4Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Data1Cmb4Spec {} diff --git a/va416xx/src/can0/data1_cmb5.rs b/va416xx/src/can0/data1_cmb5.rs index b14efa6..71e5f30 100644 --- a/va416xx/src/can0/data1_cmb5.rs +++ b/va416xx/src/can0/data1_cmb5.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:7 - Data Byte 4"] #[inline(always)] - pub fn byte4(&mut self) -> Byte4W { + pub fn byte4(&mut self) -> Byte4W<'_, Data1Cmb5Spec> { Byte4W::new(self, 0) } #[doc = "Bits 8:15 - Data Byte 3"] #[inline(always)] - pub fn byte3(&mut self) -> Byte3W { + pub fn byte3(&mut self) -> Byte3W<'_, Data1Cmb5Spec> { Byte3W::new(self, 8) } } @@ -44,10 +44,6 @@ impl crate::Readable for Data1Cmb5Spec {} #[doc = "`write(|w| ..)` method takes [`data1_cmb5::W`](W) writer structure"] impl crate::Writable for Data1Cmb5Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA1_CMB5 to value 0"] -impl crate::Resettable for Data1Cmb5Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Data1Cmb5Spec {} diff --git a/va416xx/src/can0/data1_cmb6.rs b/va416xx/src/can0/data1_cmb6.rs index fa546c6..f6070fa 100644 --- a/va416xx/src/can0/data1_cmb6.rs +++ b/va416xx/src/can0/data1_cmb6.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:7 - Data Byte 4"] #[inline(always)] - pub fn byte4(&mut self) -> Byte4W { + pub fn byte4(&mut self) -> Byte4W<'_, Data1Cmb6Spec> { Byte4W::new(self, 0) } #[doc = "Bits 8:15 - Data Byte 3"] #[inline(always)] - pub fn byte3(&mut self) -> Byte3W { + pub fn byte3(&mut self) -> Byte3W<'_, Data1Cmb6Spec> { Byte3W::new(self, 8) } } @@ -44,10 +44,6 @@ impl crate::Readable for Data1Cmb6Spec {} #[doc = "`write(|w| ..)` method takes [`data1_cmb6::W`](W) writer structure"] impl crate::Writable for Data1Cmb6Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA1_CMB6 to value 0"] -impl crate::Resettable for Data1Cmb6Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Data1Cmb6Spec {} diff --git a/va416xx/src/can0/data1_cmb7.rs b/va416xx/src/can0/data1_cmb7.rs index 28a62e8..33dfc5e 100644 --- a/va416xx/src/can0/data1_cmb7.rs +++ b/va416xx/src/can0/data1_cmb7.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:7 - Data Byte 4"] #[inline(always)] - pub fn byte4(&mut self) -> Byte4W { + pub fn byte4(&mut self) -> Byte4W<'_, Data1Cmb7Spec> { Byte4W::new(self, 0) } #[doc = "Bits 8:15 - Data Byte 3"] #[inline(always)] - pub fn byte3(&mut self) -> Byte3W { + pub fn byte3(&mut self) -> Byte3W<'_, Data1Cmb7Spec> { Byte3W::new(self, 8) } } @@ -44,10 +44,6 @@ impl crate::Readable for Data1Cmb7Spec {} #[doc = "`write(|w| ..)` method takes [`data1_cmb7::W`](W) writer structure"] impl crate::Writable for Data1Cmb7Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA1_CMB7 to value 0"] -impl crate::Resettable for Data1Cmb7Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Data1Cmb7Spec {} diff --git a/va416xx/src/can0/data1_cmb8.rs b/va416xx/src/can0/data1_cmb8.rs index 1ff6ca2..70e1a12 100644 --- a/va416xx/src/can0/data1_cmb8.rs +++ b/va416xx/src/can0/data1_cmb8.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:7 - Data Byte 4"] #[inline(always)] - pub fn byte4(&mut self) -> Byte4W { + pub fn byte4(&mut self) -> Byte4W<'_, Data1Cmb8Spec> { Byte4W::new(self, 0) } #[doc = "Bits 8:15 - Data Byte 3"] #[inline(always)] - pub fn byte3(&mut self) -> Byte3W { + pub fn byte3(&mut self) -> Byte3W<'_, Data1Cmb8Spec> { Byte3W::new(self, 8) } } @@ -44,10 +44,6 @@ impl crate::Readable for Data1Cmb8Spec {} #[doc = "`write(|w| ..)` method takes [`data1_cmb8::W`](W) writer structure"] impl crate::Writable for Data1Cmb8Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA1_CMB8 to value 0"] -impl crate::Resettable for Data1Cmb8Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Data1Cmb8Spec {} diff --git a/va416xx/src/can0/data1_cmb9.rs b/va416xx/src/can0/data1_cmb9.rs index 4f04481..ef7c32e 100644 --- a/va416xx/src/can0/data1_cmb9.rs +++ b/va416xx/src/can0/data1_cmb9.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:7 - Data Byte 4"] #[inline(always)] - pub fn byte4(&mut self) -> Byte4W { + pub fn byte4(&mut self) -> Byte4W<'_, Data1Cmb9Spec> { Byte4W::new(self, 0) } #[doc = "Bits 8:15 - Data Byte 3"] #[inline(always)] - pub fn byte3(&mut self) -> Byte3W { + pub fn byte3(&mut self) -> Byte3W<'_, Data1Cmb9Spec> { Byte3W::new(self, 8) } } @@ -44,10 +44,6 @@ impl crate::Readable for Data1Cmb9Spec {} #[doc = "`write(|w| ..)` method takes [`data1_cmb9::W`](W) writer structure"] impl crate::Writable for Data1Cmb9Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA1_CMB9 to value 0"] -impl crate::Resettable for Data1Cmb9Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Data1Cmb9Spec {} diff --git a/va416xx/src/can0/data1_hcmb.rs b/va416xx/src/can0/data1_hcmb.rs index 008f84a..7d1b9e6 100644 --- a/va416xx/src/can0/data1_hcmb.rs +++ b/va416xx/src/can0/data1_hcmb.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:7 - Data Byte 4"] #[inline(always)] - pub fn byte4(&mut self) -> Byte4W { + pub fn byte4(&mut self) -> Byte4W<'_, Data1HcmbSpec> { Byte4W::new(self, 0) } #[doc = "Bits 8:15 - Data Byte 3"] #[inline(always)] - pub fn byte3(&mut self) -> Byte3W { + pub fn byte3(&mut self) -> Byte3W<'_, Data1HcmbSpec> { Byte3W::new(self, 8) } } @@ -44,10 +44,6 @@ impl crate::Readable for Data1HcmbSpec {} #[doc = "`write(|w| ..)` method takes [`data1_hcmb::W`](W) writer structure"] impl crate::Writable for Data1HcmbSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA1_HCMB to value 0"] -impl crate::Resettable for Data1HcmbSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Data1HcmbSpec {} diff --git a/va416xx/src/can0/data2_cmb0.rs b/va416xx/src/can0/data2_cmb0.rs index ec4a8ec..a991989 100644 --- a/va416xx/src/can0/data2_cmb0.rs +++ b/va416xx/src/can0/data2_cmb0.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:7 - Data Byte 6"] #[inline(always)] - pub fn byte6(&mut self) -> Byte6W { + pub fn byte6(&mut self) -> Byte6W<'_, Data2Cmb0Spec> { Byte6W::new(self, 0) } #[doc = "Bits 8:15 - Data Byte 5"] #[inline(always)] - pub fn byte5(&mut self) -> Byte5W { + pub fn byte5(&mut self) -> Byte5W<'_, Data2Cmb0Spec> { Byte5W::new(self, 8) } } @@ -44,10 +44,6 @@ impl crate::Readable for Data2Cmb0Spec {} #[doc = "`write(|w| ..)` method takes [`data2_cmb0::W`](W) writer structure"] impl crate::Writable for Data2Cmb0Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA2_CMB0 to value 0"] -impl crate::Resettable for Data2Cmb0Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Data2Cmb0Spec {} diff --git a/va416xx/src/can0/data2_cmb1.rs b/va416xx/src/can0/data2_cmb1.rs index 67dce3e..b6fd1b2 100644 --- a/va416xx/src/can0/data2_cmb1.rs +++ b/va416xx/src/can0/data2_cmb1.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:7 - Data Byte 6"] #[inline(always)] - pub fn byte6(&mut self) -> Byte6W { + pub fn byte6(&mut self) -> Byte6W<'_, Data2Cmb1Spec> { Byte6W::new(self, 0) } #[doc = "Bits 8:15 - Data Byte 5"] #[inline(always)] - pub fn byte5(&mut self) -> Byte5W { + pub fn byte5(&mut self) -> Byte5W<'_, Data2Cmb1Spec> { Byte5W::new(self, 8) } } @@ -44,10 +44,6 @@ impl crate::Readable for Data2Cmb1Spec {} #[doc = "`write(|w| ..)` method takes [`data2_cmb1::W`](W) writer structure"] impl crate::Writable for Data2Cmb1Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA2_CMB1 to value 0"] -impl crate::Resettable for Data2Cmb1Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Data2Cmb1Spec {} diff --git a/va416xx/src/can0/data2_cmb10.rs b/va416xx/src/can0/data2_cmb10.rs index 3914312..b12549c 100644 --- a/va416xx/src/can0/data2_cmb10.rs +++ b/va416xx/src/can0/data2_cmb10.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:7 - Data Byte 6"] #[inline(always)] - pub fn byte6(&mut self) -> Byte6W { + pub fn byte6(&mut self) -> Byte6W<'_, Data2Cmb10Spec> { Byte6W::new(self, 0) } #[doc = "Bits 8:15 - Data Byte 5"] #[inline(always)] - pub fn byte5(&mut self) -> Byte5W { + pub fn byte5(&mut self) -> Byte5W<'_, Data2Cmb10Spec> { Byte5W::new(self, 8) } } @@ -44,10 +44,6 @@ impl crate::Readable for Data2Cmb10Spec {} #[doc = "`write(|w| ..)` method takes [`data2_cmb10::W`](W) writer structure"] impl crate::Writable for Data2Cmb10Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA2_CMB10 to value 0"] -impl crate::Resettable for Data2Cmb10Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Data2Cmb10Spec {} diff --git a/va416xx/src/can0/data2_cmb11.rs b/va416xx/src/can0/data2_cmb11.rs index 1afb388..505151e 100644 --- a/va416xx/src/can0/data2_cmb11.rs +++ b/va416xx/src/can0/data2_cmb11.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:7 - Data Byte 6"] #[inline(always)] - pub fn byte6(&mut self) -> Byte6W { + pub fn byte6(&mut self) -> Byte6W<'_, Data2Cmb11Spec> { Byte6W::new(self, 0) } #[doc = "Bits 8:15 - Data Byte 5"] #[inline(always)] - pub fn byte5(&mut self) -> Byte5W { + pub fn byte5(&mut self) -> Byte5W<'_, Data2Cmb11Spec> { Byte5W::new(self, 8) } } @@ -44,10 +44,6 @@ impl crate::Readable for Data2Cmb11Spec {} #[doc = "`write(|w| ..)` method takes [`data2_cmb11::W`](W) writer structure"] impl crate::Writable for Data2Cmb11Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA2_CMB11 to value 0"] -impl crate::Resettable for Data2Cmb11Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Data2Cmb11Spec {} diff --git a/va416xx/src/can0/data2_cmb12.rs b/va416xx/src/can0/data2_cmb12.rs index a0ae216..147ddf8 100644 --- a/va416xx/src/can0/data2_cmb12.rs +++ b/va416xx/src/can0/data2_cmb12.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:7 - Data Byte 6"] #[inline(always)] - pub fn byte6(&mut self) -> Byte6W { + pub fn byte6(&mut self) -> Byte6W<'_, Data2Cmb12Spec> { Byte6W::new(self, 0) } #[doc = "Bits 8:15 - Data Byte 5"] #[inline(always)] - pub fn byte5(&mut self) -> Byte5W { + pub fn byte5(&mut self) -> Byte5W<'_, Data2Cmb12Spec> { Byte5W::new(self, 8) } } @@ -44,10 +44,6 @@ impl crate::Readable for Data2Cmb12Spec {} #[doc = "`write(|w| ..)` method takes [`data2_cmb12::W`](W) writer structure"] impl crate::Writable for Data2Cmb12Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA2_CMB12 to value 0"] -impl crate::Resettable for Data2Cmb12Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Data2Cmb12Spec {} diff --git a/va416xx/src/can0/data2_cmb13.rs b/va416xx/src/can0/data2_cmb13.rs index 619470a..c9d6096 100644 --- a/va416xx/src/can0/data2_cmb13.rs +++ b/va416xx/src/can0/data2_cmb13.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:7 - Data Byte 6"] #[inline(always)] - pub fn byte6(&mut self) -> Byte6W { + pub fn byte6(&mut self) -> Byte6W<'_, Data2Cmb13Spec> { Byte6W::new(self, 0) } #[doc = "Bits 8:15 - Data Byte 5"] #[inline(always)] - pub fn byte5(&mut self) -> Byte5W { + pub fn byte5(&mut self) -> Byte5W<'_, Data2Cmb13Spec> { Byte5W::new(self, 8) } } @@ -44,10 +44,6 @@ impl crate::Readable for Data2Cmb13Spec {} #[doc = "`write(|w| ..)` method takes [`data2_cmb13::W`](W) writer structure"] impl crate::Writable for Data2Cmb13Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA2_CMB13 to value 0"] -impl crate::Resettable for Data2Cmb13Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Data2Cmb13Spec {} diff --git a/va416xx/src/can0/data2_cmb14.rs b/va416xx/src/can0/data2_cmb14.rs index 0957e6e..e3a212f 100644 --- a/va416xx/src/can0/data2_cmb14.rs +++ b/va416xx/src/can0/data2_cmb14.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:7 - Data Byte 6"] #[inline(always)] - pub fn byte6(&mut self) -> Byte6W { + pub fn byte6(&mut self) -> Byte6W<'_, Data2Cmb14Spec> { Byte6W::new(self, 0) } #[doc = "Bits 8:15 - Data Byte 5"] #[inline(always)] - pub fn byte5(&mut self) -> Byte5W { + pub fn byte5(&mut self) -> Byte5W<'_, Data2Cmb14Spec> { Byte5W::new(self, 8) } } @@ -44,10 +44,6 @@ impl crate::Readable for Data2Cmb14Spec {} #[doc = "`write(|w| ..)` method takes [`data2_cmb14::W`](W) writer structure"] impl crate::Writable for Data2Cmb14Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA2_CMB14 to value 0"] -impl crate::Resettable for Data2Cmb14Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Data2Cmb14Spec {} diff --git a/va416xx/src/can0/data2_cmb2.rs b/va416xx/src/can0/data2_cmb2.rs index 0193f41..a9ff4fe 100644 --- a/va416xx/src/can0/data2_cmb2.rs +++ b/va416xx/src/can0/data2_cmb2.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:7 - Data Byte 6"] #[inline(always)] - pub fn byte6(&mut self) -> Byte6W { + pub fn byte6(&mut self) -> Byte6W<'_, Data2Cmb2Spec> { Byte6W::new(self, 0) } #[doc = "Bits 8:15 - Data Byte 5"] #[inline(always)] - pub fn byte5(&mut self) -> Byte5W { + pub fn byte5(&mut self) -> Byte5W<'_, Data2Cmb2Spec> { Byte5W::new(self, 8) } } @@ -44,10 +44,6 @@ impl crate::Readable for Data2Cmb2Spec {} #[doc = "`write(|w| ..)` method takes [`data2_cmb2::W`](W) writer structure"] impl crate::Writable for Data2Cmb2Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA2_CMB2 to value 0"] -impl crate::Resettable for Data2Cmb2Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Data2Cmb2Spec {} diff --git a/va416xx/src/can0/data2_cmb3.rs b/va416xx/src/can0/data2_cmb3.rs index 931ca36..4358008 100644 --- a/va416xx/src/can0/data2_cmb3.rs +++ b/va416xx/src/can0/data2_cmb3.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:7 - Data Byte 6"] #[inline(always)] - pub fn byte6(&mut self) -> Byte6W { + pub fn byte6(&mut self) -> Byte6W<'_, Data2Cmb3Spec> { Byte6W::new(self, 0) } #[doc = "Bits 8:15 - Data Byte 5"] #[inline(always)] - pub fn byte5(&mut self) -> Byte5W { + pub fn byte5(&mut self) -> Byte5W<'_, Data2Cmb3Spec> { Byte5W::new(self, 8) } } @@ -44,10 +44,6 @@ impl crate::Readable for Data2Cmb3Spec {} #[doc = "`write(|w| ..)` method takes [`data2_cmb3::W`](W) writer structure"] impl crate::Writable for Data2Cmb3Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA2_CMB3 to value 0"] -impl crate::Resettable for Data2Cmb3Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Data2Cmb3Spec {} diff --git a/va416xx/src/can0/data2_cmb4.rs b/va416xx/src/can0/data2_cmb4.rs index 2473c26..799bb76 100644 --- a/va416xx/src/can0/data2_cmb4.rs +++ b/va416xx/src/can0/data2_cmb4.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:7 - Data Byte 6"] #[inline(always)] - pub fn byte6(&mut self) -> Byte6W { + pub fn byte6(&mut self) -> Byte6W<'_, Data2Cmb4Spec> { Byte6W::new(self, 0) } #[doc = "Bits 8:15 - Data Byte 5"] #[inline(always)] - pub fn byte5(&mut self) -> Byte5W { + pub fn byte5(&mut self) -> Byte5W<'_, Data2Cmb4Spec> { Byte5W::new(self, 8) } } @@ -44,10 +44,6 @@ impl crate::Readable for Data2Cmb4Spec {} #[doc = "`write(|w| ..)` method takes [`data2_cmb4::W`](W) writer structure"] impl crate::Writable for Data2Cmb4Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA2_CMB4 to value 0"] -impl crate::Resettable for Data2Cmb4Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Data2Cmb4Spec {} diff --git a/va416xx/src/can0/data2_cmb5.rs b/va416xx/src/can0/data2_cmb5.rs index b213f97..2d39f51 100644 --- a/va416xx/src/can0/data2_cmb5.rs +++ b/va416xx/src/can0/data2_cmb5.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:7 - Data Byte 6"] #[inline(always)] - pub fn byte6(&mut self) -> Byte6W { + pub fn byte6(&mut self) -> Byte6W<'_, Data2Cmb5Spec> { Byte6W::new(self, 0) } #[doc = "Bits 8:15 - Data Byte 5"] #[inline(always)] - pub fn byte5(&mut self) -> Byte5W { + pub fn byte5(&mut self) -> Byte5W<'_, Data2Cmb5Spec> { Byte5W::new(self, 8) } } @@ -44,10 +44,6 @@ impl crate::Readable for Data2Cmb5Spec {} #[doc = "`write(|w| ..)` method takes [`data2_cmb5::W`](W) writer structure"] impl crate::Writable for Data2Cmb5Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA2_CMB5 to value 0"] -impl crate::Resettable for Data2Cmb5Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Data2Cmb5Spec {} diff --git a/va416xx/src/can0/data2_cmb6.rs b/va416xx/src/can0/data2_cmb6.rs index 5aa6a70..f86ef5d 100644 --- a/va416xx/src/can0/data2_cmb6.rs +++ b/va416xx/src/can0/data2_cmb6.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:7 - Data Byte 6"] #[inline(always)] - pub fn byte6(&mut self) -> Byte6W { + pub fn byte6(&mut self) -> Byte6W<'_, Data2Cmb6Spec> { Byte6W::new(self, 0) } #[doc = "Bits 8:15 - Data Byte 5"] #[inline(always)] - pub fn byte5(&mut self) -> Byte5W { + pub fn byte5(&mut self) -> Byte5W<'_, Data2Cmb6Spec> { Byte5W::new(self, 8) } } @@ -44,10 +44,6 @@ impl crate::Readable for Data2Cmb6Spec {} #[doc = "`write(|w| ..)` method takes [`data2_cmb6::W`](W) writer structure"] impl crate::Writable for Data2Cmb6Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA2_CMB6 to value 0"] -impl crate::Resettable for Data2Cmb6Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Data2Cmb6Spec {} diff --git a/va416xx/src/can0/data2_cmb7.rs b/va416xx/src/can0/data2_cmb7.rs index 299cadf..42efa19 100644 --- a/va416xx/src/can0/data2_cmb7.rs +++ b/va416xx/src/can0/data2_cmb7.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:7 - Data Byte 6"] #[inline(always)] - pub fn byte6(&mut self) -> Byte6W { + pub fn byte6(&mut self) -> Byte6W<'_, Data2Cmb7Spec> { Byte6W::new(self, 0) } #[doc = "Bits 8:15 - Data Byte 5"] #[inline(always)] - pub fn byte5(&mut self) -> Byte5W { + pub fn byte5(&mut self) -> Byte5W<'_, Data2Cmb7Spec> { Byte5W::new(self, 8) } } @@ -44,10 +44,6 @@ impl crate::Readable for Data2Cmb7Spec {} #[doc = "`write(|w| ..)` method takes [`data2_cmb7::W`](W) writer structure"] impl crate::Writable for Data2Cmb7Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA2_CMB7 to value 0"] -impl crate::Resettable for Data2Cmb7Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Data2Cmb7Spec {} diff --git a/va416xx/src/can0/data2_cmb8.rs b/va416xx/src/can0/data2_cmb8.rs index f105af5..07fe7c9 100644 --- a/va416xx/src/can0/data2_cmb8.rs +++ b/va416xx/src/can0/data2_cmb8.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:7 - Data Byte 6"] #[inline(always)] - pub fn byte6(&mut self) -> Byte6W { + pub fn byte6(&mut self) -> Byte6W<'_, Data2Cmb8Spec> { Byte6W::new(self, 0) } #[doc = "Bits 8:15 - Data Byte 5"] #[inline(always)] - pub fn byte5(&mut self) -> Byte5W { + pub fn byte5(&mut self) -> Byte5W<'_, Data2Cmb8Spec> { Byte5W::new(self, 8) } } @@ -44,10 +44,6 @@ impl crate::Readable for Data2Cmb8Spec {} #[doc = "`write(|w| ..)` method takes [`data2_cmb8::W`](W) writer structure"] impl crate::Writable for Data2Cmb8Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA2_CMB8 to value 0"] -impl crate::Resettable for Data2Cmb8Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Data2Cmb8Spec {} diff --git a/va416xx/src/can0/data2_cmb9.rs b/va416xx/src/can0/data2_cmb9.rs index a05ed41..657f087 100644 --- a/va416xx/src/can0/data2_cmb9.rs +++ b/va416xx/src/can0/data2_cmb9.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:7 - Data Byte 6"] #[inline(always)] - pub fn byte6(&mut self) -> Byte6W { + pub fn byte6(&mut self) -> Byte6W<'_, Data2Cmb9Spec> { Byte6W::new(self, 0) } #[doc = "Bits 8:15 - Data Byte 5"] #[inline(always)] - pub fn byte5(&mut self) -> Byte5W { + pub fn byte5(&mut self) -> Byte5W<'_, Data2Cmb9Spec> { Byte5W::new(self, 8) } } @@ -44,10 +44,6 @@ impl crate::Readable for Data2Cmb9Spec {} #[doc = "`write(|w| ..)` method takes [`data2_cmb9::W`](W) writer structure"] impl crate::Writable for Data2Cmb9Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA2_CMB9 to value 0"] -impl crate::Resettable for Data2Cmb9Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Data2Cmb9Spec {} diff --git a/va416xx/src/can0/data2_hcmb.rs b/va416xx/src/can0/data2_hcmb.rs index 62cb0bb..d4178b8 100644 --- a/va416xx/src/can0/data2_hcmb.rs +++ b/va416xx/src/can0/data2_hcmb.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:7 - Data Byte 6"] #[inline(always)] - pub fn byte6(&mut self) -> Byte6W { + pub fn byte6(&mut self) -> Byte6W<'_, Data2HcmbSpec> { Byte6W::new(self, 0) } #[doc = "Bits 8:15 - Data Byte 5"] #[inline(always)] - pub fn byte5(&mut self) -> Byte5W { + pub fn byte5(&mut self) -> Byte5W<'_, Data2HcmbSpec> { Byte5W::new(self, 8) } } @@ -44,10 +44,6 @@ impl crate::Readable for Data2HcmbSpec {} #[doc = "`write(|w| ..)` method takes [`data2_hcmb::W`](W) writer structure"] impl crate::Writable for Data2HcmbSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA2_HCMB to value 0"] -impl crate::Resettable for Data2HcmbSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Data2HcmbSpec {} diff --git a/va416xx/src/can0/data3_cmb0.rs b/va416xx/src/can0/data3_cmb0.rs index 1260b70..b29a99d 100644 --- a/va416xx/src/can0/data3_cmb0.rs +++ b/va416xx/src/can0/data3_cmb0.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:7 - Data Byte 8"] #[inline(always)] - pub fn byte8(&mut self) -> Byte8W { + pub fn byte8(&mut self) -> Byte8W<'_, Data3Cmb0Spec> { Byte8W::new(self, 0) } #[doc = "Bits 8:15 - Data Byte 7"] #[inline(always)] - pub fn byte7(&mut self) -> Byte7W { + pub fn byte7(&mut self) -> Byte7W<'_, Data3Cmb0Spec> { Byte7W::new(self, 8) } } @@ -44,10 +44,6 @@ impl crate::Readable for Data3Cmb0Spec {} #[doc = "`write(|w| ..)` method takes [`data3_cmb0::W`](W) writer structure"] impl crate::Writable for Data3Cmb0Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA3_CMB0 to value 0"] -impl crate::Resettable for Data3Cmb0Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Data3Cmb0Spec {} diff --git a/va416xx/src/can0/data3_cmb1.rs b/va416xx/src/can0/data3_cmb1.rs index 1eac55d..252f0de 100644 --- a/va416xx/src/can0/data3_cmb1.rs +++ b/va416xx/src/can0/data3_cmb1.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:7 - Data Byte 8"] #[inline(always)] - pub fn byte8(&mut self) -> Byte8W { + pub fn byte8(&mut self) -> Byte8W<'_, Data3Cmb1Spec> { Byte8W::new(self, 0) } #[doc = "Bits 8:15 - Data Byte 7"] #[inline(always)] - pub fn byte7(&mut self) -> Byte7W { + pub fn byte7(&mut self) -> Byte7W<'_, Data3Cmb1Spec> { Byte7W::new(self, 8) } } @@ -44,10 +44,6 @@ impl crate::Readable for Data3Cmb1Spec {} #[doc = "`write(|w| ..)` method takes [`data3_cmb1::W`](W) writer structure"] impl crate::Writable for Data3Cmb1Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA3_CMB1 to value 0"] -impl crate::Resettable for Data3Cmb1Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Data3Cmb1Spec {} diff --git a/va416xx/src/can0/data3_cmb10.rs b/va416xx/src/can0/data3_cmb10.rs index 2442205..6893044 100644 --- a/va416xx/src/can0/data3_cmb10.rs +++ b/va416xx/src/can0/data3_cmb10.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:7 - Data Byte 8"] #[inline(always)] - pub fn byte8(&mut self) -> Byte8W { + pub fn byte8(&mut self) -> Byte8W<'_, Data3Cmb10Spec> { Byte8W::new(self, 0) } #[doc = "Bits 8:15 - Data Byte 7"] #[inline(always)] - pub fn byte7(&mut self) -> Byte7W { + pub fn byte7(&mut self) -> Byte7W<'_, Data3Cmb10Spec> { Byte7W::new(self, 8) } } @@ -44,10 +44,6 @@ impl crate::Readable for Data3Cmb10Spec {} #[doc = "`write(|w| ..)` method takes [`data3_cmb10::W`](W) writer structure"] impl crate::Writable for Data3Cmb10Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA3_CMB10 to value 0"] -impl crate::Resettable for Data3Cmb10Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Data3Cmb10Spec {} diff --git a/va416xx/src/can0/data3_cmb11.rs b/va416xx/src/can0/data3_cmb11.rs index 76f2610..2779cd8 100644 --- a/va416xx/src/can0/data3_cmb11.rs +++ b/va416xx/src/can0/data3_cmb11.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:7 - Data Byte 8"] #[inline(always)] - pub fn byte8(&mut self) -> Byte8W { + pub fn byte8(&mut self) -> Byte8W<'_, Data3Cmb11Spec> { Byte8W::new(self, 0) } #[doc = "Bits 8:15 - Data Byte 7"] #[inline(always)] - pub fn byte7(&mut self) -> Byte7W { + pub fn byte7(&mut self) -> Byte7W<'_, Data3Cmb11Spec> { Byte7W::new(self, 8) } } @@ -44,10 +44,6 @@ impl crate::Readable for Data3Cmb11Spec {} #[doc = "`write(|w| ..)` method takes [`data3_cmb11::W`](W) writer structure"] impl crate::Writable for Data3Cmb11Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA3_CMB11 to value 0"] -impl crate::Resettable for Data3Cmb11Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Data3Cmb11Spec {} diff --git a/va416xx/src/can0/data3_cmb12.rs b/va416xx/src/can0/data3_cmb12.rs index 0292678..4a6dc45 100644 --- a/va416xx/src/can0/data3_cmb12.rs +++ b/va416xx/src/can0/data3_cmb12.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:7 - Data Byte 8"] #[inline(always)] - pub fn byte8(&mut self) -> Byte8W { + pub fn byte8(&mut self) -> Byte8W<'_, Data3Cmb12Spec> { Byte8W::new(self, 0) } #[doc = "Bits 8:15 - Data Byte 7"] #[inline(always)] - pub fn byte7(&mut self) -> Byte7W { + pub fn byte7(&mut self) -> Byte7W<'_, Data3Cmb12Spec> { Byte7W::new(self, 8) } } @@ -44,10 +44,6 @@ impl crate::Readable for Data3Cmb12Spec {} #[doc = "`write(|w| ..)` method takes [`data3_cmb12::W`](W) writer structure"] impl crate::Writable for Data3Cmb12Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA3_CMB12 to value 0"] -impl crate::Resettable for Data3Cmb12Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Data3Cmb12Spec {} diff --git a/va416xx/src/can0/data3_cmb13.rs b/va416xx/src/can0/data3_cmb13.rs index 3f0d669..4c994c5 100644 --- a/va416xx/src/can0/data3_cmb13.rs +++ b/va416xx/src/can0/data3_cmb13.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:7 - Data Byte 8"] #[inline(always)] - pub fn byte8(&mut self) -> Byte8W { + pub fn byte8(&mut self) -> Byte8W<'_, Data3Cmb13Spec> { Byte8W::new(self, 0) } #[doc = "Bits 8:15 - Data Byte 7"] #[inline(always)] - pub fn byte7(&mut self) -> Byte7W { + pub fn byte7(&mut self) -> Byte7W<'_, Data3Cmb13Spec> { Byte7W::new(self, 8) } } @@ -44,10 +44,6 @@ impl crate::Readable for Data3Cmb13Spec {} #[doc = "`write(|w| ..)` method takes [`data3_cmb13::W`](W) writer structure"] impl crate::Writable for Data3Cmb13Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA3_CMB13 to value 0"] -impl crate::Resettable for Data3Cmb13Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Data3Cmb13Spec {} diff --git a/va416xx/src/can0/data3_cmb14.rs b/va416xx/src/can0/data3_cmb14.rs index 28ceaaf..b340e4e 100644 --- a/va416xx/src/can0/data3_cmb14.rs +++ b/va416xx/src/can0/data3_cmb14.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:7 - Data Byte 8"] #[inline(always)] - pub fn byte8(&mut self) -> Byte8W { + pub fn byte8(&mut self) -> Byte8W<'_, Data3Cmb14Spec> { Byte8W::new(self, 0) } #[doc = "Bits 8:15 - Data Byte 7"] #[inline(always)] - pub fn byte7(&mut self) -> Byte7W { + pub fn byte7(&mut self) -> Byte7W<'_, Data3Cmb14Spec> { Byte7W::new(self, 8) } } @@ -44,10 +44,6 @@ impl crate::Readable for Data3Cmb14Spec {} #[doc = "`write(|w| ..)` method takes [`data3_cmb14::W`](W) writer structure"] impl crate::Writable for Data3Cmb14Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA3_CMB14 to value 0"] -impl crate::Resettable for Data3Cmb14Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Data3Cmb14Spec {} diff --git a/va416xx/src/can0/data3_cmb2.rs b/va416xx/src/can0/data3_cmb2.rs index db96e7d..ee87b2d 100644 --- a/va416xx/src/can0/data3_cmb2.rs +++ b/va416xx/src/can0/data3_cmb2.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:7 - Data Byte 8"] #[inline(always)] - pub fn byte8(&mut self) -> Byte8W { + pub fn byte8(&mut self) -> Byte8W<'_, Data3Cmb2Spec> { Byte8W::new(self, 0) } #[doc = "Bits 8:15 - Data Byte 7"] #[inline(always)] - pub fn byte7(&mut self) -> Byte7W { + pub fn byte7(&mut self) -> Byte7W<'_, Data3Cmb2Spec> { Byte7W::new(self, 8) } } @@ -44,10 +44,6 @@ impl crate::Readable for Data3Cmb2Spec {} #[doc = "`write(|w| ..)` method takes [`data3_cmb2::W`](W) writer structure"] impl crate::Writable for Data3Cmb2Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA3_CMB2 to value 0"] -impl crate::Resettable for Data3Cmb2Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Data3Cmb2Spec {} diff --git a/va416xx/src/can0/data3_cmb3.rs b/va416xx/src/can0/data3_cmb3.rs index 222944f..18009cc 100644 --- a/va416xx/src/can0/data3_cmb3.rs +++ b/va416xx/src/can0/data3_cmb3.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:7 - Data Byte 8"] #[inline(always)] - pub fn byte8(&mut self) -> Byte8W { + pub fn byte8(&mut self) -> Byte8W<'_, Data3Cmb3Spec> { Byte8W::new(self, 0) } #[doc = "Bits 8:15 - Data Byte 7"] #[inline(always)] - pub fn byte7(&mut self) -> Byte7W { + pub fn byte7(&mut self) -> Byte7W<'_, Data3Cmb3Spec> { Byte7W::new(self, 8) } } @@ -44,10 +44,6 @@ impl crate::Readable for Data3Cmb3Spec {} #[doc = "`write(|w| ..)` method takes [`data3_cmb3::W`](W) writer structure"] impl crate::Writable for Data3Cmb3Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA3_CMB3 to value 0"] -impl crate::Resettable for Data3Cmb3Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Data3Cmb3Spec {} diff --git a/va416xx/src/can0/data3_cmb4.rs b/va416xx/src/can0/data3_cmb4.rs index 20426a1..2c01cbb 100644 --- a/va416xx/src/can0/data3_cmb4.rs +++ b/va416xx/src/can0/data3_cmb4.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:7 - Data Byte 8"] #[inline(always)] - pub fn byte8(&mut self) -> Byte8W { + pub fn byte8(&mut self) -> Byte8W<'_, Data3Cmb4Spec> { Byte8W::new(self, 0) } #[doc = "Bits 8:15 - Data Byte 7"] #[inline(always)] - pub fn byte7(&mut self) -> Byte7W { + pub fn byte7(&mut self) -> Byte7W<'_, Data3Cmb4Spec> { Byte7W::new(self, 8) } } @@ -44,10 +44,6 @@ impl crate::Readable for Data3Cmb4Spec {} #[doc = "`write(|w| ..)` method takes [`data3_cmb4::W`](W) writer structure"] impl crate::Writable for Data3Cmb4Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA3_CMB4 to value 0"] -impl crate::Resettable for Data3Cmb4Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Data3Cmb4Spec {} diff --git a/va416xx/src/can0/data3_cmb5.rs b/va416xx/src/can0/data3_cmb5.rs index f7d95cf..65f043e 100644 --- a/va416xx/src/can0/data3_cmb5.rs +++ b/va416xx/src/can0/data3_cmb5.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:7 - Data Byte 8"] #[inline(always)] - pub fn byte8(&mut self) -> Byte8W { + pub fn byte8(&mut self) -> Byte8W<'_, Data3Cmb5Spec> { Byte8W::new(self, 0) } #[doc = "Bits 8:15 - Data Byte 7"] #[inline(always)] - pub fn byte7(&mut self) -> Byte7W { + pub fn byte7(&mut self) -> Byte7W<'_, Data3Cmb5Spec> { Byte7W::new(self, 8) } } @@ -44,10 +44,6 @@ impl crate::Readable for Data3Cmb5Spec {} #[doc = "`write(|w| ..)` method takes [`data3_cmb5::W`](W) writer structure"] impl crate::Writable for Data3Cmb5Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA3_CMB5 to value 0"] -impl crate::Resettable for Data3Cmb5Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Data3Cmb5Spec {} diff --git a/va416xx/src/can0/data3_cmb6.rs b/va416xx/src/can0/data3_cmb6.rs index bcb64df..5839749 100644 --- a/va416xx/src/can0/data3_cmb6.rs +++ b/va416xx/src/can0/data3_cmb6.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:7 - Data Byte 8"] #[inline(always)] - pub fn byte8(&mut self) -> Byte8W { + pub fn byte8(&mut self) -> Byte8W<'_, Data3Cmb6Spec> { Byte8W::new(self, 0) } #[doc = "Bits 8:15 - Data Byte 7"] #[inline(always)] - pub fn byte7(&mut self) -> Byte7W { + pub fn byte7(&mut self) -> Byte7W<'_, Data3Cmb6Spec> { Byte7W::new(self, 8) } } @@ -44,10 +44,6 @@ impl crate::Readable for Data3Cmb6Spec {} #[doc = "`write(|w| ..)` method takes [`data3_cmb6::W`](W) writer structure"] impl crate::Writable for Data3Cmb6Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA3_CMB6 to value 0"] -impl crate::Resettable for Data3Cmb6Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Data3Cmb6Spec {} diff --git a/va416xx/src/can0/data3_cmb7.rs b/va416xx/src/can0/data3_cmb7.rs index 2ef738f..c92ef72 100644 --- a/va416xx/src/can0/data3_cmb7.rs +++ b/va416xx/src/can0/data3_cmb7.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:7 - Data Byte 8"] #[inline(always)] - pub fn byte8(&mut self) -> Byte8W { + pub fn byte8(&mut self) -> Byte8W<'_, Data3Cmb7Spec> { Byte8W::new(self, 0) } #[doc = "Bits 8:15 - Data Byte 7"] #[inline(always)] - pub fn byte7(&mut self) -> Byte7W { + pub fn byte7(&mut self) -> Byte7W<'_, Data3Cmb7Spec> { Byte7W::new(self, 8) } } @@ -44,10 +44,6 @@ impl crate::Readable for Data3Cmb7Spec {} #[doc = "`write(|w| ..)` method takes [`data3_cmb7::W`](W) writer structure"] impl crate::Writable for Data3Cmb7Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA3_CMB7 to value 0"] -impl crate::Resettable for Data3Cmb7Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Data3Cmb7Spec {} diff --git a/va416xx/src/can0/data3_cmb8.rs b/va416xx/src/can0/data3_cmb8.rs index 92b5bce..72c20ac 100644 --- a/va416xx/src/can0/data3_cmb8.rs +++ b/va416xx/src/can0/data3_cmb8.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:7 - Data Byte 8"] #[inline(always)] - pub fn byte8(&mut self) -> Byte8W { + pub fn byte8(&mut self) -> Byte8W<'_, Data3Cmb8Spec> { Byte8W::new(self, 0) } #[doc = "Bits 8:15 - Data Byte 7"] #[inline(always)] - pub fn byte7(&mut self) -> Byte7W { + pub fn byte7(&mut self) -> Byte7W<'_, Data3Cmb8Spec> { Byte7W::new(self, 8) } } @@ -44,10 +44,6 @@ impl crate::Readable for Data3Cmb8Spec {} #[doc = "`write(|w| ..)` method takes [`data3_cmb8::W`](W) writer structure"] impl crate::Writable for Data3Cmb8Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA3_CMB8 to value 0"] -impl crate::Resettable for Data3Cmb8Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Data3Cmb8Spec {} diff --git a/va416xx/src/can0/data3_cmb9.rs b/va416xx/src/can0/data3_cmb9.rs index bb9de5a..3aeef82 100644 --- a/va416xx/src/can0/data3_cmb9.rs +++ b/va416xx/src/can0/data3_cmb9.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:7 - Data Byte 8"] #[inline(always)] - pub fn byte8(&mut self) -> Byte8W { + pub fn byte8(&mut self) -> Byte8W<'_, Data3Cmb9Spec> { Byte8W::new(self, 0) } #[doc = "Bits 8:15 - Data Byte 7"] #[inline(always)] - pub fn byte7(&mut self) -> Byte7W { + pub fn byte7(&mut self) -> Byte7W<'_, Data3Cmb9Spec> { Byte7W::new(self, 8) } } @@ -44,10 +44,6 @@ impl crate::Readable for Data3Cmb9Spec {} #[doc = "`write(|w| ..)` method takes [`data3_cmb9::W`](W) writer structure"] impl crate::Writable for Data3Cmb9Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA3_CMB9 to value 0"] -impl crate::Resettable for Data3Cmb9Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Data3Cmb9Spec {} diff --git a/va416xx/src/can0/data3_hcmb.rs b/va416xx/src/can0/data3_hcmb.rs index a8a3f31..b10ad27 100644 --- a/va416xx/src/can0/data3_hcmb.rs +++ b/va416xx/src/can0/data3_hcmb.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:7 - Data Byte 8"] #[inline(always)] - pub fn byte8(&mut self) -> Byte8W { + pub fn byte8(&mut self) -> Byte8W<'_, Data3HcmbSpec> { Byte8W::new(self, 0) } #[doc = "Bits 8:15 - Data Byte 7"] #[inline(always)] - pub fn byte7(&mut self) -> Byte7W { + pub fn byte7(&mut self) -> Byte7W<'_, Data3HcmbSpec> { Byte7W::new(self, 8) } } @@ -44,10 +44,6 @@ impl crate::Readable for Data3HcmbSpec {} #[doc = "`write(|w| ..)` method takes [`data3_hcmb::W`](W) writer structure"] impl crate::Writable for Data3HcmbSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA3_HCMB to value 0"] -impl crate::Resettable for Data3HcmbSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Data3HcmbSpec {} diff --git a/va416xx/src/can0/gmskb.rs b/va416xx/src/can0/gmskb.rs index 5bfde8a..db833c0 100644 --- a/va416xx/src/can0/gmskb.rs +++ b/va416xx/src/can0/gmskb.rs @@ -2,13 +2,9 @@ pub type R = crate::R; #[doc = "Register `GMSKB` writer"] pub type W = crate::W; -#[doc = "Field `GM0` reader - GM\\[17:15\\] -- Unused in standard, ID\\[17:15\\] -in extended"] +#[doc = "Field `GM0` reader - GM\\[17:15\\] - Unused in standard, ID\\[17:15\\] in extended"] pub type Gm0R = crate::FieldReader; -#[doc = "Field `GM0` writer - GM\\[17:15\\] -- Unused in standard, ID\\[17:15\\] -in extended"] +#[doc = "Field `GM0` writer - GM\\[17:15\\] - Unused in standard, ID\\[17:15\\] in extended"] pub type Gm0W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `IDE` reader - Identifier Extension Bit"] pub type IdeR = crate::BitReader; @@ -18,20 +14,12 @@ pub type IdeW<'a, REG> = crate::BitWriter<'a, REG>; pub type RtrR = crate::BitReader; #[doc = "Field `RTR` writer - Remote Transmission Request in Standard, Substitute Remote Request (SRR) in extended"] pub type RtrW<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GM1` reader - GM\\[28:18\\] -- ID\\[10:0\\] -in standard, ID\\[28:18\\] -in extended"] +#[doc = "Field `GM1` reader - GM\\[28:18\\] - ID\\[10:0\\] in standard, ID\\[28:18\\] in extended"] pub type Gm1R = crate::FieldReader; -#[doc = "Field `GM1` writer - GM\\[28:18\\] -- ID\\[10:0\\] -in standard, ID\\[28:18\\] -in extended"] +#[doc = "Field `GM1` writer - GM\\[28:18\\] - ID\\[10:0\\] in standard, ID\\[28:18\\] in extended"] pub type Gm1W<'a, REG> = crate::FieldWriter<'a, REG, 11, u16>; impl R { - #[doc = "Bits 0:2 - GM\\[17:15\\] -- Unused in standard, ID\\[17:15\\] -in extended"] + #[doc = "Bits 0:2 - GM\\[17:15\\] - Unused in standard, ID\\[17:15\\] in extended"] #[inline(always)] pub fn gm0(&self) -> Gm0R { Gm0R::new((self.bits & 7) as u8) @@ -46,39 +34,31 @@ in extended"] pub fn rtr(&self) -> RtrR { RtrR::new(((self.bits >> 4) & 1) != 0) } - #[doc = "Bits 5:15 - GM\\[28:18\\] -- ID\\[10:0\\] -in standard, ID\\[28:18\\] -in extended"] + #[doc = "Bits 5:15 - GM\\[28:18\\] - ID\\[10:0\\] in standard, ID\\[28:18\\] in extended"] #[inline(always)] pub fn gm1(&self) -> Gm1R { Gm1R::new(((self.bits >> 5) & 0x07ff) as u16) } } impl W { - #[doc = "Bits 0:2 - GM\\[17:15\\] -- Unused in standard, ID\\[17:15\\] -in extended"] + #[doc = "Bits 0:2 - GM\\[17:15\\] - Unused in standard, ID\\[17:15\\] in extended"] #[inline(always)] - pub fn gm0(&mut self) -> Gm0W { + pub fn gm0(&mut self) -> Gm0W<'_, GmskbSpec> { Gm0W::new(self, 0) } #[doc = "Bit 3 - Identifier Extension Bit"] #[inline(always)] - pub fn ide(&mut self) -> IdeW { + pub fn ide(&mut self) -> IdeW<'_, GmskbSpec> { IdeW::new(self, 3) } #[doc = "Bit 4 - Remote Transmission Request in Standard, Substitute Remote Request (SRR) in extended"] #[inline(always)] - pub fn rtr(&mut self) -> RtrW { + pub fn rtr(&mut self) -> RtrW<'_, GmskbSpec> { RtrW::new(self, 4) } - #[doc = "Bits 5:15 - GM\\[28:18\\] -- ID\\[10:0\\] -in standard, ID\\[28:18\\] -in extended"] + #[doc = "Bits 5:15 - GM\\[28:18\\] - ID\\[10:0\\] in standard, ID\\[28:18\\] in extended"] #[inline(always)] - pub fn gm1(&mut self) -> Gm1W { + pub fn gm1(&mut self) -> Gm1W<'_, GmskbSpec> { Gm1W::new(self, 5) } } @@ -92,10 +72,6 @@ impl crate::Readable for GmskbSpec {} #[doc = "`write(|w| ..)` method takes [`gmskb::W`](W) writer structure"] impl crate::Writable for GmskbSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GMSKB to value 0"] -impl crate::Resettable for GmskbSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for GmskbSpec {} diff --git a/va416xx/src/can0/gmskx.rs b/va416xx/src/can0/gmskx.rs index 4539ddc..5897eed 100644 --- a/va416xx/src/can0/gmskx.rs +++ b/va416xx/src/can0/gmskx.rs @@ -6,13 +6,9 @@ pub type W = crate::W; pub type XrtrR = crate::BitReader; #[doc = "Field `XRTR` writer - Extended Remote transmission Request Bit"] pub type XrtrW<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GM` reader - GM\\[14:0\\] -used when an extended frame is received. ID\\[14:0\\] -in extended, unused standard"] +#[doc = "Field `GM` reader - GM\\[14:0\\] used when an extended frame is received. ID\\[14:0\\] in extended, unused standard"] pub type GmR = crate::FieldReader; -#[doc = "Field `GM` writer - GM\\[14:0\\] -used when an extended frame is received. ID\\[14:0\\] -in extended, unused standard"] +#[doc = "Field `GM` writer - GM\\[14:0\\] used when an extended frame is received. ID\\[14:0\\] in extended, unused standard"] pub type GmW<'a, REG> = crate::FieldWriter<'a, REG, 15, u16>; impl R { #[doc = "Bit 0 - Extended Remote transmission Request Bit"] @@ -20,9 +16,7 @@ impl R { pub fn xrtr(&self) -> XrtrR { XrtrR::new((self.bits & 1) != 0) } - #[doc = "Bits 1:15 - GM\\[14:0\\] -used when an extended frame is received. ID\\[14:0\\] -in extended, unused standard"] + #[doc = "Bits 1:15 - GM\\[14:0\\] used when an extended frame is received. ID\\[14:0\\] in extended, unused standard"] #[inline(always)] pub fn gm(&self) -> GmR { GmR::new(((self.bits >> 1) & 0x7fff) as u16) @@ -31,14 +25,12 @@ in extended, unused standard"] impl W { #[doc = "Bit 0 - Extended Remote transmission Request Bit"] #[inline(always)] - pub fn xrtr(&mut self) -> XrtrW { + pub fn xrtr(&mut self) -> XrtrW<'_, GmskxSpec> { XrtrW::new(self, 0) } - #[doc = "Bits 1:15 - GM\\[14:0\\] -used when an extended frame is received. ID\\[14:0\\] -in extended, unused standard"] + #[doc = "Bits 1:15 - GM\\[14:0\\] used when an extended frame is received. ID\\[14:0\\] in extended, unused standard"] #[inline(always)] - pub fn gm(&mut self) -> GmW { + pub fn gm(&mut self) -> GmW<'_, GmskxSpec> { GmW::new(self, 1) } } @@ -52,10 +44,6 @@ impl crate::Readable for GmskxSpec {} #[doc = "`write(|w| ..)` method takes [`gmskx::W`](W) writer structure"] impl crate::Writable for GmskxSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GMSKX to value 0"] -impl crate::Resettable for GmskxSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for GmskxSpec {} diff --git a/va416xx/src/can0/id0_cmb0.rs b/va416xx/src/can0/id0_cmb0.rs index dbb37df..0d0e2c2 100644 --- a/va416xx/src/can0/id0_cmb0.rs +++ b/va416xx/src/can0/id0_cmb0.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id0(&mut self) -> Id0W { + pub fn id0(&mut self) -> Id0W<'_, Id0Cmb0Spec> { Id0W::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for Id0Cmb0Spec {} #[doc = "`write(|w| ..)` method takes [`id0_cmb0::W`](W) writer structure"] impl crate::Writable for Id0Cmb0Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ID0_CMB0 to value 0"] -impl crate::Resettable for Id0Cmb0Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Id0Cmb0Spec {} diff --git a/va416xx/src/can0/id0_cmb1.rs b/va416xx/src/can0/id0_cmb1.rs index 18c72d5..c37bf13 100644 --- a/va416xx/src/can0/id0_cmb1.rs +++ b/va416xx/src/can0/id0_cmb1.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id0(&mut self) -> Id0W { + pub fn id0(&mut self) -> Id0W<'_, Id0Cmb1Spec> { Id0W::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for Id0Cmb1Spec {} #[doc = "`write(|w| ..)` method takes [`id0_cmb1::W`](W) writer structure"] impl crate::Writable for Id0Cmb1Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ID0_CMB1 to value 0"] -impl crate::Resettable for Id0Cmb1Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Id0Cmb1Spec {} diff --git a/va416xx/src/can0/id0_cmb10.rs b/va416xx/src/can0/id0_cmb10.rs index 7ac6e66..c12da5e 100644 --- a/va416xx/src/can0/id0_cmb10.rs +++ b/va416xx/src/can0/id0_cmb10.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id0(&mut self) -> Id0W { + pub fn id0(&mut self) -> Id0W<'_, Id0Cmb10Spec> { Id0W::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for Id0Cmb10Spec {} #[doc = "`write(|w| ..)` method takes [`id0_cmb10::W`](W) writer structure"] impl crate::Writable for Id0Cmb10Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ID0_CMB10 to value 0"] -impl crate::Resettable for Id0Cmb10Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Id0Cmb10Spec {} diff --git a/va416xx/src/can0/id0_cmb11.rs b/va416xx/src/can0/id0_cmb11.rs index a8e1eef..f6a6279 100644 --- a/va416xx/src/can0/id0_cmb11.rs +++ b/va416xx/src/can0/id0_cmb11.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id0(&mut self) -> Id0W { + pub fn id0(&mut self) -> Id0W<'_, Id0Cmb11Spec> { Id0W::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for Id0Cmb11Spec {} #[doc = "`write(|w| ..)` method takes [`id0_cmb11::W`](W) writer structure"] impl crate::Writable for Id0Cmb11Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ID0_CMB11 to value 0"] -impl crate::Resettable for Id0Cmb11Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Id0Cmb11Spec {} diff --git a/va416xx/src/can0/id0_cmb12.rs b/va416xx/src/can0/id0_cmb12.rs index d7db4da..8f9cbe0 100644 --- a/va416xx/src/can0/id0_cmb12.rs +++ b/va416xx/src/can0/id0_cmb12.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id0(&mut self) -> Id0W { + pub fn id0(&mut self) -> Id0W<'_, Id0Cmb12Spec> { Id0W::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for Id0Cmb12Spec {} #[doc = "`write(|w| ..)` method takes [`id0_cmb12::W`](W) writer structure"] impl crate::Writable for Id0Cmb12Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ID0_CMB12 to value 0"] -impl crate::Resettable for Id0Cmb12Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Id0Cmb12Spec {} diff --git a/va416xx/src/can0/id0_cmb13.rs b/va416xx/src/can0/id0_cmb13.rs index 3410691..7f7d93a 100644 --- a/va416xx/src/can0/id0_cmb13.rs +++ b/va416xx/src/can0/id0_cmb13.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id0(&mut self) -> Id0W { + pub fn id0(&mut self) -> Id0W<'_, Id0Cmb13Spec> { Id0W::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for Id0Cmb13Spec {} #[doc = "`write(|w| ..)` method takes [`id0_cmb13::W`](W) writer structure"] impl crate::Writable for Id0Cmb13Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ID0_CMB13 to value 0"] -impl crate::Resettable for Id0Cmb13Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Id0Cmb13Spec {} diff --git a/va416xx/src/can0/id0_cmb14.rs b/va416xx/src/can0/id0_cmb14.rs index 45b5097..b678630 100644 --- a/va416xx/src/can0/id0_cmb14.rs +++ b/va416xx/src/can0/id0_cmb14.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id0(&mut self) -> Id0W { + pub fn id0(&mut self) -> Id0W<'_, Id0Cmb14Spec> { Id0W::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for Id0Cmb14Spec {} #[doc = "`write(|w| ..)` method takes [`id0_cmb14::W`](W) writer structure"] impl crate::Writable for Id0Cmb14Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ID0_CMB14 to value 0"] -impl crate::Resettable for Id0Cmb14Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Id0Cmb14Spec {} diff --git a/va416xx/src/can0/id0_cmb2.rs b/va416xx/src/can0/id0_cmb2.rs index 122cea0..99dde1b 100644 --- a/va416xx/src/can0/id0_cmb2.rs +++ b/va416xx/src/can0/id0_cmb2.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id0(&mut self) -> Id0W { + pub fn id0(&mut self) -> Id0W<'_, Id0Cmb2Spec> { Id0W::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for Id0Cmb2Spec {} #[doc = "`write(|w| ..)` method takes [`id0_cmb2::W`](W) writer structure"] impl crate::Writable for Id0Cmb2Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ID0_CMB2 to value 0"] -impl crate::Resettable for Id0Cmb2Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Id0Cmb2Spec {} diff --git a/va416xx/src/can0/id0_cmb3.rs b/va416xx/src/can0/id0_cmb3.rs index c8e2ba5..5b4cf64 100644 --- a/va416xx/src/can0/id0_cmb3.rs +++ b/va416xx/src/can0/id0_cmb3.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id0(&mut self) -> Id0W { + pub fn id0(&mut self) -> Id0W<'_, Id0Cmb3Spec> { Id0W::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for Id0Cmb3Spec {} #[doc = "`write(|w| ..)` method takes [`id0_cmb3::W`](W) writer structure"] impl crate::Writable for Id0Cmb3Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ID0_CMB3 to value 0"] -impl crate::Resettable for Id0Cmb3Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Id0Cmb3Spec {} diff --git a/va416xx/src/can0/id0_cmb4.rs b/va416xx/src/can0/id0_cmb4.rs index 4173c46..0e7cdd0 100644 --- a/va416xx/src/can0/id0_cmb4.rs +++ b/va416xx/src/can0/id0_cmb4.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id0(&mut self) -> Id0W { + pub fn id0(&mut self) -> Id0W<'_, Id0Cmb4Spec> { Id0W::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for Id0Cmb4Spec {} #[doc = "`write(|w| ..)` method takes [`id0_cmb4::W`](W) writer structure"] impl crate::Writable for Id0Cmb4Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ID0_CMB4 to value 0"] -impl crate::Resettable for Id0Cmb4Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Id0Cmb4Spec {} diff --git a/va416xx/src/can0/id0_cmb5.rs b/va416xx/src/can0/id0_cmb5.rs index 224dbcd..e1539c2 100644 --- a/va416xx/src/can0/id0_cmb5.rs +++ b/va416xx/src/can0/id0_cmb5.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id0(&mut self) -> Id0W { + pub fn id0(&mut self) -> Id0W<'_, Id0Cmb5Spec> { Id0W::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for Id0Cmb5Spec {} #[doc = "`write(|w| ..)` method takes [`id0_cmb5::W`](W) writer structure"] impl crate::Writable for Id0Cmb5Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ID0_CMB5 to value 0"] -impl crate::Resettable for Id0Cmb5Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Id0Cmb5Spec {} diff --git a/va416xx/src/can0/id0_cmb6.rs b/va416xx/src/can0/id0_cmb6.rs index c5a3e89..97adb78 100644 --- a/va416xx/src/can0/id0_cmb6.rs +++ b/va416xx/src/can0/id0_cmb6.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id0(&mut self) -> Id0W { + pub fn id0(&mut self) -> Id0W<'_, Id0Cmb6Spec> { Id0W::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for Id0Cmb6Spec {} #[doc = "`write(|w| ..)` method takes [`id0_cmb6::W`](W) writer structure"] impl crate::Writable for Id0Cmb6Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ID0_CMB6 to value 0"] -impl crate::Resettable for Id0Cmb6Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Id0Cmb6Spec {} diff --git a/va416xx/src/can0/id0_cmb7.rs b/va416xx/src/can0/id0_cmb7.rs index 7269bac..e03298a 100644 --- a/va416xx/src/can0/id0_cmb7.rs +++ b/va416xx/src/can0/id0_cmb7.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id0(&mut self) -> Id0W { + pub fn id0(&mut self) -> Id0W<'_, Id0Cmb7Spec> { Id0W::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for Id0Cmb7Spec {} #[doc = "`write(|w| ..)` method takes [`id0_cmb7::W`](W) writer structure"] impl crate::Writable for Id0Cmb7Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ID0_CMB7 to value 0"] -impl crate::Resettable for Id0Cmb7Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Id0Cmb7Spec {} diff --git a/va416xx/src/can0/id0_cmb8.rs b/va416xx/src/can0/id0_cmb8.rs index 1630acf..18799c1 100644 --- a/va416xx/src/can0/id0_cmb8.rs +++ b/va416xx/src/can0/id0_cmb8.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id0(&mut self) -> Id0W { + pub fn id0(&mut self) -> Id0W<'_, Id0Cmb8Spec> { Id0W::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for Id0Cmb8Spec {} #[doc = "`write(|w| ..)` method takes [`id0_cmb8::W`](W) writer structure"] impl crate::Writable for Id0Cmb8Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ID0_CMB8 to value 0"] -impl crate::Resettable for Id0Cmb8Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Id0Cmb8Spec {} diff --git a/va416xx/src/can0/id0_cmb9.rs b/va416xx/src/can0/id0_cmb9.rs index f0c0bf2..9b2471a 100644 --- a/va416xx/src/can0/id0_cmb9.rs +++ b/va416xx/src/can0/id0_cmb9.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id0(&mut self) -> Id0W { + pub fn id0(&mut self) -> Id0W<'_, Id0Cmb9Spec> { Id0W::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for Id0Cmb9Spec {} #[doc = "`write(|w| ..)` method takes [`id0_cmb9::W`](W) writer structure"] impl crate::Writable for Id0Cmb9Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ID0_CMB9 to value 0"] -impl crate::Resettable for Id0Cmb9Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Id0Cmb9Spec {} diff --git a/va416xx/src/can0/id0_hcmb.rs b/va416xx/src/can0/id0_hcmb.rs index a1d3853..ecb3cd9 100644 --- a/va416xx/src/can0/id0_hcmb.rs +++ b/va416xx/src/can0/id0_hcmb.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id0(&mut self) -> Id0W { + pub fn id0(&mut self) -> Id0W<'_, Id0HcmbSpec> { Id0W::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for Id0HcmbSpec {} #[doc = "`write(|w| ..)` method takes [`id0_hcmb::W`](W) writer structure"] impl crate::Writable for Id0HcmbSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ID0_HCMB to value 0"] -impl crate::Resettable for Id0HcmbSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Id0HcmbSpec {} diff --git a/va416xx/src/can0/id1_cmb0.rs b/va416xx/src/can0/id1_cmb0.rs index 8d7c286..ca211c4 100644 --- a/va416xx/src/can0/id1_cmb0.rs +++ b/va416xx/src/can0/id1_cmb0.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id1(&mut self) -> Id1W { + pub fn id1(&mut self) -> Id1W<'_, Id1Cmb0Spec> { Id1W::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for Id1Cmb0Spec {} #[doc = "`write(|w| ..)` method takes [`id1_cmb0::W`](W) writer structure"] impl crate::Writable for Id1Cmb0Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ID1_CMB0 to value 0"] -impl crate::Resettable for Id1Cmb0Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Id1Cmb0Spec {} diff --git a/va416xx/src/can0/id1_cmb1.rs b/va416xx/src/can0/id1_cmb1.rs index 9012a7d..9ccc3a0 100644 --- a/va416xx/src/can0/id1_cmb1.rs +++ b/va416xx/src/can0/id1_cmb1.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id1(&mut self) -> Id1W { + pub fn id1(&mut self) -> Id1W<'_, Id1Cmb1Spec> { Id1W::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for Id1Cmb1Spec {} #[doc = "`write(|w| ..)` method takes [`id1_cmb1::W`](W) writer structure"] impl crate::Writable for Id1Cmb1Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ID1_CMB1 to value 0"] -impl crate::Resettable for Id1Cmb1Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Id1Cmb1Spec {} diff --git a/va416xx/src/can0/id1_cmb10.rs b/va416xx/src/can0/id1_cmb10.rs index fb5e002..c9acf7d 100644 --- a/va416xx/src/can0/id1_cmb10.rs +++ b/va416xx/src/can0/id1_cmb10.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id1(&mut self) -> Id1W { + pub fn id1(&mut self) -> Id1W<'_, Id1Cmb10Spec> { Id1W::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for Id1Cmb10Spec {} #[doc = "`write(|w| ..)` method takes [`id1_cmb10::W`](W) writer structure"] impl crate::Writable for Id1Cmb10Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ID1_CMB10 to value 0"] -impl crate::Resettable for Id1Cmb10Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Id1Cmb10Spec {} diff --git a/va416xx/src/can0/id1_cmb11.rs b/va416xx/src/can0/id1_cmb11.rs index 9cb19c8..2c44b9b 100644 --- a/va416xx/src/can0/id1_cmb11.rs +++ b/va416xx/src/can0/id1_cmb11.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id1(&mut self) -> Id1W { + pub fn id1(&mut self) -> Id1W<'_, Id1Cmb11Spec> { Id1W::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for Id1Cmb11Spec {} #[doc = "`write(|w| ..)` method takes [`id1_cmb11::W`](W) writer structure"] impl crate::Writable for Id1Cmb11Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ID1_CMB11 to value 0"] -impl crate::Resettable for Id1Cmb11Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Id1Cmb11Spec {} diff --git a/va416xx/src/can0/id1_cmb12.rs b/va416xx/src/can0/id1_cmb12.rs index 8063adf..74cc7ee 100644 --- a/va416xx/src/can0/id1_cmb12.rs +++ b/va416xx/src/can0/id1_cmb12.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id1(&mut self) -> Id1W { + pub fn id1(&mut self) -> Id1W<'_, Id1Cmb12Spec> { Id1W::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for Id1Cmb12Spec {} #[doc = "`write(|w| ..)` method takes [`id1_cmb12::W`](W) writer structure"] impl crate::Writable for Id1Cmb12Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ID1_CMB12 to value 0"] -impl crate::Resettable for Id1Cmb12Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Id1Cmb12Spec {} diff --git a/va416xx/src/can0/id1_cmb13.rs b/va416xx/src/can0/id1_cmb13.rs index 3da5dcc..8cb14e6 100644 --- a/va416xx/src/can0/id1_cmb13.rs +++ b/va416xx/src/can0/id1_cmb13.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id1(&mut self) -> Id1W { + pub fn id1(&mut self) -> Id1W<'_, Id1Cmb13Spec> { Id1W::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for Id1Cmb13Spec {} #[doc = "`write(|w| ..)` method takes [`id1_cmb13::W`](W) writer structure"] impl crate::Writable for Id1Cmb13Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ID1_CMB13 to value 0"] -impl crate::Resettable for Id1Cmb13Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Id1Cmb13Spec {} diff --git a/va416xx/src/can0/id1_cmb14.rs b/va416xx/src/can0/id1_cmb14.rs index c99a82a..dda21ed 100644 --- a/va416xx/src/can0/id1_cmb14.rs +++ b/va416xx/src/can0/id1_cmb14.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id1(&mut self) -> Id1W { + pub fn id1(&mut self) -> Id1W<'_, Id1Cmb14Spec> { Id1W::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for Id1Cmb14Spec {} #[doc = "`write(|w| ..)` method takes [`id1_cmb14::W`](W) writer structure"] impl crate::Writable for Id1Cmb14Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ID1_CMB14 to value 0"] -impl crate::Resettable for Id1Cmb14Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Id1Cmb14Spec {} diff --git a/va416xx/src/can0/id1_cmb2.rs b/va416xx/src/can0/id1_cmb2.rs index 39442a6..ab36ef7 100644 --- a/va416xx/src/can0/id1_cmb2.rs +++ b/va416xx/src/can0/id1_cmb2.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id1(&mut self) -> Id1W { + pub fn id1(&mut self) -> Id1W<'_, Id1Cmb2Spec> { Id1W::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for Id1Cmb2Spec {} #[doc = "`write(|w| ..)` method takes [`id1_cmb2::W`](W) writer structure"] impl crate::Writable for Id1Cmb2Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ID1_CMB2 to value 0"] -impl crate::Resettable for Id1Cmb2Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Id1Cmb2Spec {} diff --git a/va416xx/src/can0/id1_cmb3.rs b/va416xx/src/can0/id1_cmb3.rs index 2fa5ebd..2174457 100644 --- a/va416xx/src/can0/id1_cmb3.rs +++ b/va416xx/src/can0/id1_cmb3.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id1(&mut self) -> Id1W { + pub fn id1(&mut self) -> Id1W<'_, Id1Cmb3Spec> { Id1W::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for Id1Cmb3Spec {} #[doc = "`write(|w| ..)` method takes [`id1_cmb3::W`](W) writer structure"] impl crate::Writable for Id1Cmb3Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ID1_CMB3 to value 0"] -impl crate::Resettable for Id1Cmb3Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Id1Cmb3Spec {} diff --git a/va416xx/src/can0/id1_cmb4.rs b/va416xx/src/can0/id1_cmb4.rs index 2a031a8..e46b000 100644 --- a/va416xx/src/can0/id1_cmb4.rs +++ b/va416xx/src/can0/id1_cmb4.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id1(&mut self) -> Id1W { + pub fn id1(&mut self) -> Id1W<'_, Id1Cmb4Spec> { Id1W::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for Id1Cmb4Spec {} #[doc = "`write(|w| ..)` method takes [`id1_cmb4::W`](W) writer structure"] impl crate::Writable for Id1Cmb4Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ID1_CMB4 to value 0"] -impl crate::Resettable for Id1Cmb4Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Id1Cmb4Spec {} diff --git a/va416xx/src/can0/id1_cmb5.rs b/va416xx/src/can0/id1_cmb5.rs index 515221e..d17f343 100644 --- a/va416xx/src/can0/id1_cmb5.rs +++ b/va416xx/src/can0/id1_cmb5.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id1(&mut self) -> Id1W { + pub fn id1(&mut self) -> Id1W<'_, Id1Cmb5Spec> { Id1W::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for Id1Cmb5Spec {} #[doc = "`write(|w| ..)` method takes [`id1_cmb5::W`](W) writer structure"] impl crate::Writable for Id1Cmb5Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ID1_CMB5 to value 0"] -impl crate::Resettable for Id1Cmb5Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Id1Cmb5Spec {} diff --git a/va416xx/src/can0/id1_cmb6.rs b/va416xx/src/can0/id1_cmb6.rs index b17df28..3374a90 100644 --- a/va416xx/src/can0/id1_cmb6.rs +++ b/va416xx/src/can0/id1_cmb6.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id1(&mut self) -> Id1W { + pub fn id1(&mut self) -> Id1W<'_, Id1Cmb6Spec> { Id1W::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for Id1Cmb6Spec {} #[doc = "`write(|w| ..)` method takes [`id1_cmb6::W`](W) writer structure"] impl crate::Writable for Id1Cmb6Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ID1_CMB6 to value 0"] -impl crate::Resettable for Id1Cmb6Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Id1Cmb6Spec {} diff --git a/va416xx/src/can0/id1_cmb7.rs b/va416xx/src/can0/id1_cmb7.rs index 7989a30..a2a8620 100644 --- a/va416xx/src/can0/id1_cmb7.rs +++ b/va416xx/src/can0/id1_cmb7.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id1(&mut self) -> Id1W { + pub fn id1(&mut self) -> Id1W<'_, Id1Cmb7Spec> { Id1W::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for Id1Cmb7Spec {} #[doc = "`write(|w| ..)` method takes [`id1_cmb7::W`](W) writer structure"] impl crate::Writable for Id1Cmb7Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ID1_CMB7 to value 0"] -impl crate::Resettable for Id1Cmb7Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Id1Cmb7Spec {} diff --git a/va416xx/src/can0/id1_cmb8.rs b/va416xx/src/can0/id1_cmb8.rs index 27fd373..51f98cb 100644 --- a/va416xx/src/can0/id1_cmb8.rs +++ b/va416xx/src/can0/id1_cmb8.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id1(&mut self) -> Id1W { + pub fn id1(&mut self) -> Id1W<'_, Id1Cmb8Spec> { Id1W::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for Id1Cmb8Spec {} #[doc = "`write(|w| ..)` method takes [`id1_cmb8::W`](W) writer structure"] impl crate::Writable for Id1Cmb8Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ID1_CMB8 to value 0"] -impl crate::Resettable for Id1Cmb8Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Id1Cmb8Spec {} diff --git a/va416xx/src/can0/id1_cmb9.rs b/va416xx/src/can0/id1_cmb9.rs index f93dc84..777ec4f 100644 --- a/va416xx/src/can0/id1_cmb9.rs +++ b/va416xx/src/can0/id1_cmb9.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id1(&mut self) -> Id1W { + pub fn id1(&mut self) -> Id1W<'_, Id1Cmb9Spec> { Id1W::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for Id1Cmb9Spec {} #[doc = "`write(|w| ..)` method takes [`id1_cmb9::W`](W) writer structure"] impl crate::Writable for Id1Cmb9Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ID1_CMB9 to value 0"] -impl crate::Resettable for Id1Cmb9Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Id1Cmb9Spec {} diff --git a/va416xx/src/can0/id1_hcmb.rs b/va416xx/src/can0/id1_hcmb.rs index bf2f112..a6d1146 100644 --- a/va416xx/src/can0/id1_hcmb.rs +++ b/va416xx/src/can0/id1_hcmb.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:15 - Half of CAN Frame ID. Format Varies for Standard or Extended Frames"] #[inline(always)] - pub fn id1(&mut self) -> Id1W { + pub fn id1(&mut self) -> Id1W<'_, Id1HcmbSpec> { Id1W::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for Id1HcmbSpec {} #[doc = "`write(|w| ..)` method takes [`id1_hcmb::W`](W) writer structure"] impl crate::Writable for Id1HcmbSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ID1_HCMB to value 0"] -impl crate::Resettable for Id1HcmbSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Id1HcmbSpec {} diff --git a/va416xx/src/can0/tstp_cmb0.rs b/va416xx/src/can0/tstp_cmb0.rs index 62ac56b..c9b1c10 100644 --- a/va416xx/src/can0/tstp_cmb0.rs +++ b/va416xx/src/can0/tstp_cmb0.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:15 - Timestamp"] #[inline(always)] - pub fn timestamp(&mut self) -> TimestampW { + pub fn timestamp(&mut self) -> TimestampW<'_, TstpCmb0Spec> { TimestampW::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for TstpCmb0Spec {} #[doc = "`write(|w| ..)` method takes [`tstp_cmb0::W`](W) writer structure"] impl crate::Writable for TstpCmb0Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TSTP_CMB0 to value 0"] -impl crate::Resettable for TstpCmb0Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for TstpCmb0Spec {} diff --git a/va416xx/src/can0/tstp_cmb1.rs b/va416xx/src/can0/tstp_cmb1.rs index b18d05e..8422f84 100644 --- a/va416xx/src/can0/tstp_cmb1.rs +++ b/va416xx/src/can0/tstp_cmb1.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:15 - Timestamp"] #[inline(always)] - pub fn timestamp(&mut self) -> TimestampW { + pub fn timestamp(&mut self) -> TimestampW<'_, TstpCmb1Spec> { TimestampW::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for TstpCmb1Spec {} #[doc = "`write(|w| ..)` method takes [`tstp_cmb1::W`](W) writer structure"] impl crate::Writable for TstpCmb1Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TSTP_CMB1 to value 0"] -impl crate::Resettable for TstpCmb1Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for TstpCmb1Spec {} diff --git a/va416xx/src/can0/tstp_cmb10.rs b/va416xx/src/can0/tstp_cmb10.rs index 23427e4..e0f2ead 100644 --- a/va416xx/src/can0/tstp_cmb10.rs +++ b/va416xx/src/can0/tstp_cmb10.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:15 - Timestamp"] #[inline(always)] - pub fn timestamp(&mut self) -> TimestampW { + pub fn timestamp(&mut self) -> TimestampW<'_, TstpCmb10Spec> { TimestampW::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for TstpCmb10Spec {} #[doc = "`write(|w| ..)` method takes [`tstp_cmb10::W`](W) writer structure"] impl crate::Writable for TstpCmb10Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TSTP_CMB10 to value 0"] -impl crate::Resettable for TstpCmb10Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for TstpCmb10Spec {} diff --git a/va416xx/src/can0/tstp_cmb11.rs b/va416xx/src/can0/tstp_cmb11.rs index 42e5925..f2f8a32 100644 --- a/va416xx/src/can0/tstp_cmb11.rs +++ b/va416xx/src/can0/tstp_cmb11.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:15 - Timestamp"] #[inline(always)] - pub fn timestamp(&mut self) -> TimestampW { + pub fn timestamp(&mut self) -> TimestampW<'_, TstpCmb11Spec> { TimestampW::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for TstpCmb11Spec {} #[doc = "`write(|w| ..)` method takes [`tstp_cmb11::W`](W) writer structure"] impl crate::Writable for TstpCmb11Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TSTP_CMB11 to value 0"] -impl crate::Resettable for TstpCmb11Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for TstpCmb11Spec {} diff --git a/va416xx/src/can0/tstp_cmb12.rs b/va416xx/src/can0/tstp_cmb12.rs index 1cd6bca..0420080 100644 --- a/va416xx/src/can0/tstp_cmb12.rs +++ b/va416xx/src/can0/tstp_cmb12.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:15 - Timestamp"] #[inline(always)] - pub fn timestamp(&mut self) -> TimestampW { + pub fn timestamp(&mut self) -> TimestampW<'_, TstpCmb12Spec> { TimestampW::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for TstpCmb12Spec {} #[doc = "`write(|w| ..)` method takes [`tstp_cmb12::W`](W) writer structure"] impl crate::Writable for TstpCmb12Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TSTP_CMB12 to value 0"] -impl crate::Resettable for TstpCmb12Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for TstpCmb12Spec {} diff --git a/va416xx/src/can0/tstp_cmb13.rs b/va416xx/src/can0/tstp_cmb13.rs index b6ed7f3..1645968 100644 --- a/va416xx/src/can0/tstp_cmb13.rs +++ b/va416xx/src/can0/tstp_cmb13.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:15 - Timestamp"] #[inline(always)] - pub fn timestamp(&mut self) -> TimestampW { + pub fn timestamp(&mut self) -> TimestampW<'_, TstpCmb13Spec> { TimestampW::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for TstpCmb13Spec {} #[doc = "`write(|w| ..)` method takes [`tstp_cmb13::W`](W) writer structure"] impl crate::Writable for TstpCmb13Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TSTP_CMB13 to value 0"] -impl crate::Resettable for TstpCmb13Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for TstpCmb13Spec {} diff --git a/va416xx/src/can0/tstp_cmb14.rs b/va416xx/src/can0/tstp_cmb14.rs index 6532e66..cba06c3 100644 --- a/va416xx/src/can0/tstp_cmb14.rs +++ b/va416xx/src/can0/tstp_cmb14.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:15 - Timestamp"] #[inline(always)] - pub fn timestamp(&mut self) -> TimestampW { + pub fn timestamp(&mut self) -> TimestampW<'_, TstpCmb14Spec> { TimestampW::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for TstpCmb14Spec {} #[doc = "`write(|w| ..)` method takes [`tstp_cmb14::W`](W) writer structure"] impl crate::Writable for TstpCmb14Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TSTP_CMB14 to value 0"] -impl crate::Resettable for TstpCmb14Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for TstpCmb14Spec {} diff --git a/va416xx/src/can0/tstp_cmb2.rs b/va416xx/src/can0/tstp_cmb2.rs index 4dcdbc1..9d92124 100644 --- a/va416xx/src/can0/tstp_cmb2.rs +++ b/va416xx/src/can0/tstp_cmb2.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:15 - Timestamp"] #[inline(always)] - pub fn timestamp(&mut self) -> TimestampW { + pub fn timestamp(&mut self) -> TimestampW<'_, TstpCmb2Spec> { TimestampW::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for TstpCmb2Spec {} #[doc = "`write(|w| ..)` method takes [`tstp_cmb2::W`](W) writer structure"] impl crate::Writable for TstpCmb2Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TSTP_CMB2 to value 0"] -impl crate::Resettable for TstpCmb2Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for TstpCmb2Spec {} diff --git a/va416xx/src/can0/tstp_cmb3.rs b/va416xx/src/can0/tstp_cmb3.rs index c02139a..1f8c9c1 100644 --- a/va416xx/src/can0/tstp_cmb3.rs +++ b/va416xx/src/can0/tstp_cmb3.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:15 - Timestamp"] #[inline(always)] - pub fn timestamp(&mut self) -> TimestampW { + pub fn timestamp(&mut self) -> TimestampW<'_, TstpCmb3Spec> { TimestampW::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for TstpCmb3Spec {} #[doc = "`write(|w| ..)` method takes [`tstp_cmb3::W`](W) writer structure"] impl crate::Writable for TstpCmb3Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TSTP_CMB3 to value 0"] -impl crate::Resettable for TstpCmb3Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for TstpCmb3Spec {} diff --git a/va416xx/src/can0/tstp_cmb4.rs b/va416xx/src/can0/tstp_cmb4.rs index 45fdb1a..a20dfea 100644 --- a/va416xx/src/can0/tstp_cmb4.rs +++ b/va416xx/src/can0/tstp_cmb4.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:15 - Timestamp"] #[inline(always)] - pub fn timestamp(&mut self) -> TimestampW { + pub fn timestamp(&mut self) -> TimestampW<'_, TstpCmb4Spec> { TimestampW::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for TstpCmb4Spec {} #[doc = "`write(|w| ..)` method takes [`tstp_cmb4::W`](W) writer structure"] impl crate::Writable for TstpCmb4Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TSTP_CMB4 to value 0"] -impl crate::Resettable for TstpCmb4Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for TstpCmb4Spec {} diff --git a/va416xx/src/can0/tstp_cmb5.rs b/va416xx/src/can0/tstp_cmb5.rs index 23680ec..ca6f5b1 100644 --- a/va416xx/src/can0/tstp_cmb5.rs +++ b/va416xx/src/can0/tstp_cmb5.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:15 - Timestamp"] #[inline(always)] - pub fn timestamp(&mut self) -> TimestampW { + pub fn timestamp(&mut self) -> TimestampW<'_, TstpCmb5Spec> { TimestampW::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for TstpCmb5Spec {} #[doc = "`write(|w| ..)` method takes [`tstp_cmb5::W`](W) writer structure"] impl crate::Writable for TstpCmb5Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TSTP_CMB5 to value 0"] -impl crate::Resettable for TstpCmb5Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for TstpCmb5Spec {} diff --git a/va416xx/src/can0/tstp_cmb6.rs b/va416xx/src/can0/tstp_cmb6.rs index 3a0152e..e2ddb52 100644 --- a/va416xx/src/can0/tstp_cmb6.rs +++ b/va416xx/src/can0/tstp_cmb6.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:15 - Timestamp"] #[inline(always)] - pub fn timestamp(&mut self) -> TimestampW { + pub fn timestamp(&mut self) -> TimestampW<'_, TstpCmb6Spec> { TimestampW::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for TstpCmb6Spec {} #[doc = "`write(|w| ..)` method takes [`tstp_cmb6::W`](W) writer structure"] impl crate::Writable for TstpCmb6Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TSTP_CMB6 to value 0"] -impl crate::Resettable for TstpCmb6Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for TstpCmb6Spec {} diff --git a/va416xx/src/can0/tstp_cmb7.rs b/va416xx/src/can0/tstp_cmb7.rs index fe06c7f..77f5333 100644 --- a/va416xx/src/can0/tstp_cmb7.rs +++ b/va416xx/src/can0/tstp_cmb7.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:15 - Timestamp"] #[inline(always)] - pub fn timestamp(&mut self) -> TimestampW { + pub fn timestamp(&mut self) -> TimestampW<'_, TstpCmb7Spec> { TimestampW::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for TstpCmb7Spec {} #[doc = "`write(|w| ..)` method takes [`tstp_cmb7::W`](W) writer structure"] impl crate::Writable for TstpCmb7Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TSTP_CMB7 to value 0"] -impl crate::Resettable for TstpCmb7Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for TstpCmb7Spec {} diff --git a/va416xx/src/can0/tstp_cmb8.rs b/va416xx/src/can0/tstp_cmb8.rs index 78a345f..2077474 100644 --- a/va416xx/src/can0/tstp_cmb8.rs +++ b/va416xx/src/can0/tstp_cmb8.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:15 - Timestamp"] #[inline(always)] - pub fn timestamp(&mut self) -> TimestampW { + pub fn timestamp(&mut self) -> TimestampW<'_, TstpCmb8Spec> { TimestampW::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for TstpCmb8Spec {} #[doc = "`write(|w| ..)` method takes [`tstp_cmb8::W`](W) writer structure"] impl crate::Writable for TstpCmb8Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TSTP_CMB8 to value 0"] -impl crate::Resettable for TstpCmb8Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for TstpCmb8Spec {} diff --git a/va416xx/src/can0/tstp_cmb9.rs b/va416xx/src/can0/tstp_cmb9.rs index 622c5eb..a2edc6b 100644 --- a/va416xx/src/can0/tstp_cmb9.rs +++ b/va416xx/src/can0/tstp_cmb9.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:15 - Timestamp"] #[inline(always)] - pub fn timestamp(&mut self) -> TimestampW { + pub fn timestamp(&mut self) -> TimestampW<'_, TstpCmb9Spec> { TimestampW::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for TstpCmb9Spec {} #[doc = "`write(|w| ..)` method takes [`tstp_cmb9::W`](W) writer structure"] impl crate::Writable for TstpCmb9Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TSTP_CMB9 to value 0"] -impl crate::Resettable for TstpCmb9Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for TstpCmb9Spec {} diff --git a/va416xx/src/can0/tstp_hcmb.rs b/va416xx/src/can0/tstp_hcmb.rs index 4552829..89c980b 100644 --- a/va416xx/src/can0/tstp_hcmb.rs +++ b/va416xx/src/can0/tstp_hcmb.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:15 - Timestamp"] #[inline(always)] - pub fn timestamp(&mut self) -> TimestampW { + pub fn timestamp(&mut self) -> TimestampW<'_, TstpHcmbSpec> { TimestampW::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for TstpHcmbSpec {} #[doc = "`write(|w| ..)` method takes [`tstp_hcmb::W`](W) writer structure"] impl crate::Writable for TstpHcmbSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TSTP_HCMB to value 0"] -impl crate::Resettable for TstpHcmbSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for TstpHcmbSpec {} diff --git a/va416xx/src/clkgen.rs b/va416xx/src/clkgen.rs index 890c7e1..2b9a43a 100644 --- a/va416xx/src/clkgen.rs +++ b/va416xx/src/clkgen.rs @@ -22,20 +22,17 @@ impl RegisterBlock { &self.ctrl1 } } -#[doc = "CTRL0 (rw) register accessor: Clock Generation Module Control Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl0`] -module"] +#[doc = "CTRL0 (rw) register accessor: Clock Generation Module Control Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl0`] module"] #[doc(alias = "CTRL0")] pub type Ctrl0 = crate::Reg; #[doc = "Clock Generation Module Control Register 0"] pub mod ctrl0; -#[doc = "STAT (r) register accessor: Clock Generation Module Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`stat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@stat`] -module"] +#[doc = "STAT (r) register accessor: Clock Generation Module Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`stat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@stat`] module"] #[doc(alias = "STAT")] pub type Stat = crate::Reg; #[doc = "Clock Generation Module Status Register"] pub mod stat; -#[doc = "CTRL1 (rw) register accessor: Clock Generation Module Control Register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl1`] -module"] +#[doc = "CTRL1 (rw) register accessor: Clock Generation Module Control Register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl1`] module"] #[doc(alias = "CTRL1")] pub type Ctrl1 = crate::Reg; #[doc = "Clock Generation Module Control Register 1"] diff --git a/va416xx/src/clkgen/ctrl0.rs b/va416xx/src/clkgen/ctrl0.rs index f721c9f..fe55d26 100644 --- a/va416xx/src/clkgen/ctrl0.rs +++ b/va416xx/src/clkgen/ctrl0.rs @@ -124,67 +124,67 @@ impl R { impl W { #[doc = "Bits 0:1 - PLL Reference Clock Select"] #[inline(always)] - pub fn ref_clk_sel(&mut self) -> RefClkSelW { + pub fn ref_clk_sel(&mut self) -> RefClkSelW<'_, Ctrl0Spec> { RefClkSelW::new(self, 0) } #[doc = "Bits 2:3 - Input clock select to PLL"] #[inline(always)] - pub fn clksel_sys(&mut self) -> ClkselSysW { + pub fn clksel_sys(&mut self) -> ClkselSysW<'_, Ctrl0Spec> { ClkselSysW::new(self, 2) } #[doc = "Bit 4 - PLL Symbol; select internal feedback path when high rather than FCLK"] #[inline(always)] - pub fn pll_intfb(&mut self) -> PllIntfbW { + pub fn pll_intfb(&mut self) -> PllIntfbW<'_, Ctrl0Spec> { PllIntfbW::new(self, 4) } #[doc = "Bit 5 - PLL Symbol; power down when high"] #[inline(always)] - pub fn pll_pwdn(&mut self) -> PllPwdnW { + pub fn pll_pwdn(&mut self) -> PllPwdnW<'_, Ctrl0Spec> { PllPwdnW::new(self, 5) } #[doc = "Bit 6 - PLL Symbol; reference-to-output bypass when high"] #[inline(always)] - pub fn pll_bypass(&mut self) -> PllBypassW { + pub fn pll_bypass(&mut self) -> PllBypassW<'_, Ctrl0Spec> { PllBypassW::new(self, 6) } #[doc = "Bit 7 - PLL Symbol; Reference-to-counters-to-output bypass when high"] #[inline(always)] - pub fn pll_test(&mut self) -> PllTestW { + pub fn pll_test(&mut self) -> PllTestW<'_, Ctrl0Spec> { PllTestW::new(self, 7) } #[doc = "Bits 8:13 - PLL Symbol; selects the values 1-64 for the bandwidth divider"] #[inline(always)] - pub fn pll_bwadj(&mut self) -> PllBwadjW { + pub fn pll_bwadj(&mut self) -> PllBwadjW<'_, Ctrl0Spec> { PllBwadjW::new(self, 8) } #[doc = "Bits 14:17 - PLL Symbol; selects the values 1-16 for the post VCO divider"] #[inline(always)] - pub fn pll_clkod(&mut self) -> PllClkodW { + pub fn pll_clkod(&mut self) -> PllClkodW<'_, Ctrl0Spec> { PllClkodW::new(self, 14) } #[doc = "Bits 18:23 - PLL Symbol; selects the values 1-64 for the multiplication factor"] #[inline(always)] - pub fn pll_clkf(&mut self) -> PllClkfW { + pub fn pll_clkf(&mut self) -> PllClkfW<'_, Ctrl0Spec> { PllClkfW::new(self, 18) } #[doc = "Bits 24:27 - PLL Symbol; selects the values 1-16 for the reference divider"] #[inline(always)] - pub fn pll_clkr(&mut self) -> PllClkrW { + pub fn pll_clkr(&mut self) -> PllClkrW<'_, Ctrl0Spec> { PllClkrW::new(self, 24) } #[doc = "Bits 28:29 - Selects the PLL out divider to divide by 1/2/4/8"] #[inline(always)] - pub fn clk_div_sel(&mut self) -> ClkDivSelW { + pub fn clk_div_sel(&mut self) -> ClkDivSelW<'_, Ctrl0Spec> { ClkDivSelW::new(self, 28) } #[doc = "Bit 30 - Writing this bit to 1 puts the PLL into reset"] #[inline(always)] - pub fn pll_reset(&mut self) -> PllResetW { + pub fn pll_reset(&mut self) -> PllResetW<'_, Ctrl0Spec> { PllResetW::new(self, 30) } #[doc = "Bit 31 - Enable the circuit that detects loss of SYS_CLK"] #[inline(always)] - pub fn sys_clk_lost_det_en(&mut self) -> SysClkLostDetEnW { + pub fn sys_clk_lost_det_en(&mut self) -> SysClkLostDetEnW<'_, Ctrl0Spec> { SysClkLostDetEnW::new(self, 31) } } @@ -198,8 +198,6 @@ impl crate::Readable for Ctrl0Spec {} #[doc = "`write(|w| ..)` method takes [`ctrl0::W`](W) writer structure"] impl crate::Writable for Ctrl0Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTRL0 to value 0x30"] impl crate::Resettable for Ctrl0Spec { diff --git a/va416xx/src/clkgen/ctrl1.rs b/va416xx/src/clkgen/ctrl1.rs index a7e942e..889cde8 100644 --- a/va416xx/src/clkgen/ctrl1.rs +++ b/va416xx/src/clkgen/ctrl1.rs @@ -61,32 +61,32 @@ impl R { impl W { #[doc = "Bit 0 - Resets/Rearms the SYS_CLK lost detection feature"] #[inline(always)] - pub fn sys_clk_lost_det_rearm(&mut self) -> SysClkLostDetRearmW { + pub fn sys_clk_lost_det_rearm(&mut self) -> SysClkLostDetRearmW<'_, Ctrl1Spec> { SysClkLostDetRearmW::new(self, 0) } #[doc = "Bit 1 - Resets/Rearms the PLL lock detect circuit"] #[inline(always)] - pub fn pll_lck_det_rearm(&mut self) -> PllLckDetRearmW { + pub fn pll_lck_det_rearm(&mut self) -> PllLckDetRearmW<'_, Ctrl1Spec> { PllLckDetRearmW::new(self, 1) } #[doc = "Bit 2 - Enables the PLL lock lost detection circuit"] #[inline(always)] - pub fn pll_lost_lock_det_en(&mut self) -> PllLostLockDetEnW { + pub fn pll_lost_lock_det_en(&mut self) -> PllLostLockDetEnW<'_, Ctrl1Spec> { PllLostLockDetEnW::new(self, 2) } #[doc = "Bit 3 - Enables the crystal oscillator"] #[inline(always)] - pub fn xtal_en(&mut self) -> XtalEnW { + pub fn xtal_en(&mut self) -> XtalEnW<'_, Ctrl1Spec> { XtalEnW::new(self, 3) } #[doc = "Bit 4 - Enables XTAL_N output"] #[inline(always)] - pub fn xtal_n_en(&mut self) -> XtalNEnW { + pub fn xtal_n_en(&mut self) -> XtalNEnW<'_, Ctrl1Spec> { XtalNEnW::new(self, 4) } #[doc = "Bits 5:6 - Clock divider select for ADC"] #[inline(always)] - pub fn adc_clk_div_sel(&mut self) -> AdcClkDivSelW { + pub fn adc_clk_div_sel(&mut self) -> AdcClkDivSelW<'_, Ctrl1Spec> { AdcClkDivSelW::new(self, 5) } } @@ -100,10 +100,6 @@ impl crate::Readable for Ctrl1Spec {} #[doc = "`write(|w| ..)` method takes [`ctrl1::W`](W) writer structure"] impl crate::Writable for Ctrl1Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTRL1 to value 0"] -impl crate::Resettable for Ctrl1Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Ctrl1Spec {} diff --git a/va416xx/src/clkgen/stat.rs b/va416xx/src/clkgen/stat.rs index 00bba33..f13249a 100644 --- a/va416xx/src/clkgen/stat.rs +++ b/va416xx/src/clkgen/stat.rs @@ -38,6 +38,4 @@ impl crate::RegisterSpec for StatSpec { #[doc = "`read()` method returns [`stat::R`](R) reader structure"] impl crate::Readable for StatSpec {} #[doc = "`reset()` method sets STAT to value 0"] -impl crate::Resettable for StatSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for StatSpec {} diff --git a/va416xx/src/dac0.rs b/va416xx/src/dac0.rs index d930b79..d7b8e1b 100644 --- a/va416xx/src/dac0.rs +++ b/va416xx/src/dac0.rs @@ -71,68 +71,57 @@ impl RegisterBlock { &self.perid } } -#[doc = "CTRL0 (rw) register accessor: Control Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl0`] -module"] +#[doc = "CTRL0 (rw) register accessor: Control Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl0`] module"] #[doc(alias = "CTRL0")] pub type Ctrl0 = crate::Reg; #[doc = "Control Register 0"] pub mod ctrl0; -#[doc = "CTRL1 (rw) register accessor: Control Register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl1`] -module"] +#[doc = "CTRL1 (rw) register accessor: Control Register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl1`] module"] #[doc(alias = "CTRL1")] pub type Ctrl1 = crate::Reg; #[doc = "Control Register 1"] pub mod ctrl1; -#[doc = "FIFO_DATA (rw) register accessor: FIFO data\n\nYou can [`read`](crate::Reg::read) this register and get [`fifo_data::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fifo_data::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fifo_data`] -module"] +#[doc = "FIFO_DATA (rw) register accessor: FIFO data\n\nYou can [`read`](crate::Reg::read) this register and get [`fifo_data::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fifo_data::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fifo_data`] module"] #[doc(alias = "FIFO_DATA")] pub type FifoData = crate::Reg; #[doc = "FIFO data"] pub mod fifo_data; -#[doc = "STATUS (r) register accessor: Status\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] -module"] +#[doc = "STATUS (r) register accessor: Status\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] module"] #[doc(alias = "STATUS")] pub type Status = crate::Reg; #[doc = "Status"] pub mod status; -#[doc = "IRQ_ENB (rw) register accessor: Interrupt Enable\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_enb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`irq_enb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_enb`] -module"] +#[doc = "IRQ_ENB (rw) register accessor: Interrupt Enable\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_enb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`irq_enb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_enb`] module"] #[doc(alias = "IRQ_ENB")] pub type IrqEnb = crate::Reg; #[doc = "Interrupt Enable"] pub mod irq_enb; -#[doc = "IRQ_RAW (r) register accessor: Raw Interrupt Status\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_raw::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_raw`] -module"] +#[doc = "IRQ_RAW (r) register accessor: Raw Interrupt Status\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_raw::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_raw`] module"] #[doc(alias = "IRQ_RAW")] pub type IrqRaw = crate::Reg; #[doc = "Raw Interrupt Status"] pub mod irq_raw; -#[doc = "IRQ_END (r) register accessor: Enabled Interrupt Status\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_end::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_end`] -module"] +#[doc = "IRQ_END (r) register accessor: Enabled Interrupt Status\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_end::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_end`] module"] #[doc(alias = "IRQ_END")] pub type IrqEnd = crate::Reg; #[doc = "Enabled Interrupt Status"] pub mod irq_end; -#[doc = "IRQ_CLR (w) register accessor: Clear Interrupt\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`irq_clr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_clr`] -module"] +#[doc = "IRQ_CLR (w) register accessor: Clear Interrupt\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`irq_clr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_clr`] module"] #[doc(alias = "IRQ_CLR")] pub type IrqClr = crate::Reg; #[doc = "Clear Interrupt"] pub mod irq_clr; -#[doc = "TXFIFOIRQTRG (rw) register accessor: Receive FIFO Interrupt Trigger Value\n\nYou can [`read`](crate::Reg::read) this register and get [`txfifoirqtrg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`txfifoirqtrg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txfifoirqtrg`] -module"] +#[doc = "TXFIFOIRQTRG (rw) register accessor: Receive FIFO Interrupt Trigger Value\n\nYou can [`read`](crate::Reg::read) this register and get [`txfifoirqtrg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`txfifoirqtrg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txfifoirqtrg`] module"] #[doc(alias = "TXFIFOIRQTRG")] pub type Txfifoirqtrg = crate::Reg; #[doc = "Receive FIFO Interrupt Trigger Value"] pub mod txfifoirqtrg; -#[doc = "FIFO_CLR (rw) register accessor: FIFO Clear\n\nYou can [`read`](crate::Reg::read) this register and get [`fifo_clr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fifo_clr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fifo_clr`] -module"] +#[doc = "FIFO_CLR (rw) register accessor: FIFO Clear\n\nYou can [`read`](crate::Reg::read) this register and get [`fifo_clr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fifo_clr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fifo_clr`] module"] #[doc(alias = "FIFO_CLR")] pub type FifoClr = crate::Reg; #[doc = "FIFO Clear"] pub mod fifo_clr; -#[doc = "PERID (r) register accessor: Peripheral ID Register\n\nYou can [`read`](crate::Reg::read) this register and get [`perid::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@perid`] -module"] +#[doc = "PERID (r) register accessor: Peripheral ID Register\n\nYou can [`read`](crate::Reg::read) this register and get [`perid::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@perid`] module"] #[doc(alias = "PERID")] pub type Perid = crate::Reg; #[doc = "Peripheral ID Register"] diff --git a/va416xx/src/dac0/ctrl0.rs b/va416xx/src/dac0/ctrl0.rs index 1362824..6c1b290 100644 --- a/va416xx/src/dac0/ctrl0.rs +++ b/va416xx/src/dac0/ctrl0.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bit 10 - Enables external trigger"] #[inline(always)] - pub fn ext_trig_en(&mut self) -> ExtTrigEnW { + pub fn ext_trig_en(&mut self) -> ExtTrigEnW<'_, Ctrl0Spec> { ExtTrigEnW::new(self, 10) } #[doc = "Bit 11 - Enables manual trigger"] #[inline(always)] - pub fn man_trig_en(&mut self) -> ManTrigEnW { + pub fn man_trig_en(&mut self) -> ManTrigEnW<'_, Ctrl0Spec> { ManTrigEnW::new(self, 11) } } @@ -44,10 +44,6 @@ impl crate::Readable for Ctrl0Spec {} #[doc = "`write(|w| ..)` method takes [`ctrl0::W`](W) writer structure"] impl crate::Writable for Ctrl0Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTRL0 to value 0"] -impl crate::Resettable for Ctrl0Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Ctrl0Spec {} diff --git a/va416xx/src/dac0/ctrl1.rs b/va416xx/src/dac0/ctrl1.rs index 53dca3a..e36b49c 100644 --- a/va416xx/src/dac0/ctrl1.rs +++ b/va416xx/src/dac0/ctrl1.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 5:7 - Sets the the amount of time in microseconds the control FSM waits for the DAC settling time"] #[inline(always)] - pub fn dac_settling(&mut self) -> DacSettlingW { + pub fn dac_settling(&mut self) -> DacSettlingW<'_, Ctrl1Spec> { DacSettlingW::new(self, 5) } #[doc = "Bit 8 - Enables the DAC analog block"] #[inline(always)] - pub fn dac_en(&mut self) -> DacEnW { + pub fn dac_en(&mut self) -> DacEnW<'_, Ctrl1Spec> { DacEnW::new(self, 8) } } @@ -44,10 +44,6 @@ impl crate::Readable for Ctrl1Spec {} #[doc = "`write(|w| ..)` method takes [`ctrl1::W`](W) writer structure"] impl crate::Writable for Ctrl1Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTRL1 to value 0"] -impl crate::Resettable for Ctrl1Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Ctrl1Spec {} diff --git a/va416xx/src/dac0/fifo_clr.rs b/va416xx/src/dac0/fifo_clr.rs index 8b419dc..58d31ae 100644 --- a/va416xx/src/dac0/fifo_clr.rs +++ b/va416xx/src/dac0/fifo_clr.rs @@ -7,7 +7,7 @@ pub type FifoClrW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Clears the DAC FIFO. Always reads 0"] #[inline(always)] - pub fn fifo_clr(&mut self) -> FifoClrW { + pub fn fifo_clr(&mut self) -> FifoClrW<'_, FifoClrSpec> { FifoClrW::new(self, 0) } } @@ -21,10 +21,6 @@ impl crate::Readable for FifoClrSpec {} #[doc = "`write(|w| ..)` method takes [`fifo_clr::W`](W) writer structure"] impl crate::Writable for FifoClrSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets FIFO_CLR to value 0"] -impl crate::Resettable for FifoClrSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for FifoClrSpec {} diff --git a/va416xx/src/dac0/fifo_data.rs b/va416xx/src/dac0/fifo_data.rs index 6e260b3..3eed88f 100644 --- a/va416xx/src/dac0/fifo_data.rs +++ b/va416xx/src/dac0/fifo_data.rs @@ -7,7 +7,7 @@ pub type DataW<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; impl W { #[doc = "Bits 0:11 - Data for FIFO write"] #[inline(always)] - pub fn data(&mut self) -> DataW { + pub fn data(&mut self) -> DataW<'_, FifoDataSpec> { DataW::new(self, 0) } } @@ -21,10 +21,6 @@ impl crate::Readable for FifoDataSpec {} #[doc = "`write(|w| ..)` method takes [`fifo_data::W`](W) writer structure"] impl crate::Writable for FifoDataSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets FIFO_DATA to value 0"] -impl crate::Resettable for FifoDataSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for FifoDataSpec {} diff --git a/va416xx/src/dac0/irq_clr.rs b/va416xx/src/dac0/irq_clr.rs index 8cae95c..5902dc0 100644 --- a/va416xx/src/dac0/irq_clr.rs +++ b/va416xx/src/dac0/irq_clr.rs @@ -11,22 +11,22 @@ pub type TrigErrorW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Clears the FIFO overflow interrupt status. Always reads 0"] #[inline(always)] - pub fn fifo_oflow(&mut self) -> FifoOflowW { + pub fn fifo_oflow(&mut self) -> FifoOflowW<'_, IrqClrSpec> { FifoOflowW::new(self, 0) } #[doc = "Bit 1 - Clears the FIFO underflow interrupt status. Always reads 0"] #[inline(always)] - pub fn fifo_uflow(&mut self) -> FifoUflowW { + pub fn fifo_uflow(&mut self) -> FifoUflowW<'_, IrqClrSpec> { FifoUflowW::new(self, 1) } #[doc = "Bit 2 - Clears the DAC done interrupt status. Always reads 0"] #[inline(always)] - pub fn dac_done(&mut self) -> DacDoneW { + pub fn dac_done(&mut self) -> DacDoneW<'_, IrqClrSpec> { DacDoneW::new(self, 2) } #[doc = "Bit 3 - Clears the trigger error interrupt status. Always reads 0"] #[inline(always)] - pub fn trig_error(&mut self) -> TrigErrorW { + pub fn trig_error(&mut self) -> TrigErrorW<'_, IrqClrSpec> { TrigErrorW::new(self, 3) } } @@ -38,10 +38,6 @@ impl crate::RegisterSpec for IrqClrSpec { #[doc = "`write(|w| ..)` method takes [`irq_clr::W`](W) writer structure"] impl crate::Writable for IrqClrSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IRQ_CLR to value 0"] -impl crate::Resettable for IrqClrSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for IrqClrSpec {} diff --git a/va416xx/src/dac0/irq_enb.rs b/va416xx/src/dac0/irq_enb.rs index 188ee16..4eb2e59 100644 --- a/va416xx/src/dac0/irq_enb.rs +++ b/va416xx/src/dac0/irq_enb.rs @@ -70,37 +70,37 @@ impl R { impl W { #[doc = "Bit 0 - Enables the interrupt for FIFO empty"] #[inline(always)] - pub fn fifo_empty(&mut self) -> FifoEmptyW { + pub fn fifo_empty(&mut self) -> FifoEmptyW<'_, IrqEnbSpec> { FifoEmptyW::new(self, 0) } #[doc = "Bit 1 - Enables the interrupt for FIFO full"] #[inline(always)] - pub fn fifo_full(&mut self) -> FifoFullW { + pub fn fifo_full(&mut self) -> FifoFullW<'_, IrqEnbSpec> { FifoFullW::new(self, 1) } #[doc = "Bit 2 - Enables the interrupt for a FIFO overflow"] #[inline(always)] - pub fn fifo_oflow(&mut self) -> FifoOflowW { + pub fn fifo_oflow(&mut self) -> FifoOflowW<'_, IrqEnbSpec> { FifoOflowW::new(self, 2) } #[doc = "Bit 3 - Enables the interrupt for a FIFO underflow"] #[inline(always)] - pub fn fifo_uflow(&mut self) -> FifoUflowW { + pub fn fifo_uflow(&mut self) -> FifoUflowW<'_, IrqEnbSpec> { FifoUflowW::new(self, 3) } #[doc = "Bit 4 - Enables the interrupt for a DAC data acquisition completion"] #[inline(always)] - pub fn dac_done(&mut self) -> DacDoneW { + pub fn dac_done(&mut self) -> DacDoneW<'_, IrqEnbSpec> { DacDoneW::new(self, 4) } #[doc = "Bit 5 - Enables the interrupt for a trigger error"] #[inline(always)] - pub fn trig_error(&mut self) -> TrigErrorW { + pub fn trig_error(&mut self) -> TrigErrorW<'_, IrqEnbSpec> { TrigErrorW::new(self, 5) } #[doc = "Bit 6 - Enables the interrupt for the FIFO entry count is less than or equal to the trigger level"] #[inline(always)] - pub fn fifo_depth_trig(&mut self) -> FifoDepthTrigW { + pub fn fifo_depth_trig(&mut self) -> FifoDepthTrigW<'_, IrqEnbSpec> { FifoDepthTrigW::new(self, 6) } } @@ -114,10 +114,6 @@ impl crate::Readable for IrqEnbSpec {} #[doc = "`write(|w| ..)` method takes [`irq_enb::W`](W) writer structure"] impl crate::Writable for IrqEnbSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IRQ_ENB to value 0"] -impl crate::Resettable for IrqEnbSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for IrqEnbSpec {} diff --git a/va416xx/src/dac0/irq_end.rs b/va416xx/src/dac0/irq_end.rs index 0c926a1..42b69d7 100644 --- a/va416xx/src/dac0/irq_end.rs +++ b/va416xx/src/dac0/irq_end.rs @@ -59,6 +59,4 @@ impl crate::RegisterSpec for IrqEndSpec { #[doc = "`read()` method returns [`irq_end::R`](R) reader structure"] impl crate::Readable for IrqEndSpec {} #[doc = "`reset()` method sets IRQ_END to value 0"] -impl crate::Resettable for IrqEndSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for IrqEndSpec {} diff --git a/va416xx/src/dac0/status.rs b/va416xx/src/dac0/status.rs index d365aed..e5696cd 100644 --- a/va416xx/src/dac0/status.rs +++ b/va416xx/src/dac0/status.rs @@ -24,6 +24,4 @@ impl crate::RegisterSpec for StatusSpec { #[doc = "`read()` method returns [`status::R`](R) reader structure"] impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0"] -impl crate::Resettable for StatusSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for StatusSpec {} diff --git a/va416xx/src/dac0/txfifoirqtrg.rs b/va416xx/src/dac0/txfifoirqtrg.rs index 1e2123d..b0c8a4f 100644 --- a/va416xx/src/dac0/txfifoirqtrg.rs +++ b/va416xx/src/dac0/txfifoirqtrg.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:4 - Sets the FIFO_ENTRY_CNT value that asserts the FIFO_DEPTH_TRIG interrupt"] #[inline(always)] - pub fn level(&mut self) -> LevelW { + pub fn level(&mut self) -> LevelW<'_, TxfifoirqtrgSpec> { LevelW::new(self, 0) } } @@ -30,8 +30,6 @@ impl crate::Readable for TxfifoirqtrgSpec {} #[doc = "`write(|w| ..)` method takes [`txfifoirqtrg::W`](W) writer structure"] impl crate::Writable for TxfifoirqtrgSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TXFIFOIRQTRG to value 0x10"] impl crate::Resettable for TxfifoirqtrgSpec { diff --git a/va416xx/src/dma.rs b/va416xx/src/dma.rs index a1d3812..921287a 100644 --- a/va416xx/src/dma.rs +++ b/va416xx/src/dma.rs @@ -223,212 +223,177 @@ impl RegisterBlock { &self.primecell_id_3 } } -#[doc = "STATUS (r) register accessor: DMA Status\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] -module"] +#[doc = "STATUS (r) register accessor: DMA Status\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] module"] #[doc(alias = "STATUS")] pub type Status = crate::Reg; #[doc = "DMA Status"] pub mod status; -#[doc = "CFG (w) register accessor: DMA Configuration\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfg`] -module"] +#[doc = "CFG (w) register accessor: DMA Configuration\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfg`] module"] #[doc(alias = "CFG")] pub type Cfg = crate::Reg; #[doc = "DMA Configuration"] pub mod cfg; -#[doc = "CTRL_BASE_PTR (rw) register accessor: Base Pointer for DMA Control Registers\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl_base_ptr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl_base_ptr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl_base_ptr`] -module"] +#[doc = "CTRL_BASE_PTR (rw) register accessor: Base Pointer for DMA Control Registers\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl_base_ptr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl_base_ptr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl_base_ptr`] module"] #[doc(alias = "CTRL_BASE_PTR")] pub type CtrlBasePtr = crate::Reg; #[doc = "Base Pointer for DMA Control Registers"] pub mod ctrl_base_ptr; -#[doc = "ALT_CTRL_BASE_PTR (rw) register accessor: DMA Channel alternate control data base pointer\n\nYou can [`read`](crate::Reg::read) this register and get [`alt_ctrl_base_ptr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`alt_ctrl_base_ptr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@alt_ctrl_base_ptr`] -module"] +#[doc = "ALT_CTRL_BASE_PTR (rw) register accessor: DMA Channel alternate control data base pointer\n\nYou can [`read`](crate::Reg::read) this register and get [`alt_ctrl_base_ptr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`alt_ctrl_base_ptr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@alt_ctrl_base_ptr`] module"] #[doc(alias = "ALT_CTRL_BASE_PTR")] pub type AltCtrlBasePtr = crate::Reg; #[doc = "DMA Channel alternate control data base pointer"] pub mod alt_ctrl_base_ptr; -#[doc = "WAITONREQ_STATUS (r) register accessor: DMA channel wait on request status\n\nYou can [`read`](crate::Reg::read) this register and get [`waitonreq_status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@waitonreq_status`] -module"] +#[doc = "WAITONREQ_STATUS (r) register accessor: DMA channel wait on request status\n\nYou can [`read`](crate::Reg::read) this register and get [`waitonreq_status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@waitonreq_status`] module"] #[doc(alias = "WAITONREQ_STATUS")] pub type WaitonreqStatus = crate::Reg; #[doc = "DMA channel wait on request status"] pub mod waitonreq_status; -#[doc = "CHNL_SW_REQUEST (w) register accessor: DMA channel software request\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chnl_sw_request::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chnl_sw_request`] -module"] +#[doc = "CHNL_SW_REQUEST (w) register accessor: DMA channel software request\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chnl_sw_request::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chnl_sw_request`] module"] #[doc(alias = "CHNL_SW_REQUEST")] pub type ChnlSwRequest = crate::Reg; #[doc = "DMA channel software request"] pub mod chnl_sw_request; -#[doc = "CHNL_USEBURST_SET (rw) register accessor: DMA channel useburst set\n\nYou can [`read`](crate::Reg::read) this register and get [`chnl_useburst_set::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chnl_useburst_set::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chnl_useburst_set`] -module"] +#[doc = "CHNL_USEBURST_SET (rw) register accessor: DMA channel useburst set\n\nYou can [`read`](crate::Reg::read) this register and get [`chnl_useburst_set::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chnl_useburst_set::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chnl_useburst_set`] module"] #[doc(alias = "CHNL_USEBURST_SET")] pub type ChnlUseburstSet = crate::Reg; #[doc = "DMA channel useburst set"] pub mod chnl_useburst_set; -#[doc = "CHNL_USEBURST_CLR (rw) register accessor: DMA channel useburst clear\n\nYou can [`read`](crate::Reg::read) this register and get [`chnl_useburst_clr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chnl_useburst_clr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chnl_useburst_clr`] -module"] +#[doc = "CHNL_USEBURST_CLR (rw) register accessor: DMA channel useburst clear\n\nYou can [`read`](crate::Reg::read) this register and get [`chnl_useburst_clr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chnl_useburst_clr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chnl_useburst_clr`] module"] #[doc(alias = "CHNL_USEBURST_CLR")] pub type ChnlUseburstClr = crate::Reg; #[doc = "DMA channel useburst clear"] pub mod chnl_useburst_clr; -#[doc = "CHNL_REQ_MASK_SET (rw) register accessor: DMA channel request mask set\n\nYou can [`read`](crate::Reg::read) this register and get [`chnl_req_mask_set::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chnl_req_mask_set::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chnl_req_mask_set`] -module"] +#[doc = "CHNL_REQ_MASK_SET (rw) register accessor: DMA channel request mask set\n\nYou can [`read`](crate::Reg::read) this register and get [`chnl_req_mask_set::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chnl_req_mask_set::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chnl_req_mask_set`] module"] #[doc(alias = "CHNL_REQ_MASK_SET")] pub type ChnlReqMaskSet = crate::Reg; #[doc = "DMA channel request mask set"] pub mod chnl_req_mask_set; -#[doc = "CHNL_REQ_MASK_CLR (rw) register accessor: DMA channel request mask clear\n\nYou can [`read`](crate::Reg::read) this register and get [`chnl_req_mask_clr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chnl_req_mask_clr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chnl_req_mask_clr`] -module"] +#[doc = "CHNL_REQ_MASK_CLR (rw) register accessor: DMA channel request mask clear\n\nYou can [`read`](crate::Reg::read) this register and get [`chnl_req_mask_clr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chnl_req_mask_clr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chnl_req_mask_clr`] module"] #[doc(alias = "CHNL_REQ_MASK_CLR")] pub type ChnlReqMaskClr = crate::Reg; #[doc = "DMA channel request mask clear"] pub mod chnl_req_mask_clr; -#[doc = "CHNL_ENABLE_SET (rw) register accessor: DMA channel enable set\n\nYou can [`read`](crate::Reg::read) this register and get [`chnl_enable_set::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chnl_enable_set::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chnl_enable_set`] -module"] +#[doc = "CHNL_ENABLE_SET (rw) register accessor: DMA channel enable set\n\nYou can [`read`](crate::Reg::read) this register and get [`chnl_enable_set::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chnl_enable_set::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chnl_enable_set`] module"] #[doc(alias = "CHNL_ENABLE_SET")] pub type ChnlEnableSet = crate::Reg; #[doc = "DMA channel enable set"] pub mod chnl_enable_set; -#[doc = "CHNL_ENABLE_CLR (rw) register accessor: DMA channel enable clear\n\nYou can [`read`](crate::Reg::read) this register and get [`chnl_enable_clr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chnl_enable_clr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chnl_enable_clr`] -module"] +#[doc = "CHNL_ENABLE_CLR (rw) register accessor: DMA channel enable clear\n\nYou can [`read`](crate::Reg::read) this register and get [`chnl_enable_clr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chnl_enable_clr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chnl_enable_clr`] module"] #[doc(alias = "CHNL_ENABLE_CLR")] pub type ChnlEnableClr = crate::Reg; #[doc = "DMA channel enable clear"] pub mod chnl_enable_clr; -#[doc = "CHNL_PRI_ALT_SET (rw) register accessor: DMA channel primary alternate set\n\nYou can [`read`](crate::Reg::read) this register and get [`chnl_pri_alt_set::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chnl_pri_alt_set::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chnl_pri_alt_set`] -module"] +#[doc = "CHNL_PRI_ALT_SET (rw) register accessor: DMA channel primary alternate set\n\nYou can [`read`](crate::Reg::read) this register and get [`chnl_pri_alt_set::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chnl_pri_alt_set::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chnl_pri_alt_set`] module"] #[doc(alias = "CHNL_PRI_ALT_SET")] pub type ChnlPriAltSet = crate::Reg; #[doc = "DMA channel primary alternate set"] pub mod chnl_pri_alt_set; -#[doc = "CHNL_PRI_ALT_CLR (rw) register accessor: DMA channel primary alternate clear\n\nYou can [`read`](crate::Reg::read) this register and get [`chnl_pri_alt_clr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chnl_pri_alt_clr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chnl_pri_alt_clr`] -module"] +#[doc = "CHNL_PRI_ALT_CLR (rw) register accessor: DMA channel primary alternate clear\n\nYou can [`read`](crate::Reg::read) this register and get [`chnl_pri_alt_clr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chnl_pri_alt_clr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chnl_pri_alt_clr`] module"] #[doc(alias = "CHNL_PRI_ALT_CLR")] pub type ChnlPriAltClr = crate::Reg; #[doc = "DMA channel primary alternate clear"] pub mod chnl_pri_alt_clr; -#[doc = "CHNL_PRIORITY_SET (rw) register accessor: DMA channel priority set\n\nYou can [`read`](crate::Reg::read) this register and get [`chnl_priority_set::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chnl_priority_set::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chnl_priority_set`] -module"] +#[doc = "CHNL_PRIORITY_SET (rw) register accessor: DMA channel priority set\n\nYou can [`read`](crate::Reg::read) this register and get [`chnl_priority_set::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chnl_priority_set::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chnl_priority_set`] module"] #[doc(alias = "CHNL_PRIORITY_SET")] pub type ChnlPrioritySet = crate::Reg; #[doc = "DMA channel priority set"] pub mod chnl_priority_set; -#[doc = "CHNL_PRIORITY_CLR (w) register accessor: DMA channel priority clear\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chnl_priority_clr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chnl_priority_clr`] -module"] +#[doc = "CHNL_PRIORITY_CLR (w) register accessor: DMA channel priority clear\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chnl_priority_clr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chnl_priority_clr`] module"] #[doc(alias = "CHNL_PRIORITY_CLR")] pub type ChnlPriorityClr = crate::Reg; #[doc = "DMA channel priority clear"] pub mod chnl_priority_clr; -#[doc = "ERR_CLR (rw) register accessor: DMA bus error clear\n\nYou can [`read`](crate::Reg::read) this register and get [`err_clr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`err_clr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@err_clr`] -module"] +#[doc = "ERR_CLR (rw) register accessor: DMA bus error clear\n\nYou can [`read`](crate::Reg::read) this register and get [`err_clr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`err_clr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@err_clr`] module"] #[doc(alias = "ERR_CLR")] pub type ErrClr = crate::Reg; #[doc = "DMA bus error clear"] pub mod err_clr; -#[doc = "INTEGRATION_CFG (rw) register accessor: DMA integration configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`integration_cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`integration_cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@integration_cfg`] -module"] +#[doc = "INTEGRATION_CFG (rw) register accessor: DMA integration configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`integration_cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`integration_cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@integration_cfg`] module"] #[doc(alias = "INTEGRATION_CFG")] pub type IntegrationCfg = crate::Reg; #[doc = "DMA integration configuration"] pub mod integration_cfg; -#[doc = "STALL_STATUS (rw) register accessor: DMA stall status\n\nYou can [`read`](crate::Reg::read) this register and get [`stall_status::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`stall_status::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@stall_status`] -module"] +#[doc = "STALL_STATUS (rw) register accessor: DMA stall status\n\nYou can [`read`](crate::Reg::read) this register and get [`stall_status::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`stall_status::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@stall_status`] module"] #[doc(alias = "STALL_STATUS")] pub type StallStatus = crate::Reg; #[doc = "DMA stall status"] pub mod stall_status; -#[doc = "DMA_REQ_STATUS (rw) register accessor: DMA Configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_req_status::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_req_status::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_req_status`] -module"] +#[doc = "DMA_REQ_STATUS (rw) register accessor: DMA Configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_req_status::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_req_status::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_req_status`] module"] #[doc(alias = "DMA_REQ_STATUS")] pub type DmaReqStatus = crate::Reg; #[doc = "DMA Configuration"] pub mod dma_req_status; -#[doc = "DMA_SREQ_STATUS (rw) register accessor: DMA single request status\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_sreq_status::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_sreq_status::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_sreq_status`] -module"] +#[doc = "DMA_SREQ_STATUS (rw) register accessor: DMA single request status\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_sreq_status::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_sreq_status::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_sreq_status`] module"] #[doc(alias = "DMA_SREQ_STATUS")] pub type DmaSreqStatus = crate::Reg; #[doc = "DMA single request status"] pub mod dma_sreq_status; -#[doc = "DMA_DONE_SET (rw) register accessor: DMA done set\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_done_set::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_done_set::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_done_set`] -module"] +#[doc = "DMA_DONE_SET (rw) register accessor: DMA done set\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_done_set::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_done_set::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_done_set`] module"] #[doc(alias = "DMA_DONE_SET")] pub type DmaDoneSet = crate::Reg; #[doc = "DMA done set"] pub mod dma_done_set; -#[doc = "DMA_DONE_CLR (rw) register accessor: DMA done clear\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_done_clr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_done_clr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_done_clr`] -module"] +#[doc = "DMA_DONE_CLR (rw) register accessor: DMA done clear\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_done_clr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_done_clr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_done_clr`] module"] #[doc(alias = "DMA_DONE_CLR")] pub type DmaDoneClr = crate::Reg; #[doc = "DMA done clear"] pub mod dma_done_clr; -#[doc = "DMA_ACTIVE_SET (rw) register accessor: DMA active set\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_active_set::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_active_set::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_active_set`] -module"] +#[doc = "DMA_ACTIVE_SET (rw) register accessor: DMA active set\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_active_set::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_active_set::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_active_set`] module"] #[doc(alias = "DMA_ACTIVE_SET")] pub type DmaActiveSet = crate::Reg; #[doc = "DMA active set"] pub mod dma_active_set; -#[doc = "DMA_ACTIVE_CLR (rw) register accessor: DMA active clear\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_active_clr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_active_clr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_active_clr`] -module"] +#[doc = "DMA_ACTIVE_CLR (rw) register accessor: DMA active clear\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_active_clr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_active_clr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_active_clr`] module"] #[doc(alias = "DMA_ACTIVE_CLR")] pub type DmaActiveClr = crate::Reg; #[doc = "DMA active clear"] pub mod dma_active_clr; -#[doc = "ERR_SET (rw) register accessor: DMA bus error set\n\nYou can [`read`](crate::Reg::read) this register and get [`err_set::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`err_set::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@err_set`] -module"] +#[doc = "ERR_SET (rw) register accessor: DMA bus error set\n\nYou can [`read`](crate::Reg::read) this register and get [`err_set::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`err_set::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@err_set`] module"] #[doc(alias = "ERR_SET")] pub type ErrSet = crate::Reg; #[doc = "DMA bus error set"] pub mod err_set; -#[doc = "PERIPH_ID_4 (rw) register accessor: DMA Peripheral ID 4\n\nYou can [`read`](crate::Reg::read) this register and get [`periph_id_4::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`periph_id_4::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@periph_id_4`] -module"] +#[doc = "PERIPH_ID_4 (rw) register accessor: DMA Peripheral ID 4\n\nYou can [`read`](crate::Reg::read) this register and get [`periph_id_4::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`periph_id_4::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@periph_id_4`] module"] #[doc(alias = "PERIPH_ID_4")] pub type PeriphId4 = crate::Reg; #[doc = "DMA Peripheral ID 4"] pub mod periph_id_4; -#[doc = "PERIPH_ID_0 (rw) register accessor: DMA Peripheral ID 0\n\nYou can [`read`](crate::Reg::read) this register and get [`periph_id_0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`periph_id_0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@periph_id_0`] -module"] +#[doc = "PERIPH_ID_0 (rw) register accessor: DMA Peripheral ID 0\n\nYou can [`read`](crate::Reg::read) this register and get [`periph_id_0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`periph_id_0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@periph_id_0`] module"] #[doc(alias = "PERIPH_ID_0")] pub type PeriphId0 = crate::Reg; #[doc = "DMA Peripheral ID 0"] pub mod periph_id_0; -#[doc = "PERIPH_ID_1 (r) register accessor: DMA Peripheral ID 1\n\nYou can [`read`](crate::Reg::read) this register and get [`periph_id_1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@periph_id_1`] -module"] +#[doc = "PERIPH_ID_1 (r) register accessor: DMA Peripheral ID 1\n\nYou can [`read`](crate::Reg::read) this register and get [`periph_id_1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@periph_id_1`] module"] #[doc(alias = "PERIPH_ID_1")] pub type PeriphId1 = crate::Reg; #[doc = "DMA Peripheral ID 1"] pub mod periph_id_1; -#[doc = "PERIPH_ID_2 (rw) register accessor: DMA Peripheral ID 2\n\nYou can [`read`](crate::Reg::read) this register and get [`periph_id_2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`periph_id_2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@periph_id_2`] -module"] +#[doc = "PERIPH_ID_2 (rw) register accessor: DMA Peripheral ID 2\n\nYou can [`read`](crate::Reg::read) this register and get [`periph_id_2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`periph_id_2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@periph_id_2`] module"] #[doc(alias = "PERIPH_ID_2")] pub type PeriphId2 = crate::Reg; #[doc = "DMA Peripheral ID 2"] pub mod periph_id_2; -#[doc = "PERIPH_ID_3 (rw) register accessor: DMA Peripheral ID 3\n\nYou can [`read`](crate::Reg::read) this register and get [`periph_id_3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`periph_id_3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@periph_id_3`] -module"] +#[doc = "PERIPH_ID_3 (rw) register accessor: DMA Peripheral ID 3\n\nYou can [`read`](crate::Reg::read) this register and get [`periph_id_3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`periph_id_3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@periph_id_3`] module"] #[doc(alias = "PERIPH_ID_3")] pub type PeriphId3 = crate::Reg; #[doc = "DMA Peripheral ID 3"] pub mod periph_id_3; -#[doc = "PRIMECELL_ID_0 (rw) register accessor: DMA PrimeCell ID 0\n\nYou can [`read`](crate::Reg::read) this register and get [`primecell_id_0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`primecell_id_0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@primecell_id_0`] -module"] +#[doc = "PRIMECELL_ID_0 (rw) register accessor: DMA PrimeCell ID 0\n\nYou can [`read`](crate::Reg::read) this register and get [`primecell_id_0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`primecell_id_0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@primecell_id_0`] module"] #[doc(alias = "PRIMECELL_ID_0")] pub type PrimecellId0 = crate::Reg; #[doc = "DMA PrimeCell ID 0"] pub mod primecell_id_0; -#[doc = "PRIMECELL_ID_1 (rw) register accessor: DMA PrimeCell ID 1\n\nYou can [`read`](crate::Reg::read) this register and get [`primecell_id_1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`primecell_id_1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@primecell_id_1`] -module"] +#[doc = "PRIMECELL_ID_1 (rw) register accessor: DMA PrimeCell ID 1\n\nYou can [`read`](crate::Reg::read) this register and get [`primecell_id_1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`primecell_id_1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@primecell_id_1`] module"] #[doc(alias = "PRIMECELL_ID_1")] pub type PrimecellId1 = crate::Reg; #[doc = "DMA PrimeCell ID 1"] pub mod primecell_id_1; -#[doc = "PRIMECELL_ID_2 (rw) register accessor: DMA PrimeCell ID 2\n\nYou can [`read`](crate::Reg::read) this register and get [`primecell_id_2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`primecell_id_2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@primecell_id_2`] -module"] +#[doc = "PRIMECELL_ID_2 (rw) register accessor: DMA PrimeCell ID 2\n\nYou can [`read`](crate::Reg::read) this register and get [`primecell_id_2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`primecell_id_2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@primecell_id_2`] module"] #[doc(alias = "PRIMECELL_ID_2")] pub type PrimecellId2 = crate::Reg; #[doc = "DMA PrimeCell ID 2"] pub mod primecell_id_2; -#[doc = "PRIMECELL_ID_3 (rw) register accessor: DMA PrimeCell ID 3\n\nYou can [`read`](crate::Reg::read) this register and get [`primecell_id_3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`primecell_id_3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@primecell_id_3`] -module"] +#[doc = "PRIMECELL_ID_3 (rw) register accessor: DMA PrimeCell ID 3\n\nYou can [`read`](crate::Reg::read) this register and get [`primecell_id_3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`primecell_id_3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@primecell_id_3`] module"] #[doc(alias = "PRIMECELL_ID_3")] pub type PrimecellId3 = crate::Reg; #[doc = "DMA PrimeCell ID 3"] diff --git a/va416xx/src/dma/alt_ctrl_base_ptr.rs b/va416xx/src/dma/alt_ctrl_base_ptr.rs index 5706439..f69d181 100644 --- a/va416xx/src/dma/alt_ctrl_base_ptr.rs +++ b/va416xx/src/dma/alt_ctrl_base_ptr.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:31 - Base Pointer for Alternate DMA Control Register"] #[inline(always)] - pub fn alt_ctrl_base_ptr(&mut self) -> AltCtrlBasePtrW { + pub fn alt_ctrl_base_ptr(&mut self) -> AltCtrlBasePtrW<'_, AltCtrlBasePtrSpec> { AltCtrlBasePtrW::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for AltCtrlBasePtrSpec {} #[doc = "`write(|w| ..)` method takes [`alt_ctrl_base_ptr::W`](W) writer structure"] impl crate::Writable for AltCtrlBasePtrSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ALT_CTRL_BASE_PTR to value 0"] -impl crate::Resettable for AltCtrlBasePtrSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for AltCtrlBasePtrSpec {} diff --git a/va416xx/src/dma/cfg.rs b/va416xx/src/dma/cfg.rs index 280dc17..df9c3f8 100644 --- a/va416xx/src/dma/cfg.rs +++ b/va416xx/src/dma/cfg.rs @@ -7,12 +7,12 @@ pub type ChnlProtCtrlW<'a, REG> = crate::FieldWriter<'a, REG, 3>; impl W { #[doc = "Bit 0 - PLL Symbol; Feedback cycle slip output (CLKOUT frequency low)"] #[inline(always)] - pub fn master_enable(&mut self) -> MasterEnableW { + pub fn master_enable(&mut self) -> MasterEnableW<'_, CfgSpec> { MasterEnableW::new(self, 0) } #[doc = "Bits 5:7 - HPROT\\[3:0\\]"] #[inline(always)] - pub fn chnl_prot_ctrl(&mut self) -> ChnlProtCtrlW { + pub fn chnl_prot_ctrl(&mut self) -> ChnlProtCtrlW<'_, CfgSpec> { ChnlProtCtrlW::new(self, 5) } } @@ -24,10 +24,6 @@ impl crate::RegisterSpec for CfgSpec { #[doc = "`write(|w| ..)` method takes [`cfg::W`](W) writer structure"] impl crate::Writable for CfgSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CFG to value 0"] -impl crate::Resettable for CfgSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for CfgSpec {} diff --git a/va416xx/src/dma/chnl_enable_clr.rs b/va416xx/src/dma/chnl_enable_clr.rs index acb46c4..649e884 100644 --- a/va416xx/src/dma/chnl_enable_clr.rs +++ b/va416xx/src/dma/chnl_enable_clr.rs @@ -43,22 +43,22 @@ impl R { impl W { #[doc = "Bit 0 - Channel Enable clear"] #[inline(always)] - pub fn ch0(&mut self) -> Ch0W { + pub fn ch0(&mut self) -> Ch0W<'_, ChnlEnableClrSpec> { Ch0W::new(self, 0) } #[doc = "Bit 1 - Channel Enable clear"] #[inline(always)] - pub fn ch1(&mut self) -> Ch1W { + pub fn ch1(&mut self) -> Ch1W<'_, ChnlEnableClrSpec> { Ch1W::new(self, 1) } #[doc = "Bit 2 - Channel Enable clear"] #[inline(always)] - pub fn ch2(&mut self) -> Ch2W { + pub fn ch2(&mut self) -> Ch2W<'_, ChnlEnableClrSpec> { Ch2W::new(self, 2) } #[doc = "Bit 3 - Channel Enable clear"] #[inline(always)] - pub fn ch3(&mut self) -> Ch3W { + pub fn ch3(&mut self) -> Ch3W<'_, ChnlEnableClrSpec> { Ch3W::new(self, 3) } } @@ -72,10 +72,6 @@ impl crate::Readable for ChnlEnableClrSpec {} #[doc = "`write(|w| ..)` method takes [`chnl_enable_clr::W`](W) writer structure"] impl crate::Writable for ChnlEnableClrSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CHNL_ENABLE_CLR to value 0"] -impl crate::Resettable for ChnlEnableClrSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for ChnlEnableClrSpec {} diff --git a/va416xx/src/dma/chnl_enable_set.rs b/va416xx/src/dma/chnl_enable_set.rs index 840d603..b3f2038 100644 --- a/va416xx/src/dma/chnl_enable_set.rs +++ b/va416xx/src/dma/chnl_enable_set.rs @@ -43,22 +43,22 @@ impl R { impl W { #[doc = "Bit 0 - Channel Enable set"] #[inline(always)] - pub fn ch0(&mut self) -> Ch0W { + pub fn ch0(&mut self) -> Ch0W<'_, ChnlEnableSetSpec> { Ch0W::new(self, 0) } #[doc = "Bit 1 - Channel Enable set"] #[inline(always)] - pub fn ch1(&mut self) -> Ch1W { + pub fn ch1(&mut self) -> Ch1W<'_, ChnlEnableSetSpec> { Ch1W::new(self, 1) } #[doc = "Bit 2 - Channel Enable set"] #[inline(always)] - pub fn ch2(&mut self) -> Ch2W { + pub fn ch2(&mut self) -> Ch2W<'_, ChnlEnableSetSpec> { Ch2W::new(self, 2) } #[doc = "Bit 3 - Channel Enable set"] #[inline(always)] - pub fn ch3(&mut self) -> Ch3W { + pub fn ch3(&mut self) -> Ch3W<'_, ChnlEnableSetSpec> { Ch3W::new(self, 3) } } @@ -72,10 +72,6 @@ impl crate::Readable for ChnlEnableSetSpec {} #[doc = "`write(|w| ..)` method takes [`chnl_enable_set::W`](W) writer structure"] impl crate::Writable for ChnlEnableSetSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CHNL_ENABLE_SET to value 0"] -impl crate::Resettable for ChnlEnableSetSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for ChnlEnableSetSpec {} diff --git a/va416xx/src/dma/chnl_pri_alt_clr.rs b/va416xx/src/dma/chnl_pri_alt_clr.rs index 6e75664..0926fd6 100644 --- a/va416xx/src/dma/chnl_pri_alt_clr.rs +++ b/va416xx/src/dma/chnl_pri_alt_clr.rs @@ -43,22 +43,22 @@ impl R { impl W { #[doc = "Bit 0 - Channel PRI_ALT clear"] #[inline(always)] - pub fn ch0(&mut self) -> Ch0W { + pub fn ch0(&mut self) -> Ch0W<'_, ChnlPriAltClrSpec> { Ch0W::new(self, 0) } #[doc = "Bit 1 - Channel PRI_ALT clear"] #[inline(always)] - pub fn ch1(&mut self) -> Ch1W { + pub fn ch1(&mut self) -> Ch1W<'_, ChnlPriAltClrSpec> { Ch1W::new(self, 1) } #[doc = "Bit 2 - Channel PRI_ALT clear"] #[inline(always)] - pub fn ch2(&mut self) -> Ch2W { + pub fn ch2(&mut self) -> Ch2W<'_, ChnlPriAltClrSpec> { Ch2W::new(self, 2) } #[doc = "Bit 3 - Channel PRI_ALT clear"] #[inline(always)] - pub fn ch3(&mut self) -> Ch3W { + pub fn ch3(&mut self) -> Ch3W<'_, ChnlPriAltClrSpec> { Ch3W::new(self, 3) } } @@ -72,10 +72,6 @@ impl crate::Readable for ChnlPriAltClrSpec {} #[doc = "`write(|w| ..)` method takes [`chnl_pri_alt_clr::W`](W) writer structure"] impl crate::Writable for ChnlPriAltClrSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CHNL_PRI_ALT_CLR to value 0"] -impl crate::Resettable for ChnlPriAltClrSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for ChnlPriAltClrSpec {} diff --git a/va416xx/src/dma/chnl_pri_alt_set.rs b/va416xx/src/dma/chnl_pri_alt_set.rs index 84b7e83..fa9592c 100644 --- a/va416xx/src/dma/chnl_pri_alt_set.rs +++ b/va416xx/src/dma/chnl_pri_alt_set.rs @@ -43,22 +43,22 @@ impl R { impl W { #[doc = "Bit 0 - Channel PRI_ALT set"] #[inline(always)] - pub fn ch0(&mut self) -> Ch0W { + pub fn ch0(&mut self) -> Ch0W<'_, ChnlPriAltSetSpec> { Ch0W::new(self, 0) } #[doc = "Bit 1 - Channel PRI_ALT set"] #[inline(always)] - pub fn ch1(&mut self) -> Ch1W { + pub fn ch1(&mut self) -> Ch1W<'_, ChnlPriAltSetSpec> { Ch1W::new(self, 1) } #[doc = "Bit 2 - Channel PRI_ALT set"] #[inline(always)] - pub fn ch2(&mut self) -> Ch2W { + pub fn ch2(&mut self) -> Ch2W<'_, ChnlPriAltSetSpec> { Ch2W::new(self, 2) } #[doc = "Bit 3 - Channel PRI_ALT set"] #[inline(always)] - pub fn ch3(&mut self) -> Ch3W { + pub fn ch3(&mut self) -> Ch3W<'_, ChnlPriAltSetSpec> { Ch3W::new(self, 3) } } @@ -72,10 +72,6 @@ impl crate::Readable for ChnlPriAltSetSpec {} #[doc = "`write(|w| ..)` method takes [`chnl_pri_alt_set::W`](W) writer structure"] impl crate::Writable for ChnlPriAltSetSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CHNL_PRI_ALT_SET to value 0"] -impl crate::Resettable for ChnlPriAltSetSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for ChnlPriAltSetSpec {} diff --git a/va416xx/src/dma/chnl_priority_clr.rs b/va416xx/src/dma/chnl_priority_clr.rs index b66b2c4..3e38c4f 100644 --- a/va416xx/src/dma/chnl_priority_clr.rs +++ b/va416xx/src/dma/chnl_priority_clr.rs @@ -11,22 +11,22 @@ pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Channel PRIORITY clear"] #[inline(always)] - pub fn ch0(&mut self) -> Ch0W { + pub fn ch0(&mut self) -> Ch0W<'_, ChnlPriorityClrSpec> { Ch0W::new(self, 0) } #[doc = "Bit 1 - Channel PRIORITY clear"] #[inline(always)] - pub fn ch1(&mut self) -> Ch1W { + pub fn ch1(&mut self) -> Ch1W<'_, ChnlPriorityClrSpec> { Ch1W::new(self, 1) } #[doc = "Bit 2 - Channel PRIORITY clear"] #[inline(always)] - pub fn ch2(&mut self) -> Ch2W { + pub fn ch2(&mut self) -> Ch2W<'_, ChnlPriorityClrSpec> { Ch2W::new(self, 2) } #[doc = "Bit 3 - Channel PRIORITY clear"] #[inline(always)] - pub fn ch3(&mut self) -> Ch3W { + pub fn ch3(&mut self) -> Ch3W<'_, ChnlPriorityClrSpec> { Ch3W::new(self, 3) } } @@ -38,10 +38,6 @@ impl crate::RegisterSpec for ChnlPriorityClrSpec { #[doc = "`write(|w| ..)` method takes [`chnl_priority_clr::W`](W) writer structure"] impl crate::Writable for ChnlPriorityClrSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CHNL_PRIORITY_CLR to value 0"] -impl crate::Resettable for ChnlPriorityClrSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for ChnlPriorityClrSpec {} diff --git a/va416xx/src/dma/chnl_priority_set.rs b/va416xx/src/dma/chnl_priority_set.rs index d84f348..a21f390 100644 --- a/va416xx/src/dma/chnl_priority_set.rs +++ b/va416xx/src/dma/chnl_priority_set.rs @@ -43,22 +43,22 @@ impl R { impl W { #[doc = "Bit 0 - Channel PRIORITY set"] #[inline(always)] - pub fn ch0(&mut self) -> Ch0W { + pub fn ch0(&mut self) -> Ch0W<'_, ChnlPrioritySetSpec> { Ch0W::new(self, 0) } #[doc = "Bit 1 - Channel PRIORITY set"] #[inline(always)] - pub fn ch1(&mut self) -> Ch1W { + pub fn ch1(&mut self) -> Ch1W<'_, ChnlPrioritySetSpec> { Ch1W::new(self, 1) } #[doc = "Bit 2 - Channel PRIORITY set"] #[inline(always)] - pub fn ch2(&mut self) -> Ch2W { + pub fn ch2(&mut self) -> Ch2W<'_, ChnlPrioritySetSpec> { Ch2W::new(self, 2) } #[doc = "Bit 3 - Channel PRIORITY set"] #[inline(always)] - pub fn ch3(&mut self) -> Ch3W { + pub fn ch3(&mut self) -> Ch3W<'_, ChnlPrioritySetSpec> { Ch3W::new(self, 3) } } @@ -72,10 +72,6 @@ impl crate::Readable for ChnlPrioritySetSpec {} #[doc = "`write(|w| ..)` method takes [`chnl_priority_set::W`](W) writer structure"] impl crate::Writable for ChnlPrioritySetSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CHNL_PRIORITY_SET to value 0"] -impl crate::Resettable for ChnlPrioritySetSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for ChnlPrioritySetSpec {} diff --git a/va416xx/src/dma/chnl_req_mask_clr.rs b/va416xx/src/dma/chnl_req_mask_clr.rs index 89943ea..95e5b9d 100644 --- a/va416xx/src/dma/chnl_req_mask_clr.rs +++ b/va416xx/src/dma/chnl_req_mask_clr.rs @@ -43,22 +43,22 @@ impl R { impl W { #[doc = "Bit 0 - Channel Request Mask clear"] #[inline(always)] - pub fn ch0(&mut self) -> Ch0W { + pub fn ch0(&mut self) -> Ch0W<'_, ChnlReqMaskClrSpec> { Ch0W::new(self, 0) } #[doc = "Bit 1 - Channel Request Mask clear"] #[inline(always)] - pub fn ch1(&mut self) -> Ch1W { + pub fn ch1(&mut self) -> Ch1W<'_, ChnlReqMaskClrSpec> { Ch1W::new(self, 1) } #[doc = "Bit 2 - Channel Request Mask clear"] #[inline(always)] - pub fn ch2(&mut self) -> Ch2W { + pub fn ch2(&mut self) -> Ch2W<'_, ChnlReqMaskClrSpec> { Ch2W::new(self, 2) } #[doc = "Bit 3 - Channel Request Mask clear"] #[inline(always)] - pub fn ch3(&mut self) -> Ch3W { + pub fn ch3(&mut self) -> Ch3W<'_, ChnlReqMaskClrSpec> { Ch3W::new(self, 3) } } @@ -72,10 +72,6 @@ impl crate::Readable for ChnlReqMaskClrSpec {} #[doc = "`write(|w| ..)` method takes [`chnl_req_mask_clr::W`](W) writer structure"] impl crate::Writable for ChnlReqMaskClrSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CHNL_REQ_MASK_CLR to value 0"] -impl crate::Resettable for ChnlReqMaskClrSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for ChnlReqMaskClrSpec {} diff --git a/va416xx/src/dma/chnl_req_mask_set.rs b/va416xx/src/dma/chnl_req_mask_set.rs index df33c09..652486b 100644 --- a/va416xx/src/dma/chnl_req_mask_set.rs +++ b/va416xx/src/dma/chnl_req_mask_set.rs @@ -43,22 +43,22 @@ impl R { impl W { #[doc = "Bit 0 - Channel Request Mask set"] #[inline(always)] - pub fn ch0(&mut self) -> Ch0W { + pub fn ch0(&mut self) -> Ch0W<'_, ChnlReqMaskSetSpec> { Ch0W::new(self, 0) } #[doc = "Bit 1 - Channel Request Mask set"] #[inline(always)] - pub fn ch1(&mut self) -> Ch1W { + pub fn ch1(&mut self) -> Ch1W<'_, ChnlReqMaskSetSpec> { Ch1W::new(self, 1) } #[doc = "Bit 2 - Channel Request Mask set"] #[inline(always)] - pub fn ch2(&mut self) -> Ch2W { + pub fn ch2(&mut self) -> Ch2W<'_, ChnlReqMaskSetSpec> { Ch2W::new(self, 2) } #[doc = "Bit 3 - Channel Request Mask set"] #[inline(always)] - pub fn ch3(&mut self) -> Ch3W { + pub fn ch3(&mut self) -> Ch3W<'_, ChnlReqMaskSetSpec> { Ch3W::new(self, 3) } } @@ -72,10 +72,6 @@ impl crate::Readable for ChnlReqMaskSetSpec {} #[doc = "`write(|w| ..)` method takes [`chnl_req_mask_set::W`](W) writer structure"] impl crate::Writable for ChnlReqMaskSetSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CHNL_REQ_MASK_SET to value 0"] -impl crate::Resettable for ChnlReqMaskSetSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for ChnlReqMaskSetSpec {} diff --git a/va416xx/src/dma/chnl_sw_request.rs b/va416xx/src/dma/chnl_sw_request.rs index dae0c61..f51eed3 100644 --- a/va416xx/src/dma/chnl_sw_request.rs +++ b/va416xx/src/dma/chnl_sw_request.rs @@ -11,22 +11,22 @@ pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Channel SW request"] #[inline(always)] - pub fn ch0(&mut self) -> Ch0W { + pub fn ch0(&mut self) -> Ch0W<'_, ChnlSwRequestSpec> { Ch0W::new(self, 0) } #[doc = "Bit 1 - Channel SW request"] #[inline(always)] - pub fn ch1(&mut self) -> Ch1W { + pub fn ch1(&mut self) -> Ch1W<'_, ChnlSwRequestSpec> { Ch1W::new(self, 1) } #[doc = "Bit 2 - Channel SW request"] #[inline(always)] - pub fn ch2(&mut self) -> Ch2W { + pub fn ch2(&mut self) -> Ch2W<'_, ChnlSwRequestSpec> { Ch2W::new(self, 2) } #[doc = "Bit 3 - Channel SW request"] #[inline(always)] - pub fn ch3(&mut self) -> Ch3W { + pub fn ch3(&mut self) -> Ch3W<'_, ChnlSwRequestSpec> { Ch3W::new(self, 3) } } @@ -38,10 +38,6 @@ impl crate::RegisterSpec for ChnlSwRequestSpec { #[doc = "`write(|w| ..)` method takes [`chnl_sw_request::W`](W) writer structure"] impl crate::Writable for ChnlSwRequestSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CHNL_SW_REQUEST to value 0"] -impl crate::Resettable for ChnlSwRequestSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for ChnlSwRequestSpec {} diff --git a/va416xx/src/dma/chnl_useburst_clr.rs b/va416xx/src/dma/chnl_useburst_clr.rs index cf4ea8e..a8bbd20 100644 --- a/va416xx/src/dma/chnl_useburst_clr.rs +++ b/va416xx/src/dma/chnl_useburst_clr.rs @@ -43,22 +43,22 @@ impl R { impl W { #[doc = "Bit 0 - Channel use burst clear"] #[inline(always)] - pub fn ch0(&mut self) -> Ch0W { + pub fn ch0(&mut self) -> Ch0W<'_, ChnlUseburstClrSpec> { Ch0W::new(self, 0) } #[doc = "Bit 1 - Channel use burst clear"] #[inline(always)] - pub fn ch1(&mut self) -> Ch1W { + pub fn ch1(&mut self) -> Ch1W<'_, ChnlUseburstClrSpec> { Ch1W::new(self, 1) } #[doc = "Bit 2 - Channel use burst clear"] #[inline(always)] - pub fn ch2(&mut self) -> Ch2W { + pub fn ch2(&mut self) -> Ch2W<'_, ChnlUseburstClrSpec> { Ch2W::new(self, 2) } #[doc = "Bit 3 - Channel use burst clear"] #[inline(always)] - pub fn ch3(&mut self) -> Ch3W { + pub fn ch3(&mut self) -> Ch3W<'_, ChnlUseburstClrSpec> { Ch3W::new(self, 3) } } @@ -72,10 +72,6 @@ impl crate::Readable for ChnlUseburstClrSpec {} #[doc = "`write(|w| ..)` method takes [`chnl_useburst_clr::W`](W) writer structure"] impl crate::Writable for ChnlUseburstClrSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CHNL_USEBURST_CLR to value 0"] -impl crate::Resettable for ChnlUseburstClrSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for ChnlUseburstClrSpec {} diff --git a/va416xx/src/dma/chnl_useburst_set.rs b/va416xx/src/dma/chnl_useburst_set.rs index 61f3d29..e4cc8d7 100644 --- a/va416xx/src/dma/chnl_useburst_set.rs +++ b/va416xx/src/dma/chnl_useburst_set.rs @@ -43,22 +43,22 @@ impl R { impl W { #[doc = "Bit 0 - Channel use burst set"] #[inline(always)] - pub fn ch0(&mut self) -> Ch0W { + pub fn ch0(&mut self) -> Ch0W<'_, ChnlUseburstSetSpec> { Ch0W::new(self, 0) } #[doc = "Bit 1 - Channel use burst set"] #[inline(always)] - pub fn ch1(&mut self) -> Ch1W { + pub fn ch1(&mut self) -> Ch1W<'_, ChnlUseburstSetSpec> { Ch1W::new(self, 1) } #[doc = "Bit 2 - Channel use burst set"] #[inline(always)] - pub fn ch2(&mut self) -> Ch2W { + pub fn ch2(&mut self) -> Ch2W<'_, ChnlUseburstSetSpec> { Ch2W::new(self, 2) } #[doc = "Bit 3 - Channel use burst set"] #[inline(always)] - pub fn ch3(&mut self) -> Ch3W { + pub fn ch3(&mut self) -> Ch3W<'_, ChnlUseburstSetSpec> { Ch3W::new(self, 3) } } @@ -72,10 +72,6 @@ impl crate::Readable for ChnlUseburstSetSpec {} #[doc = "`write(|w| ..)` method takes [`chnl_useburst_set::W`](W) writer structure"] impl crate::Writable for ChnlUseburstSetSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CHNL_USEBURST_SET to value 0"] -impl crate::Resettable for ChnlUseburstSetSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for ChnlUseburstSetSpec {} diff --git a/va416xx/src/dma/ctrl_base_ptr.rs b/va416xx/src/dma/ctrl_base_ptr.rs index 57b620a..11fa9bf 100644 --- a/va416xx/src/dma/ctrl_base_ptr.rs +++ b/va416xx/src/dma/ctrl_base_ptr.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 7:31 - Base Pointer for DMA Control Registers"] #[inline(always)] - pub fn ctrl_base_ptr(&mut self) -> CtrlBasePtrW { + pub fn ctrl_base_ptr(&mut self) -> CtrlBasePtrW<'_, CtrlBasePtrSpec> { CtrlBasePtrW::new(self, 7) } } @@ -30,10 +30,6 @@ impl crate::Readable for CtrlBasePtrSpec {} #[doc = "`write(|w| ..)` method takes [`ctrl_base_ptr::W`](W) writer structure"] impl crate::Writable for CtrlBasePtrSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTRL_BASE_PTR to value 0"] -impl crate::Resettable for CtrlBasePtrSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for CtrlBasePtrSpec {} diff --git a/va416xx/src/dma/dma_active_clr.rs b/va416xx/src/dma/dma_active_clr.rs index d27b598..e146eb5 100644 --- a/va416xx/src/dma/dma_active_clr.rs +++ b/va416xx/src/dma/dma_active_clr.rs @@ -43,22 +43,22 @@ impl R { impl W { #[doc = "Bit 0 - DMA Active clear"] #[inline(always)] - pub fn ch0(&mut self) -> Ch0W { + pub fn ch0(&mut self) -> Ch0W<'_, DmaActiveClrSpec> { Ch0W::new(self, 0) } #[doc = "Bit 1 - DMA Active clear"] #[inline(always)] - pub fn ch1(&mut self) -> Ch1W { + pub fn ch1(&mut self) -> Ch1W<'_, DmaActiveClrSpec> { Ch1W::new(self, 1) } #[doc = "Bit 2 - DMA Active clear"] #[inline(always)] - pub fn ch2(&mut self) -> Ch2W { + pub fn ch2(&mut self) -> Ch2W<'_, DmaActiveClrSpec> { Ch2W::new(self, 2) } #[doc = "Bit 3 - DMA Active clear"] #[inline(always)] - pub fn ch3(&mut self) -> Ch3W { + pub fn ch3(&mut self) -> Ch3W<'_, DmaActiveClrSpec> { Ch3W::new(self, 3) } } @@ -72,10 +72,6 @@ impl crate::Readable for DmaActiveClrSpec {} #[doc = "`write(|w| ..)` method takes [`dma_active_clr::W`](W) writer structure"] impl crate::Writable for DmaActiveClrSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DMA_ACTIVE_CLR to value 0"] -impl crate::Resettable for DmaActiveClrSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for DmaActiveClrSpec {} diff --git a/va416xx/src/dma/dma_active_set.rs b/va416xx/src/dma/dma_active_set.rs index 78b2e72..457a201 100644 --- a/va416xx/src/dma/dma_active_set.rs +++ b/va416xx/src/dma/dma_active_set.rs @@ -43,22 +43,22 @@ impl R { impl W { #[doc = "Bit 0 - DMA Active Set"] #[inline(always)] - pub fn ch0(&mut self) -> Ch0W { + pub fn ch0(&mut self) -> Ch0W<'_, DmaActiveSetSpec> { Ch0W::new(self, 0) } #[doc = "Bit 1 - DMA Active Set"] #[inline(always)] - pub fn ch1(&mut self) -> Ch1W { + pub fn ch1(&mut self) -> Ch1W<'_, DmaActiveSetSpec> { Ch1W::new(self, 1) } #[doc = "Bit 2 - DMA Active Set"] #[inline(always)] - pub fn ch2(&mut self) -> Ch2W { + pub fn ch2(&mut self) -> Ch2W<'_, DmaActiveSetSpec> { Ch2W::new(self, 2) } #[doc = "Bit 3 - DMA Active Set"] #[inline(always)] - pub fn ch3(&mut self) -> Ch3W { + pub fn ch3(&mut self) -> Ch3W<'_, DmaActiveSetSpec> { Ch3W::new(self, 3) } } @@ -72,10 +72,6 @@ impl crate::Readable for DmaActiveSetSpec {} #[doc = "`write(|w| ..)` method takes [`dma_active_set::W`](W) writer structure"] impl crate::Writable for DmaActiveSetSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DMA_ACTIVE_SET to value 0"] -impl crate::Resettable for DmaActiveSetSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for DmaActiveSetSpec {} diff --git a/va416xx/src/dma/dma_done_clr.rs b/va416xx/src/dma/dma_done_clr.rs index 797a6b2..b6ed4e6 100644 --- a/va416xx/src/dma/dma_done_clr.rs +++ b/va416xx/src/dma/dma_done_clr.rs @@ -43,22 +43,22 @@ impl R { impl W { #[doc = "Bit 0 - DMA Done clear for this CH"] #[inline(always)] - pub fn ch0(&mut self) -> Ch0W { + pub fn ch0(&mut self) -> Ch0W<'_, DmaDoneClrSpec> { Ch0W::new(self, 0) } #[doc = "Bit 1 - DMA Done clear for this CH"] #[inline(always)] - pub fn ch1(&mut self) -> Ch1W { + pub fn ch1(&mut self) -> Ch1W<'_, DmaDoneClrSpec> { Ch1W::new(self, 1) } #[doc = "Bit 2 - DMA Done clear for this CH"] #[inline(always)] - pub fn ch2(&mut self) -> Ch2W { + pub fn ch2(&mut self) -> Ch2W<'_, DmaDoneClrSpec> { Ch2W::new(self, 2) } #[doc = "Bit 3 - DMA Done clear for this CH"] #[inline(always)] - pub fn ch3(&mut self) -> Ch3W { + pub fn ch3(&mut self) -> Ch3W<'_, DmaDoneClrSpec> { Ch3W::new(self, 3) } } @@ -72,10 +72,6 @@ impl crate::Readable for DmaDoneClrSpec {} #[doc = "`write(|w| ..)` method takes [`dma_done_clr::W`](W) writer structure"] impl crate::Writable for DmaDoneClrSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DMA_DONE_CLR to value 0"] -impl crate::Resettable for DmaDoneClrSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for DmaDoneClrSpec {} diff --git a/va416xx/src/dma/dma_done_set.rs b/va416xx/src/dma/dma_done_set.rs index 2c7457b..0f6b441 100644 --- a/va416xx/src/dma/dma_done_set.rs +++ b/va416xx/src/dma/dma_done_set.rs @@ -43,22 +43,22 @@ impl R { impl W { #[doc = "Bit 0 - DMA Done Set for this CH"] #[inline(always)] - pub fn ch0(&mut self) -> Ch0W { + pub fn ch0(&mut self) -> Ch0W<'_, DmaDoneSetSpec> { Ch0W::new(self, 0) } #[doc = "Bit 1 - DMA Done Set for this CH"] #[inline(always)] - pub fn ch1(&mut self) -> Ch1W { + pub fn ch1(&mut self) -> Ch1W<'_, DmaDoneSetSpec> { Ch1W::new(self, 1) } #[doc = "Bit 2 - DMA Done Set for this CH"] #[inline(always)] - pub fn ch2(&mut self) -> Ch2W { + pub fn ch2(&mut self) -> Ch2W<'_, DmaDoneSetSpec> { Ch2W::new(self, 2) } #[doc = "Bit 3 - DMA Done Set for this CH"] #[inline(always)] - pub fn ch3(&mut self) -> Ch3W { + pub fn ch3(&mut self) -> Ch3W<'_, DmaDoneSetSpec> { Ch3W::new(self, 3) } } @@ -72,10 +72,6 @@ impl crate::Readable for DmaDoneSetSpec {} #[doc = "`write(|w| ..)` method takes [`dma_done_set::W`](W) writer structure"] impl crate::Writable for DmaDoneSetSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DMA_DONE_SET to value 0"] -impl crate::Resettable for DmaDoneSetSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for DmaDoneSetSpec {} diff --git a/va416xx/src/dma/dma_req_status.rs b/va416xx/src/dma/dma_req_status.rs index 7fe6643..d545196 100644 --- a/va416xx/src/dma/dma_req_status.rs +++ b/va416xx/src/dma/dma_req_status.rs @@ -43,22 +43,22 @@ impl R { impl W { #[doc = "Bit 0 - DMA Request Status for this CH"] #[inline(always)] - pub fn ch0(&mut self) -> Ch0W { + pub fn ch0(&mut self) -> Ch0W<'_, DmaReqStatusSpec> { Ch0W::new(self, 0) } #[doc = "Bit 1 - DMA Request Status for this CH"] #[inline(always)] - pub fn ch1(&mut self) -> Ch1W { + pub fn ch1(&mut self) -> Ch1W<'_, DmaReqStatusSpec> { Ch1W::new(self, 1) } #[doc = "Bit 2 - DMA Request Status for this CH"] #[inline(always)] - pub fn ch2(&mut self) -> Ch2W { + pub fn ch2(&mut self) -> Ch2W<'_, DmaReqStatusSpec> { Ch2W::new(self, 2) } #[doc = "Bit 3 - DMA Request Status for this CH"] #[inline(always)] - pub fn ch3(&mut self) -> Ch3W { + pub fn ch3(&mut self) -> Ch3W<'_, DmaReqStatusSpec> { Ch3W::new(self, 3) } } @@ -72,10 +72,6 @@ impl crate::Readable for DmaReqStatusSpec {} #[doc = "`write(|w| ..)` method takes [`dma_req_status::W`](W) writer structure"] impl crate::Writable for DmaReqStatusSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DMA_REQ_STATUS to value 0"] -impl crate::Resettable for DmaReqStatusSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for DmaReqStatusSpec {} diff --git a/va416xx/src/dma/dma_sreq_status.rs b/va416xx/src/dma/dma_sreq_status.rs index 47ae061..b09c9a5 100644 --- a/va416xx/src/dma/dma_sreq_status.rs +++ b/va416xx/src/dma/dma_sreq_status.rs @@ -43,22 +43,22 @@ impl R { impl W { #[doc = "Bit 0 - DMA SRequest Status for this CH"] #[inline(always)] - pub fn ch0(&mut self) -> Ch0W { + pub fn ch0(&mut self) -> Ch0W<'_, DmaSreqStatusSpec> { Ch0W::new(self, 0) } #[doc = "Bit 1 - DMA SRequest Status for this CH"] #[inline(always)] - pub fn ch1(&mut self) -> Ch1W { + pub fn ch1(&mut self) -> Ch1W<'_, DmaSreqStatusSpec> { Ch1W::new(self, 1) } #[doc = "Bit 2 - DMA SRequest Status for this CH"] #[inline(always)] - pub fn ch2(&mut self) -> Ch2W { + pub fn ch2(&mut self) -> Ch2W<'_, DmaSreqStatusSpec> { Ch2W::new(self, 2) } #[doc = "Bit 3 - DMA SRequest Status for this CH"] #[inline(always)] - pub fn ch3(&mut self) -> Ch3W { + pub fn ch3(&mut self) -> Ch3W<'_, DmaSreqStatusSpec> { Ch3W::new(self, 3) } } @@ -72,10 +72,6 @@ impl crate::Readable for DmaSreqStatusSpec {} #[doc = "`write(|w| ..)` method takes [`dma_sreq_status::W`](W) writer structure"] impl crate::Writable for DmaSreqStatusSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DMA_SREQ_STATUS to value 0"] -impl crate::Resettable for DmaSreqStatusSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for DmaSreqStatusSpec {} diff --git a/va416xx/src/dma/err_clr.rs b/va416xx/src/dma/err_clr.rs index 867c09f..f715363 100644 --- a/va416xx/src/dma/err_clr.rs +++ b/va416xx/src/dma/err_clr.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bit 0 - Error Clear"] #[inline(always)] - pub fn err_clr(&mut self) -> ErrClrW { + pub fn err_clr(&mut self) -> ErrClrW<'_, ErrClrSpec> { ErrClrW::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for ErrClrSpec {} #[doc = "`write(|w| ..)` method takes [`err_clr::W`](W) writer structure"] impl crate::Writable for ErrClrSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ERR_CLR to value 0"] -impl crate::Resettable for ErrClrSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for ErrClrSpec {} diff --git a/va416xx/src/dma/err_set.rs b/va416xx/src/dma/err_set.rs index 5126960..e8cd604 100644 --- a/va416xx/src/dma/err_set.rs +++ b/va416xx/src/dma/err_set.rs @@ -22,10 +22,6 @@ impl crate::Readable for ErrSetSpec {} #[doc = "`write(|w| ..)` method takes [`err_set::W`](W) writer structure"] impl crate::Writable for ErrSetSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ERR_SET to value 0"] -impl crate::Resettable for ErrSetSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for ErrSetSpec {} diff --git a/va416xx/src/dma/integration_cfg.rs b/va416xx/src/dma/integration_cfg.rs index 88921a6..93b1c1d 100644 --- a/va416xx/src/dma/integration_cfg.rs +++ b/va416xx/src/dma/integration_cfg.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bit 0 - Error Clear"] #[inline(always)] - pub fn int_test_en(&mut self) -> IntTestEnW { + pub fn int_test_en(&mut self) -> IntTestEnW<'_, IntegrationCfgSpec> { IntTestEnW::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for IntegrationCfgSpec {} #[doc = "`write(|w| ..)` method takes [`integration_cfg::W`](W) writer structure"] impl crate::Writable for IntegrationCfgSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets INTEGRATION_CFG to value 0"] -impl crate::Resettable for IntegrationCfgSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for IntegrationCfgSpec {} diff --git a/va416xx/src/dma/periph_id_0.rs b/va416xx/src/dma/periph_id_0.rs index a2f5681..b1cbcd5 100644 --- a/va416xx/src/dma/periph_id_0.rs +++ b/va416xx/src/dma/periph_id_0.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:7 - Part Number"] #[inline(always)] - pub fn part_number_0(&mut self) -> PartNumber0W { + pub fn part_number_0(&mut self) -> PartNumber0W<'_, PeriphId0Spec> { PartNumber0W::new(self, 0) } } @@ -30,8 +30,6 @@ impl crate::Readable for PeriphId0Spec {} #[doc = "`write(|w| ..)` method takes [`periph_id_0::W`](W) writer structure"] impl crate::Writable for PeriphId0Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PERIPH_ID_0 to value 0x30"] impl crate::Resettable for PeriphId0Spec { diff --git a/va416xx/src/dma/periph_id_2.rs b/va416xx/src/dma/periph_id_2.rs index ee84e75..19692d1 100644 --- a/va416xx/src/dma/periph_id_2.rs +++ b/va416xx/src/dma/periph_id_2.rs @@ -34,17 +34,17 @@ impl R { impl W { #[doc = "Bits 0:2 - JEP106"] #[inline(always)] - pub fn jep106_id_6_4(&mut self) -> Jep106Id6_4W { + pub fn jep106_id_6_4(&mut self) -> Jep106Id6_4W<'_, PeriphId2Spec> { Jep106Id6_4W::new(self, 0) } #[doc = "Bit 3 - JEDEC"] #[inline(always)] - pub fn jedec_used(&mut self) -> JedecUsedW { + pub fn jedec_used(&mut self) -> JedecUsedW<'_, PeriphId2Spec> { JedecUsedW::new(self, 3) } #[doc = "Bits 4:7 - Revision"] #[inline(always)] - pub fn revision(&mut self) -> RevisionW { + pub fn revision(&mut self) -> RevisionW<'_, PeriphId2Spec> { RevisionW::new(self, 4) } } @@ -58,8 +58,6 @@ impl crate::Readable for PeriphId2Spec {} #[doc = "`write(|w| ..)` method takes [`periph_id_2::W`](W) writer structure"] impl crate::Writable for PeriphId2Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PERIPH_ID_2 to value 0xbc"] impl crate::Resettable for PeriphId2Spec { diff --git a/va416xx/src/dma/periph_id_3.rs b/va416xx/src/dma/periph_id_3.rs index 7c72872..b458ec5 100644 --- a/va416xx/src/dma/periph_id_3.rs +++ b/va416xx/src/dma/periph_id_3.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:3 - Controller Modifications"] #[inline(always)] - pub fn mod_number(&mut self) -> ModNumberW { + pub fn mod_number(&mut self) -> ModNumberW<'_, PeriphId3Spec> { ModNumberW::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for PeriphId3Spec {} #[doc = "`write(|w| ..)` method takes [`periph_id_3::W`](W) writer structure"] impl crate::Writable for PeriphId3Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PERIPH_ID_3 to value 0"] -impl crate::Resettable for PeriphId3Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for PeriphId3Spec {} diff --git a/va416xx/src/dma/periph_id_4.rs b/va416xx/src/dma/periph_id_4.rs index 44c9e2d..88e4810 100644 --- a/va416xx/src/dma/periph_id_4.rs +++ b/va416xx/src/dma/periph_id_4.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:3 - JEP106"] #[inline(always)] - pub fn jep106_c_code(&mut self) -> Jep106CCodeW { + pub fn jep106_c_code(&mut self) -> Jep106CCodeW<'_, PeriphId4Spec> { Jep106CCodeW::new(self, 0) } #[doc = "Bits 4:7 - The Number of 4k Address Blocks Required"] #[inline(always)] - pub fn block_count(&mut self) -> BlockCountW { + pub fn block_count(&mut self) -> BlockCountW<'_, PeriphId4Spec> { BlockCountW::new(self, 4) } } @@ -44,8 +44,6 @@ impl crate::Readable for PeriphId4Spec {} #[doc = "`write(|w| ..)` method takes [`periph_id_4::W`](W) writer structure"] impl crate::Writable for PeriphId4Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PERIPH_ID_4 to value 0x04"] impl crate::Resettable for PeriphId4Spec { diff --git a/va416xx/src/dma/primecell_id_0.rs b/va416xx/src/dma/primecell_id_0.rs index ab2420e..31a57d4 100644 --- a/va416xx/src/dma/primecell_id_0.rs +++ b/va416xx/src/dma/primecell_id_0.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:7 - PrimeCell Identification"] #[inline(always)] - pub fn primecell_id_0(&mut self) -> PrimecellId0W { + pub fn primecell_id_0(&mut self) -> PrimecellId0W<'_, PrimecellId0Spec> { PrimecellId0W::new(self, 0) } } @@ -30,8 +30,6 @@ impl crate::Readable for PrimecellId0Spec {} #[doc = "`write(|w| ..)` method takes [`primecell_id_0::W`](W) writer structure"] impl crate::Writable for PrimecellId0Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PRIMECELL_ID_0 to value 0x0d"] impl crate::Resettable for PrimecellId0Spec { diff --git a/va416xx/src/dma/primecell_id_1.rs b/va416xx/src/dma/primecell_id_1.rs index a082f1c..87dc891 100644 --- a/va416xx/src/dma/primecell_id_1.rs +++ b/va416xx/src/dma/primecell_id_1.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:7 - PrimeCell Identification"] #[inline(always)] - pub fn primecell_id_1(&mut self) -> PrimecellId1W { + pub fn primecell_id_1(&mut self) -> PrimecellId1W<'_, PrimecellId1Spec> { PrimecellId1W::new(self, 0) } } @@ -30,8 +30,6 @@ impl crate::Readable for PrimecellId1Spec {} #[doc = "`write(|w| ..)` method takes [`primecell_id_1::W`](W) writer structure"] impl crate::Writable for PrimecellId1Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PRIMECELL_ID_1 to value 0xf0"] impl crate::Resettable for PrimecellId1Spec { diff --git a/va416xx/src/dma/primecell_id_2.rs b/va416xx/src/dma/primecell_id_2.rs index af81f60..ae0e9b6 100644 --- a/va416xx/src/dma/primecell_id_2.rs +++ b/va416xx/src/dma/primecell_id_2.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:7 - PrimeCell Identification"] #[inline(always)] - pub fn primecell_id_2(&mut self) -> PrimecellId2W { + pub fn primecell_id_2(&mut self) -> PrimecellId2W<'_, PrimecellId2Spec> { PrimecellId2W::new(self, 0) } } @@ -30,8 +30,6 @@ impl crate::Readable for PrimecellId2Spec {} #[doc = "`write(|w| ..)` method takes [`primecell_id_2::W`](W) writer structure"] impl crate::Writable for PrimecellId2Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PRIMECELL_ID_2 to value 0x05"] impl crate::Resettable for PrimecellId2Spec { diff --git a/va416xx/src/dma/primecell_id_3.rs b/va416xx/src/dma/primecell_id_3.rs index 5e2df47..4635cc7 100644 --- a/va416xx/src/dma/primecell_id_3.rs +++ b/va416xx/src/dma/primecell_id_3.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:7 - PrimeCell Identification"] #[inline(always)] - pub fn primecell_id_3(&mut self) -> PrimecellId3W { + pub fn primecell_id_3(&mut self) -> PrimecellId3W<'_, PrimecellId3Spec> { PrimecellId3W::new(self, 0) } } @@ -30,8 +30,6 @@ impl crate::Readable for PrimecellId3Spec {} #[doc = "`write(|w| ..)` method takes [`primecell_id_3::W`](W) writer structure"] impl crate::Writable for PrimecellId3Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PRIMECELL_ID_3 to value 0xb1"] impl crate::Resettable for PrimecellId3Spec { diff --git a/va416xx/src/dma/stall_status.rs b/va416xx/src/dma/stall_status.rs index 0af31a8..535f7ed 100644 --- a/va416xx/src/dma/stall_status.rs +++ b/va416xx/src/dma/stall_status.rs @@ -22,10 +22,6 @@ impl crate::Readable for StallStatusSpec {} #[doc = "`write(|w| ..)` method takes [`stall_status::W`](W) writer structure"] impl crate::Writable for StallStatusSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets STALL_STATUS to value 0"] -impl crate::Resettable for StallStatusSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for StallStatusSpec {} diff --git a/va416xx/src/dma/status.rs b/va416xx/src/dma/status.rs index 866022d..3c98c4f 100644 --- a/va416xx/src/dma/status.rs +++ b/va416xx/src/dma/status.rs @@ -38,6 +38,4 @@ impl crate::RegisterSpec for StatusSpec { #[doc = "`read()` method returns [`status::R`](R) reader structure"] impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0"] -impl crate::Resettable for StatusSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for StatusSpec {} diff --git a/va416xx/src/dma/waitonreq_status.rs b/va416xx/src/dma/waitonreq_status.rs index 6e9ca87..e6aa791 100644 --- a/va416xx/src/dma/waitonreq_status.rs +++ b/va416xx/src/dma/waitonreq_status.rs @@ -38,6 +38,4 @@ impl crate::RegisterSpec for WaitonreqStatusSpec { #[doc = "`read()` method returns [`waitonreq_status::R`](R) reader structure"] impl crate::Readable for WaitonreqStatusSpec {} #[doc = "`reset()` method sets WAITONREQ_STATUS to value 0"] -impl crate::Resettable for WaitonreqStatusSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for WaitonreqStatusSpec {} diff --git a/va416xx/src/eth.rs b/va416xx/src/eth.rs index dcddd35..abaeed2 100644 --- a/va416xx/src/eth.rs +++ b/va416xx/src/eth.rs @@ -585,572 +585,477 @@ impl RegisterBlock { &self.dma_curr_rx_bufr_addr } } -#[doc = "MAC_CONFIG (rw) register accessor: Operation mode register for the MAC\n\nYou can [`read`](crate::Reg::read) this register and get [`mac_config::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mac_config::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_config`] -module"] +#[doc = "MAC_CONFIG (rw) register accessor: Operation mode register for the MAC\n\nYou can [`read`](crate::Reg::read) this register and get [`mac_config::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mac_config::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_config`] module"] #[doc(alias = "MAC_CONFIG")] pub type MacConfig = crate::Reg; #[doc = "Operation mode register for the MAC"] pub mod mac_config; -#[doc = "MAC_FRAME_FLTR (rw) register accessor: Contains the frame filtering controls\n\nYou can [`read`](crate::Reg::read) this register and get [`mac_frame_fltr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mac_frame_fltr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_frame_fltr`] -module"] +#[doc = "MAC_FRAME_FLTR (rw) register accessor: Contains the frame filtering controls\n\nYou can [`read`](crate::Reg::read) this register and get [`mac_frame_fltr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mac_frame_fltr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_frame_fltr`] module"] #[doc(alias = "MAC_FRAME_FLTR")] pub type MacFrameFltr = crate::Reg; #[doc = "Contains the frame filtering controls"] pub mod mac_frame_fltr; -#[doc = "MAC_GMII_ADDR (rw) register accessor: Controls the management cycles to an external PHY\n\nYou can [`read`](crate::Reg::read) this register and get [`mac_gmii_addr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mac_gmii_addr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_gmii_addr`] -module"] +#[doc = "MAC_GMII_ADDR (rw) register accessor: Controls the management cycles to an external PHY\n\nYou can [`read`](crate::Reg::read) this register and get [`mac_gmii_addr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mac_gmii_addr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_gmii_addr`] module"] #[doc(alias = "MAC_GMII_ADDR")] pub type MacGmiiAddr = crate::Reg; #[doc = "Controls the management cycles to an external PHY"] pub mod mac_gmii_addr; -#[doc = "MAC_GMII_DATA (rw) register accessor: Contains the data to be written to or read from the PHY register\n\nYou can [`read`](crate::Reg::read) this register and get [`mac_gmii_data::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mac_gmii_data::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_gmii_data`] -module"] +#[doc = "MAC_GMII_DATA (rw) register accessor: Contains the data to be written to or read from the PHY register\n\nYou can [`read`](crate::Reg::read) this register and get [`mac_gmii_data::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mac_gmii_data::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_gmii_data`] module"] #[doc(alias = "MAC_GMII_DATA")] pub type MacGmiiData = crate::Reg; #[doc = "Contains the data to be written to or read from the PHY register"] pub mod mac_gmii_data; -#[doc = "MAC_FLOW_CTRL (rw) register accessor: Controls the generation of control frames\n\nYou can [`read`](crate::Reg::read) this register and get [`mac_flow_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mac_flow_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_flow_ctrl`] -module"] +#[doc = "MAC_FLOW_CTRL (rw) register accessor: Controls the generation of control frames\n\nYou can [`read`](crate::Reg::read) this register and get [`mac_flow_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mac_flow_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_flow_ctrl`] module"] #[doc(alias = "MAC_FLOW_CTRL")] pub type MacFlowCtrl = crate::Reg; #[doc = "Controls the generation of control frames"] pub mod mac_flow_ctrl; -#[doc = "MAC_VLAN_TAG (rw) register accessor: Identifies IEEE 802.1Q VLAN type frames\n\nYou can [`read`](crate::Reg::read) this register and get [`mac_vlan_tag::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mac_vlan_tag::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_vlan_tag`] -module"] +#[doc = "MAC_VLAN_TAG (rw) register accessor: Identifies IEEE 802.1Q VLAN type frames\n\nYou can [`read`](crate::Reg::read) this register and get [`mac_vlan_tag::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mac_vlan_tag::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_vlan_tag`] module"] #[doc(alias = "MAC_VLAN_TAG")] pub type MacVlanTag = crate::Reg; #[doc = "Identifies IEEE 802.1Q VLAN type frames"] pub mod mac_vlan_tag; -#[doc = "MAC_DEBUG (r) register accessor: Gives the status of the various internal blocks for debugging\n\nYou can [`read`](crate::Reg::read) this register and get [`mac_debug::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_debug`] -module"] +#[doc = "MAC_DEBUG (r) register accessor: Gives the status of the various internal blocks for debugging\n\nYou can [`read`](crate::Reg::read) this register and get [`mac_debug::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_debug`] module"] #[doc(alias = "MAC_DEBUG")] pub type MacDebug = crate::Reg; #[doc = "Gives the status of the various internal blocks for debugging"] pub mod mac_debug; -#[doc = "MAC_INTR_STAT (r) register accessor: Contains the interrupt status\n\nYou can [`read`](crate::Reg::read) this register and get [`mac_intr_stat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_intr_stat`] -module"] +#[doc = "MAC_INTR_STAT (r) register accessor: Contains the interrupt status\n\nYou can [`read`](crate::Reg::read) this register and get [`mac_intr_stat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_intr_stat`] module"] #[doc(alias = "MAC_INTR_STAT")] pub type MacIntrStat = crate::Reg; #[doc = "Contains the interrupt status"] pub mod mac_intr_stat; -#[doc = "MAC_INTR_MASK (rw) register accessor: Contains the masks for generating interrupt\n\nYou can [`read`](crate::Reg::read) this register and get [`mac_intr_mask::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mac_intr_mask::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_intr_mask`] -module"] +#[doc = "MAC_INTR_MASK (rw) register accessor: Contains the masks for generating interrupt\n\nYou can [`read`](crate::Reg::read) this register and get [`mac_intr_mask::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mac_intr_mask::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_intr_mask`] module"] #[doc(alias = "MAC_INTR_MASK")] pub type MacIntrMask = crate::Reg; #[doc = "Contains the masks for generating interrupt"] pub mod mac_intr_mask; -#[doc = "MAC_ADDR_H (rw) register accessor: Contains the high 16-bits of the first MAC Address\n\nYou can [`read`](crate::Reg::read) this register and get [`mac_addr_h::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mac_addr_h::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_addr_h`] -module"] +#[doc = "MAC_ADDR_H (rw) register accessor: Contains the high 16-bits of the first MAC Address\n\nYou can [`read`](crate::Reg::read) this register and get [`mac_addr_h::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mac_addr_h::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_addr_h`] module"] #[doc(alias = "MAC_ADDR_H")] pub type MacAddrH = crate::Reg; #[doc = "Contains the high 16-bits of the first MAC Address"] pub mod mac_addr_h; -#[doc = "MAC_ADDR_L (rw) register accessor: Contains the Low 32-bits of the first MAC Address\n\nYou can [`read`](crate::Reg::read) this register and get [`mac_addr_l::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mac_addr_l::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_addr_l`] -module"] +#[doc = "MAC_ADDR_L (rw) register accessor: Contains the Low 32-bits of the first MAC Address\n\nYou can [`read`](crate::Reg::read) this register and get [`mac_addr_l::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mac_addr_l::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_addr_l`] module"] #[doc(alias = "MAC_ADDR_L")] pub type MacAddrL = crate::Reg; #[doc = "Contains the Low 32-bits of the first MAC Address"] pub mod mac_addr_l; -#[doc = "MAC_WDOG_TO (rw) register accessor: Controls the watchdog time-out for received frames\n\nYou can [`read`](crate::Reg::read) this register and get [`mac_wdog_to::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mac_wdog_to::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_wdog_to`] -module"] +#[doc = "MAC_WDOG_TO (rw) register accessor: Controls the watchdog time-out for received frames\n\nYou can [`read`](crate::Reg::read) this register and get [`mac_wdog_to::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mac_wdog_to::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_wdog_to`] module"] #[doc(alias = "MAC_WDOG_TO")] pub type MacWdogTo = crate::Reg; #[doc = "Controls the watchdog time-out for received frames"] pub mod mac_wdog_to; -#[doc = "MMC_CNTRL (rw) register accessor: MMC Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mmc_cntrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mmc_cntrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mmc_cntrl`] -module"] +#[doc = "MMC_CNTRL (rw) register accessor: MMC Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mmc_cntrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mmc_cntrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mmc_cntrl`] module"] #[doc(alias = "MMC_CNTRL")] pub type MmcCntrl = crate::Reg; #[doc = "MMC Control Register"] pub mod mmc_cntrl; -#[doc = "MMC_INTR_RX (rw) register accessor: MMC Receive Interrupt Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mmc_intr_rx::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mmc_intr_rx::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mmc_intr_rx`] -module"] +#[doc = "MMC_INTR_RX (rw) register accessor: MMC Receive Interrupt Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mmc_intr_rx::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mmc_intr_rx::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mmc_intr_rx`] module"] #[doc(alias = "MMC_INTR_RX")] pub type MmcIntrRx = crate::Reg; #[doc = "MMC Receive Interrupt Register"] pub mod mmc_intr_rx; -#[doc = "MMC_INTR_TX (rw) register accessor: MMC Transmit Interrupt Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mmc_intr_tx::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mmc_intr_tx::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mmc_intr_tx`] -module"] +#[doc = "MMC_INTR_TX (rw) register accessor: MMC Transmit Interrupt Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mmc_intr_tx::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mmc_intr_tx::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mmc_intr_tx`] module"] #[doc(alias = "MMC_INTR_TX")] pub type MmcIntrTx = crate::Reg; #[doc = "MMC Transmit Interrupt Register"] pub mod mmc_intr_tx; -#[doc = "MMC_INTR_MASK_RX (rw) register accessor: MMC Receive Interrupt Mask Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mmc_intr_mask_rx::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mmc_intr_mask_rx::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mmc_intr_mask_rx`] -module"] +#[doc = "MMC_INTR_MASK_RX (rw) register accessor: MMC Receive Interrupt Mask Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mmc_intr_mask_rx::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mmc_intr_mask_rx::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mmc_intr_mask_rx`] module"] #[doc(alias = "MMC_INTR_MASK_RX")] pub type MmcIntrMaskRx = crate::Reg; #[doc = "MMC Receive Interrupt Mask Register"] pub mod mmc_intr_mask_rx; -#[doc = "MMC_INTR_MASK_TX (rw) register accessor: MMC Transmit Interrupt Mask Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mmc_intr_mask_tx::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mmc_intr_mask_tx::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mmc_intr_mask_tx`] -module"] +#[doc = "MMC_INTR_MASK_TX (rw) register accessor: MMC Transmit Interrupt Mask Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mmc_intr_mask_tx::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mmc_intr_mask_tx::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mmc_intr_mask_tx`] module"] #[doc(alias = "MMC_INTR_MASK_TX")] pub type MmcIntrMaskTx = crate::Reg; #[doc = "MMC Transmit Interrupt Mask Register"] pub mod mmc_intr_mask_tx; -#[doc = "TXOCTETCOUNT_GB (r) register accessor: MMC Transmit Count\n\nYou can [`read`](crate::Reg::read) this register and get [`txoctetcount_gb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txoctetcount_gb`] -module"] +#[doc = "TXOCTETCOUNT_GB (r) register accessor: MMC Transmit Count\n\nYou can [`read`](crate::Reg::read) this register and get [`txoctetcount_gb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txoctetcount_gb`] module"] #[doc(alias = "TXOCTETCOUNT_GB")] pub type TxoctetcountGb = crate::Reg; #[doc = "MMC Transmit Count"] pub mod txoctetcount_gb; -#[doc = "TXFRAMECOUNT_GB (r) register accessor: MMC Frame Count Register\n\nYou can [`read`](crate::Reg::read) this register and get [`txframecount_gb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txframecount_gb`] -module"] +#[doc = "TXFRAMECOUNT_GB (r) register accessor: MMC Frame Count Register\n\nYou can [`read`](crate::Reg::read) this register and get [`txframecount_gb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txframecount_gb`] module"] #[doc(alias = "TXFRAMECOUNT_GB")] pub type TxframecountGb = crate::Reg; #[doc = "MMC Frame Count Register"] pub mod txframecount_gb; -#[doc = "TXBCASTFRAMES_G (r) register accessor: MMC Good Broadcast Frames Register\n\nYou can [`read`](crate::Reg::read) this register and get [`txbcastframes_g::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txbcastframes_g`] -module"] +#[doc = "TXBCASTFRAMES_G (r) register accessor: MMC Good Broadcast Frames Register\n\nYou can [`read`](crate::Reg::read) this register and get [`txbcastframes_g::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txbcastframes_g`] module"] #[doc(alias = "TXBCASTFRAMES_G")] pub type TxbcastframesG = crate::Reg; #[doc = "MMC Good Broadcast Frames Register"] pub mod txbcastframes_g; -#[doc = "TXMCASTFRAMES_G (r) register accessor: MMC Good Multicast Frames Register\n\nYou can [`read`](crate::Reg::read) this register and get [`txmcastframes_g::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txmcastframes_g`] -module"] +#[doc = "TXMCASTFRAMES_G (r) register accessor: MMC Good Multicast Frames Register\n\nYou can [`read`](crate::Reg::read) this register and get [`txmcastframes_g::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txmcastframes_g`] module"] #[doc(alias = "TXMCASTFRAMES_G")] pub type TxmcastframesG = crate::Reg; #[doc = "MMC Good Multicast Frames Register"] pub mod txmcastframes_g; -#[doc = "TX64OCT_GB (r) register accessor: MMC Good and bad Frames transmitted with length 64\n\nYou can [`read`](crate::Reg::read) this register and get [`tx64oct_gb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx64oct_gb`] -module"] +#[doc = "TX64OCT_GB (r) register accessor: MMC Good and bad Frames transmitted with length 64\n\nYou can [`read`](crate::Reg::read) this register and get [`tx64oct_gb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx64oct_gb`] module"] #[doc(alias = "TX64OCT_GB")] pub type Tx64octGb = crate::Reg; #[doc = "MMC Good and bad Frames transmitted with length 64"] pub mod tx64oct_gb; -#[doc = "TX65TO127OCT_GB (r) register accessor: MMC Good and bad Frames transmitted with length 65 to 127\n\nYou can [`read`](crate::Reg::read) this register and get [`tx65to127oct_gb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx65to127oct_gb`] -module"] +#[doc = "TX65TO127OCT_GB (r) register accessor: MMC Good and bad Frames transmitted with length 65 to 127\n\nYou can [`read`](crate::Reg::read) this register and get [`tx65to127oct_gb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx65to127oct_gb`] module"] #[doc(alias = "TX65TO127OCT_GB")] pub type Tx65to127octGb = crate::Reg; #[doc = "MMC Good and bad Frames transmitted with length 65 to 127"] pub mod tx65to127oct_gb; -#[doc = "TX128TO255OCT_GB (r) register accessor: MMC Good and bad Frames transmitted with length 128 to 255\n\nYou can [`read`](crate::Reg::read) this register and get [`tx128to255oct_gb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx128to255oct_gb`] -module"] +#[doc = "TX128TO255OCT_GB (r) register accessor: MMC Good and bad Frames transmitted with length 128 to 255\n\nYou can [`read`](crate::Reg::read) this register and get [`tx128to255oct_gb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx128to255oct_gb`] module"] #[doc(alias = "TX128TO255OCT_GB")] pub type Tx128to255octGb = crate::Reg; #[doc = "MMC Good and bad Frames transmitted with length 128 to 255"] pub mod tx128to255oct_gb; -#[doc = "TX256TO511OCT_GB (r) register accessor: MMC Good and bad Frames transmitted with length 256 to 511\n\nYou can [`read`](crate::Reg::read) this register and get [`tx256to511oct_gb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx256to511oct_gb`] -module"] +#[doc = "TX256TO511OCT_GB (r) register accessor: MMC Good and bad Frames transmitted with length 256 to 511\n\nYou can [`read`](crate::Reg::read) this register and get [`tx256to511oct_gb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx256to511oct_gb`] module"] #[doc(alias = "TX256TO511OCT_GB")] pub type Tx256to511octGb = crate::Reg; #[doc = "MMC Good and bad Frames transmitted with length 256 to 511"] pub mod tx256to511oct_gb; -#[doc = "TX512TO1023OCT_GB (r) register accessor: MMC Good and bad Frames transmitted with length 512 to 1023\n\nYou can [`read`](crate::Reg::read) this register and get [`tx512to1023oct_gb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx512to1023oct_gb`] -module"] +#[doc = "TX512TO1023OCT_GB (r) register accessor: MMC Good and bad Frames transmitted with length 512 to 1023\n\nYou can [`read`](crate::Reg::read) this register and get [`tx512to1023oct_gb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx512to1023oct_gb`] module"] #[doc(alias = "TX512TO1023OCT_GB")] pub type Tx512to1023octGb = crate::Reg; #[doc = "MMC Good and bad Frames transmitted with length 512 to 1023"] pub mod tx512to1023oct_gb; -#[doc = "TX1024MAXOCT_GB (r) register accessor: MMC Good and bad Frames transmitted with length 1024 to max bytes\n\nYou can [`read`](crate::Reg::read) this register and get [`tx1024maxoct_gb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx1024maxoct_gb`] -module"] +#[doc = "TX1024MAXOCT_GB (r) register accessor: MMC Good and bad Frames transmitted with length 1024 to max bytes\n\nYou can [`read`](crate::Reg::read) this register and get [`tx1024maxoct_gb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx1024maxoct_gb`] module"] #[doc(alias = "TX1024MAXOCT_GB")] pub type Tx1024maxoctGb = crate::Reg; #[doc = "MMC Good and bad Frames transmitted with length 1024 to max bytes"] pub mod tx1024maxoct_gb; -#[doc = "TXUCASTFRAME_GB (r) register accessor: MMC number of good and bad unicast frames transmitted\n\nYou can [`read`](crate::Reg::read) this register and get [`txucastframe_gb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txucastframe_gb`] -module"] +#[doc = "TXUCASTFRAME_GB (r) register accessor: MMC number of good and bad unicast frames transmitted\n\nYou can [`read`](crate::Reg::read) this register and get [`txucastframe_gb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txucastframe_gb`] module"] #[doc(alias = "TXUCASTFRAME_GB")] pub type TxucastframeGb = crate::Reg; #[doc = "MMC number of good and bad unicast frames transmitted"] pub mod txucastframe_gb; -#[doc = "TXMCASTFRAME_GB (r) register accessor: MMC number of good and bad MULTIcast frames transmitted\n\nYou can [`read`](crate::Reg::read) this register and get [`txmcastframe_gb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txmcastframe_gb`] -module"] +#[doc = "TXMCASTFRAME_GB (r) register accessor: MMC number of good and bad MULTIcast frames transmitted\n\nYou can [`read`](crate::Reg::read) this register and get [`txmcastframe_gb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txmcastframe_gb`] module"] #[doc(alias = "TXMCASTFRAME_GB")] pub type TxmcastframeGb = crate::Reg; #[doc = "MMC number of good and bad MULTIcast frames transmitted"] pub mod txmcastframe_gb; -#[doc = "TXBCASTFRAME_GB (r) register accessor: MMC number of good and bad broadcast frames transmitted\n\nYou can [`read`](crate::Reg::read) this register and get [`txbcastframe_gb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txbcastframe_gb`] -module"] +#[doc = "TXBCASTFRAME_GB (r) register accessor: MMC number of good and bad broadcast frames transmitted\n\nYou can [`read`](crate::Reg::read) this register and get [`txbcastframe_gb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txbcastframe_gb`] module"] #[doc(alias = "TXBCASTFRAME_GB")] pub type TxbcastframeGb = crate::Reg; #[doc = "MMC number of good and bad broadcast frames transmitted"] pub mod txbcastframe_gb; -#[doc = "TXUNDERERR (r) register accessor: MMC number of frames aborted because of frame underflow error\n\nYou can [`read`](crate::Reg::read) this register and get [`txundererr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txundererr`] -module"] +#[doc = "TXUNDERERR (r) register accessor: MMC number of frames aborted because of frame underflow error\n\nYou can [`read`](crate::Reg::read) this register and get [`txundererr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txundererr`] module"] #[doc(alias = "TXUNDERERR")] pub type Txundererr = crate::Reg; #[doc = "MMC number of frames aborted because of frame underflow error"] pub mod txundererr; -#[doc = "TXSINGLECOL_G (r) register accessor: MMC Number of successfully transmitted frames after a single collision\n\nYou can [`read`](crate::Reg::read) this register and get [`txsinglecol_g::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txsinglecol_g`] -module"] +#[doc = "TXSINGLECOL_G (r) register accessor: MMC Number of successfully transmitted frames after a single collision\n\nYou can [`read`](crate::Reg::read) this register and get [`txsinglecol_g::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txsinglecol_g`] module"] #[doc(alias = "TXSINGLECOL_G")] pub type TxsinglecolG = crate::Reg; #[doc = "MMC Number of successfully transmitted frames after a single collision"] pub mod txsinglecol_g; -#[doc = "TXMULTICOL_G (r) register accessor: MMC Number of successfully transmitted frames after multiple collisions\n\nYou can [`read`](crate::Reg::read) this register and get [`txmulticol_g::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txmulticol_g`] -module"] +#[doc = "TXMULTICOL_G (r) register accessor: MMC Number of successfully transmitted frames after multiple collisions\n\nYou can [`read`](crate::Reg::read) this register and get [`txmulticol_g::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txmulticol_g`] module"] #[doc(alias = "TXMULTICOL_G")] pub type TxmulticolG = crate::Reg; #[doc = "MMC Number of successfully transmitted frames after multiple collisions"] pub mod txmulticol_g; -#[doc = "TXDEFERRED (r) register accessor: MMC Number of successfully transmitted frames after a deferral\n\nYou can [`read`](crate::Reg::read) this register and get [`txdeferred::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txdeferred`] -module"] +#[doc = "TXDEFERRED (r) register accessor: MMC Number of successfully transmitted frames after a deferral\n\nYou can [`read`](crate::Reg::read) this register and get [`txdeferred::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txdeferred`] module"] #[doc(alias = "TXDEFERRED")] pub type Txdeferred = crate::Reg; #[doc = "MMC Number of successfully transmitted frames after a deferral"] pub mod txdeferred; -#[doc = "TXLATECOL (r) register accessor: MMC Number of aborted frames because of late collision error\n\nYou can [`read`](crate::Reg::read) this register and get [`txlatecol::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txlatecol`] -module"] +#[doc = "TXLATECOL (r) register accessor: MMC Number of aborted frames because of late collision error\n\nYou can [`read`](crate::Reg::read) this register and get [`txlatecol::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txlatecol`] module"] #[doc(alias = "TXLATECOL")] pub type Txlatecol = crate::Reg; #[doc = "MMC Number of aborted frames because of late collision error"] pub mod txlatecol; -#[doc = "TXEXESSCOL (r) register accessor: MMC Number of aborted frames because of excessive collision errors\n\nYou can [`read`](crate::Reg::read) this register and get [`txexesscol::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txexesscol`] -module"] +#[doc = "TXEXESSCOL (r) register accessor: MMC Number of aborted frames because of excessive collision errors\n\nYou can [`read`](crate::Reg::read) this register and get [`txexesscol::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txexesscol`] module"] #[doc(alias = "TXEXESSCOL")] pub type Txexesscol = crate::Reg; #[doc = "MMC Number of aborted frames because of excessive collision errors"] pub mod txexesscol; -#[doc = "TXCARRIERERROR (r) register accessor: MMC Number of aborted frames because of carrier sense error\n\nYou can [`read`](crate::Reg::read) this register and get [`txcarriererror::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txcarriererror`] -module"] +#[doc = "TXCARRIERERROR (r) register accessor: MMC Number of aborted frames because of carrier sense error\n\nYou can [`read`](crate::Reg::read) this register and get [`txcarriererror::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txcarriererror`] module"] #[doc(alias = "TXCARRIERERROR")] pub type Txcarriererror = crate::Reg; #[doc = "MMC Number of aborted frames because of carrier sense error"] pub mod txcarriererror; -#[doc = "TXOCTETCOUNT_G (r) register accessor: MMC Number of bytes transmitted frames only in good frames\n\nYou can [`read`](crate::Reg::read) this register and get [`txoctetcount_g::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txoctetcount_g`] -module"] +#[doc = "TXOCTETCOUNT_G (r) register accessor: MMC Number of bytes transmitted frames only in good frames\n\nYou can [`read`](crate::Reg::read) this register and get [`txoctetcount_g::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txoctetcount_g`] module"] #[doc(alias = "TXOCTETCOUNT_G")] pub type TxoctetcountG = crate::Reg; #[doc = "MMC Number of bytes transmitted frames only in good frames"] pub mod txoctetcount_g; -#[doc = "TXFRAMECOUNT_G (r) register accessor: MMC Number of good frames transmitted\n\nYou can [`read`](crate::Reg::read) this register and get [`txframecount_g::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txframecount_g`] -module"] +#[doc = "TXFRAMECOUNT_G (r) register accessor: MMC Number of good frames transmitted\n\nYou can [`read`](crate::Reg::read) this register and get [`txframecount_g::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txframecount_g`] module"] #[doc(alias = "TXFRAMECOUNT_G")] pub type TxframecountG = crate::Reg; #[doc = "MMC Number of good frames transmitted"] pub mod txframecount_g; -#[doc = "TXEXCESSDEF (r) register accessor: MMC Number of frames aborted because of excessive deferral error\n\nYou can [`read`](crate::Reg::read) this register and get [`txexcessdef::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txexcessdef`] -module"] +#[doc = "TXEXCESSDEF (r) register accessor: MMC Number of frames aborted because of excessive deferral error\n\nYou can [`read`](crate::Reg::read) this register and get [`txexcessdef::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txexcessdef`] module"] #[doc(alias = "TXEXCESSDEF")] pub type Txexcessdef = crate::Reg; #[doc = "MMC Number of frames aborted because of excessive deferral error"] pub mod txexcessdef; -#[doc = "TXPAUSEFRAMES (r) register accessor: MMC Number of good pause frames transmitted\n\nYou can [`read`](crate::Reg::read) this register and get [`txpauseframes::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txpauseframes`] -module"] +#[doc = "TXPAUSEFRAMES (r) register accessor: MMC Number of good pause frames transmitted\n\nYou can [`read`](crate::Reg::read) this register and get [`txpauseframes::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txpauseframes`] module"] #[doc(alias = "TXPAUSEFRAMES")] pub type Txpauseframes = crate::Reg; #[doc = "MMC Number of good pause frames transmitted"] pub mod txpauseframes; -#[doc = "TXLANFRAMES_G (r) register accessor: MMC Number of good VLAN frames transmitted\n\nYou can [`read`](crate::Reg::read) this register and get [`txlanframes_g::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txlanframes_g`] -module"] +#[doc = "TXLANFRAMES_G (r) register accessor: MMC Number of good VLAN frames transmitted\n\nYou can [`read`](crate::Reg::read) this register and get [`txlanframes_g::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txlanframes_g`] module"] #[doc(alias = "TXLANFRAMES_G")] pub type TxlanframesG = crate::Reg; #[doc = "MMC Number of good VLAN frames transmitted"] pub mod txlanframes_g; -#[doc = "TXOVERSIZE_G (r) register accessor: MMC Number of frames transmitted without errors\n\nYou can [`read`](crate::Reg::read) this register and get [`txoversize_g::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txoversize_g`] -module"] +#[doc = "TXOVERSIZE_G (r) register accessor: MMC Number of frames transmitted without errors\n\nYou can [`read`](crate::Reg::read) this register and get [`txoversize_g::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txoversize_g`] module"] #[doc(alias = "TXOVERSIZE_G")] pub type TxoversizeG = crate::Reg; #[doc = "MMC Number of frames transmitted without errors"] pub mod txoversize_g; -#[doc = "RXFRAMECOUNT_GB (r) register accessor: MMC Number of good and bad frames received\n\nYou can [`read`](crate::Reg::read) this register and get [`rxframecount_gb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxframecount_gb`] -module"] +#[doc = "RXFRAMECOUNT_GB (r) register accessor: MMC Number of good and bad frames received\n\nYou can [`read`](crate::Reg::read) this register and get [`rxframecount_gb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxframecount_gb`] module"] #[doc(alias = "RXFRAMECOUNT_GB")] pub type RxframecountGb = crate::Reg; #[doc = "MMC Number of good and bad frames received"] pub mod rxframecount_gb; -#[doc = "RXOCTETCOUNT_GB (r) register accessor: MMC Number of bytes received in good and bad frames\n\nYou can [`read`](crate::Reg::read) this register and get [`rxoctetcount_gb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxoctetcount_gb`] -module"] +#[doc = "RXOCTETCOUNT_GB (r) register accessor: MMC Number of bytes received in good and bad frames\n\nYou can [`read`](crate::Reg::read) this register and get [`rxoctetcount_gb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxoctetcount_gb`] module"] #[doc(alias = "RXOCTETCOUNT_GB")] pub type RxoctetcountGb = crate::Reg; #[doc = "MMC Number of bytes received in good and bad frames"] pub mod rxoctetcount_gb; -#[doc = "RXOCTETCOUNT_G (r) register accessor: MMC Number of bytes received in good frames only\n\nYou can [`read`](crate::Reg::read) this register and get [`rxoctetcount_g::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxoctetcount_g`] -module"] +#[doc = "RXOCTETCOUNT_G (r) register accessor: MMC Number of bytes received in good frames only\n\nYou can [`read`](crate::Reg::read) this register and get [`rxoctetcount_g::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxoctetcount_g`] module"] #[doc(alias = "RXOCTETCOUNT_G")] pub type RxoctetcountG = crate::Reg; #[doc = "MMC Number of bytes received in good frames only"] pub mod rxoctetcount_g; -#[doc = "RXBCASTFRAMES_G (r) register accessor: MMC Number of good broadcast frames received\n\nYou can [`read`](crate::Reg::read) this register and get [`rxbcastframes_g::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxbcastframes_g`] -module"] +#[doc = "RXBCASTFRAMES_G (r) register accessor: MMC Number of good broadcast frames received\n\nYou can [`read`](crate::Reg::read) this register and get [`rxbcastframes_g::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxbcastframes_g`] module"] #[doc(alias = "RXBCASTFRAMES_G")] pub type RxbcastframesG = crate::Reg; #[doc = "MMC Number of good broadcast frames received"] pub mod rxbcastframes_g; -#[doc = "RXMCASTFRAMES_G (r) register accessor: MMC Number of good multicast frames received\n\nYou can [`read`](crate::Reg::read) this register and get [`rxmcastframes_g::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxmcastframes_g`] -module"] +#[doc = "RXMCASTFRAMES_G (r) register accessor: MMC Number of good multicast frames received\n\nYou can [`read`](crate::Reg::read) this register and get [`rxmcastframes_g::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxmcastframes_g`] module"] #[doc(alias = "RXMCASTFRAMES_G")] pub type RxmcastframesG = crate::Reg; #[doc = "MMC Number of good multicast frames received"] pub mod rxmcastframes_g; -#[doc = "RXCRCERROR (r) register accessor: MMC Number of frames received with CRC error\n\nYou can [`read`](crate::Reg::read) this register and get [`rxcrcerror::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxcrcerror`] -module"] +#[doc = "RXCRCERROR (r) register accessor: MMC Number of frames received with CRC error\n\nYou can [`read`](crate::Reg::read) this register and get [`rxcrcerror::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxcrcerror`] module"] #[doc(alias = "RXCRCERROR")] pub type Rxcrcerror = crate::Reg; #[doc = "MMC Number of frames received with CRC error"] pub mod rxcrcerror; -#[doc = "RXALIGNERROR (r) register accessor: MMC Number of frames received with alignment error\n\nYou can [`read`](crate::Reg::read) this register and get [`rxalignerror::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxalignerror`] -module"] +#[doc = "RXALIGNERROR (r) register accessor: MMC Number of frames received with alignment error\n\nYou can [`read`](crate::Reg::read) this register and get [`rxalignerror::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxalignerror`] module"] #[doc(alias = "RXALIGNERROR")] pub type Rxalignerror = crate::Reg; #[doc = "MMC Number of frames received with alignment error"] pub mod rxalignerror; -#[doc = "RXRUNTERROR (r) register accessor: MMC Number of frames received with runt error\n\nYou can [`read`](crate::Reg::read) this register and get [`rxrunterror::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxrunterror`] -module"] +#[doc = "RXRUNTERROR (r) register accessor: MMC Number of frames received with runt error\n\nYou can [`read`](crate::Reg::read) this register and get [`rxrunterror::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxrunterror`] module"] #[doc(alias = "RXRUNTERROR")] pub type Rxrunterror = crate::Reg; #[doc = "MMC Number of frames received with runt error"] pub mod rxrunterror; -#[doc = "RXJABBERERROR (r) register accessor: MMC Number of giant frames received with length greater than 1518 bytes and with CRC error\n\nYou can [`read`](crate::Reg::read) this register and get [`rxjabbererror::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxjabbererror`] -module"] +#[doc = "RXJABBERERROR (r) register accessor: MMC Number of giant frames received with length greater than 1518 bytes and with CRC error\n\nYou can [`read`](crate::Reg::read) this register and get [`rxjabbererror::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxjabbererror`] module"] #[doc(alias = "RXJABBERERROR")] pub type Rxjabbererror = crate::Reg; #[doc = "MMC Number of giant frames received with length greater than 1518 bytes and with CRC error"] pub mod rxjabbererror; -#[doc = "RXUNDERSIZE_G (r) register accessor: MMC Number of frames received with length less than 64 bytes\n\nYou can [`read`](crate::Reg::read) this register and get [`rxundersize_g::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxundersize_g`] -module"] +#[doc = "RXUNDERSIZE_G (r) register accessor: MMC Number of frames received with length less than 64 bytes\n\nYou can [`read`](crate::Reg::read) this register and get [`rxundersize_g::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxundersize_g`] module"] #[doc(alias = "RXUNDERSIZE_G")] pub type RxundersizeG = crate::Reg; #[doc = "MMC Number of frames received with length less than 64 bytes"] pub mod rxundersize_g; -#[doc = "RXOVERSIZE_G (r) register accessor: MMC Number of frames received without errors with length greater than the max size\n\nYou can [`read`](crate::Reg::read) this register and get [`rxoversize_g::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxoversize_g`] -module"] +#[doc = "RXOVERSIZE_G (r) register accessor: MMC Number of frames received without errors with length greater than the max size\n\nYou can [`read`](crate::Reg::read) this register and get [`rxoversize_g::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxoversize_g`] module"] #[doc(alias = "RXOVERSIZE_G")] pub type RxoversizeG = crate::Reg; #[doc = "MMC Number of frames received without errors with length greater than the max size"] pub mod rxoversize_g; -#[doc = "RX64OCTETS_GB (r) register accessor: MMC Number of good and bad frames received with length 64 bytes\n\nYou can [`read`](crate::Reg::read) this register and get [`rx64octets_gb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx64octets_gb`] -module"] +#[doc = "RX64OCTETS_GB (r) register accessor: MMC Number of good and bad frames received with length 64 bytes\n\nYou can [`read`](crate::Reg::read) this register and get [`rx64octets_gb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx64octets_gb`] module"] #[doc(alias = "RX64OCTETS_GB")] pub type Rx64octetsGb = crate::Reg; #[doc = "MMC Number of good and bad frames received with length 64 bytes"] pub mod rx64octets_gb; -#[doc = "RX65TO127OCT_GB (r) register accessor: MMC Number of good and bad frames received with length between 65 and 127 bytes\n\nYou can [`read`](crate::Reg::read) this register and get [`rx65to127oct_gb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx65to127oct_gb`] -module"] +#[doc = "RX65TO127OCT_GB (r) register accessor: MMC Number of good and bad frames received with length between 65 and 127 bytes\n\nYou can [`read`](crate::Reg::read) this register and get [`rx65to127oct_gb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx65to127oct_gb`] module"] #[doc(alias = "RX65TO127OCT_GB")] pub type Rx65to127octGb = crate::Reg; #[doc = "MMC Number of good and bad frames received with length between 65 and 127 bytes"] pub mod rx65to127oct_gb; -#[doc = "RX128TO255OCT_GB (r) register accessor: MMC Number of good and bad frames received with length between 128 and 255 bytes\n\nYou can [`read`](crate::Reg::read) this register and get [`rx128to255oct_gb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx128to255oct_gb`] -module"] +#[doc = "RX128TO255OCT_GB (r) register accessor: MMC Number of good and bad frames received with length between 128 and 255 bytes\n\nYou can [`read`](crate::Reg::read) this register and get [`rx128to255oct_gb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx128to255oct_gb`] module"] #[doc(alias = "RX128TO255OCT_GB")] pub type Rx128to255octGb = crate::Reg; #[doc = "MMC Number of good and bad frames received with length between 128 and 255 bytes"] pub mod rx128to255oct_gb; -#[doc = "RX256TO511OCT_GB (r) register accessor: MMC Number of good and bad frames received with length between 256 and 511 bytes\n\nYou can [`read`](crate::Reg::read) this register and get [`rx256to511oct_gb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx256to511oct_gb`] -module"] +#[doc = "RX256TO511OCT_GB (r) register accessor: MMC Number of good and bad frames received with length between 256 and 511 bytes\n\nYou can [`read`](crate::Reg::read) this register and get [`rx256to511oct_gb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx256to511oct_gb`] module"] #[doc(alias = "RX256TO511OCT_GB")] pub type Rx256to511octGb = crate::Reg; #[doc = "MMC Number of good and bad frames received with length between 256 and 511 bytes"] pub mod rx256to511oct_gb; -#[doc = "RX512TO1023OCT_GB (r) register accessor: MMC Number of good and bad frames received with length between 512 and 1023 bytes\n\nYou can [`read`](crate::Reg::read) this register and get [`rx512to1023oct_gb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx512to1023oct_gb`] -module"] +#[doc = "RX512TO1023OCT_GB (r) register accessor: MMC Number of good and bad frames received with length between 512 and 1023 bytes\n\nYou can [`read`](crate::Reg::read) this register and get [`rx512to1023oct_gb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx512to1023oct_gb`] module"] #[doc(alias = "RX512TO1023OCT_GB")] pub type Rx512to1023octGb = crate::Reg; #[doc = "MMC Number of good and bad frames received with length between 512 and 1023 bytes"] pub mod rx512to1023oct_gb; -#[doc = "RX1024MAXOCT_GB (r) register accessor: MMC Number of good and bad frames received with length between 1024 and max size bytes\n\nYou can [`read`](crate::Reg::read) this register and get [`rx1024maxoct_gb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx1024maxoct_gb`] -module"] +#[doc = "RX1024MAXOCT_GB (r) register accessor: MMC Number of good and bad frames received with length between 1024 and max size bytes\n\nYou can [`read`](crate::Reg::read) this register and get [`rx1024maxoct_gb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx1024maxoct_gb`] module"] #[doc(alias = "RX1024MAXOCT_GB")] pub type Rx1024maxoctGb = crate::Reg; #[doc = "MMC Number of good and bad frames received with length between 1024 and max size bytes"] pub mod rx1024maxoct_gb; -#[doc = "RXUCASTFRAMES_G (r) register accessor: MMC Number of received good unicast frames\n\nYou can [`read`](crate::Reg::read) this register and get [`rxucastframes_g::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxucastframes_g`] -module"] +#[doc = "RXUCASTFRAMES_G (r) register accessor: MMC Number of received good unicast frames\n\nYou can [`read`](crate::Reg::read) this register and get [`rxucastframes_g::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxucastframes_g`] module"] #[doc(alias = "RXUCASTFRAMES_G")] pub type RxucastframesG = crate::Reg; #[doc = "MMC Number of received good unicast frames"] pub mod rxucastframes_g; -#[doc = "RXLENGTHERROR (r) register accessor: MMC Number of frames received with length error\n\nYou can [`read`](crate::Reg::read) this register and get [`rxlengtherror::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxlengtherror`] -module"] +#[doc = "RXLENGTHERROR (r) register accessor: MMC Number of frames received with length error\n\nYou can [`read`](crate::Reg::read) this register and get [`rxlengtherror::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxlengtherror`] module"] #[doc(alias = "RXLENGTHERROR")] pub type Rxlengtherror = crate::Reg; #[doc = "MMC Number of frames received with length error"] pub mod rxlengtherror; -#[doc = "RXOUTRANGETYPE (r) register accessor: MMC Number of frames received with length field not equal to the valid frame size\n\nYou can [`read`](crate::Reg::read) this register and get [`rxoutrangetype::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxoutrangetype`] -module"] +#[doc = "RXOUTRANGETYPE (r) register accessor: MMC Number of frames received with length field not equal to the valid frame size\n\nYou can [`read`](crate::Reg::read) this register and get [`rxoutrangetype::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxoutrangetype`] module"] #[doc(alias = "RXOUTRANGETYPE")] pub type Rxoutrangetype = crate::Reg; #[doc = "MMC Number of frames received with length field not equal to the valid frame size"] pub mod rxoutrangetype; -#[doc = "RXPAUSEFRAMES (r) register accessor: MMC Number of good and valid Pause frames received\n\nYou can [`read`](crate::Reg::read) this register and get [`rxpauseframes::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxpauseframes`] -module"] +#[doc = "RXPAUSEFRAMES (r) register accessor: MMC Number of good and valid Pause frames received\n\nYou can [`read`](crate::Reg::read) this register and get [`rxpauseframes::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxpauseframes`] module"] #[doc(alias = "RXPAUSEFRAMES")] pub type Rxpauseframes = crate::Reg; #[doc = "MMC Number of good and valid Pause frames received"] pub mod rxpauseframes; -#[doc = "RXFIFOOVERFLOW (r) register accessor: MMC Number of missed received frames because of FIFO overflow\n\nYou can [`read`](crate::Reg::read) this register and get [`rxfifooverflow::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxfifooverflow`] -module"] +#[doc = "RXFIFOOVERFLOW (r) register accessor: MMC Number of missed received frames because of FIFO overflow\n\nYou can [`read`](crate::Reg::read) this register and get [`rxfifooverflow::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxfifooverflow`] module"] #[doc(alias = "RXFIFOOVERFLOW")] pub type Rxfifooverflow = crate::Reg; #[doc = "MMC Number of missed received frames because of FIFO overflow"] pub mod rxfifooverflow; -#[doc = "RXVLANFRAMES_GB (r) register accessor: MMC Number of good and bad VLAN frames received\n\nYou can [`read`](crate::Reg::read) this register and get [`rxvlanframes_gb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxvlanframes_gb`] -module"] +#[doc = "RXVLANFRAMES_GB (r) register accessor: MMC Number of good and bad VLAN frames received\n\nYou can [`read`](crate::Reg::read) this register and get [`rxvlanframes_gb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxvlanframes_gb`] module"] #[doc(alias = "RXVLANFRAMES_GB")] pub type RxvlanframesGb = crate::Reg; #[doc = "MMC Number of good and bad VLAN frames received"] pub mod rxvlanframes_gb; -#[doc = "RXWDOGERROR (r) register accessor: MMC Number of frames received with error because of watchdog timeout error\n\nYou can [`read`](crate::Reg::read) this register and get [`rxwdogerror::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxwdogerror`] -module"] +#[doc = "RXWDOGERROR (r) register accessor: MMC Number of frames received with error because of watchdog timeout error\n\nYou can [`read`](crate::Reg::read) this register and get [`rxwdogerror::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxwdogerror`] module"] #[doc(alias = "RXWDOGERROR")] pub type Rxwdogerror = crate::Reg; #[doc = "MMC Number of frames received with error because of watchdog timeout error"] pub mod rxwdogerror; -#[doc = "RXRCVERROR (r) register accessor: MMC Number of frames received with Receive error or Frame Extension error\n\nYou can [`read`](crate::Reg::read) this register and get [`rxrcverror::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxrcverror`] -module"] +#[doc = "RXRCVERROR (r) register accessor: MMC Number of frames received with Receive error or Frame Extension error\n\nYou can [`read`](crate::Reg::read) this register and get [`rxrcverror::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxrcverror`] module"] #[doc(alias = "RXRCVERROR")] pub type Rxrcverror = crate::Reg; #[doc = "MMC Number of frames received with Receive error or Frame Extension error"] pub mod rxrcverror; -#[doc = "RXCTRLFRAMES_G (r) register accessor: MMC Number of received good control frames\n\nYou can [`read`](crate::Reg::read) this register and get [`rxctrlframes_g::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxctrlframes_g`] -module"] +#[doc = "RXCTRLFRAMES_G (r) register accessor: MMC Number of received good control frames\n\nYou can [`read`](crate::Reg::read) this register and get [`rxctrlframes_g::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxctrlframes_g`] module"] #[doc(alias = "RXCTRLFRAMES_G")] pub type RxctrlframesG = crate::Reg; #[doc = "MMC Number of received good control frames"] pub mod rxctrlframes_g; -#[doc = "VLAN_INCREPLACE (rw) register accessor: Holds the VLAN Tag for insertion into or replacement in the transmit frames\n\nYou can [`read`](crate::Reg::read) this register and get [`vlan_increplace::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`vlan_increplace::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@vlan_increplace`] -module"] +#[doc = "VLAN_INCREPLACE (rw) register accessor: Holds the VLAN Tag for insertion into or replacement in the transmit frames\n\nYou can [`read`](crate::Reg::read) this register and get [`vlan_increplace::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`vlan_increplace::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@vlan_increplace`] module"] #[doc(alias = "VLAN_INCREPLACE")] pub type VlanIncreplace = crate::Reg; #[doc = "Holds the VLAN Tag for insertion into or replacement in the transmit frames"] pub mod vlan_increplace; -#[doc = "VLAN_HASHTABLE (rw) register accessor: Holds the VLAN Hash Table\n\nYou can [`read`](crate::Reg::read) this register and get [`vlan_hashtable::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`vlan_hashtable::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@vlan_hashtable`] -module"] +#[doc = "VLAN_HASHTABLE (rw) register accessor: Holds the VLAN Hash Table\n\nYou can [`read`](crate::Reg::read) this register and get [`vlan_hashtable::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`vlan_hashtable::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@vlan_hashtable`] module"] #[doc(alias = "VLAN_HASHTABLE")] pub type VlanHashtable = crate::Reg; #[doc = "Holds the VLAN Hash Table"] pub mod vlan_hashtable; -#[doc = "TIMESTAMP_CTRL (rw) register accessor: Controls the IEEE 1588 timestamp generation and update logic\n\nYou can [`read`](crate::Reg::read) this register and get [`timestamp_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timestamp_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timestamp_ctrl`] -module"] +#[doc = "TIMESTAMP_CTRL (rw) register accessor: Controls the IEEE 1588 timestamp generation and update logic\n\nYou can [`read`](crate::Reg::read) this register and get [`timestamp_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timestamp_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timestamp_ctrl`] module"] #[doc(alias = "TIMESTAMP_CTRL")] pub type TimestampCtrl = crate::Reg; #[doc = "Controls the IEEE 1588 timestamp generation and update logic"] pub mod timestamp_ctrl; -#[doc = "SUBSEC_INC (rw) register accessor: Holds the 8-bit value by which the Sub-Second register is incremented\n\nYou can [`read`](crate::Reg::read) this register and get [`subsec_inc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`subsec_inc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@subsec_inc`] -module"] +#[doc = "SUBSEC_INC (rw) register accessor: Holds the 8-bit value by which the Sub-Second register is incremented\n\nYou can [`read`](crate::Reg::read) this register and get [`subsec_inc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`subsec_inc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@subsec_inc`] module"] #[doc(alias = "SUBSEC_INC")] pub type SubsecInc = crate::Reg; #[doc = "Holds the 8-bit value by which the Sub-Second register is incremented"] pub mod subsec_inc; -#[doc = "SYSTIME_SECONDS (r) register accessor: Holds the lower 32 bits of the second field of the system time\n\nYou can [`read`](crate::Reg::read) this register and get [`systime_seconds::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@systime_seconds`] -module"] +#[doc = "SYSTIME_SECONDS (r) register accessor: Holds the lower 32 bits of the second field of the system time\n\nYou can [`read`](crate::Reg::read) this register and get [`systime_seconds::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@systime_seconds`] module"] #[doc(alias = "SYSTIME_SECONDS")] pub type SystimeSeconds = crate::Reg; #[doc = "Holds the lower 32 bits of the second field of the system time"] pub mod systime_seconds; -#[doc = "SYSTIME_NANOSEC (r) register accessor: Holds 32 bits of the nano-second field of the system time\n\nYou can [`read`](crate::Reg::read) this register and get [`systime_nanosec::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@systime_nanosec`] -module"] +#[doc = "SYSTIME_NANOSEC (r) register accessor: Holds 32 bits of the nano-second field of the system time\n\nYou can [`read`](crate::Reg::read) this register and get [`systime_nanosec::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@systime_nanosec`] module"] #[doc(alias = "SYSTIME_NANOSEC")] pub type SystimeNanosec = crate::Reg; #[doc = "Holds 32 bits of the nano-second field of the system time"] pub mod systime_nanosec; -#[doc = "SYSTIME_SECSUPDAT (rw) register accessor: Holds the lower 32 bits of the second field to be written to, added to, or subtracted from the system time value\n\nYou can [`read`](crate::Reg::read) this register and get [`systime_secsupdat::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`systime_secsupdat::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@systime_secsupdat`] -module"] +#[doc = "SYSTIME_SECSUPDAT (rw) register accessor: Holds the lower 32 bits of the second field to be written to, added to, or subtracted from the system time value\n\nYou can [`read`](crate::Reg::read) this register and get [`systime_secsupdat::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`systime_secsupdat::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@systime_secsupdat`] module"] #[doc(alias = "SYSTIME_SECSUPDAT")] pub type SystimeSecsupdat = crate::Reg; #[doc = "Holds the lower 32 bits of the second field to be written to, added to, or subtracted from the system time value"] pub mod systime_secsupdat; -#[doc = "SYSTIME_NSECUP (rw) register accessor: Holds 32 bits of the nano-second field to be written to, added to, or subtracted from the system time value\n\nYou can [`read`](crate::Reg::read) this register and get [`systime_nsecup::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`systime_nsecup::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@systime_nsecup`] -module"] +#[doc = "SYSTIME_NSECUP (rw) register accessor: Holds 32 bits of the nano-second field to be written to, added to, or subtracted from the system time value\n\nYou can [`read`](crate::Reg::read) this register and get [`systime_nsecup::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`systime_nsecup::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@systime_nsecup`] module"] #[doc(alias = "SYSTIME_NSECUP")] pub type SystimeNsecup = crate::Reg; #[doc = "Holds 32 bits of the nano-second field to be written to, added to, or subtracted from the system time value"] pub mod systime_nsecup; -#[doc = "TIMESTAMPADDEND (rw) register accessor: This register is used by software to re-adjust the clock frequency linearly to match the Master clock frequency\n\nYou can [`read`](crate::Reg::read) this register and get [`timestampaddend::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timestampaddend::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timestampaddend`] -module"] +#[doc = "TIMESTAMPADDEND (rw) register accessor: This register is used by software to re-adjust the clock frequency linearly to match the Master clock frequency\n\nYou can [`read`](crate::Reg::read) this register and get [`timestampaddend::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timestampaddend::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timestampaddend`] module"] #[doc(alias = "TIMESTAMPADDEND")] pub type Timestampaddend = crate::Reg; #[doc = "This register is used by software to re-adjust the clock frequency linearly to match the Master clock frequency"] pub mod timestampaddend; -#[doc = "TARGET_TIME_SECS (rw) register accessor: Holds the high 32-bits of time to be compared with the system time\n\nYou can [`read`](crate::Reg::read) this register and get [`target_time_secs::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`target_time_secs::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@target_time_secs`] -module"] +#[doc = "TARGET_TIME_SECS (rw) register accessor: Holds the high 32-bits of time to be compared with the system time\n\nYou can [`read`](crate::Reg::read) this register and get [`target_time_secs::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`target_time_secs::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@target_time_secs`] module"] #[doc(alias = "TARGET_TIME_SECS")] pub type TargetTimeSecs = crate::Reg; #[doc = "Holds the high 32-bits of time to be compared with the system time"] pub mod target_time_secs; -#[doc = "TARGET_TIME_NSEC (rw) register accessor: Holds the lower 32-bits of time to be compared with the system time\n\nYou can [`read`](crate::Reg::read) this register and get [`target_time_nsec::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`target_time_nsec::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@target_time_nsec`] -module"] +#[doc = "TARGET_TIME_NSEC (rw) register accessor: Holds the lower 32-bits of time to be compared with the system time\n\nYou can [`read`](crate::Reg::read) this register and get [`target_time_nsec::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`target_time_nsec::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@target_time_nsec`] module"] #[doc(alias = "TARGET_TIME_NSEC")] pub type TargetTimeNsec = crate::Reg; #[doc = "Holds the lower 32-bits of time to be compared with the system time"] pub mod target_time_nsec; -#[doc = "DMA_BUS_MODE (rw) register accessor: Controls the DMA Host Interface Mode\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_bus_mode::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_bus_mode::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_bus_mode`] -module"] +#[doc = "DMA_BUS_MODE (rw) register accessor: Controls the DMA Host Interface Mode\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_bus_mode::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_bus_mode::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_bus_mode`] module"] #[doc(alias = "DMA_BUS_MODE")] pub type DmaBusMode = crate::Reg; #[doc = "Controls the DMA Host Interface Mode"] pub mod dma_bus_mode; -#[doc = "DMA_TX_POLL_DEMAND (rw) register accessor: Used by the host to instruct the DMA to poll the transmit Descriptor list\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_tx_poll_demand::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_tx_poll_demand::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_tx_poll_demand`] -module"] +#[doc = "DMA_TX_POLL_DEMAND (rw) register accessor: Used by the host to instruct the DMA to poll the transmit Descriptor list\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_tx_poll_demand::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_tx_poll_demand::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_tx_poll_demand`] module"] #[doc(alias = "DMA_TX_POLL_DEMAND")] pub type DmaTxPollDemand = crate::Reg; #[doc = "Used by the host to instruct the DMA to poll the transmit Descriptor list"] pub mod dma_tx_poll_demand; -#[doc = "DMA_RX_POLL_DEMAND (rw) register accessor: Used by the host to instruct the DMA to poll the Receive Descriptor list\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_rx_poll_demand::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_rx_poll_demand::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_rx_poll_demand`] -module"] +#[doc = "DMA_RX_POLL_DEMAND (rw) register accessor: Used by the host to instruct the DMA to poll the Receive Descriptor list\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_rx_poll_demand::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_rx_poll_demand::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_rx_poll_demand`] module"] #[doc(alias = "DMA_RX_POLL_DEMAND")] pub type DmaRxPollDemand = crate::Reg; #[doc = "Used by the host to instruct the DMA to poll the Receive Descriptor list"] pub mod dma_rx_poll_demand; -#[doc = "DMA_RX_DESC_LIST_ADDR (rw) register accessor: Points the DMA to the start of the Receive Descriptor list\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_rx_desc_list_addr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_rx_desc_list_addr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_rx_desc_list_addr`] -module"] +#[doc = "DMA_RX_DESC_LIST_ADDR (rw) register accessor: Points the DMA to the start of the Receive Descriptor list\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_rx_desc_list_addr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_rx_desc_list_addr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_rx_desc_list_addr`] module"] #[doc(alias = "DMA_RX_DESC_LIST_ADDR")] pub type DmaRxDescListAddr = crate::Reg; #[doc = "Points the DMA to the start of the Receive Descriptor list"] pub mod dma_rx_desc_list_addr; -#[doc = "DMA_TX_DESC_LIST_ADDR (rw) register accessor: Points the DMA to the start of the Transmit Descriptor list\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_tx_desc_list_addr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_tx_desc_list_addr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_tx_desc_list_addr`] -module"] +#[doc = "DMA_TX_DESC_LIST_ADDR (rw) register accessor: Points the DMA to the start of the Transmit Descriptor list\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_tx_desc_list_addr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_tx_desc_list_addr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_tx_desc_list_addr`] module"] #[doc(alias = "DMA_TX_DESC_LIST_ADDR")] pub type DmaTxDescListAddr = crate::Reg; #[doc = "Points the DMA to the start of the Transmit Descriptor list"] pub mod dma_tx_desc_list_addr; -#[doc = "DMA_STATUS (r) register accessor: Used to determine the status of the DMA\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_status`] -module"] +#[doc = "DMA_STATUS (r) register accessor: Used to determine the status of the DMA\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_status`] module"] #[doc(alias = "DMA_STATUS")] pub type DmaStatus = crate::Reg; #[doc = "Used to determine the status of the DMA"] pub mod dma_status; -#[doc = "DMA_OPER_MODE (rw) register accessor: Sets the Receive and Transmit operation mode and command\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_oper_mode::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_oper_mode::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_oper_mode`] -module"] +#[doc = "DMA_OPER_MODE (rw) register accessor: Sets the Receive and Transmit operation mode and command\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_oper_mode::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_oper_mode::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_oper_mode`] module"] #[doc(alias = "DMA_OPER_MODE")] pub type DmaOperMode = crate::Reg; #[doc = "Sets the Receive and Transmit operation mode and command"] pub mod dma_oper_mode; -#[doc = "DMA_INTR_EN (rw) register accessor: Enables the interrupts reported in the status register\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_intr_en::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_intr_en::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_intr_en`] -module"] +#[doc = "DMA_INTR_EN (rw) register accessor: Enables the interrupts reported in the status register\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_intr_en::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_intr_en::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_intr_en`] module"] #[doc(alias = "DMA_INTR_EN")] pub type DmaIntrEn = crate::Reg; #[doc = "Enables the interrupts reported in the status register"] pub mod dma_intr_en; -#[doc = "DMA_MISS_OVER_COUNTER (rw) register accessor: Contains the counters for discarded frames because no Receive Descriptor is available\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_miss_over_counter::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_miss_over_counter::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_miss_over_counter`] -module"] +#[doc = "DMA_MISS_OVER_COUNTER (rw) register accessor: Contains the counters for discarded frames because no Receive Descriptor is available\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_miss_over_counter::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_miss_over_counter::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_miss_over_counter`] module"] #[doc(alias = "DMA_MISS_OVER_COUNTER")] pub type DmaMissOverCounter = crate::Reg; #[doc = "Contains the counters for discarded frames because no Receive Descriptor is available"] pub mod dma_miss_over_counter; -#[doc = "DMA_RX_INTR_WDOG_TIMER (rw) register accessor: Watchdog timeout for Receive Interrupt from DMA\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_rx_intr_wdog_timer::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_rx_intr_wdog_timer::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_rx_intr_wdog_timer`] -module"] +#[doc = "DMA_RX_INTR_WDOG_TIMER (rw) register accessor: Watchdog timeout for Receive Interrupt from DMA\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_rx_intr_wdog_timer::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_rx_intr_wdog_timer::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_rx_intr_wdog_timer`] module"] #[doc(alias = "DMA_RX_INTR_WDOG_TIMER")] pub type DmaRxIntrWdogTimer = crate::Reg; #[doc = "Watchdog timeout for Receive Interrupt from DMA"] pub mod dma_rx_intr_wdog_timer; -#[doc = "DMA_AHB_STATUS (rw) register accessor: Provides the active status of the read and write channels of the AHB master interface\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_ahb_status::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_ahb_status::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_ahb_status`] -module"] +#[doc = "DMA_AHB_STATUS (rw) register accessor: Provides the active status of the read and write channels of the AHB master interface\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_ahb_status::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_ahb_status::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_ahb_status`] module"] #[doc(alias = "DMA_AHB_STATUS")] pub type DmaAhbStatus = crate::Reg; #[doc = "Provides the active status of the read and write channels of the AHB master interface"] pub mod dma_ahb_status; -#[doc = "DMA_CURR_TX_DESC (rw) register accessor: Contains the start address of the current Transmit Descriptor read by the DMA\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_curr_tx_desc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_curr_tx_desc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_curr_tx_desc`] -module"] +#[doc = "DMA_CURR_TX_DESC (rw) register accessor: Contains the start address of the current Transmit Descriptor read by the DMA\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_curr_tx_desc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_curr_tx_desc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_curr_tx_desc`] module"] #[doc(alias = "DMA_CURR_TX_DESC")] pub type DmaCurrTxDesc = crate::Reg; #[doc = "Contains the start address of the current Transmit Descriptor read by the DMA"] pub mod dma_curr_tx_desc; -#[doc = "DMA_CURR_RX_DESC (rw) register accessor: Contains the start address of the current Receive Descriptor read by the DMA\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_curr_rx_desc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_curr_rx_desc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_curr_rx_desc`] -module"] +#[doc = "DMA_CURR_RX_DESC (rw) register accessor: Contains the start address of the current Receive Descriptor read by the DMA\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_curr_rx_desc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_curr_rx_desc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_curr_rx_desc`] module"] #[doc(alias = "DMA_CURR_RX_DESC")] pub type DmaCurrRxDesc = crate::Reg; #[doc = "Contains the start address of the current Receive Descriptor read by the DMA"] pub mod dma_curr_rx_desc; -#[doc = "DMA_CURR_TX_BUFR_ADDR (rw) register accessor: Contains the start address of the current Receive Descriptor read by the DMA\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_curr_tx_bufr_addr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_curr_tx_bufr_addr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_curr_tx_bufr_addr`] -module"] +#[doc = "DMA_CURR_TX_BUFR_ADDR (rw) register accessor: Contains the start address of the current Receive Descriptor read by the DMA\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_curr_tx_bufr_addr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_curr_tx_bufr_addr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_curr_tx_bufr_addr`] module"] #[doc(alias = "DMA_CURR_TX_BUFR_ADDR")] pub type DmaCurrTxBufrAddr = crate::Reg; #[doc = "Contains the start address of the current Receive Descriptor read by the DMA"] pub mod dma_curr_tx_bufr_addr; -#[doc = "DMA_CURR_RX_BUFR_ADDR (rw) register accessor: Contains the current Receive Buffer address read by the DMA\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_curr_rx_bufr_addr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_curr_rx_bufr_addr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_curr_rx_bufr_addr`] -module"] +#[doc = "DMA_CURR_RX_BUFR_ADDR (rw) register accessor: Contains the current Receive Buffer address read by the DMA\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_curr_rx_bufr_addr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_curr_rx_bufr_addr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_curr_rx_bufr_addr`] module"] #[doc(alias = "DMA_CURR_RX_BUFR_ADDR")] pub type DmaCurrRxBufrAddr = crate::Reg; #[doc = "Contains the current Receive Buffer address read by the DMA"] diff --git a/va416xx/src/eth/dma_ahb_status.rs b/va416xx/src/eth/dma_ahb_status.rs index e424b06..bfd68b8 100644 --- a/va416xx/src/eth/dma_ahb_status.rs +++ b/va416xx/src/eth/dma_ahb_status.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bit 0 - When high, indicates that the AHB master interface FSMs are in the non-idle state"] #[inline(always)] - pub fn ahbmastrsts(&mut self) -> AhbmastrstsW { + pub fn ahbmastrsts(&mut self) -> AhbmastrstsW<'_, DmaAhbStatusSpec> { AhbmastrstsW::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for DmaAhbStatusSpec {} #[doc = "`write(|w| ..)` method takes [`dma_ahb_status::W`](W) writer structure"] impl crate::Writable for DmaAhbStatusSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DMA_AHB_STATUS to value 0"] -impl crate::Resettable for DmaAhbStatusSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for DmaAhbStatusSpec {} diff --git a/va416xx/src/eth/dma_bus_mode.rs b/va416xx/src/eth/dma_bus_mode.rs index 4470705..9442255 100644 --- a/va416xx/src/eth/dma_bus_mode.rs +++ b/va416xx/src/eth/dma_bus_mode.rs @@ -133,72 +133,72 @@ impl R { impl W { #[doc = "Bit 0 - Software Reset (Read, Write Set, and Self Clear)"] #[inline(always)] - pub fn swr(&mut self) -> SwrW { + pub fn swr(&mut self) -> SwrW<'_, DmaBusModeSpec> { SwrW::new(self, 0) } #[doc = "Bit 1 - DMA Arbitration Scheme"] #[inline(always)] - pub fn da(&mut self) -> DaW { + pub fn da(&mut self) -> DaW<'_, DmaBusModeSpec> { DaW::new(self, 1) } #[doc = "Bits 2:6 - Descriptor Skip Length"] #[inline(always)] - pub fn dsl(&mut self) -> DslW { + pub fn dsl(&mut self) -> DslW<'_, DmaBusModeSpec> { DslW::new(self, 2) } #[doc = "Bits 8:13 - Programmable Burst Lengthe"] #[inline(always)] - pub fn pbl(&mut self) -> PblW { + pub fn pbl(&mut self) -> PblW<'_, DmaBusModeSpec> { PblW::new(self, 8) } #[doc = "Bits 14:15 - Priority Ratio"] #[inline(always)] - pub fn pr(&mut self) -> PrW { + pub fn pr(&mut self) -> PrW<'_, DmaBusModeSpec> { PrW::new(self, 14) } #[doc = "Bit 16 - Fixed Burste"] #[inline(always)] - pub fn fb(&mut self) -> FbW { + pub fn fb(&mut self) -> FbW<'_, DmaBusModeSpec> { FbW::new(self, 16) } #[doc = "Bits 17:22 - Rx DMA PBL"] #[inline(always)] - pub fn rpbl(&mut self) -> RpblW { + pub fn rpbl(&mut self) -> RpblW<'_, DmaBusModeSpec> { RpblW::new(self, 17) } #[doc = "Bit 23 - Use Separate PBL"] #[inline(always)] - pub fn usp(&mut self) -> UspW { + pub fn usp(&mut self) -> UspW<'_, DmaBusModeSpec> { UspW::new(self, 23) } #[doc = "Bit 24 - PBLx8 Mode"] #[inline(always)] - pub fn pblx8(&mut self) -> Pblx8W { + pub fn pblx8(&mut self) -> Pblx8W<'_, DmaBusModeSpec> { Pblx8W::new(self, 24) } #[doc = "Bit 25 - Address-Aligned Beats"] #[inline(always)] - pub fn aal(&mut self) -> AalW { + pub fn aal(&mut self) -> AalW<'_, DmaBusModeSpec> { AalW::new(self, 25) } #[doc = "Bit 26 - Mixed Burst"] #[inline(always)] - pub fn mb(&mut self) -> MbW { + pub fn mb(&mut self) -> MbW<'_, DmaBusModeSpec> { MbW::new(self, 26) } #[doc = "Bit 27 - Transmit Priority"] #[inline(always)] - pub fn txpr(&mut self) -> TxprW { + pub fn txpr(&mut self) -> TxprW<'_, DmaBusModeSpec> { TxprW::new(self, 27) } #[doc = "Bits 28:29 - Channel Priority Weights"] #[inline(always)] - pub fn prwg(&mut self) -> PrwgW { + pub fn prwg(&mut self) -> PrwgW<'_, DmaBusModeSpec> { PrwgW::new(self, 28) } #[doc = "Bit 31 - Rebuild INCRx Burst"] #[inline(always)] - pub fn rib(&mut self) -> RibW { + pub fn rib(&mut self) -> RibW<'_, DmaBusModeSpec> { RibW::new(self, 31) } } @@ -212,8 +212,6 @@ impl crate::Readable for DmaBusModeSpec {} #[doc = "`write(|w| ..)` method takes [`dma_bus_mode::W`](W) writer structure"] impl crate::Writable for DmaBusModeSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DMA_BUS_MODE to value 0x0002_0101"] impl crate::Resettable for DmaBusModeSpec { diff --git a/va416xx/src/eth/dma_curr_rx_bufr_addr.rs b/va416xx/src/eth/dma_curr_rx_bufr_addr.rs index d4ac52f..4407c02 100644 --- a/va416xx/src/eth/dma_curr_rx_bufr_addr.rs +++ b/va416xx/src/eth/dma_curr_rx_bufr_addr.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:31 - Cleared on Reset. Pointer updated by the DMA during operation."] #[inline(always)] - pub fn curtbufaptr(&mut self) -> CurtbufaptrW { + pub fn curtbufaptr(&mut self) -> CurtbufaptrW<'_, DmaCurrRxBufrAddrSpec> { CurtbufaptrW::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for DmaCurrRxBufrAddrSpec {} #[doc = "`write(|w| ..)` method takes [`dma_curr_rx_bufr_addr::W`](W) writer structure"] impl crate::Writable for DmaCurrRxBufrAddrSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DMA_CURR_RX_BUFR_ADDR to value 0"] -impl crate::Resettable for DmaCurrRxBufrAddrSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for DmaCurrRxBufrAddrSpec {} diff --git a/va416xx/src/eth/dma_curr_rx_desc.rs b/va416xx/src/eth/dma_curr_rx_desc.rs index 1e3106b..07e63a9 100644 --- a/va416xx/src/eth/dma_curr_rx_desc.rs +++ b/va416xx/src/eth/dma_curr_rx_desc.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:31 - Cleared on Reset. Pointer updated by the DMA during operation."] #[inline(always)] - pub fn currdesaptr(&mut self) -> CurrdesaptrW { + pub fn currdesaptr(&mut self) -> CurrdesaptrW<'_, DmaCurrRxDescSpec> { CurrdesaptrW::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for DmaCurrRxDescSpec {} #[doc = "`write(|w| ..)` method takes [`dma_curr_rx_desc::W`](W) writer structure"] impl crate::Writable for DmaCurrRxDescSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DMA_CURR_RX_DESC to value 0"] -impl crate::Resettable for DmaCurrRxDescSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for DmaCurrRxDescSpec {} diff --git a/va416xx/src/eth/dma_curr_tx_bufr_addr.rs b/va416xx/src/eth/dma_curr_tx_bufr_addr.rs index c4dbbb9..3ca5bdf 100644 --- a/va416xx/src/eth/dma_curr_tx_bufr_addr.rs +++ b/va416xx/src/eth/dma_curr_tx_bufr_addr.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:31 - Cleared on Reset. Pointer updated by the DMA during operation."] #[inline(always)] - pub fn curtbufaptr(&mut self) -> CurtbufaptrW { + pub fn curtbufaptr(&mut self) -> CurtbufaptrW<'_, DmaCurrTxBufrAddrSpec> { CurtbufaptrW::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for DmaCurrTxBufrAddrSpec {} #[doc = "`write(|w| ..)` method takes [`dma_curr_tx_bufr_addr::W`](W) writer structure"] impl crate::Writable for DmaCurrTxBufrAddrSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DMA_CURR_TX_BUFR_ADDR to value 0"] -impl crate::Resettable for DmaCurrTxBufrAddrSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for DmaCurrTxBufrAddrSpec {} diff --git a/va416xx/src/eth/dma_curr_tx_desc.rs b/va416xx/src/eth/dma_curr_tx_desc.rs index 570116f..2f24a16 100644 --- a/va416xx/src/eth/dma_curr_tx_desc.rs +++ b/va416xx/src/eth/dma_curr_tx_desc.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:31 - Cleared on Reset. Pointer updated by the DMA during operation."] #[inline(always)] - pub fn curtdesaptr(&mut self) -> CurtdesaptrW { + pub fn curtdesaptr(&mut self) -> CurtdesaptrW<'_, DmaCurrTxDescSpec> { CurtdesaptrW::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for DmaCurrTxDescSpec {} #[doc = "`write(|w| ..)` method takes [`dma_curr_tx_desc::W`](W) writer structure"] impl crate::Writable for DmaCurrTxDescSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DMA_CURR_TX_DESC to value 0"] -impl crate::Resettable for DmaCurrTxDescSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for DmaCurrTxDescSpec {} diff --git a/va416xx/src/eth/dma_intr_en.rs b/va416xx/src/eth/dma_intr_en.rs index 92cbff1..186c379 100644 --- a/va416xx/src/eth/dma_intr_en.rs +++ b/va416xx/src/eth/dma_intr_en.rs @@ -142,77 +142,77 @@ impl R { impl W { #[doc = "Bit 0 - Transmit Interrupt Enable"] #[inline(always)] - pub fn tie(&mut self) -> TieW { + pub fn tie(&mut self) -> TieW<'_, DmaIntrEnSpec> { TieW::new(self, 0) } #[doc = "Bit 1 - Transmit Stopped Enable"] #[inline(always)] - pub fn tse(&mut self) -> TseW { + pub fn tse(&mut self) -> TseW<'_, DmaIntrEnSpec> { TseW::new(self, 1) } #[doc = "Bit 2 - Transmit Buffer Unavailable Enable"] #[inline(always)] - pub fn tue(&mut self) -> TueW { + pub fn tue(&mut self) -> TueW<'_, DmaIntrEnSpec> { TueW::new(self, 2) } #[doc = "Bit 3 - Transmit Jabber Timeout Enable"] #[inline(always)] - pub fn the(&mut self) -> TheW { + pub fn the(&mut self) -> TheW<'_, DmaIntrEnSpec> { TheW::new(self, 3) } #[doc = "Bit 4 - Overflow Interrupt Enable"] #[inline(always)] - pub fn ove(&mut self) -> OveW { + pub fn ove(&mut self) -> OveW<'_, DmaIntrEnSpec> { OveW::new(self, 4) } #[doc = "Bit 5 - Underflow Interrupt Enable"] #[inline(always)] - pub fn une(&mut self) -> UneW { + pub fn une(&mut self) -> UneW<'_, DmaIntrEnSpec> { UneW::new(self, 5) } #[doc = "Bit 6 - Receive Interrupt Enable"] #[inline(always)] - pub fn rie(&mut self) -> RieW { + pub fn rie(&mut self) -> RieW<'_, DmaIntrEnSpec> { RieW::new(self, 6) } #[doc = "Bit 7 - Receive Buffer Unavailable Enable"] #[inline(always)] - pub fn rue(&mut self) -> RueW { + pub fn rue(&mut self) -> RueW<'_, DmaIntrEnSpec> { RueW::new(self, 7) } #[doc = "Bit 8 - Receive Stopped Enable"] #[inline(always)] - pub fn rse(&mut self) -> RseW { + pub fn rse(&mut self) -> RseW<'_, DmaIntrEnSpec> { RseW::new(self, 8) } #[doc = "Bit 9 - Receive Watchdog Timeout Enable"] #[inline(always)] - pub fn rwe(&mut self) -> RweW { + pub fn rwe(&mut self) -> RweW<'_, DmaIntrEnSpec> { RweW::new(self, 9) } #[doc = "Bit 10 - Early Transmit Interrupt Enable"] #[inline(always)] - pub fn ete(&mut self) -> EteW { + pub fn ete(&mut self) -> EteW<'_, DmaIntrEnSpec> { EteW::new(self, 10) } #[doc = "Bit 13 - Fatal Bus Error Enable"] #[inline(always)] - pub fn fbe(&mut self) -> FbeW { + pub fn fbe(&mut self) -> FbeW<'_, DmaIntrEnSpec> { FbeW::new(self, 13) } #[doc = "Bit 14 - Early Receive Interrupt Enable"] #[inline(always)] - pub fn ere(&mut self) -> EreW { + pub fn ere(&mut self) -> EreW<'_, DmaIntrEnSpec> { EreW::new(self, 14) } #[doc = "Bit 15 - Abnormal Interrupt Summary Enable"] #[inline(always)] - pub fn aie(&mut self) -> AieW { + pub fn aie(&mut self) -> AieW<'_, DmaIntrEnSpec> { AieW::new(self, 15) } #[doc = "Bit 16 - Normal Interrupt Summary Enable"] #[inline(always)] - pub fn nie(&mut self) -> NieW { + pub fn nie(&mut self) -> NieW<'_, DmaIntrEnSpec> { NieW::new(self, 16) } } @@ -226,10 +226,6 @@ impl crate::Readable for DmaIntrEnSpec {} #[doc = "`write(|w| ..)` method takes [`dma_intr_en::W`](W) writer structure"] impl crate::Writable for DmaIntrEnSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DMA_INTR_EN to value 0"] -impl crate::Resettable for DmaIntrEnSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for DmaIntrEnSpec {} diff --git a/va416xx/src/eth/dma_miss_over_counter.rs b/va416xx/src/eth/dma_miss_over_counter.rs index d020db2..6a46a37 100644 --- a/va416xx/src/eth/dma_miss_over_counter.rs +++ b/va416xx/src/eth/dma_miss_over_counter.rs @@ -43,22 +43,22 @@ impl R { impl W { #[doc = "Bits 0:15 - This field indicates the number of frames missed by the controller because of the Host Receive Buffer being unavailable."] #[inline(always)] - pub fn misfrmcnt(&mut self) -> MisfrmcntW { + pub fn misfrmcnt(&mut self) -> MisfrmcntW<'_, DmaMissOverCounterSpec> { MisfrmcntW::new(self, 0) } #[doc = "Bit 16 - This bit is set every time Missed Frame Counter (Bits\\[15:0\\]) overflows"] #[inline(always)] - pub fn miscntovf(&mut self) -> MiscntovfW { + pub fn miscntovf(&mut self) -> MiscntovfW<'_, DmaMissOverCounterSpec> { MiscntovfW::new(self, 16) } #[doc = "Bits 17:27 - This field indicates the number of frames missed by the application"] #[inline(always)] - pub fn ovffrmcnt(&mut self) -> OvffrmcntW { + pub fn ovffrmcnt(&mut self) -> OvffrmcntW<'_, DmaMissOverCounterSpec> { OvffrmcntW::new(self, 17) } #[doc = "Bit 28 - This bit is set every time the Overflow Frame Counter (Bits\\[27:17\\])overflows"] #[inline(always)] - pub fn ovfcntovf(&mut self) -> OvfcntovfW { + pub fn ovfcntovf(&mut self) -> OvfcntovfW<'_, DmaMissOverCounterSpec> { OvfcntovfW::new(self, 28) } } @@ -72,10 +72,6 @@ impl crate::Readable for DmaMissOverCounterSpec {} #[doc = "`write(|w| ..)` method takes [`dma_miss_over_counter::W`](W) writer structure"] impl crate::Writable for DmaMissOverCounterSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DMA_MISS_OVER_COUNTER to value 0"] -impl crate::Resettable for DmaMissOverCounterSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for DmaMissOverCounterSpec {} diff --git a/va416xx/src/eth/dma_oper_mode.rs b/va416xx/src/eth/dma_oper_mode.rs index 8bce9bd..a712586 100644 --- a/va416xx/src/eth/dma_oper_mode.rs +++ b/va416xx/src/eth/dma_oper_mode.rs @@ -142,77 +142,77 @@ impl R { impl W { #[doc = "Bit 1 - Start or Stop Receive"] #[inline(always)] - pub fn sr(&mut self) -> SrW { + pub fn sr(&mut self) -> SrW<'_, DmaOperModeSpec> { SrW::new(self, 1) } #[doc = "Bit 2 - Operate on Second Frame"] #[inline(always)] - pub fn osf(&mut self) -> OsfW { + pub fn osf(&mut self) -> OsfW<'_, DmaOperModeSpec> { OsfW::new(self, 2) } #[doc = "Bits 3:4 - Receive Threshold Control"] #[inline(always)] - pub fn rtc(&mut self) -> RtcW { + pub fn rtc(&mut self) -> RtcW<'_, DmaOperModeSpec> { RtcW::new(self, 3) } #[doc = "Bit 5 - Drop Giant Frames"] #[inline(always)] - pub fn dgf(&mut self) -> DgfW { + pub fn dgf(&mut self) -> DgfW<'_, DmaOperModeSpec> { DgfW::new(self, 5) } #[doc = "Bit 6 - Forward Undersized Good Frames"] #[inline(always)] - pub fn fuf(&mut self) -> FufW { + pub fn fuf(&mut self) -> FufW<'_, DmaOperModeSpec> { FufW::new(self, 6) } #[doc = "Bit 7 - Forward Error Frames"] #[inline(always)] - pub fn fef(&mut self) -> FefW { + pub fn fef(&mut self) -> FefW<'_, DmaOperModeSpec> { FefW::new(self, 7) } #[doc = "Bits 9:10 - Threshold for Activating Flow Control"] #[inline(always)] - pub fn rfa(&mut self) -> RfaW { + pub fn rfa(&mut self) -> RfaW<'_, DmaOperModeSpec> { RfaW::new(self, 9) } #[doc = "Bits 11:12 - Threshold for Deactivating Flow Control"] #[inline(always)] - pub fn rfd(&mut self) -> RfdW { + pub fn rfd(&mut self) -> RfdW<'_, DmaOperModeSpec> { RfdW::new(self, 11) } #[doc = "Bit 13 - Start or Stop Transmission Command"] #[inline(always)] - pub fn st(&mut self) -> StW { + pub fn st(&mut self) -> StW<'_, DmaOperModeSpec> { StW::new(self, 13) } #[doc = "Bits 14:16 - Transmit Threshold Control"] #[inline(always)] - pub fn ttc(&mut self) -> TtcW { + pub fn ttc(&mut self) -> TtcW<'_, DmaOperModeSpec> { TtcW::new(self, 14) } #[doc = "Bit 20 - Flush Transmit FIFO"] #[inline(always)] - pub fn ftf(&mut self) -> FtfW { + pub fn ftf(&mut self) -> FtfW<'_, DmaOperModeSpec> { FtfW::new(self, 20) } #[doc = "Bit 21 - Transmit Store and Forward"] #[inline(always)] - pub fn tsf(&mut self) -> TsfW { + pub fn tsf(&mut self) -> TsfW<'_, DmaOperModeSpec> { TsfW::new(self, 21) } #[doc = "Bit 24 - Disable Flushing of Received Frames"] #[inline(always)] - pub fn dff(&mut self) -> DffW { + pub fn dff(&mut self) -> DffW<'_, DmaOperModeSpec> { DffW::new(self, 24) } #[doc = "Bit 25 - Receive Store and Forward"] #[inline(always)] - pub fn rsf(&mut self) -> RsfW { + pub fn rsf(&mut self) -> RsfW<'_, DmaOperModeSpec> { RsfW::new(self, 25) } #[doc = "Bit 26 - Disable Dropping of TCP/IP Checksum Error Frames"] #[inline(always)] - pub fn dt(&mut self) -> DtW { + pub fn dt(&mut self) -> DtW<'_, DmaOperModeSpec> { DtW::new(self, 26) } } @@ -226,10 +226,6 @@ impl crate::Readable for DmaOperModeSpec {} #[doc = "`write(|w| ..)` method takes [`dma_oper_mode::W`](W) writer structure"] impl crate::Writable for DmaOperModeSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DMA_OPER_MODE to value 0"] -impl crate::Resettable for DmaOperModeSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for DmaOperModeSpec {} diff --git a/va416xx/src/eth/dma_rx_desc_list_addr.rs b/va416xx/src/eth/dma_rx_desc_list_addr.rs index bbc43f4..2864a03 100644 --- a/va416xx/src/eth/dma_rx_desc_list_addr.rs +++ b/va416xx/src/eth/dma_rx_desc_list_addr.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:31 - Start of Receive List"] #[inline(always)] - pub fn rdesla(&mut self) -> RdeslaW { + pub fn rdesla(&mut self) -> RdeslaW<'_, DmaRxDescListAddrSpec> { RdeslaW::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for DmaRxDescListAddrSpec {} #[doc = "`write(|w| ..)` method takes [`dma_rx_desc_list_addr::W`](W) writer structure"] impl crate::Writable for DmaRxDescListAddrSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DMA_RX_DESC_LIST_ADDR to value 0"] -impl crate::Resettable for DmaRxDescListAddrSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for DmaRxDescListAddrSpec {} diff --git a/va416xx/src/eth/dma_rx_intr_wdog_timer.rs b/va416xx/src/eth/dma_rx_intr_wdog_timer.rs index eb10c0c..5a12981 100644 --- a/va416xx/src/eth/dma_rx_intr_wdog_timer.rs +++ b/va416xx/src/eth/dma_rx_intr_wdog_timer.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:7 - These bits indicate the number of system clock cycles x 256 for which the watchdog timer is set."] #[inline(always)] - pub fn riwt(&mut self) -> RiwtW { + pub fn riwt(&mut self) -> RiwtW<'_, DmaRxIntrWdogTimerSpec> { RiwtW::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for DmaRxIntrWdogTimerSpec {} #[doc = "`write(|w| ..)` method takes [`dma_rx_intr_wdog_timer::W`](W) writer structure"] impl crate::Writable for DmaRxIntrWdogTimerSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DMA_RX_INTR_WDOG_TIMER to value 0"] -impl crate::Resettable for DmaRxIntrWdogTimerSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for DmaRxIntrWdogTimerSpec {} diff --git a/va416xx/src/eth/dma_rx_poll_demand.rs b/va416xx/src/eth/dma_rx_poll_demand.rs index e50a408..1f30770 100644 --- a/va416xx/src/eth/dma_rx_poll_demand.rs +++ b/va416xx/src/eth/dma_rx_poll_demand.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:31 - Receive Poll Demand (Read Only and Write Trigger)"] #[inline(always)] - pub fn rpd(&mut self) -> RpdW { + pub fn rpd(&mut self) -> RpdW<'_, DmaRxPollDemandSpec> { RpdW::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for DmaRxPollDemandSpec {} #[doc = "`write(|w| ..)` method takes [`dma_rx_poll_demand::W`](W) writer structure"] impl crate::Writable for DmaRxPollDemandSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DMA_RX_POLL_DEMAND to value 0"] -impl crate::Resettable for DmaRxPollDemandSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for DmaRxPollDemandSpec {} diff --git a/va416xx/src/eth/dma_status.rs b/va416xx/src/eth/dma_status.rs index ed4f16c..4d8347c 100644 --- a/va416xx/src/eth/dma_status.rs +++ b/va416xx/src/eth/dma_status.rs @@ -150,6 +150,4 @@ impl crate::RegisterSpec for DmaStatusSpec { #[doc = "`read()` method returns [`dma_status::R`](R) reader structure"] impl crate::Readable for DmaStatusSpec {} #[doc = "`reset()` method sets DMA_STATUS to value 0"] -impl crate::Resettable for DmaStatusSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for DmaStatusSpec {} diff --git a/va416xx/src/eth/dma_tx_desc_list_addr.rs b/va416xx/src/eth/dma_tx_desc_list_addr.rs index 6bdb559..6b84c66 100644 --- a/va416xx/src/eth/dma_tx_desc_list_addr.rs +++ b/va416xx/src/eth/dma_tx_desc_list_addr.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:31 - Start of Transmit List"] #[inline(always)] - pub fn tdesla(&mut self) -> TdeslaW { + pub fn tdesla(&mut self) -> TdeslaW<'_, DmaTxDescListAddrSpec> { TdeslaW::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for DmaTxDescListAddrSpec {} #[doc = "`write(|w| ..)` method takes [`dma_tx_desc_list_addr::W`](W) writer structure"] impl crate::Writable for DmaTxDescListAddrSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DMA_TX_DESC_LIST_ADDR to value 0"] -impl crate::Resettable for DmaTxDescListAddrSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for DmaTxDescListAddrSpec {} diff --git a/va416xx/src/eth/dma_tx_poll_demand.rs b/va416xx/src/eth/dma_tx_poll_demand.rs index 2e50aed..c92083c 100644 --- a/va416xx/src/eth/dma_tx_poll_demand.rs +++ b/va416xx/src/eth/dma_tx_poll_demand.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:31 - Transmit Poll Demand (Read Only and Write Trigger)"] #[inline(always)] - pub fn tpd(&mut self) -> TpdW { + pub fn tpd(&mut self) -> TpdW<'_, DmaTxPollDemandSpec> { TpdW::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for DmaTxPollDemandSpec {} #[doc = "`write(|w| ..)` method takes [`dma_tx_poll_demand::W`](W) writer structure"] impl crate::Writable for DmaTxPollDemandSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DMA_TX_POLL_DEMAND to value 0"] -impl crate::Resettable for DmaTxPollDemandSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for DmaTxPollDemandSpec {} diff --git a/va416xx/src/eth/mac_addr_h.rs b/va416xx/src/eth/mac_addr_h.rs index 7d2fe2c..5361c93 100644 --- a/va416xx/src/eth/mac_addr_h.rs +++ b/va416xx/src/eth/mac_addr_h.rs @@ -29,8 +29,6 @@ impl crate::Readable for MacAddrHSpec {} #[doc = "`write(|w| ..)` method takes [`mac_addr_h::W`](W) writer structure"] impl crate::Writable for MacAddrHSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MAC_ADDR_H to value 0x8000_ffff"] impl crate::Resettable for MacAddrHSpec { diff --git a/va416xx/src/eth/mac_addr_l.rs b/va416xx/src/eth/mac_addr_l.rs index e17aa97..d61cf88 100644 --- a/va416xx/src/eth/mac_addr_l.rs +++ b/va416xx/src/eth/mac_addr_l.rs @@ -22,8 +22,6 @@ impl crate::Readable for MacAddrLSpec {} #[doc = "`write(|w| ..)` method takes [`mac_addr_l::W`](W) writer structure"] impl crate::Writable for MacAddrLSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MAC_ADDR_L to value 0xffff_ffff"] impl crate::Resettable for MacAddrLSpec { diff --git a/va416xx/src/eth/mac_config.rs b/va416xx/src/eth/mac_config.rs index 72826d1..b22f1e3 100644 --- a/va416xx/src/eth/mac_config.rs +++ b/va416xx/src/eth/mac_config.rs @@ -178,97 +178,97 @@ impl R { impl W { #[doc = "Bits 0:1 - Preamble Length for Transmit frames"] #[inline(always)] - pub fn prelen(&mut self) -> PrelenW { + pub fn prelen(&mut self) -> PrelenW<'_, MacConfigSpec> { PrelenW::new(self, 0) } #[doc = "Bit 2 - Receiver Enable"] #[inline(always)] - pub fn re(&mut self) -> ReW { + pub fn re(&mut self) -> ReW<'_, MacConfigSpec> { ReW::new(self, 2) } #[doc = "Bit 3 - Transmitter Enable"] #[inline(always)] - pub fn te(&mut self) -> TeW { + pub fn te(&mut self) -> TeW<'_, MacConfigSpec> { TeW::new(self, 3) } #[doc = "Bit 4 - Deferral Check"] #[inline(always)] - pub fn dc(&mut self) -> DcW { + pub fn dc(&mut self) -> DcW<'_, MacConfigSpec> { DcW::new(self, 4) } #[doc = "Bits 5:6 - Back-Off-Limit"] #[inline(always)] - pub fn bl(&mut self) -> BlW { + pub fn bl(&mut self) -> BlW<'_, MacConfigSpec> { BlW::new(self, 5) } #[doc = "Bit 7 - Automatic Pad, or CRC Stripping"] #[inline(always)] - pub fn acs(&mut self) -> AcsW { + pub fn acs(&mut self) -> AcsW<'_, MacConfigSpec> { AcsW::new(self, 7) } #[doc = "Bit 9 - Disable Retry"] #[inline(always)] - pub fn dr(&mut self) -> DrW { + pub fn dr(&mut self) -> DrW<'_, MacConfigSpec> { DrW::new(self, 9) } #[doc = "Bit 10 - Checksum Offload"] #[inline(always)] - pub fn ipc(&mut self) -> IpcW { + pub fn ipc(&mut self) -> IpcW<'_, MacConfigSpec> { IpcW::new(self, 10) } #[doc = "Bit 11 - Duplex Mode"] #[inline(always)] - pub fn dm(&mut self) -> DmW { + pub fn dm(&mut self) -> DmW<'_, MacConfigSpec> { DmW::new(self, 11) } #[doc = "Bit 12 - Loopback Mode"] #[inline(always)] - pub fn lm(&mut self) -> LmW { + pub fn lm(&mut self) -> LmW<'_, MacConfigSpec> { LmW::new(self, 12) } #[doc = "Bit 13 - Disable Receive Own"] #[inline(always)] - pub fn dro(&mut self) -> DroW { + pub fn dro(&mut self) -> DroW<'_, MacConfigSpec> { DroW::new(self, 13) } #[doc = "Bit 14 - Speed"] #[inline(always)] - pub fn fes(&mut self) -> FesW { + pub fn fes(&mut self) -> FesW<'_, MacConfigSpec> { FesW::new(self, 14) } #[doc = "Bit 15 - Port Select"] #[inline(always)] - pub fn ps(&mut self) -> PsW { + pub fn ps(&mut self) -> PsW<'_, MacConfigSpec> { PsW::new(self, 15) } #[doc = "Bit 16 - Disable Carrier Sense During Transmission"] #[inline(always)] - pub fn dcrs(&mut self) -> DcrsW { + pub fn dcrs(&mut self) -> DcrsW<'_, MacConfigSpec> { DcrsW::new(self, 16) } #[doc = "Bits 17:19 - Inter-Frame Gap"] #[inline(always)] - pub fn ifg(&mut self) -> IfgW { + pub fn ifg(&mut self) -> IfgW<'_, MacConfigSpec> { IfgW::new(self, 17) } #[doc = "Bit 20 - Jumbo Frame Enable"] #[inline(always)] - pub fn je(&mut self) -> JeW { + pub fn je(&mut self) -> JeW<'_, MacConfigSpec> { JeW::new(self, 20) } #[doc = "Bit 21 - Frame Burst Enable"] #[inline(always)] - pub fn be(&mut self) -> BeW { + pub fn be(&mut self) -> BeW<'_, MacConfigSpec> { BeW::new(self, 21) } #[doc = "Bit 22 - Jabber Disable"] #[inline(always)] - pub fn jd(&mut self) -> JdW { + pub fn jd(&mut self) -> JdW<'_, MacConfigSpec> { JdW::new(self, 22) } #[doc = "Bit 23 - Watchdog disable"] #[inline(always)] - pub fn wd(&mut self) -> WdW { + pub fn wd(&mut self) -> WdW<'_, MacConfigSpec> { WdW::new(self, 23) } } @@ -282,10 +282,6 @@ impl crate::Readable for MacConfigSpec {} #[doc = "`write(|w| ..)` method takes [`mac_config::W`](W) writer structure"] impl crate::Writable for MacConfigSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MAC_CONFIG to value 0"] -impl crate::Resettable for MacConfigSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for MacConfigSpec {} diff --git a/va416xx/src/eth/mac_debug.rs b/va416xx/src/eth/mac_debug.rs index b5ac42a..a05adcd 100644 --- a/va416xx/src/eth/mac_debug.rs +++ b/va416xx/src/eth/mac_debug.rs @@ -94,6 +94,4 @@ impl crate::RegisterSpec for MacDebugSpec { #[doc = "`read()` method returns [`mac_debug::R`](R) reader structure"] impl crate::Readable for MacDebugSpec {} #[doc = "`reset()` method sets MAC_DEBUG to value 0"] -impl crate::Resettable for MacDebugSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for MacDebugSpec {} diff --git a/va416xx/src/eth/mac_flow_ctrl.rs b/va416xx/src/eth/mac_flow_ctrl.rs index 65e71cb..936830d 100644 --- a/va416xx/src/eth/mac_flow_ctrl.rs +++ b/va416xx/src/eth/mac_flow_ctrl.rs @@ -70,37 +70,37 @@ impl R { impl W { #[doc = "Bit 0 - Flow Control Busy or Backpressure Activate"] #[inline(always)] - pub fn fcb_bpa(&mut self) -> FcbBpaW { + pub fn fcb_bpa(&mut self) -> FcbBpaW<'_, MacFlowCtrlSpec> { FcbBpaW::new(self, 0) } #[doc = "Bit 1 - Transmit Flow Control Enable"] #[inline(always)] - pub fn tfe(&mut self) -> TfeW { + pub fn tfe(&mut self) -> TfeW<'_, MacFlowCtrlSpec> { TfeW::new(self, 1) } #[doc = "Bit 2 - Receive Flow Control Enable"] #[inline(always)] - pub fn rfe(&mut self) -> RfeW { + pub fn rfe(&mut self) -> RfeW<'_, MacFlowCtrlSpec> { RfeW::new(self, 2) } #[doc = "Bit 3 - Unicast Pause Frame Detect"] #[inline(always)] - pub fn up(&mut self) -> UpW { + pub fn up(&mut self) -> UpW<'_, MacFlowCtrlSpec> { UpW::new(self, 3) } #[doc = "Bits 4:5 - Pause Low Threshold"] #[inline(always)] - pub fn plt(&mut self) -> PltW { + pub fn plt(&mut self) -> PltW<'_, MacFlowCtrlSpec> { PltW::new(self, 4) } #[doc = "Bit 7 - Disable Zero-Quanta Pause"] #[inline(always)] - pub fn dzpq(&mut self) -> DzpqW { + pub fn dzpq(&mut self) -> DzpqW<'_, MacFlowCtrlSpec> { DzpqW::new(self, 7) } #[doc = "Bits 16:31 - Pause time"] #[inline(always)] - pub fn pt(&mut self) -> PtW { + pub fn pt(&mut self) -> PtW<'_, MacFlowCtrlSpec> { PtW::new(self, 16) } } @@ -114,10 +114,6 @@ impl crate::Readable for MacFlowCtrlSpec {} #[doc = "`write(|w| ..)` method takes [`mac_flow_ctrl::W`](W) writer structure"] impl crate::Writable for MacFlowCtrlSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MAC_FLOW_CTRL to value 0"] -impl crate::Resettable for MacFlowCtrlSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for MacFlowCtrlSpec {} diff --git a/va416xx/src/eth/mac_frame_fltr.rs b/va416xx/src/eth/mac_frame_fltr.rs index 126f36d..129d8f8 100644 --- a/va416xx/src/eth/mac_frame_fltr.rs +++ b/va416xx/src/eth/mac_frame_fltr.rs @@ -124,67 +124,67 @@ impl R { impl W { #[doc = "Bit 0 - Promiscuous Mode"] #[inline(always)] - pub fn pr(&mut self) -> PrW { + pub fn pr(&mut self) -> PrW<'_, MacFrameFltrSpec> { PrW::new(self, 0) } #[doc = "Bit 1 - Hash Unicast"] #[inline(always)] - pub fn huc(&mut self) -> HucW { + pub fn huc(&mut self) -> HucW<'_, MacFrameFltrSpec> { HucW::new(self, 1) } #[doc = "Bit 2 - Hash Multicast"] #[inline(always)] - pub fn hmc(&mut self) -> HmcW { + pub fn hmc(&mut self) -> HmcW<'_, MacFrameFltrSpec> { HmcW::new(self, 2) } #[doc = "Bit 3 - DA Inverse Filtering"] #[inline(always)] - pub fn daif(&mut self) -> DaifW { + pub fn daif(&mut self) -> DaifW<'_, MacFrameFltrSpec> { DaifW::new(self, 3) } #[doc = "Bit 4 - Pass All Multicast"] #[inline(always)] - pub fn pm(&mut self) -> PmW { + pub fn pm(&mut self) -> PmW<'_, MacFrameFltrSpec> { PmW::new(self, 4) } #[doc = "Bit 5 - Disable Broadcast Frames"] #[inline(always)] - pub fn dbf(&mut self) -> DbfW { + pub fn dbf(&mut self) -> DbfW<'_, MacFrameFltrSpec> { DbfW::new(self, 5) } #[doc = "Bits 6:7 - Pass Control Frames"] #[inline(always)] - pub fn pcf(&mut self) -> PcfW { + pub fn pcf(&mut self) -> PcfW<'_, MacFrameFltrSpec> { PcfW::new(self, 6) } #[doc = "Bit 8 - SA Inverse Filtering"] #[inline(always)] - pub fn saif(&mut self) -> SaifW { + pub fn saif(&mut self) -> SaifW<'_, MacFrameFltrSpec> { SaifW::new(self, 8) } #[doc = "Bit 9 - Source Address Filter Enable"] #[inline(always)] - pub fn saf(&mut self) -> SafW { + pub fn saf(&mut self) -> SafW<'_, MacFrameFltrSpec> { SafW::new(self, 9) } #[doc = "Bit 10 - Hash or Perfect Filter"] #[inline(always)] - pub fn hdf(&mut self) -> HdfW { + pub fn hdf(&mut self) -> HdfW<'_, MacFrameFltrSpec> { HdfW::new(self, 10) } #[doc = "Bit 16 - VLAN Tag Filter Enable"] #[inline(always)] - pub fn vfte(&mut self) -> VfteW { + pub fn vfte(&mut self) -> VfteW<'_, MacFrameFltrSpec> { VfteW::new(self, 16) } #[doc = "Bit 21 - Drop non TCP/UDP over IP Frames"] #[inline(always)] - pub fn dntu(&mut self) -> DntuW { + pub fn dntu(&mut self) -> DntuW<'_, MacFrameFltrSpec> { DntuW::new(self, 21) } #[doc = "Bit 31 - Receive All"] #[inline(always)] - pub fn ra(&mut self) -> RaW { + pub fn ra(&mut self) -> RaW<'_, MacFrameFltrSpec> { RaW::new(self, 31) } } @@ -198,10 +198,6 @@ impl crate::Readable for MacFrameFltrSpec {} #[doc = "`write(|w| ..)` method takes [`mac_frame_fltr::W`](W) writer structure"] impl crate::Writable for MacFrameFltrSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MAC_FRAME_FLTR to value 0"] -impl crate::Resettable for MacFrameFltrSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for MacFrameFltrSpec {} diff --git a/va416xx/src/eth/mac_gmii_addr.rs b/va416xx/src/eth/mac_gmii_addr.rs index e8ca1bb..afae52c 100644 --- a/va416xx/src/eth/mac_gmii_addr.rs +++ b/va416xx/src/eth/mac_gmii_addr.rs @@ -52,27 +52,27 @@ impl R { impl W { #[doc = "Bit 0 - GMII Busy"] #[inline(always)] - pub fn gb(&mut self) -> GbW { + pub fn gb(&mut self) -> GbW<'_, MacGmiiAddrSpec> { GbW::new(self, 0) } #[doc = "Bit 1 - GMII Write/Read"] #[inline(always)] - pub fn gw(&mut self) -> GwW { + pub fn gw(&mut self) -> GwW<'_, MacGmiiAddrSpec> { GwW::new(self, 1) } #[doc = "Bits 2:5 - CSR Clock Range"] #[inline(always)] - pub fn cr(&mut self) -> CrW { + pub fn cr(&mut self) -> CrW<'_, MacGmiiAddrSpec> { CrW::new(self, 2) } #[doc = "Bits 6:10 - GMII Register"] #[inline(always)] - pub fn gr(&mut self) -> GrW { + pub fn gr(&mut self) -> GrW<'_, MacGmiiAddrSpec> { GrW::new(self, 6) } #[doc = "Bits 11:15 - Physical Layer Address"] #[inline(always)] - pub fn pa(&mut self) -> PaW { + pub fn pa(&mut self) -> PaW<'_, MacGmiiAddrSpec> { PaW::new(self, 11) } } @@ -86,10 +86,6 @@ impl crate::Readable for MacGmiiAddrSpec {} #[doc = "`write(|w| ..)` method takes [`mac_gmii_addr::W`](W) writer structure"] impl crate::Writable for MacGmiiAddrSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MAC_GMII_ADDR to value 0"] -impl crate::Resettable for MacGmiiAddrSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for MacGmiiAddrSpec {} diff --git a/va416xx/src/eth/mac_gmii_data.rs b/va416xx/src/eth/mac_gmii_data.rs index 9e3977c..2eaa09a 100644 --- a/va416xx/src/eth/mac_gmii_data.rs +++ b/va416xx/src/eth/mac_gmii_data.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:15 - GMII Data"] #[inline(always)] - pub fn gd(&mut self) -> GdW { + pub fn gd(&mut self) -> GdW<'_, MacGmiiDataSpec> { GdW::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for MacGmiiDataSpec {} #[doc = "`write(|w| ..)` method takes [`mac_gmii_data::W`](W) writer structure"] impl crate::Writable for MacGmiiDataSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MAC_GMII_DATA to value 0"] -impl crate::Resettable for MacGmiiDataSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for MacGmiiDataSpec {} diff --git a/va416xx/src/eth/mac_intr_mask.rs b/va416xx/src/eth/mac_intr_mask.rs index 96f7212..6518846 100644 --- a/va416xx/src/eth/mac_intr_mask.rs +++ b/va416xx/src/eth/mac_intr_mask.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bit 9 - Timestamp Interrupt Mask"] #[inline(always)] - pub fn tsim(&mut self) -> TsimW { + pub fn tsim(&mut self) -> TsimW<'_, MacIntrMaskSpec> { TsimW::new(self, 9) } } @@ -30,10 +30,6 @@ impl crate::Readable for MacIntrMaskSpec {} #[doc = "`write(|w| ..)` method takes [`mac_intr_mask::W`](W) writer structure"] impl crate::Writable for MacIntrMaskSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MAC_INTR_MASK to value 0"] -impl crate::Resettable for MacIntrMaskSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for MacIntrMaskSpec {} diff --git a/va416xx/src/eth/mac_intr_stat.rs b/va416xx/src/eth/mac_intr_stat.rs index dedcbc5..cdbab41 100644 --- a/va416xx/src/eth/mac_intr_stat.rs +++ b/va416xx/src/eth/mac_intr_stat.rs @@ -45,6 +45,4 @@ impl crate::RegisterSpec for MacIntrStatSpec { #[doc = "`read()` method returns [`mac_intr_stat::R`](R) reader structure"] impl crate::Readable for MacIntrStatSpec {} #[doc = "`reset()` method sets MAC_INTR_STAT to value 0"] -impl crate::Resettable for MacIntrStatSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for MacIntrStatSpec {} diff --git a/va416xx/src/eth/mac_vlan_tag.rs b/va416xx/src/eth/mac_vlan_tag.rs index 4af0695..c9fe835 100644 --- a/va416xx/src/eth/mac_vlan_tag.rs +++ b/va416xx/src/eth/mac_vlan_tag.rs @@ -43,22 +43,22 @@ impl R { impl W { #[doc = "Bits 0:15 - VLAN Tag identifier for Receive Frames"] #[inline(always)] - pub fn vl(&mut self) -> VlW { + pub fn vl(&mut self) -> VlW<'_, MacVlanTagSpec> { VlW::new(self, 0) } #[doc = "Bit 16 - Enable 12-Bit VLAN Tag Comparison"] #[inline(always)] - pub fn etv(&mut self) -> EtvW { + pub fn etv(&mut self) -> EtvW<'_, MacVlanTagSpec> { EtvW::new(self, 16) } #[doc = "Bit 17 - VLAN Tag Inverse Match Enable"] #[inline(always)] - pub fn vtim(&mut self) -> VtimW { + pub fn vtim(&mut self) -> VtimW<'_, MacVlanTagSpec> { VtimW::new(self, 17) } #[doc = "Bit 18 - Enable S-VLAN"] #[inline(always)] - pub fn esvl(&mut self) -> EsvlW { + pub fn esvl(&mut self) -> EsvlW<'_, MacVlanTagSpec> { EsvlW::new(self, 18) } } @@ -72,10 +72,6 @@ impl crate::Readable for MacVlanTagSpec {} #[doc = "`write(|w| ..)` method takes [`mac_vlan_tag::W`](W) writer structure"] impl crate::Writable for MacVlanTagSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MAC_VLAN_TAG to value 0"] -impl crate::Resettable for MacVlanTagSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for MacVlanTagSpec {} diff --git a/va416xx/src/eth/mac_wdog_to.rs b/va416xx/src/eth/mac_wdog_to.rs index 5cc71a4..d2fa569 100644 --- a/va416xx/src/eth/mac_wdog_to.rs +++ b/va416xx/src/eth/mac_wdog_to.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:13 - Watchdog Timeout"] #[inline(always)] - pub fn wto(&mut self) -> WtoW { + pub fn wto(&mut self) -> WtoW<'_, MacWdogToSpec> { WtoW::new(self, 0) } #[doc = "Bit 16 - Programmable Watchdog Enable"] #[inline(always)] - pub fn pwe(&mut self) -> PweW { + pub fn pwe(&mut self) -> PweW<'_, MacWdogToSpec> { PweW::new(self, 16) } } @@ -44,10 +44,6 @@ impl crate::Readable for MacWdogToSpec {} #[doc = "`write(|w| ..)` method takes [`mac_wdog_to::W`](W) writer structure"] impl crate::Writable for MacWdogToSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MAC_WDOG_TO to value 0"] -impl crate::Resettable for MacWdogToSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for MacWdogToSpec {} diff --git a/va416xx/src/eth/mmc_cntrl.rs b/va416xx/src/eth/mmc_cntrl.rs index e86e2aa..6238948 100644 --- a/va416xx/src/eth/mmc_cntrl.rs +++ b/va416xx/src/eth/mmc_cntrl.rs @@ -70,37 +70,37 @@ impl R { impl W { #[doc = "Bit 0 - Counters Reset"] #[inline(always)] - pub fn cntrst(&mut self) -> CntrstW { + pub fn cntrst(&mut self) -> CntrstW<'_, MmcCntrlSpec> { CntrstW::new(self, 0) } #[doc = "Bit 1 - Counter Stop Rollover"] #[inline(always)] - pub fn cntstopro(&mut self) -> CntstoproW { + pub fn cntstopro(&mut self) -> CntstoproW<'_, MmcCntrlSpec> { CntstoproW::new(self, 1) } #[doc = "Bit 2 - Reset on Read"] #[inline(always)] - pub fn rstonrd(&mut self) -> RstonrdW { + pub fn rstonrd(&mut self) -> RstonrdW<'_, MmcCntrlSpec> { RstonrdW::new(self, 2) } #[doc = "Bit 3 - MMC Counter Freeze"] #[inline(always)] - pub fn cntfreez(&mut self) -> CntfreezW { + pub fn cntfreez(&mut self) -> CntfreezW<'_, MmcCntrlSpec> { CntfreezW::new(self, 3) } #[doc = "Bit 4 - Counters Preset"] #[inline(always)] - pub fn cntprst(&mut self) -> CntprstW { + pub fn cntprst(&mut self) -> CntprstW<'_, MmcCntrlSpec> { CntprstW::new(self, 4) } #[doc = "Bit 5 - Full-Half Preset"] #[inline(always)] - pub fn cntprstlvl(&mut self) -> CntprstlvlW { + pub fn cntprstlvl(&mut self) -> CntprstlvlW<'_, MmcCntrlSpec> { CntprstlvlW::new(self, 5) } #[doc = "Bit 8 - Update MMC Counters for Dropped Broadcast Frames"] #[inline(always)] - pub fn ucdbc(&mut self) -> UcdbcW { + pub fn ucdbc(&mut self) -> UcdbcW<'_, MmcCntrlSpec> { UcdbcW::new(self, 8) } } @@ -114,10 +114,6 @@ impl crate::Readable for MmcCntrlSpec {} #[doc = "`write(|w| ..)` method takes [`mmc_cntrl::W`](W) writer structure"] impl crate::Writable for MmcCntrlSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MMC_CNTRL to value 0"] -impl crate::Resettable for MmcCntrlSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for MmcCntrlSpec {} diff --git a/va416xx/src/eth/mmc_intr_mask_rx.rs b/va416xx/src/eth/mmc_intr_mask_rx.rs index db470bd..8a4418f 100644 --- a/va416xx/src/eth/mmc_intr_mask_rx.rs +++ b/va416xx/src/eth/mmc_intr_mask_rx.rs @@ -241,132 +241,132 @@ impl R { impl W { #[doc = "Bit 0 - MMC Receive Good Bad Frame Counter Interrupt Mask"] #[inline(always)] - pub fn rxgbfrmim(&mut self) -> RxgbfrmimW { + pub fn rxgbfrmim(&mut self) -> RxgbfrmimW<'_, MmcIntrMaskRxSpec> { RxgbfrmimW::new(self, 0) } #[doc = "Bit 1 - MMC Receive Good Bad Octet Counter Interrupt Mask."] #[inline(always)] - pub fn rxgboctim(&mut self) -> RxgboctimW { + pub fn rxgboctim(&mut self) -> RxgboctimW<'_, MmcIntrMaskRxSpec> { RxgboctimW::new(self, 1) } #[doc = "Bit 2 - MMC Receive Good Octet Counter Interrupt Mask"] #[inline(always)] - pub fn rxgoctim(&mut self) -> RxgoctimW { + pub fn rxgoctim(&mut self) -> RxgoctimW<'_, MmcIntrMaskRxSpec> { RxgoctimW::new(self, 2) } #[doc = "Bit 3 - MMC Receive Broadcast Good Frame Counter Interrupt Mask"] #[inline(always)] - pub fn rxbcgfim(&mut self) -> RxbcgfimW { + pub fn rxbcgfim(&mut self) -> RxbcgfimW<'_, MmcIntrMaskRxSpec> { RxbcgfimW::new(self, 3) } #[doc = "Bit 4 - MMC Receive Multicast Good Frame Counter Interrupt Mask"] #[inline(always)] - pub fn rxmcgfim(&mut self) -> RxmcgfimW { + pub fn rxmcgfim(&mut self) -> RxmcgfimW<'_, MmcIntrMaskRxSpec> { RxmcgfimW::new(self, 4) } #[doc = "Bit 5 - MMC Receive CRC Error Frame Counter Interrupt Mask"] #[inline(always)] - pub fn rxcrcerfim(&mut self) -> RxcrcerfimW { + pub fn rxcrcerfim(&mut self) -> RxcrcerfimW<'_, MmcIntrMaskRxSpec> { RxcrcerfimW::new(self, 5) } #[doc = "Bit 6 - MMC Receive Alignment Error Frame Counter Interrupt Mask"] #[inline(always)] - pub fn rxalgnerfim(&mut self) -> RxalgnerfimW { + pub fn rxalgnerfim(&mut self) -> RxalgnerfimW<'_, MmcIntrMaskRxSpec> { RxalgnerfimW::new(self, 6) } #[doc = "Bit 7 - MMC Receive Runt Frame Counter Interrupt Mask"] #[inline(always)] - pub fn rxruntfim(&mut self) -> RxruntfimW { + pub fn rxruntfim(&mut self) -> RxruntfimW<'_, MmcIntrMaskRxSpec> { RxruntfimW::new(self, 7) } #[doc = "Bit 8 - MMC Receive Jabber Error Frame Counter Interrupt Mask"] #[inline(always)] - pub fn rxjaberfim(&mut self) -> RxjaberfimW { + pub fn rxjaberfim(&mut self) -> RxjaberfimW<'_, MmcIntrMaskRxSpec> { RxjaberfimW::new(self, 8) } #[doc = "Bit 9 - MMC Receive Undersize Good Frame Counter Interrupt Mask"] #[inline(always)] - pub fn rxusizegfim(&mut self) -> RxusizegfimW { + pub fn rxusizegfim(&mut self) -> RxusizegfimW<'_, MmcIntrMaskRxSpec> { RxusizegfimW::new(self, 9) } #[doc = "Bit 10 - MMC Receive Oversize Good Frame Counter Interrupt Mask"] #[inline(always)] - pub fn rxosizegfim(&mut self) -> RxosizegfimW { + pub fn rxosizegfim(&mut self) -> RxosizegfimW<'_, MmcIntrMaskRxSpec> { RxosizegfimW::new(self, 10) } #[doc = "Bit 11 - MMC Receive 64 Octet Good Bad Frame Counter Interrupt Mask"] #[inline(always)] - pub fn rx64octgbfim(&mut self) -> Rx64octgbfimW { + pub fn rx64octgbfim(&mut self) -> Rx64octgbfimW<'_, MmcIntrMaskRxSpec> { Rx64octgbfimW::new(self, 11) } #[doc = "Bit 12 - MMC Receive 65 to 127 Octet Good Bad Frame Counter Interrupt Mask"] #[inline(always)] - pub fn rx65t127octgbfim(&mut self) -> Rx65t127octgbfimW { + pub fn rx65t127octgbfim(&mut self) -> Rx65t127octgbfimW<'_, MmcIntrMaskRxSpec> { Rx65t127octgbfimW::new(self, 12) } #[doc = "Bit 13 - MMC Receive 128 to 255 Octet Good Bad Frame Counter Interrupt Mask"] #[inline(always)] - pub fn rx128t255octgbfim(&mut self) -> Rx128t255octgbfimW { + pub fn rx128t255octgbfim(&mut self) -> Rx128t255octgbfimW<'_, MmcIntrMaskRxSpec> { Rx128t255octgbfimW::new(self, 13) } #[doc = "Bit 14 - MMC Receive 256 to 511 Octet Good Bad Frame Counter Interrupt Mask"] #[inline(always)] - pub fn rx256t511octgbfim(&mut self) -> Rx256t511octgbfimW { + pub fn rx256t511octgbfim(&mut self) -> Rx256t511octgbfimW<'_, MmcIntrMaskRxSpec> { Rx256t511octgbfimW::new(self, 14) } #[doc = "Bit 15 - MMC Receive 512 to 1023 Octet Good Bad Frame Counter Interrupt Mask"] #[inline(always)] - pub fn rx512t1023octgbfim(&mut self) -> Rx512t1023octgbfimW { + pub fn rx512t1023octgbfim(&mut self) -> Rx512t1023octgbfimW<'_, MmcIntrMaskRxSpec> { Rx512t1023octgbfimW::new(self, 15) } #[doc = "Bit 16 - MMC Receive 1024 to Maximum Octet Good Bad Frame Counter Interrupt Mask."] #[inline(always)] - pub fn rx1024tmaxoctgbfim(&mut self) -> Rx1024tmaxoctgbfimW { + pub fn rx1024tmaxoctgbfim(&mut self) -> Rx1024tmaxoctgbfimW<'_, MmcIntrMaskRxSpec> { Rx1024tmaxoctgbfimW::new(self, 16) } #[doc = "Bit 17 - MMC Receive Unicast Good Frame Counter Interrupt Mask"] #[inline(always)] - pub fn rxucgfim(&mut self) -> RxucgfimW { + pub fn rxucgfim(&mut self) -> RxucgfimW<'_, MmcIntrMaskRxSpec> { RxucgfimW::new(self, 17) } #[doc = "Bit 18 - MMC Receive Length Error Frame Counter Interrupt Mask"] #[inline(always)] - pub fn rxlenerfim(&mut self) -> RxlenerfimW { + pub fn rxlenerfim(&mut self) -> RxlenerfimW<'_, MmcIntrMaskRxSpec> { RxlenerfimW::new(self, 18) } #[doc = "Bit 19 - MMC Receive Out Of Range Error Frame Counter Interrupt Mask"] #[inline(always)] - pub fn rxorangefim(&mut self) -> RxorangefimW { + pub fn rxorangefim(&mut self) -> RxorangefimW<'_, MmcIntrMaskRxSpec> { RxorangefimW::new(self, 19) } #[doc = "Bit 20 - MMC Receive Pause Frame Counter Interrupt Mask"] #[inline(always)] - pub fn rxpausfim(&mut self) -> RxpausfimW { + pub fn rxpausfim(&mut self) -> RxpausfimW<'_, MmcIntrMaskRxSpec> { RxpausfimW::new(self, 20) } #[doc = "Bit 21 - MMC Receive FIFO Overflow Frame Counter Interrupt Mask"] #[inline(always)] - pub fn rxfovfim(&mut self) -> RxfovfimW { + pub fn rxfovfim(&mut self) -> RxfovfimW<'_, MmcIntrMaskRxSpec> { RxfovfimW::new(self, 21) } #[doc = "Bit 22 - MMC Receive VLAN Good Bad Frame Counter Interrupt Mask"] #[inline(always)] - pub fn rxvlangbfim(&mut self) -> RxvlangbfimW { + pub fn rxvlangbfim(&mut self) -> RxvlangbfimW<'_, MmcIntrMaskRxSpec> { RxvlangbfimW::new(self, 22) } #[doc = "Bit 23 - MMC Receive Watchdog Error Frame Counter Interrupt Mask"] #[inline(always)] - pub fn rxwdogfim(&mut self) -> RxwdogfimW { + pub fn rxwdogfim(&mut self) -> RxwdogfimW<'_, MmcIntrMaskRxSpec> { RxwdogfimW::new(self, 23) } #[doc = "Bit 24 - MMC Receive Error Frame Counter Interrupt Mask"] #[inline(always)] - pub fn rxrcverrfim(&mut self) -> RxrcverrfimW { + pub fn rxrcverrfim(&mut self) -> RxrcverrfimW<'_, MmcIntrMaskRxSpec> { RxrcverrfimW::new(self, 24) } #[doc = "Bit 25 - MMC Receive Control Frame Counter Interrupt Mask"] #[inline(always)] - pub fn rxctrlfim(&mut self) -> RxctrlfimW { + pub fn rxctrlfim(&mut self) -> RxctrlfimW<'_, MmcIntrMaskRxSpec> { RxctrlfimW::new(self, 25) } } @@ -380,10 +380,6 @@ impl crate::Readable for MmcIntrMaskRxSpec {} #[doc = "`write(|w| ..)` method takes [`mmc_intr_mask_rx::W`](W) writer structure"] impl crate::Writable for MmcIntrMaskRxSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MMC_INTR_MASK_RX to value 0"] -impl crate::Resettable for MmcIntrMaskRxSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for MmcIntrMaskRxSpec {} diff --git a/va416xx/src/eth/mmc_intr_mask_tx.rs b/va416xx/src/eth/mmc_intr_mask_tx.rs index c7af471..823e87f 100644 --- a/va416xx/src/eth/mmc_intr_mask_tx.rs +++ b/va416xx/src/eth/mmc_intr_mask_tx.rs @@ -241,132 +241,132 @@ impl R { impl W { #[doc = "Bit 0 - MMC Transmit Good Bad Octet Counter Interrupt Mask"] #[inline(always)] - pub fn txgboctim(&mut self) -> TxgboctimW { + pub fn txgboctim(&mut self) -> TxgboctimW<'_, MmcIntrMaskTxSpec> { TxgboctimW::new(self, 0) } #[doc = "Bit 1 - MMC Transmit Good Bad Frame Counter Interrupt Mask"] #[inline(always)] - pub fn txgbfrmim(&mut self) -> TxgbfrmimW { + pub fn txgbfrmim(&mut self) -> TxgbfrmimW<'_, MmcIntrMaskTxSpec> { TxgbfrmimW::new(self, 1) } #[doc = "Bit 2 - MMC Transmit Broadcast Good Frame Counter Interrupt Mask"] #[inline(always)] - pub fn txbcgfim(&mut self) -> TxbcgfimW { + pub fn txbcgfim(&mut self) -> TxbcgfimW<'_, MmcIntrMaskTxSpec> { TxbcgfimW::new(self, 2) } #[doc = "Bit 3 - MMC Transmit Multicast Good Frame Counter Interrupt Mask"] #[inline(always)] - pub fn txmcgfim(&mut self) -> TxmcgfimW { + pub fn txmcgfim(&mut self) -> TxmcgfimW<'_, MmcIntrMaskTxSpec> { TxmcgfimW::new(self, 3) } #[doc = "Bit 4 - MMC Transmit 64 Octet Good Bad Frame Counter Interrupt Mask"] #[inline(always)] - pub fn tx64octgbfim(&mut self) -> Tx64octgbfimW { + pub fn tx64octgbfim(&mut self) -> Tx64octgbfimW<'_, MmcIntrMaskTxSpec> { Tx64octgbfimW::new(self, 4) } #[doc = "Bit 5 - MMC Transmit 65 to 127 Octet Good Bad Frame Counter Interrupt Mask"] #[inline(always)] - pub fn tx65t127octgbfim(&mut self) -> Tx65t127octgbfimW { + pub fn tx65t127octgbfim(&mut self) -> Tx65t127octgbfimW<'_, MmcIntrMaskTxSpec> { Tx65t127octgbfimW::new(self, 5) } #[doc = "Bit 6 - MMC Transmit 128 to 255 Octet Good Bad Frame Counter Interrupt Mask"] #[inline(always)] - pub fn tx128t255octgbfim(&mut self) -> Tx128t255octgbfimW { + pub fn tx128t255octgbfim(&mut self) -> Tx128t255octgbfimW<'_, MmcIntrMaskTxSpec> { Tx128t255octgbfimW::new(self, 6) } #[doc = "Bit 7 - MC Transmit 256 to 511 Octet Good Bad Frame Counter Interrupt Mask"] #[inline(always)] - pub fn tx256t511octgbfim(&mut self) -> Tx256t511octgbfimW { + pub fn tx256t511octgbfim(&mut self) -> Tx256t511octgbfimW<'_, MmcIntrMaskTxSpec> { Tx256t511octgbfimW::new(self, 7) } #[doc = "Bit 8 - MMC Transmit 512 to 1023 Octet Good Bad Frame Counter Interrupt Mask"] #[inline(always)] - pub fn tx512t1023octgbfim(&mut self) -> Tx512t1023octgbfimW { + pub fn tx512t1023octgbfim(&mut self) -> Tx512t1023octgbfimW<'_, MmcIntrMaskTxSpec> { Tx512t1023octgbfimW::new(self, 8) } #[doc = "Bit 9 - MMC Transmit 1024 to Maximum Octet Good Bad Frame Counter Interrupt Mask"] #[inline(always)] - pub fn tx1024tmaxoctgbfim(&mut self) -> Tx1024tmaxoctgbfimW { + pub fn tx1024tmaxoctgbfim(&mut self) -> Tx1024tmaxoctgbfimW<'_, MmcIntrMaskTxSpec> { Tx1024tmaxoctgbfimW::new(self, 9) } #[doc = "Bit 10 - MMC Transmit Unicast Good Bad Frame Counter Interrupt Mask"] #[inline(always)] - pub fn txucgbfim(&mut self) -> TxucgbfimW { + pub fn txucgbfim(&mut self) -> TxucgbfimW<'_, MmcIntrMaskTxSpec> { TxucgbfimW::new(self, 10) } #[doc = "Bit 11 - MMC Transmit Multicast Good Bad Frame Counter Interrupt Mask"] #[inline(always)] - pub fn txmcgbfim(&mut self) -> TxmcgbfimW { + pub fn txmcgbfim(&mut self) -> TxmcgbfimW<'_, MmcIntrMaskTxSpec> { TxmcgbfimW::new(self, 11) } #[doc = "Bit 12 - MMC Transmit Broadcast Good Bad Frame Counter Interrupt Mask"] #[inline(always)] - pub fn txbcgbfim(&mut self) -> TxbcgbfimW { + pub fn txbcgbfim(&mut self) -> TxbcgbfimW<'_, MmcIntrMaskTxSpec> { TxbcgbfimW::new(self, 12) } #[doc = "Bit 13 - MMC Transmit Underflow Error Frame Counter Interrupt Mask"] #[inline(always)] - pub fn txuflowerfim(&mut self) -> TxuflowerfimW { + pub fn txuflowerfim(&mut self) -> TxuflowerfimW<'_, MmcIntrMaskTxSpec> { TxuflowerfimW::new(self, 13) } #[doc = "Bit 14 - MMC Transmit Single Collision Good Frame Counter Interrupt Mask"] #[inline(always)] - pub fn txscolgfim(&mut self) -> TxscolgfimW { + pub fn txscolgfim(&mut self) -> TxscolgfimW<'_, MmcIntrMaskTxSpec> { TxscolgfimW::new(self, 14) } #[doc = "Bit 15 - MMC Transmit Multiple Collision Good Frame Counter Interrupt Mask"] #[inline(always)] - pub fn txmcolgfim(&mut self) -> TxmcolgfimW { + pub fn txmcolgfim(&mut self) -> TxmcolgfimW<'_, MmcIntrMaskTxSpec> { TxmcolgfimW::new(self, 15) } #[doc = "Bit 16 - MMC Transmit Deferred Frame Counter Interrupt Mask"] #[inline(always)] - pub fn txdeffim(&mut self) -> TxdeffimW { + pub fn txdeffim(&mut self) -> TxdeffimW<'_, MmcIntrMaskTxSpec> { TxdeffimW::new(self, 16) } #[doc = "Bit 17 - MMC Transmit Late Collision Frame Counter Interrupt Mask"] #[inline(always)] - pub fn txlatcolfim(&mut self) -> TxlatcolfimW { + pub fn txlatcolfim(&mut self) -> TxlatcolfimW<'_, MmcIntrMaskTxSpec> { TxlatcolfimW::new(self, 17) } #[doc = "Bit 18 - MMC Transmit Excessive Collision Frame Counter Interrupt Mask"] #[inline(always)] - pub fn txexcolfim(&mut self) -> TxexcolfimW { + pub fn txexcolfim(&mut self) -> TxexcolfimW<'_, MmcIntrMaskTxSpec> { TxexcolfimW::new(self, 18) } #[doc = "Bit 19 - MMC Transmit Carrier Error Frame Counter Interrupt Mask"] #[inline(always)] - pub fn txcarerfim(&mut self) -> TxcarerfimW { + pub fn txcarerfim(&mut self) -> TxcarerfimW<'_, MmcIntrMaskTxSpec> { TxcarerfimW::new(self, 19) } #[doc = "Bit 20 - MMC Transmit Good Octet Counter Interrupt Mask"] #[inline(always)] - pub fn txgoctim(&mut self) -> TxgoctimW { + pub fn txgoctim(&mut self) -> TxgoctimW<'_, MmcIntrMaskTxSpec> { TxgoctimW::new(self, 20) } #[doc = "Bit 21 - MMC Transmit Good Frame Counter Interrupt Mask"] #[inline(always)] - pub fn txgfrmim(&mut self) -> TxgfrmimW { + pub fn txgfrmim(&mut self) -> TxgfrmimW<'_, MmcIntrMaskTxSpec> { TxgfrmimW::new(self, 21) } #[doc = "Bit 22 - MMC Transmit Excessive Deferral Frame Counter Interrupt Mask"] #[inline(always)] - pub fn txexdeffim(&mut self) -> TxexdeffimW { + pub fn txexdeffim(&mut self) -> TxexdeffimW<'_, MmcIntrMaskTxSpec> { TxexdeffimW::new(self, 22) } #[doc = "Bit 23 - MMC Transmit Pause Frame Counter Interrupt Mask"] #[inline(always)] - pub fn txpausfim(&mut self) -> TxpausfimW { + pub fn txpausfim(&mut self) -> TxpausfimW<'_, MmcIntrMaskTxSpec> { TxpausfimW::new(self, 23) } #[doc = "Bit 24 - MMC Transmit VLAN Good Frame Counter Interrupt Mask"] #[inline(always)] - pub fn txvlangfim(&mut self) -> TxvlangfimW { + pub fn txvlangfim(&mut self) -> TxvlangfimW<'_, MmcIntrMaskTxSpec> { TxvlangfimW::new(self, 24) } #[doc = "Bit 25 - MMC Transmit Oversize Good Frame Counter Interrupt Mask"] #[inline(always)] - pub fn txosizegfim(&mut self) -> TxosizegfimW { + pub fn txosizegfim(&mut self) -> TxosizegfimW<'_, MmcIntrMaskTxSpec> { TxosizegfimW::new(self, 25) } } @@ -380,10 +380,6 @@ impl crate::Readable for MmcIntrMaskTxSpec {} #[doc = "`write(|w| ..)` method takes [`mmc_intr_mask_tx::W`](W) writer structure"] impl crate::Writable for MmcIntrMaskTxSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MMC_INTR_MASK_TX to value 0"] -impl crate::Resettable for MmcIntrMaskTxSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for MmcIntrMaskTxSpec {} diff --git a/va416xx/src/eth/mmc_intr_rx.rs b/va416xx/src/eth/mmc_intr_rx.rs index f995080..2fd8a2a 100644 --- a/va416xx/src/eth/mmc_intr_rx.rs +++ b/va416xx/src/eth/mmc_intr_rx.rs @@ -241,132 +241,132 @@ impl R { impl W { #[doc = "Bit 0 - MMC Receive Good Bad Frame Counter Interrupt Status"] #[inline(always)] - pub fn rxgbfrmis(&mut self) -> RxgbfrmisW { + pub fn rxgbfrmis(&mut self) -> RxgbfrmisW<'_, MmcIntrRxSpec> { RxgbfrmisW::new(self, 0) } #[doc = "Bit 1 - MMC Receive Good Bad Octet Counter Interrupt Status"] #[inline(always)] - pub fn rxgboctis(&mut self) -> RxgboctisW { + pub fn rxgboctis(&mut self) -> RxgboctisW<'_, MmcIntrRxSpec> { RxgboctisW::new(self, 1) } #[doc = "Bit 2 - MMC Receive Good Octet Counter Interrupt Status"] #[inline(always)] - pub fn rxgoctis(&mut self) -> RxgoctisW { + pub fn rxgoctis(&mut self) -> RxgoctisW<'_, MmcIntrRxSpec> { RxgoctisW::new(self, 2) } #[doc = "Bit 3 - MMC Receive Broadcast Good Frame Counter Interrupt Status"] #[inline(always)] - pub fn rxbcgfis(&mut self) -> RxbcgfisW { + pub fn rxbcgfis(&mut self) -> RxbcgfisW<'_, MmcIntrRxSpec> { RxbcgfisW::new(self, 3) } #[doc = "Bit 4 - MMC Receive Multicast Good Frame Counter Interrupt Status"] #[inline(always)] - pub fn rxmcgfis(&mut self) -> RxmcgfisW { + pub fn rxmcgfis(&mut self) -> RxmcgfisW<'_, MmcIntrRxSpec> { RxmcgfisW::new(self, 4) } #[doc = "Bit 5 - MMC Receive CRC Error Frame Counter Interrupt Status"] #[inline(always)] - pub fn rxcrcerfis(&mut self) -> RxcrcerfisW { + pub fn rxcrcerfis(&mut self) -> RxcrcerfisW<'_, MmcIntrRxSpec> { RxcrcerfisW::new(self, 5) } #[doc = "Bit 6 - MMC Receive Alignment Error Frame Counter Interrupt Status"] #[inline(always)] - pub fn rxalgnerfis(&mut self) -> RxalgnerfisW { + pub fn rxalgnerfis(&mut self) -> RxalgnerfisW<'_, MmcIntrRxSpec> { RxalgnerfisW::new(self, 6) } #[doc = "Bit 7 - MMC Receive Runt Frame Counter Interrupt Status"] #[inline(always)] - pub fn rxruntfis(&mut self) -> RxruntfisW { + pub fn rxruntfis(&mut self) -> RxruntfisW<'_, MmcIntrRxSpec> { RxruntfisW::new(self, 7) } #[doc = "Bit 8 - MMC Receive Jabber Error Frame Counter Interrupt Status"] #[inline(always)] - pub fn rxjaberfis(&mut self) -> RxjaberfisW { + pub fn rxjaberfis(&mut self) -> RxjaberfisW<'_, MmcIntrRxSpec> { RxjaberfisW::new(self, 8) } #[doc = "Bit 9 - MMC Receive Undersize Good Frame Counter Interrupt Status"] #[inline(always)] - pub fn rxusizegfis(&mut self) -> RxusizegfisW { + pub fn rxusizegfis(&mut self) -> RxusizegfisW<'_, MmcIntrRxSpec> { RxusizegfisW::new(self, 9) } #[doc = "Bit 10 - MMC Receive Oversize Good Frame Counter Interrupt Status"] #[inline(always)] - pub fn rxosizegfis(&mut self) -> RxosizegfisW { + pub fn rxosizegfis(&mut self) -> RxosizegfisW<'_, MmcIntrRxSpec> { RxosizegfisW::new(self, 10) } #[doc = "Bit 11 - MMC Receive 64 Octet Good Bad Frame Counter Interrupt Status"] #[inline(always)] - pub fn rx64octgbfis(&mut self) -> Rx64octgbfisW { + pub fn rx64octgbfis(&mut self) -> Rx64octgbfisW<'_, MmcIntrRxSpec> { Rx64octgbfisW::new(self, 11) } #[doc = "Bit 12 - MMC Receive 65 to 127 Octet Good Bad Frame Counter Interrupt Status"] #[inline(always)] - pub fn rx65t127octgbfis(&mut self) -> Rx65t127octgbfisW { + pub fn rx65t127octgbfis(&mut self) -> Rx65t127octgbfisW<'_, MmcIntrRxSpec> { Rx65t127octgbfisW::new(self, 12) } #[doc = "Bit 13 - MMC Receive 128 to 255 Octet Good Bad Frame Counter Interrupt Status"] #[inline(always)] - pub fn rx128t255octgbfis(&mut self) -> Rx128t255octgbfisW { + pub fn rx128t255octgbfis(&mut self) -> Rx128t255octgbfisW<'_, MmcIntrRxSpec> { Rx128t255octgbfisW::new(self, 13) } #[doc = "Bit 14 - MMC Receive 256 to 511 Octet Good Bad Frame Counter Interrupt Status"] #[inline(always)] - pub fn rx256t511octgbfis(&mut self) -> Rx256t511octgbfisW { + pub fn rx256t511octgbfis(&mut self) -> Rx256t511octgbfisW<'_, MmcIntrRxSpec> { Rx256t511octgbfisW::new(self, 14) } #[doc = "Bit 15 - MMC Receive 512 to 1023 Octet Good Bad Frame Counter Interrupt Status"] #[inline(always)] - pub fn rx512t1023octgbfis(&mut self) -> Rx512t1023octgbfisW { + pub fn rx512t1023octgbfis(&mut self) -> Rx512t1023octgbfisW<'_, MmcIntrRxSpec> { Rx512t1023octgbfisW::new(self, 15) } #[doc = "Bit 16 - MMC Receive 1024 to Maximum Octet Good Bad Frame Counter Interrupt Status."] #[inline(always)] - pub fn rx1024tmaxoctgbfis(&mut self) -> Rx1024tmaxoctgbfisW { + pub fn rx1024tmaxoctgbfis(&mut self) -> Rx1024tmaxoctgbfisW<'_, MmcIntrRxSpec> { Rx1024tmaxoctgbfisW::new(self, 16) } #[doc = "Bit 17 - MMC Receive Unicast Good Frame Counter Interrupt Status"] #[inline(always)] - pub fn rxucgfis(&mut self) -> RxucgfisW { + pub fn rxucgfis(&mut self) -> RxucgfisW<'_, MmcIntrRxSpec> { RxucgfisW::new(self, 17) } #[doc = "Bit 18 - MMC Receive Length Error Frame Counter Interrupt Status"] #[inline(always)] - pub fn rxlenerfis(&mut self) -> RxlenerfisW { + pub fn rxlenerfis(&mut self) -> RxlenerfisW<'_, MmcIntrRxSpec> { RxlenerfisW::new(self, 18) } #[doc = "Bit 19 - MMC Receive Out Of Range Error Frame Counter Interrupt Status."] #[inline(always)] - pub fn rxorangefis(&mut self) -> RxorangefisW { + pub fn rxorangefis(&mut self) -> RxorangefisW<'_, MmcIntrRxSpec> { RxorangefisW::new(self, 19) } #[doc = "Bit 20 - MMC Receive Pause Frame Counter Interrupt Status"] #[inline(always)] - pub fn rxpausfis(&mut self) -> RxpausfisW { + pub fn rxpausfis(&mut self) -> RxpausfisW<'_, MmcIntrRxSpec> { RxpausfisW::new(self, 20) } #[doc = "Bit 21 - MMC Receive FIFO Overflow Frame Counter Interrupt Status"] #[inline(always)] - pub fn rxfovfis(&mut self) -> RxfovfisW { + pub fn rxfovfis(&mut self) -> RxfovfisW<'_, MmcIntrRxSpec> { RxfovfisW::new(self, 21) } #[doc = "Bit 22 - MMC Receive VLAN Good Bad Frame Counter Interrupt Status"] #[inline(always)] - pub fn rxvlangbfis(&mut self) -> RxvlangbfisW { + pub fn rxvlangbfis(&mut self) -> RxvlangbfisW<'_, MmcIntrRxSpec> { RxvlangbfisW::new(self, 22) } #[doc = "Bit 23 - MMC Receive Watchdog Error Frame Counter Interrupt Status"] #[inline(always)] - pub fn rxwdogfis(&mut self) -> RxwdogfisW { + pub fn rxwdogfis(&mut self) -> RxwdogfisW<'_, MmcIntrRxSpec> { RxwdogfisW::new(self, 23) } #[doc = "Bit 24 - MMC Receive Error Frame Counter Interrupt Status"] #[inline(always)] - pub fn rxrcverrfis(&mut self) -> RxrcverrfisW { + pub fn rxrcverrfis(&mut self) -> RxrcverrfisW<'_, MmcIntrRxSpec> { RxrcverrfisW::new(self, 24) } #[doc = "Bit 25 - MMC Receive Control Frame Counter Interrupt Status"] #[inline(always)] - pub fn rxctrlfis(&mut self) -> RxctrlfisW { + pub fn rxctrlfis(&mut self) -> RxctrlfisW<'_, MmcIntrRxSpec> { RxctrlfisW::new(self, 25) } } @@ -380,10 +380,6 @@ impl crate::Readable for MmcIntrRxSpec {} #[doc = "`write(|w| ..)` method takes [`mmc_intr_rx::W`](W) writer structure"] impl crate::Writable for MmcIntrRxSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MMC_INTR_RX to value 0"] -impl crate::Resettable for MmcIntrRxSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for MmcIntrRxSpec {} diff --git a/va416xx/src/eth/mmc_intr_tx.rs b/va416xx/src/eth/mmc_intr_tx.rs index a0c5c9f..9568ba7 100644 --- a/va416xx/src/eth/mmc_intr_tx.rs +++ b/va416xx/src/eth/mmc_intr_tx.rs @@ -241,132 +241,132 @@ impl R { impl W { #[doc = "Bit 0 - MMC Transmit Good Bad Octet Counter Interrupt Status"] #[inline(always)] - pub fn txgboctis(&mut self) -> TxgboctisW { + pub fn txgboctis(&mut self) -> TxgboctisW<'_, MmcIntrTxSpec> { TxgboctisW::new(self, 0) } #[doc = "Bit 1 - MMC Transmit Good Bad Frame Counter Interrupt Status"] #[inline(always)] - pub fn txgbfrmis(&mut self) -> TxgbfrmisW { + pub fn txgbfrmis(&mut self) -> TxgbfrmisW<'_, MmcIntrTxSpec> { TxgbfrmisW::new(self, 1) } #[doc = "Bit 2 - MMC Transmit Broadcast Good Frame Counter Interrupt Status"] #[inline(always)] - pub fn txbcgfis(&mut self) -> TxbcgfisW { + pub fn txbcgfis(&mut self) -> TxbcgfisW<'_, MmcIntrTxSpec> { TxbcgfisW::new(self, 2) } #[doc = "Bit 3 - MMC Transmit Multicast Good Frame Counter Interrupt Status"] #[inline(always)] - pub fn txmcgfis(&mut self) -> TxmcgfisW { + pub fn txmcgfis(&mut self) -> TxmcgfisW<'_, MmcIntrTxSpec> { TxmcgfisW::new(self, 3) } #[doc = "Bit 4 - MMC Transmit 64 Octet Good Bad Frame Counter Interrupt Status"] #[inline(always)] - pub fn tx64octgbfis(&mut self) -> Tx64octgbfisW { + pub fn tx64octgbfis(&mut self) -> Tx64octgbfisW<'_, MmcIntrTxSpec> { Tx64octgbfisW::new(self, 4) } #[doc = "Bit 5 - MMC Transmit 65 to 127 Octet Good Bad Frame Counter Interrupt Status"] #[inline(always)] - pub fn tx65t127octgbfis(&mut self) -> Tx65t127octgbfisW { + pub fn tx65t127octgbfis(&mut self) -> Tx65t127octgbfisW<'_, MmcIntrTxSpec> { Tx65t127octgbfisW::new(self, 5) } #[doc = "Bit 6 - MMC Transmit 128 to 255 Octet Good Bad Frame Counter Interrupt Status"] #[inline(always)] - pub fn tx128t255octgbfis(&mut self) -> Tx128t255octgbfisW { + pub fn tx128t255octgbfis(&mut self) -> Tx128t255octgbfisW<'_, MmcIntrTxSpec> { Tx128t255octgbfisW::new(self, 6) } #[doc = "Bit 7 - MMC Transmit 256 to 511 Octet Good Bad Frame Counter Interrupt Status"] #[inline(always)] - pub fn tx256t511octgbfis(&mut self) -> Tx256t511octgbfisW { + pub fn tx256t511octgbfis(&mut self) -> Tx256t511octgbfisW<'_, MmcIntrTxSpec> { Tx256t511octgbfisW::new(self, 7) } #[doc = "Bit 8 - MMC Transmit 512 to 1023 Octet Good Bad Frame Counter Interrupt Status"] #[inline(always)] - pub fn tx512t1023octgbfis(&mut self) -> Tx512t1023octgbfisW { + pub fn tx512t1023octgbfis(&mut self) -> Tx512t1023octgbfisW<'_, MmcIntrTxSpec> { Tx512t1023octgbfisW::new(self, 8) } #[doc = "Bit 9 - MMC Transmit 1024 to Maximum Octet Good Bad Frame Counter"] #[inline(always)] - pub fn tx1024tmaxoctgbfis(&mut self) -> Tx1024tmaxoctgbfisW { + pub fn tx1024tmaxoctgbfis(&mut self) -> Tx1024tmaxoctgbfisW<'_, MmcIntrTxSpec> { Tx1024tmaxoctgbfisW::new(self, 9) } #[doc = "Bit 10 - MMC Transmit Unicast Good Bad Frame Counter Interrupt Status"] #[inline(always)] - pub fn txucgbfis(&mut self) -> TxucgbfisW { + pub fn txucgbfis(&mut self) -> TxucgbfisW<'_, MmcIntrTxSpec> { TxucgbfisW::new(self, 10) } #[doc = "Bit 11 - MMC Transmit Multicast Good Bad Frame Counter Interrupt Status"] #[inline(always)] - pub fn txmcgbfis(&mut self) -> TxmcgbfisW { + pub fn txmcgbfis(&mut self) -> TxmcgbfisW<'_, MmcIntrTxSpec> { TxmcgbfisW::new(self, 11) } #[doc = "Bit 12 - MMC Transmit Broadcast Good Bad Frame Counter Interrupt Status"] #[inline(always)] - pub fn txbcgbfis(&mut self) -> TxbcgbfisW { + pub fn txbcgbfis(&mut self) -> TxbcgbfisW<'_, MmcIntrTxSpec> { TxbcgbfisW::new(self, 12) } #[doc = "Bit 13 - MMC Transmit Underflow Error Frame Counter Interrupt Status"] #[inline(always)] - pub fn txuflowerfis(&mut self) -> TxuflowerfisW { + pub fn txuflowerfis(&mut self) -> TxuflowerfisW<'_, MmcIntrTxSpec> { TxuflowerfisW::new(self, 13) } #[doc = "Bit 14 - MMC Transmit Single Collision Good Frame Counter Interrupt Status"] #[inline(always)] - pub fn txscolgfis(&mut self) -> TxscolgfisW { + pub fn txscolgfis(&mut self) -> TxscolgfisW<'_, MmcIntrTxSpec> { TxscolgfisW::new(self, 14) } #[doc = "Bit 15 - MMC Transmit Multiple Collision Good Frame Counter Interrupt Status"] #[inline(always)] - pub fn txmcolgfis(&mut self) -> TxmcolgfisW { + pub fn txmcolgfis(&mut self) -> TxmcolgfisW<'_, MmcIntrTxSpec> { TxmcolgfisW::new(self, 15) } #[doc = "Bit 16 - MMC Transmit Deferred Frame Counter Interrupt Status"] #[inline(always)] - pub fn txdeffis(&mut self) -> TxdeffisW { + pub fn txdeffis(&mut self) -> TxdeffisW<'_, MmcIntrTxSpec> { TxdeffisW::new(self, 16) } #[doc = "Bit 17 - MMC Transmit Late Collision Frame Counter Interrupt Status"] #[inline(always)] - pub fn txlatcolfis(&mut self) -> TxlatcolfisW { + pub fn txlatcolfis(&mut self) -> TxlatcolfisW<'_, MmcIntrTxSpec> { TxlatcolfisW::new(self, 17) } #[doc = "Bit 18 - MMC Transmit Excessive Collision Frame Counter Interrupt Status"] #[inline(always)] - pub fn txexcolfis(&mut self) -> TxexcolfisW { + pub fn txexcolfis(&mut self) -> TxexcolfisW<'_, MmcIntrTxSpec> { TxexcolfisW::new(self, 18) } #[doc = "Bit 19 - MMC Transmit Carrier Error Frame Counter Interrupt Status"] #[inline(always)] - pub fn txcarerfis(&mut self) -> TxcarerfisW { + pub fn txcarerfis(&mut self) -> TxcarerfisW<'_, MmcIntrTxSpec> { TxcarerfisW::new(self, 19) } #[doc = "Bit 20 - MMC Transmit Good Octet Counter Interrupt Status"] #[inline(always)] - pub fn txgoctis(&mut self) -> TxgoctisW { + pub fn txgoctis(&mut self) -> TxgoctisW<'_, MmcIntrTxSpec> { TxgoctisW::new(self, 20) } #[doc = "Bit 21 - MMC Transmit Good Frame Counter Interrupt Status"] #[inline(always)] - pub fn txgfrmis(&mut self) -> TxgfrmisW { + pub fn txgfrmis(&mut self) -> TxgfrmisW<'_, MmcIntrTxSpec> { TxgfrmisW::new(self, 21) } #[doc = "Bit 22 - MMC Transmit Excessive Deferral Frame Counter Interrupt Status"] #[inline(always)] - pub fn txexdeffis(&mut self) -> TxexdeffisW { + pub fn txexdeffis(&mut self) -> TxexdeffisW<'_, MmcIntrTxSpec> { TxexdeffisW::new(self, 22) } #[doc = "Bit 23 - MMC Transmit Pause Frame Counter Interrupt Status"] #[inline(always)] - pub fn txpausfis(&mut self) -> TxpausfisW { + pub fn txpausfis(&mut self) -> TxpausfisW<'_, MmcIntrTxSpec> { TxpausfisW::new(self, 23) } #[doc = "Bit 24 - MMC Transmit VLAN Good Frame Counter Interrupt Status"] #[inline(always)] - pub fn txvlangfis(&mut self) -> TxvlangfisW { + pub fn txvlangfis(&mut self) -> TxvlangfisW<'_, MmcIntrTxSpec> { TxvlangfisW::new(self, 24) } #[doc = "Bit 25 - MMC Transmit Oversize Good Frame Counter Interrupt Status"] #[inline(always)] - pub fn txosizegfis(&mut self) -> TxosizegfisW { + pub fn txosizegfis(&mut self) -> TxosizegfisW<'_, MmcIntrTxSpec> { TxosizegfisW::new(self, 25) } } @@ -380,10 +380,6 @@ impl crate::Readable for MmcIntrTxSpec {} #[doc = "`write(|w| ..)` method takes [`mmc_intr_tx::W`](W) writer structure"] impl crate::Writable for MmcIntrTxSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MMC_INTR_TX to value 0"] -impl crate::Resettable for MmcIntrTxSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for MmcIntrTxSpec {} diff --git a/va416xx/src/eth/rx1024maxoct_gb.rs b/va416xx/src/eth/rx1024maxoct_gb.rs index 973a1cb..38155b6 100644 --- a/va416xx/src/eth/rx1024maxoct_gb.rs +++ b/va416xx/src/eth/rx1024maxoct_gb.rs @@ -17,6 +17,4 @@ impl crate::RegisterSpec for Rx1024maxoctGbSpec { #[doc = "`read()` method returns [`rx1024maxoct_gb::R`](R) reader structure"] impl crate::Readable for Rx1024maxoctGbSpec {} #[doc = "`reset()` method sets RX1024MAXOCT_GB to value 0"] -impl crate::Resettable for Rx1024maxoctGbSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Rx1024maxoctGbSpec {} diff --git a/va416xx/src/eth/rx128to255oct_gb.rs b/va416xx/src/eth/rx128to255oct_gb.rs index f6ecf1b..3c83a73 100644 --- a/va416xx/src/eth/rx128to255oct_gb.rs +++ b/va416xx/src/eth/rx128to255oct_gb.rs @@ -17,6 +17,4 @@ impl crate::RegisterSpec for Rx128to255octGbSpec { #[doc = "`read()` method returns [`rx128to255oct_gb::R`](R) reader structure"] impl crate::Readable for Rx128to255octGbSpec {} #[doc = "`reset()` method sets RX128TO255OCT_GB to value 0"] -impl crate::Resettable for Rx128to255octGbSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Rx128to255octGbSpec {} diff --git a/va416xx/src/eth/rx256to511oct_gb.rs b/va416xx/src/eth/rx256to511oct_gb.rs index bf94996..d7715f2 100644 --- a/va416xx/src/eth/rx256to511oct_gb.rs +++ b/va416xx/src/eth/rx256to511oct_gb.rs @@ -17,6 +17,4 @@ impl crate::RegisterSpec for Rx256to511octGbSpec { #[doc = "`read()` method returns [`rx256to511oct_gb::R`](R) reader structure"] impl crate::Readable for Rx256to511octGbSpec {} #[doc = "`reset()` method sets RX256TO511OCT_GB to value 0"] -impl crate::Resettable for Rx256to511octGbSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Rx256to511octGbSpec {} diff --git a/va416xx/src/eth/rx512to1023oct_gb.rs b/va416xx/src/eth/rx512to1023oct_gb.rs index 007665c..6302214 100644 --- a/va416xx/src/eth/rx512to1023oct_gb.rs +++ b/va416xx/src/eth/rx512to1023oct_gb.rs @@ -17,6 +17,4 @@ impl crate::RegisterSpec for Rx512to1023octGbSpec { #[doc = "`read()` method returns [`rx512to1023oct_gb::R`](R) reader structure"] impl crate::Readable for Rx512to1023octGbSpec {} #[doc = "`reset()` method sets RX512TO1023OCT_GB to value 0"] -impl crate::Resettable for Rx512to1023octGbSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Rx512to1023octGbSpec {} diff --git a/va416xx/src/eth/rx64octets_gb.rs b/va416xx/src/eth/rx64octets_gb.rs index 406c7a8..b6b6e8e 100644 --- a/va416xx/src/eth/rx64octets_gb.rs +++ b/va416xx/src/eth/rx64octets_gb.rs @@ -17,6 +17,4 @@ impl crate::RegisterSpec for Rx64octetsGbSpec { #[doc = "`read()` method returns [`rx64octets_gb::R`](R) reader structure"] impl crate::Readable for Rx64octetsGbSpec {} #[doc = "`reset()` method sets RX64OCTETS_GB to value 0"] -impl crate::Resettable for Rx64octetsGbSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Rx64octetsGbSpec {} diff --git a/va416xx/src/eth/rx65to127oct_gb.rs b/va416xx/src/eth/rx65to127oct_gb.rs index 1eda28b..46bb567 100644 --- a/va416xx/src/eth/rx65to127oct_gb.rs +++ b/va416xx/src/eth/rx65to127oct_gb.rs @@ -17,6 +17,4 @@ impl crate::RegisterSpec for Rx65to127octGbSpec { #[doc = "`read()` method returns [`rx65to127oct_gb::R`](R) reader structure"] impl crate::Readable for Rx65to127octGbSpec {} #[doc = "`reset()` method sets RX65TO127OCT_GB to value 0"] -impl crate::Resettable for Rx65to127octGbSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Rx65to127octGbSpec {} diff --git a/va416xx/src/eth/rxalignerror.rs b/va416xx/src/eth/rxalignerror.rs index 6ead57a..d7e1a53 100644 --- a/va416xx/src/eth/rxalignerror.rs +++ b/va416xx/src/eth/rxalignerror.rs @@ -17,6 +17,4 @@ impl crate::RegisterSpec for RxalignerrorSpec { #[doc = "`read()` method returns [`rxalignerror::R`](R) reader structure"] impl crate::Readable for RxalignerrorSpec {} #[doc = "`reset()` method sets RXALIGNERROR to value 0"] -impl crate::Resettable for RxalignerrorSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for RxalignerrorSpec {} diff --git a/va416xx/src/eth/rxbcastframes_g.rs b/va416xx/src/eth/rxbcastframes_g.rs index 183d726..391acb5 100644 --- a/va416xx/src/eth/rxbcastframes_g.rs +++ b/va416xx/src/eth/rxbcastframes_g.rs @@ -17,6 +17,4 @@ impl crate::RegisterSpec for RxbcastframesGSpec { #[doc = "`read()` method returns [`rxbcastframes_g::R`](R) reader structure"] impl crate::Readable for RxbcastframesGSpec {} #[doc = "`reset()` method sets RXBCASTFRAMES_G to value 0"] -impl crate::Resettable for RxbcastframesGSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for RxbcastframesGSpec {} diff --git a/va416xx/src/eth/rxcrcerror.rs b/va416xx/src/eth/rxcrcerror.rs index e5177ad..822579c 100644 --- a/va416xx/src/eth/rxcrcerror.rs +++ b/va416xx/src/eth/rxcrcerror.rs @@ -17,6 +17,4 @@ impl crate::RegisterSpec for RxcrcerrorSpec { #[doc = "`read()` method returns [`rxcrcerror::R`](R) reader structure"] impl crate::Readable for RxcrcerrorSpec {} #[doc = "`reset()` method sets RXCRCERROR to value 0"] -impl crate::Resettable for RxcrcerrorSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for RxcrcerrorSpec {} diff --git a/va416xx/src/eth/rxctrlframes_g.rs b/va416xx/src/eth/rxctrlframes_g.rs index d82c2a3..d861e72 100644 --- a/va416xx/src/eth/rxctrlframes_g.rs +++ b/va416xx/src/eth/rxctrlframes_g.rs @@ -17,6 +17,4 @@ impl crate::RegisterSpec for RxctrlframesGSpec { #[doc = "`read()` method returns [`rxctrlframes_g::R`](R) reader structure"] impl crate::Readable for RxctrlframesGSpec {} #[doc = "`reset()` method sets RXCTRLFRAMES_G to value 0"] -impl crate::Resettable for RxctrlframesGSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for RxctrlframesGSpec {} diff --git a/va416xx/src/eth/rxfifooverflow.rs b/va416xx/src/eth/rxfifooverflow.rs index c2b2c85..78d5815 100644 --- a/va416xx/src/eth/rxfifooverflow.rs +++ b/va416xx/src/eth/rxfifooverflow.rs @@ -17,6 +17,4 @@ impl crate::RegisterSpec for RxfifooverflowSpec { #[doc = "`read()` method returns [`rxfifooverflow::R`](R) reader structure"] impl crate::Readable for RxfifooverflowSpec {} #[doc = "`reset()` method sets RXFIFOOVERFLOW to value 0"] -impl crate::Resettable for RxfifooverflowSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for RxfifooverflowSpec {} diff --git a/va416xx/src/eth/rxframecount_gb.rs b/va416xx/src/eth/rxframecount_gb.rs index 4d77b47..c2a0ff2 100644 --- a/va416xx/src/eth/rxframecount_gb.rs +++ b/va416xx/src/eth/rxframecount_gb.rs @@ -17,6 +17,4 @@ impl crate::RegisterSpec for RxframecountGbSpec { #[doc = "`read()` method returns [`rxframecount_gb::R`](R) reader structure"] impl crate::Readable for RxframecountGbSpec {} #[doc = "`reset()` method sets RXFRAMECOUNT_GB to value 0"] -impl crate::Resettable for RxframecountGbSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for RxframecountGbSpec {} diff --git a/va416xx/src/eth/rxjabbererror.rs b/va416xx/src/eth/rxjabbererror.rs index 98a494d..01461c6 100644 --- a/va416xx/src/eth/rxjabbererror.rs +++ b/va416xx/src/eth/rxjabbererror.rs @@ -17,6 +17,4 @@ impl crate::RegisterSpec for RxjabbererrorSpec { #[doc = "`read()` method returns [`rxjabbererror::R`](R) reader structure"] impl crate::Readable for RxjabbererrorSpec {} #[doc = "`reset()` method sets RXJABBERERROR to value 0"] -impl crate::Resettable for RxjabbererrorSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for RxjabbererrorSpec {} diff --git a/va416xx/src/eth/rxlengtherror.rs b/va416xx/src/eth/rxlengtherror.rs index 7dc8c42..96da0c3 100644 --- a/va416xx/src/eth/rxlengtherror.rs +++ b/va416xx/src/eth/rxlengtherror.rs @@ -17,6 +17,4 @@ impl crate::RegisterSpec for RxlengtherrorSpec { #[doc = "`read()` method returns [`rxlengtherror::R`](R) reader structure"] impl crate::Readable for RxlengtherrorSpec {} #[doc = "`reset()` method sets RXLENGTHERROR to value 0"] -impl crate::Resettable for RxlengtherrorSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for RxlengtherrorSpec {} diff --git a/va416xx/src/eth/rxmcastframes_g.rs b/va416xx/src/eth/rxmcastframes_g.rs index de4162d..98a5384 100644 --- a/va416xx/src/eth/rxmcastframes_g.rs +++ b/va416xx/src/eth/rxmcastframes_g.rs @@ -17,6 +17,4 @@ impl crate::RegisterSpec for RxmcastframesGSpec { #[doc = "`read()` method returns [`rxmcastframes_g::R`](R) reader structure"] impl crate::Readable for RxmcastframesGSpec {} #[doc = "`reset()` method sets RXMCASTFRAMES_G to value 0"] -impl crate::Resettable for RxmcastframesGSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for RxmcastframesGSpec {} diff --git a/va416xx/src/eth/rxoctetcount_g.rs b/va416xx/src/eth/rxoctetcount_g.rs index dc4e62d..ec8babd 100644 --- a/va416xx/src/eth/rxoctetcount_g.rs +++ b/va416xx/src/eth/rxoctetcount_g.rs @@ -17,6 +17,4 @@ impl crate::RegisterSpec for RxoctetcountGSpec { #[doc = "`read()` method returns [`rxoctetcount_g::R`](R) reader structure"] impl crate::Readable for RxoctetcountGSpec {} #[doc = "`reset()` method sets RXOCTETCOUNT_G to value 0"] -impl crate::Resettable for RxoctetcountGSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for RxoctetcountGSpec {} diff --git a/va416xx/src/eth/rxoctetcount_gb.rs b/va416xx/src/eth/rxoctetcount_gb.rs index 4c8f772..29968e0 100644 --- a/va416xx/src/eth/rxoctetcount_gb.rs +++ b/va416xx/src/eth/rxoctetcount_gb.rs @@ -17,6 +17,4 @@ impl crate::RegisterSpec for RxoctetcountGbSpec { #[doc = "`read()` method returns [`rxoctetcount_gb::R`](R) reader structure"] impl crate::Readable for RxoctetcountGbSpec {} #[doc = "`reset()` method sets RXOCTETCOUNT_GB to value 0"] -impl crate::Resettable for RxoctetcountGbSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for RxoctetcountGbSpec {} diff --git a/va416xx/src/eth/rxoutrangetype.rs b/va416xx/src/eth/rxoutrangetype.rs index dad61a0..2359618 100644 --- a/va416xx/src/eth/rxoutrangetype.rs +++ b/va416xx/src/eth/rxoutrangetype.rs @@ -17,6 +17,4 @@ impl crate::RegisterSpec for RxoutrangetypeSpec { #[doc = "`read()` method returns [`rxoutrangetype::R`](R) reader structure"] impl crate::Readable for RxoutrangetypeSpec {} #[doc = "`reset()` method sets RXOUTRANGETYPE to value 0"] -impl crate::Resettable for RxoutrangetypeSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for RxoutrangetypeSpec {} diff --git a/va416xx/src/eth/rxoversize_g.rs b/va416xx/src/eth/rxoversize_g.rs index 31bcefb..389064c 100644 --- a/va416xx/src/eth/rxoversize_g.rs +++ b/va416xx/src/eth/rxoversize_g.rs @@ -17,6 +17,4 @@ impl crate::RegisterSpec for RxoversizeGSpec { #[doc = "`read()` method returns [`rxoversize_g::R`](R) reader structure"] impl crate::Readable for RxoversizeGSpec {} #[doc = "`reset()` method sets RXOVERSIZE_G to value 0"] -impl crate::Resettable for RxoversizeGSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for RxoversizeGSpec {} diff --git a/va416xx/src/eth/rxpauseframes.rs b/va416xx/src/eth/rxpauseframes.rs index 268e479..b95ac05 100644 --- a/va416xx/src/eth/rxpauseframes.rs +++ b/va416xx/src/eth/rxpauseframes.rs @@ -17,6 +17,4 @@ impl crate::RegisterSpec for RxpauseframesSpec { #[doc = "`read()` method returns [`rxpauseframes::R`](R) reader structure"] impl crate::Readable for RxpauseframesSpec {} #[doc = "`reset()` method sets RXPAUSEFRAMES to value 0"] -impl crate::Resettable for RxpauseframesSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for RxpauseframesSpec {} diff --git a/va416xx/src/eth/rxrcverror.rs b/va416xx/src/eth/rxrcverror.rs index f338ecb..249abe4 100644 --- a/va416xx/src/eth/rxrcverror.rs +++ b/va416xx/src/eth/rxrcverror.rs @@ -17,6 +17,4 @@ impl crate::RegisterSpec for RxrcverrorSpec { #[doc = "`read()` method returns [`rxrcverror::R`](R) reader structure"] impl crate::Readable for RxrcverrorSpec {} #[doc = "`reset()` method sets RXRCVERROR to value 0"] -impl crate::Resettable for RxrcverrorSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for RxrcverrorSpec {} diff --git a/va416xx/src/eth/rxrunterror.rs b/va416xx/src/eth/rxrunterror.rs index 1e25d06..d1054cc 100644 --- a/va416xx/src/eth/rxrunterror.rs +++ b/va416xx/src/eth/rxrunterror.rs @@ -17,6 +17,4 @@ impl crate::RegisterSpec for RxrunterrorSpec { #[doc = "`read()` method returns [`rxrunterror::R`](R) reader structure"] impl crate::Readable for RxrunterrorSpec {} #[doc = "`reset()` method sets RXRUNTERROR to value 0"] -impl crate::Resettable for RxrunterrorSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for RxrunterrorSpec {} diff --git a/va416xx/src/eth/rxucastframes_g.rs b/va416xx/src/eth/rxucastframes_g.rs index 064ad7e..3b6517f 100644 --- a/va416xx/src/eth/rxucastframes_g.rs +++ b/va416xx/src/eth/rxucastframes_g.rs @@ -17,6 +17,4 @@ impl crate::RegisterSpec for RxucastframesGSpec { #[doc = "`read()` method returns [`rxucastframes_g::R`](R) reader structure"] impl crate::Readable for RxucastframesGSpec {} #[doc = "`reset()` method sets RXUCASTFRAMES_G to value 0"] -impl crate::Resettable for RxucastframesGSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for RxucastframesGSpec {} diff --git a/va416xx/src/eth/rxundersize_g.rs b/va416xx/src/eth/rxundersize_g.rs index 57f45ae..c2b2499 100644 --- a/va416xx/src/eth/rxundersize_g.rs +++ b/va416xx/src/eth/rxundersize_g.rs @@ -17,6 +17,4 @@ impl crate::RegisterSpec for RxundersizeGSpec { #[doc = "`read()` method returns [`rxundersize_g::R`](R) reader structure"] impl crate::Readable for RxundersizeGSpec {} #[doc = "`reset()` method sets RXUNDERSIZE_G to value 0"] -impl crate::Resettable for RxundersizeGSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for RxundersizeGSpec {} diff --git a/va416xx/src/eth/rxvlanframes_gb.rs b/va416xx/src/eth/rxvlanframes_gb.rs index fa7385a..112feea 100644 --- a/va416xx/src/eth/rxvlanframes_gb.rs +++ b/va416xx/src/eth/rxvlanframes_gb.rs @@ -17,6 +17,4 @@ impl crate::RegisterSpec for RxvlanframesGbSpec { #[doc = "`read()` method returns [`rxvlanframes_gb::R`](R) reader structure"] impl crate::Readable for RxvlanframesGbSpec {} #[doc = "`reset()` method sets RXVLANFRAMES_GB to value 0"] -impl crate::Resettable for RxvlanframesGbSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for RxvlanframesGbSpec {} diff --git a/va416xx/src/eth/rxwdogerror.rs b/va416xx/src/eth/rxwdogerror.rs index a10371c..80931b0 100644 --- a/va416xx/src/eth/rxwdogerror.rs +++ b/va416xx/src/eth/rxwdogerror.rs @@ -17,6 +17,4 @@ impl crate::RegisterSpec for RxwdogerrorSpec { #[doc = "`read()` method returns [`rxwdogerror::R`](R) reader structure"] impl crate::Readable for RxwdogerrorSpec {} #[doc = "`reset()` method sets RXWDOGERROR to value 0"] -impl crate::Resettable for RxwdogerrorSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for RxwdogerrorSpec {} diff --git a/va416xx/src/eth/subsec_inc.rs b/va416xx/src/eth/subsec_inc.rs index f1b6bd1..ac4b267 100644 --- a/va416xx/src/eth/subsec_inc.rs +++ b/va416xx/src/eth/subsec_inc.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:7 - Sub-Second Increment Valuee"] #[inline(always)] - pub fn ssinc(&mut self) -> SsincW { + pub fn ssinc(&mut self) -> SsincW<'_, SubsecIncSpec> { SsincW::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for SubsecIncSpec {} #[doc = "`write(|w| ..)` method takes [`subsec_inc::W`](W) writer structure"] impl crate::Writable for SubsecIncSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SUBSEC_INC to value 0"] -impl crate::Resettable for SubsecIncSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for SubsecIncSpec {} diff --git a/va416xx/src/eth/systime_nanosec.rs b/va416xx/src/eth/systime_nanosec.rs index b2bcf07..929a0f7 100644 --- a/va416xx/src/eth/systime_nanosec.rs +++ b/va416xx/src/eth/systime_nanosec.rs @@ -17,6 +17,4 @@ impl crate::RegisterSpec for SystimeNanosecSpec { #[doc = "`read()` method returns [`systime_nanosec::R`](R) reader structure"] impl crate::Readable for SystimeNanosecSpec {} #[doc = "`reset()` method sets SYSTIME_NANOSEC to value 0"] -impl crate::Resettable for SystimeNanosecSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for SystimeNanosecSpec {} diff --git a/va416xx/src/eth/systime_nsecup.rs b/va416xx/src/eth/systime_nsecup.rs index 8bbbbaf..ded6a5c 100644 --- a/va416xx/src/eth/systime_nsecup.rs +++ b/va416xx/src/eth/systime_nsecup.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:30 - Timestamp Sub Seconds"] #[inline(always)] - pub fn tsss(&mut self) -> TsssW { + pub fn tsss(&mut self) -> TsssW<'_, SystimeNsecupSpec> { TsssW::new(self, 0) } #[doc = "Bit 31 - Add or Subtract Time"] #[inline(always)] - pub fn addsub(&mut self) -> AddsubW { + pub fn addsub(&mut self) -> AddsubW<'_, SystimeNsecupSpec> { AddsubW::new(self, 31) } } @@ -44,10 +44,6 @@ impl crate::Readable for SystimeNsecupSpec {} #[doc = "`write(|w| ..)` method takes [`systime_nsecup::W`](W) writer structure"] impl crate::Writable for SystimeNsecupSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SYSTIME_NSECUP to value 0"] -impl crate::Resettable for SystimeNsecupSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for SystimeNsecupSpec {} diff --git a/va416xx/src/eth/systime_seconds.rs b/va416xx/src/eth/systime_seconds.rs index c902101..e9b0a4b 100644 --- a/va416xx/src/eth/systime_seconds.rs +++ b/va416xx/src/eth/systime_seconds.rs @@ -17,6 +17,4 @@ impl crate::RegisterSpec for SystimeSecondsSpec { #[doc = "`read()` method returns [`systime_seconds::R`](R) reader structure"] impl crate::Readable for SystimeSecondsSpec {} #[doc = "`reset()` method sets SYSTIME_SECONDS to value 0"] -impl crate::Resettable for SystimeSecondsSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for SystimeSecondsSpec {} diff --git a/va416xx/src/eth/systime_secsupdat.rs b/va416xx/src/eth/systime_secsupdat.rs index 09b3fba..9517922 100644 --- a/va416xx/src/eth/systime_secsupdat.rs +++ b/va416xx/src/eth/systime_secsupdat.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:31 - Timestamp Second"] #[inline(always)] - pub fn tss(&mut self) -> TssW { + pub fn tss(&mut self) -> TssW<'_, SystimeSecsupdatSpec> { TssW::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for SystimeSecsupdatSpec {} #[doc = "`write(|w| ..)` method takes [`systime_secsupdat::W`](W) writer structure"] impl crate::Writable for SystimeSecsupdatSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SYSTIME_SECSUPDAT to value 0"] -impl crate::Resettable for SystimeSecsupdatSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for SystimeSecsupdatSpec {} diff --git a/va416xx/src/eth/target_time_nsec.rs b/va416xx/src/eth/target_time_nsec.rs index dd3834d..7c9e49e 100644 --- a/va416xx/src/eth/target_time_nsec.rs +++ b/va416xx/src/eth/target_time_nsec.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:30 - Target Timestamp Low Register"] #[inline(always)] - pub fn ttslo(&mut self) -> TtsloW { + pub fn ttslo(&mut self) -> TtsloW<'_, TargetTimeNsecSpec> { TtsloW::new(self, 0) } #[doc = "Bit 31 - 32 Bits of Hash Table"] #[inline(always)] - pub fn trgtbusy(&mut self) -> TrgtbusyW { + pub fn trgtbusy(&mut self) -> TrgtbusyW<'_, TargetTimeNsecSpec> { TrgtbusyW::new(self, 31) } } @@ -44,10 +44,6 @@ impl crate::Readable for TargetTimeNsecSpec {} #[doc = "`write(|w| ..)` method takes [`target_time_nsec::W`](W) writer structure"] impl crate::Writable for TargetTimeNsecSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TARGET_TIME_NSEC to value 0"] -impl crate::Resettable for TargetTimeNsecSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for TargetTimeNsecSpec {} diff --git a/va416xx/src/eth/target_time_secs.rs b/va416xx/src/eth/target_time_secs.rs index bc56f6b..0c5202e 100644 --- a/va416xx/src/eth/target_time_secs.rs +++ b/va416xx/src/eth/target_time_secs.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:31 - Target Time Seconds Registe"] #[inline(always)] - pub fn tstr(&mut self) -> TstrW { + pub fn tstr(&mut self) -> TstrW<'_, TargetTimeSecsSpec> { TstrW::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for TargetTimeSecsSpec {} #[doc = "`write(|w| ..)` method takes [`target_time_secs::W`](W) writer structure"] impl crate::Writable for TargetTimeSecsSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TARGET_TIME_SECS to value 0"] -impl crate::Resettable for TargetTimeSecsSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for TargetTimeSecsSpec {} diff --git a/va416xx/src/eth/timestamp_ctrl.rs b/va416xx/src/eth/timestamp_ctrl.rs index b92a1f1..aa71004 100644 --- a/va416xx/src/eth/timestamp_ctrl.rs +++ b/va416xx/src/eth/timestamp_ctrl.rs @@ -196,107 +196,107 @@ impl R { impl W { #[doc = "Bit 0 - Timestamp Enable"] #[inline(always)] - pub fn tsena(&mut self) -> TsenaW { + pub fn tsena(&mut self) -> TsenaW<'_, TimestampCtrlSpec> { TsenaW::new(self, 0) } #[doc = "Bit 1 - Timestamp Fine or Coarse Update"] #[inline(always)] - pub fn tscfupdt(&mut self) -> TscfupdtW { + pub fn tscfupdt(&mut self) -> TscfupdtW<'_, TimestampCtrlSpec> { TscfupdtW::new(self, 1) } #[doc = "Bit 2 - Timestamp Initialize"] #[inline(always)] - pub fn tsinit(&mut self) -> TsinitW { + pub fn tsinit(&mut self) -> TsinitW<'_, TimestampCtrlSpec> { TsinitW::new(self, 2) } #[doc = "Bit 3 - Timestamp Update"] #[inline(always)] - pub fn tsupdt(&mut self) -> TsupdtW { + pub fn tsupdt(&mut self) -> TsupdtW<'_, TimestampCtrlSpec> { TsupdtW::new(self, 3) } #[doc = "Bit 4 - Timestamp Interrupt Trigger Enable"] #[inline(always)] - pub fn tstrig(&mut self) -> TstrigW { + pub fn tstrig(&mut self) -> TstrigW<'_, TimestampCtrlSpec> { TstrigW::new(self, 4) } #[doc = "Bit 5 - Addend Reg Update"] #[inline(always)] - pub fn tsaddrreg(&mut self) -> TsaddrregW { + pub fn tsaddrreg(&mut self) -> TsaddrregW<'_, TimestampCtrlSpec> { TsaddrregW::new(self, 5) } #[doc = "Bit 8 - Enable Timestamp for All Frames"] #[inline(always)] - pub fn tsenall(&mut self) -> TsenallW { + pub fn tsenall(&mut self) -> TsenallW<'_, TimestampCtrlSpec> { TsenallW::new(self, 8) } #[doc = "Bit 9 - Timestamp Digital or Binary Rollover Control"] #[inline(always)] - pub fn tsctrlssr(&mut self) -> TsctrlssrW { + pub fn tsctrlssr(&mut self) -> TsctrlssrW<'_, TimestampCtrlSpec> { TsctrlssrW::new(self, 9) } #[doc = "Bit 10 - Enable PTP packet Processing for Version 2 Format"] #[inline(always)] - pub fn tsver2ena(&mut self) -> Tsver2enaW { + pub fn tsver2ena(&mut self) -> Tsver2enaW<'_, TimestampCtrlSpec> { Tsver2enaW::new(self, 10) } #[doc = "Bit 11 - Enable Processing of PTP over Ethernet Frames"] #[inline(always)] - pub fn tsipena(&mut self) -> TsipenaW { + pub fn tsipena(&mut self) -> TsipenaW<'_, TimestampCtrlSpec> { TsipenaW::new(self, 11) } #[doc = "Bit 12 - Enable Processing of PTP Frames Sent over IPv6-UDP"] #[inline(always)] - pub fn tsipv6ena(&mut self) -> Tsipv6enaW { + pub fn tsipv6ena(&mut self) -> Tsipv6enaW<'_, TimestampCtrlSpec> { Tsipv6enaW::new(self, 12) } #[doc = "Bit 13 - Enable Processing of PTP Frames Sent over IPv4-UDP"] #[inline(always)] - pub fn tsipv4ena(&mut self) -> Tsipv4enaW { + pub fn tsipv4ena(&mut self) -> Tsipv4enaW<'_, TimestampCtrlSpec> { Tsipv4enaW::new(self, 13) } #[doc = "Bit 14 - Enable Timestamp Snapshot for Event Messages"] #[inline(always)] - pub fn tsevntena(&mut self) -> TsevntenaW { + pub fn tsevntena(&mut self) -> TsevntenaW<'_, TimestampCtrlSpec> { TsevntenaW::new(self, 14) } #[doc = "Bit 15 - Enable Snapshot for Messages Relevant to Master"] #[inline(always)] - pub fn tsmstrena(&mut self) -> TsmstrenaW { + pub fn tsmstrena(&mut self) -> TsmstrenaW<'_, TimestampCtrlSpec> { TsmstrenaW::new(self, 15) } #[doc = "Bits 16:17 - Select PTP packets for Taking Snapshots"] #[inline(always)] - pub fn snaptypsel(&mut self) -> SnaptypselW { + pub fn snaptypsel(&mut self) -> SnaptypselW<'_, TimestampCtrlSpec> { SnaptypselW::new(self, 16) } #[doc = "Bit 18 - Enable MAC address for PTP Frame Filtering"] #[inline(always)] - pub fn tsenmacaddr(&mut self) -> TsenmacaddrW { + pub fn tsenmacaddr(&mut self) -> TsenmacaddrW<'_, TimestampCtrlSpec> { TsenmacaddrW::new(self, 18) } #[doc = "Bit 24 - Auxiliary Snapshot FIFO Clear"] #[inline(always)] - pub fn atsfc(&mut self) -> AtsfcW { + pub fn atsfc(&mut self) -> AtsfcW<'_, TimestampCtrlSpec> { AtsfcW::new(self, 24) } #[doc = "Bit 25 - Auxiliary Snapshot 0 Enable"] #[inline(always)] - pub fn atsen0(&mut self) -> Atsen0W { + pub fn atsen0(&mut self) -> Atsen0W<'_, TimestampCtrlSpec> { Atsen0W::new(self, 25) } #[doc = "Bit 26 - Auxiliary Snapshot 1 Enable"] #[inline(always)] - pub fn atsen1(&mut self) -> Atsen1W { + pub fn atsen1(&mut self) -> Atsen1W<'_, TimestampCtrlSpec> { Atsen1W::new(self, 26) } #[doc = "Bit 27 - Auxiliary Snapshot 2 Enable"] #[inline(always)] - pub fn atsen2(&mut self) -> Atsen2W { + pub fn atsen2(&mut self) -> Atsen2W<'_, TimestampCtrlSpec> { Atsen2W::new(self, 27) } #[doc = "Bit 28 - Auxiliary Snapshot 3 Enable"] #[inline(always)] - pub fn atsen3(&mut self) -> Atsen3W { + pub fn atsen3(&mut self) -> Atsen3W<'_, TimestampCtrlSpec> { Atsen3W::new(self, 28) } } @@ -310,10 +310,6 @@ impl crate::Readable for TimestampCtrlSpec {} #[doc = "`write(|w| ..)` method takes [`timestamp_ctrl::W`](W) writer structure"] impl crate::Writable for TimestampCtrlSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMESTAMP_CTRL to value 0"] -impl crate::Resettable for TimestampCtrlSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for TimestampCtrlSpec {} diff --git a/va416xx/src/eth/timestampaddend.rs b/va416xx/src/eth/timestampaddend.rs index a0b2d56..5a805cf 100644 --- a/va416xx/src/eth/timestampaddend.rs +++ b/va416xx/src/eth/timestampaddend.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:31 - Timestamp Addend Register"] #[inline(always)] - pub fn tsar(&mut self) -> TsarW { + pub fn tsar(&mut self) -> TsarW<'_, TimestampaddendSpec> { TsarW::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for TimestampaddendSpec {} #[doc = "`write(|w| ..)` method takes [`timestampaddend::W`](W) writer structure"] impl crate::Writable for TimestampaddendSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMESTAMPADDEND to value 0"] -impl crate::Resettable for TimestampaddendSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for TimestampaddendSpec {} diff --git a/va416xx/src/eth/tx1024maxoct_gb.rs b/va416xx/src/eth/tx1024maxoct_gb.rs index 5279700..2050700 100644 --- a/va416xx/src/eth/tx1024maxoct_gb.rs +++ b/va416xx/src/eth/tx1024maxoct_gb.rs @@ -17,6 +17,4 @@ impl crate::RegisterSpec for Tx1024maxoctGbSpec { #[doc = "`read()` method returns [`tx1024maxoct_gb::R`](R) reader structure"] impl crate::Readable for Tx1024maxoctGbSpec {} #[doc = "`reset()` method sets TX1024MAXOCT_GB to value 0"] -impl crate::Resettable for Tx1024maxoctGbSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Tx1024maxoctGbSpec {} diff --git a/va416xx/src/eth/tx128to255oct_gb.rs b/va416xx/src/eth/tx128to255oct_gb.rs index a31872b..67a7234 100644 --- a/va416xx/src/eth/tx128to255oct_gb.rs +++ b/va416xx/src/eth/tx128to255oct_gb.rs @@ -17,6 +17,4 @@ impl crate::RegisterSpec for Tx128to255octGbSpec { #[doc = "`read()` method returns [`tx128to255oct_gb::R`](R) reader structure"] impl crate::Readable for Tx128to255octGbSpec {} #[doc = "`reset()` method sets TX128TO255OCT_GB to value 0"] -impl crate::Resettable for Tx128to255octGbSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Tx128to255octGbSpec {} diff --git a/va416xx/src/eth/tx256to511oct_gb.rs b/va416xx/src/eth/tx256to511oct_gb.rs index 9576106..b5dd4d1 100644 --- a/va416xx/src/eth/tx256to511oct_gb.rs +++ b/va416xx/src/eth/tx256to511oct_gb.rs @@ -17,6 +17,4 @@ impl crate::RegisterSpec for Tx256to511octGbSpec { #[doc = "`read()` method returns [`tx256to511oct_gb::R`](R) reader structure"] impl crate::Readable for Tx256to511octGbSpec {} #[doc = "`reset()` method sets TX256TO511OCT_GB to value 0"] -impl crate::Resettable for Tx256to511octGbSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Tx256to511octGbSpec {} diff --git a/va416xx/src/eth/tx512to1023oct_gb.rs b/va416xx/src/eth/tx512to1023oct_gb.rs index 57e95cb..f96b27f 100644 --- a/va416xx/src/eth/tx512to1023oct_gb.rs +++ b/va416xx/src/eth/tx512to1023oct_gb.rs @@ -17,6 +17,4 @@ impl crate::RegisterSpec for Tx512to1023octGbSpec { #[doc = "`read()` method returns [`tx512to1023oct_gb::R`](R) reader structure"] impl crate::Readable for Tx512to1023octGbSpec {} #[doc = "`reset()` method sets TX512TO1023OCT_GB to value 0"] -impl crate::Resettable for Tx512to1023octGbSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Tx512to1023octGbSpec {} diff --git a/va416xx/src/eth/tx64oct_gb.rs b/va416xx/src/eth/tx64oct_gb.rs index cdd3d94..78da65c 100644 --- a/va416xx/src/eth/tx64oct_gb.rs +++ b/va416xx/src/eth/tx64oct_gb.rs @@ -17,6 +17,4 @@ impl crate::RegisterSpec for Tx64octGbSpec { #[doc = "`read()` method returns [`tx64oct_gb::R`](R) reader structure"] impl crate::Readable for Tx64octGbSpec {} #[doc = "`reset()` method sets TX64OCT_GB to value 0"] -impl crate::Resettable for Tx64octGbSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Tx64octGbSpec {} diff --git a/va416xx/src/eth/tx65to127oct_gb.rs b/va416xx/src/eth/tx65to127oct_gb.rs index 8de383d..e49f232 100644 --- a/va416xx/src/eth/tx65to127oct_gb.rs +++ b/va416xx/src/eth/tx65to127oct_gb.rs @@ -17,6 +17,4 @@ impl crate::RegisterSpec for Tx65to127octGbSpec { #[doc = "`read()` method returns [`tx65to127oct_gb::R`](R) reader structure"] impl crate::Readable for Tx65to127octGbSpec {} #[doc = "`reset()` method sets TX65TO127OCT_GB to value 0"] -impl crate::Resettable for Tx65to127octGbSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Tx65to127octGbSpec {} diff --git a/va416xx/src/eth/txbcastframe_gb.rs b/va416xx/src/eth/txbcastframe_gb.rs index 68e9d6a..8e65a26 100644 --- a/va416xx/src/eth/txbcastframe_gb.rs +++ b/va416xx/src/eth/txbcastframe_gb.rs @@ -17,6 +17,4 @@ impl crate::RegisterSpec for TxbcastframeGbSpec { #[doc = "`read()` method returns [`txbcastframe_gb::R`](R) reader structure"] impl crate::Readable for TxbcastframeGbSpec {} #[doc = "`reset()` method sets TXBCASTFRAME_GB to value 0"] -impl crate::Resettable for TxbcastframeGbSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for TxbcastframeGbSpec {} diff --git a/va416xx/src/eth/txbcastframes_g.rs b/va416xx/src/eth/txbcastframes_g.rs index c85ae06..62d2367 100644 --- a/va416xx/src/eth/txbcastframes_g.rs +++ b/va416xx/src/eth/txbcastframes_g.rs @@ -17,6 +17,4 @@ impl crate::RegisterSpec for TxbcastframesGSpec { #[doc = "`read()` method returns [`txbcastframes_g::R`](R) reader structure"] impl crate::Readable for TxbcastframesGSpec {} #[doc = "`reset()` method sets TXBCASTFRAMES_G to value 0"] -impl crate::Resettable for TxbcastframesGSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for TxbcastframesGSpec {} diff --git a/va416xx/src/eth/txcarriererror.rs b/va416xx/src/eth/txcarriererror.rs index 22314ed..e26c891 100644 --- a/va416xx/src/eth/txcarriererror.rs +++ b/va416xx/src/eth/txcarriererror.rs @@ -17,6 +17,4 @@ impl crate::RegisterSpec for TxcarriererrorSpec { #[doc = "`read()` method returns [`txcarriererror::R`](R) reader structure"] impl crate::Readable for TxcarriererrorSpec {} #[doc = "`reset()` method sets TXCARRIERERROR to value 0"] -impl crate::Resettable for TxcarriererrorSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for TxcarriererrorSpec {} diff --git a/va416xx/src/eth/txdeferred.rs b/va416xx/src/eth/txdeferred.rs index 86babe3..6f42369 100644 --- a/va416xx/src/eth/txdeferred.rs +++ b/va416xx/src/eth/txdeferred.rs @@ -17,6 +17,4 @@ impl crate::RegisterSpec for TxdeferredSpec { #[doc = "`read()` method returns [`txdeferred::R`](R) reader structure"] impl crate::Readable for TxdeferredSpec {} #[doc = "`reset()` method sets TXDEFERRED to value 0"] -impl crate::Resettable for TxdeferredSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for TxdeferredSpec {} diff --git a/va416xx/src/eth/txexcessdef.rs b/va416xx/src/eth/txexcessdef.rs index 861d64b..2acc779 100644 --- a/va416xx/src/eth/txexcessdef.rs +++ b/va416xx/src/eth/txexcessdef.rs @@ -17,6 +17,4 @@ impl crate::RegisterSpec for TxexcessdefSpec { #[doc = "`read()` method returns [`txexcessdef::R`](R) reader structure"] impl crate::Readable for TxexcessdefSpec {} #[doc = "`reset()` method sets TXEXCESSDEF to value 0"] -impl crate::Resettable for TxexcessdefSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for TxexcessdefSpec {} diff --git a/va416xx/src/eth/txexesscol.rs b/va416xx/src/eth/txexesscol.rs index c73094c..dc62620 100644 --- a/va416xx/src/eth/txexesscol.rs +++ b/va416xx/src/eth/txexesscol.rs @@ -17,6 +17,4 @@ impl crate::RegisterSpec for TxexesscolSpec { #[doc = "`read()` method returns [`txexesscol::R`](R) reader structure"] impl crate::Readable for TxexesscolSpec {} #[doc = "`reset()` method sets TXEXESSCOL to value 0"] -impl crate::Resettable for TxexesscolSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for TxexesscolSpec {} diff --git a/va416xx/src/eth/txframecount_g.rs b/va416xx/src/eth/txframecount_g.rs index da04df8..b5733aa 100644 --- a/va416xx/src/eth/txframecount_g.rs +++ b/va416xx/src/eth/txframecount_g.rs @@ -17,6 +17,4 @@ impl crate::RegisterSpec for TxframecountGSpec { #[doc = "`read()` method returns [`txframecount_g::R`](R) reader structure"] impl crate::Readable for TxframecountGSpec {} #[doc = "`reset()` method sets TXFRAMECOUNT_G to value 0"] -impl crate::Resettable for TxframecountGSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for TxframecountGSpec {} diff --git a/va416xx/src/eth/txframecount_gb.rs b/va416xx/src/eth/txframecount_gb.rs index 8a0dc33..cb0579a 100644 --- a/va416xx/src/eth/txframecount_gb.rs +++ b/va416xx/src/eth/txframecount_gb.rs @@ -17,6 +17,4 @@ impl crate::RegisterSpec for TxframecountGbSpec { #[doc = "`read()` method returns [`txframecount_gb::R`](R) reader structure"] impl crate::Readable for TxframecountGbSpec {} #[doc = "`reset()` method sets TXFRAMECOUNT_GB to value 0"] -impl crate::Resettable for TxframecountGbSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for TxframecountGbSpec {} diff --git a/va416xx/src/eth/txlanframes_g.rs b/va416xx/src/eth/txlanframes_g.rs index 7c8eae2..b5a3707 100644 --- a/va416xx/src/eth/txlanframes_g.rs +++ b/va416xx/src/eth/txlanframes_g.rs @@ -17,6 +17,4 @@ impl crate::RegisterSpec for TxlanframesGSpec { #[doc = "`read()` method returns [`txlanframes_g::R`](R) reader structure"] impl crate::Readable for TxlanframesGSpec {} #[doc = "`reset()` method sets TXLANFRAMES_G to value 0"] -impl crate::Resettable for TxlanframesGSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for TxlanframesGSpec {} diff --git a/va416xx/src/eth/txlatecol.rs b/va416xx/src/eth/txlatecol.rs index 5f23671..38fdb67 100644 --- a/va416xx/src/eth/txlatecol.rs +++ b/va416xx/src/eth/txlatecol.rs @@ -17,6 +17,4 @@ impl crate::RegisterSpec for TxlatecolSpec { #[doc = "`read()` method returns [`txlatecol::R`](R) reader structure"] impl crate::Readable for TxlatecolSpec {} #[doc = "`reset()` method sets TXLATECOL to value 0"] -impl crate::Resettable for TxlatecolSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for TxlatecolSpec {} diff --git a/va416xx/src/eth/txmcastframe_gb.rs b/va416xx/src/eth/txmcastframe_gb.rs index 8ac0982..36dd248 100644 --- a/va416xx/src/eth/txmcastframe_gb.rs +++ b/va416xx/src/eth/txmcastframe_gb.rs @@ -17,6 +17,4 @@ impl crate::RegisterSpec for TxmcastframeGbSpec { #[doc = "`read()` method returns [`txmcastframe_gb::R`](R) reader structure"] impl crate::Readable for TxmcastframeGbSpec {} #[doc = "`reset()` method sets TXMCASTFRAME_GB to value 0"] -impl crate::Resettable for TxmcastframeGbSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for TxmcastframeGbSpec {} diff --git a/va416xx/src/eth/txmcastframes_g.rs b/va416xx/src/eth/txmcastframes_g.rs index d4a725c..5556dd5 100644 --- a/va416xx/src/eth/txmcastframes_g.rs +++ b/va416xx/src/eth/txmcastframes_g.rs @@ -17,6 +17,4 @@ impl crate::RegisterSpec for TxmcastframesGSpec { #[doc = "`read()` method returns [`txmcastframes_g::R`](R) reader structure"] impl crate::Readable for TxmcastframesGSpec {} #[doc = "`reset()` method sets TXMCASTFRAMES_G to value 0"] -impl crate::Resettable for TxmcastframesGSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for TxmcastframesGSpec {} diff --git a/va416xx/src/eth/txmulticol_g.rs b/va416xx/src/eth/txmulticol_g.rs index a3f1089..9c5f571 100644 --- a/va416xx/src/eth/txmulticol_g.rs +++ b/va416xx/src/eth/txmulticol_g.rs @@ -17,6 +17,4 @@ impl crate::RegisterSpec for TxmulticolGSpec { #[doc = "`read()` method returns [`txmulticol_g::R`](R) reader structure"] impl crate::Readable for TxmulticolGSpec {} #[doc = "`reset()` method sets TXMULTICOL_G to value 0"] -impl crate::Resettable for TxmulticolGSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for TxmulticolGSpec {} diff --git a/va416xx/src/eth/txoctetcount_g.rs b/va416xx/src/eth/txoctetcount_g.rs index 7688e8c..5cf5343 100644 --- a/va416xx/src/eth/txoctetcount_g.rs +++ b/va416xx/src/eth/txoctetcount_g.rs @@ -17,6 +17,4 @@ impl crate::RegisterSpec for TxoctetcountGSpec { #[doc = "`read()` method returns [`txoctetcount_g::R`](R) reader structure"] impl crate::Readable for TxoctetcountGSpec {} #[doc = "`reset()` method sets TXOCTETCOUNT_G to value 0"] -impl crate::Resettable for TxoctetcountGSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for TxoctetcountGSpec {} diff --git a/va416xx/src/eth/txoctetcount_gb.rs b/va416xx/src/eth/txoctetcount_gb.rs index a45ef7d..b19c69f 100644 --- a/va416xx/src/eth/txoctetcount_gb.rs +++ b/va416xx/src/eth/txoctetcount_gb.rs @@ -17,6 +17,4 @@ impl crate::RegisterSpec for TxoctetcountGbSpec { #[doc = "`read()` method returns [`txoctetcount_gb::R`](R) reader structure"] impl crate::Readable for TxoctetcountGbSpec {} #[doc = "`reset()` method sets TXOCTETCOUNT_GB to value 0"] -impl crate::Resettable for TxoctetcountGbSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for TxoctetcountGbSpec {} diff --git a/va416xx/src/eth/txoversize_g.rs b/va416xx/src/eth/txoversize_g.rs index 0a543a0..29d598d 100644 --- a/va416xx/src/eth/txoversize_g.rs +++ b/va416xx/src/eth/txoversize_g.rs @@ -17,6 +17,4 @@ impl crate::RegisterSpec for TxoversizeGSpec { #[doc = "`read()` method returns [`txoversize_g::R`](R) reader structure"] impl crate::Readable for TxoversizeGSpec {} #[doc = "`reset()` method sets TXOVERSIZE_G to value 0"] -impl crate::Resettable for TxoversizeGSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for TxoversizeGSpec {} diff --git a/va416xx/src/eth/txpauseframes.rs b/va416xx/src/eth/txpauseframes.rs index 28bc091..cbf34db 100644 --- a/va416xx/src/eth/txpauseframes.rs +++ b/va416xx/src/eth/txpauseframes.rs @@ -17,6 +17,4 @@ impl crate::RegisterSpec for TxpauseframesSpec { #[doc = "`read()` method returns [`txpauseframes::R`](R) reader structure"] impl crate::Readable for TxpauseframesSpec {} #[doc = "`reset()` method sets TXPAUSEFRAMES to value 0"] -impl crate::Resettable for TxpauseframesSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for TxpauseframesSpec {} diff --git a/va416xx/src/eth/txsinglecol_g.rs b/va416xx/src/eth/txsinglecol_g.rs index dafcfb1..e791aaa 100644 --- a/va416xx/src/eth/txsinglecol_g.rs +++ b/va416xx/src/eth/txsinglecol_g.rs @@ -17,6 +17,4 @@ impl crate::RegisterSpec for TxsinglecolGSpec { #[doc = "`read()` method returns [`txsinglecol_g::R`](R) reader structure"] impl crate::Readable for TxsinglecolGSpec {} #[doc = "`reset()` method sets TXSINGLECOL_G to value 0"] -impl crate::Resettable for TxsinglecolGSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for TxsinglecolGSpec {} diff --git a/va416xx/src/eth/txucastframe_gb.rs b/va416xx/src/eth/txucastframe_gb.rs index 0a253ae..bfcf1b8 100644 --- a/va416xx/src/eth/txucastframe_gb.rs +++ b/va416xx/src/eth/txucastframe_gb.rs @@ -17,6 +17,4 @@ impl crate::RegisterSpec for TxucastframeGbSpec { #[doc = "`read()` method returns [`txucastframe_gb::R`](R) reader structure"] impl crate::Readable for TxucastframeGbSpec {} #[doc = "`reset()` method sets TXUCASTFRAME_GB to value 0"] -impl crate::Resettable for TxucastframeGbSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for TxucastframeGbSpec {} diff --git a/va416xx/src/eth/txundererr.rs b/va416xx/src/eth/txundererr.rs index 1fb7952..33f08da 100644 --- a/va416xx/src/eth/txundererr.rs +++ b/va416xx/src/eth/txundererr.rs @@ -17,6 +17,4 @@ impl crate::RegisterSpec for TxundererrSpec { #[doc = "`read()` method returns [`txundererr::R`](R) reader structure"] impl crate::Readable for TxundererrSpec {} #[doc = "`reset()` method sets TXUNDERERR to value 0"] -impl crate::Resettable for TxundererrSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for TxundererrSpec {} diff --git a/va416xx/src/eth/vlan_hashtable.rs b/va416xx/src/eth/vlan_hashtable.rs index 172b6a1..f8a1087 100644 --- a/va416xx/src/eth/vlan_hashtable.rs +++ b/va416xx/src/eth/vlan_hashtable.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:15 - VLAN Hash Table"] #[inline(always)] - pub fn vlht(&mut self) -> VlhtW { + pub fn vlht(&mut self) -> VlhtW<'_, VlanHashtableSpec> { VlhtW::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for VlanHashtableSpec {} #[doc = "`write(|w| ..)` method takes [`vlan_hashtable::W`](W) writer structure"] impl crate::Writable for VlanHashtableSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets VLAN_HASHTABLE to value 0"] -impl crate::Resettable for VlanHashtableSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for VlanHashtableSpec {} diff --git a/va416xx/src/eth/vlan_increplace.rs b/va416xx/src/eth/vlan_increplace.rs index dfb537a..e15afa0 100644 --- a/va416xx/src/eth/vlan_increplace.rs +++ b/va416xx/src/eth/vlan_increplace.rs @@ -43,22 +43,22 @@ impl R { impl W { #[doc = "Bits 0:15 - VLAN Tag for Transmit Frames"] #[inline(always)] - pub fn vlt(&mut self) -> VltW { + pub fn vlt(&mut self) -> VltW<'_, VlanIncreplaceSpec> { VltW::new(self, 0) } #[doc = "Bits 16:17 - VLAN Tag Control in Transmit Frames"] #[inline(always)] - pub fn vlc(&mut self) -> VlcW { + pub fn vlc(&mut self) -> VlcW<'_, VlanIncreplaceSpec> { VlcW::new(self, 16) } #[doc = "Bit 18 - VLAN Priority Control"] #[inline(always)] - pub fn vlp(&mut self) -> VlpW { + pub fn vlp(&mut self) -> VlpW<'_, VlanIncreplaceSpec> { VlpW::new(self, 18) } #[doc = "Bit 19 - C-VLAN or S-VLAN"] #[inline(always)] - pub fn csvl(&mut self) -> CsvlW { + pub fn csvl(&mut self) -> CsvlW<'_, VlanIncreplaceSpec> { CsvlW::new(self, 19) } } @@ -72,10 +72,6 @@ impl crate::Readable for VlanIncreplaceSpec {} #[doc = "`write(|w| ..)` method takes [`vlan_increplace::W`](W) writer structure"] impl crate::Writable for VlanIncreplaceSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets VLAN_INCREPLACE to value 0"] -impl crate::Resettable for VlanIncreplaceSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for VlanIncreplaceSpec {} diff --git a/va416xx/src/generic.rs b/va416xx/src/generic.rs index 59eec56..1bb995a 100644 --- a/va416xx/src/generic.rs +++ b/va416xx/src/generic.rs @@ -1,8 +1,46 @@ use core::marker; +#[doc = " Generic peripheral accessor"] +pub struct Periph { + _marker: marker::PhantomData, +} +unsafe impl Send for Periph {} +impl Periph { + #[doc = "Pointer to the register block"] + pub const PTR: *const RB = A as *const _; + #[doc = "Return the pointer to the register block"] + #[inline(always)] + pub const fn ptr() -> *const RB { + Self::PTR + } + #[doc = " Steal an instance of this peripheral"] + #[doc = ""] + #[doc = " # Safety"] + #[doc = ""] + #[doc = " Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = " that may race with any existing instances, for example by only"] + #[doc = " accessing read-only or write-only registers, or by consuming the"] + #[doc = " original peripheral and using critical sections to coordinate"] + #[doc = " access between multiple new instances."] + #[doc = ""] + #[doc = " Additionally, other software such as HALs may rely on only one"] + #[doc = " peripheral instance existing to ensure memory safety; ensure"] + #[doc = " no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: marker::PhantomData, + } + } +} +impl core::ops::Deref for Periph { + type Target = RB; + #[inline(always)] + fn deref(&self) -> &Self::Target { + unsafe { &*Self::PTR } + } +} #[doc = " Raw register type (`u8`, `u16`, `u32`, ...)"] pub trait RawReg: Copy - + Default + From + core::ops::BitOr + core::ops::BitAnd @@ -13,8 +51,10 @@ pub trait RawReg: { #[doc = " Mask for bits of width `WI`"] fn mask() -> Self; - #[doc = " Mask for bits of width 1"] - fn one() -> Self; + #[doc = " `0`"] + const ZERO: Self; + #[doc = " `1`"] + const ONE: Self; } macro_rules! raw_reg { ($ U : ty , $ size : literal , $ mask : ident) => { @@ -23,10 +63,8 @@ macro_rules! raw_reg { fn mask() -> Self { $mask::() } - #[inline(always)] - fn one() -> Self { - 1 - } + const ZERO: Self = 0; + const ONE: Self = 1; } const fn $mask() -> $U { <$U>::MAX >> ($size - WI) @@ -65,9 +103,9 @@ pub trait Writable: RegisterSpec { #[doc = " Is it safe to write any bits to register"] type Safety; #[doc = " Specifies the register bits that are not changed if you pass `1` and are changed if you pass `0`"] - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux; + const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = Self::Ux::ZERO; #[doc = " Specifies the register bits that are not changed if you pass `0` and are changed if you pass `1`"] - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux; + const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = Self::Ux::ZERO; } #[doc = " Reset value of the register."] #[doc = ""] @@ -75,7 +113,7 @@ pub trait Writable: RegisterSpec { #[doc = " register by using the `reset` method."] pub trait Resettable: RegisterSpec { #[doc = " Reset value of the register."] - const RESET_VALUE: Self::Ux; + const RESET_VALUE: Self::Ux = Self::Ux::ZERO; #[doc = " Reset value of the register."] #[inline(always)] fn reset_value() -> Self::Ux { @@ -344,8 +382,8 @@ macro_rules! bit_proxy { #[doc = " Writes bit to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits &= !(REG::Ux::one() << self.o); - self.w.bits |= (REG::Ux::from(value) & REG::Ux::one()) << self.o; + self.w.bits &= !(REG::Ux::ONE << self.o); + self.w.bits |= (REG::Ux::from(value) & REG::Ux::ONE) << self.o; self.w } #[doc = " Writes `variant` to the field"] @@ -371,13 +409,13 @@ where #[doc = " Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { - self.w.bits |= REG::Ux::one() << self.o; + self.w.bits |= REG::Ux::ONE << self.o; self.w } #[doc = " Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { - self.w.bits &= !(REG::Ux::one() << self.o); + self.w.bits &= !(REG::Ux::ONE << self.o); self.w } } @@ -389,7 +427,7 @@ where #[doc = " Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { - self.w.bits |= REG::Ux::one() << self.o; + self.w.bits |= REG::Ux::ONE << self.o; self.w } } @@ -401,7 +439,7 @@ where #[doc = " Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { - self.w.bits &= !(REG::Ux::one() << self.o); + self.w.bits &= !(REG::Ux::ONE << self.o); self.w } } @@ -413,7 +451,7 @@ where #[doc = "Clears the field bit by passing one"] #[inline(always)] pub fn clear_bit_by_one(self) -> &'a mut W { - self.w.bits |= REG::Ux::one() << self.o; + self.w.bits |= REG::Ux::ONE << self.o; self.w } } @@ -425,7 +463,7 @@ where #[doc = "Sets the field bit by passing zero"] #[inline(always)] pub fn set_bit_by_zero(self) -> &'a mut W { - self.w.bits &= !(REG::Ux::one() << self.o); + self.w.bits &= !(REG::Ux::ONE << self.o); self.w } } @@ -437,7 +475,7 @@ where #[doc = "Toggle the field bit by passing one"] #[inline(always)] pub fn toggle_bit(self) -> &'a mut W { - self.w.bits |= REG::Ux::one() << self.o; + self.w.bits |= REG::Ux::ONE << self.o; self.w } } @@ -449,7 +487,7 @@ where #[doc = "Toggle the field bit by passing zero"] #[inline(always)] pub fn toggle_bit(self) -> &'a mut W { - self.w.bits &= !(REG::Ux::one() << self.o); + self.w.bits &= !(REG::Ux::ONE << self.o); self.w } } @@ -594,7 +632,7 @@ impl Reg { F: FnOnce(&mut W) -> &mut W, { let value = f(&mut W { - bits: REG::Ux::default(), + bits: REG::Ux::ZERO, _reg: marker::PhantomData, }) .bits; @@ -614,7 +652,7 @@ impl Reg { F: FnOnce(&mut W) -> T, { let mut writer = W { - bits: REG::Ux::default(), + bits: REG::Ux::ZERO, _reg: marker::PhantomData, }; let result = f(&mut writer); diff --git a/va416xx/src/i2c0.rs b/va416xx/src/i2c0.rs index fca725e..dd08121 100644 --- a/va416xx/src/i2c0.rs +++ b/va416xx/src/i2c0.rs @@ -240,68 +240,57 @@ impl RegisterBlock { &self.perid } } -#[doc = "CTRL (rw) register accessor: Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`] -module"] +#[doc = "CTRL (rw) register accessor: Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`] module"] #[doc(alias = "CTRL")] pub type Ctrl = crate::Reg; #[doc = "Control Register"] pub mod ctrl; -#[doc = "CLKSCALE (rw) register accessor: Clock Scale divide value\n\nYou can [`read`](crate::Reg::read) this register and get [`clkscale::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkscale::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkscale`] -module"] +#[doc = "CLKSCALE (rw) register accessor: Clock Scale divide value\n\nYou can [`read`](crate::Reg::read) this register and get [`clkscale::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkscale::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkscale`] module"] #[doc(alias = "CLKSCALE")] pub type Clkscale = crate::Reg; #[doc = "Clock Scale divide value"] pub mod clkscale; -#[doc = "WORDS (rw) register accessor: Word Count value\n\nYou can [`read`](crate::Reg::read) this register and get [`words::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`words::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@words`] -module"] +#[doc = "WORDS (rw) register accessor: Word Count value\n\nYou can [`read`](crate::Reg::read) this register and get [`words::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`words::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@words`] module"] #[doc(alias = "WORDS")] pub type Words = crate::Reg; #[doc = "Word Count value"] pub mod words; -#[doc = "ADDRESS (rw) register accessor: I2C Address value\n\nYou can [`read`](crate::Reg::read) this register and get [`address::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`address::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@address`] -module"] +#[doc = "ADDRESS (rw) register accessor: I2C Address value\n\nYou can [`read`](crate::Reg::read) this register and get [`address::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`address::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@address`] module"] #[doc(alias = "ADDRESS")] pub type Address = crate::Reg; #[doc = "I2C Address value"] pub mod address; -#[doc = "DATA (rw) register accessor: Data Input/Output\n\nYou can [`read`](crate::Reg::read) this register and get [`data::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data`] -module"] +#[doc = "DATA (rw) register accessor: Data Input/Output\n\nYou can [`read`](crate::Reg::read) this register and get [`data::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data`] module"] #[doc(alias = "DATA")] pub type Data = crate::Reg; #[doc = "Data Input/Output"] pub mod data; -#[doc = "CMD (rw) register accessor: Command Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cmd::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmd`] -module"] +#[doc = "CMD (rw) register accessor: Command Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cmd::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmd`] module"] #[doc(alias = "CMD")] pub type Cmd = crate::Reg; #[doc = "Command Register"] pub mod cmd; -#[doc = "STATUS (rw) register accessor: I2C Controller Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`status::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] -module"] +#[doc = "STATUS (rw) register accessor: I2C Controller Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`status::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] module"] #[doc(alias = "STATUS")] pub type Status = crate::Reg; #[doc = "I2C Controller Status Register"] pub mod status; -#[doc = "STATE (r) register accessor: Internal STATE of I2C Master Controller\n\nYou can [`read`](crate::Reg::read) this register and get [`state::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@state`] -module"] +#[doc = "STATE (r) register accessor: Internal STATE of I2C Master Controller\n\nYou can [`read`](crate::Reg::read) this register and get [`state::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@state`] module"] #[doc(alias = "STATE")] pub type State = crate::Reg; #[doc = "Internal STATE of I2C Master Controller"] pub mod state; -#[doc = "TXCOUNT (r) register accessor: TX Count Register\n\nYou can [`read`](crate::Reg::read) this register and get [`txcount::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txcount`] -module"] +#[doc = "TXCOUNT (r) register accessor: TX Count Register\n\nYou can [`read`](crate::Reg::read) this register and get [`txcount::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txcount`] module"] #[doc(alias = "TXCOUNT")] pub type Txcount = crate::Reg; #[doc = "TX Count Register"] pub mod txcount; -#[doc = "RXCOUNT (r) register accessor: RX Count Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rxcount::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxcount`] -module"] +#[doc = "RXCOUNT (r) register accessor: RX Count Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rxcount::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxcount`] module"] #[doc(alias = "RXCOUNT")] pub type Rxcount = crate::Reg; #[doc = "RX Count Register"] pub mod rxcount; -#[doc = "IRQ_ENB (rw) register accessor: Interrupt Enable Register\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_enb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`irq_enb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_enb`] -module"] +#[doc = "IRQ_ENB (rw) register accessor: Interrupt Enable Register\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_enb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`irq_enb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_enb`] module"] #[doc(alias = "IRQ_ENB")] pub type IrqEnb = crate::Reg; #[doc = "Interrupt Enable Register"] @@ -312,98 +301,82 @@ pub use irq_enb as irq_clr; pub use IrqEnb as IrqRaw; pub use IrqEnb as IrqEnd; pub use IrqEnb as IrqClr; -#[doc = "RXFIFOIRQTRG (rw) register accessor: Rx FIFO IRQ Trigger Level\n\nYou can [`read`](crate::Reg::read) this register and get [`rxfifoirqtrg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rxfifoirqtrg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxfifoirqtrg`] -module"] +#[doc = "RXFIFOIRQTRG (rw) register accessor: Rx FIFO IRQ Trigger Level\n\nYou can [`read`](crate::Reg::read) this register and get [`rxfifoirqtrg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rxfifoirqtrg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxfifoirqtrg`] module"] #[doc(alias = "RXFIFOIRQTRG")] pub type Rxfifoirqtrg = crate::Reg; #[doc = "Rx FIFO IRQ Trigger Level"] pub mod rxfifoirqtrg; -#[doc = "TXFIFOIRQTRG (rw) register accessor: Tx FIFO IRQ Trigger Level\n\nYou can [`read`](crate::Reg::read) this register and get [`txfifoirqtrg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`txfifoirqtrg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txfifoirqtrg`] -module"] +#[doc = "TXFIFOIRQTRG (rw) register accessor: Tx FIFO IRQ Trigger Level\n\nYou can [`read`](crate::Reg::read) this register and get [`txfifoirqtrg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`txfifoirqtrg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txfifoirqtrg`] module"] #[doc(alias = "TXFIFOIRQTRG")] pub type Txfifoirqtrg = crate::Reg; #[doc = "Tx FIFO IRQ Trigger Level"] pub mod txfifoirqtrg; -#[doc = "FIFO_CLR (w) register accessor: Clear FIFO Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fifo_clr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fifo_clr`] -module"] +#[doc = "FIFO_CLR (w) register accessor: Clear FIFO Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fifo_clr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fifo_clr`] module"] #[doc(alias = "FIFO_CLR")] pub type FifoClr = crate::Reg; #[doc = "Clear FIFO Register"] pub mod fifo_clr; -#[doc = "TMCONFIG (rw) register accessor: Timing Config Register\n\nYou can [`read`](crate::Reg::read) this register and get [`tmconfig::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tmconfig::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tmconfig`] -module"] +#[doc = "TMCONFIG (rw) register accessor: Timing Config Register\n\nYou can [`read`](crate::Reg::read) this register and get [`tmconfig::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tmconfig::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tmconfig`] module"] #[doc(alias = "TMCONFIG")] pub type Tmconfig = crate::Reg; #[doc = "Timing Config Register"] pub mod tmconfig; -#[doc = "CLKTOLIMIT (rw) register accessor: Clock Low Timeout Limit Register\n\nYou can [`read`](crate::Reg::read) this register and get [`clktolimit::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clktolimit::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clktolimit`] -module"] +#[doc = "CLKTOLIMIT (rw) register accessor: Clock Low Timeout Limit Register\n\nYou can [`read`](crate::Reg::read) this register and get [`clktolimit::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clktolimit::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clktolimit`] module"] #[doc(alias = "CLKTOLIMIT")] pub type Clktolimit = crate::Reg; #[doc = "Clock Low Timeout Limit Register"] pub mod clktolimit; -#[doc = "S0_CTRL (rw) register accessor: Slave Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`s0_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`s0_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@s0_ctrl`] -module"] +#[doc = "S0_CTRL (rw) register accessor: Slave Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`s0_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`s0_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@s0_ctrl`] module"] #[doc(alias = "S0_CTRL")] pub type S0Ctrl = crate::Reg; #[doc = "Slave Control Register"] pub mod s0_ctrl; -#[doc = "S0_MAXWORDS (rw) register accessor: Slave MaxWords Register\n\nYou can [`read`](crate::Reg::read) this register and get [`s0_maxwords::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`s0_maxwords::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@s0_maxwords`] -module"] +#[doc = "S0_MAXWORDS (rw) register accessor: Slave MaxWords Register\n\nYou can [`read`](crate::Reg::read) this register and get [`s0_maxwords::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`s0_maxwords::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@s0_maxwords`] module"] #[doc(alias = "S0_MAXWORDS")] pub type S0Maxwords = crate::Reg; #[doc = "Slave MaxWords Register"] pub mod s0_maxwords; -#[doc = "S0_ADDRESS (rw) register accessor: Slave I2C Address Value\n\nYou can [`read`](crate::Reg::read) this register and get [`s0_address::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`s0_address::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@s0_address`] -module"] +#[doc = "S0_ADDRESS (rw) register accessor: Slave I2C Address Value\n\nYou can [`read`](crate::Reg::read) this register and get [`s0_address::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`s0_address::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@s0_address`] module"] #[doc(alias = "S0_ADDRESS")] pub type S0Address = crate::Reg; #[doc = "Slave I2C Address Value"] pub mod s0_address; -#[doc = "S0_ADDRESSMASK (rw) register accessor: Slave I2C Address Mask value\n\nYou can [`read`](crate::Reg::read) this register and get [`s0_addressmask::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`s0_addressmask::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@s0_addressmask`] -module"] +#[doc = "S0_ADDRESSMASK (rw) register accessor: Slave I2C Address Mask value\n\nYou can [`read`](crate::Reg::read) this register and get [`s0_addressmask::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`s0_addressmask::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@s0_addressmask`] module"] #[doc(alias = "S0_ADDRESSMASK")] pub type S0Addressmask = crate::Reg; #[doc = "Slave I2C Address Mask value"] pub mod s0_addressmask; -#[doc = "S0_DATA (rw) register accessor: Slave Data Input/Output\n\nYou can [`read`](crate::Reg::read) this register and get [`s0_data::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`s0_data::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@s0_data`] -module"] +#[doc = "S0_DATA (rw) register accessor: Slave Data Input/Output\n\nYou can [`read`](crate::Reg::read) this register and get [`s0_data::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`s0_data::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@s0_data`] module"] #[doc(alias = "S0_DATA")] pub type S0Data = crate::Reg; #[doc = "Slave Data Input/Output"] pub mod s0_data; -#[doc = "S0_LASTADDRESS (r) register accessor: Slave I2C Last Address value\n\nYou can [`read`](crate::Reg::read) this register and get [`s0_lastaddress::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@s0_lastaddress`] -module"] +#[doc = "S0_LASTADDRESS (r) register accessor: Slave I2C Last Address value\n\nYou can [`read`](crate::Reg::read) this register and get [`s0_lastaddress::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@s0_lastaddress`] module"] #[doc(alias = "S0_LASTADDRESS")] pub type S0Lastaddress = crate::Reg; #[doc = "Slave I2C Last Address value"] pub mod s0_lastaddress; -#[doc = "S0_STATUS (r) register accessor: Slave I2C Controller Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`s0_status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@s0_status`] -module"] +#[doc = "S0_STATUS (r) register accessor: Slave I2C Controller Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`s0_status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@s0_status`] module"] #[doc(alias = "S0_STATUS")] pub type S0Status = crate::Reg; #[doc = "Slave I2C Controller Status Register"] pub mod s0_status; -#[doc = "S0_STATE (r) register accessor: Internal STATE of I2C Slave Controller\n\nYou can [`read`](crate::Reg::read) this register and get [`s0_state::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@s0_state`] -module"] +#[doc = "S0_STATE (r) register accessor: Internal STATE of I2C Slave Controller\n\nYou can [`read`](crate::Reg::read) this register and get [`s0_state::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@s0_state`] module"] #[doc(alias = "S0_STATE")] pub type S0State = crate::Reg; #[doc = "Internal STATE of I2C Slave Controller"] pub mod s0_state; -#[doc = "S0_TXCOUNT (r) register accessor: Slave TX Count Register\n\nYou can [`read`](crate::Reg::read) this register and get [`s0_txcount::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@s0_txcount`] -module"] +#[doc = "S0_TXCOUNT (r) register accessor: Slave TX Count Register\n\nYou can [`read`](crate::Reg::read) this register and get [`s0_txcount::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@s0_txcount`] module"] #[doc(alias = "S0_TXCOUNT")] pub type S0Txcount = crate::Reg; #[doc = "Slave TX Count Register"] pub mod s0_txcount; -#[doc = "S0_RXCOUNT (r) register accessor: Slave RX Count Register\n\nYou can [`read`](crate::Reg::read) this register and get [`s0_rxcount::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@s0_rxcount`] -module"] +#[doc = "S0_RXCOUNT (r) register accessor: Slave RX Count Register\n\nYou can [`read`](crate::Reg::read) this register and get [`s0_rxcount::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@s0_rxcount`] module"] #[doc(alias = "S0_RXCOUNT")] pub type S0Rxcount = crate::Reg; #[doc = "Slave RX Count Register"] pub mod s0_rxcount; -#[doc = "S0_IRQ_ENB (rw) register accessor: Slave Interrupt Enable Register\n\nYou can [`read`](crate::Reg::read) this register and get [`s0_irq_enb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`s0_irq_enb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@s0_irq_enb`] -module"] +#[doc = "S0_IRQ_ENB (rw) register accessor: Slave Interrupt Enable Register\n\nYou can [`read`](crate::Reg::read) this register and get [`s0_irq_enb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`s0_irq_enb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@s0_irq_enb`] module"] #[doc(alias = "S0_IRQ_ENB")] pub type S0IrqEnb = crate::Reg; #[doc = "Slave Interrupt Enable Register"] @@ -414,38 +387,32 @@ pub use s0_irq_enb as s0_irq_clr; pub use S0IrqEnb as S0IrqRaw; pub use S0IrqEnb as S0IrqEnd; pub use S0IrqEnb as S0IrqClr; -#[doc = "S0_RXFIFOIRQTRG (rw) register accessor: Slave Rx FIFO IRQ Trigger Level\n\nYou can [`read`](crate::Reg::read) this register and get [`s0_rxfifoirqtrg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`s0_rxfifoirqtrg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@s0_rxfifoirqtrg`] -module"] +#[doc = "S0_RXFIFOIRQTRG (rw) register accessor: Slave Rx FIFO IRQ Trigger Level\n\nYou can [`read`](crate::Reg::read) this register and get [`s0_rxfifoirqtrg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`s0_rxfifoirqtrg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@s0_rxfifoirqtrg`] module"] #[doc(alias = "S0_RXFIFOIRQTRG")] pub type S0Rxfifoirqtrg = crate::Reg; #[doc = "Slave Rx FIFO IRQ Trigger Level"] pub mod s0_rxfifoirqtrg; -#[doc = "S0_TXFIFOIRQTRG (rw) register accessor: Slave Tx FIFO IRQ Trigger Level\n\nYou can [`read`](crate::Reg::read) this register and get [`s0_txfifoirqtrg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`s0_txfifoirqtrg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@s0_txfifoirqtrg`] -module"] +#[doc = "S0_TXFIFOIRQTRG (rw) register accessor: Slave Tx FIFO IRQ Trigger Level\n\nYou can [`read`](crate::Reg::read) this register and get [`s0_txfifoirqtrg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`s0_txfifoirqtrg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@s0_txfifoirqtrg`] module"] #[doc(alias = "S0_TXFIFOIRQTRG")] pub type S0Txfifoirqtrg = crate::Reg; #[doc = "Slave Tx FIFO IRQ Trigger Level"] pub mod s0_txfifoirqtrg; -#[doc = "S0_FIFO_CLR (w) register accessor: Slave Clear FIFO Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`s0_fifo_clr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@s0_fifo_clr`] -module"] +#[doc = "S0_FIFO_CLR (w) register accessor: Slave Clear FIFO Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`s0_fifo_clr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@s0_fifo_clr`] module"] #[doc(alias = "S0_FIFO_CLR")] pub type S0FifoClr = crate::Reg; #[doc = "Slave Clear FIFO Register"] pub mod s0_fifo_clr; -#[doc = "S0_ADDRESSB (rw) register accessor: Slave I2C Address B Value\n\nYou can [`read`](crate::Reg::read) this register and get [`s0_addressb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`s0_addressb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@s0_addressb`] -module"] +#[doc = "S0_ADDRESSB (rw) register accessor: Slave I2C Address B Value\n\nYou can [`read`](crate::Reg::read) this register and get [`s0_addressb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`s0_addressb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@s0_addressb`] module"] #[doc(alias = "S0_ADDRESSB")] pub type S0Addressb = crate::Reg; #[doc = "Slave I2C Address B Value"] pub mod s0_addressb; -#[doc = "S0_ADDRESSMASKB (rw) register accessor: Slave I2C Address B Mask value\n\nYou can [`read`](crate::Reg::read) this register and get [`s0_addressmaskb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`s0_addressmaskb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@s0_addressmaskb`] -module"] +#[doc = "S0_ADDRESSMASKB (rw) register accessor: Slave I2C Address B Mask value\n\nYou can [`read`](crate::Reg::read) this register and get [`s0_addressmaskb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`s0_addressmaskb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@s0_addressmaskb`] module"] #[doc(alias = "S0_ADDRESSMASKB")] pub type S0Addressmaskb = crate::Reg; #[doc = "Slave I2C Address B Mask value"] pub mod s0_addressmaskb; -#[doc = "PERID (r) register accessor: Peripheral ID Register\n\nYou can [`read`](crate::Reg::read) this register and get [`perid::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@perid`] -module"] +#[doc = "PERID (r) register accessor: Peripheral ID Register\n\nYou can [`read`](crate::Reg::read) this register and get [`perid::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@perid`] module"] #[doc(alias = "PERID")] pub type Perid = crate::Reg; #[doc = "Peripheral ID Register"] diff --git a/va416xx/src/i2c0/address.rs b/va416xx/src/i2c0/address.rs index 51d1ae1..af668ea 100644 --- a/va416xx/src/i2c0/address.rs +++ b/va416xx/src/i2c0/address.rs @@ -19,10 +19,6 @@ impl crate::Readable for AddressSpec {} #[doc = "`write(|w| ..)` method takes [`address::W`](W) writer structure"] impl crate::Writable for AddressSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ADDRESS to value 0"] -impl crate::Resettable for AddressSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for AddressSpec {} diff --git a/va416xx/src/i2c0/clkscale.rs b/va416xx/src/i2c0/clkscale.rs index 2989232..1562308 100644 --- a/va416xx/src/i2c0/clkscale.rs +++ b/va416xx/src/i2c0/clkscale.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:30 - Enable FastMode"] #[inline(always)] - pub fn value(&mut self) -> ValueW { + pub fn value(&mut self) -> ValueW<'_, ClkscaleSpec> { ValueW::new(self, 0) } #[doc = "Bit 31 - Enable FastMode"] #[inline(always)] - pub fn fastmode(&mut self) -> FastmodeW { + pub fn fastmode(&mut self) -> FastmodeW<'_, ClkscaleSpec> { FastmodeW::new(self, 31) } } @@ -44,10 +44,6 @@ impl crate::Readable for ClkscaleSpec {} #[doc = "`write(|w| ..)` method takes [`clkscale::W`](W) writer structure"] impl crate::Writable for ClkscaleSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CLKSCALE to value 0"] -impl crate::Resettable for ClkscaleSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for ClkscaleSpec {} diff --git a/va416xx/src/i2c0/clktolimit.rs b/va416xx/src/i2c0/clktolimit.rs index 4c289f7..fa91d73 100644 --- a/va416xx/src/i2c0/clktolimit.rs +++ b/va416xx/src/i2c0/clktolimit.rs @@ -19,10 +19,6 @@ impl crate::Readable for ClktolimitSpec {} #[doc = "`write(|w| ..)` method takes [`clktolimit::W`](W) writer structure"] impl crate::Writable for ClktolimitSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CLKTOLIMIT to value 0"] -impl crate::Resettable for ClktolimitSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for ClktolimitSpec {} diff --git a/va416xx/src/i2c0/cmd.rs b/va416xx/src/i2c0/cmd.rs index 8ae8aaa..bc295f0 100644 --- a/va416xx/src/i2c0/cmd.rs +++ b/va416xx/src/i2c0/cmd.rs @@ -19,10 +19,6 @@ impl crate::Readable for CmdSpec {} #[doc = "`write(|w| ..)` method takes [`cmd::W`](W) writer structure"] impl crate::Writable for CmdSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CMD to value 0"] -impl crate::Resettable for CmdSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for CmdSpec {} diff --git a/va416xx/src/i2c0/ctrl.rs b/va416xx/src/i2c0/ctrl.rs index bda794b..cdd52e2 100644 --- a/va416xx/src/i2c0/ctrl.rs +++ b/va416xx/src/i2c0/ctrl.rs @@ -88,47 +88,47 @@ impl R { impl W { #[doc = "Bit 0 - I2C CLK Enabled"] #[inline(always)] - pub fn clkenabled(&mut self) -> ClkenabledW { + pub fn clkenabled(&mut self) -> ClkenabledW<'_, CtrlSpec> { ClkenabledW::new(self, 0) } #[doc = "Bit 1 - I2C Activated"] #[inline(always)] - pub fn enabled(&mut self) -> EnabledW { + pub fn enabled(&mut self) -> EnabledW<'_, CtrlSpec> { EnabledW::new(self, 1) } #[doc = "Bit 2 - I2C Active"] #[inline(always)] - pub fn enable(&mut self) -> EnableW { + pub fn enable(&mut self) -> EnableW<'_, CtrlSpec> { EnableW::new(self, 2) } #[doc = "Bit 3 - TX FIFIO Empty Mode"] #[inline(always)] - pub fn txfemd(&mut self) -> TxfemdW { + pub fn txfemd(&mut self) -> TxfemdW<'_, CtrlSpec> { TxfemdW::new(self, 3) } #[doc = "Bit 4 - RX FIFO Full Mode"] #[inline(always)] - pub fn rxffmd(&mut self) -> RxffmdW { + pub fn rxffmd(&mut self) -> RxffmdW<'_, CtrlSpec> { RxffmdW::new(self, 4) } #[doc = "Bit 5 - Enable Input Analog Glitch Filter"] #[inline(always)] - pub fn algfilter(&mut self) -> AlgfilterW { + pub fn algfilter(&mut self) -> AlgfilterW<'_, CtrlSpec> { AlgfilterW::new(self, 5) } #[doc = "Bit 6 - Enable Input Digital Glitch Filter"] #[inline(always)] - pub fn dlgfilter(&mut self) -> DlgfilterW { + pub fn dlgfilter(&mut self) -> DlgfilterW<'_, CtrlSpec> { DlgfilterW::new(self, 6) } #[doc = "Bit 8 - Enable LoopBack Mode"] #[inline(always)] - pub fn loopback(&mut self) -> LoopbackW { + pub fn loopback(&mut self) -> LoopbackW<'_, CtrlSpec> { LoopbackW::new(self, 8) } #[doc = "Bit 9 - Enable Timing Config Register"] #[inline(always)] - pub fn tmconfigenb(&mut self) -> TmconfigenbW { + pub fn tmconfigenb(&mut self) -> TmconfigenbW<'_, CtrlSpec> { TmconfigenbW::new(self, 9) } } @@ -142,10 +142,6 @@ impl crate::Readable for CtrlSpec {} #[doc = "`write(|w| ..)` method takes [`ctrl::W`](W) writer structure"] impl crate::Writable for CtrlSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTRL to value 0"] -impl crate::Resettable for CtrlSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for CtrlSpec {} diff --git a/va416xx/src/i2c0/data.rs b/va416xx/src/i2c0/data.rs index 55983d3..8968f26 100644 --- a/va416xx/src/i2c0/data.rs +++ b/va416xx/src/i2c0/data.rs @@ -19,10 +19,6 @@ impl crate::Readable for DataSpec {} #[doc = "`write(|w| ..)` method takes [`data::W`](W) writer structure"] impl crate::Writable for DataSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA to value 0"] -impl crate::Resettable for DataSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for DataSpec {} diff --git a/va416xx/src/i2c0/fifo_clr.rs b/va416xx/src/i2c0/fifo_clr.rs index af272ab..339ac41 100644 --- a/va416xx/src/i2c0/fifo_clr.rs +++ b/va416xx/src/i2c0/fifo_clr.rs @@ -7,12 +7,12 @@ pub type TxfifoW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Clear Rx FIFO"] #[inline(always)] - pub fn rxfifo(&mut self) -> RxfifoW { + pub fn rxfifo(&mut self) -> RxfifoW<'_, FifoClrSpec> { RxfifoW::new(self, 0) } #[doc = "Bit 1 - Clear Tx FIFO"] #[inline(always)] - pub fn txfifo(&mut self) -> TxfifoW { + pub fn txfifo(&mut self) -> TxfifoW<'_, FifoClrSpec> { TxfifoW::new(self, 1) } } @@ -24,10 +24,6 @@ impl crate::RegisterSpec for FifoClrSpec { #[doc = "`write(|w| ..)` method takes [`fifo_clr::W`](W) writer structure"] impl crate::Writable for FifoClrSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets FIFO_CLR to value 0"] -impl crate::Resettable for FifoClrSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for FifoClrSpec {} diff --git a/va416xx/src/i2c0/irq_enb.rs b/va416xx/src/i2c0/irq_enb.rs index e6ef1c7..df35253 100644 --- a/va416xx/src/i2c0/irq_enb.rs +++ b/va416xx/src/i2c0/irq_enb.rs @@ -133,72 +133,72 @@ impl R { impl W { #[doc = "Bit 0 - I2C Bus is Idle"] #[inline(always)] - pub fn i2cidle(&mut self) -> I2cidleW { + pub fn i2cidle(&mut self) -> I2cidleW<'_, IrqEnbSpec> { I2cidleW::new(self, 0) } #[doc = "Bit 1 - Controller is Idle"] #[inline(always)] - pub fn idle(&mut self) -> IdleW { + pub fn idle(&mut self) -> IdleW<'_, IrqEnbSpec> { IdleW::new(self, 1) } #[doc = "Bit 2 - Controller is Waiting"] #[inline(always)] - pub fn waiting(&mut self) -> WaitingW { + pub fn waiting(&mut self) -> WaitingW<'_, IrqEnbSpec> { WaitingW::new(self, 2) } #[doc = "Bit 3 - Controller is Stalled"] #[inline(always)] - pub fn stalled(&mut self) -> StalledW { + pub fn stalled(&mut self) -> StalledW<'_, IrqEnbSpec> { StalledW::new(self, 3) } #[doc = "Bit 4 - I2C Arbitration was lost"] #[inline(always)] - pub fn arblost(&mut self) -> ArblostW { + pub fn arblost(&mut self) -> ArblostW<'_, IrqEnbSpec> { ArblostW::new(self, 4) } #[doc = "Bit 5 - I2C Address was not Acknowledged"] #[inline(always)] - pub fn nackaddr(&mut self) -> NackaddrW { + pub fn nackaddr(&mut self) -> NackaddrW<'_, IrqEnbSpec> { NackaddrW::new(self, 5) } #[doc = "Bit 6 - I2C Data was not Acknowledged"] #[inline(always)] - pub fn nackdata(&mut self) -> NackdataW { + pub fn nackdata(&mut self) -> NackdataW<'_, IrqEnbSpec> { NackdataW::new(self, 6) } #[doc = "Bit 7 - I2C Clock Low Timeout"] #[inline(always)] - pub fn clkloto(&mut self) -> ClklotoW { + pub fn clkloto(&mut self) -> ClklotoW<'_, IrqEnbSpec> { ClklotoW::new(self, 7) } #[doc = "Bit 10 - TX FIFO Overflowed"] #[inline(always)] - pub fn txoverflow(&mut self) -> TxoverflowW { + pub fn txoverflow(&mut self) -> TxoverflowW<'_, IrqEnbSpec> { TxoverflowW::new(self, 10) } #[doc = "Bit 11 - TX FIFO Overflowed"] #[inline(always)] - pub fn rxoverflow(&mut self) -> RxoverflowW { + pub fn rxoverflow(&mut self) -> RxoverflowW<'_, IrqEnbSpec> { RxoverflowW::new(self, 11) } #[doc = "Bit 12 - TX FIFO Ready"] #[inline(always)] - pub fn txready(&mut self) -> TxreadyW { + pub fn txready(&mut self) -> TxreadyW<'_, IrqEnbSpec> { TxreadyW::new(self, 12) } #[doc = "Bit 13 - RX FIFO Ready"] #[inline(always)] - pub fn rxready(&mut self) -> RxreadyW { + pub fn rxready(&mut self) -> RxreadyW<'_, IrqEnbSpec> { RxreadyW::new(self, 13) } #[doc = "Bit 14 - TX FIFO Empty"] #[inline(always)] - pub fn txempty(&mut self) -> TxemptyW { + pub fn txempty(&mut self) -> TxemptyW<'_, IrqEnbSpec> { TxemptyW::new(self, 14) } #[doc = "Bit 15 - RX FIFO Full"] #[inline(always)] - pub fn rxfull(&mut self) -> RxfullW { + pub fn rxfull(&mut self) -> RxfullW<'_, IrqEnbSpec> { RxfullW::new(self, 15) } } @@ -212,10 +212,6 @@ impl crate::Readable for IrqEnbSpec {} #[doc = "`write(|w| ..)` method takes [`irq_enb::W`](W) writer structure"] impl crate::Writable for IrqEnbSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IRQ_ENB to value 0"] -impl crate::Resettable for IrqEnbSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for IrqEnbSpec {} diff --git a/va416xx/src/i2c0/rxcount.rs b/va416xx/src/i2c0/rxcount.rs index af5fae5..eb4e7c1 100644 --- a/va416xx/src/i2c0/rxcount.rs +++ b/va416xx/src/i2c0/rxcount.rs @@ -14,6 +14,4 @@ impl crate::RegisterSpec for RxcountSpec { #[doc = "`read()` method returns [`rxcount::R`](R) reader structure"] impl crate::Readable for RxcountSpec {} #[doc = "`reset()` method sets RXCOUNT to value 0"] -impl crate::Resettable for RxcountSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for RxcountSpec {} diff --git a/va416xx/src/i2c0/rxfifoirqtrg.rs b/va416xx/src/i2c0/rxfifoirqtrg.rs index 450e256..e38d450 100644 --- a/va416xx/src/i2c0/rxfifoirqtrg.rs +++ b/va416xx/src/i2c0/rxfifoirqtrg.rs @@ -19,10 +19,6 @@ impl crate::Readable for RxfifoirqtrgSpec {} #[doc = "`write(|w| ..)` method takes [`rxfifoirqtrg::W`](W) writer structure"] impl crate::Writable for RxfifoirqtrgSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RXFIFOIRQTRG to value 0"] -impl crate::Resettable for RxfifoirqtrgSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for RxfifoirqtrgSpec {} diff --git a/va416xx/src/i2c0/s0_address.rs b/va416xx/src/i2c0/s0_address.rs index 7d6b0d6..5d3e659 100644 --- a/va416xx/src/i2c0/s0_address.rs +++ b/va416xx/src/i2c0/s0_address.rs @@ -34,17 +34,17 @@ impl R { impl W { #[doc = "Bit 0 - Read/Write value"] #[inline(always)] - pub fn rw(&mut self) -> RwW { + pub fn rw(&mut self) -> RwW<'_, S0AddressSpec> { RwW::new(self, 0) } #[doc = "Bits 1:10 - Address value"] #[inline(always)] - pub fn address(&mut self) -> AddressW { + pub fn address(&mut self) -> AddressW<'_, S0AddressSpec> { AddressW::new(self, 1) } #[doc = "Bit 15 - Enable 10b address mode"] #[inline(always)] - pub fn a10mode(&mut self) -> A10modeW { + pub fn a10mode(&mut self) -> A10modeW<'_, S0AddressSpec> { A10modeW::new(self, 15) } } @@ -58,10 +58,6 @@ impl crate::Readable for S0AddressSpec {} #[doc = "`write(|w| ..)` method takes [`s0_address::W`](W) writer structure"] impl crate::Writable for S0AddressSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets S0_ADDRESS to value 0"] -impl crate::Resettable for S0AddressSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for S0AddressSpec {} diff --git a/va416xx/src/i2c0/s0_addressb.rs b/va416xx/src/i2c0/s0_addressb.rs index 1b420f0..dbdce92 100644 --- a/va416xx/src/i2c0/s0_addressb.rs +++ b/va416xx/src/i2c0/s0_addressb.rs @@ -34,17 +34,17 @@ impl R { impl W { #[doc = "Bit 0 - Read write value"] #[inline(always)] - pub fn rw(&mut self) -> RwW { + pub fn rw(&mut self) -> RwW<'_, S0AddressbSpec> { RwW::new(self, 0) } #[doc = "Bits 1:10 - Address value"] #[inline(always)] - pub fn address(&mut self) -> AddressW { + pub fn address(&mut self) -> AddressW<'_, S0AddressbSpec> { AddressW::new(self, 1) } #[doc = "Bit 15 - Enable Address B"] #[inline(always)] - pub fn addressben(&mut self) -> AddressbenW { + pub fn addressben(&mut self) -> AddressbenW<'_, S0AddressbSpec> { AddressbenW::new(self, 15) } } @@ -58,10 +58,6 @@ impl crate::Readable for S0AddressbSpec {} #[doc = "`write(|w| ..)` method takes [`s0_addressb::W`](W) writer structure"] impl crate::Writable for S0AddressbSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets S0_ADDRESSB to value 0"] -impl crate::Resettable for S0AddressbSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for S0AddressbSpec {} diff --git a/va416xx/src/i2c0/s0_addressmask.rs b/va416xx/src/i2c0/s0_addressmask.rs index 4b5b77c..1d7e82b 100644 --- a/va416xx/src/i2c0/s0_addressmask.rs +++ b/va416xx/src/i2c0/s0_addressmask.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bit 0 - Read/Write mask"] #[inline(always)] - pub fn rwmask(&mut self) -> RwmaskW { + pub fn rwmask(&mut self) -> RwmaskW<'_, S0AddressmaskSpec> { RwmaskW::new(self, 0) } #[doc = "Bits 1:10 - Address mask value"] #[inline(always)] - pub fn mask(&mut self) -> MaskW { + pub fn mask(&mut self) -> MaskW<'_, S0AddressmaskSpec> { MaskW::new(self, 1) } } @@ -44,10 +44,6 @@ impl crate::Readable for S0AddressmaskSpec {} #[doc = "`write(|w| ..)` method takes [`s0_addressmask::W`](W) writer structure"] impl crate::Writable for S0AddressmaskSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets S0_ADDRESSMASK to value 0"] -impl crate::Resettable for S0AddressmaskSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for S0AddressmaskSpec {} diff --git a/va416xx/src/i2c0/s0_addressmaskb.rs b/va416xx/src/i2c0/s0_addressmaskb.rs index 1710929..f13b6e6 100644 --- a/va416xx/src/i2c0/s0_addressmaskb.rs +++ b/va416xx/src/i2c0/s0_addressmaskb.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bit 0 - Read write mask"] #[inline(always)] - pub fn rwmask(&mut self) -> RwmaskW { + pub fn rwmask(&mut self) -> RwmaskW<'_, S0AddressmaskbSpec> { RwmaskW::new(self, 0) } #[doc = "Bits 1:10 - Address mask value"] #[inline(always)] - pub fn mask(&mut self) -> MaskW { + pub fn mask(&mut self) -> MaskW<'_, S0AddressmaskbSpec> { MaskW::new(self, 1) } } @@ -44,8 +44,6 @@ impl crate::Readable for S0AddressmaskbSpec {} #[doc = "`write(|w| ..)` method takes [`s0_addressmaskb::W`](W) writer structure"] impl crate::Writable for S0AddressmaskbSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets S0_ADDRESSMASKB to value 0x07fe"] impl crate::Resettable for S0AddressmaskbSpec { diff --git a/va416xx/src/i2c0/s0_ctrl.rs b/va416xx/src/i2c0/s0_ctrl.rs index ef6554f..0bfde74 100644 --- a/va416xx/src/i2c0/s0_ctrl.rs +++ b/va416xx/src/i2c0/s0_ctrl.rs @@ -52,27 +52,27 @@ impl R { impl W { #[doc = "Bit 0 - I2C Enabled"] #[inline(always)] - pub fn clkenabled(&mut self) -> ClkenabledW { + pub fn clkenabled(&mut self) -> ClkenabledW<'_, S0CtrlSpec> { ClkenabledW::new(self, 0) } #[doc = "Bit 1 - I2C Activated"] #[inline(always)] - pub fn enabled(&mut self) -> EnabledW { + pub fn enabled(&mut self) -> EnabledW<'_, S0CtrlSpec> { EnabledW::new(self, 1) } #[doc = "Bit 2 - I2C Active"] #[inline(always)] - pub fn enable(&mut self) -> EnableW { + pub fn enable(&mut self) -> EnableW<'_, S0CtrlSpec> { EnableW::new(self, 2) } #[doc = "Bit 3 - TX FIFIO Empty Mode"] #[inline(always)] - pub fn txfemd(&mut self) -> TxfemdW { + pub fn txfemd(&mut self) -> TxfemdW<'_, S0CtrlSpec> { TxfemdW::new(self, 3) } #[doc = "Bit 4 - RX FIFO Full Mode"] #[inline(always)] - pub fn rxffmd(&mut self) -> RxffmdW { + pub fn rxffmd(&mut self) -> RxffmdW<'_, S0CtrlSpec> { RxffmdW::new(self, 4) } } @@ -86,10 +86,6 @@ impl crate::Readable for S0CtrlSpec {} #[doc = "`write(|w| ..)` method takes [`s0_ctrl::W`](W) writer structure"] impl crate::Writable for S0CtrlSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets S0_CTRL to value 0"] -impl crate::Resettable for S0CtrlSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for S0CtrlSpec {} diff --git a/va416xx/src/i2c0/s0_data.rs b/va416xx/src/i2c0/s0_data.rs index ec0d5a7..aa7c40a 100644 --- a/va416xx/src/i2c0/s0_data.rs +++ b/va416xx/src/i2c0/s0_data.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:7 - I2C data value"] #[inline(always)] - pub fn value(&mut self) -> ValueW { + pub fn value(&mut self) -> ValueW<'_, S0DataSpec> { ValueW::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for S0DataSpec {} #[doc = "`write(|w| ..)` method takes [`s0_data::W`](W) writer structure"] impl crate::Writable for S0DataSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets S0_DATA to value 0"] -impl crate::Resettable for S0DataSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for S0DataSpec {} diff --git a/va416xx/src/i2c0/s0_fifo_clr.rs b/va416xx/src/i2c0/s0_fifo_clr.rs index 84cc53a..b36d3e2 100644 --- a/va416xx/src/i2c0/s0_fifo_clr.rs +++ b/va416xx/src/i2c0/s0_fifo_clr.rs @@ -7,12 +7,12 @@ pub type TxfifoW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Clear Rx FIFO"] #[inline(always)] - pub fn rxfifo(&mut self) -> RxfifoW { + pub fn rxfifo(&mut self) -> RxfifoW<'_, S0FifoClrSpec> { RxfifoW::new(self, 0) } #[doc = "Bit 1 - Clear Tx FIFO"] #[inline(always)] - pub fn txfifo(&mut self) -> TxfifoW { + pub fn txfifo(&mut self) -> TxfifoW<'_, S0FifoClrSpec> { TxfifoW::new(self, 1) } } @@ -24,10 +24,6 @@ impl crate::RegisterSpec for S0FifoClrSpec { #[doc = "`write(|w| ..)` method takes [`s0_fifo_clr::W`](W) writer structure"] impl crate::Writable for S0FifoClrSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets S0_FIFO_CLR to value 0"] -impl crate::Resettable for S0FifoClrSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for S0FifoClrSpec {} diff --git a/va416xx/src/i2c0/s0_irq_enb.rs b/va416xx/src/i2c0/s0_irq_enb.rs index 5779751..47e6f08 100644 --- a/va416xx/src/i2c0/s0_irq_enb.rs +++ b/va416xx/src/i2c0/s0_irq_enb.rs @@ -151,82 +151,82 @@ impl R { impl W { #[doc = "Bit 0 - Controller Complted a Transaction"] #[inline(always)] - pub fn completed(&mut self) -> CompletedW { + pub fn completed(&mut self) -> CompletedW<'_, S0IrqEnbSpec> { CompletedW::new(self, 0) } #[doc = "Bit 1 - Controller is Idle"] #[inline(always)] - pub fn idle(&mut self) -> IdleW { + pub fn idle(&mut self) -> IdleW<'_, S0IrqEnbSpec> { IdleW::new(self, 1) } #[doc = "Bit 2 - Controller is Waiting"] #[inline(always)] - pub fn waiting(&mut self) -> WaitingW { + pub fn waiting(&mut self) -> WaitingW<'_, S0IrqEnbSpec> { WaitingW::new(self, 2) } #[doc = "Bit 3 - Controller is Tx Stalled"] #[inline(always)] - pub fn txstalled(&mut self) -> TxstalledW { + pub fn txstalled(&mut self) -> TxstalledW<'_, S0IrqEnbSpec> { TxstalledW::new(self, 3) } #[doc = "Bit 4 - Controller is Rx Stalled"] #[inline(always)] - pub fn rxstalled(&mut self) -> RxstalledW { + pub fn rxstalled(&mut self) -> RxstalledW<'_, S0IrqEnbSpec> { RxstalledW::new(self, 4) } #[doc = "Bit 5 - I2C Address Match"] #[inline(always)] - pub fn addressmatch(&mut self) -> AddressmatchW { + pub fn addressmatch(&mut self) -> AddressmatchW<'_, S0IrqEnbSpec> { AddressmatchW::new(self, 5) } #[doc = "Bit 6 - I2C Data was not Acknowledged"] #[inline(always)] - pub fn nackdata(&mut self) -> NackdataW { + pub fn nackdata(&mut self) -> NackdataW<'_, S0IrqEnbSpec> { NackdataW::new(self, 6) } #[doc = "Bit 7 - Pending Data is first Byte following Address"] #[inline(always)] - pub fn rxdatafirst(&mut self) -> RxdatafirstW { + pub fn rxdatafirst(&mut self) -> RxdatafirstW<'_, S0IrqEnbSpec> { RxdatafirstW::new(self, 7) } #[doc = "Bit 8 - I2C Start Condition"] #[inline(always)] - pub fn i2c_start(&mut self) -> I2cStartW { + pub fn i2c_start(&mut self) -> I2cStartW<'_, S0IrqEnbSpec> { I2cStartW::new(self, 8) } #[doc = "Bit 9 - I2C Stop Condition"] #[inline(always)] - pub fn i2c_stop(&mut self) -> I2cStopW { + pub fn i2c_stop(&mut self) -> I2cStopW<'_, S0IrqEnbSpec> { I2cStopW::new(self, 9) } #[doc = "Bit 10 - TX FIFO Underflowed"] #[inline(always)] - pub fn txunderflow(&mut self) -> TxunderflowW { + pub fn txunderflow(&mut self) -> TxunderflowW<'_, S0IrqEnbSpec> { TxunderflowW::new(self, 10) } #[doc = "Bit 11 - TX FIFO Overflowed"] #[inline(always)] - pub fn rxoverflow(&mut self) -> RxoverflowW { + pub fn rxoverflow(&mut self) -> RxoverflowW<'_, S0IrqEnbSpec> { RxoverflowW::new(self, 11) } #[doc = "Bit 12 - TX FIFO Ready"] #[inline(always)] - pub fn txready(&mut self) -> TxreadyW { + pub fn txready(&mut self) -> TxreadyW<'_, S0IrqEnbSpec> { TxreadyW::new(self, 12) } #[doc = "Bit 13 - RX FIFO Ready"] #[inline(always)] - pub fn rxready(&mut self) -> RxreadyW { + pub fn rxready(&mut self) -> RxreadyW<'_, S0IrqEnbSpec> { RxreadyW::new(self, 13) } #[doc = "Bit 14 - TX FIFO Empty"] #[inline(always)] - pub fn txempty(&mut self) -> TxemptyW { + pub fn txempty(&mut self) -> TxemptyW<'_, S0IrqEnbSpec> { TxemptyW::new(self, 14) } #[doc = "Bit 15 - RX FIFO Full"] #[inline(always)] - pub fn rxfull(&mut self) -> RxfullW { + pub fn rxfull(&mut self) -> RxfullW<'_, S0IrqEnbSpec> { RxfullW::new(self, 15) } } @@ -240,10 +240,6 @@ impl crate::Readable for S0IrqEnbSpec {} #[doc = "`write(|w| ..)` method takes [`s0_irq_enb::W`](W) writer structure"] impl crate::Writable for S0IrqEnbSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets S0_IRQ_ENB to value 0"] -impl crate::Resettable for S0IrqEnbSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for S0IrqEnbSpec {} diff --git a/va416xx/src/i2c0/s0_lastaddress.rs b/va416xx/src/i2c0/s0_lastaddress.rs index 8dc2f9f..c71e2c6 100644 --- a/va416xx/src/i2c0/s0_lastaddress.rs +++ b/va416xx/src/i2c0/s0_lastaddress.rs @@ -24,6 +24,4 @@ impl crate::RegisterSpec for S0LastaddressSpec { #[doc = "`read()` method returns [`s0_lastaddress::R`](R) reader structure"] impl crate::Readable for S0LastaddressSpec {} #[doc = "`reset()` method sets S0_LASTADDRESS to value 0"] -impl crate::Resettable for S0LastaddressSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for S0LastaddressSpec {} diff --git a/va416xx/src/i2c0/s0_maxwords.rs b/va416xx/src/i2c0/s0_maxwords.rs index 6939dc7..1e8956e 100644 --- a/va416xx/src/i2c0/s0_maxwords.rs +++ b/va416xx/src/i2c0/s0_maxwords.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:10 - Max Word Count"] #[inline(always)] - pub fn maxword(&mut self) -> MaxwordW { + pub fn maxword(&mut self) -> MaxwordW<'_, S0MaxwordsSpec> { MaxwordW::new(self, 0) } #[doc = "Bit 31 - Enables the max word count"] #[inline(always)] - pub fn enable(&mut self) -> EnableW { + pub fn enable(&mut self) -> EnableW<'_, S0MaxwordsSpec> { EnableW::new(self, 31) } } @@ -44,10 +44,6 @@ impl crate::Readable for S0MaxwordsSpec {} #[doc = "`write(|w| ..)` method takes [`s0_maxwords::W`](W) writer structure"] impl crate::Writable for S0MaxwordsSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets S0_MAXWORDS to value 0"] -impl crate::Resettable for S0MaxwordsSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for S0MaxwordsSpec {} diff --git a/va416xx/src/i2c0/s0_rxcount.rs b/va416xx/src/i2c0/s0_rxcount.rs index aa88340..099cfd3 100644 --- a/va416xx/src/i2c0/s0_rxcount.rs +++ b/va416xx/src/i2c0/s0_rxcount.rs @@ -17,6 +17,4 @@ impl crate::RegisterSpec for S0RxcountSpec { #[doc = "`read()` method returns [`s0_rxcount::R`](R) reader structure"] impl crate::Readable for S0RxcountSpec {} #[doc = "`reset()` method sets S0_RXCOUNT to value 0"] -impl crate::Resettable for S0RxcountSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for S0RxcountSpec {} diff --git a/va416xx/src/i2c0/s0_rxfifoirqtrg.rs b/va416xx/src/i2c0/s0_rxfifoirqtrg.rs index 6068a57..3343d2f 100644 --- a/va416xx/src/i2c0/s0_rxfifoirqtrg.rs +++ b/va416xx/src/i2c0/s0_rxfifoirqtrg.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:4 - Half full level for the Rx FIFO"] #[inline(always)] - pub fn level(&mut self) -> LevelW { + pub fn level(&mut self) -> LevelW<'_, S0RxfifoirqtrgSpec> { LevelW::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for S0RxfifoirqtrgSpec {} #[doc = "`write(|w| ..)` method takes [`s0_rxfifoirqtrg::W`](W) writer structure"] impl crate::Writable for S0RxfifoirqtrgSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets S0_RXFIFOIRQTRG to value 0"] -impl crate::Resettable for S0RxfifoirqtrgSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for S0RxfifoirqtrgSpec {} diff --git a/va416xx/src/i2c0/s0_state.rs b/va416xx/src/i2c0/s0_state.rs index d68368e..19c09e3 100644 --- a/va416xx/src/i2c0/s0_state.rs +++ b/va416xx/src/i2c0/s0_state.rs @@ -14,6 +14,4 @@ impl crate::RegisterSpec for S0StateSpec { #[doc = "`read()` method returns [`s0_state::R`](R) reader structure"] impl crate::Readable for S0StateSpec {} #[doc = "`reset()` method sets S0_STATE to value 0"] -impl crate::Resettable for S0StateSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for S0StateSpec {} diff --git a/va416xx/src/i2c0/s0_status.rs b/va416xx/src/i2c0/s0_status.rs index d6b5208..ae6e4bb 100644 --- a/va416xx/src/i2c0/s0_status.rs +++ b/va416xx/src/i2c0/s0_status.rs @@ -129,6 +129,4 @@ impl crate::RegisterSpec for S0StatusSpec { #[doc = "`read()` method returns [`s0_status::R`](R) reader structure"] impl crate::Readable for S0StatusSpec {} #[doc = "`reset()` method sets S0_STATUS to value 0"] -impl crate::Resettable for S0StatusSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for S0StatusSpec {} diff --git a/va416xx/src/i2c0/s0_txcount.rs b/va416xx/src/i2c0/s0_txcount.rs index 024a410..a5e51e1 100644 --- a/va416xx/src/i2c0/s0_txcount.rs +++ b/va416xx/src/i2c0/s0_txcount.rs @@ -17,6 +17,4 @@ impl crate::RegisterSpec for S0TxcountSpec { #[doc = "`read()` method returns [`s0_txcount::R`](R) reader structure"] impl crate::Readable for S0TxcountSpec {} #[doc = "`reset()` method sets S0_TXCOUNT to value 0"] -impl crate::Resettable for S0TxcountSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for S0TxcountSpec {} diff --git a/va416xx/src/i2c0/s0_txfifoirqtrg.rs b/va416xx/src/i2c0/s0_txfifoirqtrg.rs index e3ae3a2..d7c07bc 100644 --- a/va416xx/src/i2c0/s0_txfifoirqtrg.rs +++ b/va416xx/src/i2c0/s0_txfifoirqtrg.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:4 - Half full level for the Rx FIFO"] #[inline(always)] - pub fn level(&mut self) -> LevelW { + pub fn level(&mut self) -> LevelW<'_, S0TxfifoirqtrgSpec> { LevelW::new(self, 0) } } @@ -30,8 +30,6 @@ impl crate::Readable for S0TxfifoirqtrgSpec {} #[doc = "`write(|w| ..)` method takes [`s0_txfifoirqtrg::W`](W) writer structure"] impl crate::Writable for S0TxfifoirqtrgSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets S0_TXFIFOIRQTRG to value 0x08"] impl crate::Resettable for S0TxfifoirqtrgSpec { diff --git a/va416xx/src/i2c0/state.rs b/va416xx/src/i2c0/state.rs index d623f7f..e37bca4 100644 --- a/va416xx/src/i2c0/state.rs +++ b/va416xx/src/i2c0/state.rs @@ -14,6 +14,4 @@ impl crate::RegisterSpec for StateSpec { #[doc = "`read()` method returns [`state::R`](R) reader structure"] impl crate::Readable for StateSpec {} #[doc = "`reset()` method sets STATE to value 0"] -impl crate::Resettable for StateSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for StateSpec {} diff --git a/va416xx/src/i2c0/status.rs b/va416xx/src/i2c0/status.rs index 5a7f06c..5910c01 100644 --- a/va416xx/src/i2c0/status.rs +++ b/va416xx/src/i2c0/status.rs @@ -142,77 +142,77 @@ impl R { impl W { #[doc = "Bit 0 - I2C bus is idle"] #[inline(always)] - pub fn i2cidle(&mut self) -> I2cidleW { + pub fn i2cidle(&mut self) -> I2cidleW<'_, StatusSpec> { I2cidleW::new(self, 0) } #[doc = "Bit 1 - I2C controller is Idle"] #[inline(always)] - pub fn idle(&mut self) -> IdleW { + pub fn idle(&mut self) -> IdleW<'_, StatusSpec> { IdleW::new(self, 1) } #[doc = "Bit 2 - Controller is Waiting"] #[inline(always)] - pub fn waiting(&mut self) -> WaitingW { + pub fn waiting(&mut self) -> WaitingW<'_, StatusSpec> { WaitingW::new(self, 2) } #[doc = "Bit 3 - Controller is Stalled"] #[inline(always)] - pub fn stalled(&mut self) -> StalledW { + pub fn stalled(&mut self) -> StalledW<'_, StatusSpec> { StalledW::new(self, 3) } #[doc = "Bit 4 - I2C Arbitration was lost"] #[inline(always)] - pub fn arblost(&mut self) -> ArblostW { + pub fn arblost(&mut self) -> ArblostW<'_, StatusSpec> { ArblostW::new(self, 4) } #[doc = "Bit 5 - I2C Address was not Acknowledged"] #[inline(always)] - pub fn nackaddr(&mut self) -> NackaddrW { + pub fn nackaddr(&mut self) -> NackaddrW<'_, StatusSpec> { NackaddrW::new(self, 5) } #[doc = "Bit 6 - I2C Data was not Acknowledged"] #[inline(always)] - pub fn nackdata(&mut self) -> NackdataW { + pub fn nackdata(&mut self) -> NackdataW<'_, StatusSpec> { NackdataW::new(self, 6) } #[doc = "Bit 8 - RX FIFO is Not Empty"] #[inline(always)] - pub fn rxnempty(&mut self) -> RxnemptyW { + pub fn rxnempty(&mut self) -> RxnemptyW<'_, StatusSpec> { RxnemptyW::new(self, 8) } #[doc = "Bit 9 - RX FIFO is Full"] #[inline(always)] - pub fn rxfull(&mut self) -> RxfullW { + pub fn rxfull(&mut self) -> RxfullW<'_, StatusSpec> { RxfullW::new(self, 9) } #[doc = "Bit 11 - RX FIFO Above Trigger Level"] #[inline(always)] - pub fn rxtrigger(&mut self) -> RxtriggerW { + pub fn rxtrigger(&mut self) -> RxtriggerW<'_, StatusSpec> { RxtriggerW::new(self, 11) } #[doc = "Bit 12 - TX FIFO is Empty"] #[inline(always)] - pub fn txempty(&mut self) -> TxemptyW { + pub fn txempty(&mut self) -> TxemptyW<'_, StatusSpec> { TxemptyW::new(self, 12) } #[doc = "Bit 13 - TX FIFO is Full"] #[inline(always)] - pub fn txnfull(&mut self) -> TxnfullW { + pub fn txnfull(&mut self) -> TxnfullW<'_, StatusSpec> { TxnfullW::new(self, 13) } #[doc = "Bit 15 - TX FIFO Below Trigger Level"] #[inline(always)] - pub fn txtrigger(&mut self) -> TxtriggerW { + pub fn txtrigger(&mut self) -> TxtriggerW<'_, StatusSpec> { TxtriggerW::new(self, 15) } #[doc = "Bit 30 - I2C Raw SDA value"] #[inline(always)] - pub fn raw_sda(&mut self) -> RawSdaW { + pub fn raw_sda(&mut self) -> RawSdaW<'_, StatusSpec> { RawSdaW::new(self, 30) } #[doc = "Bit 31 - I2C Raw SCL value"] #[inline(always)] - pub fn raw_scl(&mut self) -> RawSclW { + pub fn raw_scl(&mut self) -> RawSclW<'_, StatusSpec> { RawSclW::new(self, 31) } } @@ -226,10 +226,6 @@ impl crate::Readable for StatusSpec {} #[doc = "`write(|w| ..)` method takes [`status::W`](W) writer structure"] impl crate::Writable for StatusSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets STATUS to value 0"] -impl crate::Resettable for StatusSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for StatusSpec {} diff --git a/va416xx/src/i2c0/tmconfig.rs b/va416xx/src/i2c0/tmconfig.rs index c8ac040..670f854 100644 --- a/va416xx/src/i2c0/tmconfig.rs +++ b/va416xx/src/i2c0/tmconfig.rs @@ -19,10 +19,6 @@ impl crate::Readable for TmconfigSpec {} #[doc = "`write(|w| ..)` method takes [`tmconfig::W`](W) writer structure"] impl crate::Writable for TmconfigSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TMCONFIG to value 0"] -impl crate::Resettable for TmconfigSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for TmconfigSpec {} diff --git a/va416xx/src/i2c0/txcount.rs b/va416xx/src/i2c0/txcount.rs index 239cae9..1a33820 100644 --- a/va416xx/src/i2c0/txcount.rs +++ b/va416xx/src/i2c0/txcount.rs @@ -14,6 +14,4 @@ impl crate::RegisterSpec for TxcountSpec { #[doc = "`read()` method returns [`txcount::R`](R) reader structure"] impl crate::Readable for TxcountSpec {} #[doc = "`reset()` method sets TXCOUNT to value 0"] -impl crate::Resettable for TxcountSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for TxcountSpec {} diff --git a/va416xx/src/i2c0/txfifoirqtrg.rs b/va416xx/src/i2c0/txfifoirqtrg.rs index 00aa42f..ea0e7d3 100644 --- a/va416xx/src/i2c0/txfifoirqtrg.rs +++ b/va416xx/src/i2c0/txfifoirqtrg.rs @@ -19,10 +19,6 @@ impl crate::Readable for TxfifoirqtrgSpec {} #[doc = "`write(|w| ..)` method takes [`txfifoirqtrg::W`](W) writer structure"] impl crate::Writable for TxfifoirqtrgSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TXFIFOIRQTRG to value 0"] -impl crate::Resettable for TxfifoirqtrgSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for TxfifoirqtrgSpec {} diff --git a/va416xx/src/i2c0/words.rs b/va416xx/src/i2c0/words.rs index a7385e2..ac3f45c 100644 --- a/va416xx/src/i2c0/words.rs +++ b/va416xx/src/i2c0/words.rs @@ -19,10 +19,6 @@ impl crate::Readable for WordsSpec {} #[doc = "`write(|w| ..)` method takes [`words::W`](W) writer structure"] impl crate::Writable for WordsSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets WORDS to value 0"] -impl crate::Resettable for WordsSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for WordsSpec {} diff --git a/va416xx/src/ioconfig.rs b/va416xx/src/ioconfig.rs index 6314e6a..bbd3a66 100644 --- a/va416xx/src/ioconfig.rs +++ b/va416xx/src/ioconfig.rs @@ -2,12 +2,12 @@ #[doc = "Register block"] pub struct RegisterBlock { porta: [Porta; 16], - portb0: [Portb; 16], - portc0: [Portc; 16], - portd0: [Portd; 16], - porte0: [Porte; 16], - portf0: [Portf; 16], - portg0: [Portg; 8], + portb: [Portb; 16], + portc: [Portc; 16], + portd: [Portd; 16], + porte: [Porte; 16], + portf: [Portf; 16], + portg: [Portg; 8], _reserved7: [u8; 0x20], clkdiv0: Clkdiv0, clkdiv1: Clkdiv1, @@ -34,69 +34,69 @@ impl RegisterBlock { } #[doc = "0x40..0x80 - PORTB Pin Configuration Register"] #[inline(always)] - pub const fn portb0(&self, n: usize) -> &Portb { - &self.portb0[n] + pub const fn portb(&self, n: usize) -> &Portb { + &self.portb[n] } #[doc = "Iterator for array of:"] #[doc = "0x40..0x80 - PORTB Pin Configuration Register"] #[inline(always)] - pub fn portb0_iter(&self) -> impl Iterator { - self.portb0.iter() + pub fn portb_iter(&self) -> impl Iterator { + self.portb.iter() } #[doc = "0x80..0xc0 - PORTC Pin Configuration Register"] #[inline(always)] - pub const fn portc0(&self, n: usize) -> &Portc { - &self.portc0[n] + pub const fn portc(&self, n: usize) -> &Portc { + &self.portc[n] } #[doc = "Iterator for array of:"] #[doc = "0x80..0xc0 - PORTC Pin Configuration Register"] #[inline(always)] - pub fn portc0_iter(&self) -> impl Iterator { - self.portc0.iter() + pub fn portc_iter(&self) -> impl Iterator { + self.portc.iter() } #[doc = "0xc0..0x100 - PORTD Pin Configuration Register"] #[inline(always)] - pub const fn portd0(&self, n: usize) -> &Portd { - &self.portd0[n] + pub const fn portd(&self, n: usize) -> &Portd { + &self.portd[n] } #[doc = "Iterator for array of:"] #[doc = "0xc0..0x100 - PORTD Pin Configuration Register"] #[inline(always)] - pub fn portd0_iter(&self) -> impl Iterator { - self.portd0.iter() + pub fn portd_iter(&self) -> impl Iterator { + self.portd.iter() } #[doc = "0x100..0x140 - PORTE Pin Configuration Register"] #[inline(always)] - pub const fn porte0(&self, n: usize) -> &Porte { - &self.porte0[n] + pub const fn porte(&self, n: usize) -> &Porte { + &self.porte[n] } #[doc = "Iterator for array of:"] #[doc = "0x100..0x140 - PORTE Pin Configuration Register"] #[inline(always)] - pub fn porte0_iter(&self) -> impl Iterator { - self.porte0.iter() + pub fn porte_iter(&self) -> impl Iterator { + self.porte.iter() } #[doc = "0x140..0x180 - PORTF Pin Configuration Register"] #[inline(always)] - pub const fn portf0(&self, n: usize) -> &Portf { - &self.portf0[n] + pub const fn portf(&self, n: usize) -> &Portf { + &self.portf[n] } #[doc = "Iterator for array of:"] #[doc = "0x140..0x180 - PORTF Pin Configuration Register"] #[inline(always)] - pub fn portf0_iter(&self) -> impl Iterator { - self.portf0.iter() + pub fn portf_iter(&self) -> impl Iterator { + self.portf.iter() } #[doc = "0x180..0x1a0 - PORTG Pin Configuration Register"] #[inline(always)] - pub const fn portg0(&self, n: usize) -> &Portg { - &self.portg0[n] + pub const fn portg(&self, n: usize) -> &Portg { + &self.portg[n] } #[doc = "Iterator for array of:"] #[doc = "0x180..0x1a0 - PORTG Pin Configuration Register"] #[inline(always)] - pub fn portg0_iter(&self) -> impl Iterator { - self.portg0.iter() + pub fn portg_iter(&self) -> impl Iterator { + self.portg.iter() } #[doc = "0x1c0 - Clock divide value. 0 will disable the clock"] #[inline(always)] @@ -144,8 +144,7 @@ impl RegisterBlock { &self.perid } } -#[doc = "PORTA (rw) register accessor: PORTA Pin Configuration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`porta::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`porta::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@porta`] -module"] +#[doc = "PORTA (rw) register accessor: PORTA Pin Configuration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`porta::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`porta::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@porta`] module"] #[doc(alias = "PORTA")] pub type Porta = crate::Reg; #[doc = "PORTA Pin Configuration Register"] @@ -162,56 +161,47 @@ pub use Porta as Portd; pub use Porta as Porte; pub use Porta as Portf; pub use Porta as Portg; -#[doc = "CLKDIV0 (r) register accessor: Clock divide value. 0 will disable the clock\n\nYou can [`read`](crate::Reg::read) this register and get [`clkdiv0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkdiv0`] -module"] +#[doc = "CLKDIV0 (r) register accessor: Clock divide value. 0 will disable the clock\n\nYou can [`read`](crate::Reg::read) this register and get [`clkdiv0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkdiv0`] module"] #[doc(alias = "CLKDIV0")] pub type Clkdiv0 = crate::Reg; #[doc = "Clock divide value. 0 will disable the clock"] pub mod clkdiv0; -#[doc = "CLKDIV1 (rw) register accessor: Clock divide value. 0 will disable the clock\n\nYou can [`read`](crate::Reg::read) this register and get [`clkdiv1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkdiv1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkdiv1`] -module"] +#[doc = "CLKDIV1 (rw) register accessor: Clock divide value. 0 will disable the clock\n\nYou can [`read`](crate::Reg::read) this register and get [`clkdiv1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkdiv1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkdiv1`] module"] #[doc(alias = "CLKDIV1")] pub type Clkdiv1 = crate::Reg; #[doc = "Clock divide value. 0 will disable the clock"] pub mod clkdiv1; -#[doc = "CLKDIV2 (rw) register accessor: Clock divide value. 0 will disable the clock\n\nYou can [`read`](crate::Reg::read) this register and get [`clkdiv2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkdiv2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkdiv2`] -module"] +#[doc = "CLKDIV2 (rw) register accessor: Clock divide value. 0 will disable the clock\n\nYou can [`read`](crate::Reg::read) this register and get [`clkdiv2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkdiv2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkdiv2`] module"] #[doc(alias = "CLKDIV2")] pub type Clkdiv2 = crate::Reg; #[doc = "Clock divide value. 0 will disable the clock"] pub mod clkdiv2; -#[doc = "CLKDIV3 (rw) register accessor: Clock divide value. 0 will disable the clock\n\nYou can [`read`](crate::Reg::read) this register and get [`clkdiv3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkdiv3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkdiv3`] -module"] +#[doc = "CLKDIV3 (rw) register accessor: Clock divide value. 0 will disable the clock\n\nYou can [`read`](crate::Reg::read) this register and get [`clkdiv3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkdiv3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkdiv3`] module"] #[doc(alias = "CLKDIV3")] pub type Clkdiv3 = crate::Reg; #[doc = "Clock divide value. 0 will disable the clock"] pub mod clkdiv3; -#[doc = "CLKDIV4 (rw) register accessor: Clock divide value. 0 will disable the clock\n\nYou can [`read`](crate::Reg::read) this register and get [`clkdiv4::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkdiv4::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkdiv4`] -module"] +#[doc = "CLKDIV4 (rw) register accessor: Clock divide value. 0 will disable the clock\n\nYou can [`read`](crate::Reg::read) this register and get [`clkdiv4::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkdiv4::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkdiv4`] module"] #[doc(alias = "CLKDIV4")] pub type Clkdiv4 = crate::Reg; #[doc = "Clock divide value. 0 will disable the clock"] pub mod clkdiv4; -#[doc = "CLKDIV5 (rw) register accessor: Clock divide value. 0 will disable the clock\n\nYou can [`read`](crate::Reg::read) this register and get [`clkdiv5::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkdiv5::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkdiv5`] -module"] +#[doc = "CLKDIV5 (rw) register accessor: Clock divide value. 0 will disable the clock\n\nYou can [`read`](crate::Reg::read) this register and get [`clkdiv5::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkdiv5::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkdiv5`] module"] #[doc(alias = "CLKDIV5")] pub type Clkdiv5 = crate::Reg; #[doc = "Clock divide value. 0 will disable the clock"] pub mod clkdiv5; -#[doc = "CLKDIV6 (rw) register accessor: Clock divide value. 0 will disable the clock\n\nYou can [`read`](crate::Reg::read) this register and get [`clkdiv6::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkdiv6::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkdiv6`] -module"] +#[doc = "CLKDIV6 (rw) register accessor: Clock divide value. 0 will disable the clock\n\nYou can [`read`](crate::Reg::read) this register and get [`clkdiv6::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkdiv6::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkdiv6`] module"] #[doc(alias = "CLKDIV6")] pub type Clkdiv6 = crate::Reg; #[doc = "Clock divide value. 0 will disable the clock"] pub mod clkdiv6; -#[doc = "CLKDIV7 (rw) register accessor: Clock divide value. 0 will disable the clock\n\nYou can [`read`](crate::Reg::read) this register and get [`clkdiv7::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkdiv7::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkdiv7`] -module"] +#[doc = "CLKDIV7 (rw) register accessor: Clock divide value. 0 will disable the clock\n\nYou can [`read`](crate::Reg::read) this register and get [`clkdiv7::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkdiv7::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkdiv7`] module"] #[doc(alias = "CLKDIV7")] pub type Clkdiv7 = crate::Reg; #[doc = "Clock divide value. 0 will disable the clock"] pub mod clkdiv7; -#[doc = "PERID (r) register accessor: Peripheral ID Register\n\nYou can [`read`](crate::Reg::read) this register and get [`perid::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@perid`] -module"] +#[doc = "PERID (r) register accessor: Peripheral ID Register\n\nYou can [`read`](crate::Reg::read) this register and get [`perid::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@perid`] module"] #[doc(alias = "PERID")] pub type Perid = crate::Reg; #[doc = "Peripheral ID Register"] diff --git a/va416xx/src/ioconfig/clkdiv0.rs b/va416xx/src/ioconfig/clkdiv0.rs index 009d409..1d02409 100644 --- a/va416xx/src/ioconfig/clkdiv0.rs +++ b/va416xx/src/ioconfig/clkdiv0.rs @@ -14,6 +14,4 @@ impl crate::RegisterSpec for Clkdiv0Spec { #[doc = "`read()` method returns [`clkdiv0::R`](R) reader structure"] impl crate::Readable for Clkdiv0Spec {} #[doc = "`reset()` method sets CLKDIV0 to value 0"] -impl crate::Resettable for Clkdiv0Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Clkdiv0Spec {} diff --git a/va416xx/src/ioconfig/clkdiv1.rs b/va416xx/src/ioconfig/clkdiv1.rs index e85921c..cbc567e 100644 --- a/va416xx/src/ioconfig/clkdiv1.rs +++ b/va416xx/src/ioconfig/clkdiv1.rs @@ -19,10 +19,6 @@ impl crate::Readable for Clkdiv1Spec {} #[doc = "`write(|w| ..)` method takes [`clkdiv1::W`](W) writer structure"] impl crate::Writable for Clkdiv1Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CLKDIV1 to value 0"] -impl crate::Resettable for Clkdiv1Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Clkdiv1Spec {} diff --git a/va416xx/src/ioconfig/clkdiv2.rs b/va416xx/src/ioconfig/clkdiv2.rs index b6c7d55..c030549 100644 --- a/va416xx/src/ioconfig/clkdiv2.rs +++ b/va416xx/src/ioconfig/clkdiv2.rs @@ -19,10 +19,6 @@ impl crate::Readable for Clkdiv2Spec {} #[doc = "`write(|w| ..)` method takes [`clkdiv2::W`](W) writer structure"] impl crate::Writable for Clkdiv2Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CLKDIV2 to value 0"] -impl crate::Resettable for Clkdiv2Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Clkdiv2Spec {} diff --git a/va416xx/src/ioconfig/clkdiv3.rs b/va416xx/src/ioconfig/clkdiv3.rs index 09323ad..31910c4 100644 --- a/va416xx/src/ioconfig/clkdiv3.rs +++ b/va416xx/src/ioconfig/clkdiv3.rs @@ -19,10 +19,6 @@ impl crate::Readable for Clkdiv3Spec {} #[doc = "`write(|w| ..)` method takes [`clkdiv3::W`](W) writer structure"] impl crate::Writable for Clkdiv3Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CLKDIV3 to value 0"] -impl crate::Resettable for Clkdiv3Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Clkdiv3Spec {} diff --git a/va416xx/src/ioconfig/clkdiv4.rs b/va416xx/src/ioconfig/clkdiv4.rs index 703efca..a9e217c 100644 --- a/va416xx/src/ioconfig/clkdiv4.rs +++ b/va416xx/src/ioconfig/clkdiv4.rs @@ -19,10 +19,6 @@ impl crate::Readable for Clkdiv4Spec {} #[doc = "`write(|w| ..)` method takes [`clkdiv4::W`](W) writer structure"] impl crate::Writable for Clkdiv4Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CLKDIV4 to value 0"] -impl crate::Resettable for Clkdiv4Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Clkdiv4Spec {} diff --git a/va416xx/src/ioconfig/clkdiv5.rs b/va416xx/src/ioconfig/clkdiv5.rs index e7455a6..0754ee4 100644 --- a/va416xx/src/ioconfig/clkdiv5.rs +++ b/va416xx/src/ioconfig/clkdiv5.rs @@ -19,10 +19,6 @@ impl crate::Readable for Clkdiv5Spec {} #[doc = "`write(|w| ..)` method takes [`clkdiv5::W`](W) writer structure"] impl crate::Writable for Clkdiv5Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CLKDIV5 to value 0"] -impl crate::Resettable for Clkdiv5Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Clkdiv5Spec {} diff --git a/va416xx/src/ioconfig/clkdiv6.rs b/va416xx/src/ioconfig/clkdiv6.rs index 05f0da1..04fabb8 100644 --- a/va416xx/src/ioconfig/clkdiv6.rs +++ b/va416xx/src/ioconfig/clkdiv6.rs @@ -19,10 +19,6 @@ impl crate::Readable for Clkdiv6Spec {} #[doc = "`write(|w| ..)` method takes [`clkdiv6::W`](W) writer structure"] impl crate::Writable for Clkdiv6Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CLKDIV6 to value 0"] -impl crate::Resettable for Clkdiv6Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Clkdiv6Spec {} diff --git a/va416xx/src/ioconfig/clkdiv7.rs b/va416xx/src/ioconfig/clkdiv7.rs index 358942f..dbfa0e8 100644 --- a/va416xx/src/ioconfig/clkdiv7.rs +++ b/va416xx/src/ioconfig/clkdiv7.rs @@ -19,10 +19,6 @@ impl crate::Readable for Clkdiv7Spec {} #[doc = "`write(|w| ..)` method takes [`clkdiv7::W`](W) writer structure"] impl crate::Writable for Clkdiv7Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CLKDIV7 to value 0"] -impl crate::Resettable for Clkdiv7Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Clkdiv7Spec {} diff --git a/va416xx/src/ioconfig/porta.rs b/va416xx/src/ioconfig/porta.rs index 9dd8a98..26249e8 100644 --- a/va416xx/src/ioconfig/porta.rs +++ b/va416xx/src/ioconfig/porta.rs @@ -215,57 +215,57 @@ impl R { impl W { #[doc = "Bits 0:2 - Input Filter Selectoin"] #[inline(always)] - pub fn flttype(&mut self) -> FlttypeW { + pub fn flttype(&mut self) -> FlttypeW<'_, PortaSpec> { FlttypeW::new(self, 0) } #[doc = "Bits 3:5 - Input Filter Clock Selection"] #[inline(always)] - pub fn fltclk(&mut self) -> FltclkW { + pub fn fltclk(&mut self) -> FltclkW<'_, PortaSpec> { FltclkW::new(self, 3) } #[doc = "Bit 6 - Input Invert Selection"] #[inline(always)] - pub fn invinp(&mut self) -> InvinpW { + pub fn invinp(&mut self) -> InvinpW<'_, PortaSpec> { InvinpW::new(self, 6) } #[doc = "Bit 7 - Input Enable While Output enabled"] #[inline(always)] - pub fn iewo(&mut self) -> IewoW { + pub fn iewo(&mut self) -> IewoW<'_, PortaSpec> { IewoW::new(self, 7) } #[doc = "Bit 8 - Output Open Drain Mode"] #[inline(always)] - pub fn opendrn(&mut self) -> OpendrnW { + pub fn opendrn(&mut self) -> OpendrnW<'_, PortaSpec> { OpendrnW::new(self, 8) } #[doc = "Bit 9 - Output Invert Selection"] #[inline(always)] - pub fn invout(&mut self) -> InvoutW { + pub fn invout(&mut self) -> InvoutW<'_, PortaSpec> { InvoutW::new(self, 9) } #[doc = "Bit 10 - Internal Pull up/down level"] #[inline(always)] - pub fn plevel(&mut self) -> PlevelW { + pub fn plevel(&mut self) -> PlevelW<'_, PortaSpec> { PlevelW::new(self, 10) } #[doc = "Bit 11 - Enable Internal Pull up/down"] #[inline(always)] - pub fn pen(&mut self) -> PenW { + pub fn pen(&mut self) -> PenW<'_, PortaSpec> { PenW::new(self, 11) } #[doc = "Bit 12 - Enable Pull when output active"] #[inline(always)] - pub fn pwoa(&mut self) -> PwoaW { + pub fn pwoa(&mut self) -> PwoaW<'_, PortaSpec> { PwoaW::new(self, 12) } #[doc = "Bits 13:15 - Pin Function Selection"] #[inline(always)] - pub fn funsel(&mut self) -> FunselW { + pub fn funsel(&mut self) -> FunselW<'_, PortaSpec> { FunselW::new(self, 13) } #[doc = "Bit 16 - IO Pin Disable"] #[inline(always)] - pub fn iodis(&mut self) -> IodisW { + pub fn iodis(&mut self) -> IodisW<'_, PortaSpec> { IodisW::new(self, 16) } } @@ -279,11 +279,6 @@ impl crate::Readable for PortaSpec {} #[doc = "`write(|w| ..)` method takes [`porta::W`](W) writer structure"] impl crate::Writable for PortaSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; -} -#[doc = "`reset()` method sets PORTA[%s] -to value 0"] -impl crate::Resettable for PortaSpec { - const RESET_VALUE: u32 = 0; } +#[doc = "`reset()` method sets PORTA[%s] to value 0"] +impl crate::Resettable for PortaSpec {} diff --git a/va416xx/src/irq_router.rs b/va416xx/src/irq_router.rs index 50f8ebd..5f7589a 100644 --- a/va416xx/src/irq_router.rs +++ b/va416xx/src/irq_router.rs @@ -95,92 +95,77 @@ impl RegisterBlock { &self.perid } } -#[doc = "DMASEL0 (rw) register accessor: Interrupt select for DMA channel 0\n\nYou can [`read`](crate::Reg::read) this register and get [`dmasel0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dmasel0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmasel0`] -module"] +#[doc = "DMASEL0 (rw) register accessor: Interrupt select for DMA channel 0\n\nYou can [`read`](crate::Reg::read) this register and get [`dmasel0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dmasel0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmasel0`] module"] #[doc(alias = "DMASEL0")] pub type Dmasel0 = crate::Reg; #[doc = "Interrupt select for DMA channel 0"] pub mod dmasel0; -#[doc = "DMASEL1 (rw) register accessor: Interrupt select for DMA channel 1\n\nYou can [`read`](crate::Reg::read) this register and get [`dmasel1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dmasel1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmasel1`] -module"] +#[doc = "DMASEL1 (rw) register accessor: Interrupt select for DMA channel 1\n\nYou can [`read`](crate::Reg::read) this register and get [`dmasel1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dmasel1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmasel1`] module"] #[doc(alias = "DMASEL1")] pub type Dmasel1 = crate::Reg; #[doc = "Interrupt select for DMA channel 1"] pub mod dmasel1; -#[doc = "DMASEL2 (rw) register accessor: Interrupt select for DMA channel 2\n\nYou can [`read`](crate::Reg::read) this register and get [`dmasel2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dmasel2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmasel2`] -module"] +#[doc = "DMASEL2 (rw) register accessor: Interrupt select for DMA channel 2\n\nYou can [`read`](crate::Reg::read) this register and get [`dmasel2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dmasel2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmasel2`] module"] #[doc(alias = "DMASEL2")] pub type Dmasel2 = crate::Reg; #[doc = "Interrupt select for DMA channel 2"] pub mod dmasel2; -#[doc = "DMASEL3 (rw) register accessor: Interrupt select for DMA channel 3\n\nYou can [`read`](crate::Reg::read) this register and get [`dmasel3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dmasel3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmasel3`] -module"] +#[doc = "DMASEL3 (rw) register accessor: Interrupt select for DMA channel 3\n\nYou can [`read`](crate::Reg::read) this register and get [`dmasel3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dmasel3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmasel3`] module"] #[doc(alias = "DMASEL3")] pub type Dmasel3 = crate::Reg; #[doc = "Interrupt select for DMA channel 3"] pub mod dmasel3; -#[doc = "DMATTSEL (rw) register accessor: Trigger select for the DMA channels\n\nYou can [`read`](crate::Reg::read) this register and get [`dmattsel::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dmattsel::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmattsel`] -module"] +#[doc = "DMATTSEL (rw) register accessor: Trigger select for the DMA channels\n\nYou can [`read`](crate::Reg::read) this register and get [`dmattsel::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dmattsel::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmattsel`] module"] #[doc(alias = "DMATTSEL")] pub type Dmattsel = crate::Reg; #[doc = "Trigger select for the DMA channels"] pub mod dmattsel; -#[doc = "ADCSEL (rw) register accessor: Interrupt select for ADC\n\nYou can [`read`](crate::Reg::read) this register and get [`adcsel::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`adcsel::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@adcsel`] -module"] +#[doc = "ADCSEL (rw) register accessor: Interrupt select for ADC\n\nYou can [`read`](crate::Reg::read) this register and get [`adcsel::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`adcsel::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@adcsel`] module"] #[doc(alias = "ADCSEL")] pub type Adcsel = crate::Reg; #[doc = "Interrupt select for ADC"] pub mod adcsel; -#[doc = "DACSEL0 (rw) register accessor: Interrupt select for DAC0\n\nYou can [`read`](crate::Reg::read) this register and get [`dacsel0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dacsel0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dacsel0`] -module"] +#[doc = "DACSEL0 (rw) register accessor: Interrupt select for DAC0\n\nYou can [`read`](crate::Reg::read) this register and get [`dacsel0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dacsel0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dacsel0`] module"] #[doc(alias = "DACSEL0")] pub type Dacsel0 = crate::Reg; #[doc = "Interrupt select for DAC0"] pub mod dacsel0; -#[doc = "DACSEL1 (rw) register accessor: Interrupt select for DAC1\n\nYou can [`read`](crate::Reg::read) this register and get [`dacsel1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dacsel1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dacsel1`] -module"] +#[doc = "DACSEL1 (rw) register accessor: Interrupt select for DAC1\n\nYou can [`read`](crate::Reg::read) this register and get [`dacsel1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dacsel1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dacsel1`] module"] #[doc(alias = "DACSEL1")] pub type Dacsel1 = crate::Reg; #[doc = "Interrupt select for DAC1"] pub mod dacsel1; -#[doc = "IRQ_OUT0 (r) register accessor: DEBUG IRQ_OUT\\[31:0\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_out0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_out0`] -module"] +#[doc = "IRQ_OUT0 (r) register accessor: DEBUG IRQ_OUT\\[31:0\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_out0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_out0`] module"] #[doc(alias = "IRQ_OUT0")] pub type IrqOut0 = crate::Reg; #[doc = "DEBUG IRQ_OUT\\[31:0\\]"] pub mod irq_out0; -#[doc = "IRQ_OUT1 (r) register accessor: DEBUG IRQ_OUT\\[63:32\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_out1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_out1`] -module"] +#[doc = "IRQ_OUT1 (r) register accessor: DEBUG IRQ_OUT\\[63:32\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_out1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_out1`] module"] #[doc(alias = "IRQ_OUT1")] pub type IrqOut1 = crate::Reg; #[doc = "DEBUG IRQ_OUT\\[63:32\\]"] pub mod irq_out1; -#[doc = "IRQ_OUT2 (r) register accessor: DEBUG IRQ_OUT\\[95:64\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_out2::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_out2`] -module"] +#[doc = "IRQ_OUT2 (r) register accessor: DEBUG IRQ_OUT\\[95:64\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_out2::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_out2`] module"] #[doc(alias = "IRQ_OUT2")] pub type IrqOut2 = crate::Reg; #[doc = "DEBUG IRQ_OUT\\[95:64\\]"] pub mod irq_out2; -#[doc = "IRQ_OUT3 (r) register accessor: DEBUG IRQ_OUT\\[127:96\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_out3::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_out3`] -module"] +#[doc = "IRQ_OUT3 (r) register accessor: DEBUG IRQ_OUT\\[127:96\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_out3::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_out3`] module"] #[doc(alias = "IRQ_OUT3")] pub type IrqOut3 = crate::Reg; #[doc = "DEBUG IRQ_OUT\\[127:96\\]"] pub mod irq_out3; -#[doc = "IRQ_OUT4 (r) register accessor: DEBUG IRQ_OUT\\[159:128\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_out4::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_out4`] -module"] +#[doc = "IRQ_OUT4 (r) register accessor: DEBUG IRQ_OUT\\[159:128\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_out4::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_out4`] module"] #[doc(alias = "IRQ_OUT4")] pub type IrqOut4 = crate::Reg; #[doc = "DEBUG IRQ_OUT\\[159:128\\]"] pub mod irq_out4; -#[doc = "IRQ_OUT5 (r) register accessor: DEBUG IRQ_OUT\\[179:160\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_out5::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_out5`] -module"] +#[doc = "IRQ_OUT5 (r) register accessor: DEBUG IRQ_OUT\\[179:160\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_out5::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_out5`] module"] #[doc(alias = "IRQ_OUT5")] pub type IrqOut5 = crate::Reg; #[doc = "DEBUG IRQ_OUT\\[179:160\\]"] pub mod irq_out5; -#[doc = "PERID (r) register accessor: Peripheral ID Register\n\nYou can [`read`](crate::Reg::read) this register and get [`perid::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@perid`] -module"] +#[doc = "PERID (r) register accessor: Peripheral ID Register\n\nYou can [`read`](crate::Reg::read) this register and get [`perid::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@perid`] module"] #[doc(alias = "PERID")] pub type Perid = crate::Reg; #[doc = "Peripheral ID Register"] diff --git a/va416xx/src/irq_router/adcsel.rs b/va416xx/src/irq_router/adcsel.rs index b999a3c..65b8c33 100644 --- a/va416xx/src/irq_router/adcsel.rs +++ b/va416xx/src/irq_router/adcsel.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:4 - ADC trigger source selection value"] #[inline(always)] - pub fn adcsel(&mut self) -> AdcselW { + pub fn adcsel(&mut self) -> AdcselW<'_, AdcselSpec> { AdcselW::new(self, 0) } } @@ -30,8 +30,6 @@ impl crate::Readable for AdcselSpec {} #[doc = "`write(|w| ..)` method takes [`adcsel::W`](W) writer structure"] impl crate::Writable for AdcselSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ADCSEL to value 0x1f"] impl crate::Resettable for AdcselSpec { diff --git a/va416xx/src/irq_router/dacsel0.rs b/va416xx/src/irq_router/dacsel0.rs index 7ac1ac5..5022b27 100644 --- a/va416xx/src/irq_router/dacsel0.rs +++ b/va416xx/src/irq_router/dacsel0.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:4 - DAC trigger source selection value"] #[inline(always)] - pub fn dacsel(&mut self) -> DacselW { + pub fn dacsel(&mut self) -> DacselW<'_, Dacsel0Spec> { DacselW::new(self, 0) } } @@ -30,8 +30,6 @@ impl crate::Readable for Dacsel0Spec {} #[doc = "`write(|w| ..)` method takes [`dacsel0::W`](W) writer structure"] impl crate::Writable for Dacsel0Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DACSEL0 to value 0x1f"] impl crate::Resettable for Dacsel0Spec { diff --git a/va416xx/src/irq_router/dacsel1.rs b/va416xx/src/irq_router/dacsel1.rs index fa27e82..849d25c 100644 --- a/va416xx/src/irq_router/dacsel1.rs +++ b/va416xx/src/irq_router/dacsel1.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:4 - DAC trigger source selection value"] #[inline(always)] - pub fn dacsel(&mut self) -> DacselW { + pub fn dacsel(&mut self) -> DacselW<'_, Dacsel1Spec> { DacselW::new(self, 0) } } @@ -30,8 +30,6 @@ impl crate::Readable for Dacsel1Spec {} #[doc = "`write(|w| ..)` method takes [`dacsel1::W`](W) writer structure"] impl crate::Writable for Dacsel1Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DACSEL1 to value 0x1f"] impl crate::Resettable for Dacsel1Spec { diff --git a/va416xx/src/irq_router/dmasel0.rs b/va416xx/src/irq_router/dmasel0.rs index 66661c8..fb22f04 100644 --- a/va416xx/src/irq_router/dmasel0.rs +++ b/va416xx/src/irq_router/dmasel0.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:6 - DMA trigger source selection value"] #[inline(always)] - pub fn dmasel(&mut self) -> DmaselW { + pub fn dmasel(&mut self) -> DmaselW<'_, Dmasel0Spec> { DmaselW::new(self, 0) } } @@ -30,8 +30,6 @@ impl crate::Readable for Dmasel0Spec {} #[doc = "`write(|w| ..)` method takes [`dmasel0::W`](W) writer structure"] impl crate::Writable for Dmasel0Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DMASEL0 to value 0x7f"] impl crate::Resettable for Dmasel0Spec { diff --git a/va416xx/src/irq_router/dmasel1.rs b/va416xx/src/irq_router/dmasel1.rs index fea2726..4ab1f0d 100644 --- a/va416xx/src/irq_router/dmasel1.rs +++ b/va416xx/src/irq_router/dmasel1.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:6 - DMA trigger source selection value"] #[inline(always)] - pub fn dmasel(&mut self) -> DmaselW { + pub fn dmasel(&mut self) -> DmaselW<'_, Dmasel1Spec> { DmaselW::new(self, 0) } } @@ -30,8 +30,6 @@ impl crate::Readable for Dmasel1Spec {} #[doc = "`write(|w| ..)` method takes [`dmasel1::W`](W) writer structure"] impl crate::Writable for Dmasel1Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DMASEL1 to value 0x7f"] impl crate::Resettable for Dmasel1Spec { diff --git a/va416xx/src/irq_router/dmasel2.rs b/va416xx/src/irq_router/dmasel2.rs index 953ce6e..6671408 100644 --- a/va416xx/src/irq_router/dmasel2.rs +++ b/va416xx/src/irq_router/dmasel2.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:6 - DMA trigger source selection value"] #[inline(always)] - pub fn dmasel(&mut self) -> DmaselW { + pub fn dmasel(&mut self) -> DmaselW<'_, Dmasel2Spec> { DmaselW::new(self, 0) } } @@ -30,8 +30,6 @@ impl crate::Readable for Dmasel2Spec {} #[doc = "`write(|w| ..)` method takes [`dmasel2::W`](W) writer structure"] impl crate::Writable for Dmasel2Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DMASEL2 to value 0x7f"] impl crate::Resettable for Dmasel2Spec { diff --git a/va416xx/src/irq_router/dmasel3.rs b/va416xx/src/irq_router/dmasel3.rs index 7396609..6051e39 100644 --- a/va416xx/src/irq_router/dmasel3.rs +++ b/va416xx/src/irq_router/dmasel3.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:6 - DMA trigger source selection value"] #[inline(always)] - pub fn dmasel(&mut self) -> DmaselW { + pub fn dmasel(&mut self) -> DmaselW<'_, Dmasel3Spec> { DmaselW::new(self, 0) } } @@ -30,8 +30,6 @@ impl crate::Readable for Dmasel3Spec {} #[doc = "`write(|w| ..)` method takes [`dmasel3::W`](W) writer structure"] impl crate::Writable for Dmasel3Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DMASEL3 to value 0x7f"] impl crate::Resettable for Dmasel3Spec { diff --git a/va416xx/src/irq_router/dmattsel.rs b/va416xx/src/irq_router/dmattsel.rs index d8add4b..2b4a834 100644 --- a/va416xx/src/irq_router/dmattsel.rs +++ b/va416xx/src/irq_router/dmattsel.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:3 - DMA trigger type selection value"] #[inline(always)] - pub fn dmattsel(&mut self) -> DmattselW { + pub fn dmattsel(&mut self) -> DmattselW<'_, DmattselSpec> { DmattselW::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for DmattselSpec {} #[doc = "`write(|w| ..)` method takes [`dmattsel::W`](W) writer structure"] impl crate::Writable for DmattselSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DMATTSEL to value 0"] -impl crate::Resettable for DmattselSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for DmattselSpec {} diff --git a/va416xx/src/irq_router/irq_out0.rs b/va416xx/src/irq_router/irq_out0.rs index 5d5a833..cc4e96c 100644 --- a/va416xx/src/irq_router/irq_out0.rs +++ b/va416xx/src/irq_router/irq_out0.rs @@ -17,6 +17,4 @@ impl crate::RegisterSpec for IrqOut0Spec { #[doc = "`read()` method returns [`irq_out0::R`](R) reader structure"] impl crate::Readable for IrqOut0Spec {} #[doc = "`reset()` method sets IRQ_OUT0 to value 0"] -impl crate::Resettable for IrqOut0Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for IrqOut0Spec {} diff --git a/va416xx/src/irq_router/irq_out1.rs b/va416xx/src/irq_router/irq_out1.rs index 3699f29..0395e87 100644 --- a/va416xx/src/irq_router/irq_out1.rs +++ b/va416xx/src/irq_router/irq_out1.rs @@ -17,6 +17,4 @@ impl crate::RegisterSpec for IrqOut1Spec { #[doc = "`read()` method returns [`irq_out1::R`](R) reader structure"] impl crate::Readable for IrqOut1Spec {} #[doc = "`reset()` method sets IRQ_OUT1 to value 0"] -impl crate::Resettable for IrqOut1Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for IrqOut1Spec {} diff --git a/va416xx/src/irq_router/irq_out2.rs b/va416xx/src/irq_router/irq_out2.rs index 9ef9c88..4547084 100644 --- a/va416xx/src/irq_router/irq_out2.rs +++ b/va416xx/src/irq_router/irq_out2.rs @@ -17,6 +17,4 @@ impl crate::RegisterSpec for IrqOut2Spec { #[doc = "`read()` method returns [`irq_out2::R`](R) reader structure"] impl crate::Readable for IrqOut2Spec {} #[doc = "`reset()` method sets IRQ_OUT2 to value 0"] -impl crate::Resettable for IrqOut2Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for IrqOut2Spec {} diff --git a/va416xx/src/irq_router/irq_out3.rs b/va416xx/src/irq_router/irq_out3.rs index 60137e9..09872ac 100644 --- a/va416xx/src/irq_router/irq_out3.rs +++ b/va416xx/src/irq_router/irq_out3.rs @@ -17,6 +17,4 @@ impl crate::RegisterSpec for IrqOut3Spec { #[doc = "`read()` method returns [`irq_out3::R`](R) reader structure"] impl crate::Readable for IrqOut3Spec {} #[doc = "`reset()` method sets IRQ_OUT3 to value 0"] -impl crate::Resettable for IrqOut3Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for IrqOut3Spec {} diff --git a/va416xx/src/irq_router/irq_out4.rs b/va416xx/src/irq_router/irq_out4.rs index eec96b0..7ad2a7e 100644 --- a/va416xx/src/irq_router/irq_out4.rs +++ b/va416xx/src/irq_router/irq_out4.rs @@ -17,6 +17,4 @@ impl crate::RegisterSpec for IrqOut4Spec { #[doc = "`read()` method returns [`irq_out4::R`](R) reader structure"] impl crate::Readable for IrqOut4Spec {} #[doc = "`reset()` method sets IRQ_OUT4 to value 0"] -impl crate::Resettable for IrqOut4Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for IrqOut4Spec {} diff --git a/va416xx/src/irq_router/irq_out5.rs b/va416xx/src/irq_router/irq_out5.rs index 9efe34d..f4e115c 100644 --- a/va416xx/src/irq_router/irq_out5.rs +++ b/va416xx/src/irq_router/irq_out5.rs @@ -17,6 +17,4 @@ impl crate::RegisterSpec for IrqOut5Spec { #[doc = "`read()` method returns [`irq_out5::R`](R) reader structure"] impl crate::Readable for IrqOut5Spec {} #[doc = "`reset()` method sets IRQ_OUT5 to value 0"] -impl crate::Resettable for IrqOut5Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for IrqOut5Spec {} diff --git a/va416xx/src/lib.rs b/va416xx/src/lib.rs index 9a1b13e..6b38971 100644 --- a/va416xx/src/lib.rs +++ b/va416xx/src/lib.rs @@ -1,10 +1,8 @@ -#![doc = "Peripheral access API for VA416XX microcontrollers (generated using svd2rust v0.35.0 (e10f920 2025-02-12))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] -svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.35.0/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] +#![doc = "Peripheral access API for VA416XX microcontrollers (generated using svd2rust v0.37.0 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.37.0/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] #![allow(non_camel_case_types)] #![allow(non_snake_case)] #![no_std] -use core::marker::PhantomData; -use core::ops::Deref; +#![cfg_attr(docsrs, feature(doc_auto_cfg))] #[doc = r"Number available in the NVIC for configuring priority"] pub const NVIC_PRIO_BITS: u8 = 4; #[cfg(feature = "rt")] @@ -869,44 +867,7 @@ unsafe impl cortex_m::interrupt::InterruptNumber for Interrupt { } } #[doc = "Clock Generation Peripheral"] -pub struct Clkgen { - _marker: PhantomData<*const ()>, -} -unsafe impl Send for Clkgen {} -impl Clkgen { - #[doc = r"Pointer to the register block"] - pub const PTR: *const clkgen::RegisterBlock = 0x4000_6000 as *const _; - #[doc = r"Return the pointer to the register block"] - #[inline(always)] - pub const fn ptr() -> *const clkgen::RegisterBlock { - Self::PTR - } - #[doc = r" Steal an instance of this peripheral"] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] - #[doc = r" that may race with any existing instances, for example by only"] - #[doc = r" accessing read-only or write-only registers, or by consuming the"] - #[doc = r" original peripheral and using critical sections to coordinate"] - #[doc = r" access between multiple new instances."] - #[doc = r""] - #[doc = r" Additionally, other software such as HALs may rely on only one"] - #[doc = r" peripheral instance existing to ensure memory safety; ensure"] - #[doc = r" no stolen instances are passed to such software."] - pub unsafe fn steal() -> Self { - Self { - _marker: PhantomData, - } - } -} -impl Deref for Clkgen { - type Target = clkgen::RegisterBlock; - #[inline(always)] - fn deref(&self) -> &Self::Target { - unsafe { &*Self::PTR } - } -} +pub type Clkgen = crate::Periph; impl core::fmt::Debug for Clkgen { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("Clkgen").finish() @@ -915,44 +876,7 @@ impl core::fmt::Debug for Clkgen { #[doc = "Clock Generation Peripheral"] pub mod clkgen; #[doc = "System Configuration Peripheral"] -pub struct Sysconfig { - _marker: PhantomData<*const ()>, -} -unsafe impl Send for Sysconfig {} -impl Sysconfig { - #[doc = r"Pointer to the register block"] - pub const PTR: *const sysconfig::RegisterBlock = 0x4001_0000 as *const _; - #[doc = r"Return the pointer to the register block"] - #[inline(always)] - pub const fn ptr() -> *const sysconfig::RegisterBlock { - Self::PTR - } - #[doc = r" Steal an instance of this peripheral"] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] - #[doc = r" that may race with any existing instances, for example by only"] - #[doc = r" accessing read-only or write-only registers, or by consuming the"] - #[doc = r" original peripheral and using critical sections to coordinate"] - #[doc = r" access between multiple new instances."] - #[doc = r""] - #[doc = r" Additionally, other software such as HALs may rely on only one"] - #[doc = r" peripheral instance existing to ensure memory safety; ensure"] - #[doc = r" no stolen instances are passed to such software."] - pub unsafe fn steal() -> Self { - Self { - _marker: PhantomData, - } - } -} -impl Deref for Sysconfig { - type Target = sysconfig::RegisterBlock; - #[inline(always)] - fn deref(&self) -> &Self::Target { - unsafe { &*Self::PTR } - } -} +pub type Sysconfig = crate::Periph; impl core::fmt::Debug for Sysconfig { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("Sysconfig").finish() @@ -961,44 +885,7 @@ impl core::fmt::Debug for Sysconfig { #[doc = "System Configuration Peripheral"] pub mod sysconfig; #[doc = "DMA Controller Block"] -pub struct Dma { - _marker: PhantomData<*const ()>, -} -unsafe impl Send for Dma {} -impl Dma { - #[doc = r"Pointer to the register block"] - pub const PTR: *const dma::RegisterBlock = 0x4000_1000 as *const _; - #[doc = r"Return the pointer to the register block"] - #[inline(always)] - pub const fn ptr() -> *const dma::RegisterBlock { - Self::PTR - } - #[doc = r" Steal an instance of this peripheral"] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] - #[doc = r" that may race with any existing instances, for example by only"] - #[doc = r" accessing read-only or write-only registers, or by consuming the"] - #[doc = r" original peripheral and using critical sections to coordinate"] - #[doc = r" access between multiple new instances."] - #[doc = r""] - #[doc = r" Additionally, other software such as HALs may rely on only one"] - #[doc = r" peripheral instance existing to ensure memory safety; ensure"] - #[doc = r" no stolen instances are passed to such software."] - pub unsafe fn steal() -> Self { - Self { - _marker: PhantomData, - } - } -} -impl Deref for Dma { - type Target = dma::RegisterBlock; - #[inline(always)] - fn deref(&self) -> &Self::Target { - unsafe { &*Self::PTR } - } -} +pub type Dma = crate::Periph; impl core::fmt::Debug for Dma { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("Dma").finish() @@ -1007,44 +894,7 @@ impl core::fmt::Debug for Dma { #[doc = "DMA Controller Block"] pub mod dma; #[doc = "IO Pin Configuration Peripheral"] -pub struct Ioconfig { - _marker: PhantomData<*const ()>, -} -unsafe impl Send for Ioconfig {} -impl Ioconfig { - #[doc = r"Pointer to the register block"] - pub const PTR: *const ioconfig::RegisterBlock = 0x4001_1000 as *const _; - #[doc = r"Return the pointer to the register block"] - #[inline(always)] - pub const fn ptr() -> *const ioconfig::RegisterBlock { - Self::PTR - } - #[doc = r" Steal an instance of this peripheral"] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] - #[doc = r" that may race with any existing instances, for example by only"] - #[doc = r" accessing read-only or write-only registers, or by consuming the"] - #[doc = r" original peripheral and using critical sections to coordinate"] - #[doc = r" access between multiple new instances."] - #[doc = r""] - #[doc = r" Additionally, other software such as HALs may rely on only one"] - #[doc = r" peripheral instance existing to ensure memory safety; ensure"] - #[doc = r" no stolen instances are passed to such software."] - pub unsafe fn steal() -> Self { - Self { - _marker: PhantomData, - } - } -} -impl Deref for Ioconfig { - type Target = ioconfig::RegisterBlock; - #[inline(always)] - fn deref(&self) -> &Self::Target { - unsafe { &*Self::PTR } - } -} +pub type Ioconfig = crate::Periph; impl core::fmt::Debug for Ioconfig { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("Ioconfig").finish() @@ -1053,44 +903,7 @@ impl core::fmt::Debug for Ioconfig { #[doc = "IO Pin Configuration Peripheral"] pub mod ioconfig; #[doc = "Utility Peripheral"] -pub struct Utility { - _marker: PhantomData<*const ()>, -} -unsafe impl Send for Utility {} -impl Utility { - #[doc = r"Pointer to the register block"] - pub const PTR: *const utility::RegisterBlock = 0x4002_0000 as *const _; - #[doc = r"Return the pointer to the register block"] - #[inline(always)] - pub const fn ptr() -> *const utility::RegisterBlock { - Self::PTR - } - #[doc = r" Steal an instance of this peripheral"] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] - #[doc = r" that may race with any existing instances, for example by only"] - #[doc = r" accessing read-only or write-only registers, or by consuming the"] - #[doc = r" original peripheral and using critical sections to coordinate"] - #[doc = r" access between multiple new instances."] - #[doc = r""] - #[doc = r" Additionally, other software such as HALs may rely on only one"] - #[doc = r" peripheral instance existing to ensure memory safety; ensure"] - #[doc = r" no stolen instances are passed to such software."] - pub unsafe fn steal() -> Self { - Self { - _marker: PhantomData, - } - } -} -impl Deref for Utility { - type Target = utility::RegisterBlock; - #[inline(always)] - fn deref(&self) -> &Self::Target { - unsafe { &*Self::PTR } - } -} +pub type Utility = crate::Periph; impl core::fmt::Debug for Utility { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("Utility").finish() @@ -1099,44 +912,7 @@ impl core::fmt::Debug for Utility { #[doc = "Utility Peripheral"] pub mod utility; #[doc = "GPIO Peripheral"] -pub struct Porta { - _marker: PhantomData<*const ()>, -} -unsafe impl Send for Porta {} -impl Porta { - #[doc = r"Pointer to the register block"] - pub const PTR: *const porta::RegisterBlock = 0x4001_2000 as *const _; - #[doc = r"Return the pointer to the register block"] - #[inline(always)] - pub const fn ptr() -> *const porta::RegisterBlock { - Self::PTR - } - #[doc = r" Steal an instance of this peripheral"] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] - #[doc = r" that may race with any existing instances, for example by only"] - #[doc = r" accessing read-only or write-only registers, or by consuming the"] - #[doc = r" original peripheral and using critical sections to coordinate"] - #[doc = r" access between multiple new instances."] - #[doc = r""] - #[doc = r" Additionally, other software such as HALs may rely on only one"] - #[doc = r" peripheral instance existing to ensure memory safety; ensure"] - #[doc = r" no stolen instances are passed to such software."] - pub unsafe fn steal() -> Self { - Self { - _marker: PhantomData, - } - } -} -impl Deref for Porta { - type Target = porta::RegisterBlock; - #[inline(always)] - fn deref(&self) -> &Self::Target { - unsafe { &*Self::PTR } - } -} +pub type Porta = crate::Periph; impl core::fmt::Debug for Porta { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("Porta").finish() @@ -1145,44 +921,7 @@ impl core::fmt::Debug for Porta { #[doc = "GPIO Peripheral"] pub mod porta; #[doc = "GPIO Peripheral"] -pub struct Portb { - _marker: PhantomData<*const ()>, -} -unsafe impl Send for Portb {} -impl Portb { - #[doc = r"Pointer to the register block"] - pub const PTR: *const porta::RegisterBlock = 0x4001_2400 as *const _; - #[doc = r"Return the pointer to the register block"] - #[inline(always)] - pub const fn ptr() -> *const porta::RegisterBlock { - Self::PTR - } - #[doc = r" Steal an instance of this peripheral"] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] - #[doc = r" that may race with any existing instances, for example by only"] - #[doc = r" accessing read-only or write-only registers, or by consuming the"] - #[doc = r" original peripheral and using critical sections to coordinate"] - #[doc = r" access between multiple new instances."] - #[doc = r""] - #[doc = r" Additionally, other software such as HALs may rely on only one"] - #[doc = r" peripheral instance existing to ensure memory safety; ensure"] - #[doc = r" no stolen instances are passed to such software."] - pub unsafe fn steal() -> Self { - Self { - _marker: PhantomData, - } - } -} -impl Deref for Portb { - type Target = porta::RegisterBlock; - #[inline(always)] - fn deref(&self) -> &Self::Target { - unsafe { &*Self::PTR } - } -} +pub type Portb = crate::Periph; impl core::fmt::Debug for Portb { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("Portb").finish() @@ -1191,44 +930,7 @@ impl core::fmt::Debug for Portb { #[doc = "GPIO Peripheral"] pub use self::porta as portb; #[doc = "GPIO Peripheral"] -pub struct Portc { - _marker: PhantomData<*const ()>, -} -unsafe impl Send for Portc {} -impl Portc { - #[doc = r"Pointer to the register block"] - pub const PTR: *const porta::RegisterBlock = 0x4001_2800 as *const _; - #[doc = r"Return the pointer to the register block"] - #[inline(always)] - pub const fn ptr() -> *const porta::RegisterBlock { - Self::PTR - } - #[doc = r" Steal an instance of this peripheral"] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] - #[doc = r" that may race with any existing instances, for example by only"] - #[doc = r" accessing read-only or write-only registers, or by consuming the"] - #[doc = r" original peripheral and using critical sections to coordinate"] - #[doc = r" access between multiple new instances."] - #[doc = r""] - #[doc = r" Additionally, other software such as HALs may rely on only one"] - #[doc = r" peripheral instance existing to ensure memory safety; ensure"] - #[doc = r" no stolen instances are passed to such software."] - pub unsafe fn steal() -> Self { - Self { - _marker: PhantomData, - } - } -} -impl Deref for Portc { - type Target = porta::RegisterBlock; - #[inline(always)] - fn deref(&self) -> &Self::Target { - unsafe { &*Self::PTR } - } -} +pub type Portc = crate::Periph; impl core::fmt::Debug for Portc { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("Portc").finish() @@ -1237,44 +939,7 @@ impl core::fmt::Debug for Portc { #[doc = "GPIO Peripheral"] pub use self::porta as portc; #[doc = "GPIO Peripheral"] -pub struct Portd { - _marker: PhantomData<*const ()>, -} -unsafe impl Send for Portd {} -impl Portd { - #[doc = r"Pointer to the register block"] - pub const PTR: *const porta::RegisterBlock = 0x4001_2c00 as *const _; - #[doc = r"Return the pointer to the register block"] - #[inline(always)] - pub const fn ptr() -> *const porta::RegisterBlock { - Self::PTR - } - #[doc = r" Steal an instance of this peripheral"] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] - #[doc = r" that may race with any existing instances, for example by only"] - #[doc = r" accessing read-only or write-only registers, or by consuming the"] - #[doc = r" original peripheral and using critical sections to coordinate"] - #[doc = r" access between multiple new instances."] - #[doc = r""] - #[doc = r" Additionally, other software such as HALs may rely on only one"] - #[doc = r" peripheral instance existing to ensure memory safety; ensure"] - #[doc = r" no stolen instances are passed to such software."] - pub unsafe fn steal() -> Self { - Self { - _marker: PhantomData, - } - } -} -impl Deref for Portd { - type Target = porta::RegisterBlock; - #[inline(always)] - fn deref(&self) -> &Self::Target { - unsafe { &*Self::PTR } - } -} +pub type Portd = crate::Periph; impl core::fmt::Debug for Portd { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("Portd").finish() @@ -1283,44 +948,7 @@ impl core::fmt::Debug for Portd { #[doc = "GPIO Peripheral"] pub use self::porta as portd; #[doc = "GPIO Peripheral"] -pub struct Porte { - _marker: PhantomData<*const ()>, -} -unsafe impl Send for Porte {} -impl Porte { - #[doc = r"Pointer to the register block"] - pub const PTR: *const porta::RegisterBlock = 0x4001_3000 as *const _; - #[doc = r"Return the pointer to the register block"] - #[inline(always)] - pub const fn ptr() -> *const porta::RegisterBlock { - Self::PTR - } - #[doc = r" Steal an instance of this peripheral"] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] - #[doc = r" that may race with any existing instances, for example by only"] - #[doc = r" accessing read-only or write-only registers, or by consuming the"] - #[doc = r" original peripheral and using critical sections to coordinate"] - #[doc = r" access between multiple new instances."] - #[doc = r""] - #[doc = r" Additionally, other software such as HALs may rely on only one"] - #[doc = r" peripheral instance existing to ensure memory safety; ensure"] - #[doc = r" no stolen instances are passed to such software."] - pub unsafe fn steal() -> Self { - Self { - _marker: PhantomData, - } - } -} -impl Deref for Porte { - type Target = porta::RegisterBlock; - #[inline(always)] - fn deref(&self) -> &Self::Target { - unsafe { &*Self::PTR } - } -} +pub type Porte = crate::Periph; impl core::fmt::Debug for Porte { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("Porte").finish() @@ -1329,44 +957,7 @@ impl core::fmt::Debug for Porte { #[doc = "GPIO Peripheral"] pub use self::porta as porte; #[doc = "GPIO Peripheral"] -pub struct Portf { - _marker: PhantomData<*const ()>, -} -unsafe impl Send for Portf {} -impl Portf { - #[doc = r"Pointer to the register block"] - pub const PTR: *const porta::RegisterBlock = 0x4001_3400 as *const _; - #[doc = r"Return the pointer to the register block"] - #[inline(always)] - pub const fn ptr() -> *const porta::RegisterBlock { - Self::PTR - } - #[doc = r" Steal an instance of this peripheral"] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] - #[doc = r" that may race with any existing instances, for example by only"] - #[doc = r" accessing read-only or write-only registers, or by consuming the"] - #[doc = r" original peripheral and using critical sections to coordinate"] - #[doc = r" access between multiple new instances."] - #[doc = r""] - #[doc = r" Additionally, other software such as HALs may rely on only one"] - #[doc = r" peripheral instance existing to ensure memory safety; ensure"] - #[doc = r" no stolen instances are passed to such software."] - pub unsafe fn steal() -> Self { - Self { - _marker: PhantomData, - } - } -} -impl Deref for Portf { - type Target = porta::RegisterBlock; - #[inline(always)] - fn deref(&self) -> &Self::Target { - unsafe { &*Self::PTR } - } -} +pub type Portf = crate::Periph; impl core::fmt::Debug for Portf { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("Portf").finish() @@ -1375,44 +966,7 @@ impl core::fmt::Debug for Portf { #[doc = "GPIO Peripheral"] pub use self::porta as portf; #[doc = "GPIO Peripheral"] -pub struct Portg { - _marker: PhantomData<*const ()>, -} -unsafe impl Send for Portg {} -impl Portg { - #[doc = r"Pointer to the register block"] - pub const PTR: *const porta::RegisterBlock = 0x4001_3800 as *const _; - #[doc = r"Return the pointer to the register block"] - #[inline(always)] - pub const fn ptr() -> *const porta::RegisterBlock { - Self::PTR - } - #[doc = r" Steal an instance of this peripheral"] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] - #[doc = r" that may race with any existing instances, for example by only"] - #[doc = r" accessing read-only or write-only registers, or by consuming the"] - #[doc = r" original peripheral and using critical sections to coordinate"] - #[doc = r" access between multiple new instances."] - #[doc = r""] - #[doc = r" Additionally, other software such as HALs may rely on only one"] - #[doc = r" peripheral instance existing to ensure memory safety; ensure"] - #[doc = r" no stolen instances are passed to such software."] - pub unsafe fn steal() -> Self { - Self { - _marker: PhantomData, - } - } -} -impl Deref for Portg { - type Target = porta::RegisterBlock; - #[inline(always)] - fn deref(&self) -> &Self::Target { - unsafe { &*Self::PTR } - } -} +pub type Portg = crate::Periph; impl core::fmt::Debug for Portg { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("Portg").finish() @@ -1421,44 +975,7 @@ impl core::fmt::Debug for Portg { #[doc = "GPIO Peripheral"] pub use self::porta as portg; #[doc = "Timer/Counter Peripheral"] -pub struct Tim0 { - _marker: PhantomData<*const ()>, -} -unsafe impl Send for Tim0 {} -impl Tim0 { - #[doc = r"Pointer to the register block"] - pub const PTR: *const tim0::RegisterBlock = 0x4001_8000 as *const _; - #[doc = r"Return the pointer to the register block"] - #[inline(always)] - pub const fn ptr() -> *const tim0::RegisterBlock { - Self::PTR - } - #[doc = r" Steal an instance of this peripheral"] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] - #[doc = r" that may race with any existing instances, for example by only"] - #[doc = r" accessing read-only or write-only registers, or by consuming the"] - #[doc = r" original peripheral and using critical sections to coordinate"] - #[doc = r" access between multiple new instances."] - #[doc = r""] - #[doc = r" Additionally, other software such as HALs may rely on only one"] - #[doc = r" peripheral instance existing to ensure memory safety; ensure"] - #[doc = r" no stolen instances are passed to such software."] - pub unsafe fn steal() -> Self { - Self { - _marker: PhantomData, - } - } -} -impl Deref for Tim0 { - type Target = tim0::RegisterBlock; - #[inline(always)] - fn deref(&self) -> &Self::Target { - unsafe { &*Self::PTR } - } -} +pub type Tim0 = crate::Periph; impl core::fmt::Debug for Tim0 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("Tim0").finish() @@ -1467,44 +984,7 @@ impl core::fmt::Debug for Tim0 { #[doc = "Timer/Counter Peripheral"] pub mod tim0; #[doc = "Timer/Counter Peripheral"] -pub struct Tim1 { - _marker: PhantomData<*const ()>, -} -unsafe impl Send for Tim1 {} -impl Tim1 { - #[doc = r"Pointer to the register block"] - pub const PTR: *const tim0::RegisterBlock = 0x4001_8400 as *const _; - #[doc = r"Return the pointer to the register block"] - #[inline(always)] - pub const fn ptr() -> *const tim0::RegisterBlock { - Self::PTR - } - #[doc = r" Steal an instance of this peripheral"] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] - #[doc = r" that may race with any existing instances, for example by only"] - #[doc = r" accessing read-only or write-only registers, or by consuming the"] - #[doc = r" original peripheral and using critical sections to coordinate"] - #[doc = r" access between multiple new instances."] - #[doc = r""] - #[doc = r" Additionally, other software such as HALs may rely on only one"] - #[doc = r" peripheral instance existing to ensure memory safety; ensure"] - #[doc = r" no stolen instances are passed to such software."] - pub unsafe fn steal() -> Self { - Self { - _marker: PhantomData, - } - } -} -impl Deref for Tim1 { - type Target = tim0::RegisterBlock; - #[inline(always)] - fn deref(&self) -> &Self::Target { - unsafe { &*Self::PTR } - } -} +pub type Tim1 = crate::Periph; impl core::fmt::Debug for Tim1 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("Tim1").finish() @@ -1513,44 +993,7 @@ impl core::fmt::Debug for Tim1 { #[doc = "Timer/Counter Peripheral"] pub use self::tim0 as tim1; #[doc = "Timer/Counter Peripheral"] -pub struct Tim2 { - _marker: PhantomData<*const ()>, -} -unsafe impl Send for Tim2 {} -impl Tim2 { - #[doc = r"Pointer to the register block"] - pub const PTR: *const tim0::RegisterBlock = 0x4001_8800 as *const _; - #[doc = r"Return the pointer to the register block"] - #[inline(always)] - pub const fn ptr() -> *const tim0::RegisterBlock { - Self::PTR - } - #[doc = r" Steal an instance of this peripheral"] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] - #[doc = r" that may race with any existing instances, for example by only"] - #[doc = r" accessing read-only or write-only registers, or by consuming the"] - #[doc = r" original peripheral and using critical sections to coordinate"] - #[doc = r" access between multiple new instances."] - #[doc = r""] - #[doc = r" Additionally, other software such as HALs may rely on only one"] - #[doc = r" peripheral instance existing to ensure memory safety; ensure"] - #[doc = r" no stolen instances are passed to such software."] - pub unsafe fn steal() -> Self { - Self { - _marker: PhantomData, - } - } -} -impl Deref for Tim2 { - type Target = tim0::RegisterBlock; - #[inline(always)] - fn deref(&self) -> &Self::Target { - unsafe { &*Self::PTR } - } -} +pub type Tim2 = crate::Periph; impl core::fmt::Debug for Tim2 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("Tim2").finish() @@ -1559,44 +1002,7 @@ impl core::fmt::Debug for Tim2 { #[doc = "Timer/Counter Peripheral"] pub use self::tim0 as tim2; #[doc = "Timer/Counter Peripheral"] -pub struct Tim3 { - _marker: PhantomData<*const ()>, -} -unsafe impl Send for Tim3 {} -impl Tim3 { - #[doc = r"Pointer to the register block"] - pub const PTR: *const tim0::RegisterBlock = 0x4001_8c00 as *const _; - #[doc = r"Return the pointer to the register block"] - #[inline(always)] - pub const fn ptr() -> *const tim0::RegisterBlock { - Self::PTR - } - #[doc = r" Steal an instance of this peripheral"] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] - #[doc = r" that may race with any existing instances, for example by only"] - #[doc = r" accessing read-only or write-only registers, or by consuming the"] - #[doc = r" original peripheral and using critical sections to coordinate"] - #[doc = r" access between multiple new instances."] - #[doc = r""] - #[doc = r" Additionally, other software such as HALs may rely on only one"] - #[doc = r" peripheral instance existing to ensure memory safety; ensure"] - #[doc = r" no stolen instances are passed to such software."] - pub unsafe fn steal() -> Self { - Self { - _marker: PhantomData, - } - } -} -impl Deref for Tim3 { - type Target = tim0::RegisterBlock; - #[inline(always)] - fn deref(&self) -> &Self::Target { - unsafe { &*Self::PTR } - } -} +pub type Tim3 = crate::Periph; impl core::fmt::Debug for Tim3 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("Tim3").finish() @@ -1605,44 +1011,7 @@ impl core::fmt::Debug for Tim3 { #[doc = "Timer/Counter Peripheral"] pub use self::tim0 as tim3; #[doc = "Timer/Counter Peripheral"] -pub struct Tim4 { - _marker: PhantomData<*const ()>, -} -unsafe impl Send for Tim4 {} -impl Tim4 { - #[doc = r"Pointer to the register block"] - pub const PTR: *const tim0::RegisterBlock = 0x4001_9000 as *const _; - #[doc = r"Return the pointer to the register block"] - #[inline(always)] - pub const fn ptr() -> *const tim0::RegisterBlock { - Self::PTR - } - #[doc = r" Steal an instance of this peripheral"] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] - #[doc = r" that may race with any existing instances, for example by only"] - #[doc = r" accessing read-only or write-only registers, or by consuming the"] - #[doc = r" original peripheral and using critical sections to coordinate"] - #[doc = r" access between multiple new instances."] - #[doc = r""] - #[doc = r" Additionally, other software such as HALs may rely on only one"] - #[doc = r" peripheral instance existing to ensure memory safety; ensure"] - #[doc = r" no stolen instances are passed to such software."] - pub unsafe fn steal() -> Self { - Self { - _marker: PhantomData, - } - } -} -impl Deref for Tim4 { - type Target = tim0::RegisterBlock; - #[inline(always)] - fn deref(&self) -> &Self::Target { - unsafe { &*Self::PTR } - } -} +pub type Tim4 = crate::Periph; impl core::fmt::Debug for Tim4 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("Tim4").finish() @@ -1651,44 +1020,7 @@ impl core::fmt::Debug for Tim4 { #[doc = "Timer/Counter Peripheral"] pub use self::tim0 as tim4; #[doc = "Timer/Counter Peripheral"] -pub struct Tim5 { - _marker: PhantomData<*const ()>, -} -unsafe impl Send for Tim5 {} -impl Tim5 { - #[doc = r"Pointer to the register block"] - pub const PTR: *const tim0::RegisterBlock = 0x4001_9400 as *const _; - #[doc = r"Return the pointer to the register block"] - #[inline(always)] - pub const fn ptr() -> *const tim0::RegisterBlock { - Self::PTR - } - #[doc = r" Steal an instance of this peripheral"] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] - #[doc = r" that may race with any existing instances, for example by only"] - #[doc = r" accessing read-only or write-only registers, or by consuming the"] - #[doc = r" original peripheral and using critical sections to coordinate"] - #[doc = r" access between multiple new instances."] - #[doc = r""] - #[doc = r" Additionally, other software such as HALs may rely on only one"] - #[doc = r" peripheral instance existing to ensure memory safety; ensure"] - #[doc = r" no stolen instances are passed to such software."] - pub unsafe fn steal() -> Self { - Self { - _marker: PhantomData, - } - } -} -impl Deref for Tim5 { - type Target = tim0::RegisterBlock; - #[inline(always)] - fn deref(&self) -> &Self::Target { - unsafe { &*Self::PTR } - } -} +pub type Tim5 = crate::Periph; impl core::fmt::Debug for Tim5 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("Tim5").finish() @@ -1697,44 +1029,7 @@ impl core::fmt::Debug for Tim5 { #[doc = "Timer/Counter Peripheral"] pub use self::tim0 as tim5; #[doc = "Timer/Counter Peripheral"] -pub struct Tim6 { - _marker: PhantomData<*const ()>, -} -unsafe impl Send for Tim6 {} -impl Tim6 { - #[doc = r"Pointer to the register block"] - pub const PTR: *const tim0::RegisterBlock = 0x4001_9800 as *const _; - #[doc = r"Return the pointer to the register block"] - #[inline(always)] - pub const fn ptr() -> *const tim0::RegisterBlock { - Self::PTR - } - #[doc = r" Steal an instance of this peripheral"] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] - #[doc = r" that may race with any existing instances, for example by only"] - #[doc = r" accessing read-only or write-only registers, or by consuming the"] - #[doc = r" original peripheral and using critical sections to coordinate"] - #[doc = r" access between multiple new instances."] - #[doc = r""] - #[doc = r" Additionally, other software such as HALs may rely on only one"] - #[doc = r" peripheral instance existing to ensure memory safety; ensure"] - #[doc = r" no stolen instances are passed to such software."] - pub unsafe fn steal() -> Self { - Self { - _marker: PhantomData, - } - } -} -impl Deref for Tim6 { - type Target = tim0::RegisterBlock; - #[inline(always)] - fn deref(&self) -> &Self::Target { - unsafe { &*Self::PTR } - } -} +pub type Tim6 = crate::Periph; impl core::fmt::Debug for Tim6 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("Tim6").finish() @@ -1743,44 +1038,7 @@ impl core::fmt::Debug for Tim6 { #[doc = "Timer/Counter Peripheral"] pub use self::tim0 as tim6; #[doc = "Timer/Counter Peripheral"] -pub struct Tim7 { - _marker: PhantomData<*const ()>, -} -unsafe impl Send for Tim7 {} -impl Tim7 { - #[doc = r"Pointer to the register block"] - pub const PTR: *const tim0::RegisterBlock = 0x4001_9c00 as *const _; - #[doc = r"Return the pointer to the register block"] - #[inline(always)] - pub const fn ptr() -> *const tim0::RegisterBlock { - Self::PTR - } - #[doc = r" Steal an instance of this peripheral"] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] - #[doc = r" that may race with any existing instances, for example by only"] - #[doc = r" accessing read-only or write-only registers, or by consuming the"] - #[doc = r" original peripheral and using critical sections to coordinate"] - #[doc = r" access between multiple new instances."] - #[doc = r""] - #[doc = r" Additionally, other software such as HALs may rely on only one"] - #[doc = r" peripheral instance existing to ensure memory safety; ensure"] - #[doc = r" no stolen instances are passed to such software."] - pub unsafe fn steal() -> Self { - Self { - _marker: PhantomData, - } - } -} -impl Deref for Tim7 { - type Target = tim0::RegisterBlock; - #[inline(always)] - fn deref(&self) -> &Self::Target { - unsafe { &*Self::PTR } - } -} +pub type Tim7 = crate::Periph; impl core::fmt::Debug for Tim7 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("Tim7").finish() @@ -1789,44 +1047,7 @@ impl core::fmt::Debug for Tim7 { #[doc = "Timer/Counter Peripheral"] pub use self::tim0 as tim7; #[doc = "Timer/Counter Peripheral"] -pub struct Tim8 { - _marker: PhantomData<*const ()>, -} -unsafe impl Send for Tim8 {} -impl Tim8 { - #[doc = r"Pointer to the register block"] - pub const PTR: *const tim0::RegisterBlock = 0x4001_a000 as *const _; - #[doc = r"Return the pointer to the register block"] - #[inline(always)] - pub const fn ptr() -> *const tim0::RegisterBlock { - Self::PTR - } - #[doc = r" Steal an instance of this peripheral"] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] - #[doc = r" that may race with any existing instances, for example by only"] - #[doc = r" accessing read-only or write-only registers, or by consuming the"] - #[doc = r" original peripheral and using critical sections to coordinate"] - #[doc = r" access between multiple new instances."] - #[doc = r""] - #[doc = r" Additionally, other software such as HALs may rely on only one"] - #[doc = r" peripheral instance existing to ensure memory safety; ensure"] - #[doc = r" no stolen instances are passed to such software."] - pub unsafe fn steal() -> Self { - Self { - _marker: PhantomData, - } - } -} -impl Deref for Tim8 { - type Target = tim0::RegisterBlock; - #[inline(always)] - fn deref(&self) -> &Self::Target { - unsafe { &*Self::PTR } - } -} +pub type Tim8 = crate::Periph; impl core::fmt::Debug for Tim8 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("Tim8").finish() @@ -1835,44 +1056,7 @@ impl core::fmt::Debug for Tim8 { #[doc = "Timer/Counter Peripheral"] pub use self::tim0 as tim8; #[doc = "Timer/Counter Peripheral"] -pub struct Tim9 { - _marker: PhantomData<*const ()>, -} -unsafe impl Send for Tim9 {} -impl Tim9 { - #[doc = r"Pointer to the register block"] - pub const PTR: *const tim0::RegisterBlock = 0x4001_a400 as *const _; - #[doc = r"Return the pointer to the register block"] - #[inline(always)] - pub const fn ptr() -> *const tim0::RegisterBlock { - Self::PTR - } - #[doc = r" Steal an instance of this peripheral"] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] - #[doc = r" that may race with any existing instances, for example by only"] - #[doc = r" accessing read-only or write-only registers, or by consuming the"] - #[doc = r" original peripheral and using critical sections to coordinate"] - #[doc = r" access between multiple new instances."] - #[doc = r""] - #[doc = r" Additionally, other software such as HALs may rely on only one"] - #[doc = r" peripheral instance existing to ensure memory safety; ensure"] - #[doc = r" no stolen instances are passed to such software."] - pub unsafe fn steal() -> Self { - Self { - _marker: PhantomData, - } - } -} -impl Deref for Tim9 { - type Target = tim0::RegisterBlock; - #[inline(always)] - fn deref(&self) -> &Self::Target { - unsafe { &*Self::PTR } - } -} +pub type Tim9 = crate::Periph; impl core::fmt::Debug for Tim9 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("Tim9").finish() @@ -1881,44 +1065,7 @@ impl core::fmt::Debug for Tim9 { #[doc = "Timer/Counter Peripheral"] pub use self::tim0 as tim9; #[doc = "Timer/Counter Peripheral"] -pub struct Tim10 { - _marker: PhantomData<*const ()>, -} -unsafe impl Send for Tim10 {} -impl Tim10 { - #[doc = r"Pointer to the register block"] - pub const PTR: *const tim0::RegisterBlock = 0x4001_a800 as *const _; - #[doc = r"Return the pointer to the register block"] - #[inline(always)] - pub const fn ptr() -> *const tim0::RegisterBlock { - Self::PTR - } - #[doc = r" Steal an instance of this peripheral"] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] - #[doc = r" that may race with any existing instances, for example by only"] - #[doc = r" accessing read-only or write-only registers, or by consuming the"] - #[doc = r" original peripheral and using critical sections to coordinate"] - #[doc = r" access between multiple new instances."] - #[doc = r""] - #[doc = r" Additionally, other software such as HALs may rely on only one"] - #[doc = r" peripheral instance existing to ensure memory safety; ensure"] - #[doc = r" no stolen instances are passed to such software."] - pub unsafe fn steal() -> Self { - Self { - _marker: PhantomData, - } - } -} -impl Deref for Tim10 { - type Target = tim0::RegisterBlock; - #[inline(always)] - fn deref(&self) -> &Self::Target { - unsafe { &*Self::PTR } - } -} +pub type Tim10 = crate::Periph; impl core::fmt::Debug for Tim10 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("Tim10").finish() @@ -1927,44 +1074,7 @@ impl core::fmt::Debug for Tim10 { #[doc = "Timer/Counter Peripheral"] pub use self::tim0 as tim10; #[doc = "Timer/Counter Peripheral"] -pub struct Tim11 { - _marker: PhantomData<*const ()>, -} -unsafe impl Send for Tim11 {} -impl Tim11 { - #[doc = r"Pointer to the register block"] - pub const PTR: *const tim0::RegisterBlock = 0x4001_ac00 as *const _; - #[doc = r"Return the pointer to the register block"] - #[inline(always)] - pub const fn ptr() -> *const tim0::RegisterBlock { - Self::PTR - } - #[doc = r" Steal an instance of this peripheral"] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] - #[doc = r" that may race with any existing instances, for example by only"] - #[doc = r" accessing read-only or write-only registers, or by consuming the"] - #[doc = r" original peripheral and using critical sections to coordinate"] - #[doc = r" access between multiple new instances."] - #[doc = r""] - #[doc = r" Additionally, other software such as HALs may rely on only one"] - #[doc = r" peripheral instance existing to ensure memory safety; ensure"] - #[doc = r" no stolen instances are passed to such software."] - pub unsafe fn steal() -> Self { - Self { - _marker: PhantomData, - } - } -} -impl Deref for Tim11 { - type Target = tim0::RegisterBlock; - #[inline(always)] - fn deref(&self) -> &Self::Target { - unsafe { &*Self::PTR } - } -} +pub type Tim11 = crate::Periph; impl core::fmt::Debug for Tim11 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("Tim11").finish() @@ -1973,44 +1083,7 @@ impl core::fmt::Debug for Tim11 { #[doc = "Timer/Counter Peripheral"] pub use self::tim0 as tim11; #[doc = "Timer/Counter Peripheral"] -pub struct Tim12 { - _marker: PhantomData<*const ()>, -} -unsafe impl Send for Tim12 {} -impl Tim12 { - #[doc = r"Pointer to the register block"] - pub const PTR: *const tim0::RegisterBlock = 0x4001_b000 as *const _; - #[doc = r"Return the pointer to the register block"] - #[inline(always)] - pub const fn ptr() -> *const tim0::RegisterBlock { - Self::PTR - } - #[doc = r" Steal an instance of this peripheral"] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] - #[doc = r" that may race with any existing instances, for example by only"] - #[doc = r" accessing read-only or write-only registers, or by consuming the"] - #[doc = r" original peripheral and using critical sections to coordinate"] - #[doc = r" access between multiple new instances."] - #[doc = r""] - #[doc = r" Additionally, other software such as HALs may rely on only one"] - #[doc = r" peripheral instance existing to ensure memory safety; ensure"] - #[doc = r" no stolen instances are passed to such software."] - pub unsafe fn steal() -> Self { - Self { - _marker: PhantomData, - } - } -} -impl Deref for Tim12 { - type Target = tim0::RegisterBlock; - #[inline(always)] - fn deref(&self) -> &Self::Target { - unsafe { &*Self::PTR } - } -} +pub type Tim12 = crate::Periph; impl core::fmt::Debug for Tim12 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("Tim12").finish() @@ -2019,44 +1092,7 @@ impl core::fmt::Debug for Tim12 { #[doc = "Timer/Counter Peripheral"] pub use self::tim0 as tim12; #[doc = "Timer/Counter Peripheral"] -pub struct Tim13 { - _marker: PhantomData<*const ()>, -} -unsafe impl Send for Tim13 {} -impl Tim13 { - #[doc = r"Pointer to the register block"] - pub const PTR: *const tim0::RegisterBlock = 0x4001_b400 as *const _; - #[doc = r"Return the pointer to the register block"] - #[inline(always)] - pub const fn ptr() -> *const tim0::RegisterBlock { - Self::PTR - } - #[doc = r" Steal an instance of this peripheral"] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] - #[doc = r" that may race with any existing instances, for example by only"] - #[doc = r" accessing read-only or write-only registers, or by consuming the"] - #[doc = r" original peripheral and using critical sections to coordinate"] - #[doc = r" access between multiple new instances."] - #[doc = r""] - #[doc = r" Additionally, other software such as HALs may rely on only one"] - #[doc = r" peripheral instance existing to ensure memory safety; ensure"] - #[doc = r" no stolen instances are passed to such software."] - pub unsafe fn steal() -> Self { - Self { - _marker: PhantomData, - } - } -} -impl Deref for Tim13 { - type Target = tim0::RegisterBlock; - #[inline(always)] - fn deref(&self) -> &Self::Target { - unsafe { &*Self::PTR } - } -} +pub type Tim13 = crate::Periph; impl core::fmt::Debug for Tim13 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("Tim13").finish() @@ -2065,44 +1101,7 @@ impl core::fmt::Debug for Tim13 { #[doc = "Timer/Counter Peripheral"] pub use self::tim0 as tim13; #[doc = "Timer/Counter Peripheral"] -pub struct Tim14 { - _marker: PhantomData<*const ()>, -} -unsafe impl Send for Tim14 {} -impl Tim14 { - #[doc = r"Pointer to the register block"] - pub const PTR: *const tim0::RegisterBlock = 0x4001_b800 as *const _; - #[doc = r"Return the pointer to the register block"] - #[inline(always)] - pub const fn ptr() -> *const tim0::RegisterBlock { - Self::PTR - } - #[doc = r" Steal an instance of this peripheral"] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] - #[doc = r" that may race with any existing instances, for example by only"] - #[doc = r" accessing read-only or write-only registers, or by consuming the"] - #[doc = r" original peripheral and using critical sections to coordinate"] - #[doc = r" access between multiple new instances."] - #[doc = r""] - #[doc = r" Additionally, other software such as HALs may rely on only one"] - #[doc = r" peripheral instance existing to ensure memory safety; ensure"] - #[doc = r" no stolen instances are passed to such software."] - pub unsafe fn steal() -> Self { - Self { - _marker: PhantomData, - } - } -} -impl Deref for Tim14 { - type Target = tim0::RegisterBlock; - #[inline(always)] - fn deref(&self) -> &Self::Target { - unsafe { &*Self::PTR } - } -} +pub type Tim14 = crate::Periph; impl core::fmt::Debug for Tim14 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("Tim14").finish() @@ -2111,44 +1110,7 @@ impl core::fmt::Debug for Tim14 { #[doc = "Timer/Counter Peripheral"] pub use self::tim0 as tim14; #[doc = "Timer/Counter Peripheral"] -pub struct Tim15 { - _marker: PhantomData<*const ()>, -} -unsafe impl Send for Tim15 {} -impl Tim15 { - #[doc = r"Pointer to the register block"] - pub const PTR: *const tim0::RegisterBlock = 0x4001_bc00 as *const _; - #[doc = r"Return the pointer to the register block"] - #[inline(always)] - pub const fn ptr() -> *const tim0::RegisterBlock { - Self::PTR - } - #[doc = r" Steal an instance of this peripheral"] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] - #[doc = r" that may race with any existing instances, for example by only"] - #[doc = r" accessing read-only or write-only registers, or by consuming the"] - #[doc = r" original peripheral and using critical sections to coordinate"] - #[doc = r" access between multiple new instances."] - #[doc = r""] - #[doc = r" Additionally, other software such as HALs may rely on only one"] - #[doc = r" peripheral instance existing to ensure memory safety; ensure"] - #[doc = r" no stolen instances are passed to such software."] - pub unsafe fn steal() -> Self { - Self { - _marker: PhantomData, - } - } -} -impl Deref for Tim15 { - type Target = tim0::RegisterBlock; - #[inline(always)] - fn deref(&self) -> &Self::Target { - unsafe { &*Self::PTR } - } -} +pub type Tim15 = crate::Periph; impl core::fmt::Debug for Tim15 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("Tim15").finish() @@ -2157,44 +1119,7 @@ impl core::fmt::Debug for Tim15 { #[doc = "Timer/Counter Peripheral"] pub use self::tim0 as tim15; #[doc = "Timer/Counter Peripheral"] -pub struct Tim16 { - _marker: PhantomData<*const ()>, -} -unsafe impl Send for Tim16 {} -impl Tim16 { - #[doc = r"Pointer to the register block"] - pub const PTR: *const tim0::RegisterBlock = 0x4002_8000 as *const _; - #[doc = r"Return the pointer to the register block"] - #[inline(always)] - pub const fn ptr() -> *const tim0::RegisterBlock { - Self::PTR - } - #[doc = r" Steal an instance of this peripheral"] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] - #[doc = r" that may race with any existing instances, for example by only"] - #[doc = r" accessing read-only or write-only registers, or by consuming the"] - #[doc = r" original peripheral and using critical sections to coordinate"] - #[doc = r" access between multiple new instances."] - #[doc = r""] - #[doc = r" Additionally, other software such as HALs may rely on only one"] - #[doc = r" peripheral instance existing to ensure memory safety; ensure"] - #[doc = r" no stolen instances are passed to such software."] - pub unsafe fn steal() -> Self { - Self { - _marker: PhantomData, - } - } -} -impl Deref for Tim16 { - type Target = tim0::RegisterBlock; - #[inline(always)] - fn deref(&self) -> &Self::Target { - unsafe { &*Self::PTR } - } -} +pub type Tim16 = crate::Periph; impl core::fmt::Debug for Tim16 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("Tim16").finish() @@ -2203,44 +1128,7 @@ impl core::fmt::Debug for Tim16 { #[doc = "Timer/Counter Peripheral"] pub use self::tim0 as tim16; #[doc = "Timer/Counter Peripheral"] -pub struct Tim17 { - _marker: PhantomData<*const ()>, -} -unsafe impl Send for Tim17 {} -impl Tim17 { - #[doc = r"Pointer to the register block"] - pub const PTR: *const tim0::RegisterBlock = 0x4002_8400 as *const _; - #[doc = r"Return the pointer to the register block"] - #[inline(always)] - pub const fn ptr() -> *const tim0::RegisterBlock { - Self::PTR - } - #[doc = r" Steal an instance of this peripheral"] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] - #[doc = r" that may race with any existing instances, for example by only"] - #[doc = r" accessing read-only or write-only registers, or by consuming the"] - #[doc = r" original peripheral and using critical sections to coordinate"] - #[doc = r" access between multiple new instances."] - #[doc = r""] - #[doc = r" Additionally, other software such as HALs may rely on only one"] - #[doc = r" peripheral instance existing to ensure memory safety; ensure"] - #[doc = r" no stolen instances are passed to such software."] - pub unsafe fn steal() -> Self { - Self { - _marker: PhantomData, - } - } -} -impl Deref for Tim17 { - type Target = tim0::RegisterBlock; - #[inline(always)] - fn deref(&self) -> &Self::Target { - unsafe { &*Self::PTR } - } -} +pub type Tim17 = crate::Periph; impl core::fmt::Debug for Tim17 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("Tim17").finish() @@ -2249,44 +1137,7 @@ impl core::fmt::Debug for Tim17 { #[doc = "Timer/Counter Peripheral"] pub use self::tim0 as tim17; #[doc = "Timer/Counter Peripheral"] -pub struct Tim18 { - _marker: PhantomData<*const ()>, -} -unsafe impl Send for Tim18 {} -impl Tim18 { - #[doc = r"Pointer to the register block"] - pub const PTR: *const tim0::RegisterBlock = 0x4002_8800 as *const _; - #[doc = r"Return the pointer to the register block"] - #[inline(always)] - pub const fn ptr() -> *const tim0::RegisterBlock { - Self::PTR - } - #[doc = r" Steal an instance of this peripheral"] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] - #[doc = r" that may race with any existing instances, for example by only"] - #[doc = r" accessing read-only or write-only registers, or by consuming the"] - #[doc = r" original peripheral and using critical sections to coordinate"] - #[doc = r" access between multiple new instances."] - #[doc = r""] - #[doc = r" Additionally, other software such as HALs may rely on only one"] - #[doc = r" peripheral instance existing to ensure memory safety; ensure"] - #[doc = r" no stolen instances are passed to such software."] - pub unsafe fn steal() -> Self { - Self { - _marker: PhantomData, - } - } -} -impl Deref for Tim18 { - type Target = tim0::RegisterBlock; - #[inline(always)] - fn deref(&self) -> &Self::Target { - unsafe { &*Self::PTR } - } -} +pub type Tim18 = crate::Periph; impl core::fmt::Debug for Tim18 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("Tim18").finish() @@ -2295,44 +1146,7 @@ impl core::fmt::Debug for Tim18 { #[doc = "Timer/Counter Peripheral"] pub use self::tim0 as tim18; #[doc = "Timer/Counter Peripheral"] -pub struct Tim19 { - _marker: PhantomData<*const ()>, -} -unsafe impl Send for Tim19 {} -impl Tim19 { - #[doc = r"Pointer to the register block"] - pub const PTR: *const tim0::RegisterBlock = 0x4002_8c00 as *const _; - #[doc = r"Return the pointer to the register block"] - #[inline(always)] - pub const fn ptr() -> *const tim0::RegisterBlock { - Self::PTR - } - #[doc = r" Steal an instance of this peripheral"] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] - #[doc = r" that may race with any existing instances, for example by only"] - #[doc = r" accessing read-only or write-only registers, or by consuming the"] - #[doc = r" original peripheral and using critical sections to coordinate"] - #[doc = r" access between multiple new instances."] - #[doc = r""] - #[doc = r" Additionally, other software such as HALs may rely on only one"] - #[doc = r" peripheral instance existing to ensure memory safety; ensure"] - #[doc = r" no stolen instances are passed to such software."] - pub unsafe fn steal() -> Self { - Self { - _marker: PhantomData, - } - } -} -impl Deref for Tim19 { - type Target = tim0::RegisterBlock; - #[inline(always)] - fn deref(&self) -> &Self::Target { - unsafe { &*Self::PTR } - } -} +pub type Tim19 = crate::Periph; impl core::fmt::Debug for Tim19 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("Tim19").finish() @@ -2341,44 +1155,7 @@ impl core::fmt::Debug for Tim19 { #[doc = "Timer/Counter Peripheral"] pub use self::tim0 as tim19; #[doc = "Timer/Counter Peripheral"] -pub struct Tim20 { - _marker: PhantomData<*const ()>, -} -unsafe impl Send for Tim20 {} -impl Tim20 { - #[doc = r"Pointer to the register block"] - pub const PTR: *const tim0::RegisterBlock = 0x4002_9000 as *const _; - #[doc = r"Return the pointer to the register block"] - #[inline(always)] - pub const fn ptr() -> *const tim0::RegisterBlock { - Self::PTR - } - #[doc = r" Steal an instance of this peripheral"] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] - #[doc = r" that may race with any existing instances, for example by only"] - #[doc = r" accessing read-only or write-only registers, or by consuming the"] - #[doc = r" original peripheral and using critical sections to coordinate"] - #[doc = r" access between multiple new instances."] - #[doc = r""] - #[doc = r" Additionally, other software such as HALs may rely on only one"] - #[doc = r" peripheral instance existing to ensure memory safety; ensure"] - #[doc = r" no stolen instances are passed to such software."] - pub unsafe fn steal() -> Self { - Self { - _marker: PhantomData, - } - } -} -impl Deref for Tim20 { - type Target = tim0::RegisterBlock; - #[inline(always)] - fn deref(&self) -> &Self::Target { - unsafe { &*Self::PTR } - } -} +pub type Tim20 = crate::Periph; impl core::fmt::Debug for Tim20 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("Tim20").finish() @@ -2387,44 +1164,7 @@ impl core::fmt::Debug for Tim20 { #[doc = "Timer/Counter Peripheral"] pub use self::tim0 as tim20; #[doc = "Timer/Counter Peripheral"] -pub struct Tim21 { - _marker: PhantomData<*const ()>, -} -unsafe impl Send for Tim21 {} -impl Tim21 { - #[doc = r"Pointer to the register block"] - pub const PTR: *const tim0::RegisterBlock = 0x4002_9400 as *const _; - #[doc = r"Return the pointer to the register block"] - #[inline(always)] - pub const fn ptr() -> *const tim0::RegisterBlock { - Self::PTR - } - #[doc = r" Steal an instance of this peripheral"] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] - #[doc = r" that may race with any existing instances, for example by only"] - #[doc = r" accessing read-only or write-only registers, or by consuming the"] - #[doc = r" original peripheral and using critical sections to coordinate"] - #[doc = r" access between multiple new instances."] - #[doc = r""] - #[doc = r" Additionally, other software such as HALs may rely on only one"] - #[doc = r" peripheral instance existing to ensure memory safety; ensure"] - #[doc = r" no stolen instances are passed to such software."] - pub unsafe fn steal() -> Self { - Self { - _marker: PhantomData, - } - } -} -impl Deref for Tim21 { - type Target = tim0::RegisterBlock; - #[inline(always)] - fn deref(&self) -> &Self::Target { - unsafe { &*Self::PTR } - } -} +pub type Tim21 = crate::Periph; impl core::fmt::Debug for Tim21 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("Tim21").finish() @@ -2433,44 +1173,7 @@ impl core::fmt::Debug for Tim21 { #[doc = "Timer/Counter Peripheral"] pub use self::tim0 as tim21; #[doc = "Timer/Counter Peripheral"] -pub struct Tim22 { - _marker: PhantomData<*const ()>, -} -unsafe impl Send for Tim22 {} -impl Tim22 { - #[doc = r"Pointer to the register block"] - pub const PTR: *const tim0::RegisterBlock = 0x4002_9800 as *const _; - #[doc = r"Return the pointer to the register block"] - #[inline(always)] - pub const fn ptr() -> *const tim0::RegisterBlock { - Self::PTR - } - #[doc = r" Steal an instance of this peripheral"] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] - #[doc = r" that may race with any existing instances, for example by only"] - #[doc = r" accessing read-only or write-only registers, or by consuming the"] - #[doc = r" original peripheral and using critical sections to coordinate"] - #[doc = r" access between multiple new instances."] - #[doc = r""] - #[doc = r" Additionally, other software such as HALs may rely on only one"] - #[doc = r" peripheral instance existing to ensure memory safety; ensure"] - #[doc = r" no stolen instances are passed to such software."] - pub unsafe fn steal() -> Self { - Self { - _marker: PhantomData, - } - } -} -impl Deref for Tim22 { - type Target = tim0::RegisterBlock; - #[inline(always)] - fn deref(&self) -> &Self::Target { - unsafe { &*Self::PTR } - } -} +pub type Tim22 = crate::Periph; impl core::fmt::Debug for Tim22 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("Tim22").finish() @@ -2479,44 +1182,7 @@ impl core::fmt::Debug for Tim22 { #[doc = "Timer/Counter Peripheral"] pub use self::tim0 as tim22; #[doc = "Timer/Counter Peripheral"] -pub struct Tim23 { - _marker: PhantomData<*const ()>, -} -unsafe impl Send for Tim23 {} -impl Tim23 { - #[doc = r"Pointer to the register block"] - pub const PTR: *const tim0::RegisterBlock = 0x4002_9c00 as *const _; - #[doc = r"Return the pointer to the register block"] - #[inline(always)] - pub const fn ptr() -> *const tim0::RegisterBlock { - Self::PTR - } - #[doc = r" Steal an instance of this peripheral"] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] - #[doc = r" that may race with any existing instances, for example by only"] - #[doc = r" accessing read-only or write-only registers, or by consuming the"] - #[doc = r" original peripheral and using critical sections to coordinate"] - #[doc = r" access between multiple new instances."] - #[doc = r""] - #[doc = r" Additionally, other software such as HALs may rely on only one"] - #[doc = r" peripheral instance existing to ensure memory safety; ensure"] - #[doc = r" no stolen instances are passed to such software."] - pub unsafe fn steal() -> Self { - Self { - _marker: PhantomData, - } - } -} -impl Deref for Tim23 { - type Target = tim0::RegisterBlock; - #[inline(always)] - fn deref(&self) -> &Self::Target { - unsafe { &*Self::PTR } - } -} +pub type Tim23 = crate::Periph; impl core::fmt::Debug for Tim23 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("Tim23").finish() @@ -2525,44 +1191,7 @@ impl core::fmt::Debug for Tim23 { #[doc = "Timer/Counter Peripheral"] pub use self::tim0 as tim23; #[doc = "UART Peripheral"] -pub struct Uart0 { - _marker: PhantomData<*const ()>, -} -unsafe impl Send for Uart0 {} -impl Uart0 { - #[doc = r"Pointer to the register block"] - pub const PTR: *const uart0::RegisterBlock = 0x4002_4000 as *const _; - #[doc = r"Return the pointer to the register block"] - #[inline(always)] - pub const fn ptr() -> *const uart0::RegisterBlock { - Self::PTR - } - #[doc = r" Steal an instance of this peripheral"] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] - #[doc = r" that may race with any existing instances, for example by only"] - #[doc = r" accessing read-only or write-only registers, or by consuming the"] - #[doc = r" original peripheral and using critical sections to coordinate"] - #[doc = r" access between multiple new instances."] - #[doc = r""] - #[doc = r" Additionally, other software such as HALs may rely on only one"] - #[doc = r" peripheral instance existing to ensure memory safety; ensure"] - #[doc = r" no stolen instances are passed to such software."] - pub unsafe fn steal() -> Self { - Self { - _marker: PhantomData, - } - } -} -impl Deref for Uart0 { - type Target = uart0::RegisterBlock; - #[inline(always)] - fn deref(&self) -> &Self::Target { - unsafe { &*Self::PTR } - } -} +pub type Uart0 = crate::Periph; impl core::fmt::Debug for Uart0 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("Uart0").finish() @@ -2571,44 +1200,7 @@ impl core::fmt::Debug for Uart0 { #[doc = "UART Peripheral"] pub mod uart0; #[doc = "UART Peripheral"] -pub struct Uart1 { - _marker: PhantomData<*const ()>, -} -unsafe impl Send for Uart1 {} -impl Uart1 { - #[doc = r"Pointer to the register block"] - pub const PTR: *const uart0::RegisterBlock = 0x4002_5000 as *const _; - #[doc = r"Return the pointer to the register block"] - #[inline(always)] - pub const fn ptr() -> *const uart0::RegisterBlock { - Self::PTR - } - #[doc = r" Steal an instance of this peripheral"] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] - #[doc = r" that may race with any existing instances, for example by only"] - #[doc = r" accessing read-only or write-only registers, or by consuming the"] - #[doc = r" original peripheral and using critical sections to coordinate"] - #[doc = r" access between multiple new instances."] - #[doc = r""] - #[doc = r" Additionally, other software such as HALs may rely on only one"] - #[doc = r" peripheral instance existing to ensure memory safety; ensure"] - #[doc = r" no stolen instances are passed to such software."] - pub unsafe fn steal() -> Self { - Self { - _marker: PhantomData, - } - } -} -impl Deref for Uart1 { - type Target = uart0::RegisterBlock; - #[inline(always)] - fn deref(&self) -> &Self::Target { - unsafe { &*Self::PTR } - } -} +pub type Uart1 = crate::Periph; impl core::fmt::Debug for Uart1 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("Uart1").finish() @@ -2617,44 +1209,7 @@ impl core::fmt::Debug for Uart1 { #[doc = "UART Peripheral"] pub use self::uart0 as uart1; #[doc = "UART Peripheral"] -pub struct Uart2 { - _marker: PhantomData<*const ()>, -} -unsafe impl Send for Uart2 {} -impl Uart2 { - #[doc = r"Pointer to the register block"] - pub const PTR: *const uart0::RegisterBlock = 0x4001_7000 as *const _; - #[doc = r"Return the pointer to the register block"] - #[inline(always)] - pub const fn ptr() -> *const uart0::RegisterBlock { - Self::PTR - } - #[doc = r" Steal an instance of this peripheral"] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] - #[doc = r" that may race with any existing instances, for example by only"] - #[doc = r" accessing read-only or write-only registers, or by consuming the"] - #[doc = r" original peripheral and using critical sections to coordinate"] - #[doc = r" access between multiple new instances."] - #[doc = r""] - #[doc = r" Additionally, other software such as HALs may rely on only one"] - #[doc = r" peripheral instance existing to ensure memory safety; ensure"] - #[doc = r" no stolen instances are passed to such software."] - pub unsafe fn steal() -> Self { - Self { - _marker: PhantomData, - } - } -} -impl Deref for Uart2 { - type Target = uart0::RegisterBlock; - #[inline(always)] - fn deref(&self) -> &Self::Target { - unsafe { &*Self::PTR } - } -} +pub type Uart2 = crate::Periph; impl core::fmt::Debug for Uart2 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("Uart2").finish() @@ -2663,44 +1218,7 @@ impl core::fmt::Debug for Uart2 { #[doc = "UART Peripheral"] pub use self::uart0 as uart2; #[doc = "SPI Peripheral"] -pub struct Spi0 { - _marker: PhantomData<*const ()>, -} -unsafe impl Send for Spi0 {} -impl Spi0 { - #[doc = r"Pointer to the register block"] - pub const PTR: *const spi0::RegisterBlock = 0x4001_5000 as *const _; - #[doc = r"Return the pointer to the register block"] - #[inline(always)] - pub const fn ptr() -> *const spi0::RegisterBlock { - Self::PTR - } - #[doc = r" Steal an instance of this peripheral"] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] - #[doc = r" that may race with any existing instances, for example by only"] - #[doc = r" accessing read-only or write-only registers, or by consuming the"] - #[doc = r" original peripheral and using critical sections to coordinate"] - #[doc = r" access between multiple new instances."] - #[doc = r""] - #[doc = r" Additionally, other software such as HALs may rely on only one"] - #[doc = r" peripheral instance existing to ensure memory safety; ensure"] - #[doc = r" no stolen instances are passed to such software."] - pub unsafe fn steal() -> Self { - Self { - _marker: PhantomData, - } - } -} -impl Deref for Spi0 { - type Target = spi0::RegisterBlock; - #[inline(always)] - fn deref(&self) -> &Self::Target { - unsafe { &*Self::PTR } - } -} +pub type Spi0 = crate::Periph; impl core::fmt::Debug for Spi0 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("Spi0").finish() @@ -2709,44 +1227,7 @@ impl core::fmt::Debug for Spi0 { #[doc = "SPI Peripheral"] pub mod spi0; #[doc = "SPI Peripheral"] -pub struct Spi1 { - _marker: PhantomData<*const ()>, -} -unsafe impl Send for Spi1 {} -impl Spi1 { - #[doc = r"Pointer to the register block"] - pub const PTR: *const spi0::RegisterBlock = 0x4001_5400 as *const _; - #[doc = r"Return the pointer to the register block"] - #[inline(always)] - pub const fn ptr() -> *const spi0::RegisterBlock { - Self::PTR - } - #[doc = r" Steal an instance of this peripheral"] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] - #[doc = r" that may race with any existing instances, for example by only"] - #[doc = r" accessing read-only or write-only registers, or by consuming the"] - #[doc = r" original peripheral and using critical sections to coordinate"] - #[doc = r" access between multiple new instances."] - #[doc = r""] - #[doc = r" Additionally, other software such as HALs may rely on only one"] - #[doc = r" peripheral instance existing to ensure memory safety; ensure"] - #[doc = r" no stolen instances are passed to such software."] - pub unsafe fn steal() -> Self { - Self { - _marker: PhantomData, - } - } -} -impl Deref for Spi1 { - type Target = spi0::RegisterBlock; - #[inline(always)] - fn deref(&self) -> &Self::Target { - unsafe { &*Self::PTR } - } -} +pub type Spi1 = crate::Periph; impl core::fmt::Debug for Spi1 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("Spi1").finish() @@ -2755,44 +1236,7 @@ impl core::fmt::Debug for Spi1 { #[doc = "SPI Peripheral"] pub use self::spi0 as spi1; #[doc = "SPI Peripheral"] -pub struct Spi2 { - _marker: PhantomData<*const ()>, -} -unsafe impl Send for Spi2 {} -impl Spi2 { - #[doc = r"Pointer to the register block"] - pub const PTR: *const spi0::RegisterBlock = 0x4001_5800 as *const _; - #[doc = r"Return the pointer to the register block"] - #[inline(always)] - pub const fn ptr() -> *const spi0::RegisterBlock { - Self::PTR - } - #[doc = r" Steal an instance of this peripheral"] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] - #[doc = r" that may race with any existing instances, for example by only"] - #[doc = r" accessing read-only or write-only registers, or by consuming the"] - #[doc = r" original peripheral and using critical sections to coordinate"] - #[doc = r" access between multiple new instances."] - #[doc = r""] - #[doc = r" Additionally, other software such as HALs may rely on only one"] - #[doc = r" peripheral instance existing to ensure memory safety; ensure"] - #[doc = r" no stolen instances are passed to such software."] - pub unsafe fn steal() -> Self { - Self { - _marker: PhantomData, - } - } -} -impl Deref for Spi2 { - type Target = spi0::RegisterBlock; - #[inline(always)] - fn deref(&self) -> &Self::Target { - unsafe { &*Self::PTR } - } -} +pub type Spi2 = crate::Periph; impl core::fmt::Debug for Spi2 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("Spi2").finish() @@ -2801,44 +1245,7 @@ impl core::fmt::Debug for Spi2 { #[doc = "SPI Peripheral"] pub use self::spi0 as spi2; #[doc = "SPI Peripheral"] -pub struct Spi3 { - _marker: PhantomData<*const ()>, -} -unsafe impl Send for Spi3 {} -impl Spi3 { - #[doc = r"Pointer to the register block"] - pub const PTR: *const spi0::RegisterBlock = 0x4001_5c00 as *const _; - #[doc = r"Return the pointer to the register block"] - #[inline(always)] - pub const fn ptr() -> *const spi0::RegisterBlock { - Self::PTR - } - #[doc = r" Steal an instance of this peripheral"] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] - #[doc = r" that may race with any existing instances, for example by only"] - #[doc = r" accessing read-only or write-only registers, or by consuming the"] - #[doc = r" original peripheral and using critical sections to coordinate"] - #[doc = r" access between multiple new instances."] - #[doc = r""] - #[doc = r" Additionally, other software such as HALs may rely on only one"] - #[doc = r" peripheral instance existing to ensure memory safety; ensure"] - #[doc = r" no stolen instances are passed to such software."] - pub unsafe fn steal() -> Self { - Self { - _marker: PhantomData, - } - } -} -impl Deref for Spi3 { - type Target = spi0::RegisterBlock; - #[inline(always)] - fn deref(&self) -> &Self::Target { - unsafe { &*Self::PTR } - } -} +pub type Spi3 = crate::Periph; impl core::fmt::Debug for Spi3 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("Spi3").finish() @@ -2847,44 +1254,7 @@ impl core::fmt::Debug for Spi3 { #[doc = "SPI Peripheral"] pub use self::spi0 as spi3; #[doc = "I2C Peripheral"] -pub struct I2c0 { - _marker: PhantomData<*const ()>, -} -unsafe impl Send for I2c0 {} -impl I2c0 { - #[doc = r"Pointer to the register block"] - pub const PTR: *const i2c0::RegisterBlock = 0x4001_6000 as *const _; - #[doc = r"Return the pointer to the register block"] - #[inline(always)] - pub const fn ptr() -> *const i2c0::RegisterBlock { - Self::PTR - } - #[doc = r" Steal an instance of this peripheral"] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] - #[doc = r" that may race with any existing instances, for example by only"] - #[doc = r" accessing read-only or write-only registers, or by consuming the"] - #[doc = r" original peripheral and using critical sections to coordinate"] - #[doc = r" access between multiple new instances."] - #[doc = r""] - #[doc = r" Additionally, other software such as HALs may rely on only one"] - #[doc = r" peripheral instance existing to ensure memory safety; ensure"] - #[doc = r" no stolen instances are passed to such software."] - pub unsafe fn steal() -> Self { - Self { - _marker: PhantomData, - } - } -} -impl Deref for I2c0 { - type Target = i2c0::RegisterBlock; - #[inline(always)] - fn deref(&self) -> &Self::Target { - unsafe { &*Self::PTR } - } -} +pub type I2c0 = crate::Periph; impl core::fmt::Debug for I2c0 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("I2c0").finish() @@ -2893,44 +1263,7 @@ impl core::fmt::Debug for I2c0 { #[doc = "I2C Peripheral"] pub mod i2c0; #[doc = "I2C Peripheral"] -pub struct I2c1 { - _marker: PhantomData<*const ()>, -} -unsafe impl Send for I2c1 {} -impl I2c1 { - #[doc = r"Pointer to the register block"] - pub const PTR: *const i2c0::RegisterBlock = 0x4001_6400 as *const _; - #[doc = r"Return the pointer to the register block"] - #[inline(always)] - pub const fn ptr() -> *const i2c0::RegisterBlock { - Self::PTR - } - #[doc = r" Steal an instance of this peripheral"] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] - #[doc = r" that may race with any existing instances, for example by only"] - #[doc = r" accessing read-only or write-only registers, or by consuming the"] - #[doc = r" original peripheral and using critical sections to coordinate"] - #[doc = r" access between multiple new instances."] - #[doc = r""] - #[doc = r" Additionally, other software such as HALs may rely on only one"] - #[doc = r" peripheral instance existing to ensure memory safety; ensure"] - #[doc = r" no stolen instances are passed to such software."] - pub unsafe fn steal() -> Self { - Self { - _marker: PhantomData, - } - } -} -impl Deref for I2c1 { - type Target = i2c0::RegisterBlock; - #[inline(always)] - fn deref(&self) -> &Self::Target { - unsafe { &*Self::PTR } - } -} +pub type I2c1 = crate::Periph; impl core::fmt::Debug for I2c1 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("I2c1").finish() @@ -2939,44 +1272,7 @@ impl core::fmt::Debug for I2c1 { #[doc = "I2C Peripheral"] pub use self::i2c0 as i2c1; #[doc = "I2C Peripheral"] -pub struct I2c2 { - _marker: PhantomData<*const ()>, -} -unsafe impl Send for I2c2 {} -impl I2c2 { - #[doc = r"Pointer to the register block"] - pub const PTR: *const i2c0::RegisterBlock = 0x4001_6800 as *const _; - #[doc = r"Return the pointer to the register block"] - #[inline(always)] - pub const fn ptr() -> *const i2c0::RegisterBlock { - Self::PTR - } - #[doc = r" Steal an instance of this peripheral"] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] - #[doc = r" that may race with any existing instances, for example by only"] - #[doc = r" accessing read-only or write-only registers, or by consuming the"] - #[doc = r" original peripheral and using critical sections to coordinate"] - #[doc = r" access between multiple new instances."] - #[doc = r""] - #[doc = r" Additionally, other software such as HALs may rely on only one"] - #[doc = r" peripheral instance existing to ensure memory safety; ensure"] - #[doc = r" no stolen instances are passed to such software."] - pub unsafe fn steal() -> Self { - Self { - _marker: PhantomData, - } - } -} -impl Deref for I2c2 { - type Target = i2c0::RegisterBlock; - #[inline(always)] - fn deref(&self) -> &Self::Target { - unsafe { &*Self::PTR } - } -} +pub type I2c2 = crate::Periph; impl core::fmt::Debug for I2c2 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("I2c2").finish() @@ -2985,44 +1281,7 @@ impl core::fmt::Debug for I2c2 { #[doc = "I2C Peripheral"] pub use self::i2c0 as i2c2; #[doc = "CAN Peripheral"] -pub struct Can0 { - _marker: PhantomData<*const ()>, -} -unsafe impl Send for Can0 {} -impl Can0 { - #[doc = r"Pointer to the register block"] - pub const PTR: *const can0::RegisterBlock = 0x4001_4000 as *const _; - #[doc = r"Return the pointer to the register block"] - #[inline(always)] - pub const fn ptr() -> *const can0::RegisterBlock { - Self::PTR - } - #[doc = r" Steal an instance of this peripheral"] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] - #[doc = r" that may race with any existing instances, for example by only"] - #[doc = r" accessing read-only or write-only registers, or by consuming the"] - #[doc = r" original peripheral and using critical sections to coordinate"] - #[doc = r" access between multiple new instances."] - #[doc = r""] - #[doc = r" Additionally, other software such as HALs may rely on only one"] - #[doc = r" peripheral instance existing to ensure memory safety; ensure"] - #[doc = r" no stolen instances are passed to such software."] - pub unsafe fn steal() -> Self { - Self { - _marker: PhantomData, - } - } -} -impl Deref for Can0 { - type Target = can0::RegisterBlock; - #[inline(always)] - fn deref(&self) -> &Self::Target { - unsafe { &*Self::PTR } - } -} +pub type Can0 = crate::Periph; impl core::fmt::Debug for Can0 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("Can0").finish() @@ -3031,44 +1290,7 @@ impl core::fmt::Debug for Can0 { #[doc = "CAN Peripheral"] pub mod can0; #[doc = "CAN Peripheral"] -pub struct Can1 { - _marker: PhantomData<*const ()>, -} -unsafe impl Send for Can1 {} -impl Can1 { - #[doc = r"Pointer to the register block"] - pub const PTR: *const can0::RegisterBlock = 0x4001_4400 as *const _; - #[doc = r"Return the pointer to the register block"] - #[inline(always)] - pub const fn ptr() -> *const can0::RegisterBlock { - Self::PTR - } - #[doc = r" Steal an instance of this peripheral"] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] - #[doc = r" that may race with any existing instances, for example by only"] - #[doc = r" accessing read-only or write-only registers, or by consuming the"] - #[doc = r" original peripheral and using critical sections to coordinate"] - #[doc = r" access between multiple new instances."] - #[doc = r""] - #[doc = r" Additionally, other software such as HALs may rely on only one"] - #[doc = r" peripheral instance existing to ensure memory safety; ensure"] - #[doc = r" no stolen instances are passed to such software."] - pub unsafe fn steal() -> Self { - Self { - _marker: PhantomData, - } - } -} -impl Deref for Can1 { - type Target = can0::RegisterBlock; - #[inline(always)] - fn deref(&self) -> &Self::Target { - unsafe { &*Self::PTR } - } -} +pub type Can1 = crate::Periph; impl core::fmt::Debug for Can1 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("Can1").finish() @@ -3077,44 +1299,7 @@ impl core::fmt::Debug for Can1 { #[doc = "CAN Peripheral"] pub use self::can0 as can1; #[doc = "Analog to Digital Converter Peripheral"] -pub struct Adc { - _marker: PhantomData<*const ()>, -} -unsafe impl Send for Adc {} -impl Adc { - #[doc = r"Pointer to the register block"] - pub const PTR: *const adc::RegisterBlock = 0x4002_2000 as *const _; - #[doc = r"Return the pointer to the register block"] - #[inline(always)] - pub const fn ptr() -> *const adc::RegisterBlock { - Self::PTR - } - #[doc = r" Steal an instance of this peripheral"] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] - #[doc = r" that may race with any existing instances, for example by only"] - #[doc = r" accessing read-only or write-only registers, or by consuming the"] - #[doc = r" original peripheral and using critical sections to coordinate"] - #[doc = r" access between multiple new instances."] - #[doc = r""] - #[doc = r" Additionally, other software such as HALs may rely on only one"] - #[doc = r" peripheral instance existing to ensure memory safety; ensure"] - #[doc = r" no stolen instances are passed to such software."] - pub unsafe fn steal() -> Self { - Self { - _marker: PhantomData, - } - } -} -impl Deref for Adc { - type Target = adc::RegisterBlock; - #[inline(always)] - fn deref(&self) -> &Self::Target { - unsafe { &*Self::PTR } - } -} +pub type Adc = crate::Periph; impl core::fmt::Debug for Adc { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("Adc").finish() @@ -3123,44 +1308,7 @@ impl core::fmt::Debug for Adc { #[doc = "Analog to Digital Converter Peripheral"] pub mod adc; #[doc = "Digital to Analog Converter Peripheral"] -pub struct Dac0 { - _marker: PhantomData<*const ()>, -} -unsafe impl Send for Dac0 {} -impl Dac0 { - #[doc = r"Pointer to the register block"] - pub const PTR: *const dac0::RegisterBlock = 0x4002_3000 as *const _; - #[doc = r"Return the pointer to the register block"] - #[inline(always)] - pub const fn ptr() -> *const dac0::RegisterBlock { - Self::PTR - } - #[doc = r" Steal an instance of this peripheral"] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] - #[doc = r" that may race with any existing instances, for example by only"] - #[doc = r" accessing read-only or write-only registers, or by consuming the"] - #[doc = r" original peripheral and using critical sections to coordinate"] - #[doc = r" access between multiple new instances."] - #[doc = r""] - #[doc = r" Additionally, other software such as HALs may rely on only one"] - #[doc = r" peripheral instance existing to ensure memory safety; ensure"] - #[doc = r" no stolen instances are passed to such software."] - pub unsafe fn steal() -> Self { - Self { - _marker: PhantomData, - } - } -} -impl Deref for Dac0 { - type Target = dac0::RegisterBlock; - #[inline(always)] - fn deref(&self) -> &Self::Target { - unsafe { &*Self::PTR } - } -} +pub type Dac0 = crate::Periph; impl core::fmt::Debug for Dac0 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("Dac0").finish() @@ -3169,44 +1317,7 @@ impl core::fmt::Debug for Dac0 { #[doc = "Digital to Analog Converter Peripheral"] pub mod dac0; #[doc = "Digital to Analog Converter Peripheral"] -pub struct Dac1 { - _marker: PhantomData<*const ()>, -} -unsafe impl Send for Dac1 {} -impl Dac1 { - #[doc = r"Pointer to the register block"] - pub const PTR: *const dac0::RegisterBlock = 0x4002_3800 as *const _; - #[doc = r"Return the pointer to the register block"] - #[inline(always)] - pub const fn ptr() -> *const dac0::RegisterBlock { - Self::PTR - } - #[doc = r" Steal an instance of this peripheral"] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] - #[doc = r" that may race with any existing instances, for example by only"] - #[doc = r" accessing read-only or write-only registers, or by consuming the"] - #[doc = r" original peripheral and using critical sections to coordinate"] - #[doc = r" access between multiple new instances."] - #[doc = r""] - #[doc = r" Additionally, other software such as HALs may rely on only one"] - #[doc = r" peripheral instance existing to ensure memory safety; ensure"] - #[doc = r" no stolen instances are passed to such software."] - pub unsafe fn steal() -> Self { - Self { - _marker: PhantomData, - } - } -} -impl Deref for Dac1 { - type Target = dac0::RegisterBlock; - #[inline(always)] - fn deref(&self) -> &Self::Target { - unsafe { &*Self::PTR } - } -} +pub type Dac1 = crate::Periph; impl core::fmt::Debug for Dac1 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("Dac1").finish() @@ -3215,44 +1326,7 @@ impl core::fmt::Debug for Dac1 { #[doc = "Digital to Analog Converter Peripheral"] pub use self::dac0 as dac1; #[doc = "SpaceWire Peripheral"] -pub struct Spw { - _marker: PhantomData<*const ()>, -} -unsafe impl Send for Spw {} -impl Spw { - #[doc = r"Pointer to the register block"] - pub const PTR: *const spw::RegisterBlock = 0x4000_3000 as *const _; - #[doc = r"Return the pointer to the register block"] - #[inline(always)] - pub const fn ptr() -> *const spw::RegisterBlock { - Self::PTR - } - #[doc = r" Steal an instance of this peripheral"] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] - #[doc = r" that may race with any existing instances, for example by only"] - #[doc = r" accessing read-only or write-only registers, or by consuming the"] - #[doc = r" original peripheral and using critical sections to coordinate"] - #[doc = r" access between multiple new instances."] - #[doc = r""] - #[doc = r" Additionally, other software such as HALs may rely on only one"] - #[doc = r" peripheral instance existing to ensure memory safety; ensure"] - #[doc = r" no stolen instances are passed to such software."] - pub unsafe fn steal() -> Self { - Self { - _marker: PhantomData, - } - } -} -impl Deref for Spw { - type Target = spw::RegisterBlock; - #[inline(always)] - fn deref(&self) -> &Self::Target { - unsafe { &*Self::PTR } - } -} +pub type Spw = crate::Periph; impl core::fmt::Debug for Spw { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("Spw").finish() @@ -3261,44 +1335,7 @@ impl core::fmt::Debug for Spw { #[doc = "SpaceWire Peripheral"] pub mod spw; #[doc = "Interrupt Router Peripheral"] -pub struct IrqRouter { - _marker: PhantomData<*const ()>, -} -unsafe impl Send for IrqRouter {} -impl IrqRouter { - #[doc = r"Pointer to the register block"] - pub const PTR: *const irq_router::RegisterBlock = 0x4000_2000 as *const _; - #[doc = r"Return the pointer to the register block"] - #[inline(always)] - pub const fn ptr() -> *const irq_router::RegisterBlock { - Self::PTR - } - #[doc = r" Steal an instance of this peripheral"] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] - #[doc = r" that may race with any existing instances, for example by only"] - #[doc = r" accessing read-only or write-only registers, or by consuming the"] - #[doc = r" original peripheral and using critical sections to coordinate"] - #[doc = r" access between multiple new instances."] - #[doc = r""] - #[doc = r" Additionally, other software such as HALs may rely on only one"] - #[doc = r" peripheral instance existing to ensure memory safety; ensure"] - #[doc = r" no stolen instances are passed to such software."] - pub unsafe fn steal() -> Self { - Self { - _marker: PhantomData, - } - } -} -impl Deref for IrqRouter { - type Target = irq_router::RegisterBlock; - #[inline(always)] - fn deref(&self) -> &Self::Target { - unsafe { &*Self::PTR } - } -} +pub type IrqRouter = crate::Periph; impl core::fmt::Debug for IrqRouter { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("IrqRouter").finish() @@ -3307,44 +1344,7 @@ impl core::fmt::Debug for IrqRouter { #[doc = "Interrupt Router Peripheral"] pub mod irq_router; #[doc = "Watchdog Block Peripheral"] -pub struct WatchDog { - _marker: PhantomData<*const ()>, -} -unsafe impl Send for WatchDog {} -impl WatchDog { - #[doc = r"Pointer to the register block"] - pub const PTR: *const watch_dog::RegisterBlock = 0x4002_1000 as *const _; - #[doc = r"Return the pointer to the register block"] - #[inline(always)] - pub const fn ptr() -> *const watch_dog::RegisterBlock { - Self::PTR - } - #[doc = r" Steal an instance of this peripheral"] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] - #[doc = r" that may race with any existing instances, for example by only"] - #[doc = r" accessing read-only or write-only registers, or by consuming the"] - #[doc = r" original peripheral and using critical sections to coordinate"] - #[doc = r" access between multiple new instances."] - #[doc = r""] - #[doc = r" Additionally, other software such as HALs may rely on only one"] - #[doc = r" peripheral instance existing to ensure memory safety; ensure"] - #[doc = r" no stolen instances are passed to such software."] - pub unsafe fn steal() -> Self { - Self { - _marker: PhantomData, - } - } -} -impl Deref for WatchDog { - type Target = watch_dog::RegisterBlock; - #[inline(always)] - fn deref(&self) -> &Self::Target { - unsafe { &*Self::PTR } - } -} +pub type WatchDog = crate::Periph; impl core::fmt::Debug for WatchDog { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("WatchDog").finish() @@ -3353,44 +1353,7 @@ impl core::fmt::Debug for WatchDog { #[doc = "Watchdog Block Peripheral"] pub mod watch_dog; #[doc = "True Random Number Generator"] -pub struct Trng { - _marker: PhantomData<*const ()>, -} -unsafe impl Send for Trng {} -impl Trng { - #[doc = r"Pointer to the register block"] - pub const PTR: *const trng::RegisterBlock = 0x4002_7000 as *const _; - #[doc = r"Return the pointer to the register block"] - #[inline(always)] - pub const fn ptr() -> *const trng::RegisterBlock { - Self::PTR - } - #[doc = r" Steal an instance of this peripheral"] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] - #[doc = r" that may race with any existing instances, for example by only"] - #[doc = r" accessing read-only or write-only registers, or by consuming the"] - #[doc = r" original peripheral and using critical sections to coordinate"] - #[doc = r" access between multiple new instances."] - #[doc = r""] - #[doc = r" Additionally, other software such as HALs may rely on only one"] - #[doc = r" peripheral instance existing to ensure memory safety; ensure"] - #[doc = r" no stolen instances are passed to such software."] - pub unsafe fn steal() -> Self { - Self { - _marker: PhantomData, - } - } -} -impl Deref for Trng { - type Target = trng::RegisterBlock; - #[inline(always)] - fn deref(&self) -> &Self::Target { - unsafe { &*Self::PTR } - } -} +pub type Trng = crate::Periph; impl core::fmt::Debug for Trng { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("Trng").finish() @@ -3399,44 +1362,7 @@ impl core::fmt::Debug for Trng { #[doc = "True Random Number Generator"] pub mod trng; #[doc = "Ethernet Block"] -pub struct Eth { - _marker: PhantomData<*const ()>, -} -unsafe impl Send for Eth {} -impl Eth { - #[doc = r"Pointer to the register block"] - pub const PTR: *const eth::RegisterBlock = 0x4000_4000 as *const _; - #[doc = r"Return the pointer to the register block"] - #[inline(always)] - pub const fn ptr() -> *const eth::RegisterBlock { - Self::PTR - } - #[doc = r" Steal an instance of this peripheral"] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] - #[doc = r" that may race with any existing instances, for example by only"] - #[doc = r" accessing read-only or write-only registers, or by consuming the"] - #[doc = r" original peripheral and using critical sections to coordinate"] - #[doc = r" access between multiple new instances."] - #[doc = r""] - #[doc = r" Additionally, other software such as HALs may rely on only one"] - #[doc = r" peripheral instance existing to ensure memory safety; ensure"] - #[doc = r" no stolen instances are passed to such software."] - pub unsafe fn steal() -> Self { - Self { - _marker: PhantomData, - } - } -} -impl Deref for Eth { - type Target = eth::RegisterBlock; - #[inline(always)] - fn deref(&self) -> &Self::Target { - unsafe { &*Self::PTR } - } -} +pub type Eth = crate::Periph; impl core::fmt::Debug for Eth { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("Eth").finish() diff --git a/va416xx/src/porta.rs b/va416xx/src/porta.rs index 7b239c2..88def19 100644 --- a/va416xx/src/porta.rs +++ b/va416xx/src/porta.rs @@ -45,7 +45,7 @@ impl RegisterBlock { } #[doc = "0x04 - Data In Raw Register by Byte"] #[inline(always)] - pub const fn datainrawbyte0(&self, n: usize) -> &Datainrawbyte { + pub const fn datainrawbyte(&self, n: usize) -> &Datainrawbyte { #[allow(clippy::no_effect)] [(); 4][n]; unsafe { &*core::ptr::from_ref(self).cast::().add(4).add(n).cast() } @@ -53,7 +53,7 @@ impl RegisterBlock { #[doc = "Iterator for array of:"] #[doc = "0x04 - Data In Raw Register by Byte"] #[inline(always)] - pub fn datainrawbyte0_iter(&self) -> impl Iterator { + pub fn datainrawbyte_iter(&self) -> impl Iterator { (0..4) .map(move |n| unsafe { &*core::ptr::from_ref(self).cast::().add(4).add(n).cast() }) } @@ -83,7 +83,7 @@ impl RegisterBlock { } #[doc = "0x0c - Data Out Register by Byte"] #[inline(always)] - pub const fn dataoutrawbyte0(&self, n: usize) -> &Dataoutrawbyte { + pub const fn dataoutrawbyte(&self, n: usize) -> &Dataoutrawbyte { #[allow(clippy::no_effect)] [(); 4][n]; unsafe { &*core::ptr::from_ref(self).cast::().add(12).add(n).cast() } @@ -91,7 +91,7 @@ impl RegisterBlock { #[doc = "Iterator for array of:"] #[doc = "0x0c - Data Out Register by Byte"] #[inline(always)] - pub fn dataoutrawbyte0_iter(&self) -> impl Iterator { + pub fn dataoutrawbyte_iter(&self) -> impl Iterator { (0..4) .map(move |n| unsafe { &*core::ptr::from_ref(self).cast::().add(12).add(n).cast() }) } @@ -102,7 +102,7 @@ impl RegisterBlock { } #[doc = "0x10 - Set Out Register by Byte"] #[inline(always)] - pub const fn setoutbyte0(&self, n: usize) -> &Setoutbyte { + pub const fn setoutbyte(&self, n: usize) -> &Setoutbyte { #[allow(clippy::no_effect)] [(); 4][n]; unsafe { &*core::ptr::from_ref(self).cast::().add(16).add(n).cast() } @@ -110,7 +110,7 @@ impl RegisterBlock { #[doc = "Iterator for array of:"] #[doc = "0x10 - Set Out Register by Byte"] #[inline(always)] - pub fn setoutbyte0_iter(&self) -> impl Iterator { + pub fn setoutbyte_iter(&self) -> impl Iterator { (0..4) .map(move |n| unsafe { &*core::ptr::from_ref(self).cast::().add(16).add(n).cast() }) } @@ -121,7 +121,7 @@ impl RegisterBlock { } #[doc = "0x14 - Clear Out Register by Byte"] #[inline(always)] - pub const fn clroutbyte0(&self, n: usize) -> &Clroutbyte { + pub const fn clroutbyte(&self, n: usize) -> &Clroutbyte { #[allow(clippy::no_effect)] [(); 4][n]; unsafe { &*core::ptr::from_ref(self).cast::().add(20).add(n).cast() } @@ -129,7 +129,7 @@ impl RegisterBlock { #[doc = "Iterator for array of:"] #[doc = "0x14 - Clear Out Register by Byte"] #[inline(always)] - pub fn clroutbyte0_iter(&self) -> impl Iterator { + pub fn clroutbyte_iter(&self) -> impl Iterator { (0..4) .map(move |n| unsafe { &*core::ptr::from_ref(self).cast::().add(20).add(n).cast() }) } @@ -140,7 +140,7 @@ impl RegisterBlock { } #[doc = "0x18 - Toggle Out Register by Byte"] #[inline(always)] - pub const fn togoutbyte0(&self, n: usize) -> &Togoutbyte { + pub const fn togoutbyte(&self, n: usize) -> &Togoutbyte { #[allow(clippy::no_effect)] [(); 4][n]; unsafe { &*core::ptr::from_ref(self).cast::().add(24).add(n).cast() } @@ -148,7 +148,7 @@ impl RegisterBlock { #[doc = "Iterator for array of:"] #[doc = "0x18 - Toggle Out Register by Byte"] #[inline(always)] - pub fn togoutbyte0_iter(&self) -> impl Iterator { + pub fn togoutbyte_iter(&self) -> impl Iterator { (0..4) .map(move |n| unsafe { &*core::ptr::from_ref(self).cast::().add(24).add(n).cast() }) } @@ -178,7 +178,7 @@ impl RegisterBlock { } #[doc = "0x20 - Direction Register by Byte"] #[inline(always)] - pub const fn dirbyte0(&self, n: usize) -> &Dirbyte { + pub const fn dirbyte(&self, n: usize) -> &Dirbyte { #[allow(clippy::no_effect)] [(); 4][n]; unsafe { &*core::ptr::from_ref(self).cast::().add(32).add(n).cast() } @@ -186,7 +186,7 @@ impl RegisterBlock { #[doc = "Iterator for array of:"] #[doc = "0x20 - Direction Register by Byte"] #[inline(always)] - pub fn dirbyte0_iter(&self) -> impl Iterator { + pub fn dirbyte_iter(&self) -> impl Iterator { (0..4) .map(move |n| unsafe { &*core::ptr::from_ref(self).cast::().add(32).add(n).cast() }) } @@ -197,7 +197,7 @@ impl RegisterBlock { } #[doc = "0x24 - Pulse Mode Register by Byte"] #[inline(always)] - pub const fn pulsebyte0(&self, n: usize) -> &Pulsebyte { + pub const fn pulsebyte(&self, n: usize) -> &Pulsebyte { #[allow(clippy::no_effect)] [(); 4][n]; unsafe { &*core::ptr::from_ref(self).cast::().add(36).add(n).cast() } @@ -205,7 +205,7 @@ impl RegisterBlock { #[doc = "Iterator for array of:"] #[doc = "0x24 - Pulse Mode Register by Byte"] #[inline(always)] - pub fn pulsebyte0_iter(&self) -> impl Iterator { + pub fn pulsebyte_iter(&self) -> impl Iterator { (0..4) .map(move |n| unsafe { &*core::ptr::from_ref(self).cast::().add(36).add(n).cast() }) } @@ -216,7 +216,7 @@ impl RegisterBlock { } #[doc = "0x28 - Pulse Base Mode Register by Byte"] #[inline(always)] - pub const fn pulsebasebyte0(&self, n: usize) -> &Pulsebasebyte { + pub const fn pulsebasebyte(&self, n: usize) -> &Pulsebasebyte { #[allow(clippy::no_effect)] [(); 4][n]; unsafe { &*core::ptr::from_ref(self).cast::().add(40).add(n).cast() } @@ -224,7 +224,7 @@ impl RegisterBlock { #[doc = "Iterator for array of:"] #[doc = "0x28 - Pulse Base Mode Register by Byte"] #[inline(always)] - pub fn pulsebasebyte0_iter(&self) -> impl Iterator { + pub fn pulsebasebyte_iter(&self) -> impl Iterator { (0..4) .map(move |n| unsafe { &*core::ptr::from_ref(self).cast::().add(40).add(n).cast() }) } @@ -235,7 +235,7 @@ impl RegisterBlock { } #[doc = "0x2c - Delay1 Register by Byte"] #[inline(always)] - pub const fn delay1byte0(&self, n: usize) -> &Delay1byte { + pub const fn delay1byte(&self, n: usize) -> &Delay1byte { #[allow(clippy::no_effect)] [(); 4][n]; unsafe { &*core::ptr::from_ref(self).cast::().add(44).add(n).cast() } @@ -243,7 +243,7 @@ impl RegisterBlock { #[doc = "Iterator for array of:"] #[doc = "0x2c - Delay1 Register by Byte"] #[inline(always)] - pub fn delay1byte0_iter(&self) -> impl Iterator { + pub fn delay1byte_iter(&self) -> impl Iterator { (0..4) .map(move |n| unsafe { &*core::ptr::from_ref(self).cast::().add(44).add(n).cast() }) } @@ -254,7 +254,7 @@ impl RegisterBlock { } #[doc = "0x30 - Delay2 Register by Byte"] #[inline(always)] - pub const fn delay2byte0(&self, n: usize) -> &Delay2byte { + pub const fn delay2byte(&self, n: usize) -> &Delay2byte { #[allow(clippy::no_effect)] [(); 4][n]; unsafe { &*core::ptr::from_ref(self).cast::().add(48).add(n).cast() } @@ -262,7 +262,7 @@ impl RegisterBlock { #[doc = "Iterator for array of:"] #[doc = "0x30 - Delay2 Register by Byte"] #[inline(always)] - pub fn delay2byte0_iter(&self) -> impl Iterator { + pub fn delay2byte_iter(&self) -> impl Iterator { (0..4) .map(move |n| unsafe { &*core::ptr::from_ref(self).cast::().add(48).add(n).cast() }) } @@ -312,14 +312,12 @@ impl RegisterBlock { &self.perid } } -#[doc = "DATAIN (r) register accessor: Data In Register\n\nYou can [`read`](crate::Reg::read) this register and get [`datain::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@datain`] -module"] +#[doc = "DATAIN (r) register accessor: Data In Register\n\nYou can [`read`](crate::Reg::read) this register and get [`datain::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@datain`] module"] #[doc(alias = "DATAIN")] pub type Datain = crate::Reg; #[doc = "Data In Register"] pub mod datain; -#[doc = "DATAINBYTE (r) register accessor: Data In Register by Byte\n\nYou can [`read`](crate::Reg::read) this register and get [`datainbyte::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@datainbyte`] -module"] +#[doc = "DATAINBYTE (r) register accessor: Data In Register by Byte\n\nYou can [`read`](crate::Reg::read) this register and get [`datainbyte::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@datainbyte`] module"] #[doc(alias = "DATAINBYTE")] pub type Datainbyte = crate::Reg; #[doc = "Data In Register by Byte"] @@ -328,14 +326,12 @@ pub use datain as datainraw; pub use datainbyte as datainrawbyte; pub use Datain as Datainraw; pub use Datainbyte as Datainrawbyte; -#[doc = "DATAOUT (w) register accessor: Data Out Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dataout::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dataout`] -module"] +#[doc = "DATAOUT (w) register accessor: Data Out Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dataout::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dataout`] module"] #[doc(alias = "DATAOUT")] pub type Dataout = crate::Reg; #[doc = "Data Out Register"] pub mod dataout; -#[doc = "DATAOUTBYTE (w) register accessor: Data Out Register by Byte\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dataoutbyte::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dataoutbyte`] -module"] +#[doc = "DATAOUTBYTE (w) register accessor: Data Out Register by Byte\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dataoutbyte::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dataoutbyte`] module"] #[doc(alias = "DATAOUTBYTE")] pub type Dataoutbyte = crate::Reg; #[doc = "Data Out Register by Byte"] @@ -356,14 +352,12 @@ pub use Dataoutbyte as Dataoutrawbyte; pub use Dataoutbyte as Setoutbyte; pub use Dataoutbyte as Clroutbyte; pub use Dataoutbyte as Togoutbyte; -#[doc = "DATAMASK (rw) register accessor: Data mask Register\n\nYou can [`read`](crate::Reg::read) this register and get [`datamask::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`datamask::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@datamask`] -module"] +#[doc = "DATAMASK (rw) register accessor: Data mask Register\n\nYou can [`read`](crate::Reg::read) this register and get [`datamask::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`datamask::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@datamask`] module"] #[doc(alias = "DATAMASK")] pub type Datamask = crate::Reg; #[doc = "Data mask Register"] pub mod datamask; -#[doc = "DATAMASKBYTE (rw) register accessor: Data Out Register by Byte\n\nYou can [`read`](crate::Reg::read) this register and get [`datamaskbyte::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`datamaskbyte::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@datamaskbyte`] -module"] +#[doc = "DATAMASKBYTE (rw) register accessor: Data Out Register by Byte\n\nYou can [`read`](crate::Reg::read) this register and get [`datamaskbyte::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`datamaskbyte::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@datamaskbyte`] module"] #[doc(alias = "DATAMASKBYTE")] pub type Datamaskbyte = crate::Reg; #[doc = "Data Out Register by Byte"] @@ -388,50 +382,42 @@ pub use Datamaskbyte as Pulsebyte; pub use Datamaskbyte as Pulsebasebyte; pub use Datamaskbyte as Delay1byte; pub use Datamaskbyte as Delay2byte; -#[doc = "IRQ_SEN (rw) register accessor: Interrupt Sense Register (1:Level Sensitive, 0:Edge Sensitive)\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_sen::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`irq_sen::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_sen`] -module"] +#[doc = "IRQ_SEN (rw) register accessor: Interrupt Sense Register (1:Level Sensitive, 0:Edge Sensitive)\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_sen::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`irq_sen::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_sen`] module"] #[doc(alias = "IRQ_SEN")] pub type IrqSen = crate::Reg; #[doc = "Interrupt Sense Register (1:Level Sensitive, 0:Edge Sensitive)"] pub mod irq_sen; -#[doc = "IRQ_EDGE (rw) register accessor: Interrupt Both Edge Register (1:Both Edges, 0:Single Edge)\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_edge::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`irq_edge::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_edge`] -module"] +#[doc = "IRQ_EDGE (rw) register accessor: Interrupt Both Edge Register (1:Both Edges, 0:Single Edge)\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_edge::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`irq_edge::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_edge`] module"] #[doc(alias = "IRQ_EDGE")] pub type IrqEdge = crate::Reg; #[doc = "Interrupt Both Edge Register (1:Both Edges, 0:Single Edge)"] pub mod irq_edge; -#[doc = "IRQ_EVT (rw) register accessor: Interrupt Event Register (1:HighLevel/L->H Edge, 0:LowLevel/H->L Edge)\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_evt::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`irq_evt::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_evt`] -module"] +#[doc = "IRQ_EVT (rw) register accessor: Interrupt Event Register (1:HighLevel/L->H Edge, 0:LowLevel/H->L Edge)\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_evt::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`irq_evt::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_evt`] module"] #[doc(alias = "IRQ_EVT")] pub type IrqEvt = crate::Reg; #[doc = "Interrupt Event Register (1:HighLevel/L->H Edge, 0:LowLevel/H->L Edge)"] pub mod irq_evt; -#[doc = "IRQ_ENB (rw) register accessor: Interrupt Enable Register\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_enb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`irq_enb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_enb`] -module"] +#[doc = "IRQ_ENB (rw) register accessor: Interrupt Enable Register\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_enb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`irq_enb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_enb`] module"] #[doc(alias = "IRQ_ENB")] pub type IrqEnb = crate::Reg; #[doc = "Interrupt Enable Register"] pub mod irq_enb; -#[doc = "IRQ_RAW (r) register accessor: Raw Interrupt Status\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_raw::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_raw`] -module"] +#[doc = "IRQ_RAW (r) register accessor: Raw Interrupt Status\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_raw::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_raw`] module"] #[doc(alias = "IRQ_RAW")] pub type IrqRaw = crate::Reg; #[doc = "Raw Interrupt Status"] pub mod irq_raw; -#[doc = "IRQ_END (r) register accessor: Masked Interrupt Status\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_end::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_end`] -module"] +#[doc = "IRQ_END (r) register accessor: Masked Interrupt Status\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_end::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_end`] module"] #[doc(alias = "IRQ_END")] pub type IrqEnd = crate::Reg; #[doc = "Masked Interrupt Status"] pub mod irq_end; -#[doc = "EDGE_STATUS (rw) register accessor: Edge Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`edge_status::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`edge_status::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@edge_status`] -module"] +#[doc = "EDGE_STATUS (rw) register accessor: Edge Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`edge_status::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`edge_status::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@edge_status`] module"] #[doc(alias = "EDGE_STATUS")] pub type EdgeStatus = crate::Reg; #[doc = "Edge Status Register"] pub mod edge_status; -#[doc = "PERID (r) register accessor: Peripheral ID Register\n\nYou can [`read`](crate::Reg::read) this register and get [`perid::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@perid`] -module"] +#[doc = "PERID (r) register accessor: Peripheral ID Register\n\nYou can [`read`](crate::Reg::read) this register and get [`perid::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@perid`] module"] #[doc(alias = "PERID")] pub type Perid = crate::Reg; #[doc = "Peripheral ID Register"] diff --git a/va416xx/src/porta/datain.rs b/va416xx/src/porta/datain.rs index 1038a45..713b210 100644 --- a/va416xx/src/porta/datain.rs +++ b/va416xx/src/porta/datain.rs @@ -14,6 +14,4 @@ impl crate::RegisterSpec for DatainSpec { #[doc = "`read()` method returns [`datain::R`](R) reader structure"] impl crate::Readable for DatainSpec {} #[doc = "`reset()` method sets DATAIN to value 0"] -impl crate::Resettable for DatainSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for DatainSpec {} diff --git a/va416xx/src/porta/datainbyte.rs b/va416xx/src/porta/datainbyte.rs index 1fd62e9..2b15efa 100644 --- a/va416xx/src/porta/datainbyte.rs +++ b/va416xx/src/porta/datainbyte.rs @@ -13,8 +13,5 @@ impl crate::RegisterSpec for DatainbyteSpec { } #[doc = "`read()` method returns [`datainbyte::R`](R) reader structure"] impl crate::Readable for DatainbyteSpec {} -#[doc = "`reset()` method sets DATAINBYTE[%s] -to value 0"] -impl crate::Resettable for DatainbyteSpec { - const RESET_VALUE: u8 = 0; -} +#[doc = "`reset()` method sets DATAINBYTE[%s] to value 0"] +impl crate::Resettable for DatainbyteSpec {} diff --git a/va416xx/src/porta/datamask.rs b/va416xx/src/porta/datamask.rs index 50c9bde..e9f72a7 100644 --- a/va416xx/src/porta/datamask.rs +++ b/va416xx/src/porta/datamask.rs @@ -19,10 +19,6 @@ impl crate::Readable for DatamaskSpec {} #[doc = "`write(|w| ..)` method takes [`datamask::W`](W) writer structure"] impl crate::Writable for DatamaskSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATAMASK to value 0"] -impl crate::Resettable for DatamaskSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for DatamaskSpec {} diff --git a/va416xx/src/porta/datamaskbyte.rs b/va416xx/src/porta/datamaskbyte.rs index 5705734..e7a812a 100644 --- a/va416xx/src/porta/datamaskbyte.rs +++ b/va416xx/src/porta/datamaskbyte.rs @@ -19,11 +19,6 @@ impl crate::Readable for DatamaskbyteSpec {} #[doc = "`write(|w| ..)` method takes [`datamaskbyte::W`](W) writer structure"] impl crate::Writable for DatamaskbyteSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u8 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u8 = 0; -} -#[doc = "`reset()` method sets DATAMASKBYTE[%s] -to value 0"] -impl crate::Resettable for DatamaskbyteSpec { - const RESET_VALUE: u8 = 0; } +#[doc = "`reset()` method sets DATAMASKBYTE[%s] to value 0"] +impl crate::Resettable for DatamaskbyteSpec {} diff --git a/va416xx/src/porta/dataout.rs b/va416xx/src/porta/dataout.rs index 3ced437..59207cb 100644 --- a/va416xx/src/porta/dataout.rs +++ b/va416xx/src/porta/dataout.rs @@ -15,10 +15,6 @@ impl crate::RegisterSpec for DataoutSpec { #[doc = "`write(|w| ..)` method takes [`dataout::W`](W) writer structure"] impl crate::Writable for DataoutSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATAOUT to value 0"] -impl crate::Resettable for DataoutSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for DataoutSpec {} diff --git a/va416xx/src/porta/dataoutbyte.rs b/va416xx/src/porta/dataoutbyte.rs index a125cd7..3261f34 100644 --- a/va416xx/src/porta/dataoutbyte.rs +++ b/va416xx/src/porta/dataoutbyte.rs @@ -15,11 +15,6 @@ impl crate::RegisterSpec for DataoutbyteSpec { #[doc = "`write(|w| ..)` method takes [`dataoutbyte::W`](W) writer structure"] impl crate::Writable for DataoutbyteSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u8 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u8 = 0; -} -#[doc = "`reset()` method sets DATAOUTBYTE[%s] -to value 0"] -impl crate::Resettable for DataoutbyteSpec { - const RESET_VALUE: u8 = 0; } +#[doc = "`reset()` method sets DATAOUTBYTE[%s] to value 0"] +impl crate::Resettable for DataoutbyteSpec {} diff --git a/va416xx/src/porta/edge_status.rs b/va416xx/src/porta/edge_status.rs index 16b3b53..da93837 100644 --- a/va416xx/src/porta/edge_status.rs +++ b/va416xx/src/porta/edge_status.rs @@ -19,10 +19,6 @@ impl crate::Readable for EdgeStatusSpec {} #[doc = "`write(|w| ..)` method takes [`edge_status::W`](W) writer structure"] impl crate::Writable for EdgeStatusSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EDGE_STATUS to value 0"] -impl crate::Resettable for EdgeStatusSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for EdgeStatusSpec {} diff --git a/va416xx/src/porta/irq_edge.rs b/va416xx/src/porta/irq_edge.rs index 010e596..130ee47 100644 --- a/va416xx/src/porta/irq_edge.rs +++ b/va416xx/src/porta/irq_edge.rs @@ -19,10 +19,6 @@ impl crate::Readable for IrqEdgeSpec {} #[doc = "`write(|w| ..)` method takes [`irq_edge::W`](W) writer structure"] impl crate::Writable for IrqEdgeSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IRQ_EDGE to value 0"] -impl crate::Resettable for IrqEdgeSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for IrqEdgeSpec {} diff --git a/va416xx/src/porta/irq_enb.rs b/va416xx/src/porta/irq_enb.rs index 6a308e3..64d6f21 100644 --- a/va416xx/src/porta/irq_enb.rs +++ b/va416xx/src/porta/irq_enb.rs @@ -19,10 +19,6 @@ impl crate::Readable for IrqEnbSpec {} #[doc = "`write(|w| ..)` method takes [`irq_enb::W`](W) writer structure"] impl crate::Writable for IrqEnbSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IRQ_ENB to value 0"] -impl crate::Resettable for IrqEnbSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for IrqEnbSpec {} diff --git a/va416xx/src/porta/irq_end.rs b/va416xx/src/porta/irq_end.rs index 5701cd8..f051d70 100644 --- a/va416xx/src/porta/irq_end.rs +++ b/va416xx/src/porta/irq_end.rs @@ -14,6 +14,4 @@ impl crate::RegisterSpec for IrqEndSpec { #[doc = "`read()` method returns [`irq_end::R`](R) reader structure"] impl crate::Readable for IrqEndSpec {} #[doc = "`reset()` method sets IRQ_END to value 0"] -impl crate::Resettable for IrqEndSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for IrqEndSpec {} diff --git a/va416xx/src/porta/irq_evt.rs b/va416xx/src/porta/irq_evt.rs index 1b727da..075b780 100644 --- a/va416xx/src/porta/irq_evt.rs +++ b/va416xx/src/porta/irq_evt.rs @@ -19,10 +19,6 @@ impl crate::Readable for IrqEvtSpec {} #[doc = "`write(|w| ..)` method takes [`irq_evt::W`](W) writer structure"] impl crate::Writable for IrqEvtSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IRQ_EVT to value 0"] -impl crate::Resettable for IrqEvtSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for IrqEvtSpec {} diff --git a/va416xx/src/porta/irq_raw.rs b/va416xx/src/porta/irq_raw.rs index 95d08c5..5278bfb 100644 --- a/va416xx/src/porta/irq_raw.rs +++ b/va416xx/src/porta/irq_raw.rs @@ -14,6 +14,4 @@ impl crate::RegisterSpec for IrqRawSpec { #[doc = "`read()` method returns [`irq_raw::R`](R) reader structure"] impl crate::Readable for IrqRawSpec {} #[doc = "`reset()` method sets IRQ_RAW to value 0"] -impl crate::Resettable for IrqRawSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for IrqRawSpec {} diff --git a/va416xx/src/porta/irq_sen.rs b/va416xx/src/porta/irq_sen.rs index 05a689a..0f75eb6 100644 --- a/va416xx/src/porta/irq_sen.rs +++ b/va416xx/src/porta/irq_sen.rs @@ -19,10 +19,6 @@ impl crate::Readable for IrqSenSpec {} #[doc = "`write(|w| ..)` method takes [`irq_sen::W`](W) writer structure"] impl crate::Writable for IrqSenSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IRQ_SEN to value 0"] -impl crate::Resettable for IrqSenSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for IrqSenSpec {} diff --git a/va416xx/src/spi0.rs b/va416xx/src/spi0.rs index 5cb5dde..21f969b 100644 --- a/va416xx/src/spi0.rs +++ b/va416xx/src/spi0.rs @@ -89,38 +89,32 @@ impl RegisterBlock { &self.perid } } -#[doc = "CTRL0 (rw) register accessor: Control Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl0`] -module"] +#[doc = "CTRL0 (rw) register accessor: Control Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl0`] module"] #[doc(alias = "CTRL0")] pub type Ctrl0 = crate::Reg; #[doc = "Control Register 0"] pub mod ctrl0; -#[doc = "CTRL1 (rw) register accessor: Control Register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl1`] -module"] +#[doc = "CTRL1 (rw) register accessor: Control Register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl1`] module"] #[doc(alias = "CTRL1")] pub type Ctrl1 = crate::Reg; #[doc = "Control Register 1"] pub mod ctrl1; -#[doc = "DATA (rw) register accessor: Data Input/Output\n\nYou can [`read`](crate::Reg::read) this register and get [`data::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data`] -module"] +#[doc = "DATA (rw) register accessor: Data Input/Output\n\nYou can [`read`](crate::Reg::read) this register and get [`data::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data`] module"] #[doc(alias = "DATA")] pub type Data = crate::Reg; #[doc = "Data Input/Output"] pub mod data; -#[doc = "STATUS (r) register accessor: Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] -module"] +#[doc = "STATUS (r) register accessor: Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] module"] #[doc(alias = "STATUS")] pub type Status = crate::Reg; #[doc = "Status Register"] pub mod status; -#[doc = "CLKPRESCALE (rw) register accessor: Clock Pre Scale divide value\n\nYou can [`read`](crate::Reg::read) this register and get [`clkprescale::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkprescale::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkprescale`] -module"] +#[doc = "CLKPRESCALE (rw) register accessor: Clock Pre Scale divide value\n\nYou can [`read`](crate::Reg::read) this register and get [`clkprescale::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkprescale::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkprescale`] module"] #[doc(alias = "CLKPRESCALE")] pub type Clkprescale = crate::Reg; #[doc = "Clock Pre Scale divide value"] pub mod clkprescale; -#[doc = "IRQ_ENB (rw) register accessor: Interrupt Enable Register\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_enb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`irq_enb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_enb`] -module"] +#[doc = "IRQ_ENB (rw) register accessor: Interrupt Enable Register\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_enb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`irq_enb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_enb`] module"] #[doc(alias = "IRQ_ENB")] pub type IrqEnb = crate::Reg; #[doc = "Interrupt Enable Register"] @@ -131,32 +125,27 @@ pub use irq_enb as irq_clr; pub use IrqEnb as IrqRaw; pub use IrqEnb as IrqEnd; pub use IrqEnb as IrqClr; -#[doc = "RXFIFOIRQTRG (rw) register accessor: Rx FIFO IRQ Trigger Level\n\nYou can [`read`](crate::Reg::read) this register and get [`rxfifoirqtrg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rxfifoirqtrg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxfifoirqtrg`] -module"] +#[doc = "RXFIFOIRQTRG (rw) register accessor: Rx FIFO IRQ Trigger Level\n\nYou can [`read`](crate::Reg::read) this register and get [`rxfifoirqtrg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rxfifoirqtrg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxfifoirqtrg`] module"] #[doc(alias = "RXFIFOIRQTRG")] pub type Rxfifoirqtrg = crate::Reg; #[doc = "Rx FIFO IRQ Trigger Level"] pub mod rxfifoirqtrg; -#[doc = "TXFIFOIRQTRG (rw) register accessor: Tx FIFO IRQ Trigger Level\n\nYou can [`read`](crate::Reg::read) this register and get [`txfifoirqtrg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`txfifoirqtrg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txfifoirqtrg`] -module"] +#[doc = "TXFIFOIRQTRG (rw) register accessor: Tx FIFO IRQ Trigger Level\n\nYou can [`read`](crate::Reg::read) this register and get [`txfifoirqtrg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`txfifoirqtrg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txfifoirqtrg`] module"] #[doc(alias = "TXFIFOIRQTRG")] pub type Txfifoirqtrg = crate::Reg; #[doc = "Tx FIFO IRQ Trigger Level"] pub mod txfifoirqtrg; -#[doc = "FIFO_CLR (w) register accessor: Clear FIFO Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fifo_clr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fifo_clr`] -module"] +#[doc = "FIFO_CLR (w) register accessor: Clear FIFO Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fifo_clr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fifo_clr`] module"] #[doc(alias = "FIFO_CLR")] pub type FifoClr = crate::Reg; #[doc = "Clear FIFO Register"] pub mod fifo_clr; -#[doc = "STATE (r) register accessor: Internal STATE of SPI Controller\n\nYou can [`read`](crate::Reg::read) this register and get [`state::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@state`] -module"] +#[doc = "STATE (r) register accessor: Internal STATE of SPI Controller\n\nYou can [`read`](crate::Reg::read) this register and get [`state::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@state`] module"] #[doc(alias = "STATE")] pub type State = crate::Reg; #[doc = "Internal STATE of SPI Controller"] pub mod state; -#[doc = "PERID (r) register accessor: Peripheral ID Register\n\nYou can [`read`](crate::Reg::read) this register and get [`perid::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@perid`] -module"] +#[doc = "PERID (r) register accessor: Peripheral ID Register\n\nYou can [`read`](crate::Reg::read) this register and get [`perid::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@perid`] module"] #[doc(alias = "PERID")] pub type Perid = crate::Reg; #[doc = "Peripheral ID Register"] diff --git a/va416xx/src/spi0/clkprescale.rs b/va416xx/src/spi0/clkprescale.rs index 3c7a5ad..f202eb8 100644 --- a/va416xx/src/spi0/clkprescale.rs +++ b/va416xx/src/spi0/clkprescale.rs @@ -19,10 +19,6 @@ impl crate::Readable for ClkprescaleSpec {} #[doc = "`write(|w| ..)` method takes [`clkprescale::W`](W) writer structure"] impl crate::Writable for ClkprescaleSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CLKPRESCALE to value 0"] -impl crate::Resettable for ClkprescaleSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for ClkprescaleSpec {} diff --git a/va416xx/src/spi0/ctrl0.rs b/va416xx/src/spi0/ctrl0.rs index a596dfe..29abe30 100644 --- a/va416xx/src/spi0/ctrl0.rs +++ b/va416xx/src/spi0/ctrl0.rs @@ -43,22 +43,22 @@ impl R { impl W { #[doc = "Bits 0:3 - Data Size(0x3=>4, 0xf=>16)"] #[inline(always)] - pub fn size(&mut self) -> SizeW { + pub fn size(&mut self) -> SizeW<'_, Ctrl0Spec> { SizeW::new(self, 0) } #[doc = "Bit 6 - SPI Clock Polarity"] #[inline(always)] - pub fn spo(&mut self) -> SpoW { + pub fn spo(&mut self) -> SpoW<'_, Ctrl0Spec> { SpoW::new(self, 6) } #[doc = "Bit 7 - SPI Clock Phase"] #[inline(always)] - pub fn sph(&mut self) -> SphW { + pub fn sph(&mut self) -> SphW<'_, Ctrl0Spec> { SphW::new(self, 7) } #[doc = "Bits 8:15 - Serial Clock Rate divide+1 value"] #[inline(always)] - pub fn scrdv(&mut self) -> ScrdvW { + pub fn scrdv(&mut self) -> ScrdvW<'_, Ctrl0Spec> { ScrdvW::new(self, 8) } } @@ -72,10 +72,6 @@ impl crate::Readable for Ctrl0Spec {} #[doc = "`write(|w| ..)` method takes [`ctrl0::W`](W) writer structure"] impl crate::Writable for Ctrl0Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTRL0 to value 0"] -impl crate::Resettable for Ctrl0Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Ctrl0Spec {} diff --git a/va416xx/src/spi0/ctrl1.rs b/va416xx/src/spi0/ctrl1.rs index 461ed99..2c756fa 100644 --- a/va416xx/src/spi0/ctrl1.rs +++ b/va416xx/src/spi0/ctrl1.rs @@ -97,52 +97,52 @@ impl R { impl W { #[doc = "Bit 0 - Loop Back"] #[inline(always)] - pub fn lbm(&mut self) -> LbmW { + pub fn lbm(&mut self) -> LbmW<'_, Ctrl1Spec> { LbmW::new(self, 0) } #[doc = "Bit 1 - Enable"] #[inline(always)] - pub fn enable(&mut self) -> EnableW { + pub fn enable(&mut self) -> EnableW<'_, Ctrl1Spec> { EnableW::new(self, 1) } #[doc = "Bit 2 - Master/Slave (0:Master, 1:Slave)"] #[inline(always)] - pub fn ms(&mut self) -> MsW { + pub fn ms(&mut self) -> MsW<'_, Ctrl1Spec> { MsW::new(self, 2) } #[doc = "Bit 3 - Slave output Disable"] #[inline(always)] - pub fn sod(&mut self) -> SodW { + pub fn sod(&mut self) -> SodW<'_, Ctrl1Spec> { SodW::new(self, 3) } #[doc = "Bits 4:6 - Slave Select"] #[inline(always)] - pub fn ss(&mut self) -> SsW { + pub fn ss(&mut self) -> SsW<'_, Ctrl1Spec> { SsW::new(self, 4) } #[doc = "Bit 7 - Block Mode Enable"] #[inline(always)] - pub fn blockmode(&mut self) -> BlockmodeW { + pub fn blockmode(&mut self) -> BlockmodeW<'_, Ctrl1Spec> { BlockmodeW::new(self, 7) } #[doc = "Bit 8 - Block Mode Start Status Enable"] #[inline(always)] - pub fn bmstart(&mut self) -> BmstartW { + pub fn bmstart(&mut self) -> BmstartW<'_, Ctrl1Spec> { BmstartW::new(self, 8) } #[doc = "Bit 9 - Block Mode Stall Enable"] #[inline(always)] - pub fn bmstall(&mut self) -> BmstallW { + pub fn bmstall(&mut self) -> BmstallW<'_, Ctrl1Spec> { BmstallW::new(self, 9) } #[doc = "Bit 10 - Master Delayed Capture Enable"] #[inline(always)] - pub fn mdlycap(&mut self) -> MdlycapW { + pub fn mdlycap(&mut self) -> MdlycapW<'_, Ctrl1Spec> { MdlycapW::new(self, 10) } #[doc = "Bit 11 - Master Tx Pause Enable"] #[inline(always)] - pub fn mtxpause(&mut self) -> MtxpauseW { + pub fn mtxpause(&mut self) -> MtxpauseW<'_, Ctrl1Spec> { MtxpauseW::new(self, 11) } } @@ -156,10 +156,6 @@ impl crate::Readable for Ctrl1Spec {} #[doc = "`write(|w| ..)` method takes [`ctrl1::W`](W) writer structure"] impl crate::Writable for Ctrl1Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTRL1 to value 0"] -impl crate::Resettable for Ctrl1Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Ctrl1Spec {} diff --git a/va416xx/src/spi0/data.rs b/va416xx/src/spi0/data.rs index 55983d3..8968f26 100644 --- a/va416xx/src/spi0/data.rs +++ b/va416xx/src/spi0/data.rs @@ -19,10 +19,6 @@ impl crate::Readable for DataSpec {} #[doc = "`write(|w| ..)` method takes [`data::W`](W) writer structure"] impl crate::Writable for DataSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA to value 0"] -impl crate::Resettable for DataSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for DataSpec {} diff --git a/va416xx/src/spi0/fifo_clr.rs b/va416xx/src/spi0/fifo_clr.rs index af272ab..339ac41 100644 --- a/va416xx/src/spi0/fifo_clr.rs +++ b/va416xx/src/spi0/fifo_clr.rs @@ -7,12 +7,12 @@ pub type TxfifoW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Clear Rx FIFO"] #[inline(always)] - pub fn rxfifo(&mut self) -> RxfifoW { + pub fn rxfifo(&mut self) -> RxfifoW<'_, FifoClrSpec> { RxfifoW::new(self, 0) } #[doc = "Bit 1 - Clear Tx FIFO"] #[inline(always)] - pub fn txfifo(&mut self) -> TxfifoW { + pub fn txfifo(&mut self) -> TxfifoW<'_, FifoClrSpec> { TxfifoW::new(self, 1) } } @@ -24,10 +24,6 @@ impl crate::RegisterSpec for FifoClrSpec { #[doc = "`write(|w| ..)` method takes [`fifo_clr::W`](W) writer structure"] impl crate::Writable for FifoClrSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets FIFO_CLR to value 0"] -impl crate::Resettable for FifoClrSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for FifoClrSpec {} diff --git a/va416xx/src/spi0/irq_enb.rs b/va416xx/src/spi0/irq_enb.rs index d2af91a..325da2d 100644 --- a/va416xx/src/spi0/irq_enb.rs +++ b/va416xx/src/spi0/irq_enb.rs @@ -43,22 +43,22 @@ impl R { impl W { #[doc = "Bit 0 - RX Overrun"] #[inline(always)] - pub fn rorim(&mut self) -> RorimW { + pub fn rorim(&mut self) -> RorimW<'_, IrqEnbSpec> { RorimW::new(self, 0) } #[doc = "Bit 1 - RX Timeout"] #[inline(always)] - pub fn rtim(&mut self) -> RtimW { + pub fn rtim(&mut self) -> RtimW<'_, IrqEnbSpec> { RtimW::new(self, 1) } #[doc = "Bit 2 - RX Fifo is at least half full"] #[inline(always)] - pub fn rxim(&mut self) -> RximW { + pub fn rxim(&mut self) -> RximW<'_, IrqEnbSpec> { RximW::new(self, 2) } #[doc = "Bit 3 - TX Fifo is at least half empty"] #[inline(always)] - pub fn txim(&mut self) -> TximW { + pub fn txim(&mut self) -> TximW<'_, IrqEnbSpec> { TximW::new(self, 3) } } @@ -72,10 +72,6 @@ impl crate::Readable for IrqEnbSpec {} #[doc = "`write(|w| ..)` method takes [`irq_enb::W`](W) writer structure"] impl crate::Writable for IrqEnbSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IRQ_ENB to value 0"] -impl crate::Resettable for IrqEnbSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for IrqEnbSpec {} diff --git a/va416xx/src/spi0/rxfifoirqtrg.rs b/va416xx/src/spi0/rxfifoirqtrg.rs index 450e256..e38d450 100644 --- a/va416xx/src/spi0/rxfifoirqtrg.rs +++ b/va416xx/src/spi0/rxfifoirqtrg.rs @@ -19,10 +19,6 @@ impl crate::Readable for RxfifoirqtrgSpec {} #[doc = "`write(|w| ..)` method takes [`rxfifoirqtrg::W`](W) writer structure"] impl crate::Writable for RxfifoirqtrgSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RXFIFOIRQTRG to value 0"] -impl crate::Resettable for RxfifoirqtrgSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for RxfifoirqtrgSpec {} diff --git a/va416xx/src/spi0/state.rs b/va416xx/src/spi0/state.rs index 0e11448..3a494cd 100644 --- a/va416xx/src/spi0/state.rs +++ b/va416xx/src/spi0/state.rs @@ -14,6 +14,4 @@ impl crate::RegisterSpec for StateSpec { #[doc = "`read()` method returns [`state::R`](R) reader structure"] impl crate::Readable for StateSpec {} #[doc = "`reset()` method sets STATE to value 0"] -impl crate::Resettable for StateSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for StateSpec {} diff --git a/va416xx/src/spi0/status.rs b/va416xx/src/spi0/status.rs index 1bb2587..0000307 100644 --- a/va416xx/src/spi0/status.rs +++ b/va416xx/src/spi0/status.rs @@ -66,6 +66,4 @@ impl crate::RegisterSpec for StatusSpec { #[doc = "`read()` method returns [`status::R`](R) reader structure"] impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0"] -impl crate::Resettable for StatusSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for StatusSpec {} diff --git a/va416xx/src/spi0/txfifoirqtrg.rs b/va416xx/src/spi0/txfifoirqtrg.rs index 00aa42f..ea0e7d3 100644 --- a/va416xx/src/spi0/txfifoirqtrg.rs +++ b/va416xx/src/spi0/txfifoirqtrg.rs @@ -19,10 +19,6 @@ impl crate::Readable for TxfifoirqtrgSpec {} #[doc = "`write(|w| ..)` method takes [`txfifoirqtrg::W`](W) writer structure"] impl crate::Writable for TxfifoirqtrgSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TXFIFOIRQTRG to value 0"] -impl crate::Resettable for TxfifoirqtrgSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for TxfifoirqtrgSpec {} diff --git a/va416xx/src/spw.rs b/va416xx/src/spw.rs index f7304e2..6084321 100644 --- a/va416xx/src/spw.rs +++ b/va416xx/src/spw.rs @@ -77,74 +77,62 @@ impl RegisterBlock { &self.dmaaddr0 } } -#[doc = "CTRL (rw) register accessor: Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`] -module"] +#[doc = "CTRL (rw) register accessor: Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`] module"] #[doc(alias = "CTRL")] pub type Ctrl = crate::Reg; #[doc = "Control Register"] pub mod ctrl; -#[doc = "STS (rw) register accessor: Status/Interrupt Source Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sts::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sts::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sts`] -module"] +#[doc = "STS (rw) register accessor: Status/Interrupt Source Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sts::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sts::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sts`] module"] #[doc(alias = "STS")] pub type Sts = crate::Reg; #[doc = "Status/Interrupt Source Register"] pub mod sts; -#[doc = "DEFADDR (rw) register accessor: Node Address Register\n\nYou can [`read`](crate::Reg::read) this register and get [`defaddr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`defaddr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@defaddr`] -module"] +#[doc = "DEFADDR (rw) register accessor: Node Address Register\n\nYou can [`read`](crate::Reg::read) this register and get [`defaddr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`defaddr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@defaddr`] module"] #[doc(alias = "DEFADDR")] pub type Defaddr = crate::Reg; #[doc = "Node Address Register"] pub mod defaddr; -#[doc = "CLKDIV (rw) register accessor: Clock Divisor Register\n\nYou can [`read`](crate::Reg::read) this register and get [`clkdiv::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkdiv::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkdiv`] -module"] +#[doc = "CLKDIV (rw) register accessor: Clock Divisor Register\n\nYou can [`read`](crate::Reg::read) this register and get [`clkdiv::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkdiv::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkdiv`] module"] #[doc(alias = "CLKDIV")] pub type Clkdiv = crate::Reg; #[doc = "Clock Divisor Register"] pub mod clkdiv; -#[doc = "DKEY (rw) register accessor: Destination Key\n\nYou can [`read`](crate::Reg::read) this register and get [`dkey::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dkey::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dkey`] -module"] +#[doc = "DKEY (rw) register accessor: Destination Key\n\nYou can [`read`](crate::Reg::read) this register and get [`dkey::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dkey::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dkey`] module"] #[doc(alias = "DKEY")] pub type Dkey = crate::Reg; #[doc = "Destination Key"] pub mod dkey; -#[doc = "TC (rw) register accessor: Time Code Register\n\nYou can [`read`](crate::Reg::read) this register and get [`tc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tc`] -module"] +#[doc = "TC (rw) register accessor: Time Code Register\n\nYou can [`read`](crate::Reg::read) this register and get [`tc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tc`] module"] #[doc(alias = "TC")] pub type Tc = crate::Reg; #[doc = "Time Code Register"] pub mod tc; -#[doc = "TDR (r) register accessor: Timer and Disconnect Register\n\nYou can [`read`](crate::Reg::read) this register and get [`tdr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tdr`] -module"] +#[doc = "TDR (r) register accessor: Timer and Disconnect Register\n\nYou can [`read`](crate::Reg::read) this register and get [`tdr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tdr`] module"] #[doc(alias = "TDR")] pub type Tdr = crate::Reg; #[doc = "Timer and Disconnect Register"] pub mod tdr; -#[doc = "DMACTRL0 (rw) register accessor: DMA Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dmactrl0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dmactrl0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmactrl0`] -module"] +#[doc = "DMACTRL0 (rw) register accessor: DMA Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dmactrl0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dmactrl0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmactrl0`] module"] #[doc(alias = "DMACTRL0")] pub type Dmactrl0 = crate::Reg; #[doc = "DMA Control Register"] pub mod dmactrl0; -#[doc = "DMAMAXLEN0 (rw) register accessor: DMA RX Maximum Length Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dmamaxlen0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dmamaxlen0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmamaxlen0`] -module"] +#[doc = "DMAMAXLEN0 (rw) register accessor: DMA RX Maximum Length Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dmamaxlen0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dmamaxlen0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmamaxlen0`] module"] #[doc(alias = "DMAMAXLEN0")] pub type Dmamaxlen0 = crate::Reg; #[doc = "DMA RX Maximum Length Register"] pub mod dmamaxlen0; -#[doc = "DMATXDESC0 (rw) register accessor: DMA Transmitter Descriptor Table Address Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dmatxdesc0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dmatxdesc0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmatxdesc0`] -module"] +#[doc = "DMATXDESC0 (rw) register accessor: DMA Transmitter Descriptor Table Address Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dmatxdesc0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dmatxdesc0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmatxdesc0`] module"] #[doc(alias = "DMATXDESC0")] pub type Dmatxdesc0 = crate::Reg; #[doc = "DMA Transmitter Descriptor Table Address Register"] pub mod dmatxdesc0; -#[doc = "DMARXDESC0 (rw) register accessor: DMA Receiver Table Destination Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dmarxdesc0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dmarxdesc0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmarxdesc0`] -module"] +#[doc = "DMARXDESC0 (rw) register accessor: DMA Receiver Table Destination Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dmarxdesc0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dmarxdesc0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmarxdesc0`] module"] #[doc(alias = "DMARXDESC0")] pub type Dmarxdesc0 = crate::Reg; #[doc = "DMA Receiver Table Destination Register"] pub mod dmarxdesc0; -#[doc = "DMAADDR0 (rw) register accessor: DMA Receiver Table Address Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dmaaddr0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dmaaddr0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmaaddr0`] -module"] +#[doc = "DMAADDR0 (rw) register accessor: DMA Receiver Table Address Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dmaaddr0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dmaaddr0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmaaddr0`] module"] #[doc(alias = "DMAADDR0")] pub type Dmaaddr0 = crate::Reg; #[doc = "DMA Receiver Table Address Register"] diff --git a/va416xx/src/spw/clkdiv.rs b/va416xx/src/spw/clkdiv.rs index 3f6196f..c3531db 100644 --- a/va416xx/src/spw/clkdiv.rs +++ b/va416xx/src/spw/clkdiv.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:7 - 8-bit Clock divisor value used for the clock-divider when the link-interface is in the run-state"] #[inline(always)] - pub fn clkdivrun(&mut self) -> ClkdivrunW { + pub fn clkdivrun(&mut self) -> ClkdivrunW<'_, ClkdivSpec> { ClkdivrunW::new(self, 0) } #[doc = "Bits 8:15 - 8-bit Clock divisor value used for the clock-divider during startup"] #[inline(always)] - pub fn clkdivstart(&mut self) -> ClkdivstartW { + pub fn clkdivstart(&mut self) -> ClkdivstartW<'_, ClkdivSpec> { ClkdivstartW::new(self, 8) } } @@ -44,8 +44,6 @@ impl crate::Readable for ClkdivSpec {} #[doc = "`write(|w| ..)` method takes [`clkdiv::W`](W) writer structure"] impl crate::Writable for ClkdivSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CLKDIV to value 0x0909"] impl crate::Resettable for ClkdivSpec { diff --git a/va416xx/src/spw/ctrl.rs b/va416xx/src/spw/ctrl.rs index e9308d3..796d9ea 100644 --- a/va416xx/src/spw/ctrl.rs +++ b/va416xx/src/spw/ctrl.rs @@ -234,97 +234,97 @@ impl R { impl W { #[doc = "Bit 0 - Disable the SpaceWire CODEC"] #[inline(always)] - pub fn ld(&mut self) -> LdW { + pub fn ld(&mut self) -> LdW<'_, CtrlSpec> { LdW::new(self, 0) } #[doc = "Bit 1 - Start the link"] #[inline(always)] - pub fn ls(&mut self) -> LsW { + pub fn ls(&mut self) -> LsW<'_, CtrlSpec> { LsW::new(self, 1) } #[doc = "Bit 2 - Automatically start the link when a NULL has been received"] #[inline(always)] - pub fn as_(&mut self) -> AsW { + pub fn as_(&mut self) -> AsW<'_, CtrlSpec> { AsW::new(self, 2) } #[doc = "Bit 3 - If set, an interrupt is generated when one or both of bit 8 to 9 is set and its corresponding event occurs"] #[inline(always)] - pub fn ie(&mut self) -> IeW { + pub fn ie(&mut self) -> IeW<'_, CtrlSpec> { IeW::new(self, 3) } #[doc = "Bit 4 - The host can generate a tick by writing a one to this field"] #[inline(always)] - pub fn ti(&mut self) -> TiW { + pub fn ti(&mut self) -> TiW<'_, CtrlSpec> { TiW::new(self, 4) } #[doc = "Bit 5 - Enable Promiscuous mode"] #[inline(always)] - pub fn pm(&mut self) -> PmW { + pub fn pm(&mut self) -> PmW<'_, CtrlSpec> { PmW::new(self, 5) } #[doc = "Bit 6 - Make complete reset of the SpaceWire node. Self-clearing"] #[inline(always)] - pub fn rs(&mut self) -> RsW { + pub fn rs(&mut self) -> RsW<'_, CtrlSpec> { RsW::new(self, 6) } #[doc = "Bit 8 - Generate interrupt when a valid time-code is received"] #[inline(always)] - pub fn tq(&mut self) -> TqW { + pub fn tq(&mut self) -> TqW<'_, CtrlSpec> { TqW::new(self, 8) } #[doc = "Bit 9 - Generate interrupt when link error occurs"] #[inline(always)] - pub fn li(&mut self) -> LiW { + pub fn li(&mut self) -> LiW<'_, CtrlSpec> { LiW::new(self, 9) } #[doc = "Bit 10 - Enable time-code transmissions"] #[inline(always)] - pub fn tt(&mut self) -> TtW { + pub fn tt(&mut self) -> TtW<'_, CtrlSpec> { TtW::new(self, 10) } #[doc = "Bit 11 - Enable time-code receptions"] #[inline(always)] - pub fn tr(&mut self) -> TrW { + pub fn tr(&mut self) -> TrW<'_, CtrlSpec> { TrW::new(self, 11) } #[doc = "Bit 12 - Time-code Flag Filter"] #[inline(always)] - pub fn tf(&mut self) -> TfW { + pub fn tf(&mut self) -> TfW<'_, CtrlSpec> { TfW::new(self, 12) } #[doc = "Bit 13 - Transmitter Enable Lock Control"] #[inline(always)] - pub fn tl(&mut self) -> TlW { + pub fn tl(&mut self) -> TlW<'_, CtrlSpec> { TlW::new(self, 13) } #[doc = "Bit 15 - SpW Plug-and-Play Enable"] #[inline(always)] - pub fn pe(&mut self) -> PeW { + pub fn pe(&mut self) -> PeW<'_, CtrlSpec> { PeW::new(self, 15) } #[doc = "Bit 16 - Enable RMAP command handler"] #[inline(always)] - pub fn re(&mut self) -> ReW { + pub fn re(&mut self) -> ReW<'_, CtrlSpec> { ReW::new(self, 16) } #[doc = "Bit 17 - If set only one RMAP buffer is used"] #[inline(always)] - pub fn rd(&mut self) -> RdW { + pub fn rd(&mut self) -> RdW<'_, CtrlSpec> { RdW::new(self, 17) } #[doc = "Bit 20 - Disable port force"] #[inline(always)] - pub fn np(&mut self) -> NpW { + pub fn np(&mut self) -> NpW<'_, CtrlSpec> { NpW::new(self, 20) } #[doc = "Bit 21 - Selects the active port when the no port force bit is zero"] #[inline(always)] - pub fn ps(&mut self) -> PsW { + pub fn ps(&mut self) -> PsW<'_, CtrlSpec> { PsW::new(self, 21) } #[doc = "Bit 22 - Loop-back Enable"] #[inline(always)] - pub fn le(&mut self) -> LeW { + pub fn le(&mut self) -> LeW<'_, CtrlSpec> { LeW::new(self, 22) } } @@ -338,8 +338,6 @@ impl crate::Readable for CtrlSpec {} #[doc = "`write(|w| ..)` method takes [`ctrl::W`](W) writer structure"] impl crate::Writable for CtrlSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTRL to value 0xa201_0004"] impl crate::Resettable for CtrlSpec { diff --git a/va416xx/src/spw/defaddr.rs b/va416xx/src/spw/defaddr.rs index cfc6982..414c6d6 100644 --- a/va416xx/src/spw/defaddr.rs +++ b/va416xx/src/spw/defaddr.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:7 - 8-bit node address used for node identification on the SpaceWire network"] #[inline(always)] - pub fn defaddr(&mut self) -> DefaddrW { + pub fn defaddr(&mut self) -> DefaddrW<'_, DefaddrSpec> { DefaddrW::new(self, 0) } #[doc = "Bits 8:15 - 8-bit default mask used for node identification on the SpaceWire network"] #[inline(always)] - pub fn defmask(&mut self) -> DefmaskW { + pub fn defmask(&mut self) -> DefmaskW<'_, DefaddrSpec> { DefmaskW::new(self, 8) } } @@ -44,8 +44,6 @@ impl crate::Readable for DefaddrSpec {} #[doc = "`write(|w| ..)` method takes [`defaddr::W`](W) writer structure"] impl crate::Writable for DefaddrSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DEFADDR to value 0xfe"] impl crate::Resettable for DefaddrSpec { diff --git a/va416xx/src/spw/dkey.rs b/va416xx/src/spw/dkey.rs index 7793357..692a17c 100644 --- a/va416xx/src/spw/dkey.rs +++ b/va416xx/src/spw/dkey.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:7 - RMAP destination key"] #[inline(always)] - pub fn destkey(&mut self) -> DestkeyW { + pub fn destkey(&mut self) -> DestkeyW<'_, DkeySpec> { DestkeyW::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for DkeySpec {} #[doc = "`write(|w| ..)` method takes [`dkey::W`](W) writer structure"] impl crate::Writable for DkeySpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DKEY to value 0"] -impl crate::Resettable for DkeySpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for DkeySpec {} diff --git a/va416xx/src/spw/dmaaddr0.rs b/va416xx/src/spw/dmaaddr0.rs index b403f28..9d31ded 100644 --- a/va416xx/src/spw/dmaaddr0.rs +++ b/va416xx/src/spw/dmaaddr0.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:7 - Address"] #[inline(always)] - pub fn addr(&mut self) -> AddrW { + pub fn addr(&mut self) -> AddrW<'_, Dmaaddr0Spec> { AddrW::new(self, 0) } #[doc = "Bits 8:15 - Mask"] #[inline(always)] - pub fn mask(&mut self) -> MaskW { + pub fn mask(&mut self) -> MaskW<'_, Dmaaddr0Spec> { MaskW::new(self, 8) } } @@ -44,10 +44,6 @@ impl crate::Readable for Dmaaddr0Spec {} #[doc = "`write(|w| ..)` method takes [`dmaaddr0::W`](W) writer structure"] impl crate::Writable for Dmaaddr0Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DMAADDR0 to value 0"] -impl crate::Resettable for Dmaaddr0Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Dmaaddr0Spec {} diff --git a/va416xx/src/spw/dmactrl0.rs b/va416xx/src/spw/dmactrl0.rs index 51d9005..1384f72 100644 --- a/va416xx/src/spw/dmactrl0.rs +++ b/va416xx/src/spw/dmactrl0.rs @@ -228,117 +228,117 @@ impl R { impl W { #[doc = "Bit 0 - Write a one to this bit each time new descriptors are activated in the table"] #[inline(always)] - pub fn te(&mut self) -> TeW { + pub fn te(&mut self) -> TeW<'_, Dmactrl0Spec> { TeW::new(self, 0) } #[doc = "Bit 1 - Packets are allowed to be received to this channel"] #[inline(always)] - pub fn re(&mut self) -> ReW { + pub fn re(&mut self) -> ReW<'_, Dmactrl0Spec> { ReW::new(self, 1) } #[doc = "Bit 2 - An interrupt will be generated each time a packet is transmitted"] #[inline(always)] - pub fn ti(&mut self) -> TiW { + pub fn ti(&mut self) -> TiW<'_, Dmactrl0Spec> { TiW::new(self, 2) } #[doc = "Bit 3 - An interrupt will be generated each time a packet has been received"] #[inline(always)] - pub fn ri(&mut self) -> RiW { + pub fn ri(&mut self) -> RiW<'_, Dmactrl0Spec> { RiW::new(self, 3) } #[doc = "Bit 4 - An interrupt will be generated each time an AHB error occurs when this DMA channel is accessing the bus"] #[inline(always)] - pub fn ai(&mut self) -> AiW { + pub fn ai(&mut self) -> AiW<'_, Dmactrl0Spec> { AiW::new(self, 4) } #[doc = "Bit 5 - Set each time a packet has been sent"] #[inline(always)] - pub fn ps(&mut self) -> PsW { + pub fn ps(&mut self) -> PsW<'_, Dmactrl0Spec> { PsW::new(self, 5) } #[doc = "Bit 6 - Set each time a packet has been received"] #[inline(always)] - pub fn pr(&mut self) -> PrW { + pub fn pr(&mut self) -> PrW<'_, Dmactrl0Spec> { PrW::new(self, 6) } #[doc = "Bit 7 - An error response was detected on the AHB bus - DMA transmit"] #[inline(always)] - pub fn ta(&mut self) -> TaW { + pub fn ta(&mut self) -> TaW<'_, Dmactrl0Spec> { TaW::new(self, 7) } #[doc = "Bit 8 - An error response was detected on the AHB bus - DMA receive"] #[inline(always)] - pub fn ra(&mut self) -> RaW { + pub fn ra(&mut self) -> RaW<'_, Dmactrl0Spec> { RaW::new(self, 8) } #[doc = "Bit 11 - Indicates to the GRSPW that there are enabled descriptors in the descriptor table"] #[inline(always)] - pub fn rd(&mut self) -> RdW { + pub fn rd(&mut self) -> RdW<'_, Dmactrl0Spec> { RdW::new(self, 11) } #[doc = "Bit 12 - If cleared, packets will be discarded when a packet is arriving and there are no active descriptors. If set, the GRSPW will wait for a descriptor to be activated"] #[inline(always)] - pub fn ns(&mut self) -> NsW { + pub fn ns(&mut self) -> NsW<'_, Dmactrl0Spec> { NsW::new(self, 12) } #[doc = "Bit 13 - Enable Address"] #[inline(always)] - pub fn en(&mut self) -> EnW { + pub fn en(&mut self) -> EnW<'_, Dmactrl0Spec> { EnW::new(self, 13) } #[doc = "Bit 14 - Strip Address"] #[inline(always)] - pub fn sa(&mut self) -> SaW { + pub fn sa(&mut self) -> SaW<'_, Dmactrl0Spec> { SaW::new(self, 14) } #[doc = "Bit 15 - Strip PID"] #[inline(always)] - pub fn sp(&mut self) -> SpW { + pub fn sp(&mut self) -> SpW<'_, Dmactrl0Spec> { SpW::new(self, 15) } #[doc = "Bit 16 - Disable transmitter when a link error occurs"] #[inline(always)] - pub fn le(&mut self) -> LeW { + pub fn le(&mut self) -> LeW<'_, Dmactrl0Spec> { LeW::new(self, 16) } #[doc = "Bit 17 - Transmit Enable Lock"] #[inline(always)] - pub fn tl(&mut self) -> TlW { + pub fn tl(&mut self) -> TlW<'_, Dmactrl0Spec> { TlW::new(self, 17) } #[doc = "Bit 18 - Transmit Packet IRQ"] #[inline(always)] - pub fn tp(&mut self) -> TpW { + pub fn tp(&mut self) -> TpW<'_, Dmactrl0Spec> { TpW::new(self, 18) } #[doc = "Bit 19 - Receive Packet IRQ"] #[inline(always)] - pub fn rp(&mut self) -> RpW { + pub fn rp(&mut self) -> RpW<'_, Dmactrl0Spec> { RpW::new(self, 19) } #[doc = "Bit 20 - Interrupt code transmit enable on truncation"] #[inline(always)] - pub fn it(&mut self) -> ItW { + pub fn it(&mut self) -> ItW<'_, Dmactrl0Spec> { ItW::new(self, 20) } #[doc = "Bit 21 - Interrupt code transmit enable on EEP"] #[inline(always)] - pub fn ie(&mut self) -> IeW { + pub fn ie(&mut self) -> IeW<'_, Dmactrl0Spec> { IeW::new(self, 21) } #[doc = "Bit 22 - Truncated"] #[inline(always)] - pub fn tr(&mut self) -> TrW { + pub fn tr(&mut self) -> TrW<'_, Dmactrl0Spec> { TrW::new(self, 22) } #[doc = "Bit 23 - EEP Termination"] #[inline(always)] - pub fn ep(&mut self) -> EpW { + pub fn ep(&mut self) -> EpW<'_, Dmactrl0Spec> { EpW::new(self, 23) } #[doc = "Bits 26:31 - Interrupt number used for this channel"] #[inline(always)] - pub fn intnum(&mut self) -> IntnumW { + pub fn intnum(&mut self) -> IntnumW<'_, Dmactrl0Spec> { IntnumW::new(self, 26) } } @@ -352,10 +352,6 @@ impl crate::Readable for Dmactrl0Spec {} #[doc = "`write(|w| ..)` method takes [`dmactrl0::W`](W) writer structure"] impl crate::Writable for Dmactrl0Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DMACTRL0 to value 0"] -impl crate::Resettable for Dmactrl0Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Dmactrl0Spec {} diff --git a/va416xx/src/spw/dmamaxlen0.rs b/va416xx/src/spw/dmamaxlen0.rs index 1494853..438d2c0 100644 --- a/va416xx/src/spw/dmamaxlen0.rs +++ b/va416xx/src/spw/dmamaxlen0.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 2:24 - Receiver packet maximum length in bytes"] #[inline(always)] - pub fn rxmaxlen(&mut self) -> RxmaxlenW { + pub fn rxmaxlen(&mut self) -> RxmaxlenW<'_, Dmamaxlen0Spec> { RxmaxlenW::new(self, 2) } } @@ -30,10 +30,6 @@ impl crate::Readable for Dmamaxlen0Spec {} #[doc = "`write(|w| ..)` method takes [`dmamaxlen0::W`](W) writer structure"] impl crate::Writable for Dmamaxlen0Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DMAMAXLEN0 to value 0"] -impl crate::Resettable for Dmamaxlen0Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Dmamaxlen0Spec {} diff --git a/va416xx/src/spw/dmarxdesc0.rs b/va416xx/src/spw/dmarxdesc0.rs index e0d68a9..e28e8f5 100644 --- a/va416xx/src/spw/dmarxdesc0.rs +++ b/va416xx/src/spw/dmarxdesc0.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 3:9 - Offset into the descriptor table"] #[inline(always)] - pub fn descsel(&mut self) -> DescselW { + pub fn descsel(&mut self) -> DescselW<'_, Dmarxdesc0Spec> { DescselW::new(self, 3) } #[doc = "Bits 10:31 - Sets the base address of the descriptor table"] #[inline(always)] - pub fn descbaseaddr(&mut self) -> DescbaseaddrW { + pub fn descbaseaddr(&mut self) -> DescbaseaddrW<'_, Dmarxdesc0Spec> { DescbaseaddrW::new(self, 10) } } @@ -44,10 +44,6 @@ impl crate::Readable for Dmarxdesc0Spec {} #[doc = "`write(|w| ..)` method takes [`dmarxdesc0::W`](W) writer structure"] impl crate::Writable for Dmarxdesc0Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DMARXDESC0 to value 0"] -impl crate::Resettable for Dmarxdesc0Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Dmarxdesc0Spec {} diff --git a/va416xx/src/spw/dmatxdesc0.rs b/va416xx/src/spw/dmatxdesc0.rs index da1242b..5496552 100644 --- a/va416xx/src/spw/dmatxdesc0.rs +++ b/va416xx/src/spw/dmatxdesc0.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 4:9 - Offset into the descriptor table"] #[inline(always)] - pub fn descsel(&mut self) -> DescselW { + pub fn descsel(&mut self) -> DescselW<'_, Dmatxdesc0Spec> { DescselW::new(self, 4) } #[doc = "Bits 10:31 - Sets the base address of the descriptor table"] #[inline(always)] - pub fn descbaseaddr(&mut self) -> DescbaseaddrW { + pub fn descbaseaddr(&mut self) -> DescbaseaddrW<'_, Dmatxdesc0Spec> { DescbaseaddrW::new(self, 10) } } @@ -44,10 +44,6 @@ impl crate::Readable for Dmatxdesc0Spec {} #[doc = "`write(|w| ..)` method takes [`dmatxdesc0::W`](W) writer structure"] impl crate::Writable for Dmatxdesc0Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DMATXDESC0 to value 0"] -impl crate::Resettable for Dmatxdesc0Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Dmatxdesc0Spec {} diff --git a/va416xx/src/spw/sts.rs b/va416xx/src/spw/sts.rs index b4524d5..f6b5f13 100644 --- a/va416xx/src/spw/sts.rs +++ b/va416xx/src/spw/sts.rs @@ -115,62 +115,62 @@ impl R { impl W { #[doc = "Bit 0 - A new time count value was received"] #[inline(always)] - pub fn to(&mut self) -> ToW { + pub fn to(&mut self) -> ToW<'_, StsSpec> { ToW::new(self, 0) } #[doc = "Bit 1 - Credit has occurred"] #[inline(always)] - pub fn ce(&mut self) -> CeW { + pub fn ce(&mut self) -> CeW<'_, StsSpec> { CeW::new(self, 1) } #[doc = "Bit 2 - Escape error has occurred"] #[inline(always)] - pub fn er(&mut self) -> ErW { + pub fn er(&mut self) -> ErW<'_, StsSpec> { ErW::new(self, 2) } #[doc = "Bit 3 - Disconnection error has occurred"] #[inline(always)] - pub fn de(&mut self) -> DeW { + pub fn de(&mut self) -> DeW<'_, StsSpec> { DeW::new(self, 3) } #[doc = "Bit 4 - Parity error has occurred"] #[inline(always)] - pub fn pe(&mut self) -> PeW { + pub fn pe(&mut self) -> PeW<'_, StsSpec> { PeW::new(self, 4) } #[doc = "Bit 6 - A synchronization problem has occurred when receiving NChars"] #[inline(always)] - pub fn we(&mut self) -> WeW { + pub fn we(&mut self) -> WeW<'_, StsSpec> { WeW::new(self, 6) } #[doc = "Bit 7 - Packet is received with an invalid destination address field"] #[inline(always)] - pub fn ia(&mut self) -> IaW { + pub fn ia(&mut self) -> IaW<'_, StsSpec> { IaW::new(self, 7) } #[doc = "Bit 8 - Set to one when a packet is received with an EOP after the first byte for a non-RMAP packet and after the second byte for a RMAP packet"] #[inline(always)] - pub fn ee(&mut self) -> EeW { + pub fn ee(&mut self) -> EeW<'_, StsSpec> { EeW::new(self, 8) } #[doc = "Bit 9 - Active port"] #[inline(always)] - pub fn ap(&mut self) -> ApW { + pub fn ap(&mut self) -> ApW<'_, StsSpec> { ApW::new(self, 9) } #[doc = "Bits 21:23 - Link State"] #[inline(always)] - pub fn ls(&mut self) -> LsW { + pub fn ls(&mut self) -> LsW<'_, StsSpec> { LsW::new(self, 21) } #[doc = "Bits 24:25 - Number of Transmit Descriptors"] #[inline(always)] - pub fn ntxd(&mut self) -> NtxdW { + pub fn ntxd(&mut self) -> NtxdW<'_, StsSpec> { NtxdW::new(self, 24) } #[doc = "Bits 26:27 - Number of Receive Descriptors"] #[inline(always)] - pub fn nrxd(&mut self) -> NrxdW { + pub fn nrxd(&mut self) -> NrxdW<'_, StsSpec> { NrxdW::new(self, 26) } } @@ -184,8 +184,6 @@ impl crate::Readable for StsSpec {} #[doc = "`write(|w| ..)` method takes [`sts::W`](W) writer structure"] impl crate::Writable for StsSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets STS to value 0x0640_0000"] impl crate::Resettable for StsSpec { diff --git a/va416xx/src/spw/tc.rs b/va416xx/src/spw/tc.rs index b1a20f1..0f1d9ad 100644 --- a/va416xx/src/spw/tc.rs +++ b/va416xx/src/spw/tc.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:5 - The current value of the system time counter"] #[inline(always)] - pub fn timecnt(&mut self) -> TimecntW { + pub fn timecnt(&mut self) -> TimecntW<'_, TcSpec> { TimecntW::new(self, 0) } #[doc = "Bits 6:7 - The current value of the time control flags"] #[inline(always)] - pub fn tirq_end(&mut self) -> TirqEndW { + pub fn tirq_end(&mut self) -> TirqEndW<'_, TcSpec> { TirqEndW::new(self, 6) } } @@ -44,10 +44,6 @@ impl crate::Readable for TcSpec {} #[doc = "`write(|w| ..)` method takes [`tc::W`](W) writer structure"] impl crate::Writable for TcSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TC to value 0"] -impl crate::Resettable for TcSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for TcSpec {} diff --git a/va416xx/src/spw/tdr.rs b/va416xx/src/spw/tdr.rs index 44be157..a3f658c 100644 --- a/va416xx/src/spw/tdr.rs +++ b/va416xx/src/spw/tdr.rs @@ -24,6 +24,4 @@ impl crate::RegisterSpec for TdrSpec { #[doc = "`read()` method returns [`tdr::R`](R) reader structure"] impl crate::Readable for TdrSpec {} #[doc = "`reset()` method sets TDR to value 0"] -impl crate::Resettable for TdrSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for TdrSpec {} diff --git a/va416xx/src/sysconfig.rs b/va416xx/src/sysconfig.rs index fc7b9f4..44182dd 100644 --- a/va416xx/src/sysconfig.rs +++ b/va416xx/src/sysconfig.rs @@ -281,8 +281,7 @@ impl RegisterBlock { &self.perid } } -#[doc = "RST_STAT (rw) register accessor: System Reset Status\n\nYou can [`read`](crate::Reg::read) this register and get [`rst_stat::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rst_stat::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rst_stat`] -module"] +#[doc = "RST_STAT (rw) register accessor: System Reset Status\n\nYou can [`read`](crate::Reg::read) this register and get [`rst_stat::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rst_stat::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rst_stat`] module"] #[doc(alias = "RST_STAT")] pub type RstStat = crate::Reg; #[doc = "System Reset Status"] @@ -293,14 +292,12 @@ pub use rst_stat as rst_cntl_ram1; pub use RstStat as RstCntlRom; pub use RstStat as RstCntlRam0; pub use RstStat as RstCntlRam1; -#[doc = "ROM_PROT (rw) register accessor: ROM Protection Configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`rom_prot::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rom_prot::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rom_prot`] -module"] +#[doc = "ROM_PROT (rw) register accessor: ROM Protection Configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`rom_prot::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rom_prot::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rom_prot`] module"] #[doc(alias = "ROM_PROT")] pub type RomProt = crate::Reg; #[doc = "ROM Protection Configuration"] pub mod rom_prot; -#[doc = "ROM_SCRUB (rw) register accessor: ROM Scrub Period Configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`rom_scrub::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rom_scrub::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rom_scrub`] -module"] +#[doc = "ROM_SCRUB (rw) register accessor: ROM Scrub Period Configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`rom_scrub::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rom_scrub::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rom_scrub`] module"] #[doc(alias = "ROM_SCRUB")] pub type RomScrub = crate::Reg; #[doc = "ROM Scrub Period Configuration"] @@ -309,8 +306,7 @@ pub use rom_scrub as ram0_scrub; pub use rom_scrub as ram1_scrub; pub use RomScrub as Ram0Scrub; pub use RomScrub as Ram1Scrub; -#[doc = "IRQ_ENB (rw) register accessor: Enable EDAC Error Interrupt Register\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_enb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`irq_enb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_enb`] -module"] +#[doc = "IRQ_ENB (rw) register accessor: Enable EDAC Error Interrupt Register\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_enb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`irq_enb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_enb`] module"] #[doc(alias = "IRQ_ENB")] pub type IrqEnb = crate::Reg; #[doc = "Enable EDAC Error Interrupt Register"] @@ -321,16 +317,14 @@ pub use irq_enb as irq_clr; pub use IrqEnb as IrqRaw; pub use IrqEnb as IrqEnd; pub use IrqEnb as IrqClr; -#[doc = "RAM0_SBE (rw) register accessor: Count of RAM0 EDAC Single Bit Errors\n\nYou can [`read`](crate::Reg::read) this register and get [`ram0_sbe::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ram0_sbe::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ram0_sbe`] -module"] +#[doc = "RAM0_SBE (rw) register accessor: Count of RAM0 EDAC Single Bit Errors\n\nYou can [`read`](crate::Reg::read) this register and get [`ram0_sbe::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ram0_sbe::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ram0_sbe`] module"] #[doc(alias = "RAM0_SBE")] pub type Ram0Sbe = crate::Reg; #[doc = "Count of RAM0 EDAC Single Bit Errors"] pub mod ram0_sbe; pub use ram0_sbe as ram1_sbe; pub use Ram0Sbe as Ram1Sbe; -#[doc = "RAM0_MBE (rw) register accessor: Count of RAM0 EDAC Multi Bit Errors\n\nYou can [`read`](crate::Reg::read) this register and get [`ram0_mbe::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ram0_mbe::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ram0_mbe`] -module"] +#[doc = "RAM0_MBE (rw) register accessor: Count of RAM0 EDAC Multi Bit Errors\n\nYou can [`read`](crate::Reg::read) this register and get [`ram0_mbe::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ram0_mbe::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ram0_mbe`] module"] #[doc(alias = "RAM0_MBE")] pub type Ram0Mbe = crate::Reg; #[doc = "Count of RAM0 EDAC Multi Bit Errors"] @@ -341,58 +335,49 @@ pub use ram0_sbe as rom_sbe; pub use Ram0Mbe as Ram1Mbe; pub use Ram0Mbe as RomMbe; pub use Ram0Sbe as RomSbe; -#[doc = "ROM_RETRIES (r) register accessor: ROM BOOT Retry count\n\nYou can [`read`](crate::Reg::read) this register and get [`rom_retries::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rom_retries`] -module"] +#[doc = "ROM_RETRIES (r) register accessor: ROM BOOT Retry count\n\nYou can [`read`](crate::Reg::read) this register and get [`rom_retries::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rom_retries`] module"] #[doc(alias = "ROM_RETRIES")] pub type RomRetries = crate::Reg; #[doc = "ROM BOOT Retry count"] pub mod rom_retries; -#[doc = "REFRESH_CONFIG_H (rw) register accessor: Register Refresh Rate for TMR registers\n\nYou can [`read`](crate::Reg::read) this register and get [`refresh_config_h::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`refresh_config_h::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@refresh_config_h`] -module"] +#[doc = "REFRESH_CONFIG_H (rw) register accessor: Register Refresh Rate for TMR registers\n\nYou can [`read`](crate::Reg::read) this register and get [`refresh_config_h::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`refresh_config_h::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@refresh_config_h`] module"] #[doc(alias = "REFRESH_CONFIG_H")] pub type RefreshConfigH = crate::Reg; #[doc = "Register Refresh Rate for TMR registers"] pub mod refresh_config_h; -#[doc = "TIM_RESET (rw) register accessor: TIM Reset Control\n\nYou can [`read`](crate::Reg::read) this register and get [`tim_reset::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tim_reset::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tim_reset`] -module"] +#[doc = "TIM_RESET (rw) register accessor: TIM Reset Control\n\nYou can [`read`](crate::Reg::read) this register and get [`tim_reset::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tim_reset::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tim_reset`] module"] #[doc(alias = "TIM_RESET")] pub type TimReset = crate::Reg; #[doc = "TIM Reset Control"] pub mod tim_reset; -#[doc = "TIM_CLK_ENABLE (rw) register accessor: TIM Enable Control\n\nYou can [`read`](crate::Reg::read) this register and get [`tim_clk_enable::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tim_clk_enable::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tim_clk_enable`] -module"] +#[doc = "TIM_CLK_ENABLE (rw) register accessor: TIM Enable Control\n\nYou can [`read`](crate::Reg::read) this register and get [`tim_clk_enable::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tim_clk_enable::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tim_clk_enable`] module"] #[doc(alias = "TIM_CLK_ENABLE")] pub type TimClkEnable = crate::Reg; #[doc = "TIM Enable Control"] pub mod tim_clk_enable; -#[doc = "PERIPHERAL_RESET (rw) register accessor: Peripheral Reset Control\n\nYou can [`read`](crate::Reg::read) this register and get [`peripheral_reset::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`peripheral_reset::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@peripheral_reset`] -module"] +#[doc = "PERIPHERAL_RESET (rw) register accessor: Peripheral Reset Control\n\nYou can [`read`](crate::Reg::read) this register and get [`peripheral_reset::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`peripheral_reset::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@peripheral_reset`] module"] #[doc(alias = "PERIPHERAL_RESET")] pub type PeripheralReset = crate::Reg; #[doc = "Peripheral Reset Control"] pub mod peripheral_reset; pub use peripheral_reset as peripheral_clk_enable; pub use PeripheralReset as PeripheralClkEnable; -#[doc = "SPW_M4_CTRL (rw) register accessor: SPW M4 control register\n\nYou can [`read`](crate::Reg::read) this register and get [`spw_m4_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`spw_m4_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@spw_m4_ctrl`] -module"] +#[doc = "SPW_M4_CTRL (rw) register accessor: SPW M4 control register\n\nYou can [`read`](crate::Reg::read) this register and get [`spw_m4_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`spw_m4_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@spw_m4_ctrl`] module"] #[doc(alias = "SPW_M4_CTRL")] pub type SpwM4Ctrl = crate::Reg; #[doc = "SPW M4 control register"] pub mod spw_m4_ctrl; -#[doc = "PMU_CTRL (rw) register accessor: PMU Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pmu_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pmu_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pmu_ctrl`] -module"] +#[doc = "PMU_CTRL (rw) register accessor: PMU Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pmu_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pmu_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pmu_ctrl`] module"] #[doc(alias = "PMU_CTRL")] pub type PmuCtrl = crate::Reg; #[doc = "PMU Control Register"] pub mod pmu_ctrl; -#[doc = "WAKEUP_CNT (rw) register accessor: Wakeup Control\n\nYou can [`read`](crate::Reg::read) this register and get [`wakeup_cnt::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wakeup_cnt::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wakeup_cnt`] -module"] +#[doc = "WAKEUP_CNT (rw) register accessor: Wakeup Control\n\nYou can [`read`](crate::Reg::read) this register and get [`wakeup_cnt::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wakeup_cnt::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wakeup_cnt`] module"] #[doc(alias = "WAKEUP_CNT")] pub type WakeupCnt = crate::Reg; #[doc = "Wakeup Control"] pub mod wakeup_cnt; -#[doc = "EBI_CFG0 (rw) register accessor: EBI Config Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`ebi_cfg0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ebi_cfg0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ebi_cfg0`] -module"] +#[doc = "EBI_CFG0 (rw) register accessor: EBI Config Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`ebi_cfg0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ebi_cfg0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ebi_cfg0`] module"] #[doc(alias = "EBI_CFG0")] pub type EbiCfg0 = crate::Reg; #[doc = "EBI Config Register 0"] @@ -403,92 +388,77 @@ pub use ebi_cfg0 as ebi_cfg3; pub use EbiCfg0 as EbiCfg1; pub use EbiCfg0 as EbiCfg2; pub use EbiCfg0 as EbiCfg3; -#[doc = "ANALOG_CNTL (rw) register accessor: Analog Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`analog_cntl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`analog_cntl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@analog_cntl`] -module"] +#[doc = "ANALOG_CNTL (rw) register accessor: Analog Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`analog_cntl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`analog_cntl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@analog_cntl`] module"] #[doc(alias = "ANALOG_CNTL")] pub type AnalogCntl = crate::Reg; #[doc = "Analog Control Register"] pub mod analog_cntl; -#[doc = "SW_CLKDIV10 (rw) register accessor: Initial SpW Clock Divider Value\n\nYou can [`read`](crate::Reg::read) this register and get [`sw_clkdiv10::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sw_clkdiv10::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sw_clkdiv10`] -module"] +#[doc = "SW_CLKDIV10 (rw) register accessor: Initial SpW Clock Divider Value\n\nYou can [`read`](crate::Reg::read) this register and get [`sw_clkdiv10::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sw_clkdiv10::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sw_clkdiv10`] module"] #[doc(alias = "SW_CLKDIV10")] pub type SwClkdiv10 = crate::Reg; #[doc = "Initial SpW Clock Divider Value"] pub mod sw_clkdiv10; -#[doc = "REFRESH_CONFIG_L (rw) register accessor: Register Refresh Rate for TMR registers\n\nYou can [`read`](crate::Reg::read) this register and get [`refresh_config_l::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`refresh_config_l::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@refresh_config_l`] -module"] +#[doc = "REFRESH_CONFIG_L (rw) register accessor: Register Refresh Rate for TMR registers\n\nYou can [`read`](crate::Reg::read) this register and get [`refresh_config_l::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`refresh_config_l::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@refresh_config_l`] module"] #[doc(alias = "REFRESH_CONFIG_L")] pub type RefreshConfigL = crate::Reg; #[doc = "Register Refresh Rate for TMR registers"] pub mod refresh_config_l; -#[doc = "DAC0_CAL (r) register accessor: DAC0 Calibration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dac0_cal::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dac0_cal`] -module"] +#[doc = "DAC0_CAL (r) register accessor: DAC0 Calibration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dac0_cal::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dac0_cal`] module"] #[doc(alias = "DAC0_CAL")] pub type Dac0Cal = crate::Reg; #[doc = "DAC0 Calibration Register"] pub mod dac0_cal; -#[doc = "DAC1_CAL (r) register accessor: DAC1 Calibration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dac1_cal::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dac1_cal`] -module"] +#[doc = "DAC1_CAL (r) register accessor: DAC1 Calibration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dac1_cal::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dac1_cal`] module"] #[doc(alias = "DAC1_CAL")] pub type Dac1Cal = crate::Reg; #[doc = "DAC1 Calibration Register"] pub mod dac1_cal; -#[doc = "ADC_CAL (r) register accessor: ADC Calibration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`adc_cal::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@adc_cal`] -module"] +#[doc = "ADC_CAL (r) register accessor: ADC Calibration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`adc_cal::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@adc_cal`] module"] #[doc(alias = "ADC_CAL")] pub type AdcCal = crate::Reg; #[doc = "ADC Calibration Register"] pub mod adc_cal; -#[doc = "BG_CAL (r) register accessor: Bandgap Calibration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`bg_cal::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bg_cal`] -module"] +#[doc = "BG_CAL (r) register accessor: Bandgap Calibration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`bg_cal::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bg_cal`] module"] #[doc(alias = "BG_CAL")] pub type BgCal = crate::Reg; #[doc = "Bandgap Calibration Register"] pub mod bg_cal; -#[doc = "DREG_CAL (r) register accessor: Digital LDO Regulator Calibration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dreg_cal::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dreg_cal`] -module"] +#[doc = "DREG_CAL (r) register accessor: Digital LDO Regulator Calibration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dreg_cal::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dreg_cal`] module"] #[doc(alias = "DREG_CAL")] pub type DregCal = crate::Reg; #[doc = "Digital LDO Regulator Calibration Register"] pub mod dreg_cal; -#[doc = "AREG_CAL (r) register accessor: Analog LDO Regulator Calibration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`areg_cal::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@areg_cal`] -module"] +#[doc = "AREG_CAL (r) register accessor: Analog LDO Regulator Calibration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`areg_cal::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@areg_cal`] module"] #[doc(alias = "AREG_CAL")] pub type AregCal = crate::Reg; #[doc = "Analog LDO Regulator Calibration Register"] pub mod areg_cal; -#[doc = "HBO_CAL (r) register accessor: Heart Beat OSC Calibration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`hbo_cal::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hbo_cal`] -module"] +#[doc = "HBO_CAL (r) register accessor: Heart Beat OSC Calibration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`hbo_cal::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hbo_cal`] module"] #[doc(alias = "HBO_CAL")] pub type HboCal = crate::Reg; #[doc = "Heart Beat OSC Calibration Register"] pub mod hbo_cal; -#[doc = "EF_CONFIG (r) register accessor: EFuse Config Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ef_config::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ef_config`] -module"] +#[doc = "EF_CONFIG (r) register accessor: EFuse Config Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ef_config::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ef_config`] module"] #[doc(alias = "EF_CONFIG")] pub type EfConfig = crate::Reg; #[doc = "EFuse Config Register"] pub mod ef_config; -#[doc = "EF_ID0 (r) register accessor: EFuse ID0 Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ef_id0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ef_id0`] -module"] +#[doc = "EF_ID0 (r) register accessor: EFuse ID0 Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ef_id0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ef_id0`] module"] #[doc(alias = "EF_ID0")] pub type EfId0 = crate::Reg; #[doc = "EFuse ID0 Register"] pub mod ef_id0; -#[doc = "EF_ID1 (r) register accessor: EFuse ID1 Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ef_id1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ef_id1`] -module"] +#[doc = "EF_ID1 (r) register accessor: EFuse ID1 Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ef_id1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ef_id1`] module"] #[doc(alias = "EF_ID1")] pub type EfId1 = crate::Reg; #[doc = "EFuse ID1 Register"] pub mod ef_id1; -#[doc = "PROCID (r) register accessor: Processor ID Register\n\nYou can [`read`](crate::Reg::read) this register and get [`procid::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@procid`] -module"] +#[doc = "PROCID (r) register accessor: Processor ID Register\n\nYou can [`read`](crate::Reg::read) this register and get [`procid::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@procid`] module"] #[doc(alias = "PROCID")] pub type Procid = crate::Reg; #[doc = "Processor ID Register"] pub mod procid; -#[doc = "PERID (r) register accessor: Peripheral ID Register\n\nYou can [`read`](crate::Reg::read) this register and get [`perid::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@perid`] -module"] +#[doc = "PERID (r) register accessor: Peripheral ID Register\n\nYou can [`read`](crate::Reg::read) this register and get [`perid::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@perid`] module"] #[doc(alias = "PERID")] pub type Perid = crate::Reg; #[doc = "Peripheral ID Register"] diff --git a/va416xx/src/sysconfig/adc_cal.rs b/va416xx/src/sysconfig/adc_cal.rs index 079a8a0..7ea8670 100644 --- a/va416xx/src/sysconfig/adc_cal.rs +++ b/va416xx/src/sysconfig/adc_cal.rs @@ -17,6 +17,4 @@ impl crate::RegisterSpec for AdcCalSpec { #[doc = "`read()` method returns [`adc_cal::R`](R) reader structure"] impl crate::Readable for AdcCalSpec {} #[doc = "`reset()` method sets ADC_CAL to value 0"] -impl crate::Resettable for AdcCalSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for AdcCalSpec {} diff --git a/va416xx/src/sysconfig/analog_cntl.rs b/va416xx/src/sysconfig/analog_cntl.rs index 5763009..7c403b8 100644 --- a/va416xx/src/sysconfig/analog_cntl.rs +++ b/va416xx/src/sysconfig/analog_cntl.rs @@ -133,72 +133,72 @@ impl R { impl W { #[doc = "Bit 0 - Test Mode"] #[inline(always)] - pub fn tmosc(&mut self) -> TmoscW { + pub fn tmosc(&mut self) -> TmoscW<'_, AnalogCntlSpec> { TmoscW::new(self, 0) } #[doc = "Bit 1 - Test Mode"] #[inline(always)] - pub fn tmpokdis(&mut self) -> TmpokdisW { + pub fn tmpokdis(&mut self) -> TmpokdisW<'_, AnalogCntlSpec> { TmpokdisW::new(self, 1) } #[doc = "Bit 2 - Test Mode"] #[inline(always)] - pub fn tm_adcmux_n(&mut self) -> TmAdcmuxNW { + pub fn tm_adcmux_n(&mut self) -> TmAdcmuxNW<'_, AnalogCntlSpec> { TmAdcmuxNW::new(self, 2) } #[doc = "Bit 3 - Test Mode"] #[inline(always)] - pub fn tm_adcmux_p(&mut self) -> TmAdcmuxPW { + pub fn tm_adcmux_p(&mut self) -> TmAdcmuxPW<'_, AnalogCntlSpec> { TmAdcmuxPW::new(self, 3) } #[doc = "Bit 4 - Test Mode"] #[inline(always)] - pub fn tmratio(&mut self) -> TmratioW { + pub fn tmratio(&mut self) -> TmratioW<'_, AnalogCntlSpec> { TmratioW::new(self, 4) } #[doc = "Bits 5:6 - Test Mode"] #[inline(always)] - pub fn tmatomux(&mut self) -> TmatomuxW { + pub fn tmatomux(&mut self) -> TmatomuxW<'_, AnalogCntlSpec> { TmatomuxW::new(self, 5) } #[doc = "Bits 9:12 - Number of clocks for sample time"] #[inline(always)] - pub fn adc_stest(&mut self) -> AdcStestW { + pub fn adc_stest(&mut self) -> AdcStestW<'_, AnalogCntlSpec> { AdcStestW::new(self, 9) } #[doc = "Bit 14 - Enable normal test clock"] #[inline(always)] - pub fn rclk_pos_en(&mut self) -> RclkPosEnW { + pub fn rclk_pos_en(&mut self) -> RclkPosEnW<'_, AnalogCntlSpec> { RclkPosEnW::new(self, 14) } #[doc = "Bit 15 - Enable inverted test clock"] #[inline(always)] - pub fn rclk_neg_en(&mut self) -> RclkNegEnW { + pub fn rclk_neg_en(&mut self) -> RclkNegEnW<'_, AnalogCntlSpec> { RclkNegEnW::new(self, 15) } #[doc = "Bit 16 - Enable normal APB2CLK for test output"] #[inline(always)] - pub fn apb2clk_pos_en(&mut self) -> Apb2clkPosEnW { + pub fn apb2clk_pos_en(&mut self) -> Apb2clkPosEnW<'_, AnalogCntlSpec> { Apb2clkPosEnW::new(self, 16) } #[doc = "Bit 17 - Enable inverted APB2CLK for test output"] #[inline(always)] - pub fn apb2clk_neg_en(&mut self) -> Apb2clkNegEnW { + pub fn apb2clk_neg_en(&mut self) -> Apb2clkNegEnW<'_, AnalogCntlSpec> { Apb2clkNegEnW::new(self, 17) } #[doc = "Bit 18 - Enables pull down on analog pads"] #[inline(always)] - pub fn tm_analog_pd_en(&mut self) -> TmAnalogPdEnW { + pub fn tm_analog_pd_en(&mut self) -> TmAnalogPdEnW<'_, AnalogCntlSpec> { TmAnalogPdEnW::new(self, 18) } #[doc = "Bit 19 - Enables a skip of all delay counters and eFuse read"] #[inline(always)] - pub fn jmp2boot(&mut self) -> Jmp2bootW { + pub fn jmp2boot(&mut self) -> Jmp2bootW<'_, AnalogCntlSpec> { Jmp2bootW::new(self, 19) } #[doc = "Bit 20 - Enables a skip of all delay counters, eFuse read, and boot"] #[inline(always)] - pub fn skipboot(&mut self) -> SkipbootW { + pub fn skipboot(&mut self) -> SkipbootW<'_, AnalogCntlSpec> { SkipbootW::new(self, 20) } } @@ -212,10 +212,6 @@ impl crate::Readable for AnalogCntlSpec {} #[doc = "`write(|w| ..)` method takes [`analog_cntl::W`](W) writer structure"] impl crate::Writable for AnalogCntlSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ANALOG_CNTL to value 0"] -impl crate::Resettable for AnalogCntlSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for AnalogCntlSpec {} diff --git a/va416xx/src/sysconfig/areg_cal.rs b/va416xx/src/sysconfig/areg_cal.rs index d217f7a..109c377 100644 --- a/va416xx/src/sysconfig/areg_cal.rs +++ b/va416xx/src/sysconfig/areg_cal.rs @@ -17,6 +17,4 @@ impl crate::RegisterSpec for AregCalSpec { #[doc = "`read()` method returns [`areg_cal::R`](R) reader structure"] impl crate::Readable for AregCalSpec {} #[doc = "`reset()` method sets AREG_CAL to value 0"] -impl crate::Resettable for AregCalSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for AregCalSpec {} diff --git a/va416xx/src/sysconfig/bg_cal.rs b/va416xx/src/sysconfig/bg_cal.rs index c109c9a..4c90b2b 100644 --- a/va416xx/src/sysconfig/bg_cal.rs +++ b/va416xx/src/sysconfig/bg_cal.rs @@ -17,6 +17,4 @@ impl crate::RegisterSpec for BgCalSpec { #[doc = "`read()` method returns [`bg_cal::R`](R) reader structure"] impl crate::Readable for BgCalSpec {} #[doc = "`reset()` method sets BG_CAL to value 0"] -impl crate::Resettable for BgCalSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for BgCalSpec {} diff --git a/va416xx/src/sysconfig/dac0_cal.rs b/va416xx/src/sysconfig/dac0_cal.rs index b7e07ae..29ea22f 100644 --- a/va416xx/src/sysconfig/dac0_cal.rs +++ b/va416xx/src/sysconfig/dac0_cal.rs @@ -17,6 +17,4 @@ impl crate::RegisterSpec for Dac0CalSpec { #[doc = "`read()` method returns [`dac0_cal::R`](R) reader structure"] impl crate::Readable for Dac0CalSpec {} #[doc = "`reset()` method sets DAC0_CAL to value 0"] -impl crate::Resettable for Dac0CalSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Dac0CalSpec {} diff --git a/va416xx/src/sysconfig/dac1_cal.rs b/va416xx/src/sysconfig/dac1_cal.rs index 800c47f..26680cc 100644 --- a/va416xx/src/sysconfig/dac1_cal.rs +++ b/va416xx/src/sysconfig/dac1_cal.rs @@ -17,6 +17,4 @@ impl crate::RegisterSpec for Dac1CalSpec { #[doc = "`read()` method returns [`dac1_cal::R`](R) reader structure"] impl crate::Readable for Dac1CalSpec {} #[doc = "`reset()` method sets DAC1_CAL to value 0"] -impl crate::Resettable for Dac1CalSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Dac1CalSpec {} diff --git a/va416xx/src/sysconfig/dreg_cal.rs b/va416xx/src/sysconfig/dreg_cal.rs index e4dfa09..e43b927 100644 --- a/va416xx/src/sysconfig/dreg_cal.rs +++ b/va416xx/src/sysconfig/dreg_cal.rs @@ -17,6 +17,4 @@ impl crate::RegisterSpec for DregCalSpec { #[doc = "`read()` method returns [`dreg_cal::R`](R) reader structure"] impl crate::Readable for DregCalSpec {} #[doc = "`reset()` method sets DREG_CAL to value 0"] -impl crate::Resettable for DregCalSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for DregCalSpec {} diff --git a/va416xx/src/sysconfig/ebi_cfg0.rs b/va416xx/src/sysconfig/ebi_cfg0.rs index 27b763e..af6863f 100644 --- a/va416xx/src/sysconfig/ebi_cfg0.rs +++ b/va416xx/src/sysconfig/ebi_cfg0.rs @@ -61,32 +61,32 @@ impl R { impl W { #[doc = "Bits 0:7 - Lower bound address for CEN0"] #[inline(always)] - pub fn addrlow0(&mut self) -> Addrlow0W { + pub fn addrlow0(&mut self) -> Addrlow0W<'_, EbiCfg0Spec> { Addrlow0W::new(self, 0) } #[doc = "Bits 8:15 - Upper bound address for CEN0"] #[inline(always)] - pub fn addrhigh0(&mut self) -> Addrhigh0W { + pub fn addrhigh0(&mut self) -> Addrhigh0W<'_, EbiCfg0Spec> { Addrhigh0W::new(self, 8) } #[doc = "Bits 16:18 - Number of cycles for a read - N plus 1"] #[inline(always)] - pub fn cfgreadcycle(&mut self) -> CfgreadcycleW { + pub fn cfgreadcycle(&mut self) -> CfgreadcycleW<'_, EbiCfg0Spec> { CfgreadcycleW::new(self, 16) } #[doc = "Bits 19:21 - Number of cycles for a write - N plus 1"] #[inline(always)] - pub fn cfgwritecycle(&mut self) -> CfgwritecycleW { + pub fn cfgwritecycle(&mut self) -> CfgwritecycleW<'_, EbiCfg0Spec> { CfgwritecycleW::new(self, 19) } #[doc = "Bits 22:24 - Number of cycles for turnaround - N plus 1"] #[inline(always)] - pub fn cfgturnaroundcycle(&mut self) -> CfgturnaroundcycleW { + pub fn cfgturnaroundcycle(&mut self) -> CfgturnaroundcycleW<'_, EbiCfg0Spec> { CfgturnaroundcycleW::new(self, 22) } #[doc = "Bit 25 - 8 bit (0) or 16 bit (1) port size"] #[inline(always)] - pub fn cfgsize(&mut self) -> CfgsizeW { + pub fn cfgsize(&mut self) -> CfgsizeW<'_, EbiCfg0Spec> { CfgsizeW::new(self, 25) } } @@ -100,10 +100,6 @@ impl crate::Readable for EbiCfg0Spec {} #[doc = "`write(|w| ..)` method takes [`ebi_cfg0::W`](W) writer structure"] impl crate::Writable for EbiCfg0Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EBI_CFG0 to value 0"] -impl crate::Resettable for EbiCfg0Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for EbiCfg0Spec {} diff --git a/va416xx/src/sysconfig/ef_id0.rs b/va416xx/src/sysconfig/ef_id0.rs index ff1d078..7e5988c 100644 --- a/va416xx/src/sysconfig/ef_id0.rs +++ b/va416xx/src/sysconfig/ef_id0.rs @@ -14,6 +14,4 @@ impl crate::RegisterSpec for EfId0Spec { #[doc = "`read()` method returns [`ef_id0::R`](R) reader structure"] impl crate::Readable for EfId0Spec {} #[doc = "`reset()` method sets EF_ID0 to value 0"] -impl crate::Resettable for EfId0Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for EfId0Spec {} diff --git a/va416xx/src/sysconfig/ef_id1.rs b/va416xx/src/sysconfig/ef_id1.rs index 08aa933..eb6816c 100644 --- a/va416xx/src/sysconfig/ef_id1.rs +++ b/va416xx/src/sysconfig/ef_id1.rs @@ -14,6 +14,4 @@ impl crate::RegisterSpec for EfId1Spec { #[doc = "`read()` method returns [`ef_id1::R`](R) reader structure"] impl crate::Readable for EfId1Spec {} #[doc = "`reset()` method sets EF_ID1 to value 0"] -impl crate::Resettable for EfId1Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for EfId1Spec {} diff --git a/va416xx/src/sysconfig/hbo_cal.rs b/va416xx/src/sysconfig/hbo_cal.rs index b88ca62..c715344 100644 --- a/va416xx/src/sysconfig/hbo_cal.rs +++ b/va416xx/src/sysconfig/hbo_cal.rs @@ -24,6 +24,4 @@ impl crate::RegisterSpec for HboCalSpec { #[doc = "`read()` method returns [`hbo_cal::R`](R) reader structure"] impl crate::Readable for HboCalSpec {} #[doc = "`reset()` method sets HBO_CAL to value 0"] -impl crate::Resettable for HboCalSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for HboCalSpec {} diff --git a/va416xx/src/sysconfig/irq_enb.rs b/va416xx/src/sysconfig/irq_enb.rs index 97d7103..e355f19 100644 --- a/va416xx/src/sysconfig/irq_enb.rs +++ b/va416xx/src/sysconfig/irq_enb.rs @@ -61,32 +61,32 @@ impl R { impl W { #[doc = "Bit 0 - ROM Multi Bit Interrupt"] #[inline(always)] - pub fn rommbe(&mut self) -> RommbeW { + pub fn rommbe(&mut self) -> RommbeW<'_, IrqEnbSpec> { RommbeW::new(self, 0) } #[doc = "Bit 1 - ROM Single Bit Interrupt"] #[inline(always)] - pub fn romsbe(&mut self) -> RomsbeW { + pub fn romsbe(&mut self) -> RomsbeW<'_, IrqEnbSpec> { RomsbeW::new(self, 1) } #[doc = "Bit 2 - RAM0 Multi Bit Interrupt"] #[inline(always)] - pub fn ram0mbe(&mut self) -> Ram0mbeW { + pub fn ram0mbe(&mut self) -> Ram0mbeW<'_, IrqEnbSpec> { Ram0mbeW::new(self, 2) } #[doc = "Bit 3 - RAM0 Single Bit Interrupt"] #[inline(always)] - pub fn ram0sbe(&mut self) -> Ram0sbeW { + pub fn ram0sbe(&mut self) -> Ram0sbeW<'_, IrqEnbSpec> { Ram0sbeW::new(self, 3) } #[doc = "Bit 4 - RAM1 Multi Bit Interrupt"] #[inline(always)] - pub fn ram1mbe(&mut self) -> Ram1mbeW { + pub fn ram1mbe(&mut self) -> Ram1mbeW<'_, IrqEnbSpec> { Ram1mbeW::new(self, 4) } #[doc = "Bit 5 - RAM1 Single Bit Interrupt"] #[inline(always)] - pub fn ram1sbe(&mut self) -> Ram1sbeW { + pub fn ram1sbe(&mut self) -> Ram1sbeW<'_, IrqEnbSpec> { Ram1sbeW::new(self, 5) } } @@ -100,10 +100,6 @@ impl crate::Readable for IrqEnbSpec {} #[doc = "`write(|w| ..)` method takes [`irq_enb::W`](W) writer structure"] impl crate::Writable for IrqEnbSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IRQ_ENB to value 0"] -impl crate::Resettable for IrqEnbSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for IrqEnbSpec {} diff --git a/va416xx/src/sysconfig/peripheral_reset.rs b/va416xx/src/sysconfig/peripheral_reset.rs index 779f4bc..3d03aff 100644 --- a/va416xx/src/sysconfig/peripheral_reset.rs +++ b/va416xx/src/sysconfig/peripheral_reset.rs @@ -286,157 +286,157 @@ impl R { impl W { #[doc = "Bit 0 - Resetn of SPI0"] #[inline(always)] - pub fn spi0(&mut self) -> Spi0W { + pub fn spi0(&mut self) -> Spi0W<'_, PeripheralResetSpec> { Spi0W::new(self, 0) } #[doc = "Bit 1 - Resetn of SPI1"] #[inline(always)] - pub fn spi1(&mut self) -> Spi1W { + pub fn spi1(&mut self) -> Spi1W<'_, PeripheralResetSpec> { Spi1W::new(self, 1) } #[doc = "Bit 2 - Resetn of SPI2"] #[inline(always)] - pub fn spi2(&mut self) -> Spi2W { + pub fn spi2(&mut self) -> Spi2W<'_, PeripheralResetSpec> { Spi2W::new(self, 2) } #[doc = "Bit 3 - Resetn of SPI3"] #[inline(always)] - pub fn spi3(&mut self) -> Spi3W { + pub fn spi3(&mut self) -> Spi3W<'_, PeripheralResetSpec> { Spi3W::new(self, 3) } #[doc = "Bit 4 - Resetn of UART0"] #[inline(always)] - pub fn uart0(&mut self) -> Uart0W { + pub fn uart0(&mut self) -> Uart0W<'_, PeripheralResetSpec> { Uart0W::new(self, 4) } #[doc = "Bit 5 - Resetn of UART1"] #[inline(always)] - pub fn uart1(&mut self) -> Uart1W { + pub fn uart1(&mut self) -> Uart1W<'_, PeripheralResetSpec> { Uart1W::new(self, 5) } #[doc = "Bit 6 - Resetn of UART2"] #[inline(always)] - pub fn uart2(&mut self) -> Uart2W { + pub fn uart2(&mut self) -> Uart2W<'_, PeripheralResetSpec> { Uart2W::new(self, 6) } #[doc = "Bit 7 - Resetn of I2C0"] #[inline(always)] - pub fn i2c0(&mut self) -> I2c0W { + pub fn i2c0(&mut self) -> I2c0W<'_, PeripheralResetSpec> { I2c0W::new(self, 7) } #[doc = "Bit 8 - Resetn of I2C1"] #[inline(always)] - pub fn i2c1(&mut self) -> I2c1W { + pub fn i2c1(&mut self) -> I2c1W<'_, PeripheralResetSpec> { I2c1W::new(self, 8) } #[doc = "Bit 9 - Resetn of I2C2"] #[inline(always)] - pub fn i2c2(&mut self) -> I2c2W { + pub fn i2c2(&mut self) -> I2c2W<'_, PeripheralResetSpec> { I2c2W::new(self, 9) } #[doc = "Bit 10 - Resetn of CAN0"] #[inline(always)] - pub fn can0(&mut self) -> Can0W { + pub fn can0(&mut self) -> Can0W<'_, PeripheralResetSpec> { Can0W::new(self, 10) } #[doc = "Bit 11 - Resetn of CAN1"] #[inline(always)] - pub fn can1(&mut self) -> Can1W { + pub fn can1(&mut self) -> Can1W<'_, PeripheralResetSpec> { Can1W::new(self, 11) } #[doc = "Bit 12 - Resetn of TRNG"] #[inline(always)] - pub fn trng(&mut self) -> TrngW { + pub fn trng(&mut self) -> TrngW<'_, PeripheralResetSpec> { TrngW::new(self, 12) } #[doc = "Bit 13 - Resetn of ADC"] #[inline(always)] - pub fn adc(&mut self) -> AdcW { + pub fn adc(&mut self) -> AdcW<'_, PeripheralResetSpec> { AdcW::new(self, 13) } #[doc = "Bit 14 - Resetn of DAC"] #[inline(always)] - pub fn dac(&mut self) -> DacW { + pub fn dac(&mut self) -> DacW<'_, PeripheralResetSpec> { DacW::new(self, 14) } #[doc = "Bit 15 - Resetn of DMA"] #[inline(always)] - pub fn dma(&mut self) -> DmaW { + pub fn dma(&mut self) -> DmaW<'_, PeripheralResetSpec> { DmaW::new(self, 15) } #[doc = "Bit 16 - Resetn of EBI"] #[inline(always)] - pub fn ebi(&mut self) -> EbiW { + pub fn ebi(&mut self) -> EbiW<'_, PeripheralResetSpec> { EbiW::new(self, 16) } #[doc = "Bit 17 - Resetn of Ethernet"] #[inline(always)] - pub fn eth(&mut self) -> EthW { + pub fn eth(&mut self) -> EthW<'_, PeripheralResetSpec> { EthW::new(self, 17) } #[doc = "Bit 18 - Resetn of SpaceWire"] #[inline(always)] - pub fn spw(&mut self) -> SpwW { + pub fn spw(&mut self) -> SpwW<'_, PeripheralResetSpec> { SpwW::new(self, 18) } #[doc = "Bit 19 - RESETn of PLL in Clock Generation Module"] #[inline(always)] - pub fn clkgen(&mut self) -> ClkgenW { + pub fn clkgen(&mut self) -> ClkgenW<'_, PeripheralResetSpec> { ClkgenW::new(self, 19) } #[doc = "Bit 20 - Resetn of IRQ Router"] #[inline(always)] - pub fn irq(&mut self) -> IrqW { + pub fn irq(&mut self) -> IrqW<'_, PeripheralResetSpec> { IrqW::new(self, 20) } #[doc = "Bit 21 - Resetn of IO CONFIG"] #[inline(always)] - pub fn ioconfig(&mut self) -> IoconfigW { + pub fn ioconfig(&mut self) -> IoconfigW<'_, PeripheralResetSpec> { IoconfigW::new(self, 21) } #[doc = "Bit 22 - Resetn of UTILITY peripheral"] #[inline(always)] - pub fn utility(&mut self) -> UtilityW { + pub fn utility(&mut self) -> UtilityW<'_, PeripheralResetSpec> { UtilityW::new(self, 22) } #[doc = "Bit 23 - Resetn of WDOG"] #[inline(always)] - pub fn wdog(&mut self) -> WdogW { + pub fn wdog(&mut self) -> WdogW<'_, PeripheralResetSpec> { WdogW::new(self, 23) } #[doc = "Bit 24 - Resetn of PORTA"] #[inline(always)] - pub fn porta(&mut self) -> PortaW { + pub fn porta(&mut self) -> PortaW<'_, PeripheralResetSpec> { PortaW::new(self, 24) } #[doc = "Bit 25 - Resetn of PORTB"] #[inline(always)] - pub fn portb(&mut self) -> PortbW { + pub fn portb(&mut self) -> PortbW<'_, PeripheralResetSpec> { PortbW::new(self, 25) } #[doc = "Bit 26 - Resetn of PORTC"] #[inline(always)] - pub fn portc(&mut self) -> PortcW { + pub fn portc(&mut self) -> PortcW<'_, PeripheralResetSpec> { PortcW::new(self, 26) } #[doc = "Bit 27 - Resetn of PORTD"] #[inline(always)] - pub fn portd(&mut self) -> PortdW { + pub fn portd(&mut self) -> PortdW<'_, PeripheralResetSpec> { PortdW::new(self, 27) } #[doc = "Bit 28 - Resetn of PORTE"] #[inline(always)] - pub fn porte(&mut self) -> PorteW { + pub fn porte(&mut self) -> PorteW<'_, PeripheralResetSpec> { PorteW::new(self, 28) } #[doc = "Bit 29 - Resetn of PORTF"] #[inline(always)] - pub fn portf(&mut self) -> PortfW { + pub fn portf(&mut self) -> PortfW<'_, PeripheralResetSpec> { PortfW::new(self, 29) } #[doc = "Bit 30 - Resetn of PORTG"] #[inline(always)] - pub fn portg(&mut self) -> PortgW { + pub fn portg(&mut self) -> PortgW<'_, PeripheralResetSpec> { PortgW::new(self, 30) } } @@ -450,8 +450,6 @@ impl crate::Readable for PeripheralResetSpec {} #[doc = "`write(|w| ..)` method takes [`peripheral_reset::W`](W) writer structure"] impl crate::Writable for PeripheralResetSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PERIPHERAL_RESET to value 0x7f7b_efff"] impl crate::Resettable for PeripheralResetSpec { diff --git a/va416xx/src/sysconfig/pmu_ctrl.rs b/va416xx/src/sysconfig/pmu_ctrl.rs index 3c43eb9..868f445 100644 --- a/va416xx/src/sysconfig/pmu_ctrl.rs +++ b/va416xx/src/sysconfig/pmu_ctrl.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:1 - Select the POK detect level"] #[inline(always)] - pub fn lvl_slct(&mut self) -> LvlSlctW { + pub fn lvl_slct(&mut self) -> LvlSlctW<'_, PmuCtrlSpec> { LvlSlctW::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for PmuCtrlSpec {} #[doc = "`write(|w| ..)` method takes [`pmu_ctrl::W`](W) writer structure"] impl crate::Writable for PmuCtrlSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PMU_CTRL to value 0"] -impl crate::Resettable for PmuCtrlSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for PmuCtrlSpec {} diff --git a/va416xx/src/sysconfig/ram0_mbe.rs b/va416xx/src/sysconfig/ram0_mbe.rs index 0b5d27d..ea876c8 100644 --- a/va416xx/src/sysconfig/ram0_mbe.rs +++ b/va416xx/src/sysconfig/ram0_mbe.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:15 - RAM0 Multi Bit Errors"] #[inline(always)] - pub fn count(&mut self) -> CountW { + pub fn count(&mut self) -> CountW<'_, Ram0MbeSpec> { CountW::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for Ram0MbeSpec {} #[doc = "`write(|w| ..)` method takes [`ram0_mbe::W`](W) writer structure"] impl crate::Writable for Ram0MbeSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RAM0_MBE to value 0"] -impl crate::Resettable for Ram0MbeSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Ram0MbeSpec {} diff --git a/va416xx/src/sysconfig/ram0_sbe.rs b/va416xx/src/sysconfig/ram0_sbe.rs index 0cb384c..5eaddf8 100644 --- a/va416xx/src/sysconfig/ram0_sbe.rs +++ b/va416xx/src/sysconfig/ram0_sbe.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:15 - RAM0 EDAC Single Bit Errors"] #[inline(always)] - pub fn count(&mut self) -> CountW { + pub fn count(&mut self) -> CountW<'_, Ram0SbeSpec> { CountW::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for Ram0SbeSpec {} #[doc = "`write(|w| ..)` method takes [`ram0_sbe::W`](W) writer structure"] impl crate::Writable for Ram0SbeSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RAM0_SBE to value 0"] -impl crate::Resettable for Ram0SbeSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Ram0SbeSpec {} diff --git a/va416xx/src/sysconfig/refresh_config_h.rs b/va416xx/src/sysconfig/refresh_config_h.rs index 0c8909b..fc30ee6 100644 --- a/va416xx/src/sysconfig/refresh_config_h.rs +++ b/va416xx/src/sysconfig/refresh_config_h.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:7 - Upper 8-bits of the Refresh Rate Counter. Registers are refreshed every DIVCOUNT+1 cycles"] #[inline(always)] - pub fn divcount(&mut self) -> DivcountW { + pub fn divcount(&mut self) -> DivcountW<'_, RefreshConfigHSpec> { DivcountW::new(self, 0) } #[doc = "Bits 30:31 - Special Test Mode Configuration. 00/01=normal. 10=Force refresh off. 11=Force refresh on constantly."] #[inline(always)] - pub fn testmode(&mut self) -> TestmodeW { + pub fn testmode(&mut self) -> TestmodeW<'_, RefreshConfigHSpec> { TestmodeW::new(self, 30) } } @@ -44,10 +44,6 @@ impl crate::Readable for RefreshConfigHSpec {} #[doc = "`write(|w| ..)` method takes [`refresh_config_h::W`](W) writer structure"] impl crate::Writable for RefreshConfigHSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets REFRESH_CONFIG_H to value 0"] -impl crate::Resettable for RefreshConfigHSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for RefreshConfigHSpec {} diff --git a/va416xx/src/sysconfig/refresh_config_l.rs b/va416xx/src/sysconfig/refresh_config_l.rs index 8ab138f..0b46422 100644 --- a/va416xx/src/sysconfig/refresh_config_l.rs +++ b/va416xx/src/sysconfig/refresh_config_l.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:31 - Lower 32-bits of the Refresh Rate Counter. Registers are refreshed every DIVCOUNT+1 cycles"] #[inline(always)] - pub fn divcount(&mut self) -> DivcountW { + pub fn divcount(&mut self) -> DivcountW<'_, RefreshConfigLSpec> { DivcountW::new(self, 0) } } @@ -30,8 +30,6 @@ impl crate::Readable for RefreshConfigLSpec {} #[doc = "`write(|w| ..)` method takes [`refresh_config_l::W`](W) writer structure"] impl crate::Writable for RefreshConfigLSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets REFRESH_CONFIG_L to value 0x0f"] impl crate::Resettable for RefreshConfigLSpec { diff --git a/va416xx/src/sysconfig/rom_prot.rs b/va416xx/src/sysconfig/rom_prot.rs index 4206d2a..50fefab 100644 --- a/va416xx/src/sysconfig/rom_prot.rs +++ b/va416xx/src/sysconfig/rom_prot.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bit 0 - ROM Write Enable Bit"] #[inline(always)] - pub fn wren(&mut self) -> WrenW { + pub fn wren(&mut self) -> WrenW<'_, RomProtSpec> { WrenW::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for RomProtSpec {} #[doc = "`write(|w| ..)` method takes [`rom_prot::W`](W) writer structure"] impl crate::Writable for RomProtSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ROM_PROT to value 0"] -impl crate::Resettable for RomProtSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for RomProtSpec {} diff --git a/va416xx/src/sysconfig/rom_retries.rs b/va416xx/src/sysconfig/rom_retries.rs index cb7f32c..b86870a 100644 --- a/va416xx/src/sysconfig/rom_retries.rs +++ b/va416xx/src/sysconfig/rom_retries.rs @@ -17,6 +17,4 @@ impl crate::RegisterSpec for RomRetriesSpec { #[doc = "`read()` method returns [`rom_retries::R`](R) reader structure"] impl crate::Readable for RomRetriesSpec {} #[doc = "`reset()` method sets ROM_RETRIES to value 0"] -impl crate::Resettable for RomRetriesSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for RomRetriesSpec {} diff --git a/va416xx/src/sysconfig/rom_scrub.rs b/va416xx/src/sysconfig/rom_scrub.rs index 906cfdc..19de208 100644 --- a/va416xx/src/sysconfig/rom_scrub.rs +++ b/va416xx/src/sysconfig/rom_scrub.rs @@ -18,12 +18,12 @@ impl R { impl W { #[doc = "Bits 0:23 - Counter divide value"] #[inline(always)] - pub fn value(&mut self) -> ValueW { + pub fn value(&mut self) -> ValueW<'_, RomScrubSpec> { ValueW::new(self, 0) } #[doc = "Bit 31 - Reset Counter"] #[inline(always)] - pub fn reset(&mut self) -> ResetW { + pub fn reset(&mut self) -> ResetW<'_, RomScrubSpec> { ResetW::new(self, 31) } } @@ -37,10 +37,7 @@ impl crate::Readable for RomScrubSpec {} #[doc = "`write(|w| ..)` method takes [`rom_scrub::W`](W) writer structure"] impl crate::Writable for RomScrubSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0x8000_0000; } #[doc = "`reset()` method sets ROM_SCRUB to value 0"] -impl crate::Resettable for RomScrubSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for RomScrubSpec {} diff --git a/va416xx/src/sysconfig/rst_stat.rs b/va416xx/src/sysconfig/rst_stat.rs index 867d1da..fa2f66f 100644 --- a/va416xx/src/sysconfig/rst_stat.rs +++ b/va416xx/src/sysconfig/rst_stat.rs @@ -59,27 +59,27 @@ impl R { impl W { #[doc = "Bit 0 - Power On Reset Status"] #[inline(always)] - pub fn por(&mut self) -> PorW { + pub fn por(&mut self) -> PorW<'_, RstStatSpec> { PorW::new(self, 0) } #[doc = "Bit 1 - External Reset Status"] #[inline(always)] - pub fn extrst(&mut self) -> ExtrstW { + pub fn extrst(&mut self) -> ExtrstW<'_, RstStatSpec> { ExtrstW::new(self, 1) } #[doc = "Bit 2 - SYSRESETREQ Reset Status"] #[inline(always)] - pub fn sysrstreq(&mut self) -> SysrstreqW { + pub fn sysrstreq(&mut self) -> SysrstreqW<'_, RstStatSpec> { SysrstreqW::new(self, 2) } #[doc = "Bit 3 - LOOKUP Reset Status"] #[inline(always)] - pub fn lookup(&mut self) -> LookupW { + pub fn lookup(&mut self) -> LookupW<'_, RstStatSpec> { LookupW::new(self, 3) } #[doc = "Bit 4 - WATCHDOG Reset Status"] #[inline(always)] - pub fn watchdog(&mut self) -> WatchdogW { + pub fn watchdog(&mut self) -> WatchdogW<'_, RstStatSpec> { WatchdogW::new(self, 4) } } @@ -93,10 +93,6 @@ impl crate::Readable for RstStatSpec {} #[doc = "`write(|w| ..)` method takes [`rst_stat::W`](W) writer structure"] impl crate::Writable for RstStatSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RST_STAT to value 0"] -impl crate::Resettable for RstStatSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for RstStatSpec {} diff --git a/va416xx/src/sysconfig/spw_m4_ctrl.rs b/va416xx/src/sysconfig/spw_m4_ctrl.rs index 73d2d57..966a733 100644 --- a/va416xx/src/sysconfig/spw_m4_ctrl.rs +++ b/va416xx/src/sysconfig/spw_m4_ctrl.rs @@ -34,17 +34,17 @@ impl R { impl W { #[doc = "Bits 0:15 - Fuse-analog register writes enabled when key = 0xfeed"] #[inline(always)] - pub fn reg_wr_key(&mut self) -> RegWrKeyW { + pub fn reg_wr_key(&mut self) -> RegWrKeyW<'_, SpwM4CtrlSpec> { RegWrKeyW::new(self, 0) } #[doc = "Bit 16 - SPW pad enable"] #[inline(always)] - pub fn spw_pad_en(&mut self) -> SpwPadEnW { + pub fn spw_pad_en(&mut self) -> SpwPadEnW<'_, SpwM4CtrlSpec> { SpwPadEnW::new(self, 16) } #[doc = "Bit 17 - Lockup reset enable"] #[inline(always)] - pub fn lren(&mut self) -> LrenW { + pub fn lren(&mut self) -> LrenW<'_, SpwM4CtrlSpec> { LrenW::new(self, 17) } } @@ -58,8 +58,6 @@ impl crate::Readable for SpwM4CtrlSpec {} #[doc = "`write(|w| ..)` method takes [`spw_m4_ctrl::W`](W) writer structure"] impl crate::Writable for SpwM4CtrlSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SPW_M4_CTRL to value 0x0003_0000"] impl crate::Resettable for SpwM4CtrlSpec { diff --git a/va416xx/src/sysconfig/sw_clkdiv10.rs b/va416xx/src/sysconfig/sw_clkdiv10.rs index 09d0c03..a1aa6d6 100644 --- a/va416xx/src/sysconfig/sw_clkdiv10.rs +++ b/va416xx/src/sysconfig/sw_clkdiv10.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:7 - Defines the initial value for the SpW clock, defaults to divide by ten"] #[inline(always)] - pub fn sw_clkdiv10(&mut self) -> SwClkdiv10W { + pub fn sw_clkdiv10(&mut self) -> SwClkdiv10W<'_, SwClkdiv10Spec> { SwClkdiv10W::new(self, 0) } } @@ -30,8 +30,6 @@ impl crate::Readable for SwClkdiv10Spec {} #[doc = "`write(|w| ..)` method takes [`sw_clkdiv10::W`](W) writer structure"] impl crate::Writable for SwClkdiv10Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SW_CLKDIV10 to value 0x09"] impl crate::Resettable for SwClkdiv10Spec { diff --git a/va416xx/src/sysconfig/tim_clk_enable.rs b/va416xx/src/sysconfig/tim_clk_enable.rs index fda0be7..53c9a2a 100644 --- a/va416xx/src/sysconfig/tim_clk_enable.rs +++ b/va416xx/src/sysconfig/tim_clk_enable.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:23 - Clock enable of a given TIMER"] #[inline(always)] - pub fn timers(&mut self) -> TimersW { + pub fn timers(&mut self) -> TimersW<'_, TimClkEnableSpec> { TimersW::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for TimClkEnableSpec {} #[doc = "`write(|w| ..)` method takes [`tim_clk_enable::W`](W) writer structure"] impl crate::Writable for TimClkEnableSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIM_CLK_ENABLE to value 0"] -impl crate::Resettable for TimClkEnableSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for TimClkEnableSpec {} diff --git a/va416xx/src/sysconfig/tim_reset.rs b/va416xx/src/sysconfig/tim_reset.rs index 5c1dfdc..4f378f9 100644 --- a/va416xx/src/sysconfig/tim_reset.rs +++ b/va416xx/src/sysconfig/tim_reset.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:23 - Reset of a given TIMER"] #[inline(always)] - pub fn tim_reset(&mut self) -> TimResetW { + pub fn tim_reset(&mut self) -> TimResetW<'_, TimResetSpec> { TimResetW::new(self, 0) } } @@ -30,8 +30,6 @@ impl crate::Readable for TimResetSpec {} #[doc = "`write(|w| ..)` method takes [`tim_reset::W`](W) writer structure"] impl crate::Writable for TimResetSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIM_RESET to value 0xffff_ffff"] impl crate::Resettable for TimResetSpec { diff --git a/va416xx/src/sysconfig/wakeup_cnt.rs b/va416xx/src/sysconfig/wakeup_cnt.rs index b024e73..324af64 100644 --- a/va416xx/src/sysconfig/wakeup_cnt.rs +++ b/va416xx/src/sysconfig/wakeup_cnt.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:2 - Used to set a time to wake up the processor after the device has been put in a low power state"] #[inline(always)] - pub fn wkup_cnt(&mut self) -> WkupCntW { + pub fn wkup_cnt(&mut self) -> WkupCntW<'_, WakeupCntSpec> { WkupCntW::new(self, 0) } #[doc = "Bit 3 - Launch SLP mode in analog block"] #[inline(always)] - pub fn cntstrt(&mut self) -> CntstrtW { + pub fn cntstrt(&mut self) -> CntstrtW<'_, WakeupCntSpec> { CntstrtW::new(self, 3) } } @@ -44,8 +44,6 @@ impl crate::Readable for WakeupCntSpec {} #[doc = "`write(|w| ..)` method takes [`wakeup_cnt::W`](W) writer structure"] impl crate::Writable for WakeupCntSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets WAKEUP_CNT to value 0x07"] impl crate::Resettable for WakeupCntSpec { diff --git a/va416xx/src/tim0.rs b/va416xx/src/tim0.rs index b5931d7..5da31f8 100644 --- a/va416xx/src/tim0.rs +++ b/va416xx/src/tim0.rs @@ -76,38 +76,32 @@ impl RegisterBlock { &self.perid } } -#[doc = "CTRL (rw) register accessor: Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`] -module"] +#[doc = "CTRL (rw) register accessor: Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`] module"] #[doc(alias = "CTRL")] pub type Ctrl = crate::Reg; #[doc = "Control Register"] pub mod ctrl; -#[doc = "RST_VALUE (rw) register accessor: The value that counter start from after reaching 0.\n\nYou can [`read`](crate::Reg::read) this register and get [`rst_value::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rst_value::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rst_value`] -module"] +#[doc = "RST_VALUE (rw) register accessor: The value that counter start from after reaching 0.\n\nYou can [`read`](crate::Reg::read) this register and get [`rst_value::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rst_value::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rst_value`] module"] #[doc(alias = "RST_VALUE")] pub type RstValue = crate::Reg; #[doc = "The value that counter start from after reaching 0."] pub mod rst_value; -#[doc = "CNT_VALUE (rw) register accessor: The current value of the counter\n\nYou can [`read`](crate::Reg::read) this register and get [`cnt_value::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnt_value::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnt_value`] -module"] +#[doc = "CNT_VALUE (rw) register accessor: The current value of the counter\n\nYou can [`read`](crate::Reg::read) this register and get [`cnt_value::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnt_value::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnt_value`] module"] #[doc(alias = "CNT_VALUE")] pub type CntValue = crate::Reg; #[doc = "The current value of the counter"] pub mod cnt_value; -#[doc = "ENABLE (rw) register accessor: Alternate access to the Counter ENABLE bit in the CTRL Register\n\nYou can [`read`](crate::Reg::read) this register and get [`enable::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`enable::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@enable`] -module"] +#[doc = "ENABLE (rw) register accessor: Alternate access to the Counter ENABLE bit in the CTRL Register\n\nYou can [`read`](crate::Reg::read) this register and get [`enable::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`enable::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@enable`] module"] #[doc(alias = "ENABLE")] pub type Enable = crate::Reg; #[doc = "Alternate access to the Counter ENABLE bit in the CTRL Register"] pub mod enable; -#[doc = "CSD_CTRL (rw) register accessor: The Cascade Control Register. Controls the counter external enable signals\n\nYou can [`read`](crate::Reg::read) this register and get [`csd_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`csd_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@csd_ctrl`] -module"] +#[doc = "CSD_CTRL (rw) register accessor: The Cascade Control Register. Controls the counter external enable signals\n\nYou can [`read`](crate::Reg::read) this register and get [`csd_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`csd_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@csd_ctrl`] module"] #[doc(alias = "CSD_CTRL")] pub type CsdCtrl = crate::Reg; #[doc = "The Cascade Control Register. Controls the counter external enable signals"] pub mod csd_ctrl; -#[doc = "CASCADE0 (rw) register accessor: Cascade Enable Selection\n\nYou can [`read`](crate::Reg::read) this register and get [`cascade0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cascade0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cascade0`] -module"] +#[doc = "CASCADE0 (rw) register accessor: Cascade Enable Selection\n\nYou can [`read`](crate::Reg::read) this register and get [`cascade0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cascade0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cascade0`] module"] #[doc(alias = "CASCADE0")] pub type Cascade0 = crate::Reg; #[doc = "Cascade Enable Selection"] @@ -116,26 +110,22 @@ pub use cascade0 as cascade1; pub use cascade0 as cascade2; pub use Cascade0 as Cascade1; pub use Cascade0 as Cascade2; -#[doc = "PWM_VALUE (rw) register accessor: The Pulse Width Modulation Value\n\nYou can [`read`](crate::Reg::read) this register and get [`pwm_value::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pwm_value::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pwm_value`] -module"] +#[doc = "PWM_VALUE (rw) register accessor: The Pulse Width Modulation Value\n\nYou can [`read`](crate::Reg::read) this register and get [`pwm_value::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pwm_value::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pwm_value`] module"] #[doc(alias = "PWM_VALUE")] pub type PwmValue = crate::Reg; #[doc = "The Pulse Width Modulation Value"] pub mod pwm_value; -#[doc = "PWMA_VALUE (rw) register accessor: The Pulse Width Modulation ValueA\n\nYou can [`read`](crate::Reg::read) this register and get [`pwma_value::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pwma_value::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pwma_value`] -module"] +#[doc = "PWMA_VALUE (rw) register accessor: The Pulse Width Modulation ValueA\n\nYou can [`read`](crate::Reg::read) this register and get [`pwma_value::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pwma_value::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pwma_value`] module"] #[doc(alias = "PWMA_VALUE")] pub type PwmaValue = crate::Reg; #[doc = "The Pulse Width Modulation ValueA"] pub mod pwma_value; -#[doc = "PWMB_VALUE (rw) register accessor: The Pulse Width Modulation ValueB\n\nYou can [`read`](crate::Reg::read) this register and get [`pwmb_value::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pwmb_value::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pwmb_value`] -module"] +#[doc = "PWMB_VALUE (rw) register accessor: The Pulse Width Modulation ValueB\n\nYou can [`read`](crate::Reg::read) this register and get [`pwmb_value::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pwmb_value::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pwmb_value`] module"] #[doc(alias = "PWMB_VALUE")] pub type PwmbValue = crate::Reg; #[doc = "The Pulse Width Modulation ValueB"] pub mod pwmb_value; -#[doc = "PERID (r) register accessor: Peripheral ID Register\n\nYou can [`read`](crate::Reg::read) this register and get [`perid::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@perid`] -module"] +#[doc = "PERID (r) register accessor: Peripheral ID Register\n\nYou can [`read`](crate::Reg::read) this register and get [`perid::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@perid`] module"] #[doc(alias = "PERID")] pub type Perid = crate::Reg; #[doc = "Peripheral ID Register"] diff --git a/va416xx/src/tim0/cascade0.rs b/va416xx/src/tim0/cascade0.rs index 3714cd5..216d7bd 100644 --- a/va416xx/src/tim0/cascade0.rs +++ b/va416xx/src/tim0/cascade0.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:7 - Cascade Selection"] #[inline(always)] - pub fn cassel(&mut self) -> CasselW { + pub fn cassel(&mut self) -> CasselW<'_, Cascade0Spec> { CasselW::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for Cascade0Spec {} #[doc = "`write(|w| ..)` method takes [`cascade0::W`](W) writer structure"] impl crate::Writable for Cascade0Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CASCADE0 to value 0"] -impl crate::Resettable for Cascade0Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Cascade0Spec {} diff --git a/va416xx/src/tim0/cnt_value.rs b/va416xx/src/tim0/cnt_value.rs index ca86af8..39350ff 100644 --- a/va416xx/src/tim0/cnt_value.rs +++ b/va416xx/src/tim0/cnt_value.rs @@ -19,10 +19,6 @@ impl crate::Readable for CntValueSpec {} #[doc = "`write(|w| ..)` method takes [`cnt_value::W`](W) writer structure"] impl crate::Writable for CntValueSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CNT_VALUE to value 0"] -impl crate::Resettable for CntValueSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for CntValueSpec {} diff --git a/va416xx/src/tim0/csd_ctrl.rs b/va416xx/src/tim0/csd_ctrl.rs index 840d2d2..57f9064 100644 --- a/va416xx/src/tim0/csd_ctrl.rs +++ b/va416xx/src/tim0/csd_ctrl.rs @@ -97,52 +97,52 @@ impl R { impl W { #[doc = "Bit 0 - Cascade 0 Enable"] #[inline(always)] - pub fn csden0(&mut self) -> Csden0W { + pub fn csden0(&mut self) -> Csden0W<'_, CsdCtrlSpec> { Csden0W::new(self, 0) } #[doc = "Bit 1 - Cascade 0 Invert"] #[inline(always)] - pub fn csdinv0(&mut self) -> Csdinv0W { + pub fn csdinv0(&mut self) -> Csdinv0W<'_, CsdCtrlSpec> { Csdinv0W::new(self, 1) } #[doc = "Bit 2 - Cascade 1 Enable"] #[inline(always)] - pub fn csden1(&mut self) -> Csden1W { + pub fn csden1(&mut self) -> Csden1W<'_, CsdCtrlSpec> { Csden1W::new(self, 2) } #[doc = "Bit 3 - Cascade 1 Invert"] #[inline(always)] - pub fn csdinv1(&mut self) -> Csdinv1W { + pub fn csdinv1(&mut self) -> Csdinv1W<'_, CsdCtrlSpec> { Csdinv1W::new(self, 3) } #[doc = "Bit 4 - Dual Cascade Operation (0:AND, 1:OR)"] #[inline(always)] - pub fn dcasop(&mut self) -> DcasopW { + pub fn dcasop(&mut self) -> DcasopW<'_, CsdCtrlSpec> { DcasopW::new(self, 4) } #[doc = "Bit 6 - Cascade 0 Enabled as Trigger"] #[inline(always)] - pub fn csdtrg0(&mut self) -> Csdtrg0W { + pub fn csdtrg0(&mut self) -> Csdtrg0W<'_, CsdCtrlSpec> { Csdtrg0W::new(self, 6) } #[doc = "Bit 7 - Cascade 1 Enabled as Trigger"] #[inline(always)] - pub fn csdtrg1(&mut self) -> Csdtrg1W { + pub fn csdtrg1(&mut self) -> Csdtrg1W<'_, CsdCtrlSpec> { Csdtrg1W::new(self, 7) } #[doc = "Bit 8 - Cascade 2 Enable"] #[inline(always)] - pub fn csden2(&mut self) -> Csden2W { + pub fn csden2(&mut self) -> Csden2W<'_, CsdCtrlSpec> { Csden2W::new(self, 8) } #[doc = "Bit 9 - Cascade 2 Invert"] #[inline(always)] - pub fn csdinv2(&mut self) -> Csdinv2W { + pub fn csdinv2(&mut self) -> Csdinv2W<'_, CsdCtrlSpec> { Csdinv2W::new(self, 9) } #[doc = "Bit 10 - Cascade 2 Trigger mode"] #[inline(always)] - pub fn csdtrg2(&mut self) -> Csdtrg2W { + pub fn csdtrg2(&mut self) -> Csdtrg2W<'_, CsdCtrlSpec> { Csdtrg2W::new(self, 10) } } @@ -156,10 +156,6 @@ impl crate::Readable for CsdCtrlSpec {} #[doc = "`write(|w| ..)` method takes [`csd_ctrl::W`](W) writer structure"] impl crate::Writable for CsdCtrlSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CSD_CTRL to value 0"] -impl crate::Resettable for CsdCtrlSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for CsdCtrlSpec {} diff --git a/va416xx/src/tim0/ctrl.rs b/va416xx/src/tim0/ctrl.rs index 16f504b..bab9535 100644 --- a/va416xx/src/tim0/ctrl.rs +++ b/va416xx/src/tim0/ctrl.rs @@ -199,37 +199,37 @@ impl R { impl W { #[doc = "Bit 0 - Counter Enable"] #[inline(always)] - pub fn enable(&mut self) -> EnableW { + pub fn enable(&mut self) -> EnableW<'_, CtrlSpec> { EnableW::new(self, 0) } #[doc = "Bit 2 - Auto Disables the counter (set ENABLE to 0) when the count reaches 0"] #[inline(always)] - pub fn auto_disable(&mut self) -> AutoDisableW { + pub fn auto_disable(&mut self) -> AutoDisableW<'_, CtrlSpec> { AutoDisableW::new(self, 2) } #[doc = "Bit 3 - Auto Deactivate the counter (set ACTIVE to 0) when the count reaches 0"] #[inline(always)] - pub fn auto_deactivate(&mut self) -> AutoDeactivateW { + pub fn auto_deactivate(&mut self) -> AutoDeactivateW<'_, CtrlSpec> { AutoDeactivateW::new(self, 3) } #[doc = "Bit 4 - Interrupt Enable"] #[inline(always)] - pub fn irq_enb(&mut self) -> IrqEnbW { + pub fn irq_enb(&mut self) -> IrqEnbW<'_, CtrlSpec> { IrqEnbW::new(self, 4) } #[doc = "Bits 5:7 - Counter Status Selection"] #[inline(always)] - pub fn status_sel(&mut self) -> StatusSelW { + pub fn status_sel(&mut self) -> StatusSelW<'_, CtrlSpec> { StatusSelW::new(self, 5) } #[doc = "Bit 8 - Invert the Output Status"] #[inline(always)] - pub fn status_inv(&mut self) -> StatusInvW { + pub fn status_inv(&mut self) -> StatusInvW<'_, CtrlSpec> { StatusInvW::new(self, 8) } #[doc = "Bit 9 - Stop Request"] #[inline(always)] - pub fn req_stop(&mut self) -> ReqStopW { + pub fn req_stop(&mut self) -> ReqStopW<'_, CtrlSpec> { ReqStopW::new(self, 9) } } @@ -243,10 +243,6 @@ impl crate::Readable for CtrlSpec {} #[doc = "`write(|w| ..)` method takes [`ctrl::W`](W) writer structure"] impl crate::Writable for CtrlSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTRL to value 0"] -impl crate::Resettable for CtrlSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for CtrlSpec {} diff --git a/va416xx/src/tim0/enable.rs b/va416xx/src/tim0/enable.rs index 924e2a8..f142b05 100644 --- a/va416xx/src/tim0/enable.rs +++ b/va416xx/src/tim0/enable.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bit 0 - Counter Enable"] #[inline(always)] - pub fn enable(&mut self) -> EnableW { + pub fn enable(&mut self) -> EnableW<'_, EnableSpec> { EnableW::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for EnableSpec {} #[doc = "`write(|w| ..)` method takes [`enable::W`](W) writer structure"] impl crate::Writable for EnableSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ENABLE to value 0"] -impl crate::Resettable for EnableSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for EnableSpec {} diff --git a/va416xx/src/tim0/pwm_value.rs b/va416xx/src/tim0/pwm_value.rs index 690a640..6ac3389 100644 --- a/va416xx/src/tim0/pwm_value.rs +++ b/va416xx/src/tim0/pwm_value.rs @@ -19,10 +19,6 @@ impl crate::Readable for PwmValueSpec {} #[doc = "`write(|w| ..)` method takes [`pwm_value::W`](W) writer structure"] impl crate::Writable for PwmValueSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PWM_VALUE to value 0"] -impl crate::Resettable for PwmValueSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for PwmValueSpec {} diff --git a/va416xx/src/tim0/pwma_value.rs b/va416xx/src/tim0/pwma_value.rs index 4a1bf39..ada6a2f 100644 --- a/va416xx/src/tim0/pwma_value.rs +++ b/va416xx/src/tim0/pwma_value.rs @@ -19,10 +19,6 @@ impl crate::Readable for PwmaValueSpec {} #[doc = "`write(|w| ..)` method takes [`pwma_value::W`](W) writer structure"] impl crate::Writable for PwmaValueSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PWMA_VALUE to value 0"] -impl crate::Resettable for PwmaValueSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for PwmaValueSpec {} diff --git a/va416xx/src/tim0/pwmb_value.rs b/va416xx/src/tim0/pwmb_value.rs index 20dd4b0..6f09486 100644 --- a/va416xx/src/tim0/pwmb_value.rs +++ b/va416xx/src/tim0/pwmb_value.rs @@ -19,10 +19,6 @@ impl crate::Readable for PwmbValueSpec {} #[doc = "`write(|w| ..)` method takes [`pwmb_value::W`](W) writer structure"] impl crate::Writable for PwmbValueSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PWMB_VALUE to value 0"] -impl crate::Resettable for PwmbValueSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for PwmbValueSpec {} diff --git a/va416xx/src/tim0/rst_value.rs b/va416xx/src/tim0/rst_value.rs index 42a8873..69d5109 100644 --- a/va416xx/src/tim0/rst_value.rs +++ b/va416xx/src/tim0/rst_value.rs @@ -19,10 +19,6 @@ impl crate::Readable for RstValueSpec {} #[doc = "`write(|w| ..)` method takes [`rst_value::W`](W) writer structure"] impl crate::Writable for RstValueSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RST_VALUE to value 0"] -impl crate::Resettable for RstValueSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for RstValueSpec {} diff --git a/va416xx/src/trng.rs b/va416xx/src/trng.rs index 2b56091..45daa34 100644 --- a/va416xx/src/trng.rs +++ b/va416xx/src/trng.rs @@ -134,38 +134,32 @@ impl RegisterBlock { &self.bist_cntr2 } } -#[doc = "IMR (rw) register accessor: Interrupt Mask Register\n\nYou can [`read`](crate::Reg::read) this register and get [`imr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`imr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@imr`] -module"] +#[doc = "IMR (rw) register accessor: Interrupt Mask Register\n\nYou can [`read`](crate::Reg::read) this register and get [`imr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`imr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@imr`] module"] #[doc(alias = "IMR")] pub type Imr = crate::Reg; #[doc = "Interrupt Mask Register"] pub mod imr; -#[doc = "ISR (r) register accessor: Interrupt Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`isr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@isr`] -module"] +#[doc = "ISR (r) register accessor: Interrupt Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`isr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@isr`] module"] #[doc(alias = "ISR")] pub type Isr = crate::Reg; #[doc = "Interrupt Status Register"] pub mod isr; -#[doc = "ICR (rw) register accessor: Interrupt Clear Register\n\nYou can [`read`](crate::Reg::read) this register and get [`icr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`icr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@icr`] -module"] +#[doc = "ICR (rw) register accessor: Interrupt Clear Register\n\nYou can [`read`](crate::Reg::read) this register and get [`icr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`icr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@icr`] module"] #[doc(alias = "ICR")] pub type Icr = crate::Reg; #[doc = "Interrupt Clear Register"] pub mod icr; -#[doc = "CONFIG (rw) register accessor: Configuration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`config::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`config::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@config`] -module"] +#[doc = "CONFIG (rw) register accessor: Configuration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`config::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`config::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@config`] module"] #[doc(alias = "CONFIG")] pub type Config = crate::Reg; #[doc = "Configuration Register"] pub mod config; -#[doc = "VALID (r) register accessor: Valid Register\n\nYou can [`read`](crate::Reg::read) this register and get [`valid::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@valid`] -module"] +#[doc = "VALID (r) register accessor: Valid Register\n\nYou can [`read`](crate::Reg::read) this register and get [`valid::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@valid`] module"] #[doc(alias = "VALID")] pub type Valid = crate::Reg; #[doc = "Valid Register"] pub mod valid; -#[doc = "EHR_DATA0 (r) register accessor: Entropy Holding Register Data Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ehr_data0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ehr_data0`] -module"] +#[doc = "EHR_DATA0 (r) register accessor: Entropy Holding Register Data Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ehr_data0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ehr_data0`] module"] #[doc(alias = "EHR_DATA0")] pub type EhrData0 = crate::Reg; #[doc = "Entropy Holding Register Data Register"] @@ -180,50 +174,42 @@ pub use EhrData0 as EhrData2; pub use EhrData0 as EhrData3; pub use EhrData0 as EhrData4; pub use EhrData0 as EhrData5; -#[doc = "RND_SOURCE_ENABLE (rw) register accessor: Random Source Enable Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rnd_source_enable::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rnd_source_enable::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rnd_source_enable`] -module"] +#[doc = "RND_SOURCE_ENABLE (rw) register accessor: Random Source Enable Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rnd_source_enable::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rnd_source_enable::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rnd_source_enable`] module"] #[doc(alias = "RND_SOURCE_ENABLE")] pub type RndSourceEnable = crate::Reg; #[doc = "Random Source Enable Register"] pub mod rnd_source_enable; -#[doc = "SAMPLE_CNT1 (rw) register accessor: Section TBD\n\nYou can [`read`](crate::Reg::read) this register and get [`sample_cnt1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sample_cnt1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sample_cnt1`] -module"] +#[doc = "SAMPLE_CNT1 (rw) register accessor: Section TBD\n\nYou can [`read`](crate::Reg::read) this register and get [`sample_cnt1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sample_cnt1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sample_cnt1`] module"] #[doc(alias = "SAMPLE_CNT1")] pub type SampleCnt1 = crate::Reg; #[doc = "Section TBD"] pub mod sample_cnt1; -#[doc = "AUTOCORR_STATISTIC (rw) register accessor: Auto-correlator Statistic Register\n\nYou can [`read`](crate::Reg::read) this register and get [`autocorr_statistic::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`autocorr_statistic::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@autocorr_statistic`] -module"] +#[doc = "AUTOCORR_STATISTIC (rw) register accessor: Auto-correlator Statistic Register\n\nYou can [`read`](crate::Reg::read) this register and get [`autocorr_statistic::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`autocorr_statistic::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@autocorr_statistic`] module"] #[doc(alias = "AUTOCORR_STATISTIC")] pub type AutocorrStatistic = crate::Reg; #[doc = "Auto-correlator Statistic Register"] pub mod autocorr_statistic; -#[doc = "DEBUG_CONTROL (rw) register accessor: Section TBD\n\nYou can [`read`](crate::Reg::read) this register and get [`debug_control::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`debug_control::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@debug_control`] -module"] +#[doc = "DEBUG_CONTROL (rw) register accessor: Section TBD\n\nYou can [`read`](crate::Reg::read) this register and get [`debug_control::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`debug_control::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@debug_control`] module"] #[doc(alias = "DEBUG_CONTROL")] pub type DebugControl = crate::Reg; #[doc = "Section TBD"] pub mod debug_control; -#[doc = "SW_RESET (rw) register accessor: Reset Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sw_reset::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sw_reset::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sw_reset`] -module"] +#[doc = "SW_RESET (rw) register accessor: Reset Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sw_reset::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sw_reset::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sw_reset`] module"] #[doc(alias = "SW_RESET")] pub type SwReset = crate::Reg; #[doc = "Reset Register"] pub mod sw_reset; -#[doc = "BUSY (r) register accessor: Busy Register\n\nYou can [`read`](crate::Reg::read) this register and get [`busy::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@busy`] -module"] +#[doc = "BUSY (r) register accessor: Busy Register\n\nYou can [`read`](crate::Reg::read) this register and get [`busy::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@busy`] module"] #[doc(alias = "BUSY")] pub type Busy = crate::Reg; #[doc = "Busy Register"] pub mod busy; -#[doc = "RST_BITS_COUNTER (rw) register accessor: Reset Bits Counter Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rst_bits_counter::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rst_bits_counter::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rst_bits_counter`] -module"] +#[doc = "RST_BITS_COUNTER (rw) register accessor: Reset Bits Counter Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rst_bits_counter::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rst_bits_counter::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rst_bits_counter`] module"] #[doc(alias = "RST_BITS_COUNTER")] pub type RstBitsCounter = crate::Reg; #[doc = "Reset Bits Counter Register"] pub mod rst_bits_counter; -#[doc = "BIST_CNTR0 (r) register accessor: BIST Counter Register\n\nYou can [`read`](crate::Reg::read) this register and get [`bist_cntr0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bist_cntr0`] -module"] +#[doc = "BIST_CNTR0 (r) register accessor: BIST Counter Register\n\nYou can [`read`](crate::Reg::read) this register and get [`bist_cntr0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bist_cntr0`] module"] #[doc(alias = "BIST_CNTR0")] pub type BistCntr0 = crate::Reg; #[doc = "BIST Counter Register"] diff --git a/va416xx/src/trng/autocorr_statistic.rs b/va416xx/src/trng/autocorr_statistic.rs index 70d2ef4..258a8df 100644 --- a/va416xx/src/trng/autocorr_statistic.rs +++ b/va416xx/src/trng/autocorr_statistic.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:13 - Count each time an autocorrelation test starts"] #[inline(always)] - pub fn autocorr_trys(&mut self) -> AutocorrTrysW { + pub fn autocorr_trys(&mut self) -> AutocorrTrysW<'_, AutocorrStatisticSpec> { AutocorrTrysW::new(self, 0) } #[doc = "Bits 14:21 - Count each time an autocorrelation test fails"] #[inline(always)] - pub fn autocorr_fails(&mut self) -> AutocorrFailsW { + pub fn autocorr_fails(&mut self) -> AutocorrFailsW<'_, AutocorrStatisticSpec> { AutocorrFailsW::new(self, 14) } } @@ -44,10 +44,6 @@ impl crate::Readable for AutocorrStatisticSpec {} #[doc = "`write(|w| ..)` method takes [`autocorr_statistic::W`](W) writer structure"] impl crate::Writable for AutocorrStatisticSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets AUTOCORR_STATISTIC to value 0"] -impl crate::Resettable for AutocorrStatisticSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for AutocorrStatisticSpec {} diff --git a/va416xx/src/trng/bist_cntr0.rs b/va416xx/src/trng/bist_cntr0.rs index 7a9759e..e08c44b 100644 --- a/va416xx/src/trng/bist_cntr0.rs +++ b/va416xx/src/trng/bist_cntr0.rs @@ -17,6 +17,4 @@ impl crate::RegisterSpec for BistCntr0Spec { #[doc = "`read()` method returns [`bist_cntr0::R`](R) reader structure"] impl crate::Readable for BistCntr0Spec {} #[doc = "`reset()` method sets BIST_CNTR0 to value 0"] -impl crate::Resettable for BistCntr0Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for BistCntr0Spec {} diff --git a/va416xx/src/trng/busy.rs b/va416xx/src/trng/busy.rs index f12cb24..6cc0986 100644 --- a/va416xx/src/trng/busy.rs +++ b/va416xx/src/trng/busy.rs @@ -17,6 +17,4 @@ impl crate::RegisterSpec for BusySpec { #[doc = "`read()` method returns [`busy::R`](R) reader structure"] impl crate::Readable for BusySpec {} #[doc = "`reset()` method sets BUSY to value 0"] -impl crate::Resettable for BusySpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for BusySpec {} diff --git a/va416xx/src/trng/config.rs b/va416xx/src/trng/config.rs index 2efa7f2..127e9a5 100644 --- a/va416xx/src/trng/config.rs +++ b/va416xx/src/trng/config.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:1 - Selects the number of inverters (out of four possible selections) in the ring oscillator"] #[inline(always)] - pub fn rnd_src_sel(&mut self) -> RndSrcSelW { + pub fn rnd_src_sel(&mut self) -> RndSrcSelW<'_, ConfigSpec> { RndSrcSelW::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for ConfigSpec {} #[doc = "`write(|w| ..)` method takes [`config::W`](W) writer structure"] impl crate::Writable for ConfigSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONFIG to value 0"] -impl crate::Resettable for ConfigSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for ConfigSpec {} diff --git a/va416xx/src/trng/debug_control.rs b/va416xx/src/trng/debug_control.rs index b0daa2c..16b6e6f 100644 --- a/va416xx/src/trng/debug_control.rs +++ b/va416xx/src/trng/debug_control.rs @@ -34,17 +34,17 @@ impl R { impl W { #[doc = "Bit 1 - The Von Neumann balancer is bypassed"] #[inline(always)] - pub fn vnc_pypass(&mut self) -> VncPypassW { + pub fn vnc_pypass(&mut self) -> VncPypassW<'_, DebugControlSpec> { VncPypassW::new(self, 1) } #[doc = "Bit 2 - The CRNGT test in the TRNG is bypassed"] #[inline(always)] - pub fn crngt_bypass(&mut self) -> CrngtBypassW { + pub fn crngt_bypass(&mut self) -> CrngtBypassW<'_, DebugControlSpec> { CrngtBypassW::new(self, 2) } #[doc = "Bit 3 - The autocorrelation test in the TRNG module is bypassed"] #[inline(always)] - pub fn auto_correlate_bypass(&mut self) -> AutoCorrelateBypassW { + pub fn auto_correlate_bypass(&mut self) -> AutoCorrelateBypassW<'_, DebugControlSpec> { AutoCorrelateBypassW::new(self, 3) } } @@ -58,10 +58,6 @@ impl crate::Readable for DebugControlSpec {} #[doc = "`write(|w| ..)` method takes [`debug_control::W`](W) writer structure"] impl crate::Writable for DebugControlSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DEBUG_CONTROL to value 0"] -impl crate::Resettable for DebugControlSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for DebugControlSpec {} diff --git a/va416xx/src/trng/ehr_data0.rs b/va416xx/src/trng/ehr_data0.rs index 75fe94f..42ceffa 100644 --- a/va416xx/src/trng/ehr_data0.rs +++ b/va416xx/src/trng/ehr_data0.rs @@ -17,6 +17,4 @@ impl crate::RegisterSpec for EhrData0Spec { #[doc = "`read()` method returns [`ehr_data0::R`](R) reader structure"] impl crate::Readable for EhrData0Spec {} #[doc = "`reset()` method sets EHR_DATA0 to value 0"] -impl crate::Resettable for EhrData0Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for EhrData0Spec {} diff --git a/va416xx/src/trng/icr.rs b/va416xx/src/trng/icr.rs index a055e5d..33c7989 100644 --- a/va416xx/src/trng/icr.rs +++ b/va416xx/src/trng/icr.rs @@ -2,11 +2,9 @@ pub type R = crate::R; #[doc = "Register `ICR` writer"] pub type W = crate::W; -#[doc = "Field `EHR_VALID` reader - Set to 1 after the EHR_DATA\\[0,1,2,3,4,5\\] -registers have been read"] +#[doc = "Field `EHR_VALID` reader - Set to 1 after the EHR_DATA\\[0,1,2,3,4,5\\] registers have been read"] pub type EhrValidR = crate::BitReader; -#[doc = "Field `EHR_VALID` writer - Set to 1 after the EHR_DATA\\[0,1,2,3,4,5\\] -registers have been read"] +#[doc = "Field `EHR_VALID` writer - Set to 1 after the EHR_DATA\\[0,1,2,3,4,5\\] registers have been read"] pub type EhrValidW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AUTOCORR_ERR` reader - Software cannot clear this bit. Only a TRNG reset can clear this bit"] pub type AutocorrErrR = crate::BitReader; @@ -21,8 +19,7 @@ pub type VnErrR = crate::BitReader; #[doc = "Field `VN_ERR` writer - Clears a Von Neumann error"] pub type VnErrW<'a, REG> = crate::BitWriter<'a, REG>; impl R { - #[doc = "Bit 0 - Set to 1 after the EHR_DATA\\[0,1,2,3,4,5\\] -registers have been read"] + #[doc = "Bit 0 - Set to 1 after the EHR_DATA\\[0,1,2,3,4,5\\] registers have been read"] #[inline(always)] pub fn ehr_valid(&self) -> EhrValidR { EhrValidR::new((self.bits & 1) != 0) @@ -44,25 +41,24 @@ registers have been read"] } } impl W { - #[doc = "Bit 0 - Set to 1 after the EHR_DATA\\[0,1,2,3,4,5\\] -registers have been read"] + #[doc = "Bit 0 - Set to 1 after the EHR_DATA\\[0,1,2,3,4,5\\] registers have been read"] #[inline(always)] - pub fn ehr_valid(&mut self) -> EhrValidW { + pub fn ehr_valid(&mut self) -> EhrValidW<'_, IcrSpec> { EhrValidW::new(self, 0) } #[doc = "Bit 1 - Software cannot clear this bit. Only a TRNG reset can clear this bit"] #[inline(always)] - pub fn autocorr_err(&mut self) -> AutocorrErrW { + pub fn autocorr_err(&mut self) -> AutocorrErrW<'_, IcrSpec> { AutocorrErrW::new(self, 1) } #[doc = "Bit 2 - Clear a Continuous Random Number Generation Testing (CRNGT) error"] #[inline(always)] - pub fn crngt_err(&mut self) -> CrngtErrW { + pub fn crngt_err(&mut self) -> CrngtErrW<'_, IcrSpec> { CrngtErrW::new(self, 2) } #[doc = "Bit 3 - Clears a Von Neumann error"] #[inline(always)] - pub fn vn_err(&mut self) -> VnErrW { + pub fn vn_err(&mut self) -> VnErrW<'_, IcrSpec> { VnErrW::new(self, 3) } } @@ -76,10 +72,6 @@ impl crate::Readable for IcrSpec {} #[doc = "`write(|w| ..)` method takes [`icr::W`](W) writer structure"] impl crate::Writable for IcrSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ICR to value 0"] -impl crate::Resettable for IcrSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for IcrSpec {} diff --git a/va416xx/src/trng/imr.rs b/va416xx/src/trng/imr.rs index ba6a14d..018be0d 100644 --- a/va416xx/src/trng/imr.rs +++ b/va416xx/src/trng/imr.rs @@ -43,22 +43,22 @@ impl R { impl W { #[doc = "Bit 0 - Mask when the TRNG has collected 192 bits"] #[inline(always)] - pub fn ehr_valid_int_mask(&mut self) -> EhrValidIntMaskW { + pub fn ehr_valid_int_mask(&mut self) -> EhrValidIntMaskW<'_, ImrSpec> { EhrValidIntMaskW::new(self, 0) } #[doc = "Bit 1 - Mask the Autocorrelation error"] #[inline(always)] - pub fn autocorr_err_int_mask(&mut self) -> AutocorrErrIntMaskW { + pub fn autocorr_err_int_mask(&mut self) -> AutocorrErrIntMaskW<'_, ImrSpec> { AutocorrErrIntMaskW::new(self, 1) } #[doc = "Bit 2 - Mask the CRNGT error"] #[inline(always)] - pub fn crngt_err_int_mask(&mut self) -> CrngtErrIntMaskW { + pub fn crngt_err_int_mask(&mut self) -> CrngtErrIntMaskW<'_, ImrSpec> { CrngtErrIntMaskW::new(self, 2) } #[doc = "Bit 3 - Mask the Von Neumann error"] #[inline(always)] - pub fn vn_err_int_mask(&mut self) -> VnErrIntMaskW { + pub fn vn_err_int_mask(&mut self) -> VnErrIntMaskW<'_, ImrSpec> { VnErrIntMaskW::new(self, 3) } } @@ -72,8 +72,6 @@ impl crate::Readable for ImrSpec {} #[doc = "`write(|w| ..)` method takes [`imr::W`](W) writer structure"] impl crate::Writable for ImrSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IMR to value 0x0f"] impl crate::Resettable for ImrSpec { diff --git a/va416xx/src/trng/isr.rs b/va416xx/src/trng/isr.rs index 239a8e5..5590006 100644 --- a/va416xx/src/trng/isr.rs +++ b/va416xx/src/trng/isr.rs @@ -38,6 +38,4 @@ impl crate::RegisterSpec for IsrSpec { #[doc = "`read()` method returns [`isr::R`](R) reader structure"] impl crate::Readable for IsrSpec {} #[doc = "`reset()` method sets ISR to value 0"] -impl crate::Resettable for IsrSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for IsrSpec {} diff --git a/va416xx/src/trng/rnd_source_enable.rs b/va416xx/src/trng/rnd_source_enable.rs index 2f8291c..35ad2df 100644 --- a/va416xx/src/trng/rnd_source_enable.rs +++ b/va416xx/src/trng/rnd_source_enable.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bit 0 - The entropy source, ring oscillator, is enabled"] #[inline(always)] - pub fn rnd_src_en(&mut self) -> RndSrcEnW { + pub fn rnd_src_en(&mut self) -> RndSrcEnW<'_, RndSourceEnableSpec> { RndSrcEnW::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for RndSourceEnableSpec {} #[doc = "`write(|w| ..)` method takes [`rnd_source_enable::W`](W) writer structure"] impl crate::Writable for RndSourceEnableSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RND_SOURCE_ENABLE to value 0"] -impl crate::Resettable for RndSourceEnableSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for RndSourceEnableSpec {} diff --git a/va416xx/src/trng/rst_bits_counter.rs b/va416xx/src/trng/rst_bits_counter.rs index f000a85..c44f176 100644 --- a/va416xx/src/trng/rst_bits_counter.rs +++ b/va416xx/src/trng/rst_bits_counter.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bit 0 - Writing any value to this bit resets the bits counter and TRNG valid registers"] #[inline(always)] - pub fn rst_bits_counter(&mut self) -> RstBitsCounterW { + pub fn rst_bits_counter(&mut self) -> RstBitsCounterW<'_, RstBitsCounterSpec> { RstBitsCounterW::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for RstBitsCounterSpec {} #[doc = "`write(|w| ..)` method takes [`rst_bits_counter::W`](W) writer structure"] impl crate::Writable for RstBitsCounterSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RST_BITS_COUNTER to value 0"] -impl crate::Resettable for RstBitsCounterSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for RstBitsCounterSpec {} diff --git a/va416xx/src/trng/sample_cnt1.rs b/va416xx/src/trng/sample_cnt1.rs index c173786..73db298 100644 --- a/va416xx/src/trng/sample_cnt1.rs +++ b/va416xx/src/trng/sample_cnt1.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:31 - Sets the number of clk cycles between two consecutive ring oscillator samples"] #[inline(always)] - pub fn sample_cntr1(&mut self) -> SampleCntr1W { + pub fn sample_cntr1(&mut self) -> SampleCntr1W<'_, SampleCnt1Spec> { SampleCntr1W::new(self, 0) } } @@ -30,8 +30,6 @@ impl crate::Readable for SampleCnt1Spec {} #[doc = "`write(|w| ..)` method takes [`sample_cnt1::W`](W) writer structure"] impl crate::Writable for SampleCnt1Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SAMPLE_CNT1 to value 0xffff"] impl crate::Resettable for SampleCnt1Spec { diff --git a/va416xx/src/trng/sw_reset.rs b/va416xx/src/trng/sw_reset.rs index 5a6df3f..8f19a60 100644 --- a/va416xx/src/trng/sw_reset.rs +++ b/va416xx/src/trng/sw_reset.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bit 0 - Writing 1 to this register causes an internal TRNG reset"] #[inline(always)] - pub fn sw_reset(&mut self) -> SwResetW { + pub fn sw_reset(&mut self) -> SwResetW<'_, SwResetSpec> { SwResetW::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for SwResetSpec {} #[doc = "`write(|w| ..)` method takes [`sw_reset::W`](W) writer structure"] impl crate::Writable for SwResetSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SW_RESET to value 0"] -impl crate::Resettable for SwResetSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for SwResetSpec {} diff --git a/va416xx/src/trng/valid.rs b/va416xx/src/trng/valid.rs index bca1489..16d5542 100644 --- a/va416xx/src/trng/valid.rs +++ b/va416xx/src/trng/valid.rs @@ -17,6 +17,4 @@ impl crate::RegisterSpec for ValidSpec { #[doc = "`read()` method returns [`valid::R`](R) reader structure"] impl crate::Readable for ValidSpec {} #[doc = "`reset()` method sets VALID to value 0"] -impl crate::Resettable for ValidSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for ValidSpec {} diff --git a/va416xx/src/uart0.rs b/va416xx/src/uart0.rs index 0a056ad..43216ab 100644 --- a/va416xx/src/uart0.rs +++ b/va416xx/src/uart0.rs @@ -119,68 +119,57 @@ impl RegisterBlock { &self.perid } } -#[doc = "DATA (rw) register accessor: Data In/Out Register\n\nYou can [`read`](crate::Reg::read) this register and get [`data::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data`] -module"] +#[doc = "DATA (rw) register accessor: Data In/Out Register\n\nYou can [`read`](crate::Reg::read) this register and get [`data::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data`] module"] #[doc(alias = "DATA")] pub type Data = crate::Reg; #[doc = "Data In/Out Register"] pub mod data; -#[doc = "ENABLE (rw) register accessor: Enable Register\n\nYou can [`read`](crate::Reg::read) this register and get [`enable::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`enable::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@enable`] -module"] +#[doc = "ENABLE (rw) register accessor: Enable Register\n\nYou can [`read`](crate::Reg::read) this register and get [`enable::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`enable::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@enable`] module"] #[doc(alias = "ENABLE")] pub type Enable = crate::Reg; #[doc = "Enable Register"] pub mod enable; -#[doc = "CTRL (rw) register accessor: Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`] -module"] +#[doc = "CTRL (rw) register accessor: Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`] module"] #[doc(alias = "CTRL")] pub type Ctrl = crate::Reg; #[doc = "Control Register"] pub mod ctrl; -#[doc = "CLKSCALE (rw) register accessor: Clock Scale Register\n\nYou can [`read`](crate::Reg::read) this register and get [`clkscale::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkscale::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkscale`] -module"] +#[doc = "CLKSCALE (rw) register accessor: Clock Scale Register\n\nYou can [`read`](crate::Reg::read) this register and get [`clkscale::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkscale::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkscale`] module"] #[doc(alias = "CLKSCALE")] pub type Clkscale = crate::Reg; #[doc = "Clock Scale Register"] pub mod clkscale; -#[doc = "RXSTATUS (r) register accessor: Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rxstatus::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxstatus`] -module"] +#[doc = "RXSTATUS (r) register accessor: Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rxstatus::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxstatus`] module"] #[doc(alias = "RXSTATUS")] pub type Rxstatus = crate::Reg; #[doc = "Status Register"] pub mod rxstatus; -#[doc = "TXSTATUS (r) register accessor: Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`txstatus::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txstatus`] -module"] +#[doc = "TXSTATUS (r) register accessor: Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`txstatus::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txstatus`] module"] #[doc(alias = "TXSTATUS")] pub type Txstatus = crate::Reg; #[doc = "Status Register"] pub mod txstatus; -#[doc = "FIFO_CLR (w) register accessor: Clear FIFO Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fifo_clr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fifo_clr`] -module"] +#[doc = "FIFO_CLR (w) register accessor: Clear FIFO Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fifo_clr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fifo_clr`] module"] #[doc(alias = "FIFO_CLR")] pub type FifoClr = crate::Reg; #[doc = "Clear FIFO Register"] pub mod fifo_clr; -#[doc = "TXBREAK (w) register accessor: Break Transmit Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`txbreak::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txbreak`] -module"] +#[doc = "TXBREAK (w) register accessor: Break Transmit Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`txbreak::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txbreak`] module"] #[doc(alias = "TXBREAK")] pub type Txbreak = crate::Reg; #[doc = "Break Transmit Register"] pub mod txbreak; -#[doc = "ADDR9 (rw) register accessor: Address9 Register\n\nYou can [`read`](crate::Reg::read) this register and get [`addr9::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`addr9::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@addr9`] -module"] +#[doc = "ADDR9 (rw) register accessor: Address9 Register\n\nYou can [`read`](crate::Reg::read) this register and get [`addr9::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`addr9::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@addr9`] module"] #[doc(alias = "ADDR9")] pub type Addr9 = crate::Reg; #[doc = "Address9 Register"] pub mod addr9; -#[doc = "ADDR9MASK (rw) register accessor: Address9 Mask Register\n\nYou can [`read`](crate::Reg::read) this register and get [`addr9mask::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`addr9mask::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@addr9mask`] -module"] +#[doc = "ADDR9MASK (rw) register accessor: Address9 Mask Register\n\nYou can [`read`](crate::Reg::read) this register and get [`addr9mask::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`addr9mask::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@addr9mask`] module"] #[doc(alias = "ADDR9MASK")] pub type Addr9mask = crate::Reg; #[doc = "Address9 Mask Register"] pub mod addr9mask; -#[doc = "IRQ_ENB (rw) register accessor: IRQ Enable Register\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_enb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`irq_enb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_enb`] -module"] +#[doc = "IRQ_ENB (rw) register accessor: IRQ Enable Register\n\nYou can [`read`](crate::Reg::read) this register and get [`irq_enb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`irq_enb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_enb`] module"] #[doc(alias = "IRQ_ENB")] pub type IrqEnb = crate::Reg; #[doc = "IRQ Enable Register"] @@ -191,32 +180,27 @@ pub use irq_enb as irq_clr; pub use IrqEnb as IrqRaw; pub use IrqEnb as IrqEnd; pub use IrqEnb as IrqClr; -#[doc = "RXFIFOIRQTRG (rw) register accessor: Rx FIFO IRQ Trigger Level\n\nYou can [`read`](crate::Reg::read) this register and get [`rxfifoirqtrg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rxfifoirqtrg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxfifoirqtrg`] -module"] +#[doc = "RXFIFOIRQTRG (rw) register accessor: Rx FIFO IRQ Trigger Level\n\nYou can [`read`](crate::Reg::read) this register and get [`rxfifoirqtrg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rxfifoirqtrg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxfifoirqtrg`] module"] #[doc(alias = "RXFIFOIRQTRG")] pub type Rxfifoirqtrg = crate::Reg; #[doc = "Rx FIFO IRQ Trigger Level"] pub mod rxfifoirqtrg; -#[doc = "TXFIFOIRQTRG (rw) register accessor: Tx FIFO IRQ Trigger Level\n\nYou can [`read`](crate::Reg::read) this register and get [`txfifoirqtrg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`txfifoirqtrg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txfifoirqtrg`] -module"] +#[doc = "TXFIFOIRQTRG (rw) register accessor: Tx FIFO IRQ Trigger Level\n\nYou can [`read`](crate::Reg::read) this register and get [`txfifoirqtrg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`txfifoirqtrg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txfifoirqtrg`] module"] #[doc(alias = "TXFIFOIRQTRG")] pub type Txfifoirqtrg = crate::Reg; #[doc = "Tx FIFO IRQ Trigger Level"] pub mod txfifoirqtrg; -#[doc = "RXFIFORTSTRG (rw) register accessor: Rx FIFO RTS Trigger Level\n\nYou can [`read`](crate::Reg::read) this register and get [`rxfifortstrg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rxfifortstrg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxfifortstrg`] -module"] +#[doc = "RXFIFORTSTRG (rw) register accessor: Rx FIFO RTS Trigger Level\n\nYou can [`read`](crate::Reg::read) this register and get [`rxfifortstrg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rxfifortstrg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxfifortstrg`] module"] #[doc(alias = "RXFIFORTSTRG")] pub type Rxfifortstrg = crate::Reg; #[doc = "Rx FIFO RTS Trigger Level"] pub mod rxfifortstrg; -#[doc = "STATE (r) register accessor: Internal STATE of UART Controller\n\nYou can [`read`](crate::Reg::read) this register and get [`state::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@state`] -module"] +#[doc = "STATE (r) register accessor: Internal STATE of UART Controller\n\nYou can [`read`](crate::Reg::read) this register and get [`state::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@state`] module"] #[doc(alias = "STATE")] pub type State = crate::Reg; #[doc = "Internal STATE of UART Controller"] pub mod state; -#[doc = "PERID (r) register accessor: Peripheral ID Register\n\nYou can [`read`](crate::Reg::read) this register and get [`perid::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@perid`] -module"] +#[doc = "PERID (r) register accessor: Peripheral ID Register\n\nYou can [`read`](crate::Reg::read) this register and get [`perid::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@perid`] module"] #[doc(alias = "PERID")] pub type Perid = crate::Reg; #[doc = "Peripheral ID Register"] diff --git a/va416xx/src/uart0/addr9.rs b/va416xx/src/uart0/addr9.rs index 7cd2716..56b06b3 100644 --- a/va416xx/src/uart0/addr9.rs +++ b/va416xx/src/uart0/addr9.rs @@ -19,10 +19,6 @@ impl crate::Readable for Addr9Spec {} #[doc = "`write(|w| ..)` method takes [`addr9::W`](W) writer structure"] impl crate::Writable for Addr9Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ADDR9 to value 0"] -impl crate::Resettable for Addr9Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Addr9Spec {} diff --git a/va416xx/src/uart0/addr9mask.rs b/va416xx/src/uart0/addr9mask.rs index f2b86c6..4b47c5c 100644 --- a/va416xx/src/uart0/addr9mask.rs +++ b/va416xx/src/uart0/addr9mask.rs @@ -19,10 +19,6 @@ impl crate::Readable for Addr9maskSpec {} #[doc = "`write(|w| ..)` method takes [`addr9mask::W`](W) writer structure"] impl crate::Writable for Addr9maskSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ADDR9MASK to value 0"] -impl crate::Resettable for Addr9maskSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Addr9maskSpec {} diff --git a/va416xx/src/uart0/clkscale.rs b/va416xx/src/uart0/clkscale.rs index a8943ac..2b5b7af 100644 --- a/va416xx/src/uart0/clkscale.rs +++ b/va416xx/src/uart0/clkscale.rs @@ -27,17 +27,17 @@ impl R { impl W { #[doc = "Bits 0:5 - Fractional Divide (64ths)"] #[inline(always)] - pub fn frac(&mut self) -> FracW { + pub fn frac(&mut self) -> FracW<'_, ClkscaleSpec> { FracW::new(self, 0) } #[doc = "Bits 6:23 - Integer Divide"] #[inline(always)] - pub fn int(&mut self) -> IntW { + pub fn int(&mut self) -> IntW<'_, ClkscaleSpec> { IntW::new(self, 6) } #[doc = "Bit 31 - Reset Baud Counter"] #[inline(always)] - pub fn reset(&mut self) -> ResetW { + pub fn reset(&mut self) -> ResetW<'_, ClkscaleSpec> { ResetW::new(self, 31) } } @@ -51,10 +51,6 @@ impl crate::Readable for ClkscaleSpec {} #[doc = "`write(|w| ..)` method takes [`clkscale::W`](W) writer structure"] impl crate::Writable for ClkscaleSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CLKSCALE to value 0"] -impl crate::Resettable for ClkscaleSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for ClkscaleSpec {} diff --git a/va416xx/src/uart0/ctrl.rs b/va416xx/src/uart0/ctrl.rs index f802a55..117e6a5 100644 --- a/va416xx/src/uart0/ctrl.rs +++ b/va416xx/src/uart0/ctrl.rs @@ -106,57 +106,57 @@ impl R { impl W { #[doc = "Bit 0 - Parity Enable"] #[inline(always)] - pub fn paren(&mut self) -> ParenW { + pub fn paren(&mut self) -> ParenW<'_, CtrlSpec> { ParenW::new(self, 0) } #[doc = "Bit 1 - Parity Even/Odd(1/0)"] #[inline(always)] - pub fn pareven(&mut self) -> ParevenW { + pub fn pareven(&mut self) -> ParevenW<'_, CtrlSpec> { ParevenW::new(self, 1) } #[doc = "Bit 2 - Parity Sticky"] #[inline(always)] - pub fn parstk(&mut self) -> ParstkW { + pub fn parstk(&mut self) -> ParstkW<'_, CtrlSpec> { ParstkW::new(self, 2) } #[doc = "Bit 3 - Stop Bits 1/2(0/1)"] #[inline(always)] - pub fn stopbits(&mut self) -> StopbitsW { + pub fn stopbits(&mut self) -> StopbitsW<'_, CtrlSpec> { StopbitsW::new(self, 3) } #[doc = "Bits 4:5 - Word Size in Bits 5/6/7/8(00/01/10/11)"] #[inline(always)] - pub fn wordsize(&mut self) -> WordsizeW { + pub fn wordsize(&mut self) -> WordsizeW<'_, CtrlSpec> { WordsizeW::new(self, 4) } #[doc = "Bit 6 - Loopback Enable"] #[inline(always)] - pub fn loopback(&mut self) -> LoopbackW { + pub fn loopback(&mut self) -> LoopbackW<'_, CtrlSpec> { LoopbackW::new(self, 6) } #[doc = "Bit 7 - Loopback Block"] #[inline(always)] - pub fn loopbackblk(&mut self) -> LoopbackblkW { + pub fn loopbackblk(&mut self) -> LoopbackblkW<'_, CtrlSpec> { LoopbackblkW::new(self, 7) } #[doc = "Bit 8 - Enable Auto CTS mode"] #[inline(always)] - pub fn autocts(&mut self) -> AutoctsW { + pub fn autocts(&mut self) -> AutoctsW<'_, CtrlSpec> { AutoctsW::new(self, 8) } #[doc = "Bit 9 - Default RTSn value"] #[inline(always)] - pub fn defrts(&mut self) -> DefrtsW { + pub fn defrts(&mut self) -> DefrtsW<'_, CtrlSpec> { DefrtsW::new(self, 9) } #[doc = "Bit 10 - Enable Auto RTS mode"] #[inline(always)] - pub fn autorts(&mut self) -> AutortsW { + pub fn autorts(&mut self) -> AutortsW<'_, CtrlSpec> { AutortsW::new(self, 10) } #[doc = "Bit 11 - Enable BAUD8 mode"] #[inline(always)] - pub fn baud8(&mut self) -> Baud8W { + pub fn baud8(&mut self) -> Baud8W<'_, CtrlSpec> { Baud8W::new(self, 11) } } @@ -170,10 +170,6 @@ impl crate::Readable for CtrlSpec {} #[doc = "`write(|w| ..)` method takes [`ctrl::W`](W) writer structure"] impl crate::Writable for CtrlSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTRL to value 0"] -impl crate::Resettable for CtrlSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for CtrlSpec {} diff --git a/va416xx/src/uart0/data.rs b/va416xx/src/uart0/data.rs index 6a18c04..e14fd45 100644 --- a/va416xx/src/uart0/data.rs +++ b/va416xx/src/uart0/data.rs @@ -19,10 +19,6 @@ impl crate::Readable for DataSpec {} #[doc = "`write(|w| ..)` method takes [`data::W`](W) writer structure"] impl crate::Writable for DataSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA to value 0"] -impl crate::Resettable for DataSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for DataSpec {} diff --git a/va416xx/src/uart0/enable.rs b/va416xx/src/uart0/enable.rs index 1ca5964..ca6957e 100644 --- a/va416xx/src/uart0/enable.rs +++ b/va416xx/src/uart0/enable.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bit 0 - Rx Enable"] #[inline(always)] - pub fn rxenable(&mut self) -> RxenableW { + pub fn rxenable(&mut self) -> RxenableW<'_, EnableSpec> { RxenableW::new(self, 0) } #[doc = "Bit 1 - Tx Enable"] #[inline(always)] - pub fn txenable(&mut self) -> TxenableW { + pub fn txenable(&mut self) -> TxenableW<'_, EnableSpec> { TxenableW::new(self, 1) } } @@ -44,10 +44,6 @@ impl crate::Readable for EnableSpec {} #[doc = "`write(|w| ..)` method takes [`enable::W`](W) writer structure"] impl crate::Writable for EnableSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ENABLE to value 0"] -impl crate::Resettable for EnableSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for EnableSpec {} diff --git a/va416xx/src/uart0/fifo_clr.rs b/va416xx/src/uart0/fifo_clr.rs index af272ab..339ac41 100644 --- a/va416xx/src/uart0/fifo_clr.rs +++ b/va416xx/src/uart0/fifo_clr.rs @@ -7,12 +7,12 @@ pub type TxfifoW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Clear Rx FIFO"] #[inline(always)] - pub fn rxfifo(&mut self) -> RxfifoW { + pub fn rxfifo(&mut self) -> RxfifoW<'_, FifoClrSpec> { RxfifoW::new(self, 0) } #[doc = "Bit 1 - Clear Tx FIFO"] #[inline(always)] - pub fn txfifo(&mut self) -> TxfifoW { + pub fn txfifo(&mut self) -> TxfifoW<'_, FifoClrSpec> { TxfifoW::new(self, 1) } } @@ -24,10 +24,6 @@ impl crate::RegisterSpec for FifoClrSpec { #[doc = "`write(|w| ..)` method takes [`fifo_clr::W`](W) writer structure"] impl crate::Writable for FifoClrSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets FIFO_CLR to value 0"] -impl crate::Resettable for FifoClrSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for FifoClrSpec {} diff --git a/va416xx/src/uart0/irq_enb.rs b/va416xx/src/uart0/irq_enb.rs index afadd51..3965a8c 100644 --- a/va416xx/src/uart0/irq_enb.rs +++ b/va416xx/src/uart0/irq_enb.rs @@ -70,37 +70,37 @@ impl R { impl W { #[doc = "Bit 0 - RX Interrupt"] #[inline(always)] - pub fn irq_rx(&mut self) -> IrqRxW { + pub fn irq_rx(&mut self) -> IrqRxW<'_, IrqEnbSpec> { IrqRxW::new(self, 0) } #[doc = "Bit 1 - RX Status Interrupt"] #[inline(always)] - pub fn irq_rx_status(&mut self) -> IrqRxStatusW { + pub fn irq_rx_status(&mut self) -> IrqRxStatusW<'_, IrqEnbSpec> { IrqRxStatusW::new(self, 1) } #[doc = "Bit 2 - RX Timeout Interrupt"] #[inline(always)] - pub fn irq_rx_to(&mut self) -> IrqRxToW { + pub fn irq_rx_to(&mut self) -> IrqRxToW<'_, IrqEnbSpec> { IrqRxToW::new(self, 2) } #[doc = "Bit 4 - TX Interrupt"] #[inline(always)] - pub fn irq_tx(&mut self) -> IrqTxW { + pub fn irq_tx(&mut self) -> IrqTxW<'_, IrqEnbSpec> { IrqTxW::new(self, 4) } #[doc = "Bit 5 - TX Status Interrupt"] #[inline(always)] - pub fn irq_tx_status(&mut self) -> IrqTxStatusW { + pub fn irq_tx_status(&mut self) -> IrqTxStatusW<'_, IrqEnbSpec> { IrqTxStatusW::new(self, 5) } #[doc = "Bit 6 - TX Empty Interrupt"] #[inline(always)] - pub fn irq_tx_empty(&mut self) -> IrqTxEmptyW { + pub fn irq_tx_empty(&mut self) -> IrqTxEmptyW<'_, IrqEnbSpec> { IrqTxEmptyW::new(self, 6) } #[doc = "Bit 7 - TX CTS Change Interrupt"] #[inline(always)] - pub fn irq_tx_cts(&mut self) -> IrqTxCtsW { + pub fn irq_tx_cts(&mut self) -> IrqTxCtsW<'_, IrqEnbSpec> { IrqTxCtsW::new(self, 7) } } @@ -114,10 +114,6 @@ impl crate::Readable for IrqEnbSpec {} #[doc = "`write(|w| ..)` method takes [`irq_enb::W`](W) writer structure"] impl crate::Writable for IrqEnbSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IRQ_ENB to value 0"] -impl crate::Resettable for IrqEnbSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for IrqEnbSpec {} diff --git a/va416xx/src/uart0/rxfifoirqtrg.rs b/va416xx/src/uart0/rxfifoirqtrg.rs index 450e256..e38d450 100644 --- a/va416xx/src/uart0/rxfifoirqtrg.rs +++ b/va416xx/src/uart0/rxfifoirqtrg.rs @@ -19,10 +19,6 @@ impl crate::Readable for RxfifoirqtrgSpec {} #[doc = "`write(|w| ..)` method takes [`rxfifoirqtrg::W`](W) writer structure"] impl crate::Writable for RxfifoirqtrgSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RXFIFOIRQTRG to value 0"] -impl crate::Resettable for RxfifoirqtrgSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for RxfifoirqtrgSpec {} diff --git a/va416xx/src/uart0/rxfifortstrg.rs b/va416xx/src/uart0/rxfifortstrg.rs index 06971f4..370a154 100644 --- a/va416xx/src/uart0/rxfifortstrg.rs +++ b/va416xx/src/uart0/rxfifortstrg.rs @@ -19,10 +19,6 @@ impl crate::Readable for RxfifortstrgSpec {} #[doc = "`write(|w| ..)` method takes [`rxfifortstrg::W`](W) writer structure"] impl crate::Writable for RxfifortstrgSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RXFIFORTSTRG to value 0"] -impl crate::Resettable for RxfifortstrgSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for RxfifortstrgSpec {} diff --git a/va416xx/src/uart0/rxstatus.rs b/va416xx/src/uart0/rxstatus.rs index ce5172d..1b0ab58 100644 --- a/va416xx/src/uart0/rxstatus.rs +++ b/va416xx/src/uart0/rxstatus.rs @@ -87,6 +87,4 @@ impl crate::RegisterSpec for RxstatusSpec { #[doc = "`read()` method returns [`rxstatus::R`](R) reader structure"] impl crate::Readable for RxstatusSpec {} #[doc = "`reset()` method sets RXSTATUS to value 0"] -impl crate::Resettable for RxstatusSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for RxstatusSpec {} diff --git a/va416xx/src/uart0/state.rs b/va416xx/src/uart0/state.rs index 71c172a..f8dd56a 100644 --- a/va416xx/src/uart0/state.rs +++ b/va416xx/src/uart0/state.rs @@ -14,6 +14,4 @@ impl crate::RegisterSpec for StateSpec { #[doc = "`read()` method returns [`state::R`](R) reader structure"] impl crate::Readable for StateSpec {} #[doc = "`reset()` method sets STATE to value 0"] -impl crate::Resettable for StateSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for StateSpec {} diff --git a/va416xx/src/uart0/txbreak.rs b/va416xx/src/uart0/txbreak.rs index f54c610..d943200 100644 --- a/va416xx/src/uart0/txbreak.rs +++ b/va416xx/src/uart0/txbreak.rs @@ -15,10 +15,6 @@ impl crate::RegisterSpec for TxbreakSpec { #[doc = "`write(|w| ..)` method takes [`txbreak::W`](W) writer structure"] impl crate::Writable for TxbreakSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TXBREAK to value 0"] -impl crate::Resettable for TxbreakSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for TxbreakSpec {} diff --git a/va416xx/src/uart0/txfifoirqtrg.rs b/va416xx/src/uart0/txfifoirqtrg.rs index 00aa42f..ea0e7d3 100644 --- a/va416xx/src/uart0/txfifoirqtrg.rs +++ b/va416xx/src/uart0/txfifoirqtrg.rs @@ -19,10 +19,6 @@ impl crate::Readable for TxfifoirqtrgSpec {} #[doc = "`write(|w| ..)` method takes [`txfifoirqtrg::W`](W) writer structure"] impl crate::Writable for TxfifoirqtrgSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TXFIFOIRQTRG to value 0"] -impl crate::Resettable for TxfifoirqtrgSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for TxfifoirqtrgSpec {} diff --git a/va416xx/src/uart0/txstatus.rs b/va416xx/src/uart0/txstatus.rs index 76789f2..1ad3856 100644 --- a/va416xx/src/uart0/txstatus.rs +++ b/va416xx/src/uart0/txstatus.rs @@ -45,6 +45,4 @@ impl crate::RegisterSpec for TxstatusSpec { #[doc = "`read()` method returns [`txstatus::R`](R) reader structure"] impl crate::Readable for TxstatusSpec {} #[doc = "`reset()` method sets TXSTATUS to value 0"] -impl crate::Resettable for TxstatusSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for TxstatusSpec {} diff --git a/va416xx/src/utility.rs b/va416xx/src/utility.rs index b979c8e..751c3ce 100644 --- a/va416xx/src/utility.rs +++ b/va416xx/src/utility.rs @@ -96,92 +96,77 @@ impl RegisterBlock { &self.perid } } -#[doc = "SYND_DATA (rw) register accessor: Data Register\n\nYou can [`read`](crate::Reg::read) this register and get [`synd_data::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`synd_data::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@synd_data`] -module"] +#[doc = "SYND_DATA (rw) register accessor: Data Register\n\nYou can [`read`](crate::Reg::read) this register and get [`synd_data::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`synd_data::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@synd_data`] module"] #[doc(alias = "SYND_DATA")] pub type SyndData = crate::Reg; #[doc = "Data Register"] pub mod synd_data; -#[doc = "SYND_SYND (rw) register accessor: Syndrome Data Register\n\nYou can [`read`](crate::Reg::read) this register and get [`synd_synd::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`synd_synd::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@synd_synd`] -module"] +#[doc = "SYND_SYND (rw) register accessor: Syndrome Data Register\n\nYou can [`read`](crate::Reg::read) this register and get [`synd_synd::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`synd_synd::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@synd_synd`] module"] #[doc(alias = "SYND_SYND")] pub type SyndSynd = crate::Reg; #[doc = "Syndrome Data Register"] pub mod synd_synd; -#[doc = "SYND_ENC_32_44 (rw) register accessor: EDAC Encode\n\nYou can [`read`](crate::Reg::read) this register and get [`synd_enc_32_44::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`synd_enc_32_44::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@synd_enc_32_44`] -module"] +#[doc = "SYND_ENC_32_44 (rw) register accessor: EDAC Encode\n\nYou can [`read`](crate::Reg::read) this register and get [`synd_enc_32_44::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`synd_enc_32_44::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@synd_enc_32_44`] module"] #[doc(alias = "SYND_ENC_32_44")] pub type SyndEnc32_44 = crate::Reg; #[doc = "EDAC Encode"] pub mod synd_enc_32_44; -#[doc = "SYND_CHECK_32_44_DATA (r) register accessor: EDAC Decode Data\n\nYou can [`read`](crate::Reg::read) this register and get [`synd_check_32_44_data::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@synd_check_32_44_data`] -module"] +#[doc = "SYND_CHECK_32_44_DATA (r) register accessor: EDAC Decode Data\n\nYou can [`read`](crate::Reg::read) this register and get [`synd_check_32_44_data::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@synd_check_32_44_data`] module"] #[doc(alias = "SYND_CHECK_32_44_DATA")] pub type SyndCheck32_44Data = crate::Reg; #[doc = "EDAC Decode Data"] pub mod synd_check_32_44_data; -#[doc = "SYND_CHECK_32_44_SYND (r) register accessor: EDAC Decode Syndrome\n\nYou can [`read`](crate::Reg::read) this register and get [`synd_check_32_44_synd::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@synd_check_32_44_synd`] -module"] +#[doc = "SYND_CHECK_32_44_SYND (r) register accessor: EDAC Decode Syndrome\n\nYou can [`read`](crate::Reg::read) this register and get [`synd_check_32_44_synd::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@synd_check_32_44_synd`] module"] #[doc(alias = "SYND_CHECK_32_44_SYND")] pub type SyndCheck32_44Synd = crate::Reg; #[doc = "EDAC Decode Syndrome"] pub mod synd_check_32_44_synd; -#[doc = "ROM_TRAP_ADDRESS (rw) register accessor: ROM EDAC Trap Address\n\nYou can [`read`](crate::Reg::read) this register and get [`rom_trap_address::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rom_trap_address::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rom_trap_address`] -module"] +#[doc = "ROM_TRAP_ADDRESS (rw) register accessor: ROM EDAC Trap Address\n\nYou can [`read`](crate::Reg::read) this register and get [`rom_trap_address::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rom_trap_address::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rom_trap_address`] module"] #[doc(alias = "ROM_TRAP_ADDRESS")] pub type RomTrapAddress = crate::Reg; #[doc = "ROM EDAC Trap Address"] pub mod rom_trap_address; -#[doc = "ROM_TRAP_SYND (rw) register accessor: ROM EDAC Trap Syndrome\n\nYou can [`read`](crate::Reg::read) this register and get [`rom_trap_synd::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rom_trap_synd::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rom_trap_synd`] -module"] +#[doc = "ROM_TRAP_SYND (rw) register accessor: ROM EDAC Trap Syndrome\n\nYou can [`read`](crate::Reg::read) this register and get [`rom_trap_synd::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rom_trap_synd::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rom_trap_synd`] module"] #[doc(alias = "ROM_TRAP_SYND")] pub type RomTrapSynd = crate::Reg; #[doc = "ROM EDAC Trap Syndrome"] pub mod rom_trap_synd; -#[doc = "RAM_TRAP_ADDR0 (rw) register accessor: RAM0 EDAC Trap Address\n\nYou can [`read`](crate::Reg::read) this register and get [`ram_trap_addr0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ram_trap_addr0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ram_trap_addr0`] -module"] +#[doc = "RAM_TRAP_ADDR0 (rw) register accessor: RAM0 EDAC Trap Address\n\nYou can [`read`](crate::Reg::read) this register and get [`ram_trap_addr0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ram_trap_addr0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ram_trap_addr0`] module"] #[doc(alias = "RAM_TRAP_ADDR0")] pub type RamTrapAddr0 = crate::Reg; #[doc = "RAM0 EDAC Trap Address"] pub mod ram_trap_addr0; -#[doc = "RAM_TRAP_SYND0 (rw) register accessor: RAM0 EDAC Trap Syndrome\n\nYou can [`read`](crate::Reg::read) this register and get [`ram_trap_synd0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ram_trap_synd0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ram_trap_synd0`] -module"] +#[doc = "RAM_TRAP_SYND0 (rw) register accessor: RAM0 EDAC Trap Syndrome\n\nYou can [`read`](crate::Reg::read) this register and get [`ram_trap_synd0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ram_trap_synd0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ram_trap_synd0`] module"] #[doc(alias = "RAM_TRAP_SYND0")] pub type RamTrapSynd0 = crate::Reg; #[doc = "RAM0 EDAC Trap Syndrome"] pub mod ram_trap_synd0; -#[doc = "RAM_TRAP_ADDR1 (rw) register accessor: RAM1 EDAC Trap Address\n\nYou can [`read`](crate::Reg::read) this register and get [`ram_trap_addr1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ram_trap_addr1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ram_trap_addr1`] -module"] +#[doc = "RAM_TRAP_ADDR1 (rw) register accessor: RAM1 EDAC Trap Address\n\nYou can [`read`](crate::Reg::read) this register and get [`ram_trap_addr1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ram_trap_addr1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ram_trap_addr1`] module"] #[doc(alias = "RAM_TRAP_ADDR1")] pub type RamTrapAddr1 = crate::Reg; #[doc = "RAM1 EDAC Trap Address"] pub mod ram_trap_addr1; -#[doc = "RAM_TRAP_SYND1 (rw) register accessor: RAM1 EDAC Trap Syndrome\n\nYou can [`read`](crate::Reg::read) this register and get [`ram_trap_synd1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ram_trap_synd1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ram_trap_synd1`] -module"] +#[doc = "RAM_TRAP_SYND1 (rw) register accessor: RAM1 EDAC Trap Syndrome\n\nYou can [`read`](crate::Reg::read) this register and get [`ram_trap_synd1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ram_trap_synd1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ram_trap_synd1`] module"] #[doc(alias = "RAM_TRAP_SYND1")] pub type RamTrapSynd1 = crate::Reg; #[doc = "RAM1 EDAC Trap Syndrome"] pub mod ram_trap_synd1; -#[doc = "SYND_ENC_32_52 (r) register accessor: EDAC Encode\n\nYou can [`read`](crate::Reg::read) this register and get [`synd_enc_32_52::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@synd_enc_32_52`] -module"] +#[doc = "SYND_ENC_32_52 (r) register accessor: EDAC Encode\n\nYou can [`read`](crate::Reg::read) this register and get [`synd_enc_32_52::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@synd_enc_32_52`] module"] #[doc(alias = "SYND_ENC_32_52")] pub type SyndEnc32_52 = crate::Reg; #[doc = "EDAC Encode"] pub mod synd_enc_32_52; -#[doc = "SYND_CHECK_32_52_DATA (r) register accessor: EDAC Decode Data\n\nYou can [`read`](crate::Reg::read) this register and get [`synd_check_32_52_data::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@synd_check_32_52_data`] -module"] +#[doc = "SYND_CHECK_32_52_DATA (r) register accessor: EDAC Decode Data\n\nYou can [`read`](crate::Reg::read) this register and get [`synd_check_32_52_data::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@synd_check_32_52_data`] module"] #[doc(alias = "SYND_CHECK_32_52_DATA")] pub type SyndCheck32_52Data = crate::Reg; #[doc = "EDAC Decode Data"] pub mod synd_check_32_52_data; -#[doc = "SYND_CHECK_32_52_SYND (r) register accessor: EDAC Decode Syndrome\n\nYou can [`read`](crate::Reg::read) this register and get [`synd_check_32_52_synd::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@synd_check_32_52_synd`] -module"] +#[doc = "SYND_CHECK_32_52_SYND (r) register accessor: EDAC Decode Syndrome\n\nYou can [`read`](crate::Reg::read) this register and get [`synd_check_32_52_synd::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@synd_check_32_52_synd`] module"] #[doc(alias = "SYND_CHECK_32_52_SYND")] pub type SyndCheck32_52Synd = crate::Reg; #[doc = "EDAC Decode Syndrome"] pub mod synd_check_32_52_synd; -#[doc = "PERID (r) register accessor: Peripheral ID Register\n\nYou can [`read`](crate::Reg::read) this register and get [`perid::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@perid`] -module"] +#[doc = "PERID (r) register accessor: Peripheral ID Register\n\nYou can [`read`](crate::Reg::read) this register and get [`perid::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@perid`] module"] #[doc(alias = "PERID")] pub type Perid = crate::Reg; #[doc = "Peripheral ID Register"] diff --git a/va416xx/src/utility/ram_trap_addr0.rs b/va416xx/src/utility/ram_trap_addr0.rs index e48d3d3..f8ee41f 100644 --- a/va416xx/src/utility/ram_trap_addr0.rs +++ b/va416xx/src/utility/ram_trap_addr0.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 2:30 - Address bits for trap match"] #[inline(always)] - pub fn addr(&mut self) -> AddrW { + pub fn addr(&mut self) -> AddrW<'_, RamTrapAddr0Spec> { AddrW::new(self, 2) } #[doc = "Bit 31 - Enable Trap mode"] #[inline(always)] - pub fn enable(&mut self) -> EnableW { + pub fn enable(&mut self) -> EnableW<'_, RamTrapAddr0Spec> { EnableW::new(self, 31) } } @@ -44,10 +44,6 @@ impl crate::Readable for RamTrapAddr0Spec {} #[doc = "`write(|w| ..)` method takes [`ram_trap_addr0::W`](W) writer structure"] impl crate::Writable for RamTrapAddr0Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RAM_TRAP_ADDR0 to value 0"] -impl crate::Resettable for RamTrapAddr0Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for RamTrapAddr0Spec {} diff --git a/va416xx/src/utility/ram_trap_addr1.rs b/va416xx/src/utility/ram_trap_addr1.rs index 6414a05..d2d91f7 100644 --- a/va416xx/src/utility/ram_trap_addr1.rs +++ b/va416xx/src/utility/ram_trap_addr1.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 2:30 - Address bits for trap match"] #[inline(always)] - pub fn addr(&mut self) -> AddrW { + pub fn addr(&mut self) -> AddrW<'_, RamTrapAddr1Spec> { AddrW::new(self, 2) } #[doc = "Bit 31 - Enable Trap mode"] #[inline(always)] - pub fn enable(&mut self) -> EnableW { + pub fn enable(&mut self) -> EnableW<'_, RamTrapAddr1Spec> { EnableW::new(self, 31) } } @@ -44,10 +44,6 @@ impl crate::Readable for RamTrapAddr1Spec {} #[doc = "`write(|w| ..)` method takes [`ram_trap_addr1::W`](W) writer structure"] impl crate::Writable for RamTrapAddr1Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RAM_TRAP_ADDR1 to value 0"] -impl crate::Resettable for RamTrapAddr1Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for RamTrapAddr1Spec {} diff --git a/va416xx/src/utility/ram_trap_synd0.rs b/va416xx/src/utility/ram_trap_synd0.rs index 82cd995..a8b7ca9 100644 --- a/va416xx/src/utility/ram_trap_synd0.rs +++ b/va416xx/src/utility/ram_trap_synd0.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:5 - 6-bit syndrome value for bits 15-0"] #[inline(always)] - pub fn ram_synd_7_0(&mut self) -> RamSynd7_0W { + pub fn ram_synd_7_0(&mut self) -> RamSynd7_0W<'_, RamTrapSynd0Spec> { RamSynd7_0W::new(self, 0) } #[doc = "Bits 6:11 - 6-bit syndrome value for bits 31-16"] #[inline(always)] - pub fn ram_synd_31_16(&mut self) -> RamSynd31_16W { + pub fn ram_synd_31_16(&mut self) -> RamSynd31_16W<'_, RamTrapSynd0Spec> { RamSynd31_16W::new(self, 6) } } @@ -44,10 +44,6 @@ impl crate::Readable for RamTrapSynd0Spec {} #[doc = "`write(|w| ..)` method takes [`ram_trap_synd0::W`](W) writer structure"] impl crate::Writable for RamTrapSynd0Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RAM_TRAP_SYND0 to value 0"] -impl crate::Resettable for RamTrapSynd0Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for RamTrapSynd0Spec {} diff --git a/va416xx/src/utility/ram_trap_synd1.rs b/va416xx/src/utility/ram_trap_synd1.rs index ea32757..7dd7e3b 100644 --- a/va416xx/src/utility/ram_trap_synd1.rs +++ b/va416xx/src/utility/ram_trap_synd1.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:5 - 6-bit syndrome value for bits 15-0"] #[inline(always)] - pub fn ram_synd_7_0(&mut self) -> RamSynd7_0W { + pub fn ram_synd_7_0(&mut self) -> RamSynd7_0W<'_, RamTrapSynd1Spec> { RamSynd7_0W::new(self, 0) } #[doc = "Bits 6:11 - 6-bit syndrome value for bits 31-16"] #[inline(always)] - pub fn ram_synd_31_16(&mut self) -> RamSynd31_16W { + pub fn ram_synd_31_16(&mut self) -> RamSynd31_16W<'_, RamTrapSynd1Spec> { RamSynd31_16W::new(self, 6) } } @@ -44,10 +44,6 @@ impl crate::Readable for RamTrapSynd1Spec {} #[doc = "`write(|w| ..)` method takes [`ram_trap_synd1::W`](W) writer structure"] impl crate::Writable for RamTrapSynd1Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RAM_TRAP_SYND1 to value 0"] -impl crate::Resettable for RamTrapSynd1Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for RamTrapSynd1Spec {} diff --git a/va416xx/src/utility/rom_trap_address.rs b/va416xx/src/utility/rom_trap_address.rs index 7e6b9b8..7d0843d 100644 --- a/va416xx/src/utility/rom_trap_address.rs +++ b/va416xx/src/utility/rom_trap_address.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 2:30 - Address bits for trap match"] #[inline(always)] - pub fn addr(&mut self) -> AddrW { + pub fn addr(&mut self) -> AddrW<'_, RomTrapAddressSpec> { AddrW::new(self, 2) } #[doc = "Bit 31 - Enable Trap mode"] #[inline(always)] - pub fn enable(&mut self) -> EnableW { + pub fn enable(&mut self) -> EnableW<'_, RomTrapAddressSpec> { EnableW::new(self, 31) } } @@ -44,10 +44,6 @@ impl crate::Readable for RomTrapAddressSpec {} #[doc = "`write(|w| ..)` method takes [`rom_trap_address::W`](W) writer structure"] impl crate::Writable for RomTrapAddressSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ROM_TRAP_ADDRESS to value 0"] -impl crate::Resettable for RomTrapAddressSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for RomTrapAddressSpec {} diff --git a/va416xx/src/utility/rom_trap_synd.rs b/va416xx/src/utility/rom_trap_synd.rs index ed7cf18..ab6c9b8 100644 --- a/va416xx/src/utility/rom_trap_synd.rs +++ b/va416xx/src/utility/rom_trap_synd.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:5 - 6-bit syndrome value for bits 15-0"] #[inline(always)] - pub fn rom_synd_7_0(&mut self) -> RomSynd7_0W { + pub fn rom_synd_7_0(&mut self) -> RomSynd7_0W<'_, RomTrapSyndSpec> { RomSynd7_0W::new(self, 0) } #[doc = "Bits 6:11 - 6-bit syndrome value for bits 31-16"] #[inline(always)] - pub fn r0m_synd_31_16(&mut self) -> R0mSynd31_16W { + pub fn r0m_synd_31_16(&mut self) -> R0mSynd31_16W<'_, RomTrapSyndSpec> { R0mSynd31_16W::new(self, 6) } } @@ -44,10 +44,6 @@ impl crate::Readable for RomTrapSyndSpec {} #[doc = "`write(|w| ..)` method takes [`rom_trap_synd::W`](W) writer structure"] impl crate::Writable for RomTrapSyndSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ROM_TRAP_SYND to value 0"] -impl crate::Resettable for RomTrapSyndSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for RomTrapSyndSpec {} diff --git a/va416xx/src/utility/synd_check_32_44_data.rs b/va416xx/src/utility/synd_check_32_44_data.rs index 18aceaf..77338e3 100644 --- a/va416xx/src/utility/synd_check_32_44_data.rs +++ b/va416xx/src/utility/synd_check_32_44_data.rs @@ -14,6 +14,4 @@ impl crate::RegisterSpec for SyndCheck32_44DataSpec { #[doc = "`read()` method returns [`synd_check_32_44_data::R`](R) reader structure"] impl crate::Readable for SyndCheck32_44DataSpec {} #[doc = "`reset()` method sets SYND_CHECK_32_44_DATA to value 0"] -impl crate::Resettable for SyndCheck32_44DataSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for SyndCheck32_44DataSpec {} diff --git a/va416xx/src/utility/synd_check_32_44_synd.rs b/va416xx/src/utility/synd_check_32_44_synd.rs index f00807c..e49c635 100644 --- a/va416xx/src/utility/synd_check_32_44_synd.rs +++ b/va416xx/src/utility/synd_check_32_44_synd.rs @@ -31,6 +31,4 @@ impl crate::RegisterSpec for SyndCheck32_44SyndSpec { #[doc = "`read()` method returns [`synd_check_32_44_synd::R`](R) reader structure"] impl crate::Readable for SyndCheck32_44SyndSpec {} #[doc = "`reset()` method sets SYND_CHECK_32_44_SYND to value 0"] -impl crate::Resettable for SyndCheck32_44SyndSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for SyndCheck32_44SyndSpec {} diff --git a/va416xx/src/utility/synd_check_32_52_data.rs b/va416xx/src/utility/synd_check_32_52_data.rs index b16658d..52046b6 100644 --- a/va416xx/src/utility/synd_check_32_52_data.rs +++ b/va416xx/src/utility/synd_check_32_52_data.rs @@ -14,6 +14,4 @@ impl crate::RegisterSpec for SyndCheck32_52DataSpec { #[doc = "`read()` method returns [`synd_check_32_52_data::R`](R) reader structure"] impl crate::Readable for SyndCheck32_52DataSpec {} #[doc = "`reset()` method sets SYND_CHECK_32_52_DATA to value 0"] -impl crate::Resettable for SyndCheck32_52DataSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for SyndCheck32_52DataSpec {} diff --git a/va416xx/src/utility/synd_check_32_52_synd.rs b/va416xx/src/utility/synd_check_32_52_synd.rs index 069481a..5af3a5a 100644 --- a/va416xx/src/utility/synd_check_32_52_synd.rs +++ b/va416xx/src/utility/synd_check_32_52_synd.rs @@ -31,6 +31,4 @@ impl crate::RegisterSpec for SyndCheck32_52SyndSpec { #[doc = "`read()` method returns [`synd_check_32_52_synd::R`](R) reader structure"] impl crate::Readable for SyndCheck32_52SyndSpec {} #[doc = "`reset()` method sets SYND_CHECK_32_52_SYND to value 0"] -impl crate::Resettable for SyndCheck32_52SyndSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for SyndCheck32_52SyndSpec {} diff --git a/va416xx/src/utility/synd_data.rs b/va416xx/src/utility/synd_data.rs index 07c0ab5..68c6407 100644 --- a/va416xx/src/utility/synd_data.rs +++ b/va416xx/src/utility/synd_data.rs @@ -19,10 +19,6 @@ impl crate::Readable for SyndDataSpec {} #[doc = "`write(|w| ..)` method takes [`synd_data::W`](W) writer structure"] impl crate::Writable for SyndDataSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SYND_DATA to value 0"] -impl crate::Resettable for SyndDataSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for SyndDataSpec {} diff --git a/va416xx/src/utility/synd_enc_32_44.rs b/va416xx/src/utility/synd_enc_32_44.rs index 9a39c9a..4511611 100644 --- a/va416xx/src/utility/synd_enc_32_44.rs +++ b/va416xx/src/utility/synd_enc_32_44.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bits 0:5 - Computed syndrome value for bits 15-0"] #[inline(always)] - pub fn synd_enc_7_0(&mut self) -> SyndEnc7_0W { + pub fn synd_enc_7_0(&mut self) -> SyndEnc7_0W<'_, SyndEnc32_44Spec> { SyndEnc7_0W::new(self, 0) } #[doc = "Bits 6:11 - Computed syndrome value for bits 31-16"] #[inline(always)] - pub fn synd_enc_31_16(&mut self) -> SyndEnc31_16W { + pub fn synd_enc_31_16(&mut self) -> SyndEnc31_16W<'_, SyndEnc32_44Spec> { SyndEnc31_16W::new(self, 6) } } @@ -44,10 +44,6 @@ impl crate::Readable for SyndEnc32_44Spec {} #[doc = "`write(|w| ..)` method takes [`synd_enc_32_44::W`](W) writer structure"] impl crate::Writable for SyndEnc32_44Spec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SYND_ENC_32_44 to value 0"] -impl crate::Resettable for SyndEnc32_44Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for SyndEnc32_44Spec {} diff --git a/va416xx/src/utility/synd_enc_32_52.rs b/va416xx/src/utility/synd_enc_32_52.rs index 233415d..3cc532e 100644 --- a/va416xx/src/utility/synd_enc_32_52.rs +++ b/va416xx/src/utility/synd_enc_32_52.rs @@ -17,6 +17,4 @@ impl crate::RegisterSpec for SyndEnc32_52Spec { #[doc = "`read()` method returns [`synd_enc_32_52::R`](R) reader structure"] impl crate::Readable for SyndEnc32_52Spec {} #[doc = "`reset()` method sets SYND_ENC_32_52 to value 0"] -impl crate::Resettable for SyndEnc32_52Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for SyndEnc32_52Spec {} diff --git a/va416xx/src/utility/synd_synd.rs b/va416xx/src/utility/synd_synd.rs index bfb6c6f..d2a2bc9 100644 --- a/va416xx/src/utility/synd_synd.rs +++ b/va416xx/src/utility/synd_synd.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:11 - Provides bits 11:0 for syndrome, 2x6-bit"] #[inline(always)] - pub fn synd_synd(&mut self) -> SyndSyndW { + pub fn synd_synd(&mut self) -> SyndSyndW<'_, SyndSyndSpec> { SyndSyndW::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for SyndSyndSpec {} #[doc = "`write(|w| ..)` method takes [`synd_synd::W`](W) writer structure"] impl crate::Writable for SyndSyndSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SYND_SYND to value 0"] -impl crate::Resettable for SyndSyndSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for SyndSyndSpec {} diff --git a/va416xx/src/watch_dog.rs b/va416xx/src/watch_dog.rs index 9449064..9425493 100644 --- a/va416xx/src/watch_dog.rs +++ b/va416xx/src/watch_dog.rs @@ -109,104 +109,87 @@ impl RegisterBlock { &self.wdogpcellid3 } } -#[doc = "WDOGLOAD (rw) register accessor: Counter Start Value\n\nYou can [`read`](crate::Reg::read) this register and get [`wdogload::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wdogload::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdogload`] -module"] +#[doc = "WDOGLOAD (rw) register accessor: Counter Start Value\n\nYou can [`read`](crate::Reg::read) this register and get [`wdogload::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wdogload::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdogload`] module"] #[doc(alias = "WDOGLOAD")] pub type Wdogload = crate::Reg; #[doc = "Counter Start Value"] pub mod wdogload; -#[doc = "WDOGVALUE (r) register accessor: Down Counter Value\n\nYou can [`read`](crate::Reg::read) this register and get [`wdogvalue::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdogvalue`] -module"] +#[doc = "WDOGVALUE (r) register accessor: Down Counter Value\n\nYou can [`read`](crate::Reg::read) this register and get [`wdogvalue::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdogvalue`] module"] #[doc(alias = "WDOGVALUE")] pub type Wdogvalue = crate::Reg; #[doc = "Down Counter Value"] pub mod wdogvalue; -#[doc = "WDOGCONTROL (rw) register accessor: Enable for block reset and interrupt\n\nYou can [`read`](crate::Reg::read) this register and get [`wdogcontrol::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wdogcontrol::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdogcontrol`] -module"] +#[doc = "WDOGCONTROL (rw) register accessor: Enable for block reset and interrupt\n\nYou can [`read`](crate::Reg::read) this register and get [`wdogcontrol::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wdogcontrol::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdogcontrol`] module"] #[doc(alias = "WDOGCONTROL")] pub type Wdogcontrol = crate::Reg; #[doc = "Enable for block reset and interrupt"] pub mod wdogcontrol; -#[doc = "WDOGINTCLR (rw) register accessor: A write of any value clears the WDT module interrupt, and reloads the counter from the value in the WDOGLOAD Register\n\nYou can [`read`](crate::Reg::read) this register and get [`wdogintclr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wdogintclr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdogintclr`] -module"] +#[doc = "WDOGINTCLR (rw) register accessor: A write of any value clears the WDT module interrupt, and reloads the counter from the value in the WDOGLOAD Register\n\nYou can [`read`](crate::Reg::read) this register and get [`wdogintclr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wdogintclr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdogintclr`] module"] #[doc(alias = "WDOGINTCLR")] pub type Wdogintclr = crate::Reg; #[doc = "A write of any value clears the WDT module interrupt, and reloads the counter from the value in the WDOGLOAD Register"] pub mod wdogintclr; -#[doc = "WDOGRIS (r) register accessor: Raw interrupt status\n\nYou can [`read`](crate::Reg::read) this register and get [`wdogris::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdogris`] -module"] +#[doc = "WDOGRIS (r) register accessor: Raw interrupt status\n\nYou can [`read`](crate::Reg::read) this register and get [`wdogris::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdogris`] module"] #[doc(alias = "WDOGRIS")] pub type Wdogris = crate::Reg; #[doc = "Raw interrupt status"] pub mod wdogris; -#[doc = "WDOGMIS (r) register accessor: Interrupt status\n\nYou can [`read`](crate::Reg::read) this register and get [`wdogmis::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdogmis`] -module"] +#[doc = "WDOGMIS (r) register accessor: Interrupt status\n\nYou can [`read`](crate::Reg::read) this register and get [`wdogmis::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdogmis`] module"] #[doc(alias = "WDOGMIS")] pub type Wdogmis = crate::Reg; #[doc = "Interrupt status"] pub mod wdogmis; -#[doc = "WDOGLOCK (rw) register accessor: Lock\n\nYou can [`read`](crate::Reg::read) this register and get [`wdoglock::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wdoglock::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdoglock`] -module"] +#[doc = "WDOGLOCK (rw) register accessor: Lock\n\nYou can [`read`](crate::Reg::read) this register and get [`wdoglock::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wdoglock::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdoglock`] module"] #[doc(alias = "WDOGLOCK")] pub type Wdoglock = crate::Reg; #[doc = "Lock"] pub mod wdoglock; -#[doc = "WDOGITCR (rw) register accessor: Integration test control\n\nYou can [`read`](crate::Reg::read) this register and get [`wdogitcr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wdogitcr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdogitcr`] -module"] +#[doc = "WDOGITCR (rw) register accessor: Integration test control\n\nYou can [`read`](crate::Reg::read) this register and get [`wdogitcr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wdogitcr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdogitcr`] module"] #[doc(alias = "WDOGITCR")] pub type Wdogitcr = crate::Reg; #[doc = "Integration test control"] pub mod wdogitcr; -#[doc = "WDOGITOP (rw) register accessor: Integration test output set\n\nYou can [`read`](crate::Reg::read) this register and get [`wdogitop::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wdogitop::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdogitop`] -module"] +#[doc = "WDOGITOP (rw) register accessor: Integration test output set\n\nYou can [`read`](crate::Reg::read) this register and get [`wdogitop::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wdogitop::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdogitop`] module"] #[doc(alias = "WDOGITOP")] pub type Wdogitop = crate::Reg; #[doc = "Integration test output set"] pub mod wdogitop; -#[doc = "WDOGPERIPHID0 (r) register accessor: Peripheral ID\n\nYou can [`read`](crate::Reg::read) this register and get [`wdogperiphid0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdogperiphid0`] -module"] +#[doc = "WDOGPERIPHID0 (r) register accessor: Peripheral ID\n\nYou can [`read`](crate::Reg::read) this register and get [`wdogperiphid0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdogperiphid0`] module"] #[doc(alias = "WDOGPERIPHID0")] pub type Wdogperiphid0 = crate::Reg; #[doc = "Peripheral ID"] pub mod wdogperiphid0; -#[doc = "WDOGPERIPHID1 (r) register accessor: Peripheral ID\n\nYou can [`read`](crate::Reg::read) this register and get [`wdogperiphid1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdogperiphid1`] -module"] +#[doc = "WDOGPERIPHID1 (r) register accessor: Peripheral ID\n\nYou can [`read`](crate::Reg::read) this register and get [`wdogperiphid1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdogperiphid1`] module"] #[doc(alias = "WDOGPERIPHID1")] pub type Wdogperiphid1 = crate::Reg; #[doc = "Peripheral ID"] pub mod wdogperiphid1; -#[doc = "WDOGPERIPHID2 (r) register accessor: Peripheral ID\n\nYou can [`read`](crate::Reg::read) this register and get [`wdogperiphid2::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdogperiphid2`] -module"] +#[doc = "WDOGPERIPHID2 (r) register accessor: Peripheral ID\n\nYou can [`read`](crate::Reg::read) this register and get [`wdogperiphid2::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdogperiphid2`] module"] #[doc(alias = "WDOGPERIPHID2")] pub type Wdogperiphid2 = crate::Reg; #[doc = "Peripheral ID"] pub mod wdogperiphid2; -#[doc = "WDOGPERIPHID3 (r) register accessor: Peripheral ID\n\nYou can [`read`](crate::Reg::read) this register and get [`wdogperiphid3::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdogperiphid3`] -module"] +#[doc = "WDOGPERIPHID3 (r) register accessor: Peripheral ID\n\nYou can [`read`](crate::Reg::read) this register and get [`wdogperiphid3::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdogperiphid3`] module"] #[doc(alias = "WDOGPERIPHID3")] pub type Wdogperiphid3 = crate::Reg; #[doc = "Peripheral ID"] pub mod wdogperiphid3; -#[doc = "WDOGPCELLID0 (r) register accessor: PrimeCell ID\n\nYou can [`read`](crate::Reg::read) this register and get [`wdogpcellid0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdogpcellid0`] -module"] +#[doc = "WDOGPCELLID0 (r) register accessor: PrimeCell ID\n\nYou can [`read`](crate::Reg::read) this register and get [`wdogpcellid0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdogpcellid0`] module"] #[doc(alias = "WDOGPCELLID0")] pub type Wdogpcellid0 = crate::Reg; #[doc = "PrimeCell ID"] pub mod wdogpcellid0; -#[doc = "WDOGPCELLID1 (r) register accessor: PrimeCell ID\n\nYou can [`read`](crate::Reg::read) this register and get [`wdogpcellid1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdogpcellid1`] -module"] +#[doc = "WDOGPCELLID1 (r) register accessor: PrimeCell ID\n\nYou can [`read`](crate::Reg::read) this register and get [`wdogpcellid1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdogpcellid1`] module"] #[doc(alias = "WDOGPCELLID1")] pub type Wdogpcellid1 = crate::Reg; #[doc = "PrimeCell ID"] pub mod wdogpcellid1; -#[doc = "WDOGPCELLID2 (r) register accessor: PrimeCell ID\n\nYou can [`read`](crate::Reg::read) this register and get [`wdogpcellid2::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdogpcellid2`] -module"] +#[doc = "WDOGPCELLID2 (r) register accessor: PrimeCell ID\n\nYou can [`read`](crate::Reg::read) this register and get [`wdogpcellid2::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdogpcellid2`] module"] #[doc(alias = "WDOGPCELLID2")] pub type Wdogpcellid2 = crate::Reg; #[doc = "PrimeCell ID"] pub mod wdogpcellid2; -#[doc = "WDOGPCELLID3 (r) register accessor: PrimeCell ID\n\nYou can [`read`](crate::Reg::read) this register and get [`wdogpcellid3::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdogpcellid3`] -module"] +#[doc = "WDOGPCELLID3 (r) register accessor: PrimeCell ID\n\nYou can [`read`](crate::Reg::read) this register and get [`wdogpcellid3::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdogpcellid3`] module"] #[doc(alias = "WDOGPCELLID3")] pub type Wdogpcellid3 = crate::Reg; #[doc = "PrimeCell ID"] diff --git a/va416xx/src/watch_dog/wdogcontrol.rs b/va416xx/src/watch_dog/wdogcontrol.rs index 386a5b7..64456c1 100644 --- a/va416xx/src/watch_dog/wdogcontrol.rs +++ b/va416xx/src/watch_dog/wdogcontrol.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bit 0 - Enable watchdog interrupt"] #[inline(always)] - pub fn inten(&mut self) -> IntenW { + pub fn inten(&mut self) -> IntenW<'_, WdogcontrolSpec> { IntenW::new(self, 0) } #[doc = "Bit 1 - Enable watchdog reset output"] #[inline(always)] - pub fn resen(&mut self) -> ResenW { + pub fn resen(&mut self) -> ResenW<'_, WdogcontrolSpec> { ResenW::new(self, 1) } } @@ -44,10 +44,6 @@ impl crate::Readable for WdogcontrolSpec {} #[doc = "`write(|w| ..)` method takes [`wdogcontrol::W`](W) writer structure"] impl crate::Writable for WdogcontrolSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets WDOGCONTROL to value 0"] -impl crate::Resettable for WdogcontrolSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for WdogcontrolSpec {} diff --git a/va416xx/src/watch_dog/wdogintclr.rs b/va416xx/src/watch_dog/wdogintclr.rs index d821377..69d07bc 100644 --- a/va416xx/src/watch_dog/wdogintclr.rs +++ b/va416xx/src/watch_dog/wdogintclr.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:31 - Write any value to clear interrupt"] #[inline(always)] - pub fn clear(&mut self) -> ClearW { + pub fn clear(&mut self) -> ClearW<'_, WdogintclrSpec> { ClearW::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for WdogintclrSpec {} #[doc = "`write(|w| ..)` method takes [`wdogintclr::W`](W) writer structure"] impl crate::Writable for WdogintclrSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets WDOGINTCLR to value 0"] -impl crate::Resettable for WdogintclrSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for WdogintclrSpec {} diff --git a/va416xx/src/watch_dog/wdogitcr.rs b/va416xx/src/watch_dog/wdogitcr.rs index 74f43a1..880b085 100644 --- a/va416xx/src/watch_dog/wdogitcr.rs +++ b/va416xx/src/watch_dog/wdogitcr.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bit 0 - Enable test mode of WDOGINT and WDOGRES"] #[inline(always)] - pub fn test_mode_en(&mut self) -> TestModeEnW { + pub fn test_mode_en(&mut self) -> TestModeEnW<'_, WdogitcrSpec> { TestModeEnW::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for WdogitcrSpec {} #[doc = "`write(|w| ..)` method takes [`wdogitcr::W`](W) writer structure"] impl crate::Writable for WdogitcrSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets WDOGITCR to value 0"] -impl crate::Resettable for WdogitcrSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for WdogitcrSpec {} diff --git a/va416xx/src/watch_dog/wdogitop.rs b/va416xx/src/watch_dog/wdogitop.rs index e3b75c4..864ef1f 100644 --- a/va416xx/src/watch_dog/wdogitop.rs +++ b/va416xx/src/watch_dog/wdogitop.rs @@ -25,12 +25,12 @@ impl R { impl W { #[doc = "Bit 0 - Set output value"] #[inline(always)] - pub fn wdogres(&mut self) -> WdogresW { + pub fn wdogres(&mut self) -> WdogresW<'_, WdogitopSpec> { WdogresW::new(self, 0) } #[doc = "Bit 1 - Set output value"] #[inline(always)] - pub fn wdogint(&mut self) -> WdogintW { + pub fn wdogint(&mut self) -> WdogintW<'_, WdogitopSpec> { WdogintW::new(self, 1) } } @@ -44,10 +44,6 @@ impl crate::Readable for WdogitopSpec {} #[doc = "`write(|w| ..)` method takes [`wdogitop::W`](W) writer structure"] impl crate::Writable for WdogitopSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets WDOGITOP to value 0"] -impl crate::Resettable for WdogitopSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for WdogitopSpec {} diff --git a/va416xx/src/watch_dog/wdogload.rs b/va416xx/src/watch_dog/wdogload.rs index e631c3c..6795201 100644 --- a/va416xx/src/watch_dog/wdogload.rs +++ b/va416xx/src/watch_dog/wdogload.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:31 - Count to load"] #[inline(always)] - pub fn cnt(&mut self) -> CntW { + pub fn cnt(&mut self) -> CntW<'_, WdogloadSpec> { CntW::new(self, 0) } } @@ -30,8 +30,6 @@ impl crate::Readable for WdogloadSpec {} #[doc = "`write(|w| ..)` method takes [`wdogload::W`](W) writer structure"] impl crate::Writable for WdogloadSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets WDOGLOAD to value 0xffff_ffff"] impl crate::Resettable for WdogloadSpec { diff --git a/va416xx/src/watch_dog/wdoglock.rs b/va416xx/src/watch_dog/wdoglock.rs index bf71352..e58110b 100644 --- a/va416xx/src/watch_dog/wdoglock.rs +++ b/va416xx/src/watch_dog/wdoglock.rs @@ -16,7 +16,7 @@ impl R { impl W { #[doc = "Bits 0:31 - Register write enable status"] #[inline(always)] - pub fn reg_wr_en(&mut self) -> RegWrEnW { + pub fn reg_wr_en(&mut self) -> RegWrEnW<'_, WdoglockSpec> { RegWrEnW::new(self, 0) } } @@ -30,10 +30,6 @@ impl crate::Readable for WdoglockSpec {} #[doc = "`write(|w| ..)` method takes [`wdoglock::W`](W) writer structure"] impl crate::Writable for WdoglockSpec { type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets WDOGLOCK to value 0"] -impl crate::Resettable for WdoglockSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for WdoglockSpec {} diff --git a/va416xx/src/watch_dog/wdogmis.rs b/va416xx/src/watch_dog/wdogmis.rs index f9398e1..2662c85 100644 --- a/va416xx/src/watch_dog/wdogmis.rs +++ b/va416xx/src/watch_dog/wdogmis.rs @@ -17,6 +17,4 @@ impl crate::RegisterSpec for WdogmisSpec { #[doc = "`read()` method returns [`wdogmis::R`](R) reader structure"] impl crate::Readable for WdogmisSpec {} #[doc = "`reset()` method sets WDOGMIS to value 0"] -impl crate::Resettable for WdogmisSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for WdogmisSpec {} diff --git a/va416xx/src/watch_dog/wdogperiphid3.rs b/va416xx/src/watch_dog/wdogperiphid3.rs index d236e0f..57c2c71 100644 --- a/va416xx/src/watch_dog/wdogperiphid3.rs +++ b/va416xx/src/watch_dog/wdogperiphid3.rs @@ -17,6 +17,4 @@ impl crate::RegisterSpec for Wdogperiphid3Spec { #[doc = "`read()` method returns [`wdogperiphid3::R`](R) reader structure"] impl crate::Readable for Wdogperiphid3Spec {} #[doc = "`reset()` method sets WDOGPERIPHID3 to value 0"] -impl crate::Resettable for Wdogperiphid3Spec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for Wdogperiphid3Spec {} diff --git a/va416xx/src/watch_dog/wdogris.rs b/va416xx/src/watch_dog/wdogris.rs index a7885d7..3d7f768 100644 --- a/va416xx/src/watch_dog/wdogris.rs +++ b/va416xx/src/watch_dog/wdogris.rs @@ -17,6 +17,4 @@ impl crate::RegisterSpec for WdogrisSpec { #[doc = "`read()` method returns [`wdogris::R`](R) reader structure"] impl crate::Readable for WdogrisSpec {} #[doc = "`reset()` method sets WDOGRIS to value 0"] -impl crate::Resettable for WdogrisSpec { - const RESET_VALUE: u32 = 0; -} +impl crate::Resettable for WdogrisSpec {}