From b41f902a14c3e660c9c9b6d4b5880d7d22a13de7 Mon Sep 17 00:00:00 2001 From: Robin Mueller Date: Tue, 11 Jun 2024 20:24:24 +0200 Subject: [PATCH] fast blinky --- .cargo/{def-config.toml => config.toml.bak} | 2 +- .gitignore | 5 +- Cargo.toml | 2 +- jlink/JLinkSettings.JLinkScript | 2 +- scripts/VA416xx_Series.yaml | 99 +++++++++++++++++++++ va416xx-hal/Cargo.toml | 14 +-- va416xx-hal/examples/blinky.rs | 33 ++++--- va416xx-hal/src/clock.rs | 14 ++- vorago-peb1/Cargo.toml | 12 +-- vscode/.cortex-debug.peripherals.state.json | 1 + vscode/.cortex-debug.registers.state.json | 1 + {.vscode => vscode}/launch.json | 0 vscode/settings.json | 3 + {.vscode => vscode}/tasks.json | 0 14 files changed, 135 insertions(+), 53 deletions(-) rename .cargo/{def-config.toml => config.toml.bak} (93%) create mode 100644 scripts/VA416xx_Series.yaml create mode 100644 vscode/.cortex-debug.peripherals.state.json create mode 100644 vscode/.cortex-debug.registers.state.json rename {.vscode => vscode}/launch.json (100%) create mode 100644 vscode/settings.json rename {.vscode => vscode}/tasks.json (100%) diff --git a/.cargo/def-config.toml b/.cargo/config.toml.bak similarity index 93% rename from .cargo/def-config.toml rename to .cargo/config.toml.bak index 74cd913..b665ddd 100644 --- a/.cargo/def-config.toml +++ b/.cargo/config.toml.bak @@ -3,7 +3,7 @@ # which option to pick depends on your system # If the RevA board is used, replace jlink.gdb with jlink-reva.gdb # runner = "arm-none-eabi-gdb -q -x jlink/jlink.gdb" -# runner = "gdb-multiarch -q -x jlink/jlink.gdb" +runner = "gdb-multiarch -q -x jlink/jlink.gdb" # runner = "arm-none-eabi-gdb -q -x jlink/jlink-reva.gdb" # runner = "gdb-multiarch -q -x jlink/jlink-reva.gdb" diff --git a/.gitignore b/.gitignore index 61f7439..ee46a83 100644 --- a/.gitignore +++ b/.gitignore @@ -1,6 +1,7 @@ # Generated by Cargo # will have compiled files and executables /target/ +/.vscode # Ignore user config /.cargo/config.toml @@ -11,7 +12,3 @@ Cargo.lock # These are backup files generated by rustfmt **/*.rs.bk - -/.vscode/.cortex-debug.* - -/.vscode/settings.json diff --git a/Cargo.toml b/Cargo.toml index 1556219..51d3076 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -1,5 +1,5 @@ [workspace] - +resolver = "2" members = [ "va416xx", "va416xx-hal", diff --git a/jlink/JLinkSettings.JLinkScript b/jlink/JLinkSettings.JLinkScript index 30ee197..0753b53 100644 --- a/jlink/JLinkSettings.JLinkScript +++ b/jlink/JLinkSettings.JLinkScript @@ -74,4 +74,4 @@ int HandleBeforeFlashProg(void) { int HandleAfterFlashProg(void) { JLINK_SYS_Report("HandleAfterFlashProg()"); return DisableRomProt(); // ROM_PROT = 0x0 -} \ No newline at end of file +} diff --git a/scripts/VA416xx_Series.yaml b/scripts/VA416xx_Series.yaml new file mode 100644 index 0000000..8c4d519 --- /dev/null +++ b/scripts/VA416xx_Series.yaml @@ -0,0 +1,99 @@ +name: VA416xx Series +generated_from_pack: true +pack_file_release: 1.0.5 +variants: +- name: VA416xx + cores: + - name: main + type: armv7em + core_access_options: !Arm + ap: 0 + psel: 0x0 + memory_map: + - !Ram + name: IRAM1 + range: + start: 0x1fff8000 + end: 0x20000000 + cores: + - main + - !Nvm + name: IROM1 + range: + start: 0x0 + end: 0x40000 + is_boot_memory: true + cores: + - main + - !Generic + name: IRAM2 + range: + start: 0x20000000 + end: 0x20008000 + cores: + - main + flash_algorithms: + - va416_spi_fram_256kb + - va416_ebiboot_fram_256kb + - va416_ebi_fram_512kb +flash_algorithms: +- name: va416_spi_fram_256kb + description: VA416_SPI_FRAM_256KB + instructions: RfYMQMTyAQABaMkHCtEBaMkHBL8BaF/qwXED0QFoyQfy0AC/AWjJBgnVAWjJBkS/AWhf6sFhAtUBaMkG8tQDIQFicEdwRwC/WCAIIcTyAQDA8qgBQWBB8ggBTvJRUsTyAgHB9swiwfi4IAAiCmABaCHwCAEBYAC/AL8CaEX2DEFC8AgCxPIBAQJgAiAAv0hgQPIHQEH4DAxA8oIgQfgIDAMgCGIIaMAHCtEIaMAHBL8IaF/qwHAD0QhowAfy0AC/CGjABgnVCGjABkS/CGhf6sBgAtUIaMAG8tQGIMjyAAADIgpiQfgEDApo0gcK0Qpo0gcEvwpoX+rCcgPRCmjSB/LQAL8KaNIGCdUKaNIGRL8KaF/qwmIC1Qpo0gby1AMiCmJB+AQMCGjABwnRCGjABwS/CGhf6sBwAtEIaMAH8tAIaMAGCdUIaMAGRL8IaF/qwGAC1QhowAby1AMgCGIBIEH4BAxP8ABAQfgEDAhowAcK0QhowAcEvwhoX+rAcAPRCGjAB/LQAL8IaMAGCdUIaMAGRL8IaF/qwGAC1QhowAby1AMiACAKYnBHAL9F9gxBxPIBAQhowAcK0QhowAcEvwhoX+rAcAPRCGjAB/LQAL8IaMAGCdUIaMAGRL8IaF/qwGAC1QhowAby1AYgyPIAAAMiCmJB+AQMCmjSBwrRCmjSBwS/Cmhf6sJyA9EKaNIH8tAAvwpo0gYJ1Qpo0gZEvwpoX+rCYgLVCmjSBvLUAyIKYgEi9zBB+AQsQfgEDAhowAcJ0QhowAcEvwhoX+rAcALRCGjAB/LQCGjABgnVCGjABkS/CGhf6sBgAtUIaMAG8tQDIgAgCmJwRwC/cLVF9gxBQPIGDAAgxPIBAcjyAAwDI0/wAg5P8ABCACQG4AC/ATS09YBvC2IA8KyAQfgEzA1o7QcK0Q1o7QcEvw1oX+rFdQPRDWjtB/LQAL8NaO0GCtUNaO0GRL8NaF/qxWUD1Q1o7Qby1AC/xPMHJQtiQfgE7EH4BFzlskH4BFwAJUH4BFwE4AU1/y1B+AQMTNAOaLYHBtQOaLYHXL8OaF/qhnY+1UH4BAwOaLYHCdQOaLYHXL8OaF/qhnYC1A5otgfy1UH4BAwOaLYHCtQOaLYHXL8OaF/qhnYD1A5otgfy1QC/QfgEDA5otgcK1A5otgdcvw5oX+qGdgPUDmi2B/LVAL9B+AQMDmi2B7zUDmi2B1y/Dmhf6oZ2tdQOaLYH8tWx5w5otgez1bznDWitBwrUDWitB1y/DWhf6oV1A9QNaK0H8tUAv0H4BCwNaO0HCtENaO0HBL8NaF/qxXUD0Q1o7Qfy0AC/DWjtBn/1Wq8NaO0GRL8NaF/qxWV/9VKvDWjtBvDUTecAIHC9ACBwR4C1grBF9gxOxPIBDgAjAZPe+AAw2wcN0d74ADDbBwS/3vgAMF/qw3ME0d74ADDbB+7QAL/e+AAw2wYM1d74ADDbBkS/3vgAMF/qw2MD1d74ADDbBu7UAyPO+CAwBiPI8gADTvgEPN74ADDbBwzR3vgAMNsHBL/e+AAwX+rDcwPR3vgAMNsH7tDe+AAw2wYM1d74ADDbBkS/3vgAMF/qw2MD1d74ADDbBu7UAyPO+CAwAiNN9vAMTvgEPMDzB0PP9v98TvgEPMDzByPAsgEpTvgEPE74BAxA8JKA3vgAAIAHAPEGgd74AACAB1y/3vgAAF/qgHAA8fyA3vgAAIAHXL/e+AAAX+qAcADx8oDe+AAAgAdcv974AABf6oBwAPHogN74AACAB1y/3vgAAF/qgHAA8d6A3vgAAIAHXL/e+AAAX+qAcADx1IDe+AAAgAdcv974AABf6oBwAPHKgN74AACAB1y/3vgAAF/qgHAA8cCA3vgAAIAHXL/e+AAAX+qAcADxtoDe+AAAgAdcv974AABf6oBwAPGsgN74AACAB1y/3vgAAF/qgHAA8aKA3vgAAIAHXL/e+AAAX+qAcADxmIDe+AAAgAdcv974AABf6oBwAPGOgBzxGQx/9H+vheAAvxL4AQsBOU74BAxe+AQMASkAkAGYAPEBAAGQP/Rur2BG3vgAMJsH69Te+AAwmwdcv974ADBf6oNz4tTe+AAwmwdcv974ADBf6oNz2dTe+AAwmwdcv974ADBf6oNz0NTe+AAwmwdcv974ADBf6oNzx9Te+AAwmwdcv974ADBf6oNzvtTe+AAwmwdcv974ADBf6oNztdTe+AAwmwdcv974ADBf6oNzrNTe+AAwmwdcv974ADBf6oNzo9Te+AAwmwdcv974ADBf6oNzmtTe+AAwmwdcv974ADBf6oNzkdTe+AAwmwdcv974ADBf6oNzP/WIr974ADCbB1y/3vgAMF/qg3M/9X6vGTB/9IuvASACsIC9EHgA8QBATvgEDN74AADABwzR3vgAAMAHBL/e+AAAX+rAcAPR3vgAAMAH7tDe+AAAwAYM1d74AADABkS/3vgAAF/qwGAD1d74AADABu7UAyDO+CAAACACsIC9AL8AIHBHsLVF9gxExPIBBCNo2wcJ0SNo2wcEvyNoX+rDcwLRI2jbB/LQI2jbBgnVI2jbBkS/I2hf6sNjAtUjaNsG8tQDIyNiRPgEPMDzB0NE+AQ8wPMHI0T4BDzDskT4BDwAI0T4BDwjaFsHCdQjaFsHXL8jaF/qQ3MC1CNoWwfy1VT4BDwAI0T4BDwjaFsHCdQjaFsHXL8jaF/qQ3MC1CNoWwfy1VT4BDwAI0T4BDwjaFsHCdQjaFsHXL8jaF/qQ3MC1CNoWwfy1VT4BDwAI0T4BDwjaFsHCdQjaFsHXL8jaF/qQ3MC1CNoWwfy1VT4BDwBs0/wAAxP8AAOAL9E+ATMI2hbBwrUI2hbB1y/I2hf6kNzA9QjaFsH8tUAv1T4BDwVeNuynUIo0Q7xAQ6ORQLxAQLj0U/wAEJE+AQsImjSBwrRImjSBwS/Imhf6sJyA9EiaNIH8tAAvyJo0gYJ1SJo0gZEvyJoX+rCYgLVImjSBvLUAyIIRCJisL1wRLC9AAAAAAAA + pc_init: 0x49 + pc_uninit: 0x1ad + pc_program_page: 0x40d + pc_erase_sector: 0x409 + pc_erase_all: 0x27d + data_section_offset: 0x8d8 + flash_properties: + address_range: + start: 0x0 + end: 0x40000 + page_size: 0x100 + erased_byte_value: 0x0 + program_page_timeout: 3000 + erase_sector_timeout: 3000 + sectors: + - size: 0x2000 + address: 0x0 +- name: va416_ebiboot_fram_256kb + description: VA416_EBIBOOT_256KB + instructions: QfKAAsTyAQJS+CAwI/TAQ0PqQTFC+CAQcEcAv0HywALE8gECUvggMCP0wEND6kExQvggEHBHAL9B8gASxPIBAlL4IDAj9MBDQ+pBMUL4IBBwRwC/QfJAEsTyAQJS+CAwI/TAQ0PqQTFC+CAQcEcAv0HyiADE8gEAAmgBIWHzTjICYEJoYfNOMkJggmhh804ygmDCaGHzTjLCYAJpYfNOMgJhQmlh804yQmGCaWHzTjKCYcJpYfNOMsJhAmph804yAmJCamHzTjJCYoJqYfNOMoJiwmph804ywmICa2HzTjICY0JrYfNOMkJjgmth804ygmPCa2HzTjLCYwJsYfNOMgJkQmxh804yQmSCbGHzTjKCZMJsYfNOMsJkAm1h804yAmVCbWHzTjJCZYJtYfNOMoJlwm1h804ywmUCbmHzTjICZkJuYfNOMkJmgm5h804ygmbCbmHzTjLCZgJvYfNOMgJnQm9h804yQmeCb2HzTjKCZ8JvYfNOMsJn0PiAIGHzTjLA+IAg0PiEIGHzTjLA+IQg0PiIIGHzTjLA+Igg0PiMIGHzTjLA+Iwg0PiQIGHzTjLA+JAg0PiUIGHzTjLA+JQg0PiYIGHzTjLA+Jgg0PicIGHzTjLA+Jwg0PioIGHzTjLA+Kgg0PisIGHzTjLA+Kwg0PiwIGHzTjLA+LAg0Pi0IGHzTjLA+LQg0Pi4IGHzTjLA+Lgg0Pi8IGHzTjLA+LwgcEcQtVgkACDE8gEEw/Y5QGBgIGhA9IAwIGD/9xj/T/YAccDytjEAIGFhEL0AvwAgcEeAtU/wwEBP9IAhAPA7+AAggL0AvwAgcEcB8AEDGURLCCnQWR4A8cBAAykD8AMME9Mj8AMDMvgIGwQ7IPgIGzL4Bhwg+AYcMvgEHCD4BBwy+AIcIPgCHO3RvPEADwvQEYi88QEPAYAG0FGIvPECD0GAHL+RiIGAACBwRwC/ACBwRwhEcEdP8AACALUTRpRGlkYgOSK/oOgMUKDoDFCx8SABv/T3rwkHKL+g6AxQSL8MwF34BOuJACi/QPgEKwi/cEdIvyD4AisR8IBPGL8A+AErcEcAAAAAAAA= + pc_init: 0x225 + pc_uninit: 0x251 + pc_program_page: 0x26d + pc_erase_sector: 0x269 + pc_erase_all: 0x255 + data_section_offset: 0x328 + flash_properties: + address_range: + start: 0x0 + end: 0x40000 + page_size: 0x100 + erased_byte_value: 0x0 + program_page_timeout: 3000 + erase_sector_timeout: 3000 + sectors: + - size: 0x2000 + address: 0x0 +- name: va416_ebi_fram_512kb + description: VA416_EBI_512KB + instructions: QfKAAsTyAQJS+CAwI/TAQ0PqQTFC+CAQcEcAv0HywALE8gECUvggMCP0wEND6kExQvggEHBHAL9B8gASxPIBAlL4IDAj9MBDQ+pBMUL4IBBwRwC/QfJAEsTyAQJS+CAwI/TAQ0PqQTFC+CAQcEcAv0HyiADE8gEAAmgBIWHzTjICYEJoYfNOMkJggmhh804ygmDCaGHzTjLCYAJpYfNOMgJhQmlh804yQmGCaWHzTjKCYcJpYfNOMsJhAmph804yAmJCamHzTjJCYoJqYfNOMoJiwmph804ywmICa2HzTjICY0JrYfNOMkJjgmth804ygmPCa2HzTjLCYwJsYfNOMgJkQmxh804yQmSCbGHzTjKCZMJsYfNOMsJkAm1h804yAmVCbWHzTjJCZYJtYfNOMoJlwm1h804ywmUCbmHzTjICZkJuYfNOMkJmgm5h804ygmbCbmHzTjLCZgJvYfNOMgJnQm9h804yQmeCb2HzTjKCZ8JvYfNOMsJn0PiAIGHzTjLA+IAg0PiEIGHzTjLA+IQg0PiIIGHzTjLA+Igg0PiMIGHzTjLA+Iwg0PiQIGHzTjLA+JAg0PiUIGHzTjLA+JQg0PiYIGHzTjLA+Jgg0PicIGHzTjLA+Jwg0PioIGHzTjLA+Kgg0PisIGHzTjLA+Kwg0PiwIGHzTjLA+LAg0Pi0IGHzTjLA+LQg0Pi4IGHzTjLA+Lgg0Pi8IGHzTjLA+LwgcEcQtVgkxPIBBCBoQPSAMCBgACDD9jlAYGD/9xj/T/YAcMDytjBgYU7yhBDO8gAAT/QAUQFgRvIAAb/zT4/E8gABGCC/82+PiGAwIgAgCmAQvQAgcEeAtU/wgFBP9AAhAPB4+AAggL0AvwAgcEcB8AEDGURLCCfQWR4DKQPwAwwT0yPwAwMy+AgbBDsg+AgbMvgGHCD4Bhwy+AQcIPgEHDL4Ahwg+AIc7dG88QAPC9ARiLzxAQ8BgAbQUYi88QIPQYAcv5GIgYAAIHBHAL8AIHBHLenwRQHwAQMZRF/qUQwr0OJGvPEBD5i/T/ABCsrxAA6q8QEIACMw+BNQMvgTYLVCItGYRRjQAutDBQDrQwZ3iGyIp0IT0Q7rAwe8HAzQtIipiIxCDdH5HAbQ8YjsiKFCCdEEM5pF3tFgRL3o8IUBMwLgAjMA4AMzT+pDDGBEvejwhU/wAAIAtRNGlEaWRiA5Ir+g6AxQoOgMULHxIAG/9PevCQcov6DoDFBIvwzAXfgE64kAKL9A+AQrCL9wR0i/IPgCKxHwgE8YvwD4AStwRwAAAAA= + pc_init: 0x225 + pc_uninit: 0x275 + pc_program_page: 0x291 + pc_erase_sector: 0x28d + pc_erase_all: 0x279 + data_section_offset: 0x3c4 + flash_properties: + address_range: + start: 0x10000000 + end: 0x10080000 + page_size: 0x100 + erased_byte_value: 0x0 + program_page_timeout: 3000 + erase_sector_timeout: 3000 + sectors: + - size: 0x2000 + address: 0x0 diff --git a/va416xx-hal/Cargo.toml b/va416xx-hal/Cargo.toml index 3c690f4..6c0cecd 100644 --- a/va416xx-hal/Cargo.toml +++ b/va416xx-hal/Cargo.toml @@ -11,8 +11,9 @@ keywords = ["no-std", "hal", "cortex-m", "vorago", "va416xx"] categories = ["embedded", "no-std", "hardware-support"] [dependencies] -cortex-m = "0.7" -cortex-m-rt = "0.7.1" +# cortex-m = "0.7" +cortex-m = { version = "0.7.6", features = ["critical-section-single-core"]} +cortex-m-rt = "0.7" nb = "1" [dependencies.va416xx] @@ -26,11 +27,4 @@ rt = ["va416xx/rt"] panic-rtt-target = { version = "0.1", features = ["cortex-m"] } rtt-target = { version = "0.3", features = ["cortex-m"] } panic-halt = "0.2" - -[profile.dev] -debug = true -lto = false - -[profile.release] -lto = true -debug = true +#cortex-m = { version = "0.7.6", features = ["critical-section-single-core"]} diff --git a/va416xx-hal/examples/blinky.rs b/va416xx-hal/examples/blinky.rs index 689181c..8db2fa1 100644 --- a/va416xx-hal/examples/blinky.rs +++ b/va416xx-hal/examples/blinky.rs @@ -2,7 +2,7 @@ #![no_main] #![no_std] -use cortex_m_rt::{entry}; +use cortex_m_rt::entry; use panic_halt as _; use va416xx_hal::pac; @@ -11,27 +11,24 @@ const LED_PG5: u32 = 1 << 5; #[entry] fn main() -> ! { - let dp = pac::Peripherals::take().unwrap(); + // SAFETY: Peripherals are only stolen once here. + let dp = unsafe { pac::Peripherals::steal() }; // Enable all peripheral clocks - dp.SYSCONFIG - .peripheral_clk_enable + dp.sysconfig + .peripheral_clk_enable() .modify(|_, w| unsafe { w.bits(0xffffffff) }); - dp.PORTG.dir().modify(|_, w| unsafe { w.bits(LED_PG5) }); - dp.PORTG.datamask().modify(|_, w| unsafe { w.bits(LED_PG5)}); + dp.portg.dir().modify(|_, w| unsafe { w.bits(LED_PG5) }); + dp.portg + .datamask() + .modify(|_, w| unsafe { w.bits(LED_PG5) }); for _ in 0..10 { - dp.PORTG - .clrout() - .write(|w| unsafe { w.bits(LED_PG5) }); - cortex_m::asm::delay(5_000_000); - dp.PORTG - .setout() - .write(|w| unsafe { w.bits(LED_PG5) }); - cortex_m::asm::delay(5_000_000); + dp.portg.clrout().write(|w| unsafe { w.bits(LED_PG5) }); + cortex_m::asm::delay(2_000_000); + dp.portg.setout().write(|w| unsafe { w.bits(LED_PG5) }); + cortex_m::asm::delay(2_000_000); } loop { - dp.PORTG - .togout() - .write(|w| unsafe { w.bits(LED_PG5) }); - cortex_m::asm::delay(25_000_000); + dp.portg.togout().write(|w| unsafe { w.bits(LED_PG5) }); + cortex_m::asm::delay(2_000_000); } } diff --git a/va416xx-hal/src/clock.rs b/va416xx-hal/src/clock.rs index b53f636..1b20ccd 100644 --- a/va416xx-hal/src/clock.rs +++ b/va416xx-hal/src/clock.rs @@ -1,7 +1,5 @@ -//! # API for clock related functionality -//! //! This also includes functionality to enable the peripheral clocks -use va416xx::SYSCONFIG; +use va416xx::Sysconfig; #[derive(Copy, Clone, PartialEq)] pub enum PeripheralSelect { @@ -35,17 +33,17 @@ pub enum PeripheralSelect { PortD = 27, PortE = 28, PortF = 29, - PortG = 30 + PortG = 30, } -pub fn enable_peripheral_clock(syscfg: &mut SYSCONFIG, clock: PeripheralSelect) { +pub fn enable_peripheral_clock(syscfg: &mut Sysconfig, clock: PeripheralSelect) { syscfg - .peripheral_clk_enable + .peripheral_clk_enable() .modify(|r, w| unsafe { w.bits(r.bits() | (1 << clock as u8)) }); } -pub fn disable_peripheral_clock(syscfg: &mut SYSCONFIG, clock: PeripheralSelect) { +pub fn disable_peripheral_clock(syscfg: &mut Sysconfig, clock: PeripheralSelect) { syscfg - .peripheral_clk_enable + .peripheral_clk_enable() .modify(|r, w| unsafe { w.bits(r.bits() & !(1 << clock as u8)) }); } diff --git a/vorago-peb1/Cargo.toml b/vorago-peb1/Cargo.toml index 0563078..585755a 100644 --- a/vorago-peb1/Cargo.toml +++ b/vorago-peb1/Cargo.toml @@ -12,8 +12,8 @@ categories = ["embedded", "no-std", "hardware-support"] [dependencies] cortex-m = "0.7" -cortex-m-rt = "0.7.1" -embedded-hal = { version = "0.2.6", features = ["unproven"] } +cortex-m-rt = "0.7" +embedded-hal = "1" [dependencies.va416xx-hal] path = "../va416xx-hal" @@ -26,11 +26,3 @@ rt = ["va416xx-hal/rt"] panic-rtt-target = { version = "0.1", features = ["cortex-m"] } rtt-target = { version = "0.3", features = ["cortex-m"] } panic-halt = "0.2" - -[profile.dev] -debug = true -lto = false - -[profile.release] -lto = true -debug = true diff --git a/vscode/.cortex-debug.peripherals.state.json b/vscode/.cortex-debug.peripherals.state.json new file mode 100644 index 0000000..0637a08 --- /dev/null +++ b/vscode/.cortex-debug.peripherals.state.json @@ -0,0 +1 @@ +[] \ No newline at end of file diff --git a/vscode/.cortex-debug.registers.state.json b/vscode/.cortex-debug.registers.state.json new file mode 100644 index 0000000..0637a08 --- /dev/null +++ b/vscode/.cortex-debug.registers.state.json @@ -0,0 +1 @@ +[] \ No newline at end of file diff --git a/.vscode/launch.json b/vscode/launch.json similarity index 100% rename from .vscode/launch.json rename to vscode/launch.json diff --git a/vscode/settings.json b/vscode/settings.json new file mode 100644 index 0000000..e78c4ec --- /dev/null +++ b/vscode/settings.json @@ -0,0 +1,3 @@ +{ + "cortex-debug.gdbPath.linux": "gdb-multiarch" +} diff --git a/.vscode/tasks.json b/vscode/tasks.json similarity index 100% rename from .vscode/tasks.json rename to vscode/tasks.json