From 273be8b3cf67c76cd12aaff9d5c7638e733cb019 Mon Sep 17 00:00:00 2001 From: Robin Mueller Date: Thu, 13 Feb 2025 16:11:27 +0100 Subject: [PATCH] bumped PAC to v0.3.0 --- examples/embassy/src/time_driver.rs | 2 +- va416xx-hal/Cargo.toml | 7 ++----- va416xx-hal/src/clock.rs | 4 +++- va416xx-hal/src/edac.rs | 6 +++--- va416xx-hal/src/gpio/reg.rs | 4 ++-- va416xx-hal/src/i2c.rs | 4 ++-- va416xx-hal/src/nvm.rs | 6 +++--- va416xx-hal/src/spi.rs | 8 ++++---- va416xx-hal/src/timer.rs | 4 ++-- va416xx-hal/src/wdt.rs | 4 ++-- 10 files changed, 24 insertions(+), 25 deletions(-) diff --git a/examples/embassy/src/time_driver.rs b/examples/embassy/src/time_driver.rs index 6e56a79..f4d94e4 100644 --- a/examples/embassy/src/time_driver.rs +++ b/examples/embassy/src/time_driver.rs @@ -165,7 +165,7 @@ impl TimerDriverEmbassy { .cnt_value() .write(|w| unsafe { w.bits(remaining_ticks as u32) }); alarm_tim.ctrl().modify(|_, w| w.irq_enb().set_bit()); - alarm_tim.enable().write(|w| unsafe { w.bits(1) }) + alarm_tim.enable().write(|w| unsafe { w.bits(1) }); } } } diff --git a/va416xx-hal/Cargo.toml b/va416xx-hal/Cargo.toml index db8d09d..511b212 100644 --- a/va416xx-hal/Cargo.toml +++ b/va416xx-hal/Cargo.toml @@ -25,14 +25,11 @@ bitfield = "0.17" defmt = { version = "0.3", optional = true } fugit = "0.3" delegate = "0.12" - -[dependencies.void] -version = "1" -default-features = false +void = { version = "1", default-features = false } [dependencies.va416xx] default-features = false -version = "0.2" +version = "0.3" features = ["critical-section"] [features] diff --git a/va416xx-hal/src/clock.rs b/va416xx-hal/src/clock.rs index 68e5f39..baa6510 100644 --- a/va416xx-hal/src/clock.rs +++ b/va416xx-hal/src/clock.rs @@ -431,7 +431,9 @@ impl ClkgenCfgr { } } } - None => self.clkgen.ctrl0().modify(|_, w| w.pll_pwdn().set_bit()), + None => { + self.clkgen.ctrl0().modify(|_, w| w.pll_pwdn().set_bit()); + } } if self.clk_lost_detection { diff --git a/va416xx-hal/src/edac.rs b/va416xx-hal/src/edac.rs index 1da4888..24520b5 100644 --- a/va416xx-hal/src/edac.rs +++ b/va416xx-hal/src/edac.rs @@ -4,21 +4,21 @@ use crate::{enable_interrupt, pac}; pub fn enable_rom_scrub(syscfg: &mut pac::Sysconfig, counter_reset: u16) { syscfg .rom_scrub() - .write(|w| unsafe { w.bits(counter_reset as u32) }) + .write(|w| unsafe { w.bits(counter_reset as u32) }); } #[inline(always)] pub fn enable_ram0_scrub(syscfg: &mut pac::Sysconfig, counter_reset: u16) { syscfg .ram0_scrub() - .write(|w| unsafe { w.bits(counter_reset as u32) }) + .write(|w| unsafe { w.bits(counter_reset as u32) }); } #[inline(always)] pub fn enable_ram1_scrub(syscfg: &mut pac::Sysconfig, counter_reset: u16) { syscfg .ram1_scrub() - .write(|w| unsafe { w.bits(counter_reset as u32) }) + .write(|w| unsafe { w.bits(counter_reset as u32) }); } /// This function enables the SBE related interrupts. The user should also provide a diff --git a/va416xx-hal/src/gpio/reg.rs b/va416xx-hal/src/gpio/reg.rs index 9fbf17a..5e06d01 100644 --- a/va416xx-hal/src/gpio/reg.rs +++ b/va416xx-hal/src/gpio/reg.rs @@ -308,7 +308,7 @@ pub(super) unsafe trait RegisterInterface { unsafe { portreg .datamask() - .modify(|r, w| w.bits(r.bits() | self.mask_32())) + .modify(|r, w| w.bits(r.bits() | self.mask_32())); } } @@ -320,7 +320,7 @@ pub(super) unsafe trait RegisterInterface { unsafe { portreg .datamask() - .modify(|r, w| w.bits(r.bits() & !self.mask_32())) + .modify(|r, w| w.bits(r.bits() & !self.mask_32())); } } diff --git a/va416xx-hal/src/i2c.rs b/va416xx-hal/src/i2c.rs index 715997c..b7f9dec 100644 --- a/va416xx-hal/src/i2c.rs +++ b/va416xx-hal/src/i2c.rs @@ -396,12 +396,12 @@ impl I2cBase { let (addr, addr_mode_mask) = Self::unwrap_addr(addr_b); self.i2c .s0_addressb() - .write(|w| unsafe { w.bits((addr << 1) as u32 | addr_mode_mask) }) + .write(|w| unsafe { w.bits((addr << 1) as u32 | addr_mode_mask) }); } if let Some(addr_b_mask) = sl_cfg.addr_b_mask { self.i2c .s0_addressmaskb() - .write(|w| unsafe { w.bits((addr_b_mask << 1) as u32) }) + .write(|w| unsafe { w.bits((addr_b_mask << 1) as u32) }); } } diff --git a/va416xx-hal/src/nvm.rs b/va416xx-hal/src/nvm.rs index 8859a23..e9de33f 100644 --- a/va416xx-hal/src/nvm.rs +++ b/va416xx-hal/src/nvm.rs @@ -136,14 +136,14 @@ impl Nvm { #[inline(always)] pub fn write_single(&self, word: u8) { - self.spi().data().write(|w| unsafe { w.bits(word as u32) }) + self.spi().data().write(|w| unsafe { w.bits(word as u32) }); } #[inline(always)] pub fn write_with_bmstop(&self, word: u8) { self.spi() .data() - .write(|w| unsafe { w.bits(BMSTART_BMSTOP_MASK | word as u32) }) + .write(|w| unsafe { w.bits(BMSTART_BMSTOP_MASK | word as u32) }); } #[inline(always)] @@ -162,7 +162,7 @@ impl Nvm { self.spi().fifo_clr().write(|w| { w.rxfifo().set_bit(); w.txfifo().set_bit() - }) + }); } #[inline(always)] diff --git a/va416xx-hal/src/spi.rs b/va416xx-hal/src/spi.rs index c22a97c..61a4e62 100644 --- a/va416xx-hal/src/spi.rs +++ b/va416xx-hal/src/spi.rs @@ -817,7 +817,7 @@ where // initialization. Returns the amount of written bytes. fn initial_send_fifo_pumping_with_words(&self, words: &[Word]) -> usize { if self.blockmode { - self.spi.ctrl1().modify(|_, w| w.mtxpause().set_bit()) + self.spi.ctrl1().modify(|_, w| w.mtxpause().set_bit()); } // Fill the first half of the write FIFO let mut current_write_idx = 0; @@ -831,7 +831,7 @@ where current_write_idx += 1; } if self.blockmode { - self.spi.ctrl1().modify(|_, w| w.mtxpause().clear_bit()) + self.spi.ctrl1().modify(|_, w| w.mtxpause().clear_bit()); } current_write_idx } @@ -840,7 +840,7 @@ where // initialization. fn initial_send_fifo_pumping_with_fill_words(&self, send_len: usize) -> usize { if self.blockmode { - self.spi.ctrl1().modify(|_, w| w.mtxpause().set_bit()) + self.spi.ctrl1().modify(|_, w| w.mtxpause().set_bit()); } // Fill the first half of the write FIFO let mut current_write_idx = 0; @@ -854,7 +854,7 @@ where current_write_idx += 1; } if self.blockmode { - self.spi.ctrl1().modify(|_, w| w.mtxpause().clear_bit()) + self.spi.ctrl1().modify(|_, w| w.mtxpause().clear_bit()); } current_write_idx } diff --git a/va416xx-hal/src/timer.rs b/va416xx-hal/src/timer.rs index 7f53162..06c1223 100644 --- a/va416xx-hal/src/timer.rs +++ b/va416xx-hal/src/timer.rs @@ -340,14 +340,14 @@ valid_pin_and_tims!( pub fn assert_tim_reset(syscfg: &mut pac::Sysconfig, tim_id: u8) { syscfg .tim_reset() - .modify(|r, w| unsafe { w.bits(r.bits() & !(1 << tim_id as u32)) }) + .modify(|r, w| unsafe { w.bits(r.bits() & !(1 << tim_id as u32)) }); } #[inline] pub fn deassert_tim_reset(syscfg: &mut pac::Sysconfig, tim_id: u8) { syscfg .tim_reset() - .modify(|r, w| unsafe { w.bits(r.bits() | (1 << tim_id as u32)) }) + .modify(|r, w| unsafe { w.bits(r.bits() | (1 << tim_id as u32)) }); } #[inline] diff --git a/va416xx-hal/src/wdt.rs b/va416xx-hal/src/wdt.rs index 605faf6..bb817d6 100644 --- a/va416xx-hal/src/wdt.rs +++ b/va416xx-hal/src/wdt.rs @@ -80,12 +80,12 @@ impl Wdt { #[inline] pub fn disable_reset(&mut self) { - self.wdt.wdogcontrol().modify(|_, w| w.resen().clear_bit()) + self.wdt.wdogcontrol().modify(|_, w| w.resen().clear_bit()); } #[inline] pub fn enable_reset(&mut self) { - self.wdt.wdogcontrol().modify(|_, w| w.resen().set_bit()) + self.wdt.wdogcontrol().modify(|_, w| w.resen().set_bit()); } #[inline]