diff --git a/examples/simple/examples/spi.rs b/examples/simple/examples/spi.rs index f1b4832..cb8e181 100644 --- a/examples/simple/examples/spi.rs +++ b/examples/simple/examples/spi.rs @@ -8,7 +8,7 @@ use embedded_hal::spi::{Mode, SpiBus, MODE_0}; use panic_rtt_target as _; use rtt_target::{rprintln, rtt_init_print}; use simple_examples::peb1; -use va416xx_hal::spi::{Spi, SpiClkConfig, TransferConfigWithHwcs}; +use va416xx_hal::spi::{Spi, SpiClkConfig}; use va416xx_hal::{ gpio::{PinsB, PinsC}, pac, @@ -55,14 +55,16 @@ fn main() -> ! { pins_c.pc1.into_funsel_1(), ); - let mut spi_cfg = SpiConfig::default().clk_cfg( - SpiClkConfig::from_clk(Hertz::from_raw(SPI_SPEED_KHZ), &clocks) - .expect("invalid target clock"), - ); + let mut spi_cfg = SpiConfig::default() + .clk_cfg( + SpiClkConfig::from_clk(Hertz::from_raw(SPI_SPEED_KHZ), &clocks) + .expect("invalid target clock"), + ) + .mode(SPI_MODE) + .blockmode(BLOCKMODE); if EXAMPLE_SEL == ExampleSelect::Loopback { spi_cfg = spi_cfg.loopback(true) } - let transfer_cfg = TransferConfigWithHwcs::new_no_hw_cs(None, Some(SPI_MODE), BLOCKMODE, false); // Create SPI peripheral. let mut spi0 = Spi::new( &mut dp.sysconfig, @@ -70,9 +72,7 @@ fn main() -> ! { dp.spi0, (sck, miso, mosi), spi_cfg, - Some(&transfer_cfg.downgrade()), - ) - .expect("creating SPI peripheral failed"); + ); spi0.set_fill_word(FILL_WORD); loop { let tx_buf: [u8; 4] = [1, 2, 3, 0]; diff --git a/va416xx-hal/src/spi.rs b/va416xx-hal/src/spi.rs index 3fcf8b3..c22a97c 100644 --- a/va416xx-hal/src/spi.rs +++ b/va416xx-hal/src/spi.rs @@ -255,6 +255,9 @@ pub struct TransferConfig { /// the BMSTOP bit is set on a dataword. A frame is defined as CSn being active for the /// duration of multiple data words pub blockmode: bool, + /// Only used when blockmode is used. The SCK will be stalled until an explicit stop bit + /// is set on a written word. + pub bmstall: bool, pub hw_cs: HwChipSelectId, } @@ -263,6 +266,7 @@ impl TransferConfigWithHwcs { clk_cfg: Option, mode: Option, blockmode: bool, + bmstall: bool, sod: bool, ) -> Self { TransferConfigWithHwcs { @@ -272,6 +276,7 @@ impl TransferConfigWithHwcs { mode, sod, blockmode, + bmstall, hw_cs: HwChipSelectId::Invalid, }, } @@ -284,6 +289,7 @@ impl TransferConfigWithHwcs { mode: Option, hw_cs: Option, blockmode: bool, + bmstall: bool, sod: bool, ) -> Self { TransferConfigWithHwcs { @@ -293,6 +299,7 @@ impl TransferConfigWithHwcs { mode, sod, blockmode, + bmstall, hw_cs: HwCs::CS_ID, }, } @@ -370,6 +377,21 @@ impl SpiConfig { self } + pub fn blockmode(mut self, enable: bool) -> Self { + self.blockmode = enable; + self + } + + pub fn bmstall(mut self, enable: bool) -> Self { + self.bmstall = enable; + self + } + + pub fn mode(mut self, mode: Mode) -> Self { + self.init_mode = mode; + self + } + pub fn clk_cfg(mut self, clk_cfg: SpiClkConfig) -> Self { self.clk = clk_cfg; self @@ -719,12 +741,8 @@ where } else { w.sod().clear_bit(); } - if transfer_cfg.cfg.blockmode { - w.blockmode().set_bit(); - } else { - w.blockmode().clear_bit(); - } - w + w.blockmode().bit(transfer_cfg.cfg.blockmode); + w.bmstall().bit(transfer_cfg.cfg.bmstall) }); }