some improvements
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adc0e68ebd
commit
d947ed9609
@ -7,14 +7,20 @@ edition = "2021"
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cortex-m = { version = "0.7", features = ["critical-section-single-core"] }
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cortex-m = { version = "0.7", features = ["critical-section-single-core"] }
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cortex-m-rt = "0.7"
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cortex-m-rt = "0.7"
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embedded-hal = "1"
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embedded-hal = "1"
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rtt-target = { version = "0.5" }
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rtt-target = { version = "0.5" }
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panic-rtt-target = { version = "0.1" }
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panic-rtt-target = { version = "0.1" }
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critical-section = "1"
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critical-section = "1"
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embassy-sync = { version = "0.6.0" }
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embassy-sync = { version = "0.6.0" }
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embassy-time = { version = "0.3.2", features = ["tick-hz-1_000"] }
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embassy-time = { version = "0.3.2", features = ["tick-hz-1"] }
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embassy-time-driver = { version = "0.1" }
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embassy-time-driver = { version = "0.1" }
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[dependencies.once_cell]
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version = "1"
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default-features = false
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features = ["critical-section"]
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[dependencies.embassy-executor]
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[dependencies.embassy-executor]
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version = "0.6.0"
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version = "0.6.0"
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features = [
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features = [
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@ -3,22 +3,19 @@ use core::{
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cell::Cell,
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cell::Cell,
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mem, ptr,
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mem, ptr,
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sync::atomic::{AtomicU32, AtomicU8, Ordering},
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sync::atomic::{AtomicU32, AtomicU8, Ordering},
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time,
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};
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};
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use critical_section::CriticalSection;
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use critical_section::CriticalSection;
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use embassy_sync::blocking_mutex::raw::CriticalSectionRawMutex;
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use embassy_sync::blocking_mutex::raw::CriticalSectionRawMutex;
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use embassy_sync::blocking_mutex::Mutex;
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use embassy_sync::blocking_mutex::Mutex;
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use embassy_time_driver::{time_driver_impl, AlarmHandle, Driver, TICK_HZ};
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use embassy_time_driver::{time_driver_impl, AlarmHandle, Driver, TICK_HZ};
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use rtt_target::rprintln;
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use va416xx_hal::{
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use va416xx_hal::{
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clock::Clocks,
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clock::Clocks,
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enable_interrupt,
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enable_interrupt,
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irq_router::enable_and_init_irq_router,
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irq_router::enable_and_init_irq_router,
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pac::{self, interrupt},
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pac::{self, interrupt},
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pwm::{
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pwm::{assert_tim_reset_for_two_cycles, enable_tim_clk, ValidTim},
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assert_tim_reset, assert_tim_reset_for_two_cycles, deassert_tim_reset, enable_tim_clk,
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ValidTim,
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},
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};
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};
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pub type TimekeeperClk = pac::Tim15;
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pub type TimekeeperClk = pac::Tim15;
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@ -26,8 +23,17 @@ pub type AlarmClk0 = pac::Tim14;
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pub type AlarmClk1 = pac::Tim13;
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pub type AlarmClk1 = pac::Tim13;
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pub type AlarmClk2 = pac::Tim12;
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pub type AlarmClk2 = pac::Tim12;
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/// This has to be called to initiate the time driver for embassy.
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// Uses integer division to get a margin of 75 % of the base value added on the ticks
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pub fn init(
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const fn three_quarters_of_period(period: u64) -> u64 {
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(period * 3) / 4
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}
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/// Initialization method for embassy
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///
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/// # Safety
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/// This has to be called once at initialization time to initiate the time driver for
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/// embassy.
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pub unsafe fn init(
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syscfg: &mut pac::Sysconfig,
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syscfg: &mut pac::Sysconfig,
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irq_router: &pac::IrqRouter,
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irq_router: &pac::IrqRouter,
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timekeeper: TimekeeperClk,
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timekeeper: TimekeeperClk,
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@ -39,7 +45,7 @@ pub fn init(
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}
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}
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const fn alarm_tim(idx: usize) -> &'static pac::tim0::RegisterBlock {
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const fn alarm_tim(idx: usize) -> &'static pac::tim0::RegisterBlock {
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// Safety: This is a memory-mapped peripheral.
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// Safety: This is a static memory-mapped peripheral.
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match idx {
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match idx {
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0 => unsafe { &*AlarmClk0::ptr() },
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0 => unsafe { &*AlarmClk0::ptr() },
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1 => unsafe { &*AlarmClk1::ptr() },
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1 => unsafe { &*AlarmClk1::ptr() },
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@ -77,8 +83,6 @@ impl AlarmState {
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unsafe impl Send for AlarmState {}
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unsafe impl Send for AlarmState {}
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const ALARM_COUNT: usize = 1;
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const ALARM_COUNT: usize = 1;
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// Margin value which is used when detecting whether an alarm should fire soon.
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const TIMER_MARGIN: u64 = 0xc000_0000;
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pub struct TimerDriverEmbassy {
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pub struct TimerDriverEmbassy {
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periods: AtomicU32,
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periods: AtomicU32,
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@ -98,14 +102,10 @@ impl TimerDriverEmbassy {
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enable_tim_clk(syscfg, TimekeeperClk::TIM_ID);
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enable_tim_clk(syscfg, TimekeeperClk::TIM_ID);
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assert_tim_reset_for_two_cycles(syscfg, TimekeeperClk::TIM_ID);
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assert_tim_reset_for_two_cycles(syscfg, TimekeeperClk::TIM_ID);
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let rst_value = TimekeeperClk::clock(clocks).raw() / TICK_HZ as u32 - 1;
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let rst_val = (TimekeeperClk::clock(clocks).raw() / TICK_HZ as u32) - 1;
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// Safety: We have a valid instance of the tim peripheral.
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timekeeper.rst_value().write(|w| unsafe { w.bits(rst_val) });
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timekeeper
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// Decrementing counter.
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.rst_value()
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timekeeper.cnt_value().write(|w| unsafe { w.bits(rst_val) });
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.write(|w| unsafe { w.bits(rst_value) });
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timekeeper
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.cnt_value()
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.write(|w| unsafe { w.bits(rst_value) });
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// Switch on. Timekeeping should always be done.
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// Switch on. Timekeeping should always be done.
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unsafe {
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unsafe {
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enable_interrupt(TimekeeperClk::IRQ);
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enable_interrupt(TimekeeperClk::IRQ);
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@ -127,28 +127,31 @@ impl TimerDriverEmbassy {
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}
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}
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}
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}
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// Should be called inside the IRQ of the timekeeper timer.
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fn on_interrupt_timekeeping(&self) {
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fn on_interrupt_timekeeping(&self) {
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self.next_period();
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self.next_period();
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}
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}
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// Should be called inside the IRQ of the alarm timer.
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fn on_interrupt_alarm(&self, idx: usize) {
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fn on_interrupt_alarm(&self, idx: usize) {
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critical_section::with(|cs| self.trigger_alarm(idx, cs))
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critical_section::with(|cs| self.trigger_alarm(idx, cs))
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}
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}
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fn next_period(&self) {
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fn next_period(&self) {
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let period = self.periods.fetch_add(1, Ordering::AcqRel) + 1;
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let period = self.periods.fetch_add(1, Ordering::AcqRel) + 1;
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let rst_val = timekeeping_tim().rst_value().read().bits() as u64;
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let t = period as u64 * rst_val;
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critical_section::with(|cs| {
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critical_section::with(|cs| {
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for i in 0..ALARM_COUNT {
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for i in 0..ALARM_COUNT {
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let alarm = &self.alarms.borrow(cs)[i];
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let alarm = &self.alarms.borrow(cs)[i];
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let at = alarm.timestamp.get();
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let at = alarm.timestamp.get();
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let t = (period as u64) << 32;
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let alarm_tim = alarm_tim(0);
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if at < t + TIMER_MARGIN {
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if at < t + three_quarters_of_period(alarm_tim.rst_value().read().bits() as u64) {
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let rst_val = alarm_tim(i).rst_value().read().bits();
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alarm_tim.enable().write(|w| unsafe { w.bits(0) });
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alarm_tim(i)
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let rst_val = alarm_tim.rst_value().read().bits();
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.cnt_value()
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alarm_tim.cnt_value().write(|w| unsafe { w.bits(rst_val) });
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.write(|w| unsafe { w.bits(rst_val) });
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alarm_tim.ctrl().modify(|_, w| w.irq_enb().set_bit());
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alarm_tim(i).ctrl().modify(|_, w| w.irq_enb().set_bit());
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alarm_tim.enable().write(|w| unsafe { w.bits(1) })
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alarm_tim(i).enable().write(|w| unsafe { w.bits(1) })
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}
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}
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}
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}
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})
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})
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@ -161,10 +164,7 @@ impl TimerDriverEmbassy {
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}
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}
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fn trigger_alarm(&self, n: usize, cs: CriticalSection) {
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fn trigger_alarm(&self, n: usize, cs: CriticalSection) {
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alarm_tim(n).ctrl().modify(|_, w| {
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alarm_tim(n).ctrl().modify(|_, w| w.irq_enb().clear_bit());
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w.irq_enb().clear_bit();
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w.enable().clear_bit()
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});
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let alarm = &self.alarms.borrow(cs)[n];
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let alarm = &self.alarms.borrow(cs)[n];
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// Setting the maximum value disables the alarm.
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// Setting the maximum value disables the alarm.
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@ -185,32 +185,39 @@ impl Driver for TimerDriverEmbassy {
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let mut period1: u32;
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let mut period1: u32;
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let mut period2: u32;
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let mut period2: u32;
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let mut counter_val: u32;
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let mut counter_val: u32;
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let rst_val = timekeeping_tim().rst_value().read().bits();
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loop {
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loop {
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// Acquire ensures that we get the latest value of `periods` and
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// Acquire ensures that we get the latest value of `periods` and
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// no instructions can be reordered before the load.
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// no instructions can be reordered before the load.
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period1 = self.periods.load(Ordering::Acquire);
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period1 = self.periods.load(Ordering::Acquire);
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counter_val = timekeeping_tim().rst_value().read().bits()
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counter_val = rst_val - timekeeping_tim().cnt_value().read().bits();
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- timekeeping_tim().cnt_value().read().bits();
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// Double read to protect against race conditions when the counter is overflowing.
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period2 = self.periods.load(Ordering::Relaxed);
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period2 = self.periods.load(Ordering::Relaxed);
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if period1 == period2 {
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if period1 == period2 {
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break;
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break;
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}
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}
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}
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}
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((period1 as u64) << 32) | counter_val as u64
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(period1 as u64 * rst_val as u64) + counter_val as u64
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}
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}
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unsafe fn allocate_alarm(&self) -> Option<embassy_time_driver::AlarmHandle> {
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unsafe fn allocate_alarm(&self) -> Option<AlarmHandle> {
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critical_section::with(|_| {
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let id = self
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let id = self.alarm_count.load(Ordering::Relaxed);
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.alarm_count
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if id < ALARM_COUNT as u8 {
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.fetch_update(Ordering::AcqRel, Ordering::Acquire, |x| {
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self.alarm_count.store(id + 1, Ordering::Relaxed);
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if x < ALARM_COUNT as u8 {
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Some(AlarmHandle::new(id))
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Some(x + 1)
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} else {
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} else {
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None
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None
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}
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}
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})
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});
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match id {
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Ok(id) => Some(AlarmHandle::new(id)),
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Err(_) => None,
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}
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}
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}
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fn set_alarm_callback(
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fn set_alarm_callback(
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@ -230,20 +237,18 @@ impl Driver for TimerDriverEmbassy {
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fn set_alarm(&self, alarm: embassy_time_driver::AlarmHandle, timestamp: u64) -> bool {
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fn set_alarm(&self, alarm: embassy_time_driver::AlarmHandle, timestamp: u64) -> bool {
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critical_section::with(|cs| {
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critical_section::with(|cs| {
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let n = alarm.id();
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let n = alarm.id();
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let alarm_tim = alarm_tim(n.into());
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alarm_tim.ctrl().modify(|_, w| {
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w.irq_enb().clear_bit();
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w.enable().clear_bit()
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});
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let alarm = self.get_alarm(cs, alarm);
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let alarm = self.get_alarm(cs, alarm);
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alarm.timestamp.set(timestamp);
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alarm.timestamp.set(timestamp);
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let alarm_tim = alarm_tim(n.into());
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let t = self.now();
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let t = self.now();
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if timestamp <= t {
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if timestamp <= t {
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alarm_tim.ctrl().modify(|_, w| {
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w.irq_enb().clear_bit();
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w.enable().clear_bit()
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});
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alarm.timestamp.set(u64::MAX);
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alarm.timestamp.set(u64::MAX);
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return false;
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return false;
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}
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}
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@ -258,22 +263,22 @@ impl Driver for TimerDriverEmbassy {
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// by the Alarm trait contract. What's not allowed is triggering alarms *before* their scheduled time,
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// by the Alarm trait contract. What's not allowed is triggering alarms *before* their scheduled time,
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// and we don't do that here.
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// and we don't do that here.
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let safe_timestamp = timestamp.max(t + 3);
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let safe_timestamp = timestamp.max(t + 3);
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let rst_val = timekeeping_tim().rst_value().read().bits();
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let rst_val_alarm = (safe_timestamp % rst_val as u64) as u32;
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alarm_tim
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alarm_tim
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.rst_value()
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.rst_value()
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.write(|w| unsafe { w.bits((safe_timestamp & u32::MAX as u64) as u32) });
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.write(|w| unsafe { w.bits(rst_val_alarm) });
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let diff = timestamp - t;
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let diff = timestamp - t;
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if diff < TIMER_MARGIN {
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if diff < (three_quarters_of_period(rst_val_alarm as u64)) {
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alarm_tim
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.cnt_value()
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.write(|w| unsafe { w.bits(rst_val_alarm) });
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alarm_tim.ctrl().modify(|_, w| w.irq_enb().set_bit());
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alarm_tim.ctrl().modify(|_, w| w.irq_enb().set_bit());
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alarm_tim.enable().write(|w| unsafe { w.bits(1) });
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alarm_tim.enable().write(|w| unsafe { w.bits(1) });
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} else {
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// If it's too far in the future, don't enable timer yet.
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// It will be enabled later by `next_period`.
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alarm_tim.ctrl().modify(|_, w| {
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w.irq_enb().clear_bit();
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w.enable().clear_bit()
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});
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}
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}
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// If it's too far in the future, don't enable timer yet.
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// It will be enabled later by `next_period`.
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true
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true
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})
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})
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@ -25,17 +25,20 @@ async fn main(_spawner: Spawner) {
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.xtal_n_clk_with_src_freq(Hertz::from_raw(EXTCLK_FREQ))
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.xtal_n_clk_with_src_freq(Hertz::from_raw(EXTCLK_FREQ))
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.freeze(&mut dp.sysconfig)
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.freeze(&mut dp.sysconfig)
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.unwrap();
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.unwrap();
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embassy_example::init(
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// Safety: Only called once here.
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&mut dp.sysconfig,
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unsafe {
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&dp.irq_router,
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embassy_example::init(
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dp.tim15,
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&mut dp.sysconfig,
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dp.tim14,
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&dp.irq_router,
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&clocks,
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dp.tim15,
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);
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dp.tim14,
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&clocks,
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)
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};
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let portg = PinsG::new(&mut dp.sysconfig, dp.portg);
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let portg = PinsG::new(&mut dp.sysconfig, dp.portg);
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let mut led = portg.pg5.into_readable_push_pull_output();
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let mut led = portg.pg5.into_readable_push_pull_output();
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loop {
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loop {
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Timer::after_millis(2000).await;
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Timer::after_secs(1).await;
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led.toggle().ok();
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led.toggle().ok();
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}
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}
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}
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}
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