smaller improvements and fixes
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7e7416efd1
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e1487c8969
@ -11,10 +11,10 @@ The bootloader uses the following memory map:
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| ------ | ---- | ---- |
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| 0x0 | Bootloader start | code up to 0x3FFC bytes |
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| 0x3FFC | Bootloader CRC | word |
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| 0x4000 | App image A start | code up to 0x1DFFC (~120K) bytes |
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| 0x4000 | App image A start | code up to 0x1DFF8 (~120K) bytes |
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| 0x21FF8 | App image A CRC check length | word |
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| 0x21FFC | App image A CRC check value | word |
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| 0x22000 | App image B start | code up to 0x1DFFC (~120K) bytes |
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| 0x22000 | App image B start | code up to 0x1DFF8 (~120K) bytes |
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| 0x3FFF8 | App image B CRC check length | word |
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| 0x3FFFC | App image B CRC check value | word |
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| 0x40000 | End of NVM | end |
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@ -53,7 +53,7 @@ const APP_A_START_ADDR: u32 = BOOTLOADER_END_ADDR;
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const APP_A_SIZE_ADDR: u32 = APP_B_END_ADDR - 8;
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// 0x21FFC
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const APP_A_CRC_ADDR: u32 = APP_B_END_ADDR - 4;
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pub const APP_A_END_ADDR: u32 = APP_B_END_ADDR - BOOTLOADER_END_ADDR / 2;
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pub const APP_A_END_ADDR: u32 = BOOTLOADER_END_ADDR + APP_IMG_SZ;
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// 0x22000
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const APP_B_START_ADDR: u32 = APP_A_END_ADDR;
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@ -86,7 +86,7 @@ async fn main(spawner: Spawner) {
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&clocks,
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);
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let (mut tx, rx) = uart0.split();
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let mut rx = rx.to_rx_with_irq();
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let mut rx = rx.into_rx_with_irq();
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rx.start();
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RX.lock(|static_rx| {
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static_rx.borrow_mut().replace(rx);
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@ -193,7 +193,7 @@ mod app {
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Mono::start(cx.core.SYST, clocks.sysclk().raw());
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CLOCKS.set(clocks).unwrap();
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let mut rx = rx.to_rx_with_irq();
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let mut rx = rx.into_rx_with_irq();
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let mut rx_context = IrqContextTimeoutOrMaxSize::new(MAX_TC_FRAME_SIZE);
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rx.read_fixed_len_or_timeout_based_using_irq(&mut rx_context)
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.expect("initiating UART RX failed");
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@ -1,7 +1,7 @@
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/* Special linker script for application slot A with an offset at address 0x4000 */
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MEMORY
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{
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FLASH : ORIGIN = 0x00004000, LENGTH = 256K
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FLASH : ORIGIN = 0x00004000, LENGTH = 0x1DFF8
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/* RAM is a mandatory region. This RAM refers to the SRAM_0 */
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RAM : ORIGIN = 0x1FFF8000, LENGTH = 32K
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SRAM_1 : ORIGIN = 0x20000000, LENGTH = 32K
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@ -1,7 +1,7 @@
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/* Special linker script for application slot B with an offset at address 0x22000 */
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MEMORY
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{
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FLASH : ORIGIN = 0x00022000, LENGTH = 256K
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FLASH : ORIGIN = 0x00022000, LENGTH = 0x1DFF8
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/* RAM is a mandatory region. This RAM refers to the SRAM_0 */
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RAM : ORIGIN = 0x1FFF8000, LENGTH = 32K
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SRAM_1 : ORIGIN = 0x20000000, LENGTH = 32K
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@ -94,6 +94,36 @@ impl From<RxError> for Error {
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}
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}
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impl embedded_io::Error for Error {
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fn kind(&self) -> embedded_io::ErrorKind {
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embedded_io::ErrorKind::Other
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}
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}
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impl embedded_io::Error for RxError {
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fn kind(&self) -> embedded_io::ErrorKind {
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embedded_io::ErrorKind::Other
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}
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}
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impl embedded_hal_nb::serial::Error for RxError {
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fn kind(&self) -> embedded_hal_nb::serial::ErrorKind {
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match self {
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RxError::Overrun => embedded_hal_nb::serial::ErrorKind::Overrun,
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RxError::Framing => embedded_hal_nb::serial::ErrorKind::FrameFormat,
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RxError::Parity => embedded_hal_nb::serial::ErrorKind::Parity,
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}
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}
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}
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impl embedded_hal_nb::serial::Error for Error {
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fn kind(&self) -> embedded_hal_nb::serial::ErrorKind {
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match self {
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Error::Rx(rx_error) => embedded_hal_nb::serial::Error::kind(rx_error),
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Error::BreakCondition => embedded_hal_nb::serial::ErrorKind::Other,
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}
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}
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}
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#[derive(Debug, PartialEq, Eq, Copy, Clone)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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pub enum Event {
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@ -305,6 +335,50 @@ enum IrqReceptionMode {
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Pending,
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}
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#[derive(Default, Debug, Copy, Clone)]
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pub struct IrqUartError {
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overflow: bool,
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framing: bool,
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parity: bool,
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other: bool,
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}
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impl IrqUartError {
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#[inline(always)]
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pub fn overflow(&self) -> bool {
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self.overflow
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}
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#[inline(always)]
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pub fn framing(&self) -> bool {
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self.framing
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}
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#[inline(always)]
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pub fn parity(&self) -> bool {
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self.parity
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}
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#[inline(always)]
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pub fn other(&self) -> bool {
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self.other
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}
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}
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impl IrqUartError {
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#[inline(always)]
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pub fn error(&self) -> bool {
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self.overflow || self.framing || self.parity
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}
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}
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#[derive(Debug, PartialEq, Eq)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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pub struct BufferTooShortError {
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found: usize,
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expected: usize,
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}
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//==================================================================================================
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// UART peripheral wrapper
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//==================================================================================================
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@ -510,6 +584,40 @@ impl<Uart: Instance> UartBase<Uart> {
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}
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}
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impl<UartInstance> embedded_io::ErrorType for UartBase<UartInstance> {
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type Error = Error;
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}
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impl<UartInstance> embedded_hal_nb::serial::ErrorType for UartBase<UartInstance> {
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type Error = Error;
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}
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impl<Uart: Instance> embedded_hal_nb::serial::Read<u8> for UartBase<Uart> {
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fn read(&mut self) -> nb::Result<u8, Self::Error> {
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self.rx.read().map_err(|e| e.map(Error::Rx))
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}
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}
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impl<Uart: Instance> embedded_hal_nb::serial::Write<u8> for UartBase<Uart> {
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fn write(&mut self, word: u8) -> nb::Result<(), Self::Error> {
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self.tx.write(word).map_err(|e| {
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if let nb::Error::Other(_) = e {
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unreachable!()
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}
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nb::Error::WouldBlock
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})
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}
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fn flush(&mut self) -> nb::Result<(), Self::Error> {
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self.tx.flush().map_err(|e| {
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if let nb::Error::Other(_) = e {
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unreachable!()
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}
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nb::Error::WouldBlock
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})
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}
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}
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/// Serial abstraction. Entry point to create a new UART
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pub struct Uart<UartInstance, Pins> {
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inner: UartBase<UartInstance>,
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@ -620,9 +728,7 @@ impl<Uart: Instance> Rx<Uart> {
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fn new(uart: Uart) -> Self {
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Self(uart)
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}
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}
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impl<Uart: Instance> Rx<Uart> {
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/// Direct access to the peripheral structure.
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///
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/// # Safety
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@ -674,7 +780,7 @@ impl<Uart: Instance> Rx<Uart> {
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self.0.data().read().bits()
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}
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pub fn to_rx_with_irq(self) -> RxWithIrq<Uart> {
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pub fn into_rx_with_irq(self) -> RxWithIrq<Uart> {
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RxWithIrq(self)
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}
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@ -683,18 +789,69 @@ impl<Uart: Instance> Rx<Uart> {
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}
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}
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impl<Uart> embedded_io::ErrorType for Rx<Uart> {
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type Error = RxError;
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}
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impl<Uart> embedded_hal_nb::serial::ErrorType for Rx<Uart> {
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type Error = RxError;
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}
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impl<Uart: Instance> embedded_hal_nb::serial::Read<u8> for Rx<Uart> {
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fn read(&mut self) -> nb::Result<u8, Self::Error> {
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let uart = unsafe { &(*Uart::ptr()) };
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let status_reader = uart.rxstatus().read();
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let err = if status_reader.rxovr().bit_is_set() {
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Some(RxError::Overrun)
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} else if status_reader.rxfrm().bit_is_set() {
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Some(RxError::Framing)
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} else if status_reader.rxpar().bit_is_set() {
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Some(RxError::Parity)
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} else {
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None
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};
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if let Some(err) = err {
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// The status code is always related to the next bit for the framing
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// and parity status bits. We have to read the DATA register
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// so that the next status reflects the next DATA word
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// For overrun error, we read as well to clear the peripheral
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self.read_fifo_unchecked();
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return Err(err.into());
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}
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self.read_fifo().map(|val| (val & 0xff) as u8).map_err(|e| {
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if let nb::Error::Other(_) = e {
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unreachable!()
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}
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nb::Error::WouldBlock
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})
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}
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}
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impl<Uart: Instance> embedded_io::Read for Rx<Uart> {
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fn read(&mut self, buf: &mut [u8]) -> Result<usize, Self::Error> {
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if buf.is_empty() {
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return Ok(0);
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}
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for byte in buf.iter_mut() {
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let w = nb::block!(<Self as embedded_hal_nb::serial::Read<u8>>::read(self))?;
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*byte = w;
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}
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Ok(buf.len())
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}
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}
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/// Serial transmitter
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///
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/// Can be created by using the [Uart::split] or [UartBase::split] API.
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pub struct Tx<Uart>(Uart);
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impl<Uart> Tx<Uart> {
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impl<Uart: Instance> Tx<Uart> {
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fn new(uart: Uart) -> Self {
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Self(uart)
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}
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}
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impl<Uart: Instance> Tx<Uart> {
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/// Direct access to the peripheral structure.
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///
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/// # Safety
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@ -746,48 +903,47 @@ impl<Uart: Instance> Tx<Uart> {
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}
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}
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#[derive(Default, Debug, Copy, Clone)]
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pub struct IrqUartError {
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overflow: bool,
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framing: bool,
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parity: bool,
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other: bool,
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impl<Uart> embedded_io::ErrorType for Tx<Uart> {
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type Error = Infallible;
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}
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impl IrqUartError {
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#[inline(always)]
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pub fn overflow(&self) -> bool {
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self.overflow
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impl<Uart> embedded_hal_nb::serial::ErrorType for Tx<Uart> {
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type Error = Infallible;
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}
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impl<Uart: Instance> embedded_hal_nb::serial::Write<u8> for Tx<Uart> {
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fn write(&mut self, word: u8) -> nb::Result<(), Self::Error> {
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self.write_fifo(word as u32)
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}
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#[inline(always)]
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pub fn framing(&self) -> bool {
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self.framing
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fn flush(&mut self) -> nb::Result<(), Self::Error> {
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// SAFETY: Only TX related registers are used.
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let reader = unsafe { &(*Uart::ptr()) }.txstatus().read();
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if reader.wrbusy().bit_is_set() {
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return Err(nb::Error::WouldBlock);
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}
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#[inline(always)]
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pub fn parity(&self) -> bool {
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self.parity
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}
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#[inline(always)]
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pub fn other(&self) -> bool {
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self.other
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Ok(())
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}
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}
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impl IrqUartError {
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#[inline(always)]
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pub fn error(&self) -> bool {
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self.overflow || self.framing || self.parity
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impl<Uart: Instance> embedded_io::Write for Tx<Uart> {
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fn write(&mut self, buf: &[u8]) -> Result<usize, Self::Error> {
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if buf.is_empty() {
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return Ok(0);
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}
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}
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#[derive(Debug, PartialEq, Eq)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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pub struct BufferTooShortError {
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found: usize,
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expected: usize,
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for byte in buf.iter() {
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nb::block!(<Self as embedded_hal_nb::serial::Write<u8>>::write(
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self, *byte
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))?;
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}
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Ok(buf.len())
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}
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fn flush(&mut self) -> Result<(), Self::Error> {
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nb::block!(<Self as embedded_hal_nb::serial::Write<u8>>::flush(self))
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}
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}
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/// Serial receiver, using interrupts to offload reading to the hardware.
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@ -1063,165 +1219,12 @@ impl<Uart: Instance> RxWithIrq<Uart> {
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context.rx_idx = 0;
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}
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pub fn release(self) -> Uart {
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/// # Safety
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///
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/// This API allows creating multiple UART instances when releasing the TX structure as well.
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/// The user must ensure that these instances are not used to create multiple overlapping
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/// UART drivers.
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pub unsafe fn release(self) -> Uart {
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self.0.release()
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}
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}
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impl embedded_io::Error for Error {
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fn kind(&self) -> embedded_io::ErrorKind {
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embedded_io::ErrorKind::Other
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}
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}
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impl embedded_io::Error for RxError {
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fn kind(&self) -> embedded_io::ErrorKind {
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embedded_io::ErrorKind::Other
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}
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}
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impl embedded_hal_nb::serial::Error for Error {
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fn kind(&self) -> embedded_hal_nb::serial::ErrorKind {
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embedded_hal_nb::serial::ErrorKind::Other
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}
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}
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impl embedded_hal_nb::serial::Error for RxError {
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fn kind(&self) -> embedded_hal_nb::serial::ErrorKind {
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match self {
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RxError::Overrun => embedded_hal_nb::serial::ErrorKind::Overrun,
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RxError::Framing => embedded_hal_nb::serial::ErrorKind::FrameFormat,
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RxError::Parity => embedded_hal_nb::serial::ErrorKind::Parity,
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}
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}
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}
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impl<Uart> embedded_io::ErrorType for Rx<Uart> {
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type Error = RxError;
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}
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impl<Uart> embedded_hal_nb::serial::ErrorType for Rx<Uart> {
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type Error = RxError;
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}
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impl<Uart: Instance> embedded_hal_nb::serial::Read<u8> for Rx<Uart> {
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fn read(&mut self) -> nb::Result<u8, Self::Error> {
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let uart = unsafe { &(*Uart::ptr()) };
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let status_reader = uart.rxstatus().read();
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let err = if status_reader.rxovr().bit_is_set() {
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Some(RxError::Overrun)
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} else if status_reader.rxfrm().bit_is_set() {
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Some(RxError::Framing)
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} else if status_reader.rxpar().bit_is_set() {
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Some(RxError::Parity)
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} else {
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None
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};
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if let Some(err) = err {
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// The status code is always related to the next bit for the framing
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// and parity status bits. We have to read the DATA register
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// so that the next status reflects the next DATA word
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// For overrun error, we read as well to clear the peripheral
|
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self.read_fifo_unchecked();
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return Err(err.into());
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}
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self.read_fifo().map(|val| (val & 0xff) as u8).map_err(|e| {
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if let nb::Error::Other(_) = e {
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unreachable!()
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}
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nb::Error::WouldBlock
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})
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}
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}
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impl<Uart: Instance> embedded_io::Read for Rx<Uart> {
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fn read(&mut self, buf: &mut [u8]) -> Result<usize, Self::Error> {
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if buf.is_empty() {
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return Ok(0);
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}
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for byte in buf.iter_mut() {
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let w = nb::block!(<Self as embedded_hal_nb::serial::Read<u8>>::read(self))?;
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*byte = w;
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}
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Ok(buf.len())
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}
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}
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impl<Uart> embedded_io::ErrorType for Tx<Uart> {
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type Error = Infallible;
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}
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impl<Uart> embedded_hal_nb::serial::ErrorType for Tx<Uart> {
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type Error = Infallible;
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}
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impl<Uart: Instance> embedded_hal_nb::serial::Write<u8> for Tx<Uart> {
|
||||
fn write(&mut self, word: u8) -> nb::Result<(), Self::Error> {
|
||||
self.write_fifo(word as u32)
|
||||
}
|
||||
|
||||
fn flush(&mut self) -> nb::Result<(), Self::Error> {
|
||||
// SAFETY: Only TX related registers are used.
|
||||
let reader = unsafe { &(*Uart::ptr()) }.txstatus().read();
|
||||
if reader.wrbusy().bit_is_set() {
|
||||
return Err(nb::Error::WouldBlock);
|
||||
}
|
||||
Ok(())
|
||||
}
|
||||
}
|
||||
|
||||
impl<Uart: Instance> embedded_io::Write for Tx<Uart> {
|
||||
fn write(&mut self, buf: &[u8]) -> Result<usize, Self::Error> {
|
||||
if buf.is_empty() {
|
||||
return Ok(0);
|
||||
}
|
||||
|
||||
for byte in buf.iter() {
|
||||
nb::block!(<Self as embedded_hal_nb::serial::Write<u8>>::write(
|
||||
self, *byte
|
||||
))?;
|
||||
}
|
||||
|
||||
Ok(buf.len())
|
||||
}
|
||||
|
||||
fn flush(&mut self) -> Result<(), Self::Error> {
|
||||
nb::block!(<Self as embedded_hal_nb::serial::Write<u8>>::flush(self))
|
||||
}
|
||||
}
|
||||
|
||||
impl<UartInstance> embedded_io::ErrorType for UartBase<UartInstance> {
|
||||
type Error = Error;
|
||||
}
|
||||
|
||||
impl<UartInstance> embedded_hal_nb::serial::ErrorType for UartBase<UartInstance> {
|
||||
type Error = Error;
|
||||
}
|
||||
|
||||
impl<Uart: Instance> embedded_hal_nb::serial::Read<u8> for UartBase<Uart> {
|
||||
fn read(&mut self) -> nb::Result<u8, Self::Error> {
|
||||
self.rx.read().map_err(|e| e.map(Error::Rx))
|
||||
}
|
||||
}
|
||||
|
||||
impl<Uart: Instance> embedded_hal_nb::serial::Write<u8> for UartBase<Uart> {
|
||||
fn write(&mut self, word: u8) -> nb::Result<(), Self::Error> {
|
||||
self.tx.write(word).map_err(|e| {
|
||||
if let nb::Error::Other(_) = e {
|
||||
unreachable!()
|
||||
}
|
||||
nb::Error::WouldBlock
|
||||
})
|
||||
}
|
||||
|
||||
fn flush(&mut self) -> nb::Result<(), Self::Error> {
|
||||
self.tx.flush().map_err(|e| {
|
||||
if let nb::Error::Other(_) = e {
|
||||
unreachable!()
|
||||
}
|
||||
nb::Error::WouldBlock
|
||||
})
|
||||
}
|
||||
}
|
||||
|
Loading…
Reference in New Issue
Block a user