From e540f5d4c139b84b5c11b389e4c3e13cf67f699c Mon Sep 17 00:00:00 2001 From: Robin Mueller Date: Mon, 17 Feb 2025 11:13:45 +0100 Subject: [PATCH] examples work --- examples/embassy/src/bin/async-uart-rx.rs | 2 +- va416xx-hal/src/uart/mod.rs | 1 + va416xx-hal/src/uart/rx_asynch.rs | 8 ++++++++ va416xx-hal/src/uart/tx_asynch.rs | 8 ++++++++ 4 files changed, 18 insertions(+), 1 deletion(-) diff --git a/examples/embassy/src/bin/async-uart-rx.rs b/examples/embassy/src/bin/async-uart-rx.rs index b35f1b4..49df09a 100644 --- a/examples/embassy/src/bin/async-uart-rx.rs +++ b/examples/embassy/src/bin/async-uart-rx.rs @@ -39,7 +39,6 @@ static QUEUE_UART_A: static_cell::ConstStaticCell> = static_cell::ConstStaticCell::new(Queue::new()); static PRODUCER_UART_A: Mutex>>> = Mutex::new(RefCell::new(None)); -// main is itself an async function. #[embassy_executor::main] async fn main(_spawner: Spawner) { rtt_init_print!(); @@ -81,6 +80,7 @@ async fn main(_spawner: Spawner) { *PRODUCER_UART_A.borrow(cs).borrow_mut() = Some(prod_uart_a); }); + // TODO: Add example for RxAsyncOverwriting using another UART. let mut async_uart_rx = RxAsync::new(rx_uart_a, cons_uart_a); let mut buf = [0u8; 256]; loop { diff --git a/va416xx-hal/src/uart/mod.rs b/va416xx-hal/src/uart/mod.rs index cc3c8a7..1e8d03f 100644 --- a/va416xx-hal/src/uart/mod.rs +++ b/va416xx-hal/src/uart/mod.rs @@ -622,6 +622,7 @@ impl UartBase { w.txenable().clear_bit() }); disable_nvic_interrupt(Uart::IRQ_RX); + disable_nvic_interrupt(Uart::IRQ_TX); self.uart } diff --git a/va416xx-hal/src/uart/rx_asynch.rs b/va416xx-hal/src/uart/rx_asynch.rs index cd64a9b..d70e6ac 100644 --- a/va416xx-hal/src/uart/rx_asynch.rs +++ b/va416xx-hal/src/uart/rx_asynch.rs @@ -26,6 +26,8 @@ use embedded_io::ErrorType; use portable_atomic::AtomicBool; use va416xx::uart0 as uart_base; +use crate::enable_nvic_interrupt; + use super::{Bank, Instance, Rx, RxError, UartErrors}; static UART_RX_WAKERS: [AtomicWaker; 3] = [const { AtomicWaker::new() }; 3]; @@ -277,6 +279,9 @@ impl ErrorType for RxAsync { fn stop_async_rx(rx: &mut Rx) { rx.disable_interrupts(); rx.disable(); + unsafe { + enable_nvic_interrupt(Uart::IRQ_RX); + } rx.clear_fifo(); } @@ -291,6 +296,9 @@ impl RxAsync { rx.clear_fifo(); // Enable those together. critical_section::with(|_| { + unsafe { + enable_nvic_interrupt(Uart::IRQ_RX); + } rx.enable_interrupts(); rx.enable(); }); diff --git a/va416xx-hal/src/uart/tx_asynch.rs b/va416xx-hal/src/uart/tx_asynch.rs index 13980ae..a1adb8d 100644 --- a/va416xx-hal/src/uart/tx_asynch.rs +++ b/va416xx-hal/src/uart/tx_asynch.rs @@ -219,11 +219,19 @@ pub struct TxAsync { } impl TxAsync { + /// Create a new asynchronous TX object. + /// + /// This function also enable the NVIC interrupt, but does not enable the peripheral specific + /// interrupts. pub fn new(tx: Tx) -> Self { + // Safety: We own TX now. + unsafe { enable_nvic_interrupt(Uart::IRQ_TX) }; Self { tx } } + /// This function also disables the NVIC interrupt. pub fn release(self) -> Tx { + disable_nvic_interrupt(Uart::IRQ_TX); self.tx } }