Commit Graph

6 Commits

Author SHA1 Message Date
935ee9dbb1 Rework library structure
Changed:

- Move most library components to new [`vorago-shared-periphs`](https://egit.irs.uni-stuttgart.de/rust/vorago-shared-periphs)
  which is mostly re-exported in this crate.
- Overhaul and simplification of several HAL APIs. The system configuration and IRQ router
  peripheral instance generally does not need to be passed to HAL API anymore.
- All HAL drivers are now type erased. The constructors will still expect and consume the PAC
  singleton component for resource management purposes, but are not cached anymore.
- Refactoring of GPIO library to be more inline with embassy GPIO API.

Added:

- I2C clock timeout feature support.
2025-04-24 16:54:03 +02:00
a3c6366e98 UART error handling update 2025-03-07 17:10:42 +01:00
14ad647773 HAL update + CHANGELOG 2025-02-14 15:31:19 +01:00
273be8b3cf bumped PAC to v0.3.0 2025-02-13 16:11:27 +01:00
5f50892d8a finished basic ADC and DAC HAL
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2024-07-01 14:47:08 +02:00
5d1740efea Init Commit
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Rust/va416xx-rs/pipeline/head This commit looks good
Monorepo for Rust support of VA416XX family of radiation hardened MCUs
2024-06-25 20:01:21 +02:00