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Author SHA1 Message Date
9bda3f29f4 Updates and fixes
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Rust/va416xx-rs/pipeline/pr-main This commit looks good
- Improve and fix SPI HAL and example
- Fix RTIC example
2024-09-19 13:36:26 +02:00

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@ -83,6 +83,8 @@ fn main() -> ! {
// Can't really verify correct behaviour here. Just verify nothing crazy happens or it hangs up.
spi0.read(&mut rx_buf[0..2]).unwrap();
// If the pins are tied together, we should received exactly what we send.
let mut inplace_buf = tx_buf;
spi0.transfer_in_place(&mut inplace_buf)
.expect("SPI transfer_in_place failed");