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984b2ce889
Author | SHA1 | Date | |
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984b2ce889 |
@ -16,5 +16,5 @@ crc = "3"
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path = "../va416xx-hal"
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[features]
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default = ["rtt-panic"]
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default = []
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rtt-panic = []
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@ -10,7 +10,9 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
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## Changed
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- Simplification of clock configuration API for SPI HAL.
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- Improve and fix SPI abstractions. Add new low level interface. The primary SPI constructor now
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only expects a configuration structure and the transfer configuration needs to be applied in a
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separate step.
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## Fixed
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@ -1,11 +1,15 @@
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//! API for the SPI peripheral
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//!
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//! The main abstraction provided by this module are the [Spi] and the [SpiBase] structure.
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//! These provide the [embedded_hal::spi] traits, but also offer a low level interface
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//! via the [SpiLowLevel] trait.
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//!
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//! ## Examples
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//!
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//! - [Blocking SPI example](https://egit.irs.uni-stuttgart.de/rust/va416xx-rs/src/branch/main/examples/simple/examples/spi.rs)
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use core::{convert::Infallible, marker::PhantomData, ops::Deref};
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use embedded_hal::spi::Mode;
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use embedded_hal::spi::{Mode, MODE_0};
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use crate::{
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clock::{Clocks, PeripheralSelect, SyscfgExt},
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@ -325,6 +329,15 @@ impl<HwCs: HwCsProvider> TransferConfigProvider for TransferConfigWithHwcs<HwCs>
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/// Configuration options for the whole SPI bus. See Programmer Guide p.92 for more details
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pub struct SpiConfig {
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clk: SpiClkConfig,
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// SPI mode configuration
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pub init_mode: Mode,
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/// If this is enabled, all data in the FIFO is transmitted in a single frame unless
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/// the BMSTOP bit is set on a dataword. A frame is defined as CSn being active for the
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/// duration of multiple data words. Defaults to true.
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pub blockmode: bool,
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/// This enables the stalling of the SPI SCK if in blockmode and the FIFO is empty.
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/// Currently enabled by default.
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pub bmstall: bool,
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/// By default, configure SPI for master mode (ms == false)
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ms: bool,
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/// Slave output disable. Useful if separate GPIO pins or decoders are used for CS control
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@ -338,6 +351,9 @@ pub struct SpiConfig {
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impl Default for SpiConfig {
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fn default() -> Self {
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Self {
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init_mode: MODE_0,
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blockmode: true,
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bmstall: true,
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// Default value is definitely valid.
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clk: SpiClkConfig::from_div(DEFAULT_CLK_DIV).unwrap(),
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ms: Default::default(),
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@ -449,6 +465,36 @@ impl Instance for pac::Spi3 {
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// Spi
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//==================================================================================================
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/// Low level access trait for the SPI peripheral.
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pub trait SpiLowLevel {
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/// Low level function to write a word to the SPI FIFO but also checks whether
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/// there is actually data in the FIFO.
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///
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/// Uses the [nb] API to allow usage in blocking and non-blocking contexts.
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fn write_fifo(&self, data: u32) -> nb::Result<(), Infallible>;
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/// Low level function to write a word to the SPI FIFO without checking whether
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/// there FIFO is full.
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///
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/// This does not necesarily mean there is a space in the FIFO available.
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/// Use [Self::write_fifo] function to write a word into the FIFO reliably.
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fn write_fifo_unchecked(&self, data: u32);
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/// Low level function to read a word from the SPI FIFO. Must be preceeded by a
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/// [Self::write_fifo] call.
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///
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/// Uses the [nb] API to allow usage in blocking and non-blocking contexts.
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fn read_fifo(&self) -> nb::Result<u32, Infallible>;
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/// Low level function to read a word from from the SPI FIFO.
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///
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/// This does not necesarily mean there is a word in the FIFO available.
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/// Use the [Self::read_fifo] function to read a word from the FIFO reliably using the [nb]
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/// API.
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/// You might also need to mask the value to ignore the BMSTART/BMSTOP bit.
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fn read_fifo_unchecked(&self) -> u32;
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}
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pub struct SpiBase<SpiInstance, Word = u8> {
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spi: SpiInstance,
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cfg: SpiConfig,
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@ -456,6 +502,7 @@ pub struct SpiBase<SpiInstance, Word = u8> {
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/// Fill word for read-only SPI transactions.
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pub fill_word: Word,
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blockmode: bool,
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bmstall: bool,
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word: PhantomData<Word>,
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}
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@ -604,7 +651,7 @@ where
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}
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#[inline]
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pub fn spi_instance(&self) -> &SpiInstance {
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pub fn spi(&self) -> &SpiInstance {
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&self.spi
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}
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@ -681,6 +728,52 @@ where
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});
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}
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/// Low level function to write a word to the SPI FIFO but also checks whether
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/// there is actually data in the FIFO.
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///
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/// Uses the [nb] API to allow usage in blocking and non-blocking contexts.
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#[inline(always)]
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pub fn write_fifo(&self, data: u32) -> nb::Result<(), Infallible> {
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if self.spi.status().read().tnf().bit_is_clear() {
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return Err(nb::Error::WouldBlock);
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}
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self.write_fifo_unchecked(data);
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Ok(())
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}
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/// Low level function to write a word to the SPI FIFO without checking whether
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/// there FIFO is full.
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///
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/// This does not necesarily mean there is a space in the FIFO available.
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/// Use [Self::write_fifo] function to write a word into the FIFO reliably.
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#[inline(always)]
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pub fn write_fifo_unchecked(&self, data: u32) {
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self.spi.data().write(|w| unsafe { w.bits(data) });
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}
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/// Low level function to read a word from the SPI FIFO. Must be preceeded by a
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/// [Self::write_fifo] call.
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///
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/// Uses the [nb] API to allow usage in blocking and non-blocking contexts.
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#[inline(always)]
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pub fn read_fifo(&self) -> nb::Result<u32, Infallible> {
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if self.spi.status().read().rne().bit_is_clear() {
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return Err(nb::Error::WouldBlock);
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}
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Ok(self.read_fifo_unchecked())
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}
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/// Low level function to read a word from from the SPI FIFO.
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///
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/// This does not necesarily mean there is a word in the FIFO available.
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/// Use the [Self::read_fifo] function to read a word from the FIFO reliably using the [nb]
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/// API.
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/// You might also need to mask the value to ignore the BMSTART/BMSTOP bit.
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#[inline(always)]
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pub fn read_fifo_unchecked(&self) -> u32 {
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self.spi.data().read().bits()
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}
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fn flush_internal(&self) {
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let mut status_reg = self.spi.status().read();
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while status_reg.tfe().bit_is_clear()
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@ -688,40 +781,12 @@ where
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|| status_reg.busy().bit_is_set()
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{
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if status_reg.rne().bit_is_set() {
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self.read_single_word();
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self.read_fifo_unchecked();
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}
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status_reg = self.spi.status().read();
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}
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}
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/// Sends a word to the slave
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#[inline(always)]
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fn send_blocking(&self, word: Word) {
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// TODO: Upper limit for wait cycles to avoid complete hangups?
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while self.spi.status().read().tnf().bit_is_clear() {}
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self.send(word)
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}
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#[inline(always)]
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fn send(&self, word: Word) {
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self.spi.data().write(|w| unsafe { w.bits(word.into()) });
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}
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/// Read a word from the slave. Must be preceeded by a [`send`](Self::send) call
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#[inline(always)]
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fn read_blocking(&self) -> Word {
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// TODO: Upper limit for wait cycles to avoid complete hangups?
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while self.spi.status().read().rne().bit_is_clear() {}
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self.read_single_word()
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}
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#[inline(always)]
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fn read_single_word(&self) -> Word {
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(self.spi.data().read().bits() & Word::MASK)
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.try_into()
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.unwrap()
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}
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fn transfer_preparation(&self, words: &[Word]) -> Result<(), Infallible> {
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if words.is_empty() {
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return Ok(());
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@ -730,15 +795,21 @@ where
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Ok(())
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}
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// Returns the actual bytes sent.
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// The FIFO can hold a guaranteed amount of data, so we can pump it on transfer
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// initialization. Returns the amount of written bytes.
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fn initial_send_fifo_pumping_with_words(&self, words: &[Word]) -> usize {
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if self.blockmode {
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self.spi.ctrl1().modify(|_, w| w.mtxpause().set_bit())
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}
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// Fill the first half of the write FIFO
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let mut current_write_idx = 0;
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for _ in 0..core::cmp::min(FILL_DEPTH, words.len()) {
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self.send_blocking(words[current_write_idx]);
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let smaller_idx = core::cmp::min(FILL_DEPTH, words.len());
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for _ in 0..smaller_idx {
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if current_write_idx == smaller_idx.saturating_sub(1) && self.bmstall {
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self.write_fifo_unchecked(words[current_write_idx].into() | BMSTART_BMSTOP_MASK);
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} else {
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self.write_fifo_unchecked(words[current_write_idx].into());
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}
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current_write_idx += 1;
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}
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if self.blockmode {
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@ -747,14 +818,21 @@ where
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current_write_idx
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}
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// The FIFO can hold a guaranteed amount of data, so we can pump it on transfer
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// initialization.
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fn initial_send_fifo_pumping_with_fill_words(&self, send_len: usize) -> usize {
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if self.blockmode {
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self.spi.ctrl1().modify(|_, w| w.mtxpause().set_bit())
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}
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// Fill the first half of the write FIFO
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let mut current_write_idx = 0;
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for _ in 0..core::cmp::min(FILL_DEPTH, send_len) {
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self.send_blocking(self.fill_word);
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let smaller_idx = core::cmp::min(FILL_DEPTH, send_len);
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for _ in 0..smaller_idx {
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if current_write_idx == smaller_idx.saturating_sub(1) && self.bmstall {
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self.write_fifo_unchecked(self.fill_word.into() | BMSTART_BMSTOP_MASK);
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} else {
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self.write_fifo_unchecked(self.fill_word.into());
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}
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current_write_idx += 1;
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}
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if self.blockmode {
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@ -764,6 +842,148 @@ where
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}
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}
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impl<SpiInstance: Instance, Word: WordProvider> SpiLowLevel for SpiBase<SpiInstance, Word>
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where
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<Word as TryFrom<u32>>::Error: core::fmt::Debug,
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{
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#[inline(always)]
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fn write_fifo(&self, data: u32) -> nb::Result<(), Infallible> {
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if self.spi.status().read().tnf().bit_is_clear() {
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return Err(nb::Error::WouldBlock);
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}
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self.write_fifo_unchecked(data);
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Ok(())
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}
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#[inline(always)]
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fn write_fifo_unchecked(&self, data: u32) {
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self.spi.data().write(|w| unsafe { w.bits(data) });
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}
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#[inline(always)]
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fn read_fifo(&self) -> nb::Result<u32, Infallible> {
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if self.spi.status().read().rne().bit_is_clear() {
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return Err(nb::Error::WouldBlock);
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}
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Ok(self.read_fifo_unchecked())
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}
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#[inline(always)]
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fn read_fifo_unchecked(&self) -> u32 {
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self.spi.data().read().bits()
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}
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}
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impl<SpiI: Instance, Word: WordProvider> embedded_hal::spi::ErrorType for SpiBase<SpiI, Word> {
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type Error = Infallible;
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}
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impl<SpiI: Instance, Word: WordProvider> embedded_hal::spi::SpiBus<Word> for SpiBase<SpiI, Word>
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where
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<Word as TryFrom<u32>>::Error: core::fmt::Debug,
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{
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fn read(&mut self, words: &mut [Word]) -> Result<(), Self::Error> {
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self.transfer_preparation(words)?;
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let mut current_read_idx = 0;
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let mut current_write_idx = self.initial_send_fifo_pumping_with_fill_words(words.len());
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loop {
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if current_read_idx < words.len() {
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words[current_read_idx] = (nb::block!(self.read_fifo())? & Word::MASK)
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.try_into()
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.unwrap();
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current_read_idx += 1;
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}
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if current_write_idx < words.len() {
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if current_write_idx == words.len() - 1 && self.bmstall {
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nb::block!(self.write_fifo(self.fill_word.into() | BMSTART_BMSTOP_MASK))?;
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} else {
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nb::block!(self.write_fifo(self.fill_word.into()))?;
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}
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current_write_idx += 1;
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}
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if current_read_idx >= words.len() && current_write_idx >= words.len() {
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break;
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}
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}
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Ok(())
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}
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fn write(&mut self, words: &[Word]) -> Result<(), Self::Error> {
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self.transfer_preparation(words)?;
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let mut current_write_idx = self.initial_send_fifo_pumping_with_words(words);
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while current_write_idx < words.len() {
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if current_write_idx == words.len() - 1 && self.bmstall {
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nb::block!(self.write_fifo(words[current_write_idx].into() | BMSTART_BMSTOP_MASK))?;
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} else {
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nb::block!(self.write_fifo(words[current_write_idx].into()))?;
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}
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current_write_idx += 1;
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// Ignore received words.
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if self.spi.status().read().rne().bit_is_set() {
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self.clear_rx_fifo();
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}
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}
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Ok(())
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}
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fn transfer(&mut self, read: &mut [Word], write: &[Word]) -> Result<(), Self::Error> {
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self.transfer_preparation(write)?;
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let mut current_read_idx = 0;
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let mut current_write_idx = self.initial_send_fifo_pumping_with_words(write);
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while current_read_idx < read.len() || current_write_idx < write.len() {
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if current_write_idx < write.len() {
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if current_write_idx == write.len() - 1 && self.bmstall {
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nb::block!(
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self.write_fifo(write[current_write_idx].into() | BMSTART_BMSTOP_MASK)
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)?;
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} else {
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nb::block!(self.write_fifo(write[current_write_idx].into()))?;
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}
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current_write_idx += 1;
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}
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if current_read_idx < read.len() {
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read[current_read_idx] = (nb::block!(self.read_fifo())? & Word::MASK)
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.try_into()
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.unwrap();
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current_read_idx += 1;
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}
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}
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Ok(())
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}
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fn transfer_in_place(&mut self, words: &mut [Word]) -> Result<(), Self::Error> {
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self.transfer_preparation(words)?;
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let mut current_read_idx = 0;
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let mut current_write_idx = self.initial_send_fifo_pumping_with_words(words);
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while current_read_idx < words.len() || current_write_idx < words.len() {
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if current_write_idx < words.len() {
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if current_write_idx == words.len() - 1 && self.bmstall {
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nb::block!(
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self.write_fifo(words[current_write_idx].into() | BMSTART_BMSTOP_MASK)
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)?;
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} else {
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nb::block!(self.write_fifo(words[current_write_idx].into()))?;
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}
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current_write_idx += 1;
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}
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if current_read_idx < words.len() && current_read_idx < current_write_idx {
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words[current_read_idx] = (nb::block!(self.read_fifo())? & Word::MASK)
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.try_into()
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.unwrap();
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current_read_idx += 1;
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}
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}
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Ok(())
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}
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fn flush(&mut self) -> Result<(), Self::Error> {
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self.flush_internal();
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Ok(())
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}
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}
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impl<
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SpiI: Instance,
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Sck: PinSck<SpiI>,
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@ -795,31 +1015,20 @@ where
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spi: SpiI,
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pins: (Sck, Miso, Mosi),
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spi_cfg: SpiConfig,
|
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transfer_cfg: Option<&TransferConfig>,
|
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) -> Result<Self, SpiClkConfigError> {
|
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) -> Self {
|
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crate::clock::enable_peripheral_clock(syscfg, SpiI::PERIPH_SEL);
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// This is done in the C HAL.
|
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syscfg.assert_periph_reset_for_two_cycles(SpiI::PERIPH_SEL);
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let SpiConfig {
|
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clk,
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init_mode,
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blockmode,
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bmstall,
|
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ms,
|
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slave_output_disable,
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loopback_mode,
|
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master_delayer_capture,
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} = spi_cfg;
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let mut init_mode = embedded_hal::spi::MODE_0;
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let mut ss = 0;
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let mut init_blockmode = false;
|
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let apb1_clk = clocks.apb1();
|
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if let Some(transfer_cfg) = transfer_cfg {
|
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if let Some(mode) = transfer_cfg.mode {
|
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init_mode = mode;
|
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}
|
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if transfer_cfg.hw_cs != HwChipSelectId::Invalid {
|
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ss = transfer_cfg.hw_cs as u8;
|
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}
|
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init_blockmode = transfer_cfg.blockmode;
|
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}
|
||||
|
||||
let (cpo_bit, cph_bit) = mode_to_cpo_cph_bit(init_mode);
|
||||
spi.ctrl0().write(|w| {
|
||||
@ -832,13 +1041,15 @@ where
|
||||
w.sph().bit(cph_bit)
|
||||
}
|
||||
});
|
||||
|
||||
spi.ctrl1().write(|w| {
|
||||
w.lbm().bit(loopback_mode);
|
||||
w.sod().bit(slave_output_disable);
|
||||
w.ms().bit(ms);
|
||||
w.mdlycap().bit(master_delayer_capture);
|
||||
w.blockmode().bit(init_blockmode);
|
||||
unsafe { w.ss().bits(ss) }
|
||||
w.blockmode().bit(blockmode);
|
||||
w.bmstall().bit(bmstall);
|
||||
unsafe { w.ss().bits(0) }
|
||||
});
|
||||
spi.clkprescale()
|
||||
.write(|w| unsafe { w.bits(clk.prescale_val as u32) });
|
||||
@ -850,17 +1061,18 @@ where
|
||||
// Enable the peripheral as the last step as recommended in the
|
||||
// programmers guide
|
||||
spi.ctrl1().modify(|_, w| w.enable().set_bit());
|
||||
Ok(Spi {
|
||||
Spi {
|
||||
inner: SpiBase {
|
||||
spi,
|
||||
cfg: spi_cfg,
|
||||
apb1_clk,
|
||||
apb1_clk: clocks.apb1(),
|
||||
fill_word: Default::default(),
|
||||
blockmode: init_blockmode,
|
||||
bmstall,
|
||||
blockmode,
|
||||
word: PhantomData,
|
||||
},
|
||||
pins,
|
||||
})
|
||||
}
|
||||
}
|
||||
|
||||
delegate::delegate! {
|
||||
@ -872,7 +1084,7 @@ where
|
||||
pub fn cfg_clock_from_div(&mut self, div: u16) -> Result<(), SpiClkConfigError>;
|
||||
|
||||
#[inline]
|
||||
pub fn spi_instance(&self) -> &SpiI;
|
||||
pub fn spi(&self) -> &SpiI;
|
||||
|
||||
#[inline]
|
||||
pub fn cfg_mode(&mut self, mode: Mode);
|
||||
@ -906,135 +1118,23 @@ where
|
||||
}
|
||||
}
|
||||
|
||||
/// Changing the word size also requires a type conversion
|
||||
impl<SpiI: Instance, Sck: PinSck<SpiI>, Miso: PinMiso<SpiI>, Mosi: PinMosi<SpiI>>
|
||||
From<Spi<SpiI, (Sck, Miso, Mosi), u8>> for Spi<SpiI, (Sck, Miso, Mosi), u16>
|
||||
{
|
||||
fn from(old_spi: Spi<SpiI, (Sck, Miso, Mosi), u8>) -> Self {
|
||||
old_spi
|
||||
.inner
|
||||
.spi
|
||||
.ctrl0()
|
||||
.modify(|_, w| unsafe { w.size().bits(WordSize::SixteenBits as u8) });
|
||||
Spi {
|
||||
inner: SpiBase {
|
||||
spi: old_spi.inner.spi,
|
||||
cfg: old_spi.inner.cfg,
|
||||
blockmode: old_spi.inner.blockmode,
|
||||
fill_word: Default::default(),
|
||||
apb1_clk: old_spi.inner.apb1_clk,
|
||||
word: PhantomData,
|
||||
},
|
||||
pins: old_spi.pins,
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/// Changing the word size also requires a type conversion
|
||||
impl<SpiI: Instance, Sck: PinSck<SpiI>, Miso: PinMiso<SpiI>, Mosi: PinMosi<SpiI>>
|
||||
From<Spi<SpiI, (Sck, Miso, Mosi), u16>> for Spi<SpiI, (Sck, Miso, Mosi), u8>
|
||||
{
|
||||
fn from(old_spi: Spi<SpiI, (Sck, Miso, Mosi), u16>) -> Self {
|
||||
old_spi
|
||||
.inner
|
||||
.spi
|
||||
.ctrl0()
|
||||
.modify(|_, w| unsafe { w.size().bits(WordSize::EightBits as u8) });
|
||||
Spi {
|
||||
inner: SpiBase {
|
||||
spi: old_spi.inner.spi,
|
||||
cfg: old_spi.inner.cfg,
|
||||
blockmode: old_spi.inner.blockmode,
|
||||
apb1_clk: old_spi.inner.apb1_clk,
|
||||
fill_word: Default::default(),
|
||||
word: PhantomData,
|
||||
},
|
||||
pins: old_spi.pins,
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
impl<SpiI: Instance, Word: WordProvider> embedded_hal::spi::ErrorType for SpiBase<SpiI, Word> {
|
||||
type Error = Infallible;
|
||||
}
|
||||
|
||||
impl<SpiI: Instance, Word: WordProvider> embedded_hal::spi::SpiBus<Word> for SpiBase<SpiI, Word>
|
||||
impl<
|
||||
SpiI: Instance,
|
||||
Sck: PinSck<SpiI>,
|
||||
Miso: PinMiso<SpiI>,
|
||||
Mosi: PinMosi<SpiI>,
|
||||
Word: WordProvider,
|
||||
> SpiLowLevel for Spi<SpiI, (Sck, Miso, Mosi), Word>
|
||||
where
|
||||
<Word as TryFrom<u32>>::Error: core::fmt::Debug,
|
||||
{
|
||||
fn read(&mut self, words: &mut [Word]) -> Result<(), Self::Error> {
|
||||
self.transfer_preparation(words)?;
|
||||
let mut current_read_idx = 0;
|
||||
let mut current_write_idx = self.initial_send_fifo_pumping_with_fill_words(words.len());
|
||||
loop {
|
||||
if current_write_idx < words.len() {
|
||||
self.send_blocking(self.fill_word);
|
||||
current_write_idx += 1;
|
||||
}
|
||||
if current_read_idx < words.len() {
|
||||
words[current_read_idx] = self.read_blocking();
|
||||
current_read_idx += 1;
|
||||
}
|
||||
if current_read_idx >= words.len() && current_write_idx >= words.len() {
|
||||
break;
|
||||
}
|
||||
delegate::delegate! {
|
||||
to self.inner {
|
||||
fn write_fifo(&self, data: u32) -> nb::Result<(), Infallible>;
|
||||
fn write_fifo_unchecked(&self, data: u32);
|
||||
fn read_fifo(&self) -> nb::Result<u32, Infallible>;
|
||||
fn read_fifo_unchecked(&self) -> u32;
|
||||
}
|
||||
Ok(())
|
||||
}
|
||||
|
||||
fn write(&mut self, words: &[Word]) -> Result<(), Self::Error> {
|
||||
self.transfer_preparation(words)?;
|
||||
let mut current_write_idx = self.initial_send_fifo_pumping_with_words(words);
|
||||
while current_write_idx < words.len() {
|
||||
self.send_blocking(words[current_write_idx]);
|
||||
current_write_idx += 1;
|
||||
// Ignore received words.
|
||||
if self.spi.status().read().rne().bit_is_set() {
|
||||
self.clear_rx_fifo();
|
||||
}
|
||||
}
|
||||
Ok(())
|
||||
}
|
||||
|
||||
fn transfer(&mut self, read: &mut [Word], write: &[Word]) -> Result<(), Self::Error> {
|
||||
self.transfer_preparation(write)?;
|
||||
let mut current_read_idx = 0;
|
||||
let mut current_write_idx = self.initial_send_fifo_pumping_with_words(write);
|
||||
while current_read_idx < read.len() || current_write_idx < write.len() {
|
||||
if current_write_idx < write.len() {
|
||||
self.send_blocking(write[current_write_idx]);
|
||||
current_write_idx += 1;
|
||||
}
|
||||
if current_read_idx < read.len() {
|
||||
read[current_read_idx] = self.read_blocking();
|
||||
current_read_idx += 1;
|
||||
}
|
||||
}
|
||||
|
||||
Ok(())
|
||||
}
|
||||
|
||||
fn transfer_in_place(&mut self, words: &mut [Word]) -> Result<(), Self::Error> {
|
||||
self.transfer_preparation(words)?;
|
||||
let mut current_read_idx = 0;
|
||||
let mut current_write_idx = self.initial_send_fifo_pumping_with_words(words);
|
||||
|
||||
while current_read_idx < words.len() || current_write_idx < words.len() {
|
||||
if current_write_idx < words.len() {
|
||||
self.send_blocking(words[current_write_idx]);
|
||||
current_write_idx += 1;
|
||||
}
|
||||
if current_read_idx < words.len() && current_read_idx < current_write_idx {
|
||||
words[current_read_idx] = self.read_blocking();
|
||||
current_read_idx += 1;
|
||||
}
|
||||
}
|
||||
Ok(())
|
||||
}
|
||||
|
||||
fn flush(&mut self) -> Result<(), Self::Error> {
|
||||
self.flush_internal();
|
||||
Ok(())
|
||||
}
|
||||
}
|
||||
|
||||
@ -1069,3 +1169,53 @@ where
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/// Changing the word size also requires a type conversion
|
||||
impl<SpiI: Instance, Sck: PinSck<SpiI>, Miso: PinMiso<SpiI>, Mosi: PinMosi<SpiI>>
|
||||
From<Spi<SpiI, (Sck, Miso, Mosi), u8>> for Spi<SpiI, (Sck, Miso, Mosi), u16>
|
||||
{
|
||||
fn from(old_spi: Spi<SpiI, (Sck, Miso, Mosi), u8>) -> Self {
|
||||
old_spi
|
||||
.inner
|
||||
.spi
|
||||
.ctrl0()
|
||||
.modify(|_, w| unsafe { w.size().bits(WordSize::SixteenBits as u8) });
|
||||
Spi {
|
||||
inner: SpiBase {
|
||||
spi: old_spi.inner.spi,
|
||||
cfg: old_spi.inner.cfg,
|
||||
blockmode: old_spi.inner.blockmode,
|
||||
bmstall: old_spi.inner.bmstall,
|
||||
fill_word: Default::default(),
|
||||
apb1_clk: old_spi.inner.apb1_clk,
|
||||
word: PhantomData,
|
||||
},
|
||||
pins: old_spi.pins,
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/// Changing the word size also requires a type conversion
|
||||
impl<SpiI: Instance, Sck: PinSck<SpiI>, Miso: PinMiso<SpiI>, Mosi: PinMosi<SpiI>>
|
||||
From<Spi<SpiI, (Sck, Miso, Mosi), u16>> for Spi<SpiI, (Sck, Miso, Mosi), u8>
|
||||
{
|
||||
fn from(old_spi: Spi<SpiI, (Sck, Miso, Mosi), u16>) -> Self {
|
||||
old_spi
|
||||
.inner
|
||||
.spi
|
||||
.ctrl0()
|
||||
.modify(|_, w| unsafe { w.size().bits(WordSize::EightBits as u8) });
|
||||
Spi {
|
||||
inner: SpiBase {
|
||||
spi: old_spi.inner.spi,
|
||||
cfg: old_spi.inner.cfg,
|
||||
blockmode: old_spi.inner.blockmode,
|
||||
bmstall: old_spi.inner.bmstall,
|
||||
apb1_clk: old_spi.inner.apb1_clk,
|
||||
fill_word: Default::default(),
|
||||
word: PhantomData,
|
||||
},
|
||||
pins: old_spi.pins,
|
||||
}
|
||||
}
|
||||
}
|
||||
|
Loading…
x
Reference in New Issue
Block a user