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10 Commits
va416xx-ha
...
677c6fa033
Author | SHA1 | Date | |
---|---|---|---|
677c6fa033 | |||
a50f7a947a | |||
abede6057e | |||
e04f4336cc | |||
aae870c767 | |||
3e67749452 | |||
5eb38f9c2a
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|||
5b336a2b41 | |||
051042ad1b | |||
aa1ed2a20d |
@ -41,4 +41,4 @@ debug-assertions = false # <-
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lto = true
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lto = true
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opt-level = 'z' # <-
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opt-level = 'z' # <-
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overflow-checks = false # <-
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overflow-checks = false # <-
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# strip = true # Automatically strip symbols from the binary.
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strip = true # Automatically strip symbols from the binary.
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@ -99,9 +99,9 @@ example.
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### Using VS Code
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### Using VS Code
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Assuming a working debug connection to your VA108xx board, you can debug using VS Code with
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Assuming a working debug connection to your VA416xx board, you can debug using VS Code with
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the [`Cortex-Debug` plugin](https://marketplace.visualstudio.com/items?itemName=marus25.cortex-debug). Please make sure that
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the [`Cortex-Debug` plugin](https://marketplace.visualstudio.com/items?itemName=marus25.cortex-debug).
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[`objdump-multiarch` and `nm-multiarch`](https://forums.raspberrypi.com/viewtopic.php?t=333146)
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Please make sure that [`objdump-multiarch` and `nm-multiarch`](https://forums.raspberrypi.com/viewtopic.php?t=333146)
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are installed as well.
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are installed as well.
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Some sample configuration files for VS code were provided and can be used by running
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Some sample configuration files for VS code were provided and can be used by running
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@ -8,8 +8,15 @@ cortex-m = "0.7"
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cortex-m-rt = "0.7"
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cortex-m-rt = "0.7"
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embedded-hal = "1"
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embedded-hal = "1"
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panic-rtt-target = { version = "0.1.3" }
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panic-rtt-target = { version = "0.1.3" }
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panic-halt = { version = "0.2" }
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rtt-target = { version = "0.5" }
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rtt-target = { version = "0.5" }
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crc = "3"
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crc = "3"
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static_assertions = "1"
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[dependencies.va416xx-hal]
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[dependencies.va416xx-hal]
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path = "../va416xx-hal"
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path = "../va416xx-hal"
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features = ["va41630"]
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[features]
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default = []
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rtt-panic = []
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@ -12,11 +12,11 @@ The bootloader uses the following memory map:
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| 0x0 | Bootloader start | code up to 0x3FFC bytes |
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| 0x0 | Bootloader start | code up to 0x3FFC bytes |
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| 0x3FFC | Bootloader CRC | word |
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| 0x3FFC | Bootloader CRC | word |
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| 0x4000 | App image A start | code up to 0x1DFFC (~120K) bytes |
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| 0x4000 | App image A start | code up to 0x1DFFC (~120K) bytes |
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| 0x21FFC | App image A CRC check length | word |
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| 0x21FF8 | App image A CRC check length | word |
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| 0x21FFE | App image A CRC check value | word |
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| 0x21FFC | App image A CRC check value | word |
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| 0x22000 | App image B start | code up to 0x1DFFC (~120K) bytes |
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| 0x22000 | App image B start | code up to 0x1DFFC (~120K) bytes |
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| 0x3FFFC | App image B CRC check length | word |
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| 0x3FFF8 | App image B CRC check length | word |
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| 0x3FFFE | App image B CRC check value | word |
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| 0x3FFFC | App image B CRC check value | word |
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| 0x40000 | End of NVM | end |
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| 0x40000 | End of NVM | end |
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## Additional Information
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## Additional Information
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@ -1,17 +1,5 @@
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//! Vorago bootloader which can boot from two images.
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//! Vorago bootloader which can boot from two images.
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//!
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//!
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//! Bootloader memory map
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//!
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//! * <0x0> Bootloader start <code up to 0x3FFE bytes>
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//! * <0x3FFE> Bootloader CRC <halfword>
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//! * <0x4000> App image A start <code up to 0x1DFFC (~120K) bytes>
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//! * <0x21FFC> App image A CRC check length <halfword>
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//! * <0x21FFE> App image A CRC check value <halfword>
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//! * <0x22000> App image B start <code up to 0x1DFFC (~120K) bytes>
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//! * <0x3FFFC> App image B CRC check length <halfword>
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//! * <0x3FFFE> App image B CRC check value <halfword>
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//! * <0x40000> <end>
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//!
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//! As opposed to the Vorago example code, this bootloader assumes a 40 MHz external clock
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//! As opposed to the Vorago example code, this bootloader assumes a 40 MHz external clock
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//! but does not scale that clock up.
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//! but does not scale that clock up.
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#![no_main]
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#![no_main]
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@ -19,6 +7,9 @@
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use cortex_m_rt::entry;
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use cortex_m_rt::entry;
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use crc::{Crc, CRC_32_ISO_HDLC};
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use crc::{Crc, CRC_32_ISO_HDLC};
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#[cfg(not(feature = "rtt-panic"))]
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use panic_halt as _;
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#[cfg(feature = "rtt-panic")]
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use panic_rtt_target as _;
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use panic_rtt_target as _;
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use rtt_target::{rprintln, rtt_init_print};
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use rtt_target::{rprintln, rtt_init_print};
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use va416xx_hal::{
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use va416xx_hal::{
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@ -42,23 +33,42 @@ const DEBUG_PRINTOUTS: bool = true;
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// self-flash itself. It is recommended that you use a tool like probe-rs, Keil IDE, or a flash
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// self-flash itself. It is recommended that you use a tool like probe-rs, Keil IDE, or a flash
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// loader to boot a bootloader without this feature.
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// loader to boot a bootloader without this feature.
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const FLASH_SELF: bool = false;
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const FLASH_SELF: bool = false;
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// Useful for debugging and see what the bootloader is doing. Enabled currently, because
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// the binary stays small enough.
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const RTT_PRINTOUT: bool = true;
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// Important bootloader addresses and offsets, vector table information.
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// Important bootloader addresses and offsets, vector table information.
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const NVM_SIZE: u32 = 0x40000;
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const BOOTLOADER_START_ADDR: u32 = 0x0;
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const BOOTLOADER_START_ADDR: u32 = 0x0;
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const BOOTLOADER_CRC_ADDR: u32 = BOOTLOADER_END_ADDR - 4;
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const BOOTLOADER_END_ADDR: u32 = 0x4000;
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const BOOTLOADER_END_ADDR: u32 = 0x4000;
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const BOOTLOADER_CRC_ADDR: u32 = 0x3FFC;
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const APP_A_START_ADDR: u32 = 0x4000;
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// 0x4000
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pub const APP_A_END_ADDR: u32 = 0x22000;
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const APP_A_START_ADDR: u32 = BOOTLOADER_END_ADDR;
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// The actual size of the image which is relevant for CRC calculation.
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// The actual size of the image which is relevant for CRC calculation will be store at this
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const APP_A_SIZE_ADDR: u32 = 0x21FF8;
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// address.
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const APP_A_CRC_ADDR: u32 = 0x21FFC;
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// 0x21FF8
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const APP_B_START_ADDR: u32 = 0x22000;
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const APP_A_SIZE_ADDR: u32 = APP_B_END_ADDR - 8;
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pub const APP_B_END_ADDR: u32 = 0x40000;
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// 0x21FFC
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// The actual size of the image which is relevant for CRC calculation.
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const APP_A_CRC_ADDR: u32 = APP_B_END_ADDR - 4;
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const APP_B_SIZE_ADDR: u32 = 0x3FFF8;
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pub const APP_A_END_ADDR: u32 = APP_B_END_ADDR - BOOTLOADER_END_ADDR / 2;
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const APP_B_CRC_ADDR: u32 = 0x3FFFC;
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pub const APP_IMG_SZ: u32 = 0x1E000;
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// 0x22000
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const APP_B_START_ADDR: u32 = APP_A_END_ADDR;
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// The actual size of the image which is relevant for CRC calculation will be stored at this
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// address.
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// 0x3FFF8
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const APP_B_SIZE_ADDR: u32 = APP_B_END_ADDR - 8;
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// 0x3FFFC
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const APP_B_CRC_ADDR: u32 = APP_B_END_ADDR - 4;
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// 0x40000
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pub const APP_B_END_ADDR: u32 = NVM_SIZE;
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pub const APP_IMG_SZ: u32 = APP_B_END_ADDR - APP_A_START_ADDR / 2;
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static_assertions::const_assert!((APP_B_END_ADDR - BOOTLOADER_END_ADDR) % 2 == 0);
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pub const VECTOR_TABLE_OFFSET: u32 = 0x0;
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pub const VECTOR_TABLE_OFFSET: u32 = 0x0;
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pub const VECTOR_TABLE_LEN: u32 = 0x350;
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pub const VECTOR_TABLE_LEN: u32 = 0x350;
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@ -88,8 +98,10 @@ impl WdtInterface for OptWdt {
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#[entry]
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#[entry]
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fn main() -> ! {
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fn main() -> ! {
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rtt_init_print!();
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if RTT_PRINTOUT {
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rprintln!("-- VA416xx bootloader --");
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rtt_init_print!();
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rprintln!("-- VA416xx bootloader --");
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}
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let mut dp = pac::Peripherals::take().unwrap();
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let mut dp = pac::Peripherals::take().unwrap();
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let cp = cortex_m::Peripherals::take().unwrap();
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let cp = cortex_m::Peripherals::take().unwrap();
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// Disable ROM protection.
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// Disable ROM protection.
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@ -133,18 +145,24 @@ fn main() -> ! {
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nvm.write_data(0x0, &first_four_bytes);
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nvm.write_data(0x0, &first_four_bytes);
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nvm.write_data(0x4, bootloader_data);
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nvm.write_data(0x4, bootloader_data);
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if let Err(e) = nvm.verify_data(0x0, &first_four_bytes) {
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if let Err(e) = nvm.verify_data(0x0, &first_four_bytes) {
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rprintln!("verification of self-flash to NVM failed: {:?}", e);
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if RTT_PRINTOUT {
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rprintln!("verification of self-flash to NVM failed: {:?}", e);
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}
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}
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}
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if let Err(e) = nvm.verify_data(0x4, bootloader_data) {
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if let Err(e) = nvm.verify_data(0x4, bootloader_data) {
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rprintln!("verification of self-flash to NVM failed: {:?}", e);
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if RTT_PRINTOUT {
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rprintln!("verification of self-flash to NVM failed: {:?}", e);
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}
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}
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}
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nvm.write_data(BOOTLOADER_CRC_ADDR, &bootloader_crc.to_be_bytes());
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nvm.write_data(BOOTLOADER_CRC_ADDR, &bootloader_crc.to_be_bytes());
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if let Err(e) = nvm.verify_data(BOOTLOADER_CRC_ADDR, &bootloader_crc.to_be_bytes()) {
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if let Err(e) = nvm.verify_data(BOOTLOADER_CRC_ADDR, &bootloader_crc.to_be_bytes()) {
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rprintln!(
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if RTT_PRINTOUT {
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"error: CRC verification for bootloader self-flash failed: {:?}",
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rprintln!(
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e
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"error: CRC verification for bootloader self-flash failed: {:?}",
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);
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e
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);
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}
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}
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}
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}
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}
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@ -156,7 +174,7 @@ fn main() -> ! {
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} else if check_app_crc(AppSel::B, &opt_wdt) {
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} else if check_app_crc(AppSel::B, &opt_wdt) {
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boot_app(AppSel::B, &cp)
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boot_app(AppSel::B, &cp)
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} else {
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} else {
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if DEBUG_PRINTOUTS {
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if DEBUG_PRINTOUTS && RTT_PRINTOUT {
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rprintln!("both images corrupt! booting image A");
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rprintln!("both images corrupt! booting image A");
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}
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}
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// TODO: Shift a CCSDS packet out to inform host/OBC about image corruption.
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// TODO: Shift a CCSDS packet out to inform host/OBC about image corruption.
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@ -184,7 +202,7 @@ fn check_own_crc(wdt: &OptWdt, nvm: &Nvm, cp: &cortex_m::Peripherals) {
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let crc_calc = digest.finalize();
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let crc_calc = digest.finalize();
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wdt.feed();
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wdt.feed();
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if crc_exp == 0x0000 || crc_exp == 0xffff {
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if crc_exp == 0x0000 || crc_exp == 0xffff {
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if DEBUG_PRINTOUTS {
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if DEBUG_PRINTOUTS && RTT_PRINTOUT {
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rprintln!("BL CRC blank - prog new CRC");
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rprintln!("BL CRC blank - prog new CRC");
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}
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}
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// Blank CRC, write it to NVM.
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// Blank CRC, write it to NVM.
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@ -194,7 +212,7 @@ fn check_own_crc(wdt: &OptWdt, nvm: &Nvm, cp: &cortex_m::Peripherals) {
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// cortex_m::peripheral::SCB::sys_reset();
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// cortex_m::peripheral::SCB::sys_reset();
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} else if crc_exp != crc_calc {
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} else if crc_exp != crc_calc {
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// Bootloader is corrupted. Try to run App A.
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// Bootloader is corrupted. Try to run App A.
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if DEBUG_PRINTOUTS {
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if DEBUG_PRINTOUTS && RTT_PRINTOUT {
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rprintln!(
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rprintln!(
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"bootloader CRC corrupt, read {} and expected {}. booting image A immediately",
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"bootloader CRC corrupt, read {} and expected {}. booting image A immediately",
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crc_calc,
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crc_calc,
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@ -217,7 +235,7 @@ fn read_four_bytes_at_addr_zero(buf: &mut [u8; 4]) {
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}
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}
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}
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}
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fn check_app_crc(app_sel: AppSel, wdt: &OptWdt) -> bool {
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fn check_app_crc(app_sel: AppSel, wdt: &OptWdt) -> bool {
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if DEBUG_PRINTOUTS {
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if DEBUG_PRINTOUTS && RTT_PRINTOUT {
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rprintln!("Checking image {:?}", app_sel);
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rprintln!("Checking image {:?}", app_sel);
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}
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}
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if app_sel == AppSel::A {
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if app_sel == AppSel::A {
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@ -237,7 +255,9 @@ fn check_app_given_addr(
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let image_size = unsafe { (image_size_addr as *const u32).read_unaligned().to_be() };
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let image_size = unsafe { (image_size_addr as *const u32).read_unaligned().to_be() };
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// Sanity check.
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// Sanity check.
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if image_size > APP_A_END_ADDR - APP_A_START_ADDR - 8 {
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if image_size > APP_A_END_ADDR - APP_A_START_ADDR - 8 {
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rprintln!("detected invalid app size {}", image_size);
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if RTT_PRINTOUT {
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rprintln!("detected invalid app size {}", image_size);
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}
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return false;
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return false;
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}
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}
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wdt.feed();
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wdt.feed();
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@ -252,7 +272,7 @@ fn check_app_given_addr(
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}
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}
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fn boot_app(app_sel: AppSel, cp: &cortex_m::Peripherals) -> ! {
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fn boot_app(app_sel: AppSel, cp: &cortex_m::Peripherals) -> ! {
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if DEBUG_PRINTOUTS {
|
if DEBUG_PRINTOUTS && RTT_PRINTOUT {
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rprintln!("booting app {:?}", app_sel);
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rprintln!("booting app {:?}", app_sel);
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}
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}
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let clkgen = unsafe { pac::Clkgen::steal() };
|
let clkgen = unsafe { pac::Clkgen::steal() };
|
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@ -7,6 +7,7 @@ edition = "2021"
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cortex-m = { version = "0.7", features = ["critical-section-single-core"] }
|
cortex-m = { version = "0.7", features = ["critical-section-single-core"] }
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cortex-m-rt = "0.7"
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cortex-m-rt = "0.7"
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embedded-hal = "1"
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embedded-hal = "1"
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embedded-io = "0.6"
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|
|
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rtt-target = { version = "0.5" }
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rtt-target = { version = "0.5" }
|
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panic-rtt-target = { version = "0.1" }
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panic-rtt-target = { version = "0.1" }
|
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@ -16,6 +17,10 @@ embassy-sync = { version = "0.6.0" }
|
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embassy-time = { version = "0.3.2" }
|
embassy-time = { version = "0.3.2" }
|
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embassy-time-driver = { version = "0.1" }
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embassy-time-driver = { version = "0.1" }
|
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|
|
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|
[dependencies.ringbuf]
|
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|
version = "0.4"
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default-features = false
|
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|
|
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[dependencies.once_cell]
|
[dependencies.once_cell]
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version = "1"
|
version = "1"
|
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default-features = false
|
default-features = false
|
||||||
|
161
examples/embassy/src/bin/uart-echo-with-irq.rs
Normal file
161
examples/embassy/src/bin/uart-echo-with-irq.rs
Normal file
@ -0,0 +1,161 @@
|
|||||||
|
//! This is an example of using the UART HAL abstraction with the IRQ support and embassy.
|
||||||
|
//!
|
||||||
|
//! It uses the UART0 for communication with another MCU or a host computer (recommended).
|
||||||
|
//! You can connect a USB-to-Serial converter to the UART0 pins and then use a serial terminal
|
||||||
|
//! application like picocom to send data to the microcontroller, which should be echoed
|
||||||
|
//! back to the sender.
|
||||||
|
//!
|
||||||
|
//! This application uses the interrupt support of the VA416xx to read the data arriving
|
||||||
|
//! on the UART without requiring polling.
|
||||||
|
#![no_std]
|
||||||
|
#![no_main]
|
||||||
|
use core::cell::RefCell;
|
||||||
|
|
||||||
|
use embassy_example::EXTCLK_FREQ;
|
||||||
|
use embassy_executor::Spawner;
|
||||||
|
use embassy_sync::blocking_mutex::raw::CriticalSectionRawMutex;
|
||||||
|
use embassy_sync::blocking_mutex::Mutex;
|
||||||
|
use embassy_time::{Duration, Ticker};
|
||||||
|
use embedded_hal::digital::StatefulOutputPin;
|
||||||
|
use embedded_io::Write;
|
||||||
|
use panic_rtt_target as _;
|
||||||
|
use ringbuf::{
|
||||||
|
traits::{Consumer, Observer, Producer},
|
||||||
|
StaticRb,
|
||||||
|
};
|
||||||
|
use rtt_target::{rprintln, rtt_init_print};
|
||||||
|
use va416xx_hal::{
|
||||||
|
gpio::{OutputReadablePushPull, Pin, PinsG, PG5},
|
||||||
|
pac::{self, interrupt},
|
||||||
|
prelude::*,
|
||||||
|
time::Hertz,
|
||||||
|
uart,
|
||||||
|
};
|
||||||
|
|
||||||
|
pub type SharedUart = Mutex<CriticalSectionRawMutex, RefCell<Option<uart::RxWithIrq<pac::Uart0>>>>;
|
||||||
|
static RX: SharedUart = Mutex::new(RefCell::new(None));
|
||||||
|
|
||||||
|
const BAUDRATE: u32 = 115200;
|
||||||
|
|
||||||
|
// Ring buffer size.
|
||||||
|
const RING_BUF_SIZE: usize = 2048;
|
||||||
|
|
||||||
|
pub type SharedRingBuf =
|
||||||
|
Mutex<CriticalSectionRawMutex, RefCell<Option<StaticRb<u8, RING_BUF_SIZE>>>>;
|
||||||
|
// Ring buffers to handling variable sized telemetry
|
||||||
|
static RINGBUF: SharedRingBuf = Mutex::new(RefCell::new(None));
|
||||||
|
|
||||||
|
// See https://embassy.dev/book/#_sharing_using_a_mutex for background information about sharing
|
||||||
|
// a peripheral with embassy.
|
||||||
|
#[embassy_executor::main]
|
||||||
|
async fn main(spawner: Spawner) {
|
||||||
|
rtt_init_print!();
|
||||||
|
rprintln!("VA416xx UART-Embassy Example");
|
||||||
|
|
||||||
|
let mut dp = pac::Peripherals::take().unwrap();
|
||||||
|
|
||||||
|
// Initialize the systick interrupt & obtain the token to prove that we did
|
||||||
|
// Use the external clock connected to XTAL_N.
|
||||||
|
let clocks = dp
|
||||||
|
.clkgen
|
||||||
|
.constrain()
|
||||||
|
.xtal_n_clk_with_src_freq(Hertz::from_raw(EXTCLK_FREQ))
|
||||||
|
.freeze(&mut dp.sysconfig)
|
||||||
|
.unwrap();
|
||||||
|
// Safety: Only called once here.
|
||||||
|
unsafe {
|
||||||
|
embassy_example::init(
|
||||||
|
&mut dp.sysconfig,
|
||||||
|
&dp.irq_router,
|
||||||
|
dp.tim15,
|
||||||
|
dp.tim14,
|
||||||
|
&clocks,
|
||||||
|
)
|
||||||
|
};
|
||||||
|
|
||||||
|
let portg = PinsG::new(&mut dp.sysconfig, dp.portg);
|
||||||
|
|
||||||
|
let tx = portg.pg0.into_funsel_1();
|
||||||
|
let rx = portg.pg1.into_funsel_1();
|
||||||
|
|
||||||
|
let uart0 = uart::Uart::new(
|
||||||
|
dp.uart0,
|
||||||
|
(tx, rx),
|
||||||
|
Hertz::from_raw(BAUDRATE),
|
||||||
|
&mut dp.sysconfig,
|
||||||
|
&clocks,
|
||||||
|
);
|
||||||
|
let (mut tx, rx) = uart0.split();
|
||||||
|
let mut rx = rx.to_rx_with_irq();
|
||||||
|
rx.start();
|
||||||
|
RX.lock(|static_rx| {
|
||||||
|
static_rx.borrow_mut().replace(rx);
|
||||||
|
});
|
||||||
|
RINGBUF.lock(|static_rb| {
|
||||||
|
static_rb.borrow_mut().replace(StaticRb::default());
|
||||||
|
});
|
||||||
|
|
||||||
|
let led = portg.pg5.into_readable_push_pull_output();
|
||||||
|
let mut ticker = Ticker::every(Duration::from_millis(50));
|
||||||
|
let mut processing_buf: [u8; RING_BUF_SIZE] = [0; RING_BUF_SIZE];
|
||||||
|
let mut read_bytes = 0;
|
||||||
|
spawner.spawn(blinky(led)).expect("failed to spawn blinky");
|
||||||
|
loop {
|
||||||
|
RINGBUF.lock(|static_rb| {
|
||||||
|
let mut rb_borrow = static_rb.borrow_mut();
|
||||||
|
let rb_mut = rb_borrow.as_mut().unwrap();
|
||||||
|
read_bytes = rb_mut.occupied_len();
|
||||||
|
rb_mut.pop_slice(&mut processing_buf[0..read_bytes]);
|
||||||
|
});
|
||||||
|
// Simply send back all received data.
|
||||||
|
tx.write_all(&processing_buf[0..read_bytes])
|
||||||
|
.expect("sending back read data failed");
|
||||||
|
ticker.next().await;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
#[embassy_executor::task]
|
||||||
|
async fn blinky(mut led: Pin<PG5, OutputReadablePushPull>) {
|
||||||
|
let mut ticker = Ticker::every(Duration::from_millis(500));
|
||||||
|
loop {
|
||||||
|
led.toggle().ok();
|
||||||
|
ticker.next().await;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
#[interrupt]
|
||||||
|
#[allow(non_snake_case)]
|
||||||
|
fn UART0_RX() {
|
||||||
|
let mut buf: [u8; 16] = [0; 16];
|
||||||
|
let mut read_len: usize = 0;
|
||||||
|
let mut errors = None;
|
||||||
|
RX.lock(|static_rx| {
|
||||||
|
let mut rx_borrow = static_rx.borrow_mut();
|
||||||
|
let rx_mut_ref = rx_borrow.as_mut().unwrap();
|
||||||
|
let result = rx_mut_ref.irq_handler(&mut buf);
|
||||||
|
read_len = result.bytes_read;
|
||||||
|
if result.errors.is_some() {
|
||||||
|
errors = result.errors;
|
||||||
|
}
|
||||||
|
});
|
||||||
|
let mut ringbuf_full = false;
|
||||||
|
if read_len > 0 {
|
||||||
|
// Send the received buffer to the main thread for processing via a ring buffer.
|
||||||
|
RINGBUF.lock(|static_rb| {
|
||||||
|
let mut rb_borrow = static_rb.borrow_mut();
|
||||||
|
let rb_mut_ref = rb_borrow.as_mut().unwrap();
|
||||||
|
if rb_mut_ref.vacant_len() < read_len {
|
||||||
|
ringbuf_full = true;
|
||||||
|
for _ in rb_mut_ref.pop_iter() {}
|
||||||
|
}
|
||||||
|
rb_mut_ref.push_slice(&buf[0..read_len]);
|
||||||
|
});
|
||||||
|
}
|
||||||
|
|
||||||
|
if errors.is_some() {
|
||||||
|
rprintln!("UART error: {:?}", errors);
|
||||||
|
}
|
||||||
|
if ringbuf_full {
|
||||||
|
rprintln!("ringbuffer is full, deleted oldest data");
|
||||||
|
}
|
||||||
|
}
|
@ -1,4 +1,6 @@
|
|||||||
#![no_std]
|
#![no_std]
|
||||||
pub mod time_driver;
|
pub mod time_driver;
|
||||||
|
|
||||||
|
pub const EXTCLK_FREQ: u32 = 40_000_000;
|
||||||
|
|
||||||
pub use time_driver::init;
|
pub use time_driver::init;
|
||||||
|
@ -1,5 +1,6 @@
|
|||||||
#![no_std]
|
#![no_std]
|
||||||
#![no_main]
|
#![no_main]
|
||||||
|
use embassy_example::EXTCLK_FREQ;
|
||||||
use embassy_executor::Spawner;
|
use embassy_executor::Spawner;
|
||||||
use embassy_time::{Duration, Instant, Ticker};
|
use embassy_time::{Duration, Instant, Ticker};
|
||||||
use embedded_hal::digital::StatefulOutputPin;
|
use embedded_hal::digital::StatefulOutputPin;
|
||||||
@ -7,8 +8,6 @@ use panic_rtt_target as _;
|
|||||||
use rtt_target::{rprintln, rtt_init_print};
|
use rtt_target::{rprintln, rtt_init_print};
|
||||||
use va416xx_hal::{gpio::PinsG, pac, prelude::*, time::Hertz};
|
use va416xx_hal::{gpio::PinsG, pac, prelude::*, time::Hertz};
|
||||||
|
|
||||||
const EXTCLK_FREQ: u32 = 40_000_000;
|
|
||||||
|
|
||||||
// main is itself an async function.
|
// main is itself an async function.
|
||||||
#[embassy_executor::main]
|
#[embassy_executor::main]
|
||||||
async fn main(_spawner: Spawner) {
|
async fn main(_spawner: Spawner) {
|
||||||
|
@ -17,7 +17,7 @@ use va416xx_hal::{
|
|||||||
enable_interrupt,
|
enable_interrupt,
|
||||||
irq_router::enable_and_init_irq_router,
|
irq_router::enable_and_init_irq_router,
|
||||||
pac::{self, interrupt},
|
pac::{self, interrupt},
|
||||||
pwm::{assert_tim_reset_for_two_cycles, enable_tim_clk, ValidTim},
|
timer::{assert_tim_reset_for_two_cycles, enable_tim_clk, ValidTim},
|
||||||
};
|
};
|
||||||
|
|
||||||
pub type TimekeeperClk = pac::Tim15;
|
pub type TimekeeperClk = pac::Tim15;
|
||||||
|
@ -2,8 +2,13 @@
|
|||||||
#![no_main]
|
#![no_main]
|
||||||
#![no_std]
|
#![no_std]
|
||||||
|
|
||||||
|
use va416xx_hal::time::Hertz;
|
||||||
|
|
||||||
|
const EXTCLK_FREQ: Hertz = Hertz::from_raw(40_000_000);
|
||||||
|
|
||||||
#[rtic::app(device = pac, dispatchers = [U1, U2, U3])]
|
#[rtic::app(device = pac, dispatchers = [U1, U2, U3])]
|
||||||
mod app {
|
mod app {
|
||||||
|
use super::*;
|
||||||
use cortex_m::asm;
|
use cortex_m::asm;
|
||||||
use embedded_hal::digital::StatefulOutputPin;
|
use embedded_hal::digital::StatefulOutputPin;
|
||||||
use panic_rtt_target as _;
|
use panic_rtt_target as _;
|
||||||
@ -13,6 +18,7 @@ mod app {
|
|||||||
use va416xx_hal::{
|
use va416xx_hal::{
|
||||||
gpio::{OutputReadablePushPull, Pin, PinsG, PG5},
|
gpio::{OutputReadablePushPull, Pin, PinsG, PG5},
|
||||||
pac,
|
pac,
|
||||||
|
prelude::*,
|
||||||
};
|
};
|
||||||
|
|
||||||
#[local]
|
#[local]
|
||||||
@ -23,14 +29,22 @@ mod app {
|
|||||||
#[shared]
|
#[shared]
|
||||||
struct Shared {}
|
struct Shared {}
|
||||||
|
|
||||||
rtic_monotonics::systick_monotonic!(Mono, 10_000);
|
rtic_monotonics::systick_monotonic!(Mono, 1_000);
|
||||||
|
|
||||||
#[init]
|
#[init]
|
||||||
fn init(_ctx: init::Context) -> (Shared, Local) {
|
fn init(mut cx: init::Context) -> (Shared, Local) {
|
||||||
rtt_init_default!();
|
rtt_init_default!();
|
||||||
rprintln!("-- Vorago RTIC template --");
|
rprintln!("-- Vorago RTIC example application --");
|
||||||
let mut dp = pac::Peripherals::take().unwrap();
|
// Use the external clock connected to XTAL_N.
|
||||||
let portg = PinsG::new(&mut dp.sysconfig, dp.portg);
|
let clocks = cx
|
||||||
|
.device
|
||||||
|
.clkgen
|
||||||
|
.constrain()
|
||||||
|
.xtal_n_clk_with_src_freq(EXTCLK_FREQ)
|
||||||
|
.freeze(&mut cx.device.sysconfig)
|
||||||
|
.unwrap();
|
||||||
|
Mono::start(cx.core.SYST, clocks.sysclk().raw());
|
||||||
|
let portg = PinsG::new(&mut cx.device.sysconfig, cx.device.portg);
|
||||||
let led = portg.pg5.into_readable_push_pull_output();
|
let led = portg.pg5.into_readable_push_pull_output();
|
||||||
blinky::spawn().ok();
|
blinky::spawn().ok();
|
||||||
(Shared {}, Local { led })
|
(Shared {}, Local { led })
|
||||||
|
@ -12,7 +12,7 @@ use rtt_target::{rprintln, rtt_init_print};
|
|||||||
use simple_examples::peb1;
|
use simple_examples::peb1;
|
||||||
use va416xx_hal::dma::{Dma, DmaCfg, DmaChannel, DmaCtrlBlock};
|
use va416xx_hal::dma::{Dma, DmaCfg, DmaChannel, DmaCtrlBlock};
|
||||||
use va416xx_hal::irq_router::enable_and_init_irq_router;
|
use va416xx_hal::irq_router::enable_and_init_irq_router;
|
||||||
use va416xx_hal::pwm::CountdownTimer;
|
use va416xx_hal::timer::CountdownTimer;
|
||||||
use va416xx_hal::{
|
use va416xx_hal::{
|
||||||
pac::{self, interrupt},
|
pac::{self, interrupt},
|
||||||
prelude::*,
|
prelude::*,
|
||||||
|
@ -11,7 +11,8 @@ use va416xx_hal::{
|
|||||||
gpio::PinsA,
|
gpio::PinsA,
|
||||||
pac,
|
pac,
|
||||||
prelude::*,
|
prelude::*,
|
||||||
pwm::{self, get_duty_from_percent, CountdownTimer, PwmA, PwmB, ReducedPwmPin},
|
pwm::{self, get_duty_from_percent, PwmA, PwmB, ReducedPwmPin},
|
||||||
|
timer::CountdownTimer,
|
||||||
};
|
};
|
||||||
|
|
||||||
#[entry]
|
#[entry]
|
||||||
|
@ -3,13 +3,12 @@
|
|||||||
//! If you do not use the loopback mode, MOSI and MISO need to be tied together on the board.
|
//! If you do not use the loopback mode, MOSI and MISO need to be tied together on the board.
|
||||||
#![no_main]
|
#![no_main]
|
||||||
#![no_std]
|
#![no_std]
|
||||||
|
|
||||||
use cortex_m_rt::entry;
|
use cortex_m_rt::entry;
|
||||||
use embedded_hal::spi::{Mode, SpiBus, MODE_0};
|
use embedded_hal::spi::{Mode, SpiBus, MODE_0};
|
||||||
use panic_rtt_target as _;
|
use panic_rtt_target as _;
|
||||||
use rtt_target::{rprintln, rtt_init_print};
|
use rtt_target::{rprintln, rtt_init_print};
|
||||||
use simple_examples::peb1;
|
use simple_examples::peb1;
|
||||||
use va416xx_hal::spi::{clk_div_for_target_clock, Spi, TransferConfig};
|
use va416xx_hal::spi::{Spi, SpiClkConfig};
|
||||||
use va416xx_hal::{
|
use va416xx_hal::{
|
||||||
gpio::{PinsB, PinsC},
|
gpio::{PinsB, PinsC},
|
||||||
pac,
|
pac,
|
||||||
@ -22,9 +21,8 @@ use va416xx_hal::{
|
|||||||
pub enum ExampleSelect {
|
pub enum ExampleSelect {
|
||||||
// Enter loopback mode. It is not necessary to tie MOSI/MISO together for this
|
// Enter loopback mode. It is not necessary to tie MOSI/MISO together for this
|
||||||
Loopback,
|
Loopback,
|
||||||
// Send a test buffer and print everything received. You need to tie together MOSI/MISO in this
|
// You need to tie together MOSI/MISO in this mode.
|
||||||
// mode.
|
MosiMisoTiedTogether,
|
||||||
TestBuffer,
|
|
||||||
}
|
}
|
||||||
|
|
||||||
const EXAMPLE_SEL: ExampleSelect = ExampleSelect::Loopback;
|
const EXAMPLE_SEL: ExampleSelect = ExampleSelect::Loopback;
|
||||||
@ -50,21 +48,23 @@ fn main() -> ! {
|
|||||||
|
|
||||||
let pins_b = PinsB::new(&mut dp.sysconfig, dp.portb);
|
let pins_b = PinsB::new(&mut dp.sysconfig, dp.portb);
|
||||||
let pins_c = PinsC::new(&mut dp.sysconfig, dp.portc);
|
let pins_c = PinsC::new(&mut dp.sysconfig, dp.portc);
|
||||||
// Configure SPI1 pins.
|
// Configure SPI0 pins.
|
||||||
let (sck, miso, mosi) = (
|
let (sck, miso, mosi) = (
|
||||||
pins_b.pb15.into_funsel_1(),
|
pins_b.pb15.into_funsel_1(),
|
||||||
pins_c.pc0.into_funsel_1(),
|
pins_c.pc0.into_funsel_1(),
|
||||||
pins_c.pc1.into_funsel_1(),
|
pins_c.pc1.into_funsel_1(),
|
||||||
);
|
);
|
||||||
|
|
||||||
let mut spi_cfg = SpiConfig::default().clk_div(
|
let mut spi_cfg = SpiConfig::default()
|
||||||
clk_div_for_target_clock(Hertz::from_raw(SPI_SPEED_KHZ), &clocks)
|
.clk_cfg(
|
||||||
.expect("invalid target clock"),
|
SpiClkConfig::from_clk(Hertz::from_raw(SPI_SPEED_KHZ), &clocks)
|
||||||
);
|
.expect("invalid target clock"),
|
||||||
|
)
|
||||||
|
.mode(SPI_MODE)
|
||||||
|
.blockmode(BLOCKMODE);
|
||||||
if EXAMPLE_SEL == ExampleSelect::Loopback {
|
if EXAMPLE_SEL == ExampleSelect::Loopback {
|
||||||
spi_cfg = spi_cfg.loopback(true)
|
spi_cfg = spi_cfg.loopback(true)
|
||||||
}
|
}
|
||||||
let transfer_cfg = TransferConfig::new_no_hw_cs(None, Some(SPI_MODE), BLOCKMODE, false);
|
|
||||||
// Create SPI peripheral.
|
// Create SPI peripheral.
|
||||||
let mut spi0 = Spi::new(
|
let mut spi0 = Spi::new(
|
||||||
&mut dp.sysconfig,
|
&mut dp.sysconfig,
|
||||||
@ -72,29 +72,27 @@ fn main() -> ! {
|
|||||||
dp.spi0,
|
dp.spi0,
|
||||||
(sck, miso, mosi),
|
(sck, miso, mosi),
|
||||||
spi_cfg,
|
spi_cfg,
|
||||||
Some(&transfer_cfg.downgrade()),
|
);
|
||||||
)
|
|
||||||
.expect("creating SPI peripheral failed");
|
|
||||||
spi0.set_fill_word(FILL_WORD);
|
spi0.set_fill_word(FILL_WORD);
|
||||||
loop {
|
loop {
|
||||||
let mut tx_buf: [u8; 3] = [1, 2, 3];
|
let tx_buf: [u8; 4] = [1, 2, 3, 0];
|
||||||
let mut rx_buf: [u8; 3] = [0; 3];
|
let mut rx_buf: [u8; 4] = [0; 4];
|
||||||
// Can't really verify correct reply here.
|
// Can't really verify correct behaviour here. Just verify nothing crazy happens or it hangs up.
|
||||||
spi0.write(&[0x42]).expect("write failed");
|
spi0.write(&[0x42, 0x43]).expect("write failed");
|
||||||
// Need small delay.. otherwise we will read back the sent byte (which we don't want here).
|
|
||||||
// The write function will return as soon as all bytes were shifted out, ignoring the
|
|
||||||
// reply bytes.
|
|
||||||
delay_sysclk.delay_us(50);
|
|
||||||
// Because of the loopback mode, we should get back the fill word here.
|
|
||||||
spi0.read(&mut rx_buf[0..1]).unwrap();
|
|
||||||
assert_eq!(rx_buf[0], FILL_WORD);
|
|
||||||
|
|
||||||
spi0.transfer_in_place(&mut tx_buf)
|
// Can't really verify correct behaviour here. Just verify nothing crazy happens or it hangs up.
|
||||||
|
spi0.read(&mut rx_buf[0..2]).unwrap();
|
||||||
|
|
||||||
|
// If the pins are tied together, we should received exactly what we send.
|
||||||
|
|
||||||
|
let mut inplace_buf = tx_buf;
|
||||||
|
spi0.transfer_in_place(&mut inplace_buf)
|
||||||
.expect("SPI transfer_in_place failed");
|
.expect("SPI transfer_in_place failed");
|
||||||
assert_eq!([1, 2, 3], tx_buf);
|
assert_eq!([1, 2, 3, 0], inplace_buf);
|
||||||
|
|
||||||
spi0.transfer(&mut rx_buf, &tx_buf)
|
spi0.transfer(&mut rx_buf, &tx_buf)
|
||||||
.expect("SPI transfer failed");
|
.expect("SPI transfer failed");
|
||||||
assert_eq!(rx_buf, tx_buf);
|
assert_eq!(rx_buf, [1, 2, 3, 0]);
|
||||||
delay_sysclk.delay_ms(500);
|
delay_sysclk.delay_ms(500);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
@ -6,12 +6,18 @@ a simple PUS (CCSDS) interface to update the software. It also provides a Python
|
|||||||
called the `image-loader.py` which can be used to upload compiled images to the flashloader
|
called the `image-loader.py` which can be used to upload compiled images to the flashloader
|
||||||
application to write them to the NVM.
|
application to write them to the NVM.
|
||||||
|
|
||||||
|
Please note that the both the application and the image loader are tailored towards usage
|
||||||
|
with the [bootloader provided by this repository](https://egit.irs.uni-stuttgart.de/rust/va416xx-rs/src/branch/main/bootloader).
|
||||||
|
|
||||||
The software can quickly be adapted to interface with a real primary on-board software instead of
|
The software can quickly be adapted to interface with a real primary on-board software instead of
|
||||||
the Python script provided here to upload images because it uses a low-level CCSDS based packet
|
the Python script provided here to upload images because it uses a low-level CCSDS based packet
|
||||||
interface.
|
interface.
|
||||||
|
|
||||||
## Using the Python image loader
|
## Using the Python image loader
|
||||||
|
|
||||||
|
The Python image loader communicates with the Rust flashload application using a dedicated serial
|
||||||
|
port with a baudrate of 115200.
|
||||||
|
|
||||||
It is recommended to run the script in a dedicated virtual environment. For example, on UNIX
|
It is recommended to run the script in a dedicated virtual environment. For example, on UNIX
|
||||||
systems you can use `python3 -m venv venv` and then `source venv/bin/activate` to create
|
systems you can use `python3 -m venv venv` and then `source venv/bin/activate` to create
|
||||||
and activate a virtual environment.
|
and activate a virtual environment.
|
||||||
|
@ -1,6 +1,8 @@
|
|||||||
#!/usr/bin/env python3
|
#!/usr/bin/env python3
|
||||||
|
from typing import List, Tuple
|
||||||
from spacepackets.ecss.defs import PusService
|
from spacepackets.ecss.defs import PusService
|
||||||
from spacepackets.ecss.tm import PusTm
|
from spacepackets.ecss.tm import PusTm
|
||||||
|
from tmtccmd.com import ComInterface
|
||||||
import toml
|
import toml
|
||||||
import struct
|
import struct
|
||||||
import logging
|
import logging
|
||||||
@ -21,20 +23,27 @@ from elftools.elf.elffile import ELFFile
|
|||||||
|
|
||||||
|
|
||||||
BAUD_RATE = 115200
|
BAUD_RATE = 115200
|
||||||
|
|
||||||
BOOTLOADER_START_ADDR = 0x0
|
BOOTLOADER_START_ADDR = 0x0
|
||||||
BOOTLOADER_END_ADDR = 0x4000
|
BOOTLOADER_END_ADDR = 0x4000
|
||||||
BOOTLOADER_CRC_ADDR = 0x3FFC
|
BOOTLOADER_CRC_ADDR = BOOTLOADER_END_ADDR - 4
|
||||||
|
BOOTLOADER_MAX_SIZE = BOOTLOADER_END_ADDR - BOOTLOADER_START_ADDR - 4
|
||||||
|
|
||||||
APP_A_START_ADDR = 0x4000
|
APP_A_START_ADDR = 0x4000
|
||||||
APP_A_END_ADDR = 0x22000
|
APP_A_END_ADDR = 0x22000
|
||||||
# The actual size of the image which is relevant for CRC calculation.
|
# The actual size of the image which is relevant for CRC calculation.
|
||||||
APP_A_SIZE_ADDR = 0x21FF8
|
APP_A_SIZE_ADDR = APP_A_END_ADDR - 8
|
||||||
APP_A_CRC_ADDR = 0x21FFC
|
APP_A_CRC_ADDR = APP_A_END_ADDR - 4
|
||||||
|
APP_A_MAX_SIZE = APP_A_END_ADDR - APP_A_START_ADDR - 8
|
||||||
|
|
||||||
APP_B_START_ADDR = 0x22000
|
APP_B_START_ADDR = 0x22000
|
||||||
APP_B_END_ADDR = 0x40000
|
APP_B_END_ADDR = 0x40000
|
||||||
# The actual size of the image which is relevant for CRC calculation.
|
# The actual size of the image which is relevant for CRC calculation.
|
||||||
APP_B_SIZE_ADDR = 0x3FFF8
|
APP_B_SIZE_ADDR = APP_B_END_ADDR - 8
|
||||||
APP_B_CRC_ADDR = 0x3FFFC
|
APP_B_CRC_ADDR = APP_B_END_ADDR - 4
|
||||||
APP_IMG_SZ = 0x1E000
|
APP_B_MAX_SIZE = APP_A_END_ADDR - APP_A_START_ADDR - 8
|
||||||
|
|
||||||
|
APP_IMG_SZ = (APP_B_END_ADDR - APP_A_START_ADDR) // 2
|
||||||
|
|
||||||
CHUNK_SIZE = 896
|
CHUNK_SIZE = 896
|
||||||
|
|
||||||
@ -52,6 +61,7 @@ class ActionId(enum.IntEnum):
|
|||||||
|
|
||||||
|
|
||||||
_LOGGER = logging.getLogger(__name__)
|
_LOGGER = logging.getLogger(__name__)
|
||||||
|
SEQ_PROVIDER = SeqCountProvider(bit_width=14)
|
||||||
|
|
||||||
|
|
||||||
@dataclasses.dataclass
|
@dataclasses.dataclass
|
||||||
@ -62,7 +72,174 @@ class LoadableSegment:
|
|||||||
data: bytes
|
data: bytes
|
||||||
|
|
||||||
|
|
||||||
SEQ_PROVIDER = SeqCountProvider(bit_width=14)
|
class Target(enum.Enum):
|
||||||
|
BOOTLOADER = 0
|
||||||
|
APP_A = 1
|
||||||
|
APP_B = 2
|
||||||
|
|
||||||
|
|
||||||
|
class ImageLoader:
|
||||||
|
def __init__(self, com_if: ComInterface, verificator: PusVerificator) -> None:
|
||||||
|
self.com_if = com_if
|
||||||
|
self.verificator = verificator
|
||||||
|
|
||||||
|
def handle_ping_cmd(self):
|
||||||
|
_LOGGER.info("Sending ping command")
|
||||||
|
ping_tc = PusTc(
|
||||||
|
apid=0x00,
|
||||||
|
service=PusService.S17_TEST,
|
||||||
|
subservice=1,
|
||||||
|
seq_count=SEQ_PROVIDER.get_and_increment(),
|
||||||
|
app_data=bytes(PING_PAYLOAD_SIZE),
|
||||||
|
)
|
||||||
|
self.verificator.add_tc(ping_tc)
|
||||||
|
self.com_if.send(bytes(ping_tc.pack()))
|
||||||
|
|
||||||
|
data_available = self.com_if.data_available(0.4)
|
||||||
|
if not data_available:
|
||||||
|
_LOGGER.warning("no ping reply received")
|
||||||
|
for reply in self.com_if.receive():
|
||||||
|
result = self.verificator.add_tm(
|
||||||
|
Service1Tm.from_tm(PusTm.unpack(reply, 0), UnpackParams(0))
|
||||||
|
)
|
||||||
|
if result is not None and result.completed:
|
||||||
|
_LOGGER.info("received ping completion reply")
|
||||||
|
|
||||||
|
def handle_corruption_cmd(self, target: Target):
|
||||||
|
|
||||||
|
if target == Target.BOOTLOADER:
|
||||||
|
_LOGGER.error("can not corrupt bootloader")
|
||||||
|
if target == Target.APP_A:
|
||||||
|
self.send_tc(
|
||||||
|
PusTc(
|
||||||
|
apid=0,
|
||||||
|
service=ACTION_SERVICE,
|
||||||
|
subservice=ActionId.CORRUPT_APP_A,
|
||||||
|
),
|
||||||
|
)
|
||||||
|
if target == Target.APP_B:
|
||||||
|
self.send_tc(
|
||||||
|
PusTc(
|
||||||
|
apid=0,
|
||||||
|
service=ACTION_SERVICE,
|
||||||
|
subservice=ActionId.CORRUPT_APP_B,
|
||||||
|
),
|
||||||
|
)
|
||||||
|
|
||||||
|
def handle_flash_cmd(self, target: Target, file_path: Path) -> int:
|
||||||
|
loadable_segments = []
|
||||||
|
_LOGGER.info("Parsing ELF file for loadable sections")
|
||||||
|
total_size = 0
|
||||||
|
loadable_segments, total_size = create_loadable_segments(target, file_path)
|
||||||
|
segments_info_str(target, loadable_segments, total_size, file_path)
|
||||||
|
result = self._perform_flashing_algorithm(loadable_segments)
|
||||||
|
if result != 0:
|
||||||
|
return result
|
||||||
|
self._crc_and_app_size_postprocessing(target, total_size, loadable_segments)
|
||||||
|
return 0
|
||||||
|
|
||||||
|
def _perform_flashing_algorithm(
|
||||||
|
self,
|
||||||
|
loadable_segments: List[LoadableSegment],
|
||||||
|
) -> int:
|
||||||
|
# Perform the flashing algorithm.
|
||||||
|
for segment in loadable_segments:
|
||||||
|
segment_end = segment.offset + segment.size
|
||||||
|
current_addr = segment.offset
|
||||||
|
pos_in_segment = 0
|
||||||
|
while pos_in_segment < segment.size:
|
||||||
|
next_chunk_size = min(segment_end - current_addr, CHUNK_SIZE)
|
||||||
|
data = segment.data[pos_in_segment : pos_in_segment + next_chunk_size]
|
||||||
|
next_packet = pack_memory_write_command(current_addr, data)
|
||||||
|
_LOGGER.info(
|
||||||
|
f"Sending memory write command for address {current_addr:#08x} and data with "
|
||||||
|
f"length {len(data)}"
|
||||||
|
)
|
||||||
|
self.verificator.add_tc(next_packet)
|
||||||
|
self.com_if.send(bytes(next_packet.pack()))
|
||||||
|
current_addr += next_chunk_size
|
||||||
|
pos_in_segment += next_chunk_size
|
||||||
|
start_time = time.time()
|
||||||
|
while True:
|
||||||
|
if time.time() - start_time > 1.0:
|
||||||
|
_LOGGER.error("Timeout while waiting for reply")
|
||||||
|
return -1
|
||||||
|
data_available = self.com_if.data_available(0.1)
|
||||||
|
done = False
|
||||||
|
if not data_available:
|
||||||
|
continue
|
||||||
|
replies = self.com_if.receive()
|
||||||
|
for reply in replies:
|
||||||
|
tm = PusTm.unpack(reply, 0)
|
||||||
|
if tm.service != 1:
|
||||||
|
continue
|
||||||
|
service_1_tm = Service1Tm.from_tm(tm, UnpackParams(0))
|
||||||
|
check_result = self.verificator.add_tm(service_1_tm)
|
||||||
|
# We could send after we have received the step reply, but that can
|
||||||
|
# somehow lead to overrun errors. I think it's okay to do it like
|
||||||
|
# this as long as the flash loader only uses polling..
|
||||||
|
if (
|
||||||
|
check_result is not None
|
||||||
|
and check_result.status.completed == StatusField.SUCCESS
|
||||||
|
):
|
||||||
|
done = True
|
||||||
|
|
||||||
|
# This is an optimized variant, but I think the small delay is not an issue.
|
||||||
|
"""
|
||||||
|
if (
|
||||||
|
check_result is not None
|
||||||
|
and check_result.status.step == StatusField.SUCCESS
|
||||||
|
and len(check_result.status.step_list) == 1
|
||||||
|
):
|
||||||
|
done = True
|
||||||
|
"""
|
||||||
|
self.verificator.remove_completed_entries()
|
||||||
|
if done:
|
||||||
|
break
|
||||||
|
return 0
|
||||||
|
|
||||||
|
def _crc_and_app_size_postprocessing(
|
||||||
|
self,
|
||||||
|
target: Target,
|
||||||
|
total_size: int,
|
||||||
|
loadable_segments: List[LoadableSegment],
|
||||||
|
):
|
||||||
|
if target == Target.BOOTLOADER:
|
||||||
|
_LOGGER.info("Blanking the bootloader checksum")
|
||||||
|
# Blank the checksum. For the bootloader, the bootloader will calculate the
|
||||||
|
# checksum itself on the initial run.
|
||||||
|
checksum_write_packet = pack_memory_write_command(
|
||||||
|
BOOTLOADER_CRC_ADDR, bytes([0x00, 0x00, 0x00, 0x00])
|
||||||
|
)
|
||||||
|
self.send_tc(checksum_write_packet)
|
||||||
|
else:
|
||||||
|
crc_addr = None
|
||||||
|
size_addr = None
|
||||||
|
if target == Target.APP_A:
|
||||||
|
crc_addr = APP_A_CRC_ADDR
|
||||||
|
size_addr = APP_A_SIZE_ADDR
|
||||||
|
elif target == Target.APP_B:
|
||||||
|
crc_addr = APP_B_CRC_ADDR
|
||||||
|
size_addr = APP_B_SIZE_ADDR
|
||||||
|
assert crc_addr is not None
|
||||||
|
assert size_addr is not None
|
||||||
|
_LOGGER.info(f"Writing app size {total_size} at address {size_addr:#08x}")
|
||||||
|
size_write_packet = pack_memory_write_command(
|
||||||
|
size_addr, struct.pack("!I", total_size)
|
||||||
|
)
|
||||||
|
self.com_if.send(bytes(size_write_packet.pack()))
|
||||||
|
time.sleep(0.2)
|
||||||
|
crc_calc = PredefinedCrc("crc-32")
|
||||||
|
for segment in loadable_segments:
|
||||||
|
crc_calc.update(segment.data)
|
||||||
|
checksum = crc_calc.digest()
|
||||||
|
_LOGGER.info(
|
||||||
|
f"Writing checksum 0x[{checksum.hex(sep=',')}] at address {crc_addr:#08x}"
|
||||||
|
)
|
||||||
|
self.send_tc(pack_memory_write_command(crc_addr, checksum))
|
||||||
|
|
||||||
|
def send_tc(self, tc: PusTc):
|
||||||
|
self.com_if.send(bytes(tc.pack()))
|
||||||
|
|
||||||
|
|
||||||
def main() -> int:
|
def main() -> int:
|
||||||
@ -102,213 +279,134 @@ def main() -> int:
|
|||||||
verificator = PusVerificator()
|
verificator = PusVerificator()
|
||||||
com_if = SerialCobsComIF(serial_cfg)
|
com_if = SerialCobsComIF(serial_cfg)
|
||||||
com_if.open()
|
com_if.open()
|
||||||
|
target = None
|
||||||
|
if args.target == "bl":
|
||||||
|
target = Target.BOOTLOADER
|
||||||
|
elif args.target == "a":
|
||||||
|
target = Target.APP_A
|
||||||
|
elif args.target == "b":
|
||||||
|
target = Target.APP_B
|
||||||
|
image_loader = ImageLoader(com_if, verificator)
|
||||||
file_path = None
|
file_path = None
|
||||||
|
result = -1
|
||||||
if args.ping:
|
if args.ping:
|
||||||
_LOGGER.info("Sending ping command")
|
image_loader.handle_ping_cmd()
|
||||||
ping_tc = PusTc(
|
com_if.close()
|
||||||
apid=0x00,
|
return 0
|
||||||
service=PusService.S17_TEST,
|
if target:
|
||||||
subservice=1,
|
|
||||||
seq_count=SEQ_PROVIDER.get_and_increment(),
|
|
||||||
app_data=bytes(PING_PAYLOAD_SIZE),
|
|
||||||
)
|
|
||||||
verificator.add_tc(ping_tc)
|
|
||||||
com_if.send(ping_tc.pack())
|
|
||||||
|
|
||||||
data_available = com_if.data_available(0.4)
|
|
||||||
if not data_available:
|
|
||||||
_LOGGER.warning("no ping reply received")
|
|
||||||
for reply in com_if.receive():
|
|
||||||
result = verificator.add_tm(
|
|
||||||
Service1Tm.from_tm(PusTm.unpack(reply, 0), UnpackParams(0))
|
|
||||||
)
|
|
||||||
if result is not None and result.completed:
|
|
||||||
_LOGGER.info("received ping completion reply")
|
|
||||||
if not args.target:
|
|
||||||
return 0
|
|
||||||
if args.target:
|
|
||||||
if not args.corrupt:
|
if not args.corrupt:
|
||||||
if not args.path:
|
if not args.path:
|
||||||
_LOGGER.error("App Path needs to be specified for the flash process")
|
_LOGGER.error("App Path needs to be specified for the flash process")
|
||||||
return -1
|
|
||||||
file_path = Path(args.path)
|
file_path = Path(args.path)
|
||||||
if not file_path.exists():
|
if not file_path.exists():
|
||||||
_LOGGER.error("File does not exist")
|
_LOGGER.error("File does not exist")
|
||||||
return -1
|
|
||||||
if args.corrupt:
|
if args.corrupt:
|
||||||
if not args.target:
|
if not target:
|
||||||
_LOGGER.error("target for corruption command required")
|
_LOGGER.error("target for corruption command required")
|
||||||
|
com_if.close()
|
||||||
return -1
|
return -1
|
||||||
if args.target == "bl":
|
image_loader.handle_corruption_cmd(target)
|
||||||
_LOGGER.error("can not corrupt bootloader")
|
|
||||||
if args.target == "a":
|
|
||||||
packet = PusTc(
|
|
||||||
apid=0,
|
|
||||||
service=ACTION_SERVICE,
|
|
||||||
subservice=ActionId.CORRUPT_APP_A,
|
|
||||||
)
|
|
||||||
com_if.send(packet.pack())
|
|
||||||
if args.target == "b":
|
|
||||||
packet = PusTc(
|
|
||||||
apid=0,
|
|
||||||
service=ACTION_SERVICE,
|
|
||||||
subservice=ActionId.CORRUPT_APP_B,
|
|
||||||
)
|
|
||||||
com_if.send(packet.pack())
|
|
||||||
else:
|
else:
|
||||||
assert file_path is not None
|
assert file_path is not None
|
||||||
loadable_segments = []
|
assert target is not None
|
||||||
_LOGGER.info("Parsing ELF file for loadable sections")
|
result = image_loader.handle_flash_cmd(target, file_path)
|
||||||
total_size = 0
|
|
||||||
with open(file_path, "rb") as app_file:
|
|
||||||
elf_file = ELFFile(app_file)
|
|
||||||
|
|
||||||
for (idx, segment) in enumerate(elf_file.iter_segments("PT_LOAD")):
|
|
||||||
if segment.header.p_filesz == 0:
|
|
||||||
continue
|
|
||||||
# Basic validity checks of the base addresses.
|
|
||||||
if idx == 0:
|
|
||||||
if (
|
|
||||||
args.target == "bl"
|
|
||||||
and segment.header.p_paddr != BOOTLOADER_START_ADDR
|
|
||||||
):
|
|
||||||
raise ValueError(
|
|
||||||
f"detected possibly invalid start address {segment.header.p_paddr:#08x} for "
|
|
||||||
f"bootloader, expected {BOOTLOADER_START_ADDR}"
|
|
||||||
)
|
|
||||||
if (
|
|
||||||
args.target == "a"
|
|
||||||
and segment.header.p_paddr != APP_A_START_ADDR
|
|
||||||
):
|
|
||||||
raise ValueError(
|
|
||||||
f"detected possibly invalid start address {segment.header.p_paddr:#08x} for "
|
|
||||||
f"App A, expected {APP_A_START_ADDR}"
|
|
||||||
)
|
|
||||||
if (
|
|
||||||
args.target == "b"
|
|
||||||
and segment.header.p_paddr != APP_B_START_ADDR
|
|
||||||
):
|
|
||||||
raise ValueError(
|
|
||||||
f"detected possibly invalid start address {segment.header.p_paddr:#08x} for "
|
|
||||||
f"App B, expected {APP_B_START_ADDR}"
|
|
||||||
)
|
|
||||||
name = None
|
|
||||||
for section in elf_file.iter_sections():
|
|
||||||
if (
|
|
||||||
section.header.sh_offset == segment.header.p_offset
|
|
||||||
and section.header.sh_size > 0
|
|
||||||
):
|
|
||||||
name = section.name
|
|
||||||
if name is None:
|
|
||||||
_LOGGER.warning("no fitting section found for segment")
|
|
||||||
continue
|
|
||||||
# print(f"Segment Addr: {segment.header.p_paddr}")
|
|
||||||
# print(f"Segment Offset: {segment.header.p_offset}")
|
|
||||||
# print(f"Segment Filesize: {segment.header.p_filesz}")
|
|
||||||
loadable_segments.append(
|
|
||||||
LoadableSegment(
|
|
||||||
name=name,
|
|
||||||
offset=segment.header.p_paddr,
|
|
||||||
size=segment.header.p_filesz,
|
|
||||||
data=segment.data(),
|
|
||||||
)
|
|
||||||
)
|
|
||||||
total_size += segment.header.p_filesz
|
|
||||||
context_str = None
|
|
||||||
if args.target == "bl":
|
|
||||||
context_str = "Bootloader"
|
|
||||||
elif args.target == "a":
|
|
||||||
context_str = "App Slot A"
|
|
||||||
elif args.target == "b":
|
|
||||||
context_str = "App Slot B"
|
|
||||||
_LOGGER.info(
|
|
||||||
f"Flashing {context_str} with image {file_path} (size {total_size})"
|
|
||||||
)
|
|
||||||
for idx, segment in enumerate(loadable_segments):
|
|
||||||
_LOGGER.info(
|
|
||||||
f"Loadable section {idx} {segment.name} with offset {segment.offset:#08x} and size {segment.size}"
|
|
||||||
)
|
|
||||||
for segment in loadable_segments:
|
|
||||||
segment_end = segment.offset + segment.size
|
|
||||||
current_addr = segment.offset
|
|
||||||
pos_in_segment = 0
|
|
||||||
while pos_in_segment < segment.size:
|
|
||||||
next_chunk_size = min(segment_end - current_addr, CHUNK_SIZE)
|
|
||||||
data = segment.data[
|
|
||||||
pos_in_segment : pos_in_segment + next_chunk_size
|
|
||||||
]
|
|
||||||
next_packet = pack_memory_write_command(current_addr, data)
|
|
||||||
_LOGGER.info(
|
|
||||||
f"Sending memory write command for address {current_addr:#08x} and data with "
|
|
||||||
f"length {len(data)}"
|
|
||||||
)
|
|
||||||
verificator.add_tc(next_packet)
|
|
||||||
com_if.send(next_packet.pack())
|
|
||||||
current_addr += next_chunk_size
|
|
||||||
pos_in_segment += next_chunk_size
|
|
||||||
while True:
|
|
||||||
data_available = com_if.data_available(0.1)
|
|
||||||
done = False
|
|
||||||
if not data_available:
|
|
||||||
continue
|
|
||||||
replies = com_if.receive()
|
|
||||||
for reply in replies:
|
|
||||||
tm = PusTm.unpack(reply, 0)
|
|
||||||
if tm.service != 1:
|
|
||||||
continue
|
|
||||||
service_1_tm = Service1Tm.from_tm(tm, UnpackParams(0))
|
|
||||||
check_result = verificator.add_tm(service_1_tm)
|
|
||||||
# We could send after we have received the step reply, but that can
|
|
||||||
# somehow lead to overrun errors. I think it's okay to do it like
|
|
||||||
# this as long as the flash loader only uses polling..
|
|
||||||
if (
|
|
||||||
check_result is not None
|
|
||||||
and check_result.status.completed == StatusField.SUCCESS
|
|
||||||
):
|
|
||||||
done = True
|
|
||||||
# Still keep a small delay
|
|
||||||
# time.sleep(0.05)
|
|
||||||
verificator.remove_completed_entries()
|
|
||||||
if done:
|
|
||||||
break
|
|
||||||
if args.target == "bl":
|
|
||||||
_LOGGER.info("Blanking the bootloader checksum")
|
|
||||||
# Blank the checksum. For the bootloader, the bootloader will calculate the
|
|
||||||
# checksum itself on the initial run.
|
|
||||||
checksum_write_packet = pack_memory_write_command(
|
|
||||||
BOOTLOADER_CRC_ADDR, bytes([0x00, 0x00, 0x00, 0x00])
|
|
||||||
)
|
|
||||||
com_if.send(checksum_write_packet.pack())
|
|
||||||
else:
|
|
||||||
crc_addr = None
|
|
||||||
size_addr = None
|
|
||||||
if args.target == "a":
|
|
||||||
crc_addr = APP_A_CRC_ADDR
|
|
||||||
size_addr = APP_A_SIZE_ADDR
|
|
||||||
elif args.target == "b":
|
|
||||||
crc_addr = APP_B_CRC_ADDR
|
|
||||||
size_addr = APP_B_SIZE_ADDR
|
|
||||||
assert crc_addr is not None
|
|
||||||
assert size_addr is not None
|
|
||||||
_LOGGER.info(
|
|
||||||
f"Writing app size {total_size} at address {size_addr:#08x}"
|
|
||||||
)
|
|
||||||
size_write_packet = pack_memory_write_command(
|
|
||||||
size_addr, struct.pack("!I", total_size)
|
|
||||||
)
|
|
||||||
com_if.send(size_write_packet.pack())
|
|
||||||
time.sleep(0.2)
|
|
||||||
crc_calc = PredefinedCrc("crc-32")
|
|
||||||
for segment in loadable_segments:
|
|
||||||
crc_calc.update(segment.data)
|
|
||||||
checksum = crc_calc.digest()
|
|
||||||
_LOGGER.info(
|
|
||||||
f"Writing checksum 0x[{checksum.hex(sep=',')}] at address {crc_addr:#08x}"
|
|
||||||
)
|
|
||||||
checksum_write_packet = pack_memory_write_command(crc_addr, checksum)
|
|
||||||
com_if.send(checksum_write_packet.pack())
|
|
||||||
com_if.close()
|
com_if.close()
|
||||||
return 0
|
return result
|
||||||
|
|
||||||
|
|
||||||
|
def create_loadable_segments(
|
||||||
|
target: Target, file_path: Path
|
||||||
|
) -> Tuple[List[LoadableSegment], int]:
|
||||||
|
loadable_segments = []
|
||||||
|
total_size = 0
|
||||||
|
with open(file_path, "rb") as app_file:
|
||||||
|
elf_file = ELFFile(app_file)
|
||||||
|
|
||||||
|
for idx, segment in enumerate(elf_file.iter_segments("PT_LOAD")):
|
||||||
|
if segment.header.p_filesz == 0:
|
||||||
|
continue
|
||||||
|
# Basic validity checks of the base addresses.
|
||||||
|
if idx == 0:
|
||||||
|
if (
|
||||||
|
target == Target.BOOTLOADER
|
||||||
|
and segment.header.p_paddr != BOOTLOADER_START_ADDR
|
||||||
|
):
|
||||||
|
raise ValueError(
|
||||||
|
f"detected possibly invalid start address {segment.header.p_paddr:#08x} for "
|
||||||
|
f"bootloader, expected {BOOTLOADER_START_ADDR}"
|
||||||
|
)
|
||||||
|
if (
|
||||||
|
target == Target.APP_A
|
||||||
|
and segment.header.p_paddr != APP_A_START_ADDR
|
||||||
|
):
|
||||||
|
raise ValueError(
|
||||||
|
f"detected possibly invalid start address {segment.header.p_paddr:#08x} for "
|
||||||
|
f"App A, expected {APP_A_START_ADDR}"
|
||||||
|
)
|
||||||
|
if (
|
||||||
|
target == Target.APP_B
|
||||||
|
and segment.header.p_paddr != APP_B_START_ADDR
|
||||||
|
):
|
||||||
|
raise ValueError(
|
||||||
|
f"detected possibly invalid start address {segment.header.p_paddr:#08x} for "
|
||||||
|
f"App B, expected {APP_B_START_ADDR}"
|
||||||
|
)
|
||||||
|
name = None
|
||||||
|
for section in elf_file.iter_sections():
|
||||||
|
if (
|
||||||
|
section.header.sh_offset == segment.header.p_offset
|
||||||
|
and section.header.sh_size > 0
|
||||||
|
):
|
||||||
|
name = section.name
|
||||||
|
if name is None:
|
||||||
|
_LOGGER.warning("no fitting section found for segment")
|
||||||
|
continue
|
||||||
|
# print(f"Segment Addr: {segment.header.p_paddr}")
|
||||||
|
# print(f"Segment Offset: {segment.header.p_offset}")
|
||||||
|
# print(f"Segment Filesize: {segment.header.p_filesz}")
|
||||||
|
loadable_segments.append(
|
||||||
|
LoadableSegment(
|
||||||
|
name=name,
|
||||||
|
offset=segment.header.p_paddr,
|
||||||
|
size=segment.header.p_filesz,
|
||||||
|
data=segment.data(),
|
||||||
|
)
|
||||||
|
)
|
||||||
|
total_size += segment.header.p_filesz
|
||||||
|
return loadable_segments, total_size
|
||||||
|
|
||||||
|
|
||||||
|
def segments_info_str(
|
||||||
|
target: Target,
|
||||||
|
loadable_segments: List[LoadableSegment],
|
||||||
|
total_size: int,
|
||||||
|
file_path: Path,
|
||||||
|
):
|
||||||
|
# Set context string and perform basic sanity checks.
|
||||||
|
if target == Target.BOOTLOADER:
|
||||||
|
if total_size > BOOTLOADER_MAX_SIZE:
|
||||||
|
_LOGGER.error(
|
||||||
|
f"provided bootloader app larger than allowed {total_size} bytes"
|
||||||
|
)
|
||||||
|
return -1
|
||||||
|
context_str = "Bootloader"
|
||||||
|
elif target == Target.APP_A:
|
||||||
|
if total_size > APP_A_MAX_SIZE:
|
||||||
|
_LOGGER.error(f"provided App A larger than allowed {total_size} bytes")
|
||||||
|
return -1
|
||||||
|
context_str = "App Slot A"
|
||||||
|
elif target == Target.APP_B:
|
||||||
|
if total_size > APP_B_MAX_SIZE:
|
||||||
|
_LOGGER.error(f"provided App B larger than allowed {total_size} bytes")
|
||||||
|
return -1
|
||||||
|
context_str = "App Slot B"
|
||||||
|
_LOGGER.info(f"Flashing {context_str} with image {file_path} (size {total_size})")
|
||||||
|
for idx, segment in enumerate(loadable_segments):
|
||||||
|
_LOGGER.info(
|
||||||
|
f"Loadable section {idx} {segment.name} with offset {segment.offset:#08x} and "
|
||||||
|
f"size {segment.size}"
|
||||||
|
)
|
||||||
|
|
||||||
|
|
||||||
def pack_memory_write_command(addr: int, data: bytes) -> PusTc:
|
def pack_memory_write_command(addr: int, data: bytes) -> PusTc:
|
||||||
@ -324,7 +422,7 @@ def pack_memory_write_command(addr: int, data: bytes) -> PusTc:
|
|||||||
service=MEMORY_SERVICE,
|
service=MEMORY_SERVICE,
|
||||||
subservice=RAW_MEMORY_WRITE_SUBSERVICE,
|
subservice=RAW_MEMORY_WRITE_SUBSERVICE,
|
||||||
seq_count=SEQ_PROVIDER.get_and_increment(),
|
seq_count=SEQ_PROVIDER.get_and_increment(),
|
||||||
app_data=app_data,
|
app_data=bytes(app_data),
|
||||||
)
|
)
|
||||||
|
|
||||||
|
|
||||||
|
@ -7,11 +7,11 @@ edition = "2021"
|
|||||||
|
|
||||||
[dependencies]
|
[dependencies]
|
||||||
cortex-m-rt = "0.7"
|
cortex-m-rt = "0.7"
|
||||||
va416xx-hal = { path = "../../va416xx-hal" }
|
|
||||||
panic-rtt-target = { version = "0.1.3" }
|
panic-rtt-target = { version = "0.1.3" }
|
||||||
rtt-target = { version = "0.5" }
|
rtt-target = { version = "0.5" }
|
||||||
cortex-m = { version = "0.7", features = ["critical-section-single-core"] }
|
cortex-m = { version = "0.7", features = ["critical-section-single-core"] }
|
||||||
embedded-hal = "1"
|
embedded-hal = "1"
|
||||||
|
va416xx-hal = { path = "../../va416xx-hal", features = ["va41630"] }
|
||||||
|
|
||||||
[profile.dev]
|
[profile.dev]
|
||||||
codegen-units = 1
|
codegen-units = 1
|
||||||
|
@ -7,11 +7,11 @@ edition = "2021"
|
|||||||
|
|
||||||
[dependencies]
|
[dependencies]
|
||||||
cortex-m-rt = "0.7"
|
cortex-m-rt = "0.7"
|
||||||
va416xx-hal = { path = "../../va416xx-hal" }
|
|
||||||
panic-rtt-target = { version = "0.1.3" }
|
panic-rtt-target = { version = "0.1.3" }
|
||||||
rtt-target = { version = "0.5" }
|
rtt-target = { version = "0.5" }
|
||||||
cortex-m = { version = "0.7", features = ["critical-section-single-core"] }
|
cortex-m = { version = "0.7", features = ["critical-section-single-core"] }
|
||||||
embedded-hal = "1"
|
embedded-hal = "1"
|
||||||
|
va416xx-hal = { path = "../../va416xx-hal", features = ["va41630"] }
|
||||||
|
|
||||||
[profile.dev]
|
[profile.dev]
|
||||||
codegen-units = 1
|
codegen-units = 1
|
||||||
|
@ -109,6 +109,7 @@ mod app {
|
|||||||
tc::PusTcReader, tm::PusTmCreator, EcssEnumU8, PusPacket, WritablePusPacket,
|
tc::PusTcReader, tm::PusTmCreator, EcssEnumU8, PusPacket, WritablePusPacket,
|
||||||
};
|
};
|
||||||
use va416xx_hal::irq_router::enable_and_init_irq_router;
|
use va416xx_hal::irq_router::enable_and_init_irq_router;
|
||||||
|
use va416xx_hal::uart::IrqContextTimeoutOrMaxSize;
|
||||||
use va416xx_hal::{
|
use va416xx_hal::{
|
||||||
clock::ClkgenExt,
|
clock::ClkgenExt,
|
||||||
edac,
|
edac,
|
||||||
@ -132,6 +133,7 @@ mod app {
|
|||||||
struct Local {
|
struct Local {
|
||||||
uart_rx: uart::RxWithIrq<pac::Uart0>,
|
uart_rx: uart::RxWithIrq<pac::Uart0>,
|
||||||
uart_tx: uart::Tx<pac::Uart0>,
|
uart_tx: uart::Tx<pac::Uart0>,
|
||||||
|
rx_context: IrqContextTimeoutOrMaxSize,
|
||||||
rom_spi: Option<pac::Spi3>,
|
rom_spi: Option<pac::Spi3>,
|
||||||
// We handle all TM in one task.
|
// We handle all TM in one task.
|
||||||
tm_cons: DataConsumer<BUF_RB_SIZE_TM, SIZES_RB_SIZE_TM>,
|
tm_cons: DataConsumer<BUF_RB_SIZE_TM, SIZES_RB_SIZE_TM>,
|
||||||
@ -167,9 +169,9 @@ mod app {
|
|||||||
enable_and_init_irq_router(&mut cx.device.sysconfig, &cx.device.irq_router);
|
enable_and_init_irq_router(&mut cx.device.sysconfig, &cx.device.irq_router);
|
||||||
setup_edac(&mut cx.device.sysconfig);
|
setup_edac(&mut cx.device.sysconfig);
|
||||||
|
|
||||||
let gpiob = PinsG::new(&mut cx.device.sysconfig, cx.device.portg);
|
let gpiog = PinsG::new(&mut cx.device.sysconfig, cx.device.portg);
|
||||||
let tx = gpiob.pg0.into_funsel_1();
|
let tx = gpiog.pg0.into_funsel_1();
|
||||||
let rx = gpiob.pg1.into_funsel_1();
|
let rx = gpiog.pg1.into_funsel_1();
|
||||||
|
|
||||||
let uart0 = Uart::new(
|
let uart0 = Uart::new(
|
||||||
cx.device.uart0,
|
cx.device.uart0,
|
||||||
@ -178,7 +180,7 @@ mod app {
|
|||||||
&mut cx.device.sysconfig,
|
&mut cx.device.sysconfig,
|
||||||
&clocks,
|
&clocks,
|
||||||
);
|
);
|
||||||
let (tx, mut rx, _) = uart0.split_with_irq();
|
let (tx, rx) = uart0.split();
|
||||||
|
|
||||||
let verif_reporter = VerificationReportCreator::new(0).unwrap();
|
let verif_reporter = VerificationReportCreator::new(0).unwrap();
|
||||||
|
|
||||||
@ -191,7 +193,9 @@ mod app {
|
|||||||
Mono::start(cx.core.SYST, clocks.sysclk().raw());
|
Mono::start(cx.core.SYST, clocks.sysclk().raw());
|
||||||
CLOCKS.set(clocks).unwrap();
|
CLOCKS.set(clocks).unwrap();
|
||||||
|
|
||||||
rx.read_fixed_len_using_irq(MAX_TC_FRAME_SIZE, true)
|
let mut rx = rx.to_rx_with_irq();
|
||||||
|
let mut rx_context = IrqContextTimeoutOrMaxSize::new(MAX_TC_FRAME_SIZE);
|
||||||
|
rx.read_fixed_len_or_timeout_based_using_irq(&mut rx_context)
|
||||||
.expect("initiating UART RX failed");
|
.expect("initiating UART RX failed");
|
||||||
pus_tc_handler::spawn().unwrap();
|
pus_tc_handler::spawn().unwrap();
|
||||||
pus_tm_tx_handler::spawn().unwrap();
|
pus_tm_tx_handler::spawn().unwrap();
|
||||||
@ -205,6 +209,7 @@ mod app {
|
|||||||
Local {
|
Local {
|
||||||
uart_rx: rx,
|
uart_rx: rx,
|
||||||
uart_tx: tx,
|
uart_tx: tx,
|
||||||
|
rx_context,
|
||||||
rom_spi: Some(cx.device.spi3),
|
rom_spi: Some(cx.device.spi3),
|
||||||
tm_cons: DataConsumer {
|
tm_cons: DataConsumer {
|
||||||
buf_cons: buf_cons_tm,
|
buf_cons: buf_cons_tm,
|
||||||
@ -231,20 +236,26 @@ mod app {
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
// This is the interrupt handler to read all bytes received on the UART0.
|
||||||
#[task(
|
#[task(
|
||||||
binds = UART0_RX,
|
binds = UART0_RX,
|
||||||
local = [
|
local = [
|
||||||
cnt: u32 = 0,
|
cnt: u32 = 0,
|
||||||
rx_buf: [u8; MAX_TC_FRAME_SIZE] = [0; MAX_TC_FRAME_SIZE],
|
rx_buf: [u8; MAX_TC_FRAME_SIZE] = [0; MAX_TC_FRAME_SIZE],
|
||||||
|
rx_context,
|
||||||
uart_rx,
|
uart_rx,
|
||||||
tc_prod
|
tc_prod
|
||||||
],
|
],
|
||||||
)]
|
)]
|
||||||
fn uart_rx_irq(cx: uart_rx_irq::Context) {
|
fn uart_rx_irq(cx: uart_rx_irq::Context) {
|
||||||
match cx.local.uart_rx.irq_handler(cx.local.rx_buf) {
|
match cx
|
||||||
|
.local
|
||||||
|
.uart_rx
|
||||||
|
.irq_handler_max_size_or_timeout_based(cx.local.rx_context, cx.local.rx_buf)
|
||||||
|
{
|
||||||
Ok(result) => {
|
Ok(result) => {
|
||||||
if RX_DEBUGGING {
|
if RX_DEBUGGING {
|
||||||
log::debug!("RX Info: {:?}", cx.local.uart_rx.irq_info());
|
log::debug!("RX Info: {:?}", cx.local.rx_context);
|
||||||
log::debug!("RX Result: {:?}", result);
|
log::debug!("RX Result: {:?}", result);
|
||||||
}
|
}
|
||||||
if result.complete() {
|
if result.complete() {
|
||||||
@ -279,11 +290,11 @@ mod app {
|
|||||||
// Initiate next transfer.
|
// Initiate next transfer.
|
||||||
cx.local
|
cx.local
|
||||||
.uart_rx
|
.uart_rx
|
||||||
.read_fixed_len_using_irq(MAX_TC_FRAME_SIZE, true)
|
.read_fixed_len_or_timeout_based_using_irq(cx.local.rx_context)
|
||||||
.expect("read operation failed");
|
.expect("read operation failed");
|
||||||
}
|
}
|
||||||
if result.error() {
|
if result.has_errors() {
|
||||||
log::warn!("UART error: {:?}", result.error());
|
log::warn!("UART error: {:?}", result.errors.unwrap());
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
Err(e) => {
|
Err(e) => {
|
||||||
@ -438,7 +449,12 @@ mod app {
|
|||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
let data = &app_data[10..10 + data_len as usize];
|
let data = &app_data[10..10 + data_len as usize];
|
||||||
log::info!("writing {} bytes at offset {} to NVM", data_len, offset);
|
log::info!(
|
||||||
|
target: "TC Handler",
|
||||||
|
"writing {} bytes at offset {} to NVM",
|
||||||
|
data_len,
|
||||||
|
offset
|
||||||
|
);
|
||||||
// Safety: We only use this for NVM handling and we only do NVM
|
// Safety: We only use this for NVM handling and we only do NVM
|
||||||
// handling here.
|
// handling here.
|
||||||
let mut sys_cfg = unsafe { pac::Sysconfig::steal() };
|
let mut sys_cfg = unsafe { pac::Sysconfig::steal() };
|
||||||
@ -455,7 +471,9 @@ mod app {
|
|||||||
.completion_success(cx.local.src_data_buf, started_token, 0, 0, &[])
|
.completion_success(cx.local.src_data_buf, started_token, 0, 0, &[])
|
||||||
.expect("completion success failed");
|
.expect("completion success failed");
|
||||||
write_and_send(&tm);
|
write_and_send(&tm);
|
||||||
log::info!("NVM operation done");
|
log::info!(
|
||||||
|
target: "TC Handler",
|
||||||
|
"NVM operation done");
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
@ -8,6 +8,21 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
|
|||||||
|
|
||||||
# [unreleased]
|
# [unreleased]
|
||||||
|
|
||||||
|
## Changed
|
||||||
|
|
||||||
|
- Improve and fix SPI abstractions. Add new low level interface. The primary SPI constructor now
|
||||||
|
only expects a configuration structure and the transfer configuration needs to be applied in a
|
||||||
|
separate step.
|
||||||
|
- Added an additional way to read the UART RX with IRQs. The module documentation provides
|
||||||
|
more information.
|
||||||
|
- Made the UART with IRQ API more flexible for future additions.
|
||||||
|
|
||||||
|
## Fixed
|
||||||
|
|
||||||
|
- Fixes for SPI peripheral: Flush implementation was incorrect and should now flush properly.
|
||||||
|
- Fixes for SPI example
|
||||||
|
- Fixes for RTIC example
|
||||||
|
|
||||||
# [v0.2.0] 2024-09-18
|
# [v0.2.0] 2024-09-18
|
||||||
|
|
||||||
- Documentation improvements
|
- Documentation improvements
|
||||||
|
@ -113,14 +113,6 @@ pub(super) unsafe trait RegisterInterface {
|
|||||||
/// this type.
|
/// this type.
|
||||||
fn id(&self) -> DynPinId;
|
fn id(&self) -> DynPinId;
|
||||||
|
|
||||||
const PORTA: *const PortRegisterBlock = Porta::ptr();
|
|
||||||
const PORTB: *const PortRegisterBlock = Portb::ptr();
|
|
||||||
const PORTC: *const PortRegisterBlock = Portc::ptr();
|
|
||||||
const PORTD: *const PortRegisterBlock = Portd::ptr();
|
|
||||||
const PORTE: *const PortRegisterBlock = Porte::ptr();
|
|
||||||
const PORTF: *const PortRegisterBlock = Portf::ptr();
|
|
||||||
const PORTG: *const PortRegisterBlock = Portg::ptr();
|
|
||||||
|
|
||||||
/// Change the pin mode
|
/// Change the pin mode
|
||||||
#[inline]
|
#[inline]
|
||||||
fn change_mode(&mut self, mode: DynPinMode) {
|
fn change_mode(&mut self, mode: DynPinMode) {
|
||||||
@ -155,13 +147,13 @@ pub(super) unsafe trait RegisterInterface {
|
|||||||
#[inline]
|
#[inline]
|
||||||
fn port_reg(&self) -> &PortRegisterBlock {
|
fn port_reg(&self) -> &PortRegisterBlock {
|
||||||
match self.id().group {
|
match self.id().group {
|
||||||
DynGroup::A => unsafe { &(*Self::PORTA) },
|
DynGroup::A => unsafe { &(*Porta::ptr()) },
|
||||||
DynGroup::B => unsafe { &(*Self::PORTB) },
|
DynGroup::B => unsafe { &(*Portb::ptr()) },
|
||||||
DynGroup::C => unsafe { &(*Self::PORTC) },
|
DynGroup::C => unsafe { &(*Portc::ptr()) },
|
||||||
DynGroup::D => unsafe { &(*Self::PORTD) },
|
DynGroup::D => unsafe { &(*Portd::ptr()) },
|
||||||
DynGroup::E => unsafe { &(*Self::PORTE) },
|
DynGroup::E => unsafe { &(*Porte::ptr()) },
|
||||||
DynGroup::F => unsafe { &(*Self::PORTF) },
|
DynGroup::F => unsafe { &(*Portf::ptr()) },
|
||||||
DynGroup::G => unsafe { &(*Self::PORTG) },
|
DynGroup::G => unsafe { &(*Portg::ptr()) },
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -9,8 +9,10 @@ use core::convert::Infallible;
|
|||||||
use core::marker::PhantomData;
|
use core::marker::PhantomData;
|
||||||
|
|
||||||
use crate::pac;
|
use crate::pac;
|
||||||
|
use crate::time::Hertz;
|
||||||
|
pub use crate::timer::ValidTim;
|
||||||
|
use crate::timer::{TimAndPinRegister, TimDynRegister, TimPin, TimRegInterface, ValidTimAndPin};
|
||||||
use crate::{clock::Clocks, gpio::DynPinId};
|
use crate::{clock::Clocks, gpio::DynPinId};
|
||||||
pub use crate::{gpio::PinId, time::Hertz, timer::*};
|
|
||||||
|
|
||||||
const DUTY_MAX: u16 = u16::MAX;
|
const DUTY_MAX: u16 = u16::MAX;
|
||||||
|
|
||||||
|
File diff suppressed because it is too large
Load Diff
@ -1,9 +1,15 @@
|
|||||||
//! # API for the UART peripheral
|
//! # API for the UART peripheral
|
||||||
//!
|
//!
|
||||||
|
//! The core of this API are the [Uart], [UartBase], [Rx] and [Tx] structures.
|
||||||
|
//! The RX structure also has a dedicated [RxWithIrq] variant which allows reading the receiver
|
||||||
|
//! using interrupts.
|
||||||
|
//!
|
||||||
//! ## Examples
|
//! ## Examples
|
||||||
//!
|
//!
|
||||||
//! - [UART simple example](https://egit.irs.uni-stuttgart.de/rust/va416xx-rs/src/branch/main/examples/simple/examples/uart.rs)
|
//! - [UART simple example](https://egit.irs.uni-stuttgart.de/rust/va416xx-rs/src/branch/main/examples/simple/examples/uart.rs)
|
||||||
|
//! - [UART echo with IRQ and Embassy](https://egit.irs.uni-stuttgart.de/rust/va416xx-rs/src/branch/main/examples/embassy/src/bin/uart-echo-with-irq.rs)
|
||||||
//! - [Flashloader app using UART with IRQs](https://egit.irs.uni-stuttgart.de/rust/va416xx-rs/src/branch/main/flashloader)
|
//! - [Flashloader app using UART with IRQs](https://egit.irs.uni-stuttgart.de/rust/va416xx-rs/src/branch/main/flashloader)
|
||||||
|
use core::convert::Infallible;
|
||||||
use core::ops::Deref;
|
use core::ops::Deref;
|
||||||
|
|
||||||
use embedded_hal_nb::serial::Read;
|
use embedded_hal_nb::serial::Read;
|
||||||
@ -64,15 +70,28 @@ impl RxPin<Uart2> for Pin<PF9, AltFunc1> {}
|
|||||||
// Regular Definitions
|
// Regular Definitions
|
||||||
//==================================================================================================
|
//==================================================================================================
|
||||||
|
|
||||||
#[derive(Debug)]
|
#[derive(Debug, PartialEq, Eq)]
|
||||||
|
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
|
||||||
|
pub struct TransferPendingError;
|
||||||
|
|
||||||
|
#[derive(Debug, PartialEq, Eq)]
|
||||||
|
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
|
||||||
|
pub enum RxError {
|
||||||
|
Overrun,
|
||||||
|
Framing,
|
||||||
|
Parity,
|
||||||
|
}
|
||||||
|
#[derive(Debug, PartialEq, Eq)]
|
||||||
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
|
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
|
||||||
pub enum Error {
|
pub enum Error {
|
||||||
Overrun,
|
Rx(RxError),
|
||||||
FramingError,
|
|
||||||
ParityError,
|
|
||||||
BreakCondition,
|
BreakCondition,
|
||||||
TransferPending,
|
}
|
||||||
BufferTooShort,
|
|
||||||
|
impl From<RxError> for Error {
|
||||||
|
fn from(value: RxError) -> Self {
|
||||||
|
Self::Rx(value)
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
#[derive(Debug, PartialEq, Eq, Copy, Clone)]
|
#[derive(Debug, PartialEq, Eq, Copy, Clone)]
|
||||||
@ -198,54 +217,75 @@ impl From<Hertz> for Config {
|
|||||||
// IRQ Definitions
|
// IRQ Definitions
|
||||||
//==================================================================================================
|
//==================================================================================================
|
||||||
|
|
||||||
#[derive(Debug)]
|
#[derive(Debug, Copy, Clone)]
|
||||||
pub struct IrqInfo {
|
pub struct IrqContextTimeoutOrMaxSize {
|
||||||
rx_len: usize,
|
|
||||||
rx_idx: usize,
|
rx_idx: usize,
|
||||||
mode: IrqReceptionMode,
|
mode: IrqReceptionMode,
|
||||||
|
pub max_len: usize,
|
||||||
|
}
|
||||||
|
|
||||||
|
impl IrqContextTimeoutOrMaxSize {
|
||||||
|
pub fn new(max_len: usize) -> Self {
|
||||||
|
IrqContextTimeoutOrMaxSize {
|
||||||
|
rx_idx: 0,
|
||||||
|
max_len,
|
||||||
|
mode: IrqReceptionMode::Idle,
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
impl IrqContextTimeoutOrMaxSize {
|
||||||
|
pub fn reset(&mut self) {
|
||||||
|
self.rx_idx = 0;
|
||||||
|
self.mode = IrqReceptionMode::Idle;
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
/// This struct is used to return the default IRQ handler result to the user
|
/// This struct is used to return the default IRQ handler result to the user
|
||||||
#[derive(Debug, Default)]
|
#[derive(Debug, Default)]
|
||||||
pub struct IrqResult {
|
pub struct IrqResult {
|
||||||
|
pub bytes_read: usize,
|
||||||
|
pub errors: Option<IrqUartError>,
|
||||||
|
}
|
||||||
|
|
||||||
|
/// This struct is used to return the default IRQ handler result to the user
|
||||||
|
#[derive(Debug, Default)]
|
||||||
|
pub struct IrqResultMaxSizeOrTimeout {
|
||||||
complete: bool,
|
complete: bool,
|
||||||
timeout: bool,
|
timeout: bool,
|
||||||
pub errors: IrqUartError,
|
pub errors: Option<IrqUartError>,
|
||||||
pub bytes_read: usize,
|
pub bytes_read: usize,
|
||||||
}
|
}
|
||||||
|
|
||||||
impl IrqResult {
|
impl IrqResultMaxSizeOrTimeout {
|
||||||
pub fn new() -> Self {
|
pub fn new() -> Self {
|
||||||
IrqResult {
|
IrqResultMaxSizeOrTimeout {
|
||||||
complete: false,
|
complete: false,
|
||||||
timeout: false,
|
timeout: false,
|
||||||
errors: IrqUartError::default(),
|
errors: None,
|
||||||
bytes_read: 0,
|
bytes_read: 0,
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
impl IrqResult {
|
impl IrqResultMaxSizeOrTimeout {
|
||||||
#[inline]
|
#[inline]
|
||||||
pub fn error(&self) -> bool {
|
pub fn has_errors(&self) -> bool {
|
||||||
if self.errors.overflow || self.errors.parity || self.errors.framing {
|
self.errors.is_some()
|
||||||
return true;
|
|
||||||
}
|
|
||||||
false
|
|
||||||
}
|
}
|
||||||
|
|
||||||
#[inline]
|
#[inline]
|
||||||
pub fn overflow_error(&self) -> bool {
|
pub fn overflow_error(&self) -> bool {
|
||||||
self.errors.overflow
|
self.errors.map_or(false, |e| e.overflow)
|
||||||
}
|
}
|
||||||
|
|
||||||
#[inline]
|
#[inline]
|
||||||
pub fn framing_error(&self) -> bool {
|
pub fn framing_error(&self) -> bool {
|
||||||
self.errors.framing
|
self.errors.map_or(false, |e| e.framing)
|
||||||
}
|
}
|
||||||
|
|
||||||
#[inline]
|
#[inline]
|
||||||
pub fn parity_error(&self) -> bool {
|
pub fn parity_error(&self) -> bool {
|
||||||
self.errors.parity
|
self.errors.map_or(false, |e| e.parity)
|
||||||
}
|
}
|
||||||
|
|
||||||
#[inline]
|
#[inline]
|
||||||
@ -259,52 +299,16 @@ impl IrqResult {
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
#[derive(Debug, PartialEq)]
|
#[derive(Debug, PartialEq, Copy, Clone)]
|
||||||
enum IrqReceptionMode {
|
enum IrqReceptionMode {
|
||||||
Idle,
|
Idle,
|
||||||
Pending,
|
Pending,
|
||||||
}
|
}
|
||||||
|
|
||||||
//==================================================================================================
|
//==================================================================================================
|
||||||
// UART implementation
|
// UART peripheral wrapper
|
||||||
//==================================================================================================
|
//==================================================================================================
|
||||||
|
|
||||||
/// Type erased variant of a UART. Can be created with the [Uart::downgrade] function.
|
|
||||||
pub struct UartBase<Uart> {
|
|
||||||
uart: Uart,
|
|
||||||
tx: Tx<Uart>,
|
|
||||||
rx: Rx<Uart>,
|
|
||||||
}
|
|
||||||
/// Serial abstraction. Entry point to create a new UART
|
|
||||||
pub struct Uart<UartInstance, Pins> {
|
|
||||||
inner: UartBase<UartInstance>,
|
|
||||||
pins: Pins,
|
|
||||||
}
|
|
||||||
|
|
||||||
/// Serial receiver
|
|
||||||
pub struct Rx<Uart>(Uart);
|
|
||||||
|
|
||||||
// Serial receiver, using interrupts to offload reading to the hardware.
|
|
||||||
pub struct RxWithIrq<Uart> {
|
|
||||||
inner: Rx<Uart>,
|
|
||||||
irq_info: IrqInfo,
|
|
||||||
}
|
|
||||||
|
|
||||||
/// Serial transmitter
|
|
||||||
pub struct Tx<Uart>(Uart);
|
|
||||||
|
|
||||||
impl<Uart: Instance> Rx<Uart> {
|
|
||||||
fn new(uart: Uart) -> Self {
|
|
||||||
Self(uart)
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
impl<Uart> Tx<Uart> {
|
|
||||||
fn new(uart: Uart) -> Self {
|
|
||||||
Self(uart)
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
pub trait Instance: Deref<Target = uart_base::RegisterBlock> {
|
pub trait Instance: Deref<Target = uart_base::RegisterBlock> {
|
||||||
const IDX: u8;
|
const IDX: u8;
|
||||||
const PERIPH_SEL: PeripheralSelect;
|
const PERIPH_SEL: PeripheralSelect;
|
||||||
@ -362,6 +366,17 @@ impl Instance for Uart2 {
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
//==================================================================================================
|
||||||
|
// UART implementation
|
||||||
|
//==================================================================================================
|
||||||
|
|
||||||
|
/// Type erased variant of a UART. Can be created with the [Uart::downgrade] function.
|
||||||
|
pub struct UartBase<Uart> {
|
||||||
|
uart: Uart,
|
||||||
|
tx: Tx<Uart>,
|
||||||
|
rx: Rx<Uart>,
|
||||||
|
}
|
||||||
|
|
||||||
impl<Uart: Instance> UartBase<Uart> {
|
impl<Uart: Instance> UartBase<Uart> {
|
||||||
fn init(self, config: Config, clocks: &Clocks) -> Self {
|
fn init(self, config: Config, clocks: &Clocks) -> Self {
|
||||||
if Uart::IDX == 2 {
|
if Uart::IDX == 2 {
|
||||||
@ -495,6 +510,12 @@ impl<Uart: Instance> UartBase<Uart> {
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/// Serial abstraction. Entry point to create a new UART
|
||||||
|
pub struct Uart<UartInstance, Pins> {
|
||||||
|
inner: UartBase<UartInstance>,
|
||||||
|
pins: Pins,
|
||||||
|
}
|
||||||
|
|
||||||
impl<TxPinInst: TxPin<UartInstance>, RxPinInst: RxPin<UartInstance>, UartInstance: Instance>
|
impl<TxPinInst: TxPin<UartInstance>, RxPinInst: RxPin<UartInstance>, UartInstance: Instance>
|
||||||
Uart<UartInstance, (TxPinInst, RxPinInst)>
|
Uart<UartInstance, (TxPinInst, RxPinInst)>
|
||||||
{
|
{
|
||||||
@ -551,33 +572,6 @@ impl<TxPinInst: TxPin<UartInstance>, RxPinInst: RxPin<UartInstance>, UartInstanc
|
|||||||
self
|
self
|
||||||
}
|
}
|
||||||
|
|
||||||
/// If the IRQ capabilities of the peripheral are used, the UART needs to be converted
|
|
||||||
/// with this function. Currently, IRQ abstractions are only implemented for the RX part
|
|
||||||
/// of the UART, so this function will release a TX and RX handle as well as the pin
|
|
||||||
/// instances.
|
|
||||||
pub fn split_with_irq(
|
|
||||||
self,
|
|
||||||
) -> (
|
|
||||||
Tx<UartInstance>,
|
|
||||||
RxWithIrq<UartInstance>,
|
|
||||||
(TxPinInst, RxPinInst),
|
|
||||||
) {
|
|
||||||
let (inner, pins) = self.downgrade_internal();
|
|
||||||
let (tx, rx) = inner.split();
|
|
||||||
(
|
|
||||||
tx,
|
|
||||||
RxWithIrq {
|
|
||||||
inner: rx,
|
|
||||||
irq_info: IrqInfo {
|
|
||||||
rx_len: 0,
|
|
||||||
rx_idx: 0,
|
|
||||||
mode: IrqReceptionMode::Idle,
|
|
||||||
},
|
|
||||||
},
|
|
||||||
pins,
|
|
||||||
)
|
|
||||||
}
|
|
||||||
|
|
||||||
delegate::delegate! {
|
delegate::delegate! {
|
||||||
to self.inner {
|
to self.inner {
|
||||||
#[inline]
|
#[inline]
|
||||||
@ -604,15 +598,6 @@ impl<TxPinInst: TxPin<UartInstance>, RxPinInst: RxPin<UartInstance>, UartInstanc
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
fn downgrade_internal(self) -> (UartBase<UartInstance>, (TxPinInst, RxPinInst)) {
|
|
||||||
let base = UartBase {
|
|
||||||
uart: self.inner.uart,
|
|
||||||
tx: self.inner.tx,
|
|
||||||
rx: self.inner.rx,
|
|
||||||
};
|
|
||||||
(base, self.pins)
|
|
||||||
}
|
|
||||||
|
|
||||||
pub fn downgrade(self) -> UartBase<UartInstance> {
|
pub fn downgrade(self) -> UartBase<UartInstance> {
|
||||||
UartBase {
|
UartBase {
|
||||||
uart: self.inner.uart,
|
uart: self.inner.uart,
|
||||||
@ -626,6 +611,17 @@ impl<TxPinInst: TxPin<UartInstance>, RxPinInst: RxPin<UartInstance>, UartInstanc
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/// Serial receiver.
|
||||||
|
///
|
||||||
|
/// Can be created by using the [Uart::split] or [UartBase::split] API.
|
||||||
|
pub struct Rx<Uart>(Uart);
|
||||||
|
|
||||||
|
impl<Uart: Instance> Rx<Uart> {
|
||||||
|
fn new(uart: Uart) -> Self {
|
||||||
|
Self(uart)
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
impl<Uart: Instance> Rx<Uart> {
|
impl<Uart: Instance> Rx<Uart> {
|
||||||
/// Direct access to the peripheral structure.
|
/// Direct access to the peripheral structure.
|
||||||
///
|
///
|
||||||
@ -651,11 +647,53 @@ impl<Uart: Instance> Rx<Uart> {
|
|||||||
self.0.enable().modify(|_, w| w.rxenable().clear_bit());
|
self.0.enable().modify(|_, w| w.rxenable().clear_bit());
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/// Low level function to read a word from the UART FIFO.
|
||||||
|
///
|
||||||
|
/// Uses the [nb] API to allow usage in blocking and non-blocking contexts.
|
||||||
|
///
|
||||||
|
/// Please note that you might have to mask the returned value with 0xff to retrieve the actual
|
||||||
|
/// value if you use the manual parity mode. See chapter 11.4.1 for more information.
|
||||||
|
#[inline(always)]
|
||||||
|
pub fn read_fifo(&self) -> nb::Result<u32, Infallible> {
|
||||||
|
if self.0.rxstatus().read().rdavl().bit_is_clear() {
|
||||||
|
return Err(nb::Error::WouldBlock);
|
||||||
|
}
|
||||||
|
Ok(self.read_fifo_unchecked())
|
||||||
|
}
|
||||||
|
|
||||||
|
/// Low level function to read a word from from the UART FIFO.
|
||||||
|
///
|
||||||
|
/// This does not necesarily mean there is a word in the FIFO available.
|
||||||
|
/// Use the [Self::read_fifo] function to read a word from the FIFO reliably using the [nb]
|
||||||
|
/// API.
|
||||||
|
///
|
||||||
|
/// Please note that you might have to mask the returned value with 0xff to retrieve the actual
|
||||||
|
/// value if you use the manual parity mode. See chapter 11.4.1 for more information.
|
||||||
|
#[inline(always)]
|
||||||
|
pub fn read_fifo_unchecked(&self) -> u32 {
|
||||||
|
self.0.data().read().bits()
|
||||||
|
}
|
||||||
|
|
||||||
|
pub fn to_rx_with_irq(self) -> RxWithIrq<Uart> {
|
||||||
|
RxWithIrq(self)
|
||||||
|
}
|
||||||
|
|
||||||
pub fn release(self) -> Uart {
|
pub fn release(self) -> Uart {
|
||||||
self.0
|
self.0
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/// Serial transmitter
|
||||||
|
///
|
||||||
|
/// Can be created by using the [Uart::split] or [UartBase::split] API.
|
||||||
|
pub struct Tx<Uart>(Uart);
|
||||||
|
|
||||||
|
impl<Uart> Tx<Uart> {
|
||||||
|
fn new(uart: Uart) -> Self {
|
||||||
|
Self(uart)
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
impl<Uart: Instance> Tx<Uart> {
|
impl<Uart: Instance> Tx<Uart> {
|
||||||
/// Direct access to the peripheral structure.
|
/// Direct access to the peripheral structure.
|
||||||
///
|
///
|
||||||
@ -680,9 +718,35 @@ impl<Uart: Instance> Tx<Uart> {
|
|||||||
pub fn disable(&mut self) {
|
pub fn disable(&mut self) {
|
||||||
self.0.enable().modify(|_, w| w.txenable().clear_bit());
|
self.0.enable().modify(|_, w| w.txenable().clear_bit());
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/// Low level function to write a word to the UART FIFO.
|
||||||
|
///
|
||||||
|
/// Uses the [nb] API to allow usage in blocking and non-blocking contexts.
|
||||||
|
///
|
||||||
|
/// Please note that you might have to mask the returned value with 0xff to retrieve the actual
|
||||||
|
/// value if you use the manual parity mode. See chapter 11.4.1 for more information.
|
||||||
|
#[inline(always)]
|
||||||
|
pub fn write_fifo(&self, data: u32) -> nb::Result<(), Infallible> {
|
||||||
|
if self.0.txstatus().read().wrrdy().bit_is_clear() {
|
||||||
|
return Err(nb::Error::WouldBlock);
|
||||||
|
}
|
||||||
|
self.write_fifo_unchecked(data);
|
||||||
|
Ok(())
|
||||||
|
}
|
||||||
|
|
||||||
|
/// Low level function to write a word to the UART FIFO.
|
||||||
|
///
|
||||||
|
/// This does not necesarily mean that the FIFO can process another word because it might be
|
||||||
|
/// full.
|
||||||
|
/// Use the [Self::read_fifo] function to write a word to the FIFO reliably using the [nb]
|
||||||
|
/// API.
|
||||||
|
#[inline(always)]
|
||||||
|
pub fn write_fifo_unchecked(&self, data: u32) {
|
||||||
|
self.0.data().write(|w| unsafe { w.bits(data) });
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
#[derive(Default, Debug)]
|
#[derive(Default, Debug, Copy, Clone)]
|
||||||
pub struct IrqUartError {
|
pub struct IrqUartError {
|
||||||
overflow: bool,
|
overflow: bool,
|
||||||
framing: bool,
|
framing: bool,
|
||||||
@ -691,46 +755,97 @@ pub struct IrqUartError {
|
|||||||
}
|
}
|
||||||
|
|
||||||
impl IrqUartError {
|
impl IrqUartError {
|
||||||
|
#[inline(always)]
|
||||||
|
pub fn overflow(&self) -> bool {
|
||||||
|
self.overflow
|
||||||
|
}
|
||||||
|
|
||||||
|
#[inline(always)]
|
||||||
|
pub fn framing(&self) -> bool {
|
||||||
|
self.framing
|
||||||
|
}
|
||||||
|
|
||||||
|
#[inline(always)]
|
||||||
|
pub fn parity(&self) -> bool {
|
||||||
|
self.parity
|
||||||
|
}
|
||||||
|
|
||||||
|
#[inline(always)]
|
||||||
|
pub fn other(&self) -> bool {
|
||||||
|
self.other
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
impl IrqUartError {
|
||||||
|
#[inline(always)]
|
||||||
pub fn error(&self) -> bool {
|
pub fn error(&self) -> bool {
|
||||||
self.overflow || self.framing || self.parity
|
self.overflow || self.framing || self.parity
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
#[derive(Debug)]
|
#[derive(Debug, PartialEq, Eq)]
|
||||||
pub enum IrqError {
|
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
|
||||||
BufferTooShort { found: usize, expected: usize },
|
pub struct BufferTooShortError {
|
||||||
Uart(IrqUartError),
|
found: usize,
|
||||||
|
expected: usize,
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/// Serial receiver, using interrupts to offload reading to the hardware.
|
||||||
|
///
|
||||||
|
/// You can use [Rx::to_rx_with_irq] to convert a normal [Rx] structure into this structure.
|
||||||
|
/// This structure provides two distinct ways to read the UART RX using interrupts. It should
|
||||||
|
/// be noted that the interrupt service routine (ISR) still has to be provided by the user. However,
|
||||||
|
/// this structure provides API calls which can be used inside the ISRs to simplify the reading
|
||||||
|
/// of the UART.
|
||||||
|
///
|
||||||
|
/// 1. The first way simply empties the FIFO on an interrupt into a user provided buffer. You
|
||||||
|
/// can simply use [Self::start] to prepare the peripheral and then call the
|
||||||
|
/// [Self::irq_handler] in the interrupt service routine.
|
||||||
|
/// 2. The second way reads packets bounded by a maximum size or a baudtick based timeout. You
|
||||||
|
/// can use [Self::read_fixed_len_or_timeout_based_using_irq] to prepare the peripheral and
|
||||||
|
/// then call the [Self::irq_handler_max_size_or_timeout_based] in the interrupt service
|
||||||
|
/// routine. You have to call [Self::read_fixed_len_or_timeout_based_using_irq] in the ISR to
|
||||||
|
/// start reading the next packet.
|
||||||
|
pub struct RxWithIrq<Uart>(Rx<Uart>);
|
||||||
|
|
||||||
impl<Uart: Instance> RxWithIrq<Uart> {
|
impl<Uart: Instance> RxWithIrq<Uart> {
|
||||||
/// This initializes a non-blocking read transfer using the IRQ capabilities of the UART
|
/// This function should be called once at initialization time if the regular
|
||||||
/// peripheral.
|
/// [Self::irq_handler] is used to read the UART receiver to enable and start the receiver.
|
||||||
///
|
pub fn start(&mut self) {
|
||||||
/// The only required information is the maximum length for variable sized reception
|
self.0.enable();
|
||||||
/// or the expected length for fixed length reception. If variable sized packets are expected,
|
self.enable_rx_irq_sources(true);
|
||||||
/// the timeout functionality of the IRQ should be enabled as well. After calling this function,
|
|
||||||
/// the [`irq_handler`](Self::irq_handler) function should be called in the user interrupt
|
|
||||||
/// handler to read the received packets and reinitiate another transfer if desired.
|
|
||||||
pub fn read_fixed_len_using_irq(
|
|
||||||
&mut self,
|
|
||||||
max_len: usize,
|
|
||||||
enb_timeout_irq: bool,
|
|
||||||
) -> Result<(), Error> {
|
|
||||||
if self.irq_info.mode != IrqReceptionMode::Idle {
|
|
||||||
return Err(Error::TransferPending);
|
|
||||||
}
|
|
||||||
self.irq_info.mode = IrqReceptionMode::Pending;
|
|
||||||
self.irq_info.rx_idx = 0;
|
|
||||||
self.irq_info.rx_len = max_len;
|
|
||||||
self.inner.enable();
|
|
||||||
self.enable_rx_irq_sources(enb_timeout_irq);
|
|
||||||
unsafe { enable_interrupt(Uart::IRQ_RX) };
|
unsafe { enable_interrupt(Uart::IRQ_RX) };
|
||||||
|
}
|
||||||
|
|
||||||
|
#[inline(always)]
|
||||||
|
pub fn uart(&self) -> &Uart {
|
||||||
|
&self.0 .0
|
||||||
|
}
|
||||||
|
|
||||||
|
/// This function is used together with the [Self::irq_handler_max_size_or_timeout_based]
|
||||||
|
/// function to read packets with a maximum size or variable sized packets by using the
|
||||||
|
/// receive timeout of the hardware.
|
||||||
|
///
|
||||||
|
/// This function should be called once at initialization to initiate the context state
|
||||||
|
/// and to [Self::start] the receiver. After that, it should be called after each
|
||||||
|
/// completed [Self::irq_handler_max_size_or_timeout_based] call to restart the reception
|
||||||
|
/// of a packet.
|
||||||
|
pub fn read_fixed_len_or_timeout_based_using_irq(
|
||||||
|
&mut self,
|
||||||
|
context: &mut IrqContextTimeoutOrMaxSize,
|
||||||
|
) -> Result<(), TransferPendingError> {
|
||||||
|
if context.mode != IrqReceptionMode::Idle {
|
||||||
|
return Err(TransferPendingError);
|
||||||
|
}
|
||||||
|
context.mode = IrqReceptionMode::Pending;
|
||||||
|
context.rx_idx = 0;
|
||||||
|
self.start();
|
||||||
Ok(())
|
Ok(())
|
||||||
}
|
}
|
||||||
|
|
||||||
#[inline]
|
#[inline]
|
||||||
fn enable_rx_irq_sources(&mut self, timeout: bool) {
|
fn enable_rx_irq_sources(&mut self, timeout: bool) {
|
||||||
self.inner.0.irq_enb().modify(|_, w| {
|
self.uart().irq_enb().modify(|_, w| {
|
||||||
if timeout {
|
if timeout {
|
||||||
w.irq_rx_to().set_bit();
|
w.irq_rx_to().set_bit();
|
||||||
}
|
}
|
||||||
@ -741,7 +856,7 @@ impl<Uart: Instance> RxWithIrq<Uart> {
|
|||||||
|
|
||||||
#[inline]
|
#[inline]
|
||||||
fn disable_rx_irq_sources(&mut self) {
|
fn disable_rx_irq_sources(&mut self) {
|
||||||
self.inner.0.irq_enb().modify(|_, w| {
|
self.uart().irq_enb().modify(|_, w| {
|
||||||
w.irq_rx_to().clear_bit();
|
w.irq_rx_to().clear_bit();
|
||||||
w.irq_rx_status().clear_bit();
|
w.irq_rx_status().clear_bit();
|
||||||
w.irq_rx().clear_bit()
|
w.irq_rx().clear_bit()
|
||||||
@ -750,30 +865,89 @@ impl<Uart: Instance> RxWithIrq<Uart> {
|
|||||||
|
|
||||||
pub fn cancel_transfer(&mut self) {
|
pub fn cancel_transfer(&mut self) {
|
||||||
self.disable_rx_irq_sources();
|
self.disable_rx_irq_sources();
|
||||||
self.inner.clear_fifo();
|
self.0.clear_fifo();
|
||||||
self.irq_info.rx_idx = 0;
|
|
||||||
self.irq_info.rx_len = 0;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
pub fn uart(&self) -> &Uart {
|
/// This function should be called in the user provided UART interrupt handler.
|
||||||
&self.inner.0
|
///
|
||||||
|
/// It simply empties any bytes in the FIFO into the user provided buffer and returns the
|
||||||
|
/// result of the operation.
|
||||||
|
///
|
||||||
|
/// This function will not disable the RX interrupts, so you don't need to call any other
|
||||||
|
/// API after calling this function to continue emptying the FIFO. RX errors are handled
|
||||||
|
/// as partial errors and are returned as part of the [IrqResult].
|
||||||
|
pub fn irq_handler(&mut self, buf: &mut [u8; 16]) -> IrqResult {
|
||||||
|
let mut result = IrqResult::default();
|
||||||
|
|
||||||
|
let irq_end = self.uart().irq_end().read();
|
||||||
|
let enb_status = self.uart().enable().read();
|
||||||
|
let rx_enabled = enb_status.rxenable().bit_is_set();
|
||||||
|
|
||||||
|
// Half-Full interrupt. We have a guaranteed amount of data we can read.
|
||||||
|
if irq_end.irq_rx().bit_is_set() {
|
||||||
|
let available_bytes = self.uart().rxfifoirqtrg().read().bits() as usize;
|
||||||
|
|
||||||
|
// If this interrupt bit is set, the trigger level is available at the very least.
|
||||||
|
// Read everything as fast as possible
|
||||||
|
for _ in 0..available_bytes {
|
||||||
|
buf[result.bytes_read] = (self.uart().data().read().bits() & 0xff) as u8;
|
||||||
|
result.bytes_read += 1;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
// Timeout, empty the FIFO completely.
|
||||||
|
if irq_end.irq_rx_to().bit_is_set() {
|
||||||
|
loop {
|
||||||
|
// While there is data in the FIFO, write it into the reception buffer
|
||||||
|
let read_result = self.0.read();
|
||||||
|
if let Some(byte) = self.read_handler(&mut result.errors, &read_result) {
|
||||||
|
buf[result.bytes_read] = byte;
|
||||||
|
result.bytes_read += 1;
|
||||||
|
} else {
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
// RX transfer not complete, check for RX errors
|
||||||
|
if rx_enabled {
|
||||||
|
self.check_for_errors(&mut result.errors);
|
||||||
|
}
|
||||||
|
|
||||||
|
// Clear the interrupt status bits
|
||||||
|
self.uart()
|
||||||
|
.irq_clr()
|
||||||
|
.write(|w| unsafe { w.bits(irq_end.bits()) });
|
||||||
|
result
|
||||||
}
|
}
|
||||||
|
|
||||||
/// Default IRQ handler which can be used to read the packets arriving on the UART peripheral.
|
/// This function should be called in the user provided UART interrupt handler.
|
||||||
|
///
|
||||||
|
/// This function is used to read packets which either have a maximum size or variable sized
|
||||||
|
/// packet which are bounded by sufficient delays between them, triggering a hardware timeout.
|
||||||
|
///
|
||||||
|
/// If either the maximum number of packets have been read or a timeout occured, the transfer
|
||||||
|
/// will be deemed completed. The state information of the transfer is tracked in the
|
||||||
|
/// [IrqContextTimeoutOrMaxSize] structure.
|
||||||
///
|
///
|
||||||
/// If passed buffer is equal to or larger than the specified maximum length, an
|
/// If passed buffer is equal to or larger than the specified maximum length, an
|
||||||
/// [`Error::BufferTooShort`] will be returned
|
/// [BufferTooShortError] will be returned. Other RX errors are treated as partial errors
|
||||||
pub fn irq_handler(&mut self, buf: &mut [u8]) -> Result<IrqResult, IrqError> {
|
/// and returned inside the [IrqResultMaxSizeOrTimeout] structure.
|
||||||
if buf.len() < self.irq_info.rx_len {
|
pub fn irq_handler_max_size_or_timeout_based(
|
||||||
return Err(IrqError::BufferTooShort {
|
&mut self,
|
||||||
|
context: &mut IrqContextTimeoutOrMaxSize,
|
||||||
|
buf: &mut [u8],
|
||||||
|
) -> Result<IrqResultMaxSizeOrTimeout, BufferTooShortError> {
|
||||||
|
if buf.len() < context.max_len {
|
||||||
|
return Err(BufferTooShortError {
|
||||||
found: buf.len(),
|
found: buf.len(),
|
||||||
expected: self.irq_info.rx_len,
|
expected: context.max_len,
|
||||||
});
|
});
|
||||||
}
|
}
|
||||||
let mut res = IrqResult::default();
|
let mut result = IrqResultMaxSizeOrTimeout::default();
|
||||||
|
|
||||||
let irq_end = self.inner.0.irq_end().read();
|
let irq_end = self.uart().irq_end().read();
|
||||||
let enb_status = self.inner.0.enable().read();
|
let enb_status = self.uart().enable().read();
|
||||||
let rx_enabled = enb_status.rxenable().bit_is_set();
|
let rx_enabled = enb_status.rxenable().bit_is_set();
|
||||||
|
|
||||||
// Half-Full interrupt. We have a guaranteed amount of data we can read.
|
// Half-Full interrupt. We have a guaranteed amount of data we can read.
|
||||||
@ -782,18 +956,18 @@ impl<Uart: Instance> RxWithIrq<Uart> {
|
|||||||
// We use this trick/hack because the timeout feature of the peripheral relies on data
|
// We use this trick/hack because the timeout feature of the peripheral relies on data
|
||||||
// being in the RX FIFO. If data continues arriving, another half-full IRQ will fire.
|
// being in the RX FIFO. If data continues arriving, another half-full IRQ will fire.
|
||||||
// If not, the last byte(s) is/are emptied by the timeout interrupt.
|
// If not, the last byte(s) is/are emptied by the timeout interrupt.
|
||||||
let available_bytes = self.inner.0.rxfifoirqtrg().read().bits() as usize;
|
let available_bytes = self.uart().rxfifoirqtrg().read().bits() as usize;
|
||||||
|
|
||||||
let bytes_to_read = core::cmp::min(
|
let bytes_to_read = core::cmp::min(
|
||||||
available_bytes.saturating_sub(1),
|
available_bytes.saturating_sub(1),
|
||||||
self.irq_info.rx_len - self.irq_info.rx_idx,
|
context.max_len - context.rx_idx,
|
||||||
);
|
);
|
||||||
|
|
||||||
// If this interrupt bit is set, the trigger level is available at the very least.
|
// If this interrupt bit is set, the trigger level is available at the very least.
|
||||||
// Read everything as fast as possible
|
// Read everything as fast as possible
|
||||||
for _ in 0..bytes_to_read {
|
for _ in 0..bytes_to_read {
|
||||||
buf[self.irq_info.rx_idx] = (self.inner.0.data().read().bits() & 0xff) as u8;
|
buf[context.rx_idx] = (self.uart().data().read().bits() & 0xff) as u8;
|
||||||
self.irq_info.rx_idx += 1;
|
context.rx_idx += 1;
|
||||||
}
|
}
|
||||||
|
|
||||||
// On high-baudrates, data might be available immediately, and we possible have to
|
// On high-baudrates, data might be available immediately, and we possible have to
|
||||||
@ -801,93 +975,96 @@ impl<Uart: Instance> RxWithIrq<Uart> {
|
|||||||
// rely on the hardware firing another IRQ. I have not tried baudrates higher than
|
// rely on the hardware firing another IRQ. I have not tried baudrates higher than
|
||||||
// 115200 so far.
|
// 115200 so far.
|
||||||
}
|
}
|
||||||
let read_handler =
|
|
||||||
|possible_error: &mut IrqUartError, read_res: nb::Result<u8, Error>| -> Option<u8> {
|
|
||||||
match read_res {
|
|
||||||
Ok(byte) => Some(byte),
|
|
||||||
Err(nb::Error::WouldBlock) => None,
|
|
||||||
Err(nb::Error::Other(e)) => {
|
|
||||||
match e {
|
|
||||||
Error::Overrun => {
|
|
||||||
possible_error.overflow = true;
|
|
||||||
}
|
|
||||||
Error::FramingError => {
|
|
||||||
possible_error.framing = true;
|
|
||||||
}
|
|
||||||
Error::ParityError => {
|
|
||||||
possible_error.parity = true;
|
|
||||||
}
|
|
||||||
_ => {
|
|
||||||
possible_error.other = true;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
None
|
|
||||||
}
|
|
||||||
}
|
|
||||||
};
|
|
||||||
// Timeout, empty the FIFO completely.
|
// Timeout, empty the FIFO completely.
|
||||||
if irq_end.irq_rx_to().bit_is_set() {
|
if irq_end.irq_rx_to().bit_is_set() {
|
||||||
// While there is data in the FIFO, write it into the reception buffer
|
// While there is data in the FIFO, write it into the reception buffer
|
||||||
loop {
|
loop {
|
||||||
if self.irq_info.rx_idx == self.irq_info.rx_len {
|
if context.rx_idx == context.max_len {
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
if let Some(byte) = read_handler(&mut res.errors, self.inner.read()) {
|
let read_result = self.0.read();
|
||||||
buf[self.irq_info.rx_idx] = byte;
|
if let Some(byte) = self.read_handler(&mut result.errors, &read_result) {
|
||||||
self.irq_info.rx_idx += 1;
|
buf[context.rx_idx] = byte;
|
||||||
|
context.rx_idx += 1;
|
||||||
} else {
|
} else {
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
self.irq_completion_handler(&mut res);
|
self.irq_completion_handler_max_size_timeout(&mut result, context);
|
||||||
return Ok(res);
|
return Ok(result);
|
||||||
}
|
}
|
||||||
|
|
||||||
// RX transfer not complete, check for RX errors
|
// RX transfer not complete, check for RX errors
|
||||||
if (self.irq_info.rx_idx < self.irq_info.rx_len) && rx_enabled {
|
if (context.rx_idx < context.max_len) && rx_enabled {
|
||||||
// Read status register again, might have changed since reading received data
|
self.check_for_errors(&mut result.errors);
|
||||||
let rx_status = self.inner.0.rxstatus().read();
|
|
||||||
if rx_status.rxovr().bit_is_set() {
|
|
||||||
res.errors.overflow = true;
|
|
||||||
}
|
|
||||||
if rx_status.rxfrm().bit_is_set() {
|
|
||||||
res.errors.framing = true;
|
|
||||||
}
|
|
||||||
if rx_status.rxpar().bit_is_set() {
|
|
||||||
res.errors.parity = true;
|
|
||||||
}
|
|
||||||
|
|
||||||
// If it is not a timeout, it's an error
|
|
||||||
if res.error() {
|
|
||||||
self.disable_rx_irq_sources();
|
|
||||||
return Err(IrqError::Uart(res.errors));
|
|
||||||
}
|
|
||||||
}
|
}
|
||||||
|
|
||||||
// Clear the interrupt status bits
|
// Clear the interrupt status bits
|
||||||
self.inner
|
self.uart()
|
||||||
.0
|
|
||||||
.irq_clr()
|
.irq_clr()
|
||||||
.write(|w| unsafe { w.bits(irq_end.bits()) });
|
.write(|w| unsafe { w.bits(irq_end.bits()) });
|
||||||
Ok(res)
|
Ok(result)
|
||||||
}
|
}
|
||||||
|
|
||||||
fn irq_completion_handler(&mut self, res: &mut IrqResult) {
|
fn read_handler(
|
||||||
|
&self,
|
||||||
|
errors: &mut Option<IrqUartError>,
|
||||||
|
read_res: &nb::Result<u8, RxError>,
|
||||||
|
) -> Option<u8> {
|
||||||
|
match read_res {
|
||||||
|
Ok(byte) => Some(*byte),
|
||||||
|
Err(nb::Error::WouldBlock) => None,
|
||||||
|
Err(nb::Error::Other(e)) => {
|
||||||
|
// Ensure `errors` is Some(IrqUartError), initializing if it's None
|
||||||
|
let err = errors.get_or_insert(IrqUartError::default());
|
||||||
|
|
||||||
|
// Now we can safely modify fields inside `err`
|
||||||
|
match e {
|
||||||
|
RxError::Overrun => err.overflow = true,
|
||||||
|
RxError::Framing => err.framing = true,
|
||||||
|
RxError::Parity => err.parity = true,
|
||||||
|
}
|
||||||
|
None
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
fn check_for_errors(&self, errors: &mut Option<IrqUartError>) {
|
||||||
|
let rx_status = self.uart().rxstatus().read();
|
||||||
|
|
||||||
|
if rx_status.rxovr().bit_is_set()
|
||||||
|
|| rx_status.rxfrm().bit_is_set()
|
||||||
|
|| rx_status.rxpar().bit_is_set()
|
||||||
|
{
|
||||||
|
let err = errors.get_or_insert(IrqUartError::default());
|
||||||
|
|
||||||
|
if rx_status.rxovr().bit_is_set() {
|
||||||
|
err.overflow = true;
|
||||||
|
}
|
||||||
|
if rx_status.rxfrm().bit_is_set() {
|
||||||
|
err.framing = true;
|
||||||
|
}
|
||||||
|
if rx_status.rxpar().bit_is_set() {
|
||||||
|
err.parity = true;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
fn irq_completion_handler_max_size_timeout(
|
||||||
|
&mut self,
|
||||||
|
res: &mut IrqResultMaxSizeOrTimeout,
|
||||||
|
context: &mut IrqContextTimeoutOrMaxSize,
|
||||||
|
) {
|
||||||
self.disable_rx_irq_sources();
|
self.disable_rx_irq_sources();
|
||||||
self.inner.disable();
|
self.0.disable();
|
||||||
res.bytes_read = self.irq_info.rx_idx;
|
res.bytes_read = context.rx_idx;
|
||||||
res.complete = true;
|
res.complete = true;
|
||||||
self.irq_info.mode = IrqReceptionMode::Idle;
|
context.mode = IrqReceptionMode::Idle;
|
||||||
self.irq_info.rx_idx = 0;
|
context.rx_idx = 0;
|
||||||
self.irq_info.rx_len = 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
pub fn irq_info(&self) -> &IrqInfo {
|
|
||||||
&self.irq_info
|
|
||||||
}
|
}
|
||||||
|
|
||||||
pub fn release(self) -> Uart {
|
pub fn release(self) -> Uart {
|
||||||
self.inner.release()
|
self.0.release()
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -897,18 +1074,34 @@ impl embedded_io::Error for Error {
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
impl embedded_io::Error for RxError {
|
||||||
|
fn kind(&self) -> embedded_io::ErrorKind {
|
||||||
|
embedded_io::ErrorKind::Other
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
impl embedded_hal_nb::serial::Error for Error {
|
impl embedded_hal_nb::serial::Error for Error {
|
||||||
fn kind(&self) -> embedded_hal_nb::serial::ErrorKind {
|
fn kind(&self) -> embedded_hal_nb::serial::ErrorKind {
|
||||||
embedded_hal_nb::serial::ErrorKind::Other
|
embedded_hal_nb::serial::ErrorKind::Other
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
impl embedded_hal_nb::serial::Error for RxError {
|
||||||
|
fn kind(&self) -> embedded_hal_nb::serial::ErrorKind {
|
||||||
|
match self {
|
||||||
|
RxError::Overrun => embedded_hal_nb::serial::ErrorKind::Overrun,
|
||||||
|
RxError::Framing => embedded_hal_nb::serial::ErrorKind::FrameFormat,
|
||||||
|
RxError::Parity => embedded_hal_nb::serial::ErrorKind::Parity,
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
impl<Uart> embedded_io::ErrorType for Rx<Uart> {
|
impl<Uart> embedded_io::ErrorType for Rx<Uart> {
|
||||||
type Error = Error;
|
type Error = RxError;
|
||||||
}
|
}
|
||||||
|
|
||||||
impl<Uart> embedded_hal_nb::serial::ErrorType for Rx<Uart> {
|
impl<Uart> embedded_hal_nb::serial::ErrorType for Rx<Uart> {
|
||||||
type Error = Error;
|
type Error = RxError;
|
||||||
}
|
}
|
||||||
|
|
||||||
impl<Uart: Instance> embedded_hal_nb::serial::Read<u8> for Rx<Uart> {
|
impl<Uart: Instance> embedded_hal_nb::serial::Read<u8> for Rx<Uart> {
|
||||||
@ -916,11 +1109,11 @@ impl<Uart: Instance> embedded_hal_nb::serial::Read<u8> for Rx<Uart> {
|
|||||||
let uart = unsafe { &(*Uart::ptr()) };
|
let uart = unsafe { &(*Uart::ptr()) };
|
||||||
let status_reader = uart.rxstatus().read();
|
let status_reader = uart.rxstatus().read();
|
||||||
let err = if status_reader.rxovr().bit_is_set() {
|
let err = if status_reader.rxovr().bit_is_set() {
|
||||||
Some(Error::Overrun)
|
Some(RxError::Overrun)
|
||||||
} else if status_reader.rxfrm().bit_is_set() {
|
} else if status_reader.rxfrm().bit_is_set() {
|
||||||
Some(Error::FramingError)
|
Some(RxError::Framing)
|
||||||
} else if status_reader.rxpar().bit_is_set() {
|
} else if status_reader.rxpar().bit_is_set() {
|
||||||
Some(Error::ParityError)
|
Some(RxError::Parity)
|
||||||
} else {
|
} else {
|
||||||
None
|
None
|
||||||
};
|
};
|
||||||
@ -929,14 +1122,15 @@ impl<Uart: Instance> embedded_hal_nb::serial::Read<u8> for Rx<Uart> {
|
|||||||
// and parity status bits. We have to read the DATA register
|
// and parity status bits. We have to read the DATA register
|
||||||
// so that the next status reflects the next DATA word
|
// so that the next status reflects the next DATA word
|
||||||
// For overrun error, we read as well to clear the peripheral
|
// For overrun error, we read as well to clear the peripheral
|
||||||
uart.data().read().bits();
|
self.read_fifo_unchecked();
|
||||||
Err(err.into())
|
return Err(err.into());
|
||||||
} else if status_reader.rdavl().bit_is_set() {
|
|
||||||
let data = uart.data().read().bits();
|
|
||||||
Ok((data & 0xff) as u8)
|
|
||||||
} else {
|
|
||||||
Err(nb::Error::WouldBlock)
|
|
||||||
}
|
}
|
||||||
|
self.read_fifo().map(|val| (val & 0xff) as u8).map_err(|e| {
|
||||||
|
if let nb::Error::Other(_) = e {
|
||||||
|
unreachable!()
|
||||||
|
}
|
||||||
|
nb::Error::WouldBlock
|
||||||
|
})
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -956,28 +1150,16 @@ impl<Uart: Instance> embedded_io::Read for Rx<Uart> {
|
|||||||
}
|
}
|
||||||
|
|
||||||
impl<Uart> embedded_io::ErrorType for Tx<Uart> {
|
impl<Uart> embedded_io::ErrorType for Tx<Uart> {
|
||||||
type Error = Error;
|
type Error = Infallible;
|
||||||
}
|
}
|
||||||
|
|
||||||
impl<Uart> embedded_hal_nb::serial::ErrorType for Tx<Uart> {
|
impl<Uart> embedded_hal_nb::serial::ErrorType for Tx<Uart> {
|
||||||
type Error = Error;
|
type Error = Infallible;
|
||||||
}
|
}
|
||||||
|
|
||||||
impl<Uart: Instance> embedded_hal_nb::serial::Write<u8> for Tx<Uart> {
|
impl<Uart: Instance> embedded_hal_nb::serial::Write<u8> for Tx<Uart> {
|
||||||
fn write(&mut self, word: u8) -> nb::Result<(), Self::Error> {
|
fn write(&mut self, word: u8) -> nb::Result<(), Self::Error> {
|
||||||
let reader = unsafe { &(*Uart::ptr()) }.txstatus().read();
|
self.write_fifo(word as u32)
|
||||||
if reader.wrrdy().bit_is_clear() {
|
|
||||||
return Err(nb::Error::WouldBlock);
|
|
||||||
} else {
|
|
||||||
// DPARITY bit not supported yet
|
|
||||||
unsafe {
|
|
||||||
// NOTE(unsafe) atomic write to data register
|
|
||||||
// NOTE(write_volatile) 8-bit write that's not
|
|
||||||
// possible through the svd2rust API
|
|
||||||
(*Uart::ptr()).data().write(|w| w.bits(word as u32));
|
|
||||||
}
|
|
||||||
}
|
|
||||||
Ok(())
|
|
||||||
}
|
}
|
||||||
|
|
||||||
fn flush(&mut self) -> nb::Result<(), Self::Error> {
|
fn flush(&mut self) -> nb::Result<(), Self::Error> {
|
||||||
@ -1020,16 +1202,26 @@ impl<UartInstance> embedded_hal_nb::serial::ErrorType for UartBase<UartInstance>
|
|||||||
|
|
||||||
impl<Uart: Instance> embedded_hal_nb::serial::Read<u8> for UartBase<Uart> {
|
impl<Uart: Instance> embedded_hal_nb::serial::Read<u8> for UartBase<Uart> {
|
||||||
fn read(&mut self) -> nb::Result<u8, Self::Error> {
|
fn read(&mut self) -> nb::Result<u8, Self::Error> {
|
||||||
self.rx.read()
|
self.rx.read().map_err(|e| e.map(Error::Rx))
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
impl<Uart: Instance> embedded_hal_nb::serial::Write<u8> for UartBase<Uart> {
|
impl<Uart: Instance> embedded_hal_nb::serial::Write<u8> for UartBase<Uart> {
|
||||||
fn write(&mut self, word: u8) -> nb::Result<(), Self::Error> {
|
fn write(&mut self, word: u8) -> nb::Result<(), Self::Error> {
|
||||||
self.tx.write(word)
|
self.tx.write(word).map_err(|e| {
|
||||||
|
if let nb::Error::Other(_) = e {
|
||||||
|
unreachable!()
|
||||||
|
}
|
||||||
|
nb::Error::WouldBlock
|
||||||
|
})
|
||||||
}
|
}
|
||||||
|
|
||||||
fn flush(&mut self) -> nb::Result<(), Self::Error> {
|
fn flush(&mut self) -> nb::Result<(), Self::Error> {
|
||||||
self.tx.flush()
|
self.tx.flush().map_err(|e| {
|
||||||
|
if let nb::Error::Other(_) = e {
|
||||||
|
unreachable!()
|
||||||
|
}
|
||||||
|
nb::Error::WouldBlock
|
||||||
|
})
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
@ -350,6 +350,36 @@
|
|||||||
]
|
]
|
||||||
}
|
}
|
||||||
},
|
},
|
||||||
|
{
|
||||||
|
"type": "cortex-debug",
|
||||||
|
"request": "launch",
|
||||||
|
"name": "UART Echo with IRQ",
|
||||||
|
"servertype": "jlink",
|
||||||
|
"jlinkscript": "${workspaceFolder}/jlink/JLinkSettings.JLinkScript",
|
||||||
|
"cwd": "${workspaceRoot}",
|
||||||
|
"device": "Cortex-M4",
|
||||||
|
"svdFile": "${workspaceFolder}/va416xx/svd/va416xx.svd.patched",
|
||||||
|
"preLaunchTask": "uart-echo-with-irq",
|
||||||
|
"overrideLaunchCommands": [
|
||||||
|
"monitor halt",
|
||||||
|
"monitor reset",
|
||||||
|
"load",
|
||||||
|
],
|
||||||
|
"executable": "${workspaceFolder}/target/thumbv7em-none-eabihf/debug/uart-echo-with-irq",
|
||||||
|
"interface": "swd",
|
||||||
|
"runToEntryPoint": "main",
|
||||||
|
"rttConfig": {
|
||||||
|
"enabled": true,
|
||||||
|
"address": "auto",
|
||||||
|
"decoders": [
|
||||||
|
{
|
||||||
|
"port": 0,
|
||||||
|
"timestamp": true,
|
||||||
|
"type": "console"
|
||||||
|
}
|
||||||
|
]
|
||||||
|
}
|
||||||
|
},
|
||||||
{
|
{
|
||||||
"type": "cortex-debug",
|
"type": "cortex-debug",
|
||||||
"request": "launch",
|
"request": "launch",
|
||||||
|
@ -95,6 +95,19 @@
|
|||||||
"kind": "build",
|
"kind": "build",
|
||||||
}
|
}
|
||||||
},
|
},
|
||||||
|
{
|
||||||
|
"label": "uart-echo-with-irq",
|
||||||
|
"type": "shell",
|
||||||
|
"command": "~/.cargo/bin/cargo", // note: full path to the cargo
|
||||||
|
"args": [
|
||||||
|
"build",
|
||||||
|
"--bin",
|
||||||
|
"uart-echo-with-irq"
|
||||||
|
],
|
||||||
|
"group": {
|
||||||
|
"kind": "build",
|
||||||
|
}
|
||||||
|
},
|
||||||
{
|
{
|
||||||
"label": "pwm-example",
|
"label": "pwm-example",
|
||||||
"type": "shell",
|
"type": "shell",
|
||||||
@ -200,4 +213,4 @@
|
|||||||
}
|
}
|
||||||
},
|
},
|
||||||
]
|
]
|
||||||
}
|
}
|
Reference in New Issue
Block a user