Update SVD files #1
@ -1,11 +1,11 @@
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<?xml version="1.1" encoding="UTF-8"?>
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<device schemaVersion="1.1" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="CMSIS-SVD.xsd">
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<device xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" schemaVersion="1.1" xs:noNamespaceSchemaLocation="CMSIS-SVD.xsd">
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<vendor>VORAGO TECHNOLOGIES</vendor>
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<vendorID>SST</vendorID>
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<name>va416xx</name>
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<series>M4</series>
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<version>1.3</version>
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<!--Release History
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<!--Release History
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V1.3 - Feb 2020 - Ethernet, Removed unsupported registers, renamed registers for brevity and clarity.
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V1.2 - Feb 2017 - Added missing CSDTRG2 in CSD_CTRL register
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V1.1 - March 2016
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@ -38,13 +38,18 @@ V1.0 - Original release Dec 2015
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</cpu>
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<headerSystemFilename>system_va416xx</headerSystemFilename>
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<headerDefinitionsPrefix>VOR_</headerDefinitionsPrefix>
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<addressUnitBits>8</addressUnitBits><!--byte addressable memory-->
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<width>32</width><!--bus width is 32 bits-->
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<addressUnitBits>8</addressUnitBits>
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<!--byte addressable memory-->
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<width>32</width>
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<!--bus width is 32 bits-->
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<!-- registerPropertiesGroup: default settings implicitly inherited by subsequent sections -->
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<size>32</size>
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<access>read-write</access><!-- default size (number of bits) of all peripherals -->
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<resetValue>0x00000000</resetValue><!-- by default all bits of the registers are initialized to 0 on reset -->
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<resetMask>0xFFFFFFFF</resetMask><!-- by default all 32Bits of the registers are used -->
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<access>read-write</access>
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<!-- default size (number of bits) of all peripherals -->
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<resetValue>0x00000000</resetValue>
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<!-- by default all bits of the registers are initialized to 0 on reset -->
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<resetMask>0xFFFFFFFF</resetMask>
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<!-- by default all 32Bits of the registers are used -->
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<peripherals>
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<!-- **************************************************************************************** -->
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<!--Clock Generator Peripheral-->
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@ -850,7 +855,8 @@ V1.0 - Original release Dec 2015
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<name>JMP2BOOT</name>
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<description>Enables a skip of all delay counters and eFuse read</description>
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<bitRange>[19:19]</bitRange>
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</field> <field>
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</field>
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<field>
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<name>SKIPBOOT</name>
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<description>Enables a skip of all delay counters, eFuse read, and boot</description>
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<bitRange>[20:20]</bitRange>
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@ -1102,7 +1108,7 @@ V1.0 - Original release Dec 2015
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</register>
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</registers>
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</peripheral>
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<peripheral>
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<peripheral>
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<name>DMA</name>
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<version>1.0</version>
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<description>DMA Controller Block</description>
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@ -3063,7 +3069,7 @@ V1.0 - Original release Dec 2015
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</register>
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<register>
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<name>IRQ_EVT</name>
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<description>Interrupt Event Register (1:HighLevel/L->H Edge, 0:LowLevel/H->L Edge)</description>
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<description>Interrupt Event Register (1:HighLevel/L->H Edge, 0:LowLevel/H->L Edge)</description>
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<addressOffset>0x03c</addressOffset>
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<resetValue>0x00000000</resetValue>
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</register>
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@ -3990,7 +3996,7 @@ V1.0 - Original release Dec 2015
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<fields>
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<field>
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<name>SIZE</name>
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<description>Data Size(0x3=>4, 0xf=>16)</description>
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<description>Data Size(0x3=>4, 0xf=>16)</description>
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<bitRange>[3:0]</bitRange>
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</field>
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<field>
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@ -5107,7 +5113,7 @@ V1.0 - Original release Dec 2015
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<name>I2C2</name>
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<baseAddress>0x40016800</baseAddress>
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</peripheral>
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<!-- **************************************************************************************** -->
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<!-- **************************************************************************************** -->
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<!-- CAN -->
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<peripheral>
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<name>CAN0</name>
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@ -6433,7 +6439,6 @@ V1.0 - Original release Dec 2015
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<addressOffset>0x130</addressOffset>
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<resetValue>0x00000000</resetValue>
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<fields>
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<field>
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<name>BYTE3</name>
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<description>Data Byte 3</description>
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@ -6638,7 +6643,6 @@ V1.0 - Original release Dec 2015
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<description>Data Length Code</description>
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<bitRange>[15:12]</bitRange>
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</field>
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<field>
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<name>PRI</name>
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<description>Transmit Priority Code</description>
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@ -7672,7 +7676,7 @@ V1.0 - Original release Dec 2015
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<name>CAN1</name>
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<baseAddress>0x40014400</baseAddress>
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</peripheral>
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<!-- **************************************************************************************** -->
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<!-- **************************************************************************************** -->
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<!-- ADC -->
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<peripheral>
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<name>ADC</name>
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@ -7964,7 +7968,7 @@ V1.0 - Original release Dec 2015
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</register>
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</registers>
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</peripheral>
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<!-- **************************************************************************************** -->
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<!-- **************************************************************************************** -->
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<!-- DAC -->
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<peripheral>
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<name>DAC0</name>
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@ -8257,7 +8261,7 @@ V1.0 - Original release Dec 2015
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<name>DAC1</name>
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<baseAddress>0x40023800</baseAddress>
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</peripheral>
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<!-- **************************************************************************************** -->
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<!-- **************************************************************************************** -->
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<!-- SpaceWire -->
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<peripheral>
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<name>SPW</name>
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@ -8397,15 +8401,18 @@ V1.0 - Original release Dec 2015
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<name>TQ</name>
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<description>Generate interrupt when a valid time-code is received</description>
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<bitRange>[8:8]</bitRange>
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</field> <field>
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</field>
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<field>
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<name>RS</name>
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<description>Make complete reset of the SpaceWire node. Self-clearing</description>
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<bitRange>[6:6]</bitRange>
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</field> <field>
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</field>
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<field>
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<name>PM</name>
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<description>Enable Promiscuous mode</description>
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<bitRange>[5:5]</bitRange>
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</field> <field>
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</field>
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<field>
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<name>TI</name>
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<description>The host can generate a tick by writing a one to this field</description>
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<bitRange>[4:4]</bitRange>
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@ -8796,7 +8803,7 @@ V1.0 - Original release Dec 2015
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</field>
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</fields>
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</register>
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<!-- <register derivedFrom="DMACTRL0">
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<!-- <register derivedFrom="DMACTRL0">
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<name>DMACTRL1</name>
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<description>DMA Control Register</description>
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<addressOffset>0x040</addressOffset>
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@ -8881,7 +8888,7 @@ V1.0 - Original release Dec 2015
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<addressOffset>0x090</addressOffset>
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<access>read-write</access>
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</register> -->
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<!-- <register>
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<!-- <register>
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<name>INTCTRL</name>
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<description>Interrupt Control Register</description>
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<addressOffset>0x0a0</addressOffset>
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@ -9193,7 +9200,7 @@ V1.0 - Original release Dec 2015
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</field>
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</fields>
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</register> -->
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<!-- <register>
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<!-- <register>
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<name>PNPVEND</name>
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<description>SpaceWire PnP Device Vendor and Product ID</description>
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<addressOffset>0x0e0</addressOffset>
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@ -9357,7 +9364,7 @@ V1.0 - Original release Dec 2015
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</register> -->
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</registers>
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</peripheral>
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<!-- **************************************************************************************** -->
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<!-- **************************************************************************************** -->
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<!--Interrupt Router -->
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<peripheral>
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<name>IRQ_ROUTER</name>
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@ -9664,7 +9671,7 @@ V1.0 - Original release Dec 2015
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</register>
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</registers>
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</peripheral>
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<!-- **************************************************************************************** -->
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<!-- **************************************************************************************** -->
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<!--Watchdog -->
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<peripheral>
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<name>WATCH_DOG</name>
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@ -9933,7 +9940,7 @@ the counter from the value in the WDOGLOAD Register</description>
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</register>
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</registers>
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</peripheral>
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<!-- **************************************************************************************** -->
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<!-- **************************************************************************************** -->
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<!--TRNG -->
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<peripheral>
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<name>TRNG</name>
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@ -10244,7 +10251,7 @@ the counter from the value in the WDOGLOAD Register</description>
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</register>
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</registers>
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</peripheral>
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<!-- **************************************************************************************** -->
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<!-- **************************************************************************************** -->
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<!--ETHERNET -->
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<peripheral>
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<name>ETH</name>
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@ -10261,7 +10268,7 @@ the counter from the value in the WDOGLOAD Register</description>
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<value>36</value>
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</interrupt>
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<headerStructName>ETH</headerStructName>
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<!-- GMAC Register Map -->
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<!-- GMAC Register Map -->
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<registers>
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<register>
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<name>MAC_CONFIG</name>
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@ -10734,7 +10741,7 @@ the counter from the value in the WDOGLOAD Register</description>
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</field>
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</fields>
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</register>
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<!-- MAC Management Counters registers -->
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<!-- MAC Management Counters registers -->
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<register>
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<name>MMC_CNTRL</name>
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<description>MMC Control Register</description>
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@ -12342,7 +12349,7 @@ the counter from the value in the WDOGLOAD Register</description>
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</field>
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</fields>
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</register>
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<!-- DMA Register definitions -->
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<!-- DMA Register definitions -->
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<register>
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<name>DMA_BUS_MODE</name>
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<description>Controls the DMA Host Interface Mode</description>
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Block a user