Update SVD files #1
@ -1,39 +0,0 @@
|
|||||||
[target.'cfg(all(target_arch = "arm", target_os = "none"))']
|
|
||||||
# uncomment ONE of these three option to make `cargo run` start a GDB session
|
|
||||||
# which option to pick depends on your system
|
|
||||||
# If the RevA board is used, replace jlink.gdb with jlink-reva.gdb
|
|
||||||
# runner = "arm-none-eabi-gdb -q -x jlink/jlink.gdb"
|
|
||||||
runner = "gdb-multiarch -q -x jlink/jlink.gdb"
|
|
||||||
|
|
||||||
# runner = "arm-none-eabi-gdb -q -x jlink/jlink-reva.gdb"
|
|
||||||
# runner = "gdb-multiarch -q -x jlink/jlink-reva.gdb"
|
|
||||||
|
|
||||||
rustflags = [
|
|
||||||
# This is needed if your flash or ram addresses are not aligned to 0x10000 in memory.x
|
|
||||||
# See https://github.com/rust-embedded/cortex-m-quickstart/pull/95
|
|
||||||
"-C", "link-arg=--nmagic",
|
|
||||||
|
|
||||||
# LLD (shipped with the Rust toolchain) is used as the default linker
|
|
||||||
"-C", "link-arg=-Tlink.x",
|
|
||||||
|
|
||||||
# if you run into problems with LLD switch to the GNU linker by commenting out
|
|
||||||
# this line
|
|
||||||
# "-C", "linker=arm-none-eabi-ld",
|
|
||||||
|
|
||||||
# if you need to link to pre-compiled C libraries provided by a C toolchain
|
|
||||||
# use GCC as the linker by commenting out both lines above and then
|
|
||||||
# uncommenting the three lines below
|
|
||||||
# "-C", "linker=arm-none-eabi-gcc",
|
|
||||||
# "-C", "link-arg=-Wl,-Tlink.x",
|
|
||||||
# "-C", "link-arg=-nostartfiles",
|
|
||||||
]
|
|
||||||
|
|
||||||
[build]
|
|
||||||
# Pick ONE of these compilation targets
|
|
||||||
# target = "thumbv6m-none-eabi" # Cortex-M0 and Cortex-M0+
|
|
||||||
# target = "thumbv7m-none-eabi" # Cortex-M3
|
|
||||||
# target = "thumbv7em-none-eabi" # Cortex-M4 and Cortex-M7 (no FPU)
|
|
||||||
target = "thumbv7em-none-eabihf" # Cortex-M4F and Cortex-M7F (with FPU)
|
|
||||||
# target = "thumbv8m.base-none-eabi" # Cortex-M23
|
|
||||||
# target = "thumbv8m.main-none-eabi" # Cortex-M33 (no FPU)
|
|
||||||
# target = "thumbv8m.main-none-eabihf" # Cortex-M33 (with FPU)
|
|
38
.cargo/def-config.toml
Normal file
38
.cargo/def-config.toml
Normal file
@ -0,0 +1,38 @@
|
|||||||
|
[target.'cfg(all(target_arch = "arm", target_os = "none"))']
|
||||||
|
runner = "gdb-multiarch -q -x jlink/jlink.gdb"
|
||||||
|
# runner = "arm-none-eabi-gdb -q -x jlink/jlink-reva.gdb"
|
||||||
|
# runner = "gdb-multiarch -q -x jlink/jlink-reva.gdb"
|
||||||
|
|
||||||
|
# Probe-rs is currently problematic, possibly because of the
|
||||||
|
# ROM protection?
|
||||||
|
# runner = "probe-rs run --chip-description-path ./scripts/VA416xx_Series.yaml"
|
||||||
|
# runner = ["probe-rs", "run", "--chip", "$CHIP", "--log-format", "{L} {s}"]
|
||||||
|
|
||||||
|
|
||||||
|
rustflags = [
|
||||||
|
"-C",
|
||||||
|
"link-arg=-Tlink.x",
|
||||||
|
# "-C",
|
||||||
|
# "linker=flip-link",
|
||||||
|
# "-C",
|
||||||
|
# "link-arg=-Tdefmt.x",
|
||||||
|
# This is needed if your flash or ram addresses are not aligned to 0x10000 in memory.x
|
||||||
|
# See https://github.com/rust-embedded/cortex-m-quickstart/pull/95
|
||||||
|
"-C",
|
||||||
|
"link-arg=--nmagic",
|
||||||
|
]
|
||||||
|
|
||||||
|
[build]
|
||||||
|
# (`thumbv6m-*` is compatible with all ARM Cortex-M chips but using the right
|
||||||
|
# target improves performance)
|
||||||
|
# target = "thumbv6m-none-eabi" # Cortex-M0 and Cortex-M0+
|
||||||
|
# target = "thumbv7m-none-eabi" # Cortex-M3
|
||||||
|
# target = "thumbv7em-none-eabi" # Cortex-M4 and Cortex-M7 (no FPU)
|
||||||
|
target = "thumbv7em-none-eabihf" # Cortex-M4F and Cortex-M7F (with FPU)
|
||||||
|
|
||||||
|
[alias]
|
||||||
|
rb = "run --bin"
|
||||||
|
rrb = "run --release --bin"
|
||||||
|
|
||||||
|
[env]
|
||||||
|
DEFMT_LOG = "info"
|
Loading…
Reference in New Issue
Block a user