UART, CLKGEN & WDT #3
23
Cargo.toml
23
Cargo.toml
@ -1,17 +1,26 @@
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[workspace]
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resolver = "2"
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members = [ "examples/simple",
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members = [
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"examples/simple",
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"va416xx",
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"va416xx-hal",
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"vorago-peb1"
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]
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[profile.dev]
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lto = false
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debug = true
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codegen-units = 1
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debug = 2
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debug-assertions = true # <-
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incremental = false
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opt-level = 'z' # <-
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overflow-checks = true # <-
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# cargo build/run --release
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[profile.release]
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# Can be problematic for debugging
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lto = true
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debug = true
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opt-level = 's'
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codegen-units = 1
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debug = 2
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debug-assertions = false # <-
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incremental = false
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lto = 'fat'
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opt-level = 3 # <-
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overflow-checks = false # <-
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