118 lines
3.7 KiB
Rust
118 lines
3.7 KiB
Rust
//! This is the **H**ardware **A**bstraction **L**ayer (HAL) for the VA416xx MCU family.
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//!
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//! It is an additional hardware abstraction on top of the [peripheral access API](https://egit.irs.uni-stuttgart.de/rust/va416xx-rs/src/branch/main/va416xx).
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//!
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//! It is the result of reading the datasheet for the device and encoding a type-safe layer over the
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//! raw PAC. This crate also implements traits specified by the
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//! [embedded-hal](https://github.com/rust-embedded/embedded-hal) project, making it compatible with
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//! various drivers in the embedded rust ecosystem.
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//!
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//! It is generally advised to enable ONE of the following device features to use this crate
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//! depending on which chip you are using:
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//!
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//! - `va41630`
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//! - `va41629`
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//! - `va41628`
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//! - `va41620`
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//!
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//! If no option is specified, only access to APIs which are common for all families or
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//! which are not disabled for specific families is granted.
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//!
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//! When using this HAL and writing applications for the VA416xx family in general, it is strongly
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//! recommended that you set up the clock properly, because the default internal HBO clock
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//! is not very accurate. You can use the [crate::clock] module for this. If you are working
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//! with interrupts, it is strongly recommended to set up the IRQ router with the
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//! [crate::irq_router] module at the very least because that peripheral has confusing and/or
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//! faulty register reset values which might lead to weird bugs and glitches.
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#![no_std]
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#![cfg_attr(docsrs, feature(doc_auto_cfg))]
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#[cfg(test)]
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extern crate std;
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use gpio::Port;
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pub use va416xx as device;
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pub use va416xx as pac;
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pub mod prelude;
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pub mod clock;
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pub mod dma;
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pub mod edac;
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pub mod gpio;
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pub mod i2c;
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pub mod irq_router;
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pub mod pwm;
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pub mod spi;
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pub mod time;
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pub mod timer;
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pub mod typelevel;
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pub mod uart;
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pub mod wdt;
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#[cfg(feature = "va41630")]
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pub mod nvm;
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#[cfg(not(feature = "va41628"))]
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pub mod adc;
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#[cfg(not(feature = "va41628"))]
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pub mod dac;
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#[derive(Debug, Eq, Copy, Clone, PartialEq)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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pub enum FunSel {
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Sel0 = 0b00,
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Sel1 = 0b01,
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Sel2 = 0b10,
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Sel3 = 0b11,
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}
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#[derive(Debug, PartialEq, Eq, thiserror::Error)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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#[error("invalid pin with number {0}")]
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pub struct InvalidPinError(u8);
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/// Can be used to manually manipulate the function select of port pins.
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///
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/// The function selection table can be found on p.286 of the programmers guide. Please note
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/// that most of the structures and APIs in this library will automatically correctly configure
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/// the pin or statically expect the correct pin type.
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#[inline]
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pub fn port_function_select(
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ioconfig: &mut pac::Ioconfig,
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port: Port,
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pin: u8,
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funsel: FunSel,
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) -> Result<(), InvalidPinError> {
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if (port == Port::G && pin >= 8) || pin >= 16 {
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return Err(InvalidPinError(pin));
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}
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let reg_block = match port {
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Port::A => ioconfig.porta(pin as usize),
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Port::B => ioconfig.portb0(pin as usize),
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Port::C => ioconfig.portc0(pin as usize),
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Port::D => ioconfig.portd0(pin as usize),
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Port::E => ioconfig.porte0(pin as usize),
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Port::F => ioconfig.portf0(pin as usize),
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Port::G => ioconfig.portg0(pin as usize),
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};
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reg_block.modify(|_, w| unsafe { w.funsel().bits(funsel as u8) });
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Ok(())
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}
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/// Enable a specific interrupt using the NVIC peripheral.
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///
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/// # Safety
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///
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/// This function is `unsafe` because it can break mask-based critical sections.
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#[inline]
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pub unsafe fn enable_nvic_interrupt(irq: pac::Interrupt) {
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cortex_m::peripheral::NVIC::unmask(irq);
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}
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/// Disable a specific interrupt using the NVIC peripheral.
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#[inline]
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pub fn disable_nvic_interrupt(irq: pac::Interrupt) {
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cortex_m::peripheral::NVIC::mask(irq);
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}
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