Robin Mueller
5d1740efea
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Rust/va416xx-rs/pipeline/head This commit looks good
Monorepo for Rust support of VA416XX family of radiation hardened MCUs
93 lines
3.3 KiB
Rust
93 lines
3.3 KiB
Rust
#[doc = "Register `RXSTATUS` reader"]
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pub type R = crate::R<RxstatusSpec>;
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#[doc = "Field `RDAVL` reader - Read Data Available"]
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pub type RdavlR = crate::BitReader;
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#[doc = "Field `RDNFULL` reader - Read Fifo NOT Full"]
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pub type RdnfullR = crate::BitReader;
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#[doc = "Field `RXBUSY` reader - RX Busy Receiving"]
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pub type RxbusyR = crate::BitReader;
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#[doc = "Field `RXTO` reader - RX Receive Timeout"]
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pub type RxtoR = crate::BitReader;
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#[doc = "Field `RXOVR` reader - Read Fifo Overflow"]
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pub type RxovrR = crate::BitReader;
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#[doc = "Field `RXFRM` reader - RX Framing Error"]
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pub type RxfrmR = crate::BitReader;
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#[doc = "Field `RXPAR` reader - RX Parity Error"]
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pub type RxparR = crate::BitReader;
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#[doc = "Field `RXBRK` reader - RX Break Error"]
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pub type RxbrkR = crate::BitReader;
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#[doc = "Field `RXBUSYBRK` reader - RX Busy Receiving Break"]
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pub type RxbusybrkR = crate::BitReader;
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#[doc = "Field `RXADDR9` reader - Address Match for 9 bit mode"]
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pub type Rxaddr9R = crate::BitReader;
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#[doc = "Field `RXRTSN` reader - RX RTSn Output Value"]
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pub type RxrtsnR = crate::BitReader;
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impl R {
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#[doc = "Bit 0 - Read Data Available"]
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#[inline(always)]
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pub fn rdavl(&self) -> RdavlR {
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RdavlR::new((self.bits & 1) != 0)
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}
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#[doc = "Bit 1 - Read Fifo NOT Full"]
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#[inline(always)]
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pub fn rdnfull(&self) -> RdnfullR {
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RdnfullR::new(((self.bits >> 1) & 1) != 0)
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}
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#[doc = "Bit 2 - RX Busy Receiving"]
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#[inline(always)]
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pub fn rxbusy(&self) -> RxbusyR {
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RxbusyR::new(((self.bits >> 2) & 1) != 0)
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}
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#[doc = "Bit 3 - RX Receive Timeout"]
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#[inline(always)]
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pub fn rxto(&self) -> RxtoR {
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RxtoR::new(((self.bits >> 3) & 1) != 0)
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}
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#[doc = "Bit 4 - Read Fifo Overflow"]
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#[inline(always)]
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pub fn rxovr(&self) -> RxovrR {
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RxovrR::new(((self.bits >> 4) & 1) != 0)
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}
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#[doc = "Bit 5 - RX Framing Error"]
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#[inline(always)]
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pub fn rxfrm(&self) -> RxfrmR {
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RxfrmR::new(((self.bits >> 5) & 1) != 0)
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}
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#[doc = "Bit 6 - RX Parity Error"]
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#[inline(always)]
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pub fn rxpar(&self) -> RxparR {
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RxparR::new(((self.bits >> 6) & 1) != 0)
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}
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#[doc = "Bit 7 - RX Break Error"]
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#[inline(always)]
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pub fn rxbrk(&self) -> RxbrkR {
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RxbrkR::new(((self.bits >> 7) & 1) != 0)
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}
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#[doc = "Bit 8 - RX Busy Receiving Break"]
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#[inline(always)]
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pub fn rxbusybrk(&self) -> RxbusybrkR {
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RxbusybrkR::new(((self.bits >> 8) & 1) != 0)
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}
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#[doc = "Bit 9 - Address Match for 9 bit mode"]
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#[inline(always)]
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pub fn rxaddr9(&self) -> Rxaddr9R {
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Rxaddr9R::new(((self.bits >> 9) & 1) != 0)
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}
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#[doc = "Bit 15 - RX RTSn Output Value"]
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#[inline(always)]
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pub fn rxrtsn(&self) -> RxrtsnR {
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RxrtsnR::new(((self.bits >> 15) & 1) != 0)
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}
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}
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#[doc = "Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxstatus::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
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pub struct RxstatusSpec;
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impl crate::RegisterSpec for RxstatusSpec {
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type Ux = u32;
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}
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#[doc = "`read()` method returns [`rxstatus::R`](R) reader structure"]
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impl crate::Readable for RxstatusSpec {}
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#[doc = "`reset()` method sets RXSTATUS to value 0"]
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impl crate::Resettable for RxstatusSpec {
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const RESET_VALUE: u32 = 0;
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}
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