Robin Mueller
5d1740efea
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Rust/va416xx-rs/pipeline/head This commit looks good
Monorepo for Rust support of VA416XX family of radiation hardened MCUs
206 lines
7.0 KiB
Rust
206 lines
7.0 KiB
Rust
#[doc = "Register `CGCR` reader"]
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pub type R = crate::R<CgcrSpec>;
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#[doc = "Register `CGCR` writer"]
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pub type W = crate::W<CgcrSpec>;
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#[doc = "Field `CANEN` reader - CAN Enable"]
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pub type CanenR = crate::BitReader;
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#[doc = "Field `CANEN` writer - CAN Enable"]
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pub type CanenW<'a, REG> = crate::BitWriter<'a, REG>;
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#[doc = "Field `CRX` reader - RW,Control Receive"]
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pub type CrxR = crate::BitReader;
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#[doc = "Field `CRX` writer - RW,Control Receive"]
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pub type CrxW<'a, REG> = crate::BitWriter<'a, REG>;
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#[doc = "Field `CTX` reader - RW,Control Transmit"]
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pub type CtxR = crate::BitReader;
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#[doc = "Field `CTX` writer - RW,Control Transmit"]
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pub type CtxW<'a, REG> = crate::BitWriter<'a, REG>;
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#[doc = "Field `BUFFLOCK` reader - Buffer Lock"]
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pub type BufflockR = crate::BitReader;
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#[doc = "Field `BUFFLOCK` writer - Buffer Lock"]
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pub type BufflockW<'a, REG> = crate::BitWriter<'a, REG>;
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#[doc = "Field `TSTPEN` reader - Time Sync Enable"]
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pub type TstpenR = crate::BitReader;
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#[doc = "Field `TSTPEN` writer - Time Sync Enable"]
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pub type TstpenW<'a, REG> = crate::BitWriter<'a, REG>;
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#[doc = "Field `DDIR` reader - Data Direction"]
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pub type DdirR = crate::BitReader;
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#[doc = "Field `DDIR` writer - Data Direction"]
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pub type DdirW<'a, REG> = crate::BitWriter<'a, REG>;
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#[doc = "Field `LO` reader - Listen Only"]
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pub type LoR = crate::BitReader;
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#[doc = "Field `LO` writer - Listen Only"]
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pub type LoW<'a, REG> = crate::BitWriter<'a, REG>;
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#[doc = "Field `IGNACK` reader - Ignore Acknowledge"]
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pub type IgnackR = crate::BitReader;
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#[doc = "Field `IGNACK` writer - Ignore Acknowledge"]
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pub type IgnackW<'a, REG> = crate::BitWriter<'a, REG>;
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#[doc = "Field `LOOPBACK` reader - Loopback"]
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pub type LoopbackR = crate::BitReader;
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#[doc = "Field `LOOPBACK` writer - Loopback"]
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pub type LoopbackW<'a, REG> = crate::BitWriter<'a, REG>;
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#[doc = "Field `INTERNAL` reader - Internal"]
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pub type InternalR = crate::BitReader;
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#[doc = "Field `INTERNAL` writer - Internal"]
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pub type InternalW<'a, REG> = crate::BitWriter<'a, REG>;
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#[doc = "Field `DIAGEN` reader - Diagnostic Enable"]
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pub type DiagenR = crate::BitReader;
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#[doc = "Field `DIAGEN` writer - Diagnostic Enable"]
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pub type DiagenW<'a, REG> = crate::BitWriter<'a, REG>;
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#[doc = "Field `EIT` reader - Error Interrupt Type"]
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pub type EitR = crate::BitReader;
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#[doc = "Field `EIT` writer - Error Interrupt Type"]
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pub type EitW<'a, REG> = crate::BitWriter<'a, REG>;
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impl R {
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#[doc = "Bit 0 - CAN Enable"]
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#[inline(always)]
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pub fn canen(&self) -> CanenR {
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CanenR::new((self.bits & 1) != 0)
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}
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#[doc = "Bit 1 - RW,Control Receive"]
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#[inline(always)]
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pub fn crx(&self) -> CrxR {
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CrxR::new(((self.bits >> 1) & 1) != 0)
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}
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#[doc = "Bit 2 - RW,Control Transmit"]
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#[inline(always)]
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pub fn ctx(&self) -> CtxR {
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CtxR::new(((self.bits >> 2) & 1) != 0)
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}
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#[doc = "Bit 3 - Buffer Lock"]
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#[inline(always)]
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pub fn bufflock(&self) -> BufflockR {
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BufflockR::new(((self.bits >> 3) & 1) != 0)
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}
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#[doc = "Bit 4 - Time Sync Enable"]
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#[inline(always)]
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pub fn tstpen(&self) -> TstpenR {
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TstpenR::new(((self.bits >> 4) & 1) != 0)
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}
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#[doc = "Bit 5 - Data Direction"]
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#[inline(always)]
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pub fn ddir(&self) -> DdirR {
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DdirR::new(((self.bits >> 5) & 1) != 0)
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}
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#[doc = "Bit 6 - Listen Only"]
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#[inline(always)]
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pub fn lo(&self) -> LoR {
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LoR::new(((self.bits >> 6) & 1) != 0)
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}
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#[doc = "Bit 7 - Ignore Acknowledge"]
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#[inline(always)]
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pub fn ignack(&self) -> IgnackR {
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IgnackR::new(((self.bits >> 7) & 1) != 0)
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}
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#[doc = "Bit 8 - Loopback"]
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#[inline(always)]
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pub fn loopback(&self) -> LoopbackR {
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LoopbackR::new(((self.bits >> 8) & 1) != 0)
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}
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#[doc = "Bit 9 - Internal"]
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#[inline(always)]
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pub fn internal(&self) -> InternalR {
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InternalR::new(((self.bits >> 9) & 1) != 0)
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}
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#[doc = "Bit 10 - Diagnostic Enable"]
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#[inline(always)]
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pub fn diagen(&self) -> DiagenR {
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DiagenR::new(((self.bits >> 10) & 1) != 0)
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}
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#[doc = "Bit 11 - Error Interrupt Type"]
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#[inline(always)]
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pub fn eit(&self) -> EitR {
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EitR::new(((self.bits >> 11) & 1) != 0)
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}
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}
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impl W {
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#[doc = "Bit 0 - CAN Enable"]
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#[inline(always)]
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#[must_use]
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pub fn canen(&mut self) -> CanenW<CgcrSpec> {
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CanenW::new(self, 0)
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}
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#[doc = "Bit 1 - RW,Control Receive"]
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#[inline(always)]
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#[must_use]
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pub fn crx(&mut self) -> CrxW<CgcrSpec> {
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CrxW::new(self, 1)
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}
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#[doc = "Bit 2 - RW,Control Transmit"]
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#[inline(always)]
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#[must_use]
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pub fn ctx(&mut self) -> CtxW<CgcrSpec> {
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CtxW::new(self, 2)
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}
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#[doc = "Bit 3 - Buffer Lock"]
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#[inline(always)]
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#[must_use]
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pub fn bufflock(&mut self) -> BufflockW<CgcrSpec> {
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BufflockW::new(self, 3)
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}
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#[doc = "Bit 4 - Time Sync Enable"]
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#[inline(always)]
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#[must_use]
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pub fn tstpen(&mut self) -> TstpenW<CgcrSpec> {
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TstpenW::new(self, 4)
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}
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#[doc = "Bit 5 - Data Direction"]
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#[inline(always)]
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#[must_use]
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pub fn ddir(&mut self) -> DdirW<CgcrSpec> {
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DdirW::new(self, 5)
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}
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#[doc = "Bit 6 - Listen Only"]
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#[inline(always)]
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#[must_use]
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pub fn lo(&mut self) -> LoW<CgcrSpec> {
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LoW::new(self, 6)
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}
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#[doc = "Bit 7 - Ignore Acknowledge"]
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#[inline(always)]
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#[must_use]
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pub fn ignack(&mut self) -> IgnackW<CgcrSpec> {
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IgnackW::new(self, 7)
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}
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#[doc = "Bit 8 - Loopback"]
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#[inline(always)]
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#[must_use]
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pub fn loopback(&mut self) -> LoopbackW<CgcrSpec> {
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LoopbackW::new(self, 8)
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}
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#[doc = "Bit 9 - Internal"]
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#[inline(always)]
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#[must_use]
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pub fn internal(&mut self) -> InternalW<CgcrSpec> {
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InternalW::new(self, 9)
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}
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#[doc = "Bit 10 - Diagnostic Enable"]
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#[inline(always)]
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#[must_use]
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pub fn diagen(&mut self) -> DiagenW<CgcrSpec> {
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DiagenW::new(self, 10)
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}
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#[doc = "Bit 11 - Error Interrupt Type"]
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#[inline(always)]
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#[must_use]
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pub fn eit(&mut self) -> EitW<CgcrSpec> {
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EitW::new(self, 11)
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}
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}
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#[doc = "CAN Global Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cgcr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cgcr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
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pub struct CgcrSpec;
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impl crate::RegisterSpec for CgcrSpec {
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type Ux = u32;
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}
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#[doc = "`read()` method returns [`cgcr::R`](R) reader structure"]
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impl crate::Readable for CgcrSpec {}
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#[doc = "`write(|w| ..)` method takes [`cgcr::W`](W) writer structure"]
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impl crate::Writable for CgcrSpec {
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type Safety = crate::Unsafe;
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const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
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const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
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}
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#[doc = "`reset()` method sets CGCR to value 0"]
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impl crate::Resettable for CgcrSpec {
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const RESET_VALUE: u32 = 0;
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}
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