189 lines
12 KiB
Rust
189 lines
12 KiB
Rust
#[repr(C)]
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#[doc = "Register block"]
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pub struct RegisterBlock {
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synd_data: SyndData,
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synd_synd: SyndSynd,
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synd_enc_32_44: SyndEnc32_44,
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synd_check_32_44_data: SyndCheck32_44Data,
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synd_check_32_44_synd: SyndCheck32_44Synd,
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rom_trap_address: RomTrapAddress,
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rom_trap_synd: RomTrapSynd,
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ram_trap_addr0: RamTrapAddr0,
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ram_trap_synd0: RamTrapSynd0,
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ram_trap_addr1: RamTrapAddr1,
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ram_trap_synd1: RamTrapSynd1,
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_reserved11: [u8; 0xf4],
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synd_enc_32_52: SyndEnc32_52,
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synd_check_32_52_data: SyndCheck32_52Data,
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synd_check_32_52_synd: SyndCheck32_52Synd,
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_reserved14: [u8; 0x0ed0],
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perid: Perid,
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}
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impl RegisterBlock {
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#[doc = "0x00 - Data Register"]
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#[inline(always)]
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pub const fn synd_data(&self) -> &SyndData {
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&self.synd_data
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}
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#[doc = "0x04 - Syndrome Data Register"]
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#[inline(always)]
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pub const fn synd_synd(&self) -> &SyndSynd {
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&self.synd_synd
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}
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#[doc = "0x08 - EDAC Encode"]
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#[inline(always)]
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pub const fn synd_enc_32_44(&self) -> &SyndEnc32_44 {
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&self.synd_enc_32_44
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}
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#[doc = "0x0c - EDAC Decode Data"]
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#[inline(always)]
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pub const fn synd_check_32_44_data(&self) -> &SyndCheck32_44Data {
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&self.synd_check_32_44_data
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}
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#[doc = "0x10 - EDAC Decode Syndrome"]
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#[inline(always)]
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pub const fn synd_check_32_44_synd(&self) -> &SyndCheck32_44Synd {
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&self.synd_check_32_44_synd
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}
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#[doc = "0x14 - ROM EDAC Trap Address"]
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#[inline(always)]
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pub const fn rom_trap_address(&self) -> &RomTrapAddress {
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&self.rom_trap_address
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}
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#[doc = "0x18 - ROM EDAC Trap Syndrome"]
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#[inline(always)]
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pub const fn rom_trap_synd(&self) -> &RomTrapSynd {
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&self.rom_trap_synd
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}
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#[doc = "0x1c - RAM0 EDAC Trap Address"]
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#[inline(always)]
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pub const fn ram_trap_addr0(&self) -> &RamTrapAddr0 {
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&self.ram_trap_addr0
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}
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#[doc = "0x20 - RAM0 EDAC Trap Syndrome"]
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#[inline(always)]
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pub const fn ram_trap_synd0(&self) -> &RamTrapSynd0 {
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&self.ram_trap_synd0
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}
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#[doc = "0x24 - RAM1 EDAC Trap Address"]
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#[inline(always)]
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pub const fn ram_trap_addr1(&self) -> &RamTrapAddr1 {
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&self.ram_trap_addr1
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}
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#[doc = "0x28 - RAM1 EDAC Trap Syndrome"]
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#[inline(always)]
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pub const fn ram_trap_synd1(&self) -> &RamTrapSynd1 {
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&self.ram_trap_synd1
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}
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#[doc = "0x120 - EDAC Encode"]
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#[inline(always)]
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pub const fn synd_enc_32_52(&self) -> &SyndEnc32_52 {
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&self.synd_enc_32_52
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}
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#[doc = "0x124 - EDAC Decode Data"]
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#[inline(always)]
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pub const fn synd_check_32_52_data(&self) -> &SyndCheck32_52Data {
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&self.synd_check_32_52_data
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}
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#[doc = "0x128 - EDAC Decode Syndrome"]
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#[inline(always)]
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pub const fn synd_check_32_52_synd(&self) -> &SyndCheck32_52Synd {
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&self.synd_check_32_52_synd
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}
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#[doc = "0xffc - Peripheral ID Register"]
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#[inline(always)]
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pub const fn perid(&self) -> &Perid {
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&self.perid
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}
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}
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#[doc = "SYND_DATA (rw) register accessor: Data Register\n\nYou can [`read`](crate::Reg::read) this register and get [`synd_data::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`synd_data::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@synd_data`]
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module"]
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#[doc(alias = "SYND_DATA")]
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pub type SyndData = crate::Reg<synd_data::SyndDataSpec>;
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#[doc = "Data Register"]
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pub mod synd_data;
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#[doc = "SYND_SYND (rw) register accessor: Syndrome Data Register\n\nYou can [`read`](crate::Reg::read) this register and get [`synd_synd::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`synd_synd::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@synd_synd`]
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module"]
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#[doc(alias = "SYND_SYND")]
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pub type SyndSynd = crate::Reg<synd_synd::SyndSyndSpec>;
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#[doc = "Syndrome Data Register"]
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pub mod synd_synd;
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#[doc = "SYND_ENC_32_44 (rw) register accessor: EDAC Encode\n\nYou can [`read`](crate::Reg::read) this register and get [`synd_enc_32_44::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`synd_enc_32_44::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@synd_enc_32_44`]
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module"]
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#[doc(alias = "SYND_ENC_32_44")]
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pub type SyndEnc32_44 = crate::Reg<synd_enc_32_44::SyndEnc32_44Spec>;
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#[doc = "EDAC Encode"]
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pub mod synd_enc_32_44;
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#[doc = "SYND_CHECK_32_44_DATA (r) register accessor: EDAC Decode Data\n\nYou can [`read`](crate::Reg::read) this register and get [`synd_check_32_44_data::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@synd_check_32_44_data`]
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module"]
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#[doc(alias = "SYND_CHECK_32_44_DATA")]
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pub type SyndCheck32_44Data = crate::Reg<synd_check_32_44_data::SyndCheck32_44DataSpec>;
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#[doc = "EDAC Decode Data"]
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pub mod synd_check_32_44_data;
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#[doc = "SYND_CHECK_32_44_SYND (r) register accessor: EDAC Decode Syndrome\n\nYou can [`read`](crate::Reg::read) this register and get [`synd_check_32_44_synd::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@synd_check_32_44_synd`]
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module"]
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#[doc(alias = "SYND_CHECK_32_44_SYND")]
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pub type SyndCheck32_44Synd = crate::Reg<synd_check_32_44_synd::SyndCheck32_44SyndSpec>;
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#[doc = "EDAC Decode Syndrome"]
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pub mod synd_check_32_44_synd;
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#[doc = "ROM_TRAP_ADDRESS (rw) register accessor: ROM EDAC Trap Address\n\nYou can [`read`](crate::Reg::read) this register and get [`rom_trap_address::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rom_trap_address::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rom_trap_address`]
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module"]
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#[doc(alias = "ROM_TRAP_ADDRESS")]
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pub type RomTrapAddress = crate::Reg<rom_trap_address::RomTrapAddressSpec>;
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#[doc = "ROM EDAC Trap Address"]
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pub mod rom_trap_address;
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#[doc = "ROM_TRAP_SYND (rw) register accessor: ROM EDAC Trap Syndrome\n\nYou can [`read`](crate::Reg::read) this register and get [`rom_trap_synd::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rom_trap_synd::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rom_trap_synd`]
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module"]
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#[doc(alias = "ROM_TRAP_SYND")]
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pub type RomTrapSynd = crate::Reg<rom_trap_synd::RomTrapSyndSpec>;
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#[doc = "ROM EDAC Trap Syndrome"]
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pub mod rom_trap_synd;
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#[doc = "RAM_TRAP_ADDR0 (rw) register accessor: RAM0 EDAC Trap Address\n\nYou can [`read`](crate::Reg::read) this register and get [`ram_trap_addr0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ram_trap_addr0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ram_trap_addr0`]
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module"]
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#[doc(alias = "RAM_TRAP_ADDR0")]
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pub type RamTrapAddr0 = crate::Reg<ram_trap_addr0::RamTrapAddr0Spec>;
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#[doc = "RAM0 EDAC Trap Address"]
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pub mod ram_trap_addr0;
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#[doc = "RAM_TRAP_SYND0 (rw) register accessor: RAM0 EDAC Trap Syndrome\n\nYou can [`read`](crate::Reg::read) this register and get [`ram_trap_synd0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ram_trap_synd0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ram_trap_synd0`]
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module"]
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#[doc(alias = "RAM_TRAP_SYND0")]
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pub type RamTrapSynd0 = crate::Reg<ram_trap_synd0::RamTrapSynd0Spec>;
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#[doc = "RAM0 EDAC Trap Syndrome"]
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pub mod ram_trap_synd0;
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#[doc = "RAM_TRAP_ADDR1 (rw) register accessor: RAM1 EDAC Trap Address\n\nYou can [`read`](crate::Reg::read) this register and get [`ram_trap_addr1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ram_trap_addr1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ram_trap_addr1`]
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module"]
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#[doc(alias = "RAM_TRAP_ADDR1")]
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pub type RamTrapAddr1 = crate::Reg<ram_trap_addr1::RamTrapAddr1Spec>;
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#[doc = "RAM1 EDAC Trap Address"]
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pub mod ram_trap_addr1;
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#[doc = "RAM_TRAP_SYND1 (rw) register accessor: RAM1 EDAC Trap Syndrome\n\nYou can [`read`](crate::Reg::read) this register and get [`ram_trap_synd1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ram_trap_synd1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ram_trap_synd1`]
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module"]
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#[doc(alias = "RAM_TRAP_SYND1")]
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pub type RamTrapSynd1 = crate::Reg<ram_trap_synd1::RamTrapSynd1Spec>;
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#[doc = "RAM1 EDAC Trap Syndrome"]
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pub mod ram_trap_synd1;
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#[doc = "SYND_ENC_32_52 (r) register accessor: EDAC Encode\n\nYou can [`read`](crate::Reg::read) this register and get [`synd_enc_32_52::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@synd_enc_32_52`]
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module"]
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#[doc(alias = "SYND_ENC_32_52")]
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pub type SyndEnc32_52 = crate::Reg<synd_enc_32_52::SyndEnc32_52Spec>;
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#[doc = "EDAC Encode"]
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pub mod synd_enc_32_52;
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#[doc = "SYND_CHECK_32_52_DATA (r) register accessor: EDAC Decode Data\n\nYou can [`read`](crate::Reg::read) this register and get [`synd_check_32_52_data::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@synd_check_32_52_data`]
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module"]
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#[doc(alias = "SYND_CHECK_32_52_DATA")]
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pub type SyndCheck32_52Data = crate::Reg<synd_check_32_52_data::SyndCheck32_52DataSpec>;
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#[doc = "EDAC Decode Data"]
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pub mod synd_check_32_52_data;
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#[doc = "SYND_CHECK_32_52_SYND (r) register accessor: EDAC Decode Syndrome\n\nYou can [`read`](crate::Reg::read) this register and get [`synd_check_32_52_synd::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@synd_check_32_52_synd`]
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module"]
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#[doc(alias = "SYND_CHECK_32_52_SYND")]
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pub type SyndCheck32_52Synd = crate::Reg<synd_check_32_52_synd::SyndCheck32_52SyndSpec>;
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#[doc = "EDAC Decode Syndrome"]
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pub mod synd_check_32_52_synd;
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#[doc = "PERID (r) register accessor: Peripheral ID Register\n\nYou can [`read`](crate::Reg::read) this register and get [`perid::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@perid`]
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module"]
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#[doc(alias = "PERID")]
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pub type Perid = crate::Reg<perid::PeridSpec>;
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#[doc = "Peripheral ID Register"]
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pub mod perid;
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