Robin Mueller
700778a516
Changed: - Move most library components to new [`vorago-shared-periphs`](https://egit.irs.uni-stuttgart.de/rust/vorago-shared-periphs) which is mostly re-exported in this crate. - Overhaul and simplification of several HAL APIs. The system configuration and IRQ router peripheral instance generally does not need to be passed to HAL API anymore. - All HAL drivers are now type erased. The constructors will still expect and consume the PAC singleton component for resource management purposes, but are not cached anymore. - Refactoring of GPIO library to be more inline with embassy GPIO API. Added: - I2C clock timeout feature support.
81 lines
2.4 KiB
Rust
81 lines
2.4 KiB
Rust
// Code to test the watchdog timer.
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#![no_main]
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#![no_std]
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// Import panic provider.
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use panic_probe as _;
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// Import logger.
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use defmt_rtt as _;
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use va416xx_hal::clock::ClockConfigurator;
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use core::sync::atomic::{AtomicU32, Ordering};
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use cortex_m_rt::entry;
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use simple_examples::peb1;
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use va416xx_hal::irq_router::enable_and_init_irq_router;
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use va416xx_hal::pac::{self, interrupt};
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use va416xx_hal::wdt::Wdt;
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static WDT_INTRPT_COUNT: AtomicU32 = AtomicU32::new(0);
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#[derive(Debug, PartialEq, Eq)]
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#[allow(dead_code)]
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enum TestMode {
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// Watchdog is fed by main loop, which runs with high period.
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FedByMain,
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// Watchdog is fed by watchdog IRQ.
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FedByIrq,
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AllowReset,
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}
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const TEST_MODE: TestMode = TestMode::FedByMain;
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const WDT_ROLLOVER_MS: u32 = 100;
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#[entry]
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fn main() -> ! {
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defmt::println!("-- VA416xx WDT example application--");
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let cp = cortex_m::Peripherals::take().unwrap();
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let dp = pac::Peripherals::take().unwrap();
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// Use the external clock connected to XTAL_N.
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let clocks = ClockConfigurator::new(dp.clkgen)
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.xtal_n_clk_with_src_freq(peb1::EXTCLK_FREQ)
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.freeze()
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.unwrap();
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enable_and_init_irq_router();
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let mut delay = cortex_m::delay::Delay::new(cp.SYST, clocks.apb0().raw());
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let mut last_interrupt_counter = 0;
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let mut wdt_ctrl = Wdt::start(dp.watch_dog, &clocks, WDT_ROLLOVER_MS);
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wdt_ctrl.enable_reset();
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let log_divisor = 25;
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let mut counter: u32 = 0;
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loop {
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counter = counter.wrapping_add(1);
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if counter % log_divisor == 0 {
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defmt::info!("wdt example main loop alive");
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}
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if TEST_MODE != TestMode::AllowReset {
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wdt_ctrl.feed();
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}
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let interrupt_counter = WDT_INTRPT_COUNT.load(Ordering::Relaxed);
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if interrupt_counter > last_interrupt_counter {
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defmt::info!("interrupt counter has increased to {}", interrupt_counter);
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last_interrupt_counter = interrupt_counter;
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}
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match TEST_MODE {
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TestMode::FedByMain => delay.delay_ms(WDT_ROLLOVER_MS / 5),
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TestMode::FedByIrq => delay.delay_ms(WDT_ROLLOVER_MS),
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_ => (),
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}
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}
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}
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#[interrupt]
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#[allow(non_snake_case)]
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fn WATCHDOG() {
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WDT_INTRPT_COUNT.fetch_add(1, Ordering::Relaxed);
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let wdt = unsafe { pac::WatchDog::steal() };
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// Clear interrupt.
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if TEST_MODE != TestMode::AllowReset {
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wdt.wdogintclr().write(|w| unsafe { w.bits(1) });
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}
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}
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