Robin Mueller
935ee9dbb1
Changed: - Move most library components to new [`vorago-shared-periphs`](https://egit.irs.uni-stuttgart.de/rust/vorago-shared-periphs) which is mostly re-exported in this crate. - Overhaul and simplification of several HAL APIs. The system configuration and IRQ router peripheral instance generally does not need to be passed to HAL API anymore. - All HAL drivers are now type erased. The constructors will still expect and consume the PAC singleton component for resource management purposes, but are not cached anymore. - Refactoring of GPIO library to be more inline with embassy GPIO API. Added: - I2C clock timeout feature support.
29 lines
1.2 KiB
Rust
29 lines
1.2 KiB
Rust
//! IRQ Router peripheral support.
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use vorago_shared_periphs::{
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enable_peripheral_clock, reset_peripheral_for_cycles, PeripheralSelect,
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};
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use crate::pac;
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/// This enables and initiates the peripheral.
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///
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/// Please note that this method also writes 0 to the registers which do not have 0 as the default
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/// reset value. The programmers guide v1.2 and the actual values inspected using a SVD viewer
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/// are inconsistent here, and the registers being non-zero can actually lead to weird bugs
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/// when working with interrupts. Registers DMASELx and ADCSEL/DMASELx will reset to 0x7f and 0x1f
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/// respectively instead of 0x00.
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pub fn enable_and_init_irq_router() {
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let irq_router = unsafe { pac::IrqRouter::steal() };
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enable_peripheral_clock(PeripheralSelect::IrqRouter);
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reset_peripheral_for_cycles(PeripheralSelect::IrqRouter, 2);
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unsafe {
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irq_router.dmasel0().write_with_zero(|w| w);
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irq_router.dmasel1().write_with_zero(|w| w);
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irq_router.dmasel2().write_with_zero(|w| w);
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irq_router.dmasel3().write_with_zero(|w| w);
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irq_router.adcsel().write_with_zero(|w| w);
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irq_router.dacsel0().write_with_zero(|w| w);
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irq_router.dacsel1().write_with_zero(|w| w);
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}
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}
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