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#[ doc = " Register `DMA_TX_DESC_LIST_ADDR` reader " ]
pub struct R ( crate ::R < DMA_TX_DESC_LIST_ADDR_SPEC > ) ;
impl core ::ops ::Deref for R {
type Target = crate ::R < DMA_TX_DESC_LIST_ADDR_SPEC > ;
#[ inline(always) ]
fn deref ( & self ) -> & Self ::Target {
& self . 0
}
}
impl From < crate ::R < DMA_TX_DESC_LIST_ADDR_SPEC > > for R {
#[ inline(always) ]
fn from ( reader : crate ::R < DMA_TX_DESC_LIST_ADDR_SPEC > ) -> Self {
R ( reader )
}
}
#[ doc = " Register `DMA_TX_DESC_LIST_ADDR` writer " ]
pub struct W ( crate ::W < DMA_TX_DESC_LIST_ADDR_SPEC > ) ;
impl core ::ops ::Deref for W {
type Target = crate ::W < DMA_TX_DESC_LIST_ADDR_SPEC > ;
#[ inline(always) ]
fn deref ( & self ) -> & Self ::Target {
& self . 0
}
}
impl core ::ops ::DerefMut for W {
#[ inline(always) ]
fn deref_mut ( & mut self ) -> & mut Self ::Target {
& mut self . 0
}
}
impl From < crate ::W < DMA_TX_DESC_LIST_ADDR_SPEC > > for W {
#[ inline(always) ]
fn from ( writer : crate ::W < DMA_TX_DESC_LIST_ADDR_SPEC > ) -> Self {
W ( writer )
}
}
#[ doc = " Field `TDESLA` reader - Start of Transmit List " ]
pub struct TDESLA_R ( crate ::FieldReader < u32 , u32 > ) ;
impl TDESLA_R {
#[ inline(always) ]
pub ( crate ) fn new ( bits : u32 ) -> Self {
TDESLA_R ( crate ::FieldReader ::new ( bits ) )
}
}
impl core ::ops ::Deref for TDESLA_R {
type Target = crate ::FieldReader < u32 , u32 > ;
#[ inline(always) ]
fn deref ( & self ) -> & Self ::Target {
& self . 0
}
}
#[ doc = " Field `TDESLA` writer - Start of Transmit List " ]
pub struct TDESLA_W < ' a > {
w : & ' a mut W ,
}
impl < ' a > TDESLA_W < ' a > {
#[ doc = r " Writes raw bits to the field " ]
#[ inline(always) ]
pub unsafe fn bits ( self , value : u32 ) -> & ' a mut W {
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self . w . bits = value as u32 ;
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self . w
}
}
impl R {
#[ doc = " Bits 0:31 - Start of Transmit List " ]
#[ inline(always) ]
pub fn tdesla ( & self ) -> TDESLA_R {
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TDESLA_R ::new ( self . bits as u32 )
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}
}
impl W {
#[ doc = " Bits 0:31 - Start of Transmit List " ]
#[ inline(always) ]
pub fn tdesla ( & mut self ) -> TDESLA_W {
TDESLA_W { w : self }
}
#[ doc = " Writes raw bits to the register. " ]
#[ inline(always) ]
pub unsafe fn bits ( & mut self , bits : u32 ) -> & mut Self {
self . 0. bits ( bits ) ;
self
}
}
#[ doc = " Points the DMA to the start of the Transmit Descriptor list \n \n This register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api). \n \n For information about available fields see [dma_tx_desc_list_addr](index.html) module " ]
pub struct DMA_TX_DESC_LIST_ADDR_SPEC ;
impl crate ::RegisterSpec for DMA_TX_DESC_LIST_ADDR_SPEC {
type Ux = u32 ;
}
#[ doc = " `read()` method returns [dma_tx_desc_list_addr::R](R) reader structure " ]
impl crate ::Readable for DMA_TX_DESC_LIST_ADDR_SPEC {
type Reader = R ;
}
#[ doc = " `write(|w| ..)` method takes [dma_tx_desc_list_addr::W](W) writer structure " ]
impl crate ::Writable for DMA_TX_DESC_LIST_ADDR_SPEC {
type Writer = W ;
}
#[ doc = " `reset()` method sets DMA_TX_DESC_LIST_ADDR to value 0 " ]
impl crate ::Resettable for DMA_TX_DESC_LIST_ADDR_SPEC {
#[ inline(always) ]
fn reset_value ( ) -> Self ::Ux {
0
}
}