339 lines
11 KiB
Rust
339 lines
11 KiB
Rust
#[doc = "Register `CTRL1` reader"]
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pub struct R(crate::R<CTRL1_SPEC>);
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impl core::ops::Deref for R {
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type Target = crate::R<CTRL1_SPEC>;
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#[inline(always)]
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fn deref(&self) -> &Self::Target {
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&self.0
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}
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}
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impl From<crate::R<CTRL1_SPEC>> for R {
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#[inline(always)]
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fn from(reader: crate::R<CTRL1_SPEC>) -> Self {
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R(reader)
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}
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}
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#[doc = "Register `CTRL1` writer"]
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pub struct W(crate::W<CTRL1_SPEC>);
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impl core::ops::Deref for W {
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type Target = crate::W<CTRL1_SPEC>;
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#[inline(always)]
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fn deref(&self) -> &Self::Target {
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&self.0
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}
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}
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impl core::ops::DerefMut for W {
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#[inline(always)]
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fn deref_mut(&mut self) -> &mut Self::Target {
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&mut self.0
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}
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}
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impl From<crate::W<CTRL1_SPEC>> for W {
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#[inline(always)]
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fn from(writer: crate::W<CTRL1_SPEC>) -> Self {
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W(writer)
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}
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}
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#[doc = "Field `ADC_CLK_DIV_SEL` reader - Clock divider select for ADC"]
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pub struct ADC_CLK_DIV_SEL_R(crate::FieldReader<u8, u8>);
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impl ADC_CLK_DIV_SEL_R {
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#[inline(always)]
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pub(crate) fn new(bits: u8) -> Self {
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ADC_CLK_DIV_SEL_R(crate::FieldReader::new(bits))
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}
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}
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impl core::ops::Deref for ADC_CLK_DIV_SEL_R {
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type Target = crate::FieldReader<u8, u8>;
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#[inline(always)]
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fn deref(&self) -> &Self::Target {
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&self.0
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}
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}
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#[doc = "Field `ADC_CLK_DIV_SEL` writer - Clock divider select for ADC"]
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pub struct ADC_CLK_DIV_SEL_W<'a> {
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w: &'a mut W,
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}
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impl<'a> ADC_CLK_DIV_SEL_W<'a> {
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub unsafe fn bits(self, value: u8) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x03 << 5)) | ((value as u32 & 0x03) << 5);
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self.w
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}
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}
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#[doc = "Field `XTAL_N_EN` reader - Enables XTAL_N output"]
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pub struct XTAL_N_EN_R(crate::FieldReader<bool, bool>);
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impl XTAL_N_EN_R {
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#[inline(always)]
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pub(crate) fn new(bits: bool) -> Self {
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XTAL_N_EN_R(crate::FieldReader::new(bits))
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}
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}
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impl core::ops::Deref for XTAL_N_EN_R {
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type Target = crate::FieldReader<bool, bool>;
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#[inline(always)]
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fn deref(&self) -> &Self::Target {
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&self.0
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}
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}
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#[doc = "Field `XTAL_N_EN` writer - Enables XTAL_N output"]
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pub struct XTAL_N_EN_W<'a> {
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w: &'a mut W,
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}
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impl<'a> XTAL_N_EN_W<'a> {
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4);
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self.w
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}
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}
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#[doc = "Field `XTAL_EN` reader - Enables the crystal oscillator"]
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pub struct XTAL_EN_R(crate::FieldReader<bool, bool>);
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impl XTAL_EN_R {
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#[inline(always)]
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pub(crate) fn new(bits: bool) -> Self {
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XTAL_EN_R(crate::FieldReader::new(bits))
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}
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}
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impl core::ops::Deref for XTAL_EN_R {
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type Target = crate::FieldReader<bool, bool>;
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#[inline(always)]
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fn deref(&self) -> &Self::Target {
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&self.0
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}
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}
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#[doc = "Field `XTAL_EN` writer - Enables the crystal oscillator"]
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pub struct XTAL_EN_W<'a> {
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w: &'a mut W,
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}
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impl<'a> XTAL_EN_W<'a> {
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3);
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self.w
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}
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}
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#[doc = "Field `PLL_LOST_LOCK_DET_EN` reader - Enables the PLL lock lost detection circuit"]
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pub struct PLL_LOST_LOCK_DET_EN_R(crate::FieldReader<bool, bool>);
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impl PLL_LOST_LOCK_DET_EN_R {
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#[inline(always)]
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pub(crate) fn new(bits: bool) -> Self {
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PLL_LOST_LOCK_DET_EN_R(crate::FieldReader::new(bits))
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}
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}
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impl core::ops::Deref for PLL_LOST_LOCK_DET_EN_R {
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type Target = crate::FieldReader<bool, bool>;
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#[inline(always)]
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fn deref(&self) -> &Self::Target {
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&self.0
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}
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}
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#[doc = "Field `PLL_LOST_LOCK_DET_EN` writer - Enables the PLL lock lost detection circuit"]
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pub struct PLL_LOST_LOCK_DET_EN_W<'a> {
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w: &'a mut W,
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}
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impl<'a> PLL_LOST_LOCK_DET_EN_W<'a> {
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2);
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self.w
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}
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}
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#[doc = "Field `PLL_LCK_DET_REARM` reader - Resets/Rearms the PLL lock detect circuit"]
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pub struct PLL_LCK_DET_REARM_R(crate::FieldReader<bool, bool>);
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impl PLL_LCK_DET_REARM_R {
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#[inline(always)]
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pub(crate) fn new(bits: bool) -> Self {
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PLL_LCK_DET_REARM_R(crate::FieldReader::new(bits))
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}
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}
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impl core::ops::Deref for PLL_LCK_DET_REARM_R {
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type Target = crate::FieldReader<bool, bool>;
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#[inline(always)]
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fn deref(&self) -> &Self::Target {
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&self.0
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}
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}
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#[doc = "Field `PLL_LCK_DET_REARM` writer - Resets/Rearms the PLL lock detect circuit"]
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pub struct PLL_LCK_DET_REARM_W<'a> {
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w: &'a mut W,
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}
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impl<'a> PLL_LCK_DET_REARM_W<'a> {
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1);
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self.w
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}
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}
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#[doc = "Field `SYS_CLK_LOST_DET_REARM` reader - Resets/Rearms the SYS_CLK lost detection feature"]
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pub struct SYS_CLK_LOST_DET_REARM_R(crate::FieldReader<bool, bool>);
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impl SYS_CLK_LOST_DET_REARM_R {
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#[inline(always)]
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pub(crate) fn new(bits: bool) -> Self {
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SYS_CLK_LOST_DET_REARM_R(crate::FieldReader::new(bits))
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}
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}
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impl core::ops::Deref for SYS_CLK_LOST_DET_REARM_R {
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type Target = crate::FieldReader<bool, bool>;
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#[inline(always)]
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fn deref(&self) -> &Self::Target {
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&self.0
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}
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}
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#[doc = "Field `SYS_CLK_LOST_DET_REARM` writer - Resets/Rearms the SYS_CLK lost detection feature"]
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pub struct SYS_CLK_LOST_DET_REARM_W<'a> {
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w: &'a mut W,
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}
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impl<'a> SYS_CLK_LOST_DET_REARM_W<'a> {
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01);
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self.w
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}
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}
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impl R {
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#[doc = "Bits 5:6 - Clock divider select for ADC"]
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#[inline(always)]
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pub fn adc_clk_div_sel(&self) -> ADC_CLK_DIV_SEL_R {
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ADC_CLK_DIV_SEL_R::new(((self.bits >> 5) & 0x03) as u8)
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}
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#[doc = "Bit 4 - Enables XTAL_N output"]
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#[inline(always)]
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pub fn xtal_n_en(&self) -> XTAL_N_EN_R {
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XTAL_N_EN_R::new(((self.bits >> 4) & 0x01) != 0)
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}
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#[doc = "Bit 3 - Enables the crystal oscillator"]
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#[inline(always)]
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pub fn xtal_en(&self) -> XTAL_EN_R {
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XTAL_EN_R::new(((self.bits >> 3) & 0x01) != 0)
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}
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#[doc = "Bit 2 - Enables the PLL lock lost detection circuit"]
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#[inline(always)]
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pub fn pll_lost_lock_det_en(&self) -> PLL_LOST_LOCK_DET_EN_R {
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PLL_LOST_LOCK_DET_EN_R::new(((self.bits >> 2) & 0x01) != 0)
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}
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#[doc = "Bit 1 - Resets/Rearms the PLL lock detect circuit"]
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#[inline(always)]
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pub fn pll_lck_det_rearm(&self) -> PLL_LCK_DET_REARM_R {
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PLL_LCK_DET_REARM_R::new(((self.bits >> 1) & 0x01) != 0)
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}
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#[doc = "Bit 0 - Resets/Rearms the SYS_CLK lost detection feature"]
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#[inline(always)]
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pub fn sys_clk_lost_det_rearm(&self) -> SYS_CLK_LOST_DET_REARM_R {
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SYS_CLK_LOST_DET_REARM_R::new((self.bits & 0x01) != 0)
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}
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}
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impl W {
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#[doc = "Bits 5:6 - Clock divider select for ADC"]
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#[inline(always)]
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pub fn adc_clk_div_sel(&mut self) -> ADC_CLK_DIV_SEL_W {
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ADC_CLK_DIV_SEL_W { w: self }
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}
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#[doc = "Bit 4 - Enables XTAL_N output"]
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#[inline(always)]
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pub fn xtal_n_en(&mut self) -> XTAL_N_EN_W {
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XTAL_N_EN_W { w: self }
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}
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#[doc = "Bit 3 - Enables the crystal oscillator"]
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#[inline(always)]
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pub fn xtal_en(&mut self) -> XTAL_EN_W {
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XTAL_EN_W { w: self }
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}
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#[doc = "Bit 2 - Enables the PLL lock lost detection circuit"]
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#[inline(always)]
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pub fn pll_lost_lock_det_en(&mut self) -> PLL_LOST_LOCK_DET_EN_W {
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PLL_LOST_LOCK_DET_EN_W { w: self }
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}
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#[doc = "Bit 1 - Resets/Rearms the PLL lock detect circuit"]
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#[inline(always)]
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pub fn pll_lck_det_rearm(&mut self) -> PLL_LCK_DET_REARM_W {
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PLL_LCK_DET_REARM_W { w: self }
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}
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#[doc = "Bit 0 - Resets/Rearms the SYS_CLK lost detection feature"]
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#[inline(always)]
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pub fn sys_clk_lost_det_rearm(&mut self) -> SYS_CLK_LOST_DET_REARM_W {
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SYS_CLK_LOST_DET_REARM_W { w: self }
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}
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#[doc = "Writes raw bits to the register."]
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#[inline(always)]
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pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
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self.0.bits(bits);
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self
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}
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}
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#[doc = "Clock Generation Module Control Register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl1](index.html) module"]
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pub struct CTRL1_SPEC;
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impl crate::RegisterSpec for CTRL1_SPEC {
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type Ux = u32;
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}
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#[doc = "`read()` method returns [ctrl1::R](R) reader structure"]
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impl crate::Readable for CTRL1_SPEC {
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type Reader = R;
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}
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#[doc = "`write(|w| ..)` method takes [ctrl1::W](W) writer structure"]
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impl crate::Writable for CTRL1_SPEC {
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type Writer = W;
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}
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#[doc = "`reset()` method sets CTRL1 to value 0"]
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impl crate::Resettable for CTRL1_SPEC {
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#[inline(always)]
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fn reset_value() -> Self::Ux {
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0
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}
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}
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