104 lines
3.3 KiB
Rust
104 lines
3.3 KiB
Rust
#[doc = "Register `PRIMECELL_ID_0` reader"]
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pub struct R(crate::R<PRIMECELL_ID_0_SPEC>);
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impl core::ops::Deref for R {
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type Target = crate::R<PRIMECELL_ID_0_SPEC>;
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#[inline(always)]
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fn deref(&self) -> &Self::Target {
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&self.0
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}
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}
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impl From<crate::R<PRIMECELL_ID_0_SPEC>> for R {
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#[inline(always)]
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fn from(reader: crate::R<PRIMECELL_ID_0_SPEC>) -> Self {
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R(reader)
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}
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}
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#[doc = "Register `PRIMECELL_ID_0` writer"]
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pub struct W(crate::W<PRIMECELL_ID_0_SPEC>);
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impl core::ops::Deref for W {
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type Target = crate::W<PRIMECELL_ID_0_SPEC>;
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#[inline(always)]
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fn deref(&self) -> &Self::Target {
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&self.0
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}
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}
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impl core::ops::DerefMut for W {
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#[inline(always)]
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fn deref_mut(&mut self) -> &mut Self::Target {
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&mut self.0
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}
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}
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impl From<crate::W<PRIMECELL_ID_0_SPEC>> for W {
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#[inline(always)]
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fn from(writer: crate::W<PRIMECELL_ID_0_SPEC>) -> Self {
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W(writer)
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}
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}
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#[doc = "Field `PRIMECELL_ID_0` reader - PrimeCell Identification"]
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pub struct PRIMECELL_ID_0_R(crate::FieldReader<u8, u8>);
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impl PRIMECELL_ID_0_R {
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#[inline(always)]
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pub(crate) fn new(bits: u8) -> Self {
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PRIMECELL_ID_0_R(crate::FieldReader::new(bits))
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}
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}
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impl core::ops::Deref for PRIMECELL_ID_0_R {
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type Target = crate::FieldReader<u8, u8>;
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#[inline(always)]
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fn deref(&self) -> &Self::Target {
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&self.0
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}
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}
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#[doc = "Field `PRIMECELL_ID_0` writer - PrimeCell Identification"]
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pub struct PRIMECELL_ID_0_W<'a> {
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w: &'a mut W,
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}
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impl<'a> PRIMECELL_ID_0_W<'a> {
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub unsafe fn bits(self, value: u8) -> &'a mut W {
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self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff);
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self.w
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}
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}
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impl R {
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#[doc = "Bits 0:7 - PrimeCell Identification"]
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#[inline(always)]
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pub fn primecell_id_0(&self) -> PRIMECELL_ID_0_R {
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PRIMECELL_ID_0_R::new((self.bits & 0xff) as u8)
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}
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}
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impl W {
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#[doc = "Bits 0:7 - PrimeCell Identification"]
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#[inline(always)]
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pub fn primecell_id_0(&mut self) -> PRIMECELL_ID_0_W {
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PRIMECELL_ID_0_W { w: self }
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}
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#[doc = "Writes raw bits to the register."]
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#[inline(always)]
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pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
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self.0.bits(bits);
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self
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}
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}
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#[doc = "DMA PrimeCell ID 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [primecell_id_0](index.html) module"]
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pub struct PRIMECELL_ID_0_SPEC;
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impl crate::RegisterSpec for PRIMECELL_ID_0_SPEC {
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type Ux = u32;
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}
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#[doc = "`read()` method returns [primecell_id_0::R](R) reader structure"]
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impl crate::Readable for PRIMECELL_ID_0_SPEC {
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type Reader = R;
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}
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#[doc = "`write(|w| ..)` method takes [primecell_id_0::W](W) writer structure"]
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impl crate::Writable for PRIMECELL_ID_0_SPEC {
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type Writer = W;
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}
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#[doc = "`reset()` method sets PRIMECELL_ID_0 to value 0x0d"]
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impl crate::Resettable for PRIMECELL_ID_0_SPEC {
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#[inline(always)]
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fn reset_value() -> Self::Ux {
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0x0d
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}
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}
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