675 lines
18 KiB
Rust
675 lines
18 KiB
Rust
#[doc = "Register `DMA_BUS_MODE` reader"]
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pub struct R(crate::R<DMA_BUS_MODE_SPEC>);
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impl core::ops::Deref for R {
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type Target = crate::R<DMA_BUS_MODE_SPEC>;
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#[inline(always)]
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fn deref(&self) -> &Self::Target {
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&self.0
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}
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}
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impl From<crate::R<DMA_BUS_MODE_SPEC>> for R {
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#[inline(always)]
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fn from(reader: crate::R<DMA_BUS_MODE_SPEC>) -> Self {
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R(reader)
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}
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}
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#[doc = "Register `DMA_BUS_MODE` writer"]
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pub struct W(crate::W<DMA_BUS_MODE_SPEC>);
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impl core::ops::Deref for W {
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type Target = crate::W<DMA_BUS_MODE_SPEC>;
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#[inline(always)]
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fn deref(&self) -> &Self::Target {
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&self.0
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}
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}
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impl core::ops::DerefMut for W {
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#[inline(always)]
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fn deref_mut(&mut self) -> &mut Self::Target {
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&mut self.0
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}
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}
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impl From<crate::W<DMA_BUS_MODE_SPEC>> for W {
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#[inline(always)]
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fn from(writer: crate::W<DMA_BUS_MODE_SPEC>) -> Self {
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W(writer)
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}
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}
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#[doc = "Field `RIB` reader - Rebuild INCRx Burst"]
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pub struct RIB_R(crate::FieldReader<bool, bool>);
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impl RIB_R {
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#[inline(always)]
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pub(crate) fn new(bits: bool) -> Self {
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RIB_R(crate::FieldReader::new(bits))
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}
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}
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impl core::ops::Deref for RIB_R {
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type Target = crate::FieldReader<bool, bool>;
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#[inline(always)]
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fn deref(&self) -> &Self::Target {
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&self.0
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}
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}
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#[doc = "Field `RIB` writer - Rebuild INCRx Burst"]
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pub struct RIB_W<'a> {
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w: &'a mut W,
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}
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impl<'a> RIB_W<'a> {
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 31)) | ((value as u32 & 0x01) << 31);
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self.w
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}
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}
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#[doc = "Field `PRWG` reader - Channel Priority Weights"]
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pub struct PRWG_R(crate::FieldReader<u8, u8>);
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impl PRWG_R {
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#[inline(always)]
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pub(crate) fn new(bits: u8) -> Self {
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PRWG_R(crate::FieldReader::new(bits))
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}
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}
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impl core::ops::Deref for PRWG_R {
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type Target = crate::FieldReader<u8, u8>;
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#[inline(always)]
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fn deref(&self) -> &Self::Target {
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&self.0
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}
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}
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#[doc = "Field `PRWG` writer - Channel Priority Weights"]
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pub struct PRWG_W<'a> {
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w: &'a mut W,
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}
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impl<'a> PRWG_W<'a> {
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub unsafe fn bits(self, value: u8) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x03 << 28)) | ((value as u32 & 0x03) << 28);
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self.w
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}
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}
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#[doc = "Field `TXPR` reader - Transmit Priority"]
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pub struct TXPR_R(crate::FieldReader<bool, bool>);
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impl TXPR_R {
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#[inline(always)]
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pub(crate) fn new(bits: bool) -> Self {
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TXPR_R(crate::FieldReader::new(bits))
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}
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}
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impl core::ops::Deref for TXPR_R {
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type Target = crate::FieldReader<bool, bool>;
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#[inline(always)]
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fn deref(&self) -> &Self::Target {
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&self.0
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}
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}
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#[doc = "Field `TXPR` writer - Transmit Priority"]
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pub struct TXPR_W<'a> {
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w: &'a mut W,
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}
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impl<'a> TXPR_W<'a> {
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 27)) | ((value as u32 & 0x01) << 27);
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self.w
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}
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}
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#[doc = "Field `MB` reader - Mixed Burst"]
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pub struct MB_R(crate::FieldReader<bool, bool>);
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impl MB_R {
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#[inline(always)]
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pub(crate) fn new(bits: bool) -> Self {
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MB_R(crate::FieldReader::new(bits))
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}
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}
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impl core::ops::Deref for MB_R {
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type Target = crate::FieldReader<bool, bool>;
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#[inline(always)]
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fn deref(&self) -> &Self::Target {
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&self.0
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}
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}
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#[doc = "Field `MB` writer - Mixed Burst"]
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pub struct MB_W<'a> {
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w: &'a mut W,
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}
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impl<'a> MB_W<'a> {
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 26)) | ((value as u32 & 0x01) << 26);
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self.w
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}
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}
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#[doc = "Field `AAL` reader - Address-Aligned Beats"]
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pub struct AAL_R(crate::FieldReader<bool, bool>);
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impl AAL_R {
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#[inline(always)]
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pub(crate) fn new(bits: bool) -> Self {
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AAL_R(crate::FieldReader::new(bits))
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}
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}
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impl core::ops::Deref for AAL_R {
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type Target = crate::FieldReader<bool, bool>;
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#[inline(always)]
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fn deref(&self) -> &Self::Target {
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&self.0
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}
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}
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#[doc = "Field `AAL` writer - Address-Aligned Beats"]
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pub struct AAL_W<'a> {
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w: &'a mut W,
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}
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impl<'a> AAL_W<'a> {
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 25)) | ((value as u32 & 0x01) << 25);
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self.w
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}
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}
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#[doc = "Field `PBLx8` reader - PBLx8 Mode"]
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pub struct PBLX8_R(crate::FieldReader<bool, bool>);
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impl PBLX8_R {
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#[inline(always)]
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pub(crate) fn new(bits: bool) -> Self {
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PBLX8_R(crate::FieldReader::new(bits))
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}
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}
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impl core::ops::Deref for PBLX8_R {
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type Target = crate::FieldReader<bool, bool>;
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#[inline(always)]
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fn deref(&self) -> &Self::Target {
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&self.0
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}
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}
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#[doc = "Field `PBLx8` writer - PBLx8 Mode"]
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pub struct PBLX8_W<'a> {
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w: &'a mut W,
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}
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impl<'a> PBLX8_W<'a> {
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 24)) | ((value as u32 & 0x01) << 24);
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self.w
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}
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}
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#[doc = "Field `USP` reader - Use Separate PBL"]
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pub struct USP_R(crate::FieldReader<bool, bool>);
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impl USP_R {
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#[inline(always)]
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pub(crate) fn new(bits: bool) -> Self {
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USP_R(crate::FieldReader::new(bits))
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}
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}
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impl core::ops::Deref for USP_R {
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type Target = crate::FieldReader<bool, bool>;
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#[inline(always)]
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fn deref(&self) -> &Self::Target {
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&self.0
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}
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}
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#[doc = "Field `USP` writer - Use Separate PBL"]
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pub struct USP_W<'a> {
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w: &'a mut W,
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}
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impl<'a> USP_W<'a> {
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 23)) | ((value as u32 & 0x01) << 23);
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self.w
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}
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}
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#[doc = "Field `RPBL` reader - Rx DMA PBL"]
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pub struct RPBL_R(crate::FieldReader<u8, u8>);
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impl RPBL_R {
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#[inline(always)]
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pub(crate) fn new(bits: u8) -> Self {
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RPBL_R(crate::FieldReader::new(bits))
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}
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}
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impl core::ops::Deref for RPBL_R {
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type Target = crate::FieldReader<u8, u8>;
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#[inline(always)]
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fn deref(&self) -> &Self::Target {
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&self.0
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}
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}
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#[doc = "Field `RPBL` writer - Rx DMA PBL"]
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pub struct RPBL_W<'a> {
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w: &'a mut W,
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}
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impl<'a> RPBL_W<'a> {
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub unsafe fn bits(self, value: u8) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x3f << 17)) | ((value as u32 & 0x3f) << 17);
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self.w
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}
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}
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#[doc = "Field `FB` reader - Fixed Burste"]
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pub struct FB_R(crate::FieldReader<bool, bool>);
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impl FB_R {
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#[inline(always)]
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pub(crate) fn new(bits: bool) -> Self {
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FB_R(crate::FieldReader::new(bits))
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}
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}
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impl core::ops::Deref for FB_R {
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type Target = crate::FieldReader<bool, bool>;
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#[inline(always)]
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fn deref(&self) -> &Self::Target {
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&self.0
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}
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}
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#[doc = "Field `FB` writer - Fixed Burste"]
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pub struct FB_W<'a> {
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w: &'a mut W,
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}
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impl<'a> FB_W<'a> {
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16);
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self.w
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}
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}
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#[doc = "Field `PR` reader - Priority Ratio"]
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pub struct PR_R(crate::FieldReader<u8, u8>);
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impl PR_R {
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#[inline(always)]
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pub(crate) fn new(bits: u8) -> Self {
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PR_R(crate::FieldReader::new(bits))
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}
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}
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impl core::ops::Deref for PR_R {
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type Target = crate::FieldReader<u8, u8>;
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#[inline(always)]
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fn deref(&self) -> &Self::Target {
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&self.0
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}
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}
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#[doc = "Field `PR` writer - Priority Ratio"]
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pub struct PR_W<'a> {
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w: &'a mut W,
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}
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impl<'a> PR_W<'a> {
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub unsafe fn bits(self, value: u8) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x03 << 14)) | ((value as u32 & 0x03) << 14);
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self.w
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}
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}
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#[doc = "Field `PBL` reader - Programmable Burst Lengthe"]
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pub struct PBL_R(crate::FieldReader<u8, u8>);
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impl PBL_R {
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#[inline(always)]
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pub(crate) fn new(bits: u8) -> Self {
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PBL_R(crate::FieldReader::new(bits))
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}
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}
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impl core::ops::Deref for PBL_R {
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type Target = crate::FieldReader<u8, u8>;
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#[inline(always)]
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fn deref(&self) -> &Self::Target {
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&self.0
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}
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}
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#[doc = "Field `PBL` writer - Programmable Burst Lengthe"]
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pub struct PBL_W<'a> {
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w: &'a mut W,
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}
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impl<'a> PBL_W<'a> {
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub unsafe fn bits(self, value: u8) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x3f << 8)) | ((value as u32 & 0x3f) << 8);
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self.w
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}
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}
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#[doc = "Field `DSL` reader - Descriptor Skip Length"]
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pub struct DSL_R(crate::FieldReader<u8, u8>);
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impl DSL_R {
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#[inline(always)]
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pub(crate) fn new(bits: u8) -> Self {
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DSL_R(crate::FieldReader::new(bits))
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}
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}
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impl core::ops::Deref for DSL_R {
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type Target = crate::FieldReader<u8, u8>;
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#[inline(always)]
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fn deref(&self) -> &Self::Target {
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&self.0
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}
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}
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#[doc = "Field `DSL` writer - Descriptor Skip Length"]
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pub struct DSL_W<'a> {
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w: &'a mut W,
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}
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impl<'a> DSL_W<'a> {
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub unsafe fn bits(self, value: u8) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x1f << 2)) | ((value as u32 & 0x1f) << 2);
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self.w
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}
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}
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#[doc = "Field `DA` reader - DMA Arbitration Scheme"]
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pub struct DA_R(crate::FieldReader<bool, bool>);
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impl DA_R {
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#[inline(always)]
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pub(crate) fn new(bits: bool) -> Self {
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DA_R(crate::FieldReader::new(bits))
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}
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}
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impl core::ops::Deref for DA_R {
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type Target = crate::FieldReader<bool, bool>;
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#[inline(always)]
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fn deref(&self) -> &Self::Target {
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&self.0
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}
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}
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#[doc = "Field `DA` writer - DMA Arbitration Scheme"]
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pub struct DA_W<'a> {
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w: &'a mut W,
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}
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impl<'a> DA_W<'a> {
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1);
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self.w
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}
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}
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#[doc = "Field `SWR` reader - Software Reset (Read, Write Set, and Self Clear)"]
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pub struct SWR_R(crate::FieldReader<bool, bool>);
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impl SWR_R {
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#[inline(always)]
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pub(crate) fn new(bits: bool) -> Self {
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SWR_R(crate::FieldReader::new(bits))
|
|
}
|
|
}
|
|
impl core::ops::Deref for SWR_R {
|
|
type Target = crate::FieldReader<bool, bool>;
|
|
#[inline(always)]
|
|
fn deref(&self) -> &Self::Target {
|
|
&self.0
|
|
}
|
|
}
|
|
#[doc = "Field `SWR` writer - Software Reset (Read, Write Set, and Self Clear)"]
|
|
pub struct SWR_W<'a> {
|
|
w: &'a mut W,
|
|
}
|
|
impl<'a> SWR_W<'a> {
|
|
#[doc = r"Sets the field bit"]
|
|
#[inline(always)]
|
|
pub fn set_bit(self) -> &'a mut W {
|
|
self.bit(true)
|
|
}
|
|
#[doc = r"Clears the field bit"]
|
|
#[inline(always)]
|
|
pub fn clear_bit(self) -> &'a mut W {
|
|
self.bit(false)
|
|
}
|
|
#[doc = r"Writes raw bits to the field"]
|
|
#[inline(always)]
|
|
pub fn bit(self, value: bool) -> &'a mut W {
|
|
self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01);
|
|
self.w
|
|
}
|
|
}
|
|
impl R {
|
|
#[doc = "Bit 31 - Rebuild INCRx Burst"]
|
|
#[inline(always)]
|
|
pub fn rib(&self) -> RIB_R {
|
|
RIB_R::new(((self.bits >> 31) & 0x01) != 0)
|
|
}
|
|
#[doc = "Bits 28:29 - Channel Priority Weights"]
|
|
#[inline(always)]
|
|
pub fn prwg(&self) -> PRWG_R {
|
|
PRWG_R::new(((self.bits >> 28) & 0x03) as u8)
|
|
}
|
|
#[doc = "Bit 27 - Transmit Priority"]
|
|
#[inline(always)]
|
|
pub fn txpr(&self) -> TXPR_R {
|
|
TXPR_R::new(((self.bits >> 27) & 0x01) != 0)
|
|
}
|
|
#[doc = "Bit 26 - Mixed Burst"]
|
|
#[inline(always)]
|
|
pub fn mb(&self) -> MB_R {
|
|
MB_R::new(((self.bits >> 26) & 0x01) != 0)
|
|
}
|
|
#[doc = "Bit 25 - Address-Aligned Beats"]
|
|
#[inline(always)]
|
|
pub fn aal(&self) -> AAL_R {
|
|
AAL_R::new(((self.bits >> 25) & 0x01) != 0)
|
|
}
|
|
#[doc = "Bit 24 - PBLx8 Mode"]
|
|
#[inline(always)]
|
|
pub fn pblx8(&self) -> PBLX8_R {
|
|
PBLX8_R::new(((self.bits >> 24) & 0x01) != 0)
|
|
}
|
|
#[doc = "Bit 23 - Use Separate PBL"]
|
|
#[inline(always)]
|
|
pub fn usp(&self) -> USP_R {
|
|
USP_R::new(((self.bits >> 23) & 0x01) != 0)
|
|
}
|
|
#[doc = "Bits 17:22 - Rx DMA PBL"]
|
|
#[inline(always)]
|
|
pub fn rpbl(&self) -> RPBL_R {
|
|
RPBL_R::new(((self.bits >> 17) & 0x3f) as u8)
|
|
}
|
|
#[doc = "Bit 16 - Fixed Burste"]
|
|
#[inline(always)]
|
|
pub fn fb(&self) -> FB_R {
|
|
FB_R::new(((self.bits >> 16) & 0x01) != 0)
|
|
}
|
|
#[doc = "Bits 14:15 - Priority Ratio"]
|
|
#[inline(always)]
|
|
pub fn pr(&self) -> PR_R {
|
|
PR_R::new(((self.bits >> 14) & 0x03) as u8)
|
|
}
|
|
#[doc = "Bits 8:13 - Programmable Burst Lengthe"]
|
|
#[inline(always)]
|
|
pub fn pbl(&self) -> PBL_R {
|
|
PBL_R::new(((self.bits >> 8) & 0x3f) as u8)
|
|
}
|
|
#[doc = "Bits 2:6 - Descriptor Skip Length"]
|
|
#[inline(always)]
|
|
pub fn dsl(&self) -> DSL_R {
|
|
DSL_R::new(((self.bits >> 2) & 0x1f) as u8)
|
|
}
|
|
#[doc = "Bit 1 - DMA Arbitration Scheme"]
|
|
#[inline(always)]
|
|
pub fn da(&self) -> DA_R {
|
|
DA_R::new(((self.bits >> 1) & 0x01) != 0)
|
|
}
|
|
#[doc = "Bit 0 - Software Reset (Read, Write Set, and Self Clear)"]
|
|
#[inline(always)]
|
|
pub fn swr(&self) -> SWR_R {
|
|
SWR_R::new((self.bits & 0x01) != 0)
|
|
}
|
|
}
|
|
impl W {
|
|
#[doc = "Bit 31 - Rebuild INCRx Burst"]
|
|
#[inline(always)]
|
|
pub fn rib(&mut self) -> RIB_W {
|
|
RIB_W { w: self }
|
|
}
|
|
#[doc = "Bits 28:29 - Channel Priority Weights"]
|
|
#[inline(always)]
|
|
pub fn prwg(&mut self) -> PRWG_W {
|
|
PRWG_W { w: self }
|
|
}
|
|
#[doc = "Bit 27 - Transmit Priority"]
|
|
#[inline(always)]
|
|
pub fn txpr(&mut self) -> TXPR_W {
|
|
TXPR_W { w: self }
|
|
}
|
|
#[doc = "Bit 26 - Mixed Burst"]
|
|
#[inline(always)]
|
|
pub fn mb(&mut self) -> MB_W {
|
|
MB_W { w: self }
|
|
}
|
|
#[doc = "Bit 25 - Address-Aligned Beats"]
|
|
#[inline(always)]
|
|
pub fn aal(&mut self) -> AAL_W {
|
|
AAL_W { w: self }
|
|
}
|
|
#[doc = "Bit 24 - PBLx8 Mode"]
|
|
#[inline(always)]
|
|
pub fn pblx8(&mut self) -> PBLX8_W {
|
|
PBLX8_W { w: self }
|
|
}
|
|
#[doc = "Bit 23 - Use Separate PBL"]
|
|
#[inline(always)]
|
|
pub fn usp(&mut self) -> USP_W {
|
|
USP_W { w: self }
|
|
}
|
|
#[doc = "Bits 17:22 - Rx DMA PBL"]
|
|
#[inline(always)]
|
|
pub fn rpbl(&mut self) -> RPBL_W {
|
|
RPBL_W { w: self }
|
|
}
|
|
#[doc = "Bit 16 - Fixed Burste"]
|
|
#[inline(always)]
|
|
pub fn fb(&mut self) -> FB_W {
|
|
FB_W { w: self }
|
|
}
|
|
#[doc = "Bits 14:15 - Priority Ratio"]
|
|
#[inline(always)]
|
|
pub fn pr(&mut self) -> PR_W {
|
|
PR_W { w: self }
|
|
}
|
|
#[doc = "Bits 8:13 - Programmable Burst Lengthe"]
|
|
#[inline(always)]
|
|
pub fn pbl(&mut self) -> PBL_W {
|
|
PBL_W { w: self }
|
|
}
|
|
#[doc = "Bits 2:6 - Descriptor Skip Length"]
|
|
#[inline(always)]
|
|
pub fn dsl(&mut self) -> DSL_W {
|
|
DSL_W { w: self }
|
|
}
|
|
#[doc = "Bit 1 - DMA Arbitration Scheme"]
|
|
#[inline(always)]
|
|
pub fn da(&mut self) -> DA_W {
|
|
DA_W { w: self }
|
|
}
|
|
#[doc = "Bit 0 - Software Reset (Read, Write Set, and Self Clear)"]
|
|
#[inline(always)]
|
|
pub fn swr(&mut self) -> SWR_W {
|
|
SWR_W { w: self }
|
|
}
|
|
#[doc = "Writes raw bits to the register."]
|
|
#[inline(always)]
|
|
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
|
self.0.bits(bits);
|
|
self
|
|
}
|
|
}
|
|
#[doc = "Controls the DMA Host Interface Mode\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dma_bus_mode](index.html) module"]
|
|
pub struct DMA_BUS_MODE_SPEC;
|
|
impl crate::RegisterSpec for DMA_BUS_MODE_SPEC {
|
|
type Ux = u32;
|
|
}
|
|
#[doc = "`read()` method returns [dma_bus_mode::R](R) reader structure"]
|
|
impl crate::Readable for DMA_BUS_MODE_SPEC {
|
|
type Reader = R;
|
|
}
|
|
#[doc = "`write(|w| ..)` method takes [dma_bus_mode::W](W) writer structure"]
|
|
impl crate::Writable for DMA_BUS_MODE_SPEC {
|
|
type Writer = W;
|
|
}
|
|
#[doc = "`reset()` method sets DMA_BUS_MODE to value 0x0002_0101"]
|
|
impl crate::Resettable for DMA_BUS_MODE_SPEC {
|
|
#[inline(always)]
|
|
fn reset_value() -> Self::Ux {
|
|
0x0002_0101
|
|
}
|
|
}
|