104 lines
3.2 KiB
Rust
104 lines
3.2 KiB
Rust
#[doc = "Register `TIMESTAMPADDEND` reader"]
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pub struct R(crate::R<TIMESTAMPADDEND_SPEC>);
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impl core::ops::Deref for R {
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type Target = crate::R<TIMESTAMPADDEND_SPEC>;
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#[inline(always)]
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fn deref(&self) -> &Self::Target {
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&self.0
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}
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}
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impl From<crate::R<TIMESTAMPADDEND_SPEC>> for R {
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#[inline(always)]
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fn from(reader: crate::R<TIMESTAMPADDEND_SPEC>) -> Self {
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R(reader)
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}
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}
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#[doc = "Register `TIMESTAMPADDEND` writer"]
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pub struct W(crate::W<TIMESTAMPADDEND_SPEC>);
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impl core::ops::Deref for W {
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type Target = crate::W<TIMESTAMPADDEND_SPEC>;
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#[inline(always)]
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fn deref(&self) -> &Self::Target {
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&self.0
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}
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}
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impl core::ops::DerefMut for W {
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#[inline(always)]
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fn deref_mut(&mut self) -> &mut Self::Target {
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&mut self.0
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}
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}
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impl From<crate::W<TIMESTAMPADDEND_SPEC>> for W {
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#[inline(always)]
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fn from(writer: crate::W<TIMESTAMPADDEND_SPEC>) -> Self {
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W(writer)
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}
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}
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#[doc = "Field `TSAR` reader - Timestamp Addend Register"]
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pub struct TSAR_R(crate::FieldReader<u32, u32>);
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impl TSAR_R {
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#[inline(always)]
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pub(crate) fn new(bits: u32) -> Self {
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TSAR_R(crate::FieldReader::new(bits))
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}
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}
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impl core::ops::Deref for TSAR_R {
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type Target = crate::FieldReader<u32, u32>;
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#[inline(always)]
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fn deref(&self) -> &Self::Target {
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&self.0
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}
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}
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#[doc = "Field `TSAR` writer - Timestamp Addend Register"]
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pub struct TSAR_W<'a> {
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w: &'a mut W,
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}
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impl<'a> TSAR_W<'a> {
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub unsafe fn bits(self, value: u32) -> &'a mut W {
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self.w.bits = value as u32;
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self.w
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}
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}
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impl R {
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#[doc = "Bits 0:31 - Timestamp Addend Register"]
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#[inline(always)]
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pub fn tsar(&self) -> TSAR_R {
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TSAR_R::new(self.bits as u32)
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}
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}
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impl W {
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#[doc = "Bits 0:31 - Timestamp Addend Register"]
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#[inline(always)]
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pub fn tsar(&mut self) -> TSAR_W {
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TSAR_W { w: self }
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}
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#[doc = "Writes raw bits to the register."]
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#[inline(always)]
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pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
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self.0.bits(bits);
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self
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}
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}
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#[doc = "This register is used by software to re-adjust the clock frequency linearly to match the Master clock frequency\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timestampaddend](index.html) module"]
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pub struct TIMESTAMPADDEND_SPEC;
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impl crate::RegisterSpec for TIMESTAMPADDEND_SPEC {
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type Ux = u32;
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}
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#[doc = "`read()` method returns [timestampaddend::R](R) reader structure"]
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impl crate::Readable for TIMESTAMPADDEND_SPEC {
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type Reader = R;
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}
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#[doc = "`write(|w| ..)` method takes [timestampaddend::W](W) writer structure"]
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impl crate::Writable for TIMESTAMPADDEND_SPEC {
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type Writer = W;
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}
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#[doc = "`reset()` method sets TIMESTAMPADDEND to value 0"]
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impl crate::Resettable for TIMESTAMPADDEND_SPEC {
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#[inline(always)]
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fn reset_value() -> Self::Ux {
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0
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}
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}
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