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This commit is contained in:
Robin Mueller
2025-09-02 20:22:39 +02:00
parent c972f17256
commit 5f11e94e24
8 changed files with 53 additions and 65 deletions
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8
.github/workflows/ci.yml vendored
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@@ -10,8 +10,8 @@ jobs:
- uses: dtolnay/rust-toolchain@stable - uses: dtolnay/rust-toolchain@stable
with: with:
targets: "thumbv7em-none-eabihf, thumbv6m-none-eabi" targets: "thumbv7em-none-eabihf, thumbv6m-none-eabi"
- run: cargo check --target thumbv7em-none-eabihf --features vor4x - run: cargo check --target thumbv7em-none-eabihf --features "vor4x, defmt"
- run: cargo check --target thumbv6m-none-eabi --features vor1x - run: cargo check --target thumbv6m-none-eabi --features "vor1x, defmt"
fmt: fmt:
name: Check formatting name: Check formatting
@@ -29,8 +29,8 @@ jobs:
- uses: dtolnay/rust-toolchain@nightly - uses: dtolnay/rust-toolchain@nightly
with: with:
targets: "thumbv7em-none-eabihf, thumbv6m-none-eabi" targets: "thumbv7em-none-eabihf, thumbv6m-none-eabi"
- run: RUSTDOCFLAGS="--cfg docsrs --generate-link-to-definition -Z unstable-options" cargo +nightly doc --target thumbv7em-none-eabihf --features vor4x - run: RUSTDOCFLAGS="--cfg docsrs --generate-link-to-definition -Z unstable-options" cargo +nightly doc --target thumbv7em-none-eabihf --features "vor4x, defmt"
- run: RUSTDOCFLAGS="--cfg docsrs --generate-link-to-definition -Z unstable-options" cargo +nightly doc --target thumbv6m-none-eabi --features vor1x - run: RUSTDOCFLAGS="--cfg docsrs --generate-link-to-definition -Z unstable-options" cargo +nightly doc --target thumbv6m-none-eabi --features "vor1x, defmt"
clippy: clippy:
name: Clippy name: Clippy

6
CHANGELOG.md
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@@ -8,11 +8,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
## [unreleased] ## [unreleased]
### Changed ## [v0.1.0] 2025-09-02
- SPI `transfer` implemenation update to handle size missmatch between read and write.
## [v0.1.0]
Init commit. Init commit.

18
Cargo.toml
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@@ -10,7 +10,7 @@ license = "Apache-2.0"
[dependencies] [dependencies]
cortex-m = { version = "0.7" } cortex-m = { version = "0.7" }
cfg-if = "1" cfg-if = "1"
derive-mmio = { git = "https://github.com/knurling-rs/derive-mmio.git", version = "0.6" } derive-mmio = "0.6"
bitbybit = "1.3" bitbybit = "1.3"
arbitrary-int = "2" arbitrary-int = "2"
static_assertions = "1.1" static_assertions = "1.1"
@@ -32,7 +32,9 @@ va416xx = { version = "0.4", default-features = false, optional = true }
embassy-sync = "0.7" embassy-sync = "0.7"
embassy-time-driver = "0.2" embassy-time-driver = "0.2"
embassy-time-queue-utils = "0.3" embassy-time-queue-utils = "0.3"
once_cell = { version = "1", default-features = false, features = ["critical-section"] } once_cell = { version = "1", default-features = false, features = [
"critical-section",
] }
[target.thumbv6m-none-eabi.dependencies] [target.thumbv6m-none-eabi.dependencies]
portable-atomic = { version = "1", features = ["unsafe-assume-single-core"] } portable-atomic = { version = "1", features = ["unsafe-assume-single-core"] }
@@ -45,9 +47,19 @@ portable-atomic = "1"
vor1x = ["_family-selected", "dep:va108xx"] vor1x = ["_family-selected", "dep:va108xx"]
vor4x = ["_family-selected", "dep:va416xx"] vor4x = ["_family-selected", "dep:va416xx"]
va41628 = [] va41628 = []
defmt = ["dep:defmt", "arbitrary-int/defmt", "fugit/defmt", "embedded-hal/defmt-03"] defmt = [
"dep:defmt",
"arbitrary-int/defmt",
"fugit/defmt",
"embedded-hal/defmt-03",
"va108xx/defmt"
]
_family-selected = [] _family-selected = []
[package.metadata.cargo-machete] [package.metadata.cargo-machete]
ignored = ["raw-slicee"] ignored = ["raw-slicee"]
[package.metadata.docs.rs]
features = ["vor1x", "defmt"]
rustdoc-args = ["--generate-link-to-definition"]

30
src/i2c/regs.rs
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@@ -60,8 +60,7 @@ pub enum RxFifoFullMode {
Nack = 1, Nack = 1,
} }
#[bitbybit::bitfield(u32)] #[bitbybit::bitfield(u32, debug, defmt_fields(feature = "defmt"))]
#[derive(Debug)]
pub struct Control { pub struct Control {
#[bit(0, r)] #[bit(0, r)]
clk_enabled: bool, clk_enabled: bool,
@@ -93,8 +92,7 @@ pub enum I2cSpeed {
Fast400khz = 1, Fast400khz = 1,
} }
#[bitbybit::bitfield(u32, default = 0x0)] #[bitbybit::bitfield(u32, default = 0x0, debug, defmt_fields(feature = "defmt"))]
#[derive(Debug)]
pub struct ClkScale { pub struct ClkScale {
/// Clock divide value. Reset value: 0x18. /// Clock divide value. Reset value: 0x18.
#[bits(0..=7, rw)] #[bits(0..=7, rw)]
@@ -124,8 +122,7 @@ pub enum Direction {
Receive = 1, Receive = 1,
} }
#[bitbybit::bitfield(u32, default = 0x0)] #[bitbybit::bitfield(u32, default = 0x0, debug, defmt_bitfields(feature = "defmt"))]
#[derive(Debug)]
pub struct Address { pub struct Address {
#[bit(0, rw)] #[bit(0, rw)]
direction: Direction, direction: Direction,
@@ -160,8 +157,7 @@ pub struct Command {
cancel: bool, cancel: bool,
} }
#[bitbybit::bitfield(u32)] #[bitbybit::bitfield(u32, debug, defmt_bitfields(feature = "defmt"))]
#[derive(Debug)]
pub struct Status { pub struct Status {
#[bit(0, r)] #[bit(0, r)]
i2c_idle: bool, i2c_idle: bool,
@@ -195,8 +191,7 @@ pub struct Status {
raw_scl: bool, raw_scl: bool,
} }
#[bitbybit::bitfield(u32)] #[bitbybit::bitfield(u32, debug, defmt_bitfields(feature = "defmt"))]
#[derive(Debug)]
pub struct State { pub struct State {
#[bits(0..=3, rw)] #[bits(0..=3, rw)]
state: u4, state: u4,
@@ -214,8 +209,7 @@ pub struct State {
#[cfg_attr(feature = "defmt", derive(defmt::Format))] #[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub struct DataCount(arbitrary_int::UInt<u32, 11>); pub struct DataCount(arbitrary_int::UInt<u32, 11>);
#[bitbybit::bitfield(u32)] #[bitbybit::bitfield(u32, debug, defmt_bitfields(feature = "defmt"))]
#[derive(Debug)]
pub struct InterruptControl { pub struct InterruptControl {
#[bit(0, rw)] #[bit(0, rw)]
i2c_idle: bool, i2c_idle: bool,
@@ -247,8 +241,7 @@ pub struct InterruptControl {
rx_full: bool, rx_full: bool,
} }
#[bitbybit::bitfield(u32)] #[bitbybit::bitfield(u32, debug, defmt_bitfields(feature = "defmt"))]
#[derive(Debug)]
pub struct InterruptStatus { pub struct InterruptStatus {
#[bit(0, r)] #[bit(0, r)]
i2c_idle: bool, i2c_idle: bool,
@@ -398,8 +391,7 @@ pub mod slave {
address: u10, address: u10,
} }
#[bitbybit::bitfield(u32)] #[bitbybit::bitfield(u32, debug, defmt_fields(feature = "defmt"))]
#[derive(Debug)]
pub struct Status { pub struct Status {
#[bit(0, r)] #[bit(0, r)]
completed: bool, completed: bool,
@@ -450,8 +442,7 @@ pub mod slave {
tx_fifo: u5, tx_fifo: u5,
} }
#[bitbybit::bitfield(u32)] #[bitbybit::bitfield(u32, debug, defmt_fields(feature = "defmt"))]
#[derive(Debug)]
pub struct InterruptControl { pub struct InterruptControl {
#[bit(0, rw)] #[bit(0, rw)]
completed: bool, completed: bool,
@@ -488,8 +479,7 @@ pub mod slave {
rx_full: bool, rx_full: bool,
} }
#[bitbybit::bitfield(u32)] #[bitbybit::bitfield(u32, debug, defmt_bitfields(feature = "defmt"))]
#[derive(Debug)]
pub struct InterruptStatus { pub struct InterruptStatus {
#[bit(0, r)] #[bit(0, r)]
completed: bool, completed: bool,

4
src/ioconfig/regs.rs
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@@ -10,6 +10,8 @@ pub const BASE_ADDR: usize = 0x4000_2000;
pub const BASE_ADDR: usize = 0x4001_1000; pub const BASE_ADDR: usize = 0x4001_1000;
#[bitbybit::bitenum(u3)] #[bitbybit::bitenum(u3)]
#[derive(Debug, PartialEq, Eq)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum FilterType { pub enum FilterType {
SysClk = 0, SysClk = 0,
DirectInput = 1, DirectInput = 1,
@@ -51,7 +53,7 @@ pub enum FunSel {
Sel3 = 0b11, Sel3 = 0b11,
} }
#[bitbybit::bitfield(u32)] #[bitbybit::bitfield(u32, debug, defmt_fields(feature = "defmt"))]
pub struct Config { pub struct Config {
#[bit(16, rw)] #[bit(16, rw)]
io_disable: bool, io_disable: bool,

18
src/spi/regs.rs
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@@ -67,8 +67,7 @@ pub enum HwChipSelectId {
Id7 = 7, Id7 = 7,
} }
#[bitbybit::bitfield(u32, default = 0x0)] #[bitbybit::bitfield(u32, default = 0x0, debug, defmt_fields(feature = "defmt"))]
#[derive(Debug)]
pub struct Control0 { pub struct Control0 {
#[bits(8..=15, rw)] #[bits(8..=15, rw)]
scrdv: u8, scrdv: u8,
@@ -80,8 +79,7 @@ pub struct Control0 {
word_size: Option<WordSize>, word_size: Option<WordSize>,
} }
#[bitbybit::bitfield(u32, default = 0x0)] #[bitbybit::bitfield(u32, default = 0x0, debug, defmt_bitfields(feature = "defmt"))]
#[derive(Debug)]
pub struct Control1 { pub struct Control1 {
#[bit(11, rw)] #[bit(11, rw)]
mtxpause: bool, mtxpause: bool,
@@ -122,8 +120,7 @@ pub struct Data {
data: u16, data: u16,
} }
#[bitbybit::bitfield(u32)] #[bitbybit::bitfield(u32, debug, defmt_bitfields(feature = "defmt"))]
#[derive(Debug)]
pub struct Status { pub struct Status {
/// TX FIFO below the trigger level. /// TX FIFO below the trigger level.
#[bit(7, r)] #[bit(7, r)]
@@ -160,8 +157,7 @@ impl ClkPrescaler {
} }
} }
#[bitbybit::bitfield(u32)] #[bitbybit::bitfield(u32, debug, defmt_bitfields(feature = "defmt"))]
#[derive(Debug)]
pub struct InterruptControl { pub struct InterruptControl {
/// TX FIFO count <= TX FIFO trigger level. /// TX FIFO count <= TX FIFO trigger level.
#[bit(3, rw)] #[bit(3, rw)]
@@ -178,8 +174,7 @@ pub struct InterruptControl {
rx_overrun: bool, rx_overrun: bool,
} }
#[bitbybit::bitfield(u32)] #[bitbybit::bitfield(u32, debug, defmt_bitfields(feature = "defmt"))]
#[derive(Debug)]
pub struct InterruptStatus { pub struct InterruptStatus {
/// TX FIFO count <= TX FIFO trigger level. /// TX FIFO count <= TX FIFO trigger level.
#[bit(3, r)] #[bit(3, r)]
@@ -206,8 +201,7 @@ pub struct InterruptClear {
rx_overrun: bool, rx_overrun: bool,
} }
#[bitbybit::bitfield(u32)] #[bitbybit::bitfield(u32, debug, defmt_bitfields(feature = "defmt"))]
#[derive(Debug)]
pub struct State { pub struct State {
#[bits(0..=7, r)] #[bits(0..=7, r)]
rx_state: u8, rx_state: u8,

7
src/timer/regs.rs
View File

@@ -9,6 +9,7 @@ const BASE_ADDR: usize = 0x4001_8000;
#[bitbybit::bitenum(u3)] #[bitbybit::bitenum(u3)]
#[derive(Debug, PartialEq, Eq)] #[derive(Debug, PartialEq, Eq)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum StatusSelect { pub enum StatusSelect {
/// Pulse when timer reaches 0. /// Pulse when timer reaches 0.
OneCyclePulse = 0b000, OneCyclePulse = 0b000,
@@ -25,7 +26,7 @@ pub enum StatusSelect {
PwmaActiveBit = 0b110, PwmaActiveBit = 0b110,
} }
#[bitbybit::bitfield(u32)] #[bitbybit::bitfield(u32, debug, defmt_fields(feature = "defmt"))]
pub struct Control { pub struct Control {
/// The counter is requested to stop on the next normal count cycle. /// The counter is requested to stop on the next normal count cycle.
#[bit(9, rw)] #[bit(9, rw)]
@@ -50,6 +51,8 @@ pub struct Control {
enable: bool, enable: bool,
} }
#[derive(Debug)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub struct EnableControl(arbitrary_int::UInt<u32, 1>); pub struct EnableControl(arbitrary_int::UInt<u32, 1>);
impl EnableControl { impl EnableControl {
@@ -85,7 +88,7 @@ pub enum DualCascadeOp {
LogicalOr = 1, LogicalOr = 1,
} }
#[bitbybit::bitfield(u32, default = 0x0)] #[bitbybit::bitfield(u32, default = 0x0, debug, defmt_fields(feature = "defmt"))]
pub struct CascadeControl { pub struct CascadeControl {
/// The counter is automatically disabled if the corresponding Cascade 2 level-sensitive input /// The counter is automatically disabled if the corresponding Cascade 2 level-sensitive input
/// souce is active when the count reaches 0. If the counter is not 0, the cascade control is /// souce is active when the count reaches 0. If the counter is not 0, the cascade control is

27
src/uart/regs.rs
View File

@@ -56,8 +56,7 @@ impl Bank {
} }
} }
#[bitbybit::bitfield(u32)] #[bitbybit::bitfield(u32, debug, defmt_bitfields(feature = "defmt"))]
#[derive(Debug)]
pub struct Data { pub struct Data {
#[bit(15, rw)] #[bit(15, rw)]
dparity: bool, dparity: bool,
@@ -65,8 +64,7 @@ pub struct Data {
value: u8, value: u8,
} }
#[bitbybit::bitfield(u32, default = 0x0)] #[bitbybit::bitfield(u32, default = 0x0, debug, defmt_bitfields(feature = "defmt"))]
#[derive(Debug)]
pub struct Enable { pub struct Enable {
#[bit(1, rw)] #[bit(1, rw)]
tx: bool, tx: bool,
@@ -92,8 +90,7 @@ pub enum WordSize {
Eight = 0b11, Eight = 0b11,
} }
#[bitbybit::bitfield(u32, default = 0x0)] #[bitbybit::bitfield(u32, default = 0x0, debug, defmt_fields(feature = "defmt"))]
#[derive(Debug)]
pub struct Control { pub struct Control {
#[bit(11, rw)] #[bit(11, rw)]
baud8: bool, baud8: bool,
@@ -119,8 +116,7 @@ pub struct Control {
parity_enable: bool, parity_enable: bool,
} }
#[bitbybit::bitfield(u32, default = 0x0)] #[bitbybit::bitfield(u32, default = 0x0, debug, defmt_bitfields(feature = "defmt"))]
#[derive(Debug)]
pub struct ClkScale { pub struct ClkScale {
#[bits(6..=23, rw)] #[bits(6..=23, rw)]
int: u18, int: u18,
@@ -128,8 +124,7 @@ pub struct ClkScale {
frac: u6, frac: u6,
} }
#[bitbybit::bitfield(u32)] #[bitbybit::bitfield(u32, debug, defmt_bitfields(feature = "defmt"))]
#[derive(Debug)]
pub struct RxStatus { pub struct RxStatus {
#[bit(15, r)] #[bit(15, r)]
rx_rtsn: bool, rx_rtsn: bool,
@@ -155,8 +150,7 @@ pub struct RxStatus {
data_available: bool, data_available: bool,
} }
#[bitbybit::bitfield(u32)] #[bitbybit::bitfield(u32, debug, defmt_bitfields(feature = "defmt"))]
#[derive(Debug)]
pub struct TxStatus { pub struct TxStatus {
#[bit(15, r)] #[bit(15, r)]
tx_ctsn: bool, tx_ctsn: bool,
@@ -180,8 +174,7 @@ pub struct FifoClear {
rx: bool, rx: bool,
} }
#[bitbybit::bitfield(u32)] #[bitbybit::bitfield(u32, debug, defmt_bitfields(feature = "defmt"))]
#[derive(Debug)]
pub struct InterruptControl { pub struct InterruptControl {
/// Generate an interrrupt when the RX FIFO is at least half-full (FIFO count >= trigger level) /// Generate an interrrupt when the RX FIFO is at least half-full (FIFO count >= trigger level)
#[bit(0, rw)] #[bit(0, rw)]
@@ -206,8 +199,7 @@ pub struct InterruptControl {
tx_cts: bool, tx_cts: bool,
} }
#[bitbybit::bitfield(u32)] #[bitbybit::bitfield(u32, debug, defmt_bitfields(feature = "defmt"))]
#[derive(Debug)]
pub struct InterruptStatus { pub struct InterruptStatus {
/// Generate an interrrupt when the RX FIFO is at least half-full (FIFO count >= trigger level) /// Generate an interrrupt when the RX FIFO is at least half-full (FIFO count >= trigger level)
#[bit(0, r)] #[bit(0, r)]
@@ -250,8 +242,7 @@ pub struct FifoTrigger {
level: u5, level: u5,
} }
#[bitbybit::bitfield(u32)] #[bitbybit::bitfield(u32, debug, defmt_bitfields(feature = "defmt"))]
#[derive(Debug)]
pub struct State { pub struct State {
#[bits(0..=7, r)] #[bits(0..=7, r)]
rx_state: u8, rx_state: u8,