From 86323a3ff7a8902b0fbbcba0b34667483cf50c9b Mon Sep 17 00:00:00 2001 From: Robin Mueller Date: Mon, 24 Feb 2025 12:29:02 +0100 Subject: [PATCH] moved some generic components --- zynq7000-rt/Cargo.toml | 4 +- zynq7000-rt/src/bin/table-gen.rs | 85 +- zynq7000-rt/src/lib.rs | 4 +- zynq7000-rt/src/mmu.rs | 413 +- zynq7000-rt/src/mmu_table.rs | 8195 +++++++++++++++--------------- zynq7000-rt/src/rt.rs | 2 +- 6 files changed, 4275 insertions(+), 4428 deletions(-) diff --git a/zynq7000-rt/Cargo.toml b/zynq7000-rt/Cargo.toml index 67a1275..ec2bd4b 100644 --- a/zynq7000-rt/Cargo.toml +++ b/zynq7000-rt/Cargo.toml @@ -5,8 +5,8 @@ edition = "2024" [dependencies] cortex-a-rt = { path = "../../cortex-r-a/cortex-a-rt", optional = true, features = ["vfp-dp"] } -cortex-r-a = { path = "../../cortex-r-a/cortex-r-a", optional = true } +cortex-r-a = { path = "../../cortex-r-a/cortex-r-a" } [features] default = ["rt"] -rt = ["dep:cortex-a-rt", "dep:cortex-r-a"] +rt = ["dep:cortex-a-rt"] diff --git a/zynq7000-rt/src/bin/table-gen.rs b/zynq7000-rt/src/bin/table-gen.rs index 96ca176..8d13eb0 100644 --- a/zynq7000-rt/src/bin/table-gen.rs +++ b/zynq7000-rt/src/bin/table-gen.rs @@ -2,37 +2,38 @@ use std::fs::File; use std::io::Write; use std::process::Command; -pub use zynq_rt::mmu::*; +use zynq7000_rt::mmu::ONE_MB; +pub use zynq7000_rt::mmu::segments::*; fn main() { let file_path = "src/mmu_table.rs"; let file = File::create(file_path).expect("Failed to create file"); let mut offset = 0; - let attr_ddr = stringify!(SECTION_ATTRS_DDR); - let attr_unassigned = stringify!(SECTION_ATTRS_UNASSIGNED_RESERVED); - let attr_fpga_slaves = stringify!(SECTION_ATTRS_FPGA_SLAVES); - let attr_shared_dev = stringify!(SECTION_ATTRS_SHAREABLE_DEVICE); - let attr_sram = stringify!(SECTION_ATTRS_SRAM); - let attr_qspi = stringify!(SECTION_ATTRS_QSPI_XIP); - let attr_ocm_high = stringify!(SECTION_ATTRS_OCM_MAPPED_HIGH); + let attr_ddr = stringify!(section_attrs::DDR); + let attr_unassigned = stringify!(section_attrs::UNASSIGNED_RESERVED); + let attr_fpga_slaves = stringify!(section_attrs::FPGA_SLAVES); + let attr_shared_dev = stringify!(section_attrs::SHAREABLE_DEVICE); + let attr_sram = stringify!(section_attrs::SRAM); + let attr_qspi = stringify!(section_attrs::QSPI_XIP); + let attr_ocm_high = stringify!(section_attrs::OCM_MAPPED_HIGH); assert_eq!( - 1 + SEGMENTS_DDR_FULL_ACCESSIBLE - + SEGMENTS_FPGA_SLAVE - + SEGMENTS_FPGA_SLAVE - + SEGMENTS_UNASSIGNED_0 - + SEGMENTS_IO_PERIPHS - + SEGMENTS_UNASSIGNED_1 - + SEGMENTS_NAND - + SEGMENTS_NOR - + SEGMENTS_SRAM + 1 + DDR_FULL_ACCESSIBLE + + FPGA_SLAVE + + FPGA_SLAVE + + UNASSIGNED_0 + + IO_PERIPHS + + UNASSIGNED_1 + + NAND + + NOR + + SRAM + SEGMENTS_UNASSIGNED_2 - + SEGMENTS_AMBA_APB - + SEGMENTS_UNASSIGNED_3 - + SEGMENTS_QSPI_XIP - + SEGMENTS_UNASSIGNED_4 - + SEGMENTS_OCM_MAPPED_HIGH, + + AMBA_APB + + UNASSIGNED_3 + + QSPI_XIP + + UNASSIGNED_4 + + OCM_MAPPED_HIGH, 4096 ); let mut buf_writer = std::io::BufWriter::new(file); @@ -41,7 +42,8 @@ fn main() { "//! This file is auto-generated by table-gen.rs. Do not edit it!" ) .unwrap(); - writeln!(buf_writer, "use crate::mmu::*;").unwrap(); + writeln!(buf_writer, "use cortex_r_a::mmu::L1Section;").unwrap(); + writeln!(buf_writer, "use crate::mmu::{{section_attrs, L1Table}};").unwrap(); writeln!(buf_writer, "").unwrap(); writeln!(buf_writer, "/// MMU Level 1 Page table.").unwrap(); @@ -66,18 +68,13 @@ fn main() { offset += ONE_MB; writeln!(buf_writer, "// DDR memory (0x00100000 - 0x4000_0000)").unwrap(); - for _ in 0..zynq_rt::mmu::SEGMENTS_DDR_FULL_ACCESSIBLE { - writeln!( - buf_writer, - "L1Section::new({}, SECTION_ATTRS_DDR).0,", - offset - ) - .unwrap(); + for _ in 0..DDR_FULL_ACCESSIBLE { + writeln!(buf_writer, "L1Section::new({}, {}).0,", offset, attr_ddr).unwrap(); offset += ONE_MB; } writeln!(buf_writer, "// FPGA slave 0 (0x4000_0000 - 0x8000_0000)").unwrap(); - for _ in 0..zynq_rt::mmu::SEGMENTS_FPGA_SLAVE { + for _ in 0..FPGA_SLAVE { writeln!( buf_writer, "L1Section::new({}, {}).0,", @@ -88,7 +85,7 @@ fn main() { } writeln!(buf_writer, "// FPGA slave 1 (0x8000_0000 - 0xC000_0000)").unwrap(); - for _ in 0..zynq_rt::mmu::SEGMENTS_FPGA_SLAVE { + for _ in 0..FPGA_SLAVE { writeln!( buf_writer, "L1Section::new({}, {}).0,", @@ -103,7 +100,7 @@ fn main() { "// Unassigned/Reserved (0xC000_0000 - 0xE000_0000)" ) .unwrap(); - for _ in 0..zynq_rt::mmu::SEGMENTS_UNASSIGNED_0 { + for _ in 0..UNASSIGNED_0 { writeln!( buf_writer, "L1Section::new({}, {}).0,", @@ -118,7 +115,7 @@ fn main() { "// Segments IO peripherals (0xE000_0000 - 0xE030_0000)" ) .unwrap(); - for _ in 0..zynq_rt::mmu::SEGMENTS_IO_PERIPHS { + for _ in 0..IO_PERIPHS { writeln!( buf_writer, "L1Section::new({}, {}).0,", @@ -133,7 +130,7 @@ fn main() { "// Unassigned/Reserved (0xE030_0000 - 0xE100_0000)" ) .unwrap(); - for _ in 0..zynq_rt::mmu::SEGMENTS_UNASSIGNED_1 { + for _ in 0..UNASSIGNED_1 { writeln!( buf_writer, "L1Section::new({}, {}).0,", @@ -144,7 +141,7 @@ fn main() { } writeln!(buf_writer, "// NAND (0xE100_0000 - 0xE200_0000)").unwrap(); - for _ in 0..zynq_rt::mmu::SEGMENTS_NAND { + for _ in 0..NAND { writeln!( buf_writer, "L1Section::new({}, {}).0,", @@ -155,7 +152,7 @@ fn main() { } writeln!(buf_writer, "// NOR (0xE200_0000 - 0xE400_0000)").unwrap(); - for _ in 0..zynq_rt::mmu::SEGMENTS_NOR { + for _ in 0..NOR { writeln!( buf_writer, "L1Section::new({}, {}).0,", @@ -166,7 +163,7 @@ fn main() { } writeln!(buf_writer, "// SRAM (0xE400_0000 - 0xE600_0000)").unwrap(); - for _ in 0..zynq_rt::mmu::SEGMENTS_SRAM { + for _ in 0..SRAM { writeln!(buf_writer, "L1Section::new({}, {}).0,", offset, attr_sram).unwrap(); offset += ONE_MB; } @@ -176,7 +173,7 @@ fn main() { "// Unassigned/Reserved (0xE600_0000 - 0xF800_0000)" ) .unwrap(); - for _ in 0..zynq_rt::mmu::SEGMENTS_UNASSIGNED_2 { + for _ in 0..SEGMENTS_UNASSIGNED_2 { writeln!( buf_writer, "L1Section::new({}, {}).0,", @@ -191,7 +188,7 @@ fn main() { "// AMBA APB peripherals (0xF800_0000 - 0xF900_0000)" ) .unwrap(); - for _ in 0..zynq_rt::mmu::SEGMENTS_AMBA_APB { + for _ in 0..AMBA_APB { writeln!( buf_writer, "L1Section::new({}, {}).0,", @@ -206,7 +203,7 @@ fn main() { "// Unassigned/Reserved (0xF900_0000 - 0xFC00_0000)" ) .unwrap(); - for _ in 0..zynq_rt::mmu::SEGMENTS_UNASSIGNED_3 { + for _ in 0..UNASSIGNED_3 { writeln!( buf_writer, "L1Section::new({}, {}).0,", @@ -217,7 +214,7 @@ fn main() { } writeln!(buf_writer, "// QSPI XIP (0xFC00_0000 - 0xFE00_0000)").unwrap(); - for _ in 0..zynq_rt::mmu::SEGMENTS_QSPI_XIP { + for _ in 0..QSPI_XIP { writeln!(buf_writer, "L1Section::new({}, {}).0,", offset, attr_qspi).unwrap(); offset += ONE_MB; } @@ -227,7 +224,7 @@ fn main() { "// Unassiged/Reserved (0xFE00_0000 - 0xFFF0_0000)" ) .unwrap(); - for _ in 0..zynq_rt::mmu::SEGMENTS_UNASSIGNED_4 { + for _ in 0..UNASSIGNED_4 { writeln!( buf_writer, "L1Section::new({}, {}).0,", @@ -239,7 +236,7 @@ fn main() { writeln!(buf_writer, "// OCM High (0xFFF0_0000 - 0xFFFF_FFFF)").unwrap(); let mut offset_u64 = offset as u64; - for _ in 0..zynq_rt::mmu::SEGMENTS_OCM_MAPPED_HIGH { + for _ in 0..OCM_MAPPED_HIGH { writeln!( buf_writer, "L1Section::new({}, {}).0,", diff --git a/zynq7000-rt/src/lib.rs b/zynq7000-rt/src/lib.rs index 976ed43..222f91a 100644 --- a/zynq7000-rt/src/lib.rs +++ b/zynq7000-rt/src/lib.rs @@ -4,7 +4,7 @@ //! [provided by Xilinx](https://github.com/Xilinx/embeddedsw/tree/master/lib/bsp/standalone/src/arm/cortexa9/gcc). #![no_std] -#[cfg(feature="rt")] -pub mod rt; pub mod mmu; mod mmu_table; +#[cfg(feature = "rt")] +pub mod rt; diff --git a/zynq7000-rt/src/mmu.rs b/zynq7000-rt/src/mmu.rs index f3ad257..b8d1ce5 100644 --- a/zynq7000-rt/src/mmu.rs +++ b/zynq7000-rt/src/mmu.rs @@ -23,297 +23,145 @@ //! of 1 MB, it is not possible to define separate regions for them. For region //! 0xFFF00000 - 0xFFFFFFFF, 0xFFF00000 to 0xFFFB0000 is reserved but due to 1MB //! granual size, it is not possible to define separate region for it. - -use crate::mmu_table::MMU_L1_PAGE_TABLE; - -pub const OFFSET_DDR: usize = 0; -pub const OFFSET_DDR_ALL_ACCESSIBLE: usize = 0x10_0000; - -pub const OFFSET_FPGA_SLAVE_0: usize = 0x4000_0000; -pub const OFFSET_FPGA_SLAVE_1_START: usize = 0x8000_0000; -pub const OFFSET_FPGA_SLAVE_1_END: usize = 0xC000_0000; - -pub const OFFSET_IO_PERIPHERALS_START: usize = 0xE000_0000; -pub const OFFSET_IO_PERIPHERALS_END: usize = 0xE030_0000; - -pub const OFFSET_NAND_MEMORY: usize = 0xE100_0000; -pub const OFFSET_NOR_MEMORY: usize = 0xE200_0000; -pub const OFFSET_SRAM_MEMORY: usize = 0xE400_0000; -pub const OFFSET_SMC_MEMORIES_END: usize = 0xE600_0000; - -/// 0xf8000c00 to 0xf8000fff, 0xf8010000 to 0xf88fffff and -/// 0xf8f03000 to 0xf8ffffff are reserved but due to granual size of -/// 1MB, it is not possible to define separate regions for them. -pub const OFFSET_AMBA_APB_START: usize = 0xF800_0000; -pub const OFFSET_AMBA_APB_END: usize = 0xF900_0000; - -pub const OFFSET_QSPI_XIP_START: usize = 0xFC00_0000; -pub const OFFSET_QSPI_XIP_END: usize = 0xFE00_0000; - -/// 0xfff00000 to 0xfffb0000 is reserved but due to granual size of -/// 1MB, it is not possible to define separate region for it -pub const OFFSET_OCM_MAPPED_HIGH_START: usize = 0xFFF0_0000; -pub const OFFSET_OCM_MAPPED_HIGH_END: u64 = 0x1_0000_0000; - pub const MAX_DDR_SIZE: usize = 0x4000_0000; pub const ONE_MB: usize = 0x10_0000; -/// First 1 MB of DDR has special treatment, access is dependant on SCU/OCM state. -/// Refer to Zynq TRM UG585 p.106 for more details. -pub const SEGMENTS_DDR_FULL_ACCESSIBLE: usize = (MAX_DDR_SIZE - ONE_MB) / ONE_MB; -pub const SEGMENTS_FPGA_SLAVE: usize = (OFFSET_FPGA_SLAVE_1_START - OFFSET_FPGA_SLAVE_0) / ONE_MB; -pub const SEGMENTS_UNASSIGNED_0: usize = - (OFFSET_IO_PERIPHERALS_START - OFFSET_FPGA_SLAVE_1_END) / ONE_MB; -pub const SEGMENTS_IO_PERIPHS: usize = - (OFFSET_IO_PERIPHERALS_END - OFFSET_IO_PERIPHERALS_START) / ONE_MB; -pub const SEGMENTS_UNASSIGNED_1: usize = (OFFSET_NAND_MEMORY - OFFSET_IO_PERIPHERALS_END) / ONE_MB; -pub const SEGMENTS_NAND: usize = (OFFSET_NOR_MEMORY - OFFSET_NAND_MEMORY) / ONE_MB; -pub const SEGMENTS_NOR: usize = (OFFSET_SRAM_MEMORY - OFFSET_NOR_MEMORY) / ONE_MB; -pub const SEGMENTS_SRAM: usize = (OFFSET_SMC_MEMORIES_END - OFFSET_SRAM_MEMORY) / ONE_MB; -pub const SEGMENTS_UNASSIGNED_2: usize = (OFFSET_AMBA_APB_START - OFFSET_SMC_MEMORIES_END) / ONE_MB; -pub const SEGMENTS_AMBA_APB: usize = (OFFSET_AMBA_APB_END - OFFSET_AMBA_APB_START) / ONE_MB; -pub const SEGMENTS_UNASSIGNED_3: usize = (OFFSET_QSPI_XIP_START - OFFSET_AMBA_APB_END) / ONE_MB; -pub const SEGMENTS_QSPI_XIP: usize = (OFFSET_QSPI_XIP_END - OFFSET_QSPI_XIP_START) / ONE_MB; -pub const SEGMENTS_UNASSIGNED_4: usize = - (OFFSET_OCM_MAPPED_HIGH_START - OFFSET_QSPI_XIP_END) / ONE_MB; -pub const SEGMENTS_OCM_MAPPED_HIGH: usize = - ((OFFSET_OCM_MAPPED_HIGH_END - OFFSET_OCM_MAPPED_HIGH_START as u64) / ONE_MB as u64) as usize; -#[derive(Debug, Copy, Clone)] -#[repr(u8)] -pub enum AccessPermissions { - PermissionFault = 0b000, - PrivilegedOnly = 0b001, - NoUserWrite = 0b010, - FullAccess = 0b011, - _Reserved1 = 0b100, - PrivilegedReadOnly = 0b101, - ReadOnly = 0b110, - _Reserved2 = 0b111, +pub mod offsets { + pub const OFFSET_DDR: usize = 0; + pub const OFFSET_DDR_ALL_ACCESSIBLE: usize = 0x10_0000; + + pub const OFFSET_FPGA_SLAVE_0: usize = 0x4000_0000; + pub const OFFSET_FPGA_SLAVE_1_START: usize = 0x8000_0000; + pub const OFFSET_FPGA_SLAVE_1_END: usize = 0xC000_0000; + + pub const OFFSET_IO_PERIPHERALS_START: usize = 0xE000_0000; + pub const OFFSET_IO_PERIPHERALS_END: usize = 0xE030_0000; + + pub const OFFSET_NAND_MEMORY: usize = 0xE100_0000; + pub const OFFSET_NOR_MEMORY: usize = 0xE200_0000; + pub const OFFSET_SRAM_MEMORY: usize = 0xE400_0000; + pub const OFFSET_SMC_MEMORIES_END: usize = 0xE600_0000; + + /// 0xf8000c00 to 0xf8000fff, 0xf8010000 to 0xf88fffff and + /// 0xf8f03000 to 0xf8ffffff are reserved but due to granual size of + /// 1MB, it is not possible to define separate regions for them. + pub const OFFSET_AMBA_APB_START: usize = 0xF800_0000; + pub const OFFSET_AMBA_APB_END: usize = 0xF900_0000; + + pub const OFFSET_QSPI_XIP_START: usize = 0xFC00_0000; + pub const OFFSET_QSPI_XIP_END: usize = 0xFE00_0000; + + /// 0xfff00000 to 0xfffb0000 is reserved but due to granual size of + /// 1MB, it is not possible to define separate region for it + pub const OFFSET_OCM_MAPPED_HIGH_START: usize = 0xFFF0_0000; + pub const OFFSET_OCM_MAPPED_HIGH_END: u64 = 0x1_0000_0000; +} +pub mod segments { + pub use super::offsets::*; + use super::{MAX_DDR_SIZE, ONE_MB}; + + /// First 1 MB of DDR has special treatment, access is dependant on SCU/OCM state. + /// Refer to Zynq TRM UG585 p.106 for more details. + pub const DDR_FULL_ACCESSIBLE: usize = (MAX_DDR_SIZE - ONE_MB) / ONE_MB; + pub const FPGA_SLAVE: usize = (OFFSET_FPGA_SLAVE_1_START - OFFSET_FPGA_SLAVE_0) / ONE_MB; + pub const UNASSIGNED_0: usize = + (OFFSET_IO_PERIPHERALS_START - OFFSET_FPGA_SLAVE_1_END) / ONE_MB; + pub const IO_PERIPHS: usize = + (OFFSET_IO_PERIPHERALS_END - OFFSET_IO_PERIPHERALS_START) / ONE_MB; + pub const UNASSIGNED_1: usize = (OFFSET_NAND_MEMORY - OFFSET_IO_PERIPHERALS_END) / ONE_MB; + pub const NAND: usize = (OFFSET_NOR_MEMORY - OFFSET_NAND_MEMORY) / ONE_MB; + pub const NOR: usize = (OFFSET_SRAM_MEMORY - OFFSET_NOR_MEMORY) / ONE_MB; + pub const SRAM: usize = (OFFSET_SMC_MEMORIES_END - OFFSET_SRAM_MEMORY) / ONE_MB; + pub const SEGMENTS_UNASSIGNED_2: usize = + (OFFSET_AMBA_APB_START - OFFSET_SMC_MEMORIES_END) / ONE_MB; + pub const AMBA_APB: usize = (OFFSET_AMBA_APB_END - OFFSET_AMBA_APB_START) / ONE_MB; + pub const UNASSIGNED_3: usize = (OFFSET_QSPI_XIP_START - OFFSET_AMBA_APB_END) / ONE_MB; + pub const QSPI_XIP: usize = (OFFSET_QSPI_XIP_END - OFFSET_QSPI_XIP_START) / ONE_MB; + pub const UNASSIGNED_4: usize = (OFFSET_OCM_MAPPED_HIGH_START - OFFSET_QSPI_XIP_END) / ONE_MB; + pub const OCM_MAPPED_HIGH: usize = ((OFFSET_OCM_MAPPED_HIGH_END + - OFFSET_OCM_MAPPED_HIGH_START as u64) + / ONE_MB as u64) as usize; } -impl AccessPermissions { - const fn ap(&self) -> u8 { - (*self as u8) & 0b11 - } +pub mod section_attrs { + use cortex_r_a::mmu::{ + AccessPermissions, CacheableMemoryAttribute, MemoryRegionAttributes, SectionAttributes, + }; - const fn apx(&self) -> bool { - (*self as u8) > (AccessPermissions::FullAccess as u8) - } -} - -#[derive(Debug, Copy, Clone)] -#[repr(u8)] -pub enum L1EntryType { - /// Access generates an abort exception. Indicates an unmapped virtual address. - Fault = 0b00, - /// Entry points to a L2 translation table, allowing 1 MB of memory to be further divided - PageTable = 0b01, - /// Maps a 1 MB region to a physical address. - Section = 0b10, - /// Special 1MB section entry which requires 16 entries in the translation table. - Supersection = 0b11, -} - -/// The ARM Cortex-A architecture reference manual p.1363 specifies these attributes in more detail. -/// -/// The B (Bufferable), C (Cacheable), and TEX (Type extension) bit names are inherited from -/// earlier versions of the architecture. These names no longer adequately describe the function -/// of the B, C, and TEX bits. -#[derive(Debug, Copy, Clone)] -pub struct MemoryRegionAttributesRaw { - /// TEX bits - type_extensions: u8, - c: bool, - b: bool, -} - -impl MemoryRegionAttributesRaw { - pub const fn new(type_extensions: u8, c: bool, b: bool) -> Self { - Self { - type_extensions, - c, - b, + pub const DDR: SectionAttributes = SectionAttributes { + non_global: false, + p_bit: false, + shareable: true, + access: AccessPermissions::FullAccess, + // Manager domain + domain: 0b1111, + execute_never: false, + memory_attrs: MemoryRegionAttributes::CacheableMemory { + inner: CacheableMemoryAttribute::WriteBackWriteAlloc, + outer: CacheableMemoryAttribute::WriteBackWriteAlloc, } - } -} - -#[derive(Debug, Copy, Clone)] -pub enum CacheableMemoryAttribute { - NonCacheable = 0b00, - WriteBackWriteAlloc = 0b01, - WriteThroughNoWriteAlloc = 0b10, - WriteBackNoWriteAlloc = 0b11, -} - -#[derive(Debug, Copy, Clone)] -pub enum MemoryRegionAttributes { - StronglyOrdered, - ShareableDevice, - OuterAndInnerWriteThroughNoWriteAlloc, - OuterAndInnerWriteBackNoWriteAlloc, - OuterAndInnerNonCacheable, - OuterAndInnerWriteBackWriteAlloc, - NonShareableDevice, - CacheableMemory { - inner: CacheableMemoryAttribute, - outer: CacheableMemoryAttribute, - }, -} - -impl MemoryRegionAttributes { - pub const fn as_raw(&self) -> MemoryRegionAttributesRaw { - match self { - MemoryRegionAttributes::StronglyOrdered => { - MemoryRegionAttributesRaw::new(0b000, false, false) - } - MemoryRegionAttributes::ShareableDevice => { - MemoryRegionAttributesRaw::new(0b000, false, true) - } - MemoryRegionAttributes::OuterAndInnerWriteThroughNoWriteAlloc => { - MemoryRegionAttributesRaw::new(0b000, true, false) - } - MemoryRegionAttributes::OuterAndInnerWriteBackNoWriteAlloc => { - MemoryRegionAttributesRaw::new(0b000, true, true) - } - MemoryRegionAttributes::OuterAndInnerNonCacheable => { - MemoryRegionAttributesRaw::new(0b001, false, false) - } - MemoryRegionAttributes::OuterAndInnerWriteBackWriteAlloc => { - MemoryRegionAttributesRaw::new(0b001, true, true) - } - MemoryRegionAttributes::NonShareableDevice => { - MemoryRegionAttributesRaw::new(0b010, false, false) - } - MemoryRegionAttributes::CacheableMemory { inner, outer } => { - MemoryRegionAttributesRaw::new( - 1 << 2 | (*outer as u8), - (*inner as u8 & 0b10) != 0, - (*inner as u8 & 0b01) != 0, - ) - } + .as_raw(), + }; + pub const FPGA_SLAVES: SectionAttributes = SectionAttributes { + non_global: false, + p_bit: false, + shareable: false, + access: AccessPermissions::FullAccess, + domain: 0b0000, + execute_never: false, + memory_attrs: MemoryRegionAttributes::StronglyOrdered.as_raw(), + }; + pub const SHAREABLE_DEVICE: SectionAttributes = SectionAttributes { + non_global: false, + p_bit: false, + shareable: false, + access: AccessPermissions::FullAccess, + domain: 0b0000, + execute_never: false, + memory_attrs: MemoryRegionAttributes::ShareableDevice.as_raw(), + }; + pub const SRAM: SectionAttributes = SectionAttributes { + non_global: false, + p_bit: false, + shareable: false, + access: AccessPermissions::FullAccess, + domain: 0b0000, + execute_never: false, + memory_attrs: MemoryRegionAttributes::OuterAndInnerWriteBackNoWriteAlloc.as_raw(), + }; + pub const QSPI_XIP: SectionAttributes = SectionAttributes { + non_global: false, + p_bit: false, + shareable: false, + access: AccessPermissions::FullAccess, + domain: 0b0000, + execute_never: false, + memory_attrs: MemoryRegionAttributes::OuterAndInnerWriteThroughNoWriteAlloc.as_raw(), + }; + pub const OCM_MAPPED_HIGH: SectionAttributes = SectionAttributes { + non_global: false, + p_bit: false, + shareable: false, + access: AccessPermissions::FullAccess, + domain: 0b0000, + execute_never: false, + memory_attrs: MemoryRegionAttributes::CacheableMemory { + inner: CacheableMemoryAttribute::WriteThroughNoWriteAlloc, + outer: CacheableMemoryAttribute::NonCacheable, } - } + .as_raw(), + }; + pub const UNASSIGNED_RESERVED: SectionAttributes = SectionAttributes { + non_global: false, + p_bit: false, + shareable: false, + access: AccessPermissions::PermissionFault, + domain: 0b0000, + execute_never: false, + memory_attrs: MemoryRegionAttributes::StronglyOrdered.as_raw(), + }; } -#[derive(Debug, Copy, Clone)] -pub struct SectionAttributes { - /// NG bit - non_global: bool, - /// Implementation defined bit. - p_bit: bool, - shareable: bool, - /// AP bits - access: AccessPermissions, - memory_attrs: MemoryRegionAttributesRaw, - domain: u8, - /// xN bit. - execute_never: bool, -} - -/// 1 MB section translation entry, mapping a 1 MB region to a physical address. -#[derive(Debug, Copy, Clone)] -pub struct L1Section(pub u32); - -impl L1Section { - /// The physical base address. The uppermost 12 bits define which 1 MB of virtual address - /// space are being accessed. They will be stored in the L1 section table. This address - /// MUST be aligned to 1 MB. This code will panic if this is not the case. - pub const fn new(phys_base: u32, section_attrs: SectionAttributes) -> Self { - // Must be aligned to 1 MB - if phys_base & 0x000F_FFFF != 0 { - panic!("physical base address for L1 section must be aligned to 1 MB"); - } - let higher_bits = phys_base >> 20; - let raw = (higher_bits << 20) - | ((section_attrs.non_global as u32) << 17) - | ((section_attrs.shareable as u32) << 16) - | ((section_attrs.access.apx() as u32) << 15) - | ((section_attrs.memory_attrs.type_extensions as u32) << 12) - | ((section_attrs.access.ap() as u32) << 10) - | ((section_attrs.p_bit as u32) << 9) - | ((section_attrs.domain as u32) << 5) - | ((section_attrs.execute_never as u32) << 4) - | ((section_attrs.memory_attrs.c as u32) << 3) - | ((section_attrs.memory_attrs.b as u32) << 2) - | L1EntryType::Section as u32; - L1Section(raw) - } -} - -pub const SECTION_ATTRS_DDR: SectionAttributes = SectionAttributes { - non_global: false, - p_bit: false, - shareable: true, - access: AccessPermissions::FullAccess, - // Manager domain - domain: 0b1111, - execute_never: false, - memory_attrs: MemoryRegionAttributes::CacheableMemory { - inner: CacheableMemoryAttribute::WriteBackWriteAlloc, - outer: CacheableMemoryAttribute::WriteBackWriteAlloc, - } - .as_raw(), -}; - -pub const SECTION_ATTRS_FPGA_SLAVES: SectionAttributes = SectionAttributes { - non_global: false, - p_bit: false, - shareable: false, - access: AccessPermissions::FullAccess, - domain: 0b0000, - execute_never: false, - memory_attrs: MemoryRegionAttributes::StronglyOrdered.as_raw(), -}; -pub const SECTION_ATTRS_SHAREABLE_DEVICE: SectionAttributes = SectionAttributes { - non_global: false, - p_bit: false, - shareable: false, - access: AccessPermissions::FullAccess, - domain: 0b0000, - execute_never: false, - memory_attrs: MemoryRegionAttributes::ShareableDevice.as_raw(), -}; -pub const SECTION_ATTRS_SRAM: SectionAttributes = SectionAttributes { - non_global: false, - p_bit: false, - shareable: false, - access: AccessPermissions::FullAccess, - domain: 0b0000, - execute_never: false, - memory_attrs: MemoryRegionAttributes::OuterAndInnerWriteBackNoWriteAlloc.as_raw(), -}; -pub const SECTION_ATTRS_QSPI_XIP: SectionAttributes = SectionAttributes { - non_global: false, - p_bit: false, - shareable: false, - access: AccessPermissions::FullAccess, - domain: 0b0000, - execute_never: false, - memory_attrs: MemoryRegionAttributes::OuterAndInnerWriteThroughNoWriteAlloc.as_raw(), -}; -pub const SECTION_ATTRS_OCM_MAPPED_HIGH: SectionAttributes = SectionAttributes { - non_global: false, - p_bit: false, - shareable: false, - access: AccessPermissions::FullAccess, - domain: 0b0000, - execute_never: false, - memory_attrs: MemoryRegionAttributes::CacheableMemory { - inner: CacheableMemoryAttribute::WriteThroughNoWriteAlloc, - outer: CacheableMemoryAttribute::NonCacheable, - } - .as_raw(), -}; -pub const SECTION_ATTRS_UNASSIGNED_RESERVED: SectionAttributes = SectionAttributes { - non_global: false, - p_bit: false, - shareable: false, - access: AccessPermissions::PermissionFault, - domain: 0b0000, - execute_never: false, - memory_attrs: MemoryRegionAttributes::StronglyOrdered.as_raw(), -}; - pub const NUM_L1_PAGE_TABLE_ENTRIES: usize = 4096; #[repr(C, align(16384))] @@ -327,8 +175,9 @@ pub struct L1Table(pub(crate) [u32; NUM_L1_PAGE_TABLE_ENTRIES]); /// called once in the boot code before enabling the MMU, and it should be called while the MMU is /// disabled. #[unsafe(no_mangle)] +#[cfg(feature = "rt")] unsafe extern "C" fn load_mmu_table() { - let table_base = &MMU_L1_PAGE_TABLE.0 as *const _ as u32; + let table_base = &crate::mmu_table::MMU_L1_PAGE_TABLE.0 as *const _ as u32; unsafe { core::arch::asm!( diff --git a/zynq7000-rt/src/mmu_table.rs b/zynq7000-rt/src/mmu_table.rs index 0e73e2f..1c93920 100644 --- a/zynq7000-rt/src/mmu_table.rs +++ b/zynq7000-rt/src/mmu_table.rs @@ -1,4120 +1,4121 @@ //! This file is auto-generated by table-gen.rs. Do not edit it! -use crate::mmu::*; +use crate::mmu::{L1Table, section_attrs}; +use cortex_r_a::mmu::L1Section; /// MMU Level 1 Page table. /// /// 4096 entries, each covering 1MB of the address space. pub const MMU_L1_PAGE_TABLE: L1Table = L1Table([ // First DDR segment, OCM memory (0x0000_0000 - 0x0010_0000) - L1Section::new(0, SECTION_ATTRS_DDR).0, + L1Section::new(0, section_attrs::DDR).0, // DDR memory (0x00100000 - 0x4000_0000) - L1Section::new(1048576, SECTION_ATTRS_DDR).0, - L1Section::new(2097152, SECTION_ATTRS_DDR).0, - L1Section::new(3145728, SECTION_ATTRS_DDR).0, - L1Section::new(4194304, SECTION_ATTRS_DDR).0, - L1Section::new(5242880, SECTION_ATTRS_DDR).0, - L1Section::new(6291456, SECTION_ATTRS_DDR).0, - L1Section::new(7340032, SECTION_ATTRS_DDR).0, - L1Section::new(8388608, SECTION_ATTRS_DDR).0, - L1Section::new(9437184, SECTION_ATTRS_DDR).0, - L1Section::new(10485760, SECTION_ATTRS_DDR).0, - L1Section::new(11534336, SECTION_ATTRS_DDR).0, - L1Section::new(12582912, SECTION_ATTRS_DDR).0, - L1Section::new(13631488, SECTION_ATTRS_DDR).0, - L1Section::new(14680064, SECTION_ATTRS_DDR).0, - L1Section::new(15728640, SECTION_ATTRS_DDR).0, - L1Section::new(16777216, SECTION_ATTRS_DDR).0, - L1Section::new(17825792, SECTION_ATTRS_DDR).0, - L1Section::new(18874368, SECTION_ATTRS_DDR).0, - L1Section::new(19922944, SECTION_ATTRS_DDR).0, - L1Section::new(20971520, SECTION_ATTRS_DDR).0, - L1Section::new(22020096, SECTION_ATTRS_DDR).0, - L1Section::new(23068672, SECTION_ATTRS_DDR).0, - L1Section::new(24117248, SECTION_ATTRS_DDR).0, - L1Section::new(25165824, SECTION_ATTRS_DDR).0, - L1Section::new(26214400, SECTION_ATTRS_DDR).0, - L1Section::new(27262976, SECTION_ATTRS_DDR).0, - L1Section::new(28311552, SECTION_ATTRS_DDR).0, - L1Section::new(29360128, SECTION_ATTRS_DDR).0, - L1Section::new(30408704, SECTION_ATTRS_DDR).0, - L1Section::new(31457280, SECTION_ATTRS_DDR).0, - L1Section::new(32505856, SECTION_ATTRS_DDR).0, - L1Section::new(33554432, SECTION_ATTRS_DDR).0, - L1Section::new(34603008, SECTION_ATTRS_DDR).0, - L1Section::new(35651584, SECTION_ATTRS_DDR).0, - L1Section::new(36700160, SECTION_ATTRS_DDR).0, - L1Section::new(37748736, SECTION_ATTRS_DDR).0, - L1Section::new(38797312, SECTION_ATTRS_DDR).0, - L1Section::new(39845888, SECTION_ATTRS_DDR).0, - L1Section::new(40894464, SECTION_ATTRS_DDR).0, - L1Section::new(41943040, SECTION_ATTRS_DDR).0, - L1Section::new(42991616, SECTION_ATTRS_DDR).0, - L1Section::new(44040192, SECTION_ATTRS_DDR).0, - L1Section::new(45088768, SECTION_ATTRS_DDR).0, - L1Section::new(46137344, SECTION_ATTRS_DDR).0, - L1Section::new(47185920, SECTION_ATTRS_DDR).0, - L1Section::new(48234496, SECTION_ATTRS_DDR).0, - L1Section::new(49283072, SECTION_ATTRS_DDR).0, - L1Section::new(50331648, SECTION_ATTRS_DDR).0, - L1Section::new(51380224, SECTION_ATTRS_DDR).0, - L1Section::new(52428800, SECTION_ATTRS_DDR).0, - L1Section::new(53477376, SECTION_ATTRS_DDR).0, - L1Section::new(54525952, SECTION_ATTRS_DDR).0, - L1Section::new(55574528, SECTION_ATTRS_DDR).0, - L1Section::new(56623104, SECTION_ATTRS_DDR).0, - L1Section::new(57671680, SECTION_ATTRS_DDR).0, - L1Section::new(58720256, SECTION_ATTRS_DDR).0, - L1Section::new(59768832, SECTION_ATTRS_DDR).0, - L1Section::new(60817408, SECTION_ATTRS_DDR).0, - L1Section::new(61865984, SECTION_ATTRS_DDR).0, - L1Section::new(62914560, SECTION_ATTRS_DDR).0, - L1Section::new(63963136, SECTION_ATTRS_DDR).0, - L1Section::new(65011712, SECTION_ATTRS_DDR).0, - L1Section::new(66060288, SECTION_ATTRS_DDR).0, - L1Section::new(67108864, SECTION_ATTRS_DDR).0, - L1Section::new(68157440, SECTION_ATTRS_DDR).0, - L1Section::new(69206016, SECTION_ATTRS_DDR).0, - L1Section::new(70254592, SECTION_ATTRS_DDR).0, - L1Section::new(71303168, SECTION_ATTRS_DDR).0, - L1Section::new(72351744, SECTION_ATTRS_DDR).0, - L1Section::new(73400320, SECTION_ATTRS_DDR).0, - L1Section::new(74448896, SECTION_ATTRS_DDR).0, - L1Section::new(75497472, SECTION_ATTRS_DDR).0, - L1Section::new(76546048, SECTION_ATTRS_DDR).0, - L1Section::new(77594624, SECTION_ATTRS_DDR).0, - L1Section::new(78643200, SECTION_ATTRS_DDR).0, - L1Section::new(79691776, SECTION_ATTRS_DDR).0, - L1Section::new(80740352, SECTION_ATTRS_DDR).0, - L1Section::new(81788928, SECTION_ATTRS_DDR).0, - L1Section::new(82837504, SECTION_ATTRS_DDR).0, - L1Section::new(83886080, SECTION_ATTRS_DDR).0, - L1Section::new(84934656, SECTION_ATTRS_DDR).0, - L1Section::new(85983232, SECTION_ATTRS_DDR).0, - L1Section::new(87031808, SECTION_ATTRS_DDR).0, - L1Section::new(88080384, SECTION_ATTRS_DDR).0, - L1Section::new(89128960, SECTION_ATTRS_DDR).0, - L1Section::new(90177536, SECTION_ATTRS_DDR).0, - L1Section::new(91226112, SECTION_ATTRS_DDR).0, - L1Section::new(92274688, SECTION_ATTRS_DDR).0, - L1Section::new(93323264, SECTION_ATTRS_DDR).0, - L1Section::new(94371840, SECTION_ATTRS_DDR).0, - L1Section::new(95420416, SECTION_ATTRS_DDR).0, - L1Section::new(96468992, SECTION_ATTRS_DDR).0, - L1Section::new(97517568, SECTION_ATTRS_DDR).0, - L1Section::new(98566144, SECTION_ATTRS_DDR).0, - L1Section::new(99614720, SECTION_ATTRS_DDR).0, - L1Section::new(100663296, SECTION_ATTRS_DDR).0, - L1Section::new(101711872, SECTION_ATTRS_DDR).0, - L1Section::new(102760448, SECTION_ATTRS_DDR).0, - L1Section::new(103809024, SECTION_ATTRS_DDR).0, - L1Section::new(104857600, SECTION_ATTRS_DDR).0, - L1Section::new(105906176, SECTION_ATTRS_DDR).0, - L1Section::new(106954752, SECTION_ATTRS_DDR).0, - L1Section::new(108003328, SECTION_ATTRS_DDR).0, - L1Section::new(109051904, SECTION_ATTRS_DDR).0, - L1Section::new(110100480, SECTION_ATTRS_DDR).0, - L1Section::new(111149056, SECTION_ATTRS_DDR).0, - L1Section::new(112197632, SECTION_ATTRS_DDR).0, - L1Section::new(113246208, SECTION_ATTRS_DDR).0, - L1Section::new(114294784, SECTION_ATTRS_DDR).0, - L1Section::new(115343360, SECTION_ATTRS_DDR).0, - L1Section::new(116391936, SECTION_ATTRS_DDR).0, - L1Section::new(117440512, SECTION_ATTRS_DDR).0, - L1Section::new(118489088, SECTION_ATTRS_DDR).0, - L1Section::new(119537664, SECTION_ATTRS_DDR).0, - L1Section::new(120586240, SECTION_ATTRS_DDR).0, - L1Section::new(121634816, SECTION_ATTRS_DDR).0, - L1Section::new(122683392, SECTION_ATTRS_DDR).0, - L1Section::new(123731968, SECTION_ATTRS_DDR).0, - L1Section::new(124780544, SECTION_ATTRS_DDR).0, - L1Section::new(125829120, SECTION_ATTRS_DDR).0, - L1Section::new(126877696, SECTION_ATTRS_DDR).0, - L1Section::new(127926272, SECTION_ATTRS_DDR).0, - L1Section::new(128974848, SECTION_ATTRS_DDR).0, - L1Section::new(130023424, SECTION_ATTRS_DDR).0, - L1Section::new(131072000, SECTION_ATTRS_DDR).0, - L1Section::new(132120576, SECTION_ATTRS_DDR).0, - L1Section::new(133169152, SECTION_ATTRS_DDR).0, - L1Section::new(134217728, SECTION_ATTRS_DDR).0, - L1Section::new(135266304, SECTION_ATTRS_DDR).0, - L1Section::new(136314880, SECTION_ATTRS_DDR).0, - L1Section::new(137363456, SECTION_ATTRS_DDR).0, - L1Section::new(138412032, SECTION_ATTRS_DDR).0, - L1Section::new(139460608, SECTION_ATTRS_DDR).0, - L1Section::new(140509184, SECTION_ATTRS_DDR).0, - L1Section::new(141557760, SECTION_ATTRS_DDR).0, - L1Section::new(142606336, SECTION_ATTRS_DDR).0, - L1Section::new(143654912, SECTION_ATTRS_DDR).0, - L1Section::new(144703488, SECTION_ATTRS_DDR).0, - L1Section::new(145752064, SECTION_ATTRS_DDR).0, - L1Section::new(146800640, SECTION_ATTRS_DDR).0, - L1Section::new(147849216, SECTION_ATTRS_DDR).0, - L1Section::new(148897792, SECTION_ATTRS_DDR).0, - L1Section::new(149946368, SECTION_ATTRS_DDR).0, - L1Section::new(150994944, SECTION_ATTRS_DDR).0, - L1Section::new(152043520, SECTION_ATTRS_DDR).0, - L1Section::new(153092096, SECTION_ATTRS_DDR).0, - L1Section::new(154140672, SECTION_ATTRS_DDR).0, - L1Section::new(155189248, SECTION_ATTRS_DDR).0, - L1Section::new(156237824, SECTION_ATTRS_DDR).0, - L1Section::new(157286400, SECTION_ATTRS_DDR).0, - L1Section::new(158334976, SECTION_ATTRS_DDR).0, - L1Section::new(159383552, SECTION_ATTRS_DDR).0, - L1Section::new(160432128, SECTION_ATTRS_DDR).0, - L1Section::new(161480704, SECTION_ATTRS_DDR).0, - L1Section::new(162529280, SECTION_ATTRS_DDR).0, - L1Section::new(163577856, SECTION_ATTRS_DDR).0, - L1Section::new(164626432, SECTION_ATTRS_DDR).0, - L1Section::new(165675008, SECTION_ATTRS_DDR).0, - L1Section::new(166723584, SECTION_ATTRS_DDR).0, - L1Section::new(167772160, SECTION_ATTRS_DDR).0, - L1Section::new(168820736, SECTION_ATTRS_DDR).0, - L1Section::new(169869312, SECTION_ATTRS_DDR).0, - L1Section::new(170917888, SECTION_ATTRS_DDR).0, - L1Section::new(171966464, SECTION_ATTRS_DDR).0, - L1Section::new(173015040, SECTION_ATTRS_DDR).0, - L1Section::new(174063616, SECTION_ATTRS_DDR).0, - L1Section::new(175112192, SECTION_ATTRS_DDR).0, - L1Section::new(176160768, SECTION_ATTRS_DDR).0, - L1Section::new(177209344, SECTION_ATTRS_DDR).0, - L1Section::new(178257920, SECTION_ATTRS_DDR).0, - L1Section::new(179306496, SECTION_ATTRS_DDR).0, - L1Section::new(180355072, SECTION_ATTRS_DDR).0, - L1Section::new(181403648, SECTION_ATTRS_DDR).0, - L1Section::new(182452224, SECTION_ATTRS_DDR).0, - L1Section::new(183500800, SECTION_ATTRS_DDR).0, - L1Section::new(184549376, SECTION_ATTRS_DDR).0, - L1Section::new(185597952, SECTION_ATTRS_DDR).0, - L1Section::new(186646528, SECTION_ATTRS_DDR).0, - L1Section::new(187695104, SECTION_ATTRS_DDR).0, - L1Section::new(188743680, SECTION_ATTRS_DDR).0, - L1Section::new(189792256, SECTION_ATTRS_DDR).0, - L1Section::new(190840832, SECTION_ATTRS_DDR).0, - L1Section::new(191889408, SECTION_ATTRS_DDR).0, - L1Section::new(192937984, SECTION_ATTRS_DDR).0, - L1Section::new(193986560, SECTION_ATTRS_DDR).0, - L1Section::new(195035136, SECTION_ATTRS_DDR).0, - L1Section::new(196083712, SECTION_ATTRS_DDR).0, - L1Section::new(197132288, SECTION_ATTRS_DDR).0, - L1Section::new(198180864, SECTION_ATTRS_DDR).0, - L1Section::new(199229440, SECTION_ATTRS_DDR).0, - L1Section::new(200278016, SECTION_ATTRS_DDR).0, - L1Section::new(201326592, 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L1Section::new(848297984, section_attrs::DDR).0, + L1Section::new(849346560, section_attrs::DDR).0, + L1Section::new(850395136, section_attrs::DDR).0, + L1Section::new(851443712, section_attrs::DDR).0, + L1Section::new(852492288, section_attrs::DDR).0, + L1Section::new(853540864, section_attrs::DDR).0, + L1Section::new(854589440, section_attrs::DDR).0, + L1Section::new(855638016, section_attrs::DDR).0, + L1Section::new(856686592, section_attrs::DDR).0, + L1Section::new(857735168, section_attrs::DDR).0, + L1Section::new(858783744, section_attrs::DDR).0, + L1Section::new(859832320, section_attrs::DDR).0, + L1Section::new(860880896, section_attrs::DDR).0, + L1Section::new(861929472, section_attrs::DDR).0, + L1Section::new(862978048, section_attrs::DDR).0, + L1Section::new(864026624, section_attrs::DDR).0, + L1Section::new(865075200, section_attrs::DDR).0, + L1Section::new(866123776, section_attrs::DDR).0, + L1Section::new(867172352, section_attrs::DDR).0, + L1Section::new(868220928, section_attrs::DDR).0, + L1Section::new(869269504, section_attrs::DDR).0, + L1Section::new(870318080, section_attrs::DDR).0, + L1Section::new(871366656, section_attrs::DDR).0, + L1Section::new(872415232, section_attrs::DDR).0, + L1Section::new(873463808, section_attrs::DDR).0, + L1Section::new(874512384, section_attrs::DDR).0, + L1Section::new(875560960, section_attrs::DDR).0, + L1Section::new(876609536, section_attrs::DDR).0, + L1Section::new(877658112, section_attrs::DDR).0, + L1Section::new(878706688, section_attrs::DDR).0, + L1Section::new(879755264, section_attrs::DDR).0, + L1Section::new(880803840, section_attrs::DDR).0, + L1Section::new(881852416, section_attrs::DDR).0, + L1Section::new(882900992, section_attrs::DDR).0, + L1Section::new(883949568, section_attrs::DDR).0, + L1Section::new(884998144, section_attrs::DDR).0, + L1Section::new(886046720, section_attrs::DDR).0, + L1Section::new(887095296, section_attrs::DDR).0, + L1Section::new(888143872, section_attrs::DDR).0, + L1Section::new(889192448, section_attrs::DDR).0, + L1Section::new(890241024, section_attrs::DDR).0, + L1Section::new(891289600, section_attrs::DDR).0, + L1Section::new(892338176, section_attrs::DDR).0, + L1Section::new(893386752, section_attrs::DDR).0, + L1Section::new(894435328, section_attrs::DDR).0, + L1Section::new(895483904, section_attrs::DDR).0, + L1Section::new(896532480, section_attrs::DDR).0, + L1Section::new(897581056, section_attrs::DDR).0, + L1Section::new(898629632, section_attrs::DDR).0, + L1Section::new(899678208, section_attrs::DDR).0, + L1Section::new(900726784, section_attrs::DDR).0, + L1Section::new(901775360, section_attrs::DDR).0, + L1Section::new(902823936, section_attrs::DDR).0, + L1Section::new(903872512, section_attrs::DDR).0, + L1Section::new(904921088, section_attrs::DDR).0, + L1Section::new(905969664, section_attrs::DDR).0, + L1Section::new(907018240, section_attrs::DDR).0, + L1Section::new(908066816, section_attrs::DDR).0, + L1Section::new(909115392, section_attrs::DDR).0, + L1Section::new(910163968, section_attrs::DDR).0, + L1Section::new(911212544, section_attrs::DDR).0, + L1Section::new(912261120, section_attrs::DDR).0, + L1Section::new(913309696, section_attrs::DDR).0, + L1Section::new(914358272, section_attrs::DDR).0, + L1Section::new(915406848, section_attrs::DDR).0, + L1Section::new(916455424, section_attrs::DDR).0, + L1Section::new(917504000, section_attrs::DDR).0, + L1Section::new(918552576, section_attrs::DDR).0, + L1Section::new(919601152, section_attrs::DDR).0, + L1Section::new(920649728, section_attrs::DDR).0, + L1Section::new(921698304, section_attrs::DDR).0, + L1Section::new(922746880, section_attrs::DDR).0, + L1Section::new(923795456, section_attrs::DDR).0, + L1Section::new(924844032, section_attrs::DDR).0, + L1Section::new(925892608, section_attrs::DDR).0, + L1Section::new(926941184, section_attrs::DDR).0, + L1Section::new(927989760, section_attrs::DDR).0, + L1Section::new(929038336, section_attrs::DDR).0, + L1Section::new(930086912, section_attrs::DDR).0, + L1Section::new(931135488, section_attrs::DDR).0, + L1Section::new(932184064, section_attrs::DDR).0, + L1Section::new(933232640, section_attrs::DDR).0, + L1Section::new(934281216, section_attrs::DDR).0, + L1Section::new(935329792, section_attrs::DDR).0, + L1Section::new(936378368, section_attrs::DDR).0, + L1Section::new(937426944, section_attrs::DDR).0, + L1Section::new(938475520, section_attrs::DDR).0, + L1Section::new(939524096, section_attrs::DDR).0, + L1Section::new(940572672, section_attrs::DDR).0, + L1Section::new(941621248, section_attrs::DDR).0, + L1Section::new(942669824, section_attrs::DDR).0, + L1Section::new(943718400, section_attrs::DDR).0, + L1Section::new(944766976, section_attrs::DDR).0, + L1Section::new(945815552, section_attrs::DDR).0, + L1Section::new(946864128, section_attrs::DDR).0, + L1Section::new(947912704, section_attrs::DDR).0, + L1Section::new(948961280, section_attrs::DDR).0, + L1Section::new(950009856, section_attrs::DDR).0, + L1Section::new(951058432, section_attrs::DDR).0, + L1Section::new(952107008, section_attrs::DDR).0, + L1Section::new(953155584, section_attrs::DDR).0, + L1Section::new(954204160, section_attrs::DDR).0, + L1Section::new(955252736, section_attrs::DDR).0, + L1Section::new(956301312, section_attrs::DDR).0, + L1Section::new(957349888, section_attrs::DDR).0, + L1Section::new(958398464, section_attrs::DDR).0, + L1Section::new(959447040, section_attrs::DDR).0, + L1Section::new(960495616, section_attrs::DDR).0, + L1Section::new(961544192, section_attrs::DDR).0, + L1Section::new(962592768, section_attrs::DDR).0, + L1Section::new(963641344, section_attrs::DDR).0, + L1Section::new(964689920, section_attrs::DDR).0, + L1Section::new(965738496, section_attrs::DDR).0, + L1Section::new(966787072, section_attrs::DDR).0, + L1Section::new(967835648, section_attrs::DDR).0, + L1Section::new(968884224, section_attrs::DDR).0, + L1Section::new(969932800, section_attrs::DDR).0, + L1Section::new(970981376, section_attrs::DDR).0, + L1Section::new(972029952, section_attrs::DDR).0, + L1Section::new(973078528, section_attrs::DDR).0, + L1Section::new(974127104, section_attrs::DDR).0, + L1Section::new(975175680, section_attrs::DDR).0, + L1Section::new(976224256, section_attrs::DDR).0, + L1Section::new(977272832, section_attrs::DDR).0, + L1Section::new(978321408, section_attrs::DDR).0, + L1Section::new(979369984, section_attrs::DDR).0, + L1Section::new(980418560, section_attrs::DDR).0, + L1Section::new(981467136, section_attrs::DDR).0, + L1Section::new(982515712, section_attrs::DDR).0, + L1Section::new(983564288, section_attrs::DDR).0, + L1Section::new(984612864, section_attrs::DDR).0, + L1Section::new(985661440, section_attrs::DDR).0, + L1Section::new(986710016, section_attrs::DDR).0, + L1Section::new(987758592, section_attrs::DDR).0, + L1Section::new(988807168, section_attrs::DDR).0, + L1Section::new(989855744, section_attrs::DDR).0, + L1Section::new(990904320, section_attrs::DDR).0, + L1Section::new(991952896, section_attrs::DDR).0, + L1Section::new(993001472, section_attrs::DDR).0, + L1Section::new(994050048, section_attrs::DDR).0, + L1Section::new(995098624, section_attrs::DDR).0, + L1Section::new(996147200, section_attrs::DDR).0, + L1Section::new(997195776, section_attrs::DDR).0, + L1Section::new(998244352, section_attrs::DDR).0, + L1Section::new(999292928, section_attrs::DDR).0, + L1Section::new(1000341504, section_attrs::DDR).0, + L1Section::new(1001390080, section_attrs::DDR).0, + L1Section::new(1002438656, section_attrs::DDR).0, + L1Section::new(1003487232, section_attrs::DDR).0, + L1Section::new(1004535808, section_attrs::DDR).0, + L1Section::new(1005584384, section_attrs::DDR).0, + L1Section::new(1006632960, section_attrs::DDR).0, + L1Section::new(1007681536, section_attrs::DDR).0, + L1Section::new(1008730112, section_attrs::DDR).0, + L1Section::new(1009778688, section_attrs::DDR).0, + L1Section::new(1010827264, section_attrs::DDR).0, + L1Section::new(1011875840, section_attrs::DDR).0, + L1Section::new(1012924416, section_attrs::DDR).0, + L1Section::new(1013972992, section_attrs::DDR).0, + L1Section::new(1015021568, section_attrs::DDR).0, + L1Section::new(1016070144, section_attrs::DDR).0, + L1Section::new(1017118720, section_attrs::DDR).0, + L1Section::new(1018167296, section_attrs::DDR).0, + L1Section::new(1019215872, section_attrs::DDR).0, + L1Section::new(1020264448, section_attrs::DDR).0, + L1Section::new(1021313024, section_attrs::DDR).0, + L1Section::new(1022361600, section_attrs::DDR).0, + L1Section::new(1023410176, section_attrs::DDR).0, + L1Section::new(1024458752, section_attrs::DDR).0, + L1Section::new(1025507328, section_attrs::DDR).0, + L1Section::new(1026555904, section_attrs::DDR).0, + L1Section::new(1027604480, section_attrs::DDR).0, + L1Section::new(1028653056, section_attrs::DDR).0, + L1Section::new(1029701632, section_attrs::DDR).0, + L1Section::new(1030750208, section_attrs::DDR).0, + L1Section::new(1031798784, section_attrs::DDR).0, + L1Section::new(1032847360, section_attrs::DDR).0, + L1Section::new(1033895936, section_attrs::DDR).0, + L1Section::new(1034944512, section_attrs::DDR).0, + L1Section::new(1035993088, section_attrs::DDR).0, + L1Section::new(1037041664, section_attrs::DDR).0, + L1Section::new(1038090240, section_attrs::DDR).0, + L1Section::new(1039138816, section_attrs::DDR).0, + L1Section::new(1040187392, section_attrs::DDR).0, + L1Section::new(1041235968, section_attrs::DDR).0, + L1Section::new(1042284544, section_attrs::DDR).0, + L1Section::new(1043333120, section_attrs::DDR).0, + L1Section::new(1044381696, section_attrs::DDR).0, + L1Section::new(1045430272, section_attrs::DDR).0, + L1Section::new(1046478848, section_attrs::DDR).0, + L1Section::new(1047527424, section_attrs::DDR).0, + L1Section::new(1048576000, section_attrs::DDR).0, + L1Section::new(1049624576, section_attrs::DDR).0, + L1Section::new(1050673152, section_attrs::DDR).0, + L1Section::new(1051721728, section_attrs::DDR).0, + L1Section::new(1052770304, section_attrs::DDR).0, + L1Section::new(1053818880, section_attrs::DDR).0, + L1Section::new(1054867456, section_attrs::DDR).0, + L1Section::new(1055916032, section_attrs::DDR).0, + L1Section::new(1056964608, section_attrs::DDR).0, + L1Section::new(1058013184, section_attrs::DDR).0, + L1Section::new(1059061760, section_attrs::DDR).0, + L1Section::new(1060110336, section_attrs::DDR).0, + L1Section::new(1061158912, section_attrs::DDR).0, + L1Section::new(1062207488, section_attrs::DDR).0, + L1Section::new(1063256064, section_attrs::DDR).0, + L1Section::new(1064304640, section_attrs::DDR).0, + L1Section::new(1065353216, section_attrs::DDR).0, + L1Section::new(1066401792, section_attrs::DDR).0, + L1Section::new(1067450368, section_attrs::DDR).0, + L1Section::new(1068498944, section_attrs::DDR).0, + L1Section::new(1069547520, section_attrs::DDR).0, + L1Section::new(1070596096, section_attrs::DDR).0, + L1Section::new(1071644672, section_attrs::DDR).0, + L1Section::new(1072693248, section_attrs::DDR).0, // FPGA slave 0 (0x4000_0000 - 0x8000_0000) - L1Section::new(1073741824, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(1074790400, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(1075838976, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(1076887552, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(1077936128, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(1078984704, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(1080033280, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(1081081856, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(1082130432, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(1083179008, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(1084227584, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(1085276160, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(1086324736, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(1087373312, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(1088421888, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(1089470464, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(1090519040, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(1091567616, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(1092616192, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(1093664768, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(1094713344, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(1095761920, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(1096810496, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(1097859072, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(1098907648, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(1099956224, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(1101004800, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(1102053376, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(1103101952, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(1104150528, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(1105199104, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(1106247680, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(1107296256, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(1108344832, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(1109393408, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(1110441984, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(1111490560, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(1112539136, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(1113587712, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(1114636288, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(1115684864, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(1116733440, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(1117782016, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(1118830592, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(1119879168, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(1120927744, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(1121976320, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(1123024896, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(1124073472, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(1125122048, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(1126170624, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(1127219200, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(1128267776, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(1129316352, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(1130364928, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(1131413504, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(1132462080, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(1133510656, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(1134559232, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(1135607808, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(1136656384, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(1137704960, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(1138753536, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(1139802112, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(1140850688, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(1141899264, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(1142947840, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(1143996416, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(1145044992, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(1146093568, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(1147142144, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(1148190720, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(1149239296, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(1150287872, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(1151336448, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(1152385024, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(1153433600, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(1154482176, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(1155530752, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(1156579328, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(1157627904, SECTION_ATTRS_FPGA_SLAVES).0, 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section_attrs::FPGA_SLAVES).0, + L1Section::new(1980760064, section_attrs::FPGA_SLAVES).0, + L1Section::new(1981808640, section_attrs::FPGA_SLAVES).0, + L1Section::new(1982857216, section_attrs::FPGA_SLAVES).0, + L1Section::new(1983905792, section_attrs::FPGA_SLAVES).0, + L1Section::new(1984954368, section_attrs::FPGA_SLAVES).0, + L1Section::new(1986002944, section_attrs::FPGA_SLAVES).0, + L1Section::new(1987051520, section_attrs::FPGA_SLAVES).0, + L1Section::new(1988100096, section_attrs::FPGA_SLAVES).0, + L1Section::new(1989148672, section_attrs::FPGA_SLAVES).0, + L1Section::new(1990197248, section_attrs::FPGA_SLAVES).0, + L1Section::new(1991245824, section_attrs::FPGA_SLAVES).0, + L1Section::new(1992294400, section_attrs::FPGA_SLAVES).0, + L1Section::new(1993342976, section_attrs::FPGA_SLAVES).0, + L1Section::new(1994391552, section_attrs::FPGA_SLAVES).0, + L1Section::new(1995440128, section_attrs::FPGA_SLAVES).0, + L1Section::new(1996488704, section_attrs::FPGA_SLAVES).0, + L1Section::new(1997537280, section_attrs::FPGA_SLAVES).0, + L1Section::new(1998585856, section_attrs::FPGA_SLAVES).0, + L1Section::new(1999634432, section_attrs::FPGA_SLAVES).0, + L1Section::new(2000683008, section_attrs::FPGA_SLAVES).0, + L1Section::new(2001731584, section_attrs::FPGA_SLAVES).0, + L1Section::new(2002780160, section_attrs::FPGA_SLAVES).0, + L1Section::new(2003828736, section_attrs::FPGA_SLAVES).0, + L1Section::new(2004877312, section_attrs::FPGA_SLAVES).0, + L1Section::new(2005925888, section_attrs::FPGA_SLAVES).0, + L1Section::new(2006974464, section_attrs::FPGA_SLAVES).0, + L1Section::new(2008023040, section_attrs::FPGA_SLAVES).0, + L1Section::new(2009071616, section_attrs::FPGA_SLAVES).0, + L1Section::new(2010120192, section_attrs::FPGA_SLAVES).0, + L1Section::new(2011168768, section_attrs::FPGA_SLAVES).0, + L1Section::new(2012217344, section_attrs::FPGA_SLAVES).0, + L1Section::new(2013265920, section_attrs::FPGA_SLAVES).0, + L1Section::new(2014314496, section_attrs::FPGA_SLAVES).0, + L1Section::new(2015363072, section_attrs::FPGA_SLAVES).0, + L1Section::new(2016411648, section_attrs::FPGA_SLAVES).0, + L1Section::new(2017460224, section_attrs::FPGA_SLAVES).0, + L1Section::new(2018508800, section_attrs::FPGA_SLAVES).0, + L1Section::new(2019557376, section_attrs::FPGA_SLAVES).0, + L1Section::new(2020605952, section_attrs::FPGA_SLAVES).0, + L1Section::new(2021654528, section_attrs::FPGA_SLAVES).0, + L1Section::new(2022703104, section_attrs::FPGA_SLAVES).0, + L1Section::new(2023751680, section_attrs::FPGA_SLAVES).0, + L1Section::new(2024800256, section_attrs::FPGA_SLAVES).0, + L1Section::new(2025848832, section_attrs::FPGA_SLAVES).0, + L1Section::new(2026897408, section_attrs::FPGA_SLAVES).0, + L1Section::new(2027945984, section_attrs::FPGA_SLAVES).0, + L1Section::new(2028994560, section_attrs::FPGA_SLAVES).0, + L1Section::new(2030043136, section_attrs::FPGA_SLAVES).0, + L1Section::new(2031091712, section_attrs::FPGA_SLAVES).0, + L1Section::new(2032140288, section_attrs::FPGA_SLAVES).0, + L1Section::new(2033188864, section_attrs::FPGA_SLAVES).0, + L1Section::new(2034237440, section_attrs::FPGA_SLAVES).0, + L1Section::new(2035286016, section_attrs::FPGA_SLAVES).0, + L1Section::new(2036334592, section_attrs::FPGA_SLAVES).0, + L1Section::new(2037383168, section_attrs::FPGA_SLAVES).0, + L1Section::new(2038431744, section_attrs::FPGA_SLAVES).0, + L1Section::new(2039480320, section_attrs::FPGA_SLAVES).0, + L1Section::new(2040528896, section_attrs::FPGA_SLAVES).0, + L1Section::new(2041577472, section_attrs::FPGA_SLAVES).0, + L1Section::new(2042626048, section_attrs::FPGA_SLAVES).0, + L1Section::new(2043674624, section_attrs::FPGA_SLAVES).0, + L1Section::new(2044723200, section_attrs::FPGA_SLAVES).0, + L1Section::new(2045771776, section_attrs::FPGA_SLAVES).0, + L1Section::new(2046820352, section_attrs::FPGA_SLAVES).0, + L1Section::new(2047868928, section_attrs::FPGA_SLAVES).0, + L1Section::new(2048917504, section_attrs::FPGA_SLAVES).0, + L1Section::new(2049966080, section_attrs::FPGA_SLAVES).0, + L1Section::new(2051014656, section_attrs::FPGA_SLAVES).0, + L1Section::new(2052063232, section_attrs::FPGA_SLAVES).0, + L1Section::new(2053111808, section_attrs::FPGA_SLAVES).0, + L1Section::new(2054160384, section_attrs::FPGA_SLAVES).0, + L1Section::new(2055208960, section_attrs::FPGA_SLAVES).0, + L1Section::new(2056257536, section_attrs::FPGA_SLAVES).0, + L1Section::new(2057306112, section_attrs::FPGA_SLAVES).0, + L1Section::new(2058354688, section_attrs::FPGA_SLAVES).0, + L1Section::new(2059403264, section_attrs::FPGA_SLAVES).0, + L1Section::new(2060451840, section_attrs::FPGA_SLAVES).0, + L1Section::new(2061500416, section_attrs::FPGA_SLAVES).0, + L1Section::new(2062548992, section_attrs::FPGA_SLAVES).0, + L1Section::new(2063597568, section_attrs::FPGA_SLAVES).0, + L1Section::new(2064646144, section_attrs::FPGA_SLAVES).0, + L1Section::new(2065694720, section_attrs::FPGA_SLAVES).0, + L1Section::new(2066743296, section_attrs::FPGA_SLAVES).0, + L1Section::new(2067791872, section_attrs::FPGA_SLAVES).0, + L1Section::new(2068840448, section_attrs::FPGA_SLAVES).0, + L1Section::new(2069889024, section_attrs::FPGA_SLAVES).0, + L1Section::new(2070937600, section_attrs::FPGA_SLAVES).0, + L1Section::new(2071986176, section_attrs::FPGA_SLAVES).0, + L1Section::new(2073034752, section_attrs::FPGA_SLAVES).0, + L1Section::new(2074083328, section_attrs::FPGA_SLAVES).0, + L1Section::new(2075131904, section_attrs::FPGA_SLAVES).0, + L1Section::new(2076180480, section_attrs::FPGA_SLAVES).0, + L1Section::new(2077229056, section_attrs::FPGA_SLAVES).0, + L1Section::new(2078277632, section_attrs::FPGA_SLAVES).0, + L1Section::new(2079326208, section_attrs::FPGA_SLAVES).0, + L1Section::new(2080374784, section_attrs::FPGA_SLAVES).0, + L1Section::new(2081423360, section_attrs::FPGA_SLAVES).0, + L1Section::new(2082471936, section_attrs::FPGA_SLAVES).0, + L1Section::new(2083520512, section_attrs::FPGA_SLAVES).0, + L1Section::new(2084569088, section_attrs::FPGA_SLAVES).0, + L1Section::new(2085617664, section_attrs::FPGA_SLAVES).0, + L1Section::new(2086666240, section_attrs::FPGA_SLAVES).0, + L1Section::new(2087714816, section_attrs::FPGA_SLAVES).0, + L1Section::new(2088763392, section_attrs::FPGA_SLAVES).0, + L1Section::new(2089811968, section_attrs::FPGA_SLAVES).0, + L1Section::new(2090860544, section_attrs::FPGA_SLAVES).0, + L1Section::new(2091909120, section_attrs::FPGA_SLAVES).0, + L1Section::new(2092957696, section_attrs::FPGA_SLAVES).0, + L1Section::new(2094006272, section_attrs::FPGA_SLAVES).0, + L1Section::new(2095054848, section_attrs::FPGA_SLAVES).0, + L1Section::new(2096103424, section_attrs::FPGA_SLAVES).0, + L1Section::new(2097152000, section_attrs::FPGA_SLAVES).0, + L1Section::new(2098200576, section_attrs::FPGA_SLAVES).0, + L1Section::new(2099249152, section_attrs::FPGA_SLAVES).0, + L1Section::new(2100297728, section_attrs::FPGA_SLAVES).0, + L1Section::new(2101346304, section_attrs::FPGA_SLAVES).0, + L1Section::new(2102394880, section_attrs::FPGA_SLAVES).0, + L1Section::new(2103443456, section_attrs::FPGA_SLAVES).0, + L1Section::new(2104492032, section_attrs::FPGA_SLAVES).0, + L1Section::new(2105540608, section_attrs::FPGA_SLAVES).0, + L1Section::new(2106589184, section_attrs::FPGA_SLAVES).0, + L1Section::new(2107637760, section_attrs::FPGA_SLAVES).0, + L1Section::new(2108686336, section_attrs::FPGA_SLAVES).0, + L1Section::new(2109734912, section_attrs::FPGA_SLAVES).0, + L1Section::new(2110783488, section_attrs::FPGA_SLAVES).0, + L1Section::new(2111832064, section_attrs::FPGA_SLAVES).0, + L1Section::new(2112880640, section_attrs::FPGA_SLAVES).0, + L1Section::new(2113929216, section_attrs::FPGA_SLAVES).0, + L1Section::new(2114977792, section_attrs::FPGA_SLAVES).0, + L1Section::new(2116026368, section_attrs::FPGA_SLAVES).0, + L1Section::new(2117074944, section_attrs::FPGA_SLAVES).0, + L1Section::new(2118123520, section_attrs::FPGA_SLAVES).0, + L1Section::new(2119172096, section_attrs::FPGA_SLAVES).0, + L1Section::new(2120220672, section_attrs::FPGA_SLAVES).0, + L1Section::new(2121269248, section_attrs::FPGA_SLAVES).0, + L1Section::new(2122317824, section_attrs::FPGA_SLAVES).0, + L1Section::new(2123366400, section_attrs::FPGA_SLAVES).0, + L1Section::new(2124414976, section_attrs::FPGA_SLAVES).0, + L1Section::new(2125463552, section_attrs::FPGA_SLAVES).0, + L1Section::new(2126512128, section_attrs::FPGA_SLAVES).0, + L1Section::new(2127560704, section_attrs::FPGA_SLAVES).0, + L1Section::new(2128609280, section_attrs::FPGA_SLAVES).0, + L1Section::new(2129657856, section_attrs::FPGA_SLAVES).0, + L1Section::new(2130706432, section_attrs::FPGA_SLAVES).0, + L1Section::new(2131755008, section_attrs::FPGA_SLAVES).0, + L1Section::new(2132803584, section_attrs::FPGA_SLAVES).0, + L1Section::new(2133852160, section_attrs::FPGA_SLAVES).0, + L1Section::new(2134900736, section_attrs::FPGA_SLAVES).0, + L1Section::new(2135949312, section_attrs::FPGA_SLAVES).0, + L1Section::new(2136997888, section_attrs::FPGA_SLAVES).0, + L1Section::new(2138046464, section_attrs::FPGA_SLAVES).0, + L1Section::new(2139095040, section_attrs::FPGA_SLAVES).0, + L1Section::new(2140143616, section_attrs::FPGA_SLAVES).0, + L1Section::new(2141192192, section_attrs::FPGA_SLAVES).0, + L1Section::new(2142240768, section_attrs::FPGA_SLAVES).0, + L1Section::new(2143289344, section_attrs::FPGA_SLAVES).0, + L1Section::new(2144337920, section_attrs::FPGA_SLAVES).0, + L1Section::new(2145386496, section_attrs::FPGA_SLAVES).0, + L1Section::new(2146435072, section_attrs::FPGA_SLAVES).0, // FPGA slave 1 (0x8000_0000 - 0xC000_0000) - L1Section::new(2147483648, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(2148532224, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(2149580800, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(2150629376, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(2151677952, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(2152726528, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(2153775104, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(2154823680, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(2155872256, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(2156920832, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(2157969408, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(2159017984, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(2160066560, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(2161115136, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(2162163712, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(2163212288, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(2164260864, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(2165309440, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(2166358016, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(2167406592, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(2168455168, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(2169503744, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(2170552320, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(2171600896, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(2172649472, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(2173698048, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(2174746624, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(2175795200, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(2176843776, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(2177892352, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(2178940928, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(2179989504, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(2181038080, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(2182086656, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(2183135232, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(2184183808, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(2185232384, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(2186280960, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(2187329536, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(2188378112, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(2189426688, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(2190475264, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(2191523840, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(2192572416, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(2193620992, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(2194669568, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(2195718144, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(2196766720, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(2197815296, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(2198863872, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(2199912448, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(2200961024, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(2202009600, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(2203058176, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(2204106752, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(2205155328, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(2206203904, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(2207252480, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(2208301056, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(2209349632, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(2210398208, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(2211446784, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(2212495360, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(2213543936, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(2214592512, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(2215641088, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(2216689664, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(2217738240, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(2218786816, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(2219835392, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(2220883968, SECTION_ATTRS_FPGA_SLAVES).0, - L1Section::new(2221932544, SECTION_ATTRS_FPGA_SLAVES).0, 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section_attrs::FPGA_SLAVES).0, + L1Section::new(3062890496, section_attrs::FPGA_SLAVES).0, + L1Section::new(3063939072, section_attrs::FPGA_SLAVES).0, + L1Section::new(3064987648, section_attrs::FPGA_SLAVES).0, + L1Section::new(3066036224, section_attrs::FPGA_SLAVES).0, + L1Section::new(3067084800, section_attrs::FPGA_SLAVES).0, + L1Section::new(3068133376, section_attrs::FPGA_SLAVES).0, + L1Section::new(3069181952, section_attrs::FPGA_SLAVES).0, + L1Section::new(3070230528, section_attrs::FPGA_SLAVES).0, + L1Section::new(3071279104, section_attrs::FPGA_SLAVES).0, + L1Section::new(3072327680, section_attrs::FPGA_SLAVES).0, + L1Section::new(3073376256, section_attrs::FPGA_SLAVES).0, + L1Section::new(3074424832, section_attrs::FPGA_SLAVES).0, + L1Section::new(3075473408, section_attrs::FPGA_SLAVES).0, + L1Section::new(3076521984, section_attrs::FPGA_SLAVES).0, + L1Section::new(3077570560, section_attrs::FPGA_SLAVES).0, + L1Section::new(3078619136, section_attrs::FPGA_SLAVES).0, + L1Section::new(3079667712, section_attrs::FPGA_SLAVES).0, + L1Section::new(3080716288, section_attrs::FPGA_SLAVES).0, + L1Section::new(3081764864, section_attrs::FPGA_SLAVES).0, + L1Section::new(3082813440, section_attrs::FPGA_SLAVES).0, + L1Section::new(3083862016, section_attrs::FPGA_SLAVES).0, + L1Section::new(3084910592, section_attrs::FPGA_SLAVES).0, + L1Section::new(3085959168, section_attrs::FPGA_SLAVES).0, + L1Section::new(3087007744, section_attrs::FPGA_SLAVES).0, + L1Section::new(3088056320, section_attrs::FPGA_SLAVES).0, + L1Section::new(3089104896, section_attrs::FPGA_SLAVES).0, + L1Section::new(3090153472, section_attrs::FPGA_SLAVES).0, + L1Section::new(3091202048, section_attrs::FPGA_SLAVES).0, + L1Section::new(3092250624, section_attrs::FPGA_SLAVES).0, + L1Section::new(3093299200, section_attrs::FPGA_SLAVES).0, + L1Section::new(3094347776, section_attrs::FPGA_SLAVES).0, + L1Section::new(3095396352, section_attrs::FPGA_SLAVES).0, + L1Section::new(3096444928, section_attrs::FPGA_SLAVES).0, + L1Section::new(3097493504, section_attrs::FPGA_SLAVES).0, + L1Section::new(3098542080, section_attrs::FPGA_SLAVES).0, + L1Section::new(3099590656, section_attrs::FPGA_SLAVES).0, + L1Section::new(3100639232, section_attrs::FPGA_SLAVES).0, + L1Section::new(3101687808, section_attrs::FPGA_SLAVES).0, + L1Section::new(3102736384, section_attrs::FPGA_SLAVES).0, + L1Section::new(3103784960, section_attrs::FPGA_SLAVES).0, + L1Section::new(3104833536, section_attrs::FPGA_SLAVES).0, + L1Section::new(3105882112, section_attrs::FPGA_SLAVES).0, + L1Section::new(3106930688, section_attrs::FPGA_SLAVES).0, + L1Section::new(3107979264, section_attrs::FPGA_SLAVES).0, + L1Section::new(3109027840, section_attrs::FPGA_SLAVES).0, + L1Section::new(3110076416, section_attrs::FPGA_SLAVES).0, + L1Section::new(3111124992, section_attrs::FPGA_SLAVES).0, + L1Section::new(3112173568, section_attrs::FPGA_SLAVES).0, + L1Section::new(3113222144, section_attrs::FPGA_SLAVES).0, + L1Section::new(3114270720, section_attrs::FPGA_SLAVES).0, + L1Section::new(3115319296, section_attrs::FPGA_SLAVES).0, + L1Section::new(3116367872, section_attrs::FPGA_SLAVES).0, + L1Section::new(3117416448, section_attrs::FPGA_SLAVES).0, + L1Section::new(3118465024, section_attrs::FPGA_SLAVES).0, + L1Section::new(3119513600, section_attrs::FPGA_SLAVES).0, + L1Section::new(3120562176, section_attrs::FPGA_SLAVES).0, + L1Section::new(3121610752, section_attrs::FPGA_SLAVES).0, + L1Section::new(3122659328, section_attrs::FPGA_SLAVES).0, + L1Section::new(3123707904, section_attrs::FPGA_SLAVES).0, + L1Section::new(3124756480, section_attrs::FPGA_SLAVES).0, + L1Section::new(3125805056, section_attrs::FPGA_SLAVES).0, + L1Section::new(3126853632, section_attrs::FPGA_SLAVES).0, + L1Section::new(3127902208, section_attrs::FPGA_SLAVES).0, + L1Section::new(3128950784, section_attrs::FPGA_SLAVES).0, + L1Section::new(3129999360, section_attrs::FPGA_SLAVES).0, + L1Section::new(3131047936, section_attrs::FPGA_SLAVES).0, + L1Section::new(3132096512, section_attrs::FPGA_SLAVES).0, + L1Section::new(3133145088, section_attrs::FPGA_SLAVES).0, + L1Section::new(3134193664, section_attrs::FPGA_SLAVES).0, + L1Section::new(3135242240, section_attrs::FPGA_SLAVES).0, + L1Section::new(3136290816, section_attrs::FPGA_SLAVES).0, + L1Section::new(3137339392, section_attrs::FPGA_SLAVES).0, + L1Section::new(3138387968, section_attrs::FPGA_SLAVES).0, + L1Section::new(3139436544, section_attrs::FPGA_SLAVES).0, + L1Section::new(3140485120, section_attrs::FPGA_SLAVES).0, + L1Section::new(3141533696, section_attrs::FPGA_SLAVES).0, + L1Section::new(3142582272, section_attrs::FPGA_SLAVES).0, + L1Section::new(3143630848, section_attrs::FPGA_SLAVES).0, + L1Section::new(3144679424, section_attrs::FPGA_SLAVES).0, + L1Section::new(3145728000, section_attrs::FPGA_SLAVES).0, + L1Section::new(3146776576, section_attrs::FPGA_SLAVES).0, + L1Section::new(3147825152, section_attrs::FPGA_SLAVES).0, + L1Section::new(3148873728, section_attrs::FPGA_SLAVES).0, + L1Section::new(3149922304, section_attrs::FPGA_SLAVES).0, + L1Section::new(3150970880, section_attrs::FPGA_SLAVES).0, + L1Section::new(3152019456, section_attrs::FPGA_SLAVES).0, + L1Section::new(3153068032, section_attrs::FPGA_SLAVES).0, + L1Section::new(3154116608, section_attrs::FPGA_SLAVES).0, + L1Section::new(3155165184, section_attrs::FPGA_SLAVES).0, + L1Section::new(3156213760, section_attrs::FPGA_SLAVES).0, + L1Section::new(3157262336, section_attrs::FPGA_SLAVES).0, + L1Section::new(3158310912, section_attrs::FPGA_SLAVES).0, + L1Section::new(3159359488, section_attrs::FPGA_SLAVES).0, + L1Section::new(3160408064, section_attrs::FPGA_SLAVES).0, + L1Section::new(3161456640, section_attrs::FPGA_SLAVES).0, + L1Section::new(3162505216, section_attrs::FPGA_SLAVES).0, + L1Section::new(3163553792, section_attrs::FPGA_SLAVES).0, + L1Section::new(3164602368, section_attrs::FPGA_SLAVES).0, + L1Section::new(3165650944, section_attrs::FPGA_SLAVES).0, + L1Section::new(3166699520, section_attrs::FPGA_SLAVES).0, + L1Section::new(3167748096, section_attrs::FPGA_SLAVES).0, + L1Section::new(3168796672, section_attrs::FPGA_SLAVES).0, + L1Section::new(3169845248, section_attrs::FPGA_SLAVES).0, + L1Section::new(3170893824, section_attrs::FPGA_SLAVES).0, + L1Section::new(3171942400, section_attrs::FPGA_SLAVES).0, + L1Section::new(3172990976, section_attrs::FPGA_SLAVES).0, + L1Section::new(3174039552, section_attrs::FPGA_SLAVES).0, + L1Section::new(3175088128, section_attrs::FPGA_SLAVES).0, + L1Section::new(3176136704, section_attrs::FPGA_SLAVES).0, + L1Section::new(3177185280, section_attrs::FPGA_SLAVES).0, + L1Section::new(3178233856, section_attrs::FPGA_SLAVES).0, + L1Section::new(3179282432, section_attrs::FPGA_SLAVES).0, + L1Section::new(3180331008, section_attrs::FPGA_SLAVES).0, + L1Section::new(3181379584, section_attrs::FPGA_SLAVES).0, + L1Section::new(3182428160, section_attrs::FPGA_SLAVES).0, + L1Section::new(3183476736, section_attrs::FPGA_SLAVES).0, + L1Section::new(3184525312, section_attrs::FPGA_SLAVES).0, + L1Section::new(3185573888, section_attrs::FPGA_SLAVES).0, + L1Section::new(3186622464, section_attrs::FPGA_SLAVES).0, + L1Section::new(3187671040, section_attrs::FPGA_SLAVES).0, + L1Section::new(3188719616, section_attrs::FPGA_SLAVES).0, + L1Section::new(3189768192, section_attrs::FPGA_SLAVES).0, + L1Section::new(3190816768, section_attrs::FPGA_SLAVES).0, + L1Section::new(3191865344, section_attrs::FPGA_SLAVES).0, + L1Section::new(3192913920, section_attrs::FPGA_SLAVES).0, + L1Section::new(3193962496, section_attrs::FPGA_SLAVES).0, + L1Section::new(3195011072, section_attrs::FPGA_SLAVES).0, + L1Section::new(3196059648, section_attrs::FPGA_SLAVES).0, + L1Section::new(3197108224, section_attrs::FPGA_SLAVES).0, + L1Section::new(3198156800, section_attrs::FPGA_SLAVES).0, + L1Section::new(3199205376, section_attrs::FPGA_SLAVES).0, + L1Section::new(3200253952, section_attrs::FPGA_SLAVES).0, + L1Section::new(3201302528, section_attrs::FPGA_SLAVES).0, + L1Section::new(3202351104, section_attrs::FPGA_SLAVES).0, + L1Section::new(3203399680, section_attrs::FPGA_SLAVES).0, + L1Section::new(3204448256, section_attrs::FPGA_SLAVES).0, + L1Section::new(3205496832, section_attrs::FPGA_SLAVES).0, + L1Section::new(3206545408, section_attrs::FPGA_SLAVES).0, + L1Section::new(3207593984, section_attrs::FPGA_SLAVES).0, + L1Section::new(3208642560, section_attrs::FPGA_SLAVES).0, + L1Section::new(3209691136, section_attrs::FPGA_SLAVES).0, + L1Section::new(3210739712, section_attrs::FPGA_SLAVES).0, + L1Section::new(3211788288, section_attrs::FPGA_SLAVES).0, + L1Section::new(3212836864, section_attrs::FPGA_SLAVES).0, + L1Section::new(3213885440, section_attrs::FPGA_SLAVES).0, + L1Section::new(3214934016, section_attrs::FPGA_SLAVES).0, + L1Section::new(3215982592, section_attrs::FPGA_SLAVES).0, + L1Section::new(3217031168, section_attrs::FPGA_SLAVES).0, + L1Section::new(3218079744, section_attrs::FPGA_SLAVES).0, + L1Section::new(3219128320, section_attrs::FPGA_SLAVES).0, + L1Section::new(3220176896, section_attrs::FPGA_SLAVES).0, // Unassigned/Reserved (0xC000_0000 - 0xE000_0000) - L1Section::new(3221225472, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3222274048, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3223322624, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3224371200, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3225419776, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3226468352, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3227516928, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3228565504, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3229614080, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3230662656, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3231711232, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3232759808, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3233808384, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3234856960, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3235905536, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3236954112, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3238002688, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3239051264, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3240099840, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3241148416, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3242196992, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3243245568, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3244294144, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3245342720, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3246391296, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3247439872, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3248488448, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3249537024, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3250585600, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3251634176, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3252682752, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3253731328, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3254779904, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3255828480, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3256877056, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3257925632, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3258974208, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3260022784, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3261071360, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3262119936, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3263168512, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3264217088, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3265265664, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3266314240, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3267362816, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3268411392, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3269459968, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3270508544, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3271557120, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3272605696, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3273654272, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3274702848, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3275751424, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3276800000, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3277848576, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3278897152, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3279945728, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3280994304, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3282042880, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3283091456, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3284140032, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3285188608, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3286237184, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3287285760, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3288334336, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3289382912, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3290431488, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3291480064, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3292528640, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3293577216, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3294625792, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3295674368, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3296722944, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3297771520, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3298820096, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3299868672, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3300917248, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3301965824, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3303014400, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3304062976, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3305111552, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3306160128, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3307208704, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3308257280, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3309305856, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3310354432, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3311403008, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3312451584, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3313500160, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3314548736, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3315597312, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3316645888, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3317694464, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3318743040, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3319791616, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3320840192, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3321888768, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3322937344, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3323985920, 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section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3548381184, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3549429760, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3550478336, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3551526912, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3552575488, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3553624064, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3554672640, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3555721216, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3556769792, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3557818368, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3558866944, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3559915520, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3560964096, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3562012672, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3563061248, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3564109824, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3565158400, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3566206976, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3567255552, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3568304128, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3569352704, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3570401280, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3571449856, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3572498432, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3573547008, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3574595584, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3575644160, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3576692736, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3577741312, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3578789888, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3579838464, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3580887040, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3581935616, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3582984192, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3584032768, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3585081344, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3586129920, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3587178496, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3588227072, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3589275648, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3590324224, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3591372800, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3592421376, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3593469952, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3594518528, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3595567104, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3596615680, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3597664256, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3598712832, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3599761408, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3600809984, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3601858560, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3602907136, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3603955712, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3605004288, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3606052864, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3607101440, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3608150016, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3609198592, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3610247168, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3611295744, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3612344320, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3613392896, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3614441472, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3615490048, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3616538624, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3617587200, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3618635776, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3619684352, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3620732928, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3621781504, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3622830080, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3623878656, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3624927232, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3625975808, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3627024384, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3628072960, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3629121536, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3630170112, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3631218688, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3632267264, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3633315840, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3634364416, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3635412992, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3636461568, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3637510144, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3638558720, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3639607296, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3640655872, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3641704448, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3642753024, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3643801600, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3644850176, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3645898752, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3646947328, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3647995904, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3649044480, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3650093056, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3651141632, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3652190208, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3653238784, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3654287360, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3655335936, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3656384512, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3657433088, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3658481664, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3659530240, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3660578816, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3661627392, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3662675968, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3663724544, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3664773120, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3665821696, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3666870272, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3667918848, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3668967424, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3670016000, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3671064576, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3672113152, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3673161728, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3674210304, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3675258880, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3676307456, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3677356032, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3678404608, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3679453184, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3680501760, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3681550336, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3682598912, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3683647488, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3684696064, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3685744640, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3686793216, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3687841792, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3688890368, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3689938944, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3690987520, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3692036096, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3693084672, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3694133248, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3695181824, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3696230400, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3697278976, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3698327552, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3699376128, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3700424704, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3701473280, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3702521856, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3703570432, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3704619008, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3705667584, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3706716160, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3707764736, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3708813312, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3709861888, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3710910464, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3711959040, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3713007616, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3714056192, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3715104768, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3716153344, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3717201920, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3718250496, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3719299072, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3720347648, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3721396224, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3722444800, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3723493376, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3724541952, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3725590528, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3726639104, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3727687680, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3728736256, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3729784832, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3730833408, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3731881984, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3732930560, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3733979136, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3735027712, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3736076288, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3737124864, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3738173440, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3739222016, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3740270592, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3741319168, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3742367744, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3743416320, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3744464896, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3745513472, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3746562048, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3747610624, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3748659200, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3749707776, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3750756352, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3751804928, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3752853504, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3753902080, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3754950656, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3755999232, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3757047808, section_attrs::UNASSIGNED_RESERVED).0, // Segments IO peripherals (0xE000_0000 - 0xE030_0000) - L1Section::new(3758096384, SECTION_ATTRS_SHAREABLE_DEVICE).0, - L1Section::new(3759144960, SECTION_ATTRS_SHAREABLE_DEVICE).0, - L1Section::new(3760193536, SECTION_ATTRS_SHAREABLE_DEVICE).0, + L1Section::new(3758096384, section_attrs::SHAREABLE_DEVICE).0, + L1Section::new(3759144960, section_attrs::SHAREABLE_DEVICE).0, + L1Section::new(3760193536, section_attrs::SHAREABLE_DEVICE).0, // Unassigned/Reserved (0xE030_0000 - 0xE100_0000) - L1Section::new(3761242112, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3762290688, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3763339264, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3764387840, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3765436416, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3766484992, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3767533568, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3768582144, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3769630720, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3770679296, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3771727872, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3772776448, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3773825024, SECTION_ATTRS_UNASSIGNED_RESERVED).0, + L1Section::new(3761242112, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3762290688, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3763339264, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3764387840, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3765436416, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3766484992, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3767533568, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3768582144, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3769630720, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3770679296, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3771727872, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3772776448, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3773825024, section_attrs::UNASSIGNED_RESERVED).0, // NAND (0xE100_0000 - 0xE200_0000) - L1Section::new(3774873600, SECTION_ATTRS_SHAREABLE_DEVICE).0, - L1Section::new(3775922176, SECTION_ATTRS_SHAREABLE_DEVICE).0, - L1Section::new(3776970752, SECTION_ATTRS_SHAREABLE_DEVICE).0, - L1Section::new(3778019328, SECTION_ATTRS_SHAREABLE_DEVICE).0, - L1Section::new(3779067904, SECTION_ATTRS_SHAREABLE_DEVICE).0, - L1Section::new(3780116480, SECTION_ATTRS_SHAREABLE_DEVICE).0, - L1Section::new(3781165056, SECTION_ATTRS_SHAREABLE_DEVICE).0, - L1Section::new(3782213632, SECTION_ATTRS_SHAREABLE_DEVICE).0, - L1Section::new(3783262208, SECTION_ATTRS_SHAREABLE_DEVICE).0, - L1Section::new(3784310784, SECTION_ATTRS_SHAREABLE_DEVICE).0, - L1Section::new(3785359360, SECTION_ATTRS_SHAREABLE_DEVICE).0, - L1Section::new(3786407936, SECTION_ATTRS_SHAREABLE_DEVICE).0, - L1Section::new(3787456512, SECTION_ATTRS_SHAREABLE_DEVICE).0, - L1Section::new(3788505088, SECTION_ATTRS_SHAREABLE_DEVICE).0, - L1Section::new(3789553664, SECTION_ATTRS_SHAREABLE_DEVICE).0, - L1Section::new(3790602240, SECTION_ATTRS_SHAREABLE_DEVICE).0, + L1Section::new(3774873600, section_attrs::SHAREABLE_DEVICE).0, + L1Section::new(3775922176, section_attrs::SHAREABLE_DEVICE).0, + L1Section::new(3776970752, section_attrs::SHAREABLE_DEVICE).0, + L1Section::new(3778019328, section_attrs::SHAREABLE_DEVICE).0, + L1Section::new(3779067904, section_attrs::SHAREABLE_DEVICE).0, + L1Section::new(3780116480, section_attrs::SHAREABLE_DEVICE).0, + L1Section::new(3781165056, section_attrs::SHAREABLE_DEVICE).0, + L1Section::new(3782213632, section_attrs::SHAREABLE_DEVICE).0, + L1Section::new(3783262208, section_attrs::SHAREABLE_DEVICE).0, + L1Section::new(3784310784, section_attrs::SHAREABLE_DEVICE).0, + L1Section::new(3785359360, section_attrs::SHAREABLE_DEVICE).0, + L1Section::new(3786407936, section_attrs::SHAREABLE_DEVICE).0, + L1Section::new(3787456512, section_attrs::SHAREABLE_DEVICE).0, + L1Section::new(3788505088, section_attrs::SHAREABLE_DEVICE).0, + L1Section::new(3789553664, section_attrs::SHAREABLE_DEVICE).0, + L1Section::new(3790602240, section_attrs::SHAREABLE_DEVICE).0, // NOR (0xE200_0000 - 0xE400_0000) - L1Section::new(3791650816, SECTION_ATTRS_SHAREABLE_DEVICE).0, - L1Section::new(3792699392, SECTION_ATTRS_SHAREABLE_DEVICE).0, - L1Section::new(3793747968, SECTION_ATTRS_SHAREABLE_DEVICE).0, - L1Section::new(3794796544, SECTION_ATTRS_SHAREABLE_DEVICE).0, - L1Section::new(3795845120, SECTION_ATTRS_SHAREABLE_DEVICE).0, - L1Section::new(3796893696, SECTION_ATTRS_SHAREABLE_DEVICE).0, - L1Section::new(3797942272, SECTION_ATTRS_SHAREABLE_DEVICE).0, - L1Section::new(3798990848, SECTION_ATTRS_SHAREABLE_DEVICE).0, - L1Section::new(3800039424, SECTION_ATTRS_SHAREABLE_DEVICE).0, - L1Section::new(3801088000, SECTION_ATTRS_SHAREABLE_DEVICE).0, - L1Section::new(3802136576, SECTION_ATTRS_SHAREABLE_DEVICE).0, - L1Section::new(3803185152, SECTION_ATTRS_SHAREABLE_DEVICE).0, - L1Section::new(3804233728, SECTION_ATTRS_SHAREABLE_DEVICE).0, - L1Section::new(3805282304, SECTION_ATTRS_SHAREABLE_DEVICE).0, - L1Section::new(3806330880, SECTION_ATTRS_SHAREABLE_DEVICE).0, - L1Section::new(3807379456, SECTION_ATTRS_SHAREABLE_DEVICE).0, - L1Section::new(3808428032, SECTION_ATTRS_SHAREABLE_DEVICE).0, - L1Section::new(3809476608, SECTION_ATTRS_SHAREABLE_DEVICE).0, - L1Section::new(3810525184, SECTION_ATTRS_SHAREABLE_DEVICE).0, - L1Section::new(3811573760, SECTION_ATTRS_SHAREABLE_DEVICE).0, - L1Section::new(3812622336, SECTION_ATTRS_SHAREABLE_DEVICE).0, - L1Section::new(3813670912, SECTION_ATTRS_SHAREABLE_DEVICE).0, - L1Section::new(3814719488, SECTION_ATTRS_SHAREABLE_DEVICE).0, - L1Section::new(3815768064, SECTION_ATTRS_SHAREABLE_DEVICE).0, - L1Section::new(3816816640, SECTION_ATTRS_SHAREABLE_DEVICE).0, - L1Section::new(3817865216, SECTION_ATTRS_SHAREABLE_DEVICE).0, - L1Section::new(3818913792, SECTION_ATTRS_SHAREABLE_DEVICE).0, - L1Section::new(3819962368, SECTION_ATTRS_SHAREABLE_DEVICE).0, - L1Section::new(3821010944, SECTION_ATTRS_SHAREABLE_DEVICE).0, - L1Section::new(3822059520, SECTION_ATTRS_SHAREABLE_DEVICE).0, - L1Section::new(3823108096, SECTION_ATTRS_SHAREABLE_DEVICE).0, - L1Section::new(3824156672, SECTION_ATTRS_SHAREABLE_DEVICE).0, + L1Section::new(3791650816, section_attrs::SHAREABLE_DEVICE).0, + L1Section::new(3792699392, section_attrs::SHAREABLE_DEVICE).0, + L1Section::new(3793747968, section_attrs::SHAREABLE_DEVICE).0, + L1Section::new(3794796544, section_attrs::SHAREABLE_DEVICE).0, + L1Section::new(3795845120, section_attrs::SHAREABLE_DEVICE).0, + L1Section::new(3796893696, section_attrs::SHAREABLE_DEVICE).0, + L1Section::new(3797942272, section_attrs::SHAREABLE_DEVICE).0, + L1Section::new(3798990848, section_attrs::SHAREABLE_DEVICE).0, + L1Section::new(3800039424, section_attrs::SHAREABLE_DEVICE).0, + L1Section::new(3801088000, section_attrs::SHAREABLE_DEVICE).0, + L1Section::new(3802136576, section_attrs::SHAREABLE_DEVICE).0, + L1Section::new(3803185152, section_attrs::SHAREABLE_DEVICE).0, + L1Section::new(3804233728, section_attrs::SHAREABLE_DEVICE).0, + L1Section::new(3805282304, section_attrs::SHAREABLE_DEVICE).0, + L1Section::new(3806330880, section_attrs::SHAREABLE_DEVICE).0, + L1Section::new(3807379456, section_attrs::SHAREABLE_DEVICE).0, + L1Section::new(3808428032, section_attrs::SHAREABLE_DEVICE).0, + L1Section::new(3809476608, section_attrs::SHAREABLE_DEVICE).0, + L1Section::new(3810525184, section_attrs::SHAREABLE_DEVICE).0, + L1Section::new(3811573760, section_attrs::SHAREABLE_DEVICE).0, + L1Section::new(3812622336, section_attrs::SHAREABLE_DEVICE).0, + L1Section::new(3813670912, section_attrs::SHAREABLE_DEVICE).0, + L1Section::new(3814719488, section_attrs::SHAREABLE_DEVICE).0, + L1Section::new(3815768064, section_attrs::SHAREABLE_DEVICE).0, + L1Section::new(3816816640, section_attrs::SHAREABLE_DEVICE).0, + L1Section::new(3817865216, section_attrs::SHAREABLE_DEVICE).0, + L1Section::new(3818913792, section_attrs::SHAREABLE_DEVICE).0, + L1Section::new(3819962368, section_attrs::SHAREABLE_DEVICE).0, + L1Section::new(3821010944, section_attrs::SHAREABLE_DEVICE).0, + L1Section::new(3822059520, section_attrs::SHAREABLE_DEVICE).0, + L1Section::new(3823108096, section_attrs::SHAREABLE_DEVICE).0, + L1Section::new(3824156672, section_attrs::SHAREABLE_DEVICE).0, // SRAM (0xE400_0000 - 0xE600_0000) - L1Section::new(3825205248, SECTION_ATTRS_SRAM).0, - L1Section::new(3826253824, SECTION_ATTRS_SRAM).0, - L1Section::new(3827302400, SECTION_ATTRS_SRAM).0, - L1Section::new(3828350976, SECTION_ATTRS_SRAM).0, - L1Section::new(3829399552, SECTION_ATTRS_SRAM).0, - L1Section::new(3830448128, SECTION_ATTRS_SRAM).0, - L1Section::new(3831496704, SECTION_ATTRS_SRAM).0, - L1Section::new(3832545280, SECTION_ATTRS_SRAM).0, - L1Section::new(3833593856, SECTION_ATTRS_SRAM).0, - L1Section::new(3834642432, SECTION_ATTRS_SRAM).0, - L1Section::new(3835691008, SECTION_ATTRS_SRAM).0, - L1Section::new(3836739584, SECTION_ATTRS_SRAM).0, - L1Section::new(3837788160, SECTION_ATTRS_SRAM).0, - L1Section::new(3838836736, SECTION_ATTRS_SRAM).0, - L1Section::new(3839885312, SECTION_ATTRS_SRAM).0, - L1Section::new(3840933888, SECTION_ATTRS_SRAM).0, - L1Section::new(3841982464, SECTION_ATTRS_SRAM).0, - L1Section::new(3843031040, SECTION_ATTRS_SRAM).0, - L1Section::new(3844079616, SECTION_ATTRS_SRAM).0, - L1Section::new(3845128192, SECTION_ATTRS_SRAM).0, - L1Section::new(3846176768, SECTION_ATTRS_SRAM).0, - L1Section::new(3847225344, SECTION_ATTRS_SRAM).0, - L1Section::new(3848273920, SECTION_ATTRS_SRAM).0, - L1Section::new(3849322496, SECTION_ATTRS_SRAM).0, - L1Section::new(3850371072, SECTION_ATTRS_SRAM).0, - L1Section::new(3851419648, SECTION_ATTRS_SRAM).0, - L1Section::new(3852468224, SECTION_ATTRS_SRAM).0, - L1Section::new(3853516800, SECTION_ATTRS_SRAM).0, - L1Section::new(3854565376, SECTION_ATTRS_SRAM).0, - L1Section::new(3855613952, SECTION_ATTRS_SRAM).0, - L1Section::new(3856662528, SECTION_ATTRS_SRAM).0, - L1Section::new(3857711104, SECTION_ATTRS_SRAM).0, + L1Section::new(3825205248, section_attrs::SRAM).0, + L1Section::new(3826253824, section_attrs::SRAM).0, + L1Section::new(3827302400, section_attrs::SRAM).0, + L1Section::new(3828350976, section_attrs::SRAM).0, + L1Section::new(3829399552, section_attrs::SRAM).0, + L1Section::new(3830448128, section_attrs::SRAM).0, + L1Section::new(3831496704, section_attrs::SRAM).0, + L1Section::new(3832545280, section_attrs::SRAM).0, + L1Section::new(3833593856, section_attrs::SRAM).0, + L1Section::new(3834642432, section_attrs::SRAM).0, + L1Section::new(3835691008, section_attrs::SRAM).0, + L1Section::new(3836739584, section_attrs::SRAM).0, + L1Section::new(3837788160, section_attrs::SRAM).0, + L1Section::new(3838836736, section_attrs::SRAM).0, + L1Section::new(3839885312, section_attrs::SRAM).0, + L1Section::new(3840933888, section_attrs::SRAM).0, + L1Section::new(3841982464, section_attrs::SRAM).0, + L1Section::new(3843031040, section_attrs::SRAM).0, + L1Section::new(3844079616, section_attrs::SRAM).0, + L1Section::new(3845128192, section_attrs::SRAM).0, + L1Section::new(3846176768, section_attrs::SRAM).0, + L1Section::new(3847225344, section_attrs::SRAM).0, + L1Section::new(3848273920, section_attrs::SRAM).0, + L1Section::new(3849322496, section_attrs::SRAM).0, + L1Section::new(3850371072, section_attrs::SRAM).0, + L1Section::new(3851419648, section_attrs::SRAM).0, + L1Section::new(3852468224, section_attrs::SRAM).0, + L1Section::new(3853516800, section_attrs::SRAM).0, + L1Section::new(3854565376, section_attrs::SRAM).0, + L1Section::new(3855613952, section_attrs::SRAM).0, + L1Section::new(3856662528, section_attrs::SRAM).0, + L1Section::new(3857711104, section_attrs::SRAM).0, // Unassigned/Reserved (0xE600_0000 - 0xF800_0000) - L1Section::new(3858759680, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3859808256, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3860856832, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3861905408, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3862953984, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3864002560, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3865051136, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3866099712, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3867148288, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3868196864, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3869245440, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3870294016, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3871342592, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3872391168, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3873439744, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3874488320, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3875536896, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3876585472, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3877634048, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3878682624, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3879731200, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3880779776, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3881828352, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3882876928, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3883925504, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3884974080, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3886022656, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3887071232, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3888119808, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3889168384, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3890216960, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3891265536, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3892314112, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3893362688, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3894411264, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3895459840, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3896508416, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3897556992, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3898605568, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3899654144, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3900702720, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3901751296, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3902799872, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3903848448, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3904897024, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3905945600, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3906994176, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3908042752, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3909091328, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3910139904, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3911188480, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3912237056, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3913285632, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3914334208, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3915382784, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3916431360, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3917479936, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3918528512, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3919577088, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3920625664, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3921674240, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3922722816, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3923771392, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3924819968, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3925868544, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3926917120, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3927965696, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3929014272, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3930062848, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3931111424, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3932160000, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3933208576, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3934257152, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3935305728, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3936354304, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3937402880, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3938451456, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3939500032, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3940548608, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3941597184, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3942645760, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3943694336, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3944742912, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3945791488, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3946840064, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3947888640, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3948937216, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3949985792, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3951034368, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3952082944, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3953131520, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3954180096, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3955228672, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3956277248, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3957325824, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3958374400, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3959422976, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3960471552, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3961520128, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3962568704, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3963617280, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3964665856, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3965714432, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3966763008, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3967811584, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3968860160, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3969908736, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3970957312, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3972005888, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3973054464, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3974103040, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3975151616, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3976200192, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3977248768, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3978297344, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3979345920, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3980394496, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3981443072, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3982491648, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3983540224, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3984588800, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3985637376, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3986685952, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3987734528, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3988783104, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3989831680, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3990880256, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3991928832, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3992977408, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3994025984, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3995074560, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3996123136, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3997171712, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3998220288, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(3999268864, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4000317440, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4001366016, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4002414592, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4003463168, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4004511744, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4005560320, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4006608896, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4007657472, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4008706048, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4009754624, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4010803200, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4011851776, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4012900352, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4013948928, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4014997504, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4016046080, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4017094656, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4018143232, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4019191808, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4020240384, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4021288960, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4022337536, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4023386112, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4024434688, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4025483264, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4026531840, 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L1Section::new(3953131520, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3954180096, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3955228672, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3956277248, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3957325824, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3958374400, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3959422976, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3960471552, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3961520128, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3962568704, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3963617280, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3964665856, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3965714432, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3966763008, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3967811584, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3968860160, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3969908736, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3970957312, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3972005888, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3973054464, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3974103040, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3975151616, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3976200192, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3977248768, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3978297344, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3979345920, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3980394496, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3981443072, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3982491648, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3983540224, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3984588800, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3985637376, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3986685952, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3987734528, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3988783104, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3989831680, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3990880256, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3991928832, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3992977408, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3994025984, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3995074560, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3996123136, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3997171712, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3998220288, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(3999268864, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4000317440, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4001366016, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4002414592, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4003463168, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4004511744, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4005560320, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4006608896, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4007657472, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4008706048, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4009754624, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4010803200, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4011851776, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4012900352, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4013948928, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4014997504, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4016046080, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4017094656, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4018143232, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4019191808, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4020240384, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4021288960, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4022337536, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4023386112, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4024434688, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4025483264, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4026531840, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4027580416, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4028628992, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4029677568, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4030726144, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4031774720, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4032823296, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4033871872, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4034920448, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4035969024, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4037017600, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4038066176, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4039114752, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4040163328, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4041211904, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4042260480, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4043309056, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4044357632, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4045406208, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4046454784, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4047503360, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4048551936, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4049600512, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4050649088, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4051697664, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4052746240, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4053794816, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4054843392, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4055891968, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4056940544, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4057989120, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4059037696, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4060086272, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4061134848, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4062183424, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4063232000, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4064280576, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4065329152, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4066377728, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4067426304, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4068474880, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4069523456, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4070572032, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4071620608, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4072669184, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4073717760, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4074766336, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4075814912, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4076863488, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4077912064, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4078960640, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4080009216, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4081057792, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4082106368, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4083154944, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4084203520, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4085252096, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4086300672, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4087349248, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4088397824, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4089446400, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4090494976, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4091543552, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4092592128, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4093640704, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4094689280, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4095737856, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4096786432, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4097835008, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4098883584, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4099932160, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4100980736, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4102029312, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4103077888, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4104126464, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4105175040, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4106223616, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4107272192, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4108320768, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4109369344, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4110417920, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4111466496, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4112515072, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4113563648, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4114612224, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4115660800, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4116709376, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4117757952, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4118806528, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4119855104, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4120903680, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4121952256, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4123000832, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4124049408, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4125097984, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4126146560, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4127195136, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4128243712, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4129292288, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4130340864, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4131389440, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4132438016, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4133486592, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4134535168, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4135583744, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4136632320, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4137680896, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4138729472, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4139778048, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4140826624, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4141875200, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4142923776, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4143972352, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4145020928, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4146069504, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4147118080, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4148166656, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4149215232, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4150263808, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4151312384, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4152360960, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4153409536, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4154458112, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4155506688, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4156555264, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4157603840, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4158652416, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4159700992, section_attrs::UNASSIGNED_RESERVED).0, // AMBA APB peripherals (0xF800_0000 - 0xF900_0000) - L1Section::new(4160749568, SECTION_ATTRS_SHAREABLE_DEVICE).0, - L1Section::new(4161798144, SECTION_ATTRS_SHAREABLE_DEVICE).0, - L1Section::new(4162846720, SECTION_ATTRS_SHAREABLE_DEVICE).0, - L1Section::new(4163895296, SECTION_ATTRS_SHAREABLE_DEVICE).0, - L1Section::new(4164943872, SECTION_ATTRS_SHAREABLE_DEVICE).0, - L1Section::new(4165992448, SECTION_ATTRS_SHAREABLE_DEVICE).0, - L1Section::new(4167041024, SECTION_ATTRS_SHAREABLE_DEVICE).0, - L1Section::new(4168089600, SECTION_ATTRS_SHAREABLE_DEVICE).0, - L1Section::new(4169138176, SECTION_ATTRS_SHAREABLE_DEVICE).0, - L1Section::new(4170186752, SECTION_ATTRS_SHAREABLE_DEVICE).0, - L1Section::new(4171235328, SECTION_ATTRS_SHAREABLE_DEVICE).0, - L1Section::new(4172283904, SECTION_ATTRS_SHAREABLE_DEVICE).0, - L1Section::new(4173332480, SECTION_ATTRS_SHAREABLE_DEVICE).0, - L1Section::new(4174381056, SECTION_ATTRS_SHAREABLE_DEVICE).0, - L1Section::new(4175429632, SECTION_ATTRS_SHAREABLE_DEVICE).0, - L1Section::new(4176478208, SECTION_ATTRS_SHAREABLE_DEVICE).0, + L1Section::new(4160749568, section_attrs::SHAREABLE_DEVICE).0, + L1Section::new(4161798144, section_attrs::SHAREABLE_DEVICE).0, + L1Section::new(4162846720, section_attrs::SHAREABLE_DEVICE).0, + L1Section::new(4163895296, section_attrs::SHAREABLE_DEVICE).0, + L1Section::new(4164943872, section_attrs::SHAREABLE_DEVICE).0, + L1Section::new(4165992448, section_attrs::SHAREABLE_DEVICE).0, + L1Section::new(4167041024, section_attrs::SHAREABLE_DEVICE).0, + L1Section::new(4168089600, section_attrs::SHAREABLE_DEVICE).0, + L1Section::new(4169138176, section_attrs::SHAREABLE_DEVICE).0, + L1Section::new(4170186752, section_attrs::SHAREABLE_DEVICE).0, + L1Section::new(4171235328, section_attrs::SHAREABLE_DEVICE).0, + L1Section::new(4172283904, section_attrs::SHAREABLE_DEVICE).0, + L1Section::new(4173332480, section_attrs::SHAREABLE_DEVICE).0, + L1Section::new(4174381056, section_attrs::SHAREABLE_DEVICE).0, + L1Section::new(4175429632, section_attrs::SHAREABLE_DEVICE).0, + L1Section::new(4176478208, section_attrs::SHAREABLE_DEVICE).0, // Unassigned/Reserved (0xF900_0000 - 0xFC00_0000) - L1Section::new(4177526784, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4178575360, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4179623936, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4180672512, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4181721088, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4182769664, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4183818240, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4184866816, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4185915392, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4186963968, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4188012544, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4189061120, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4190109696, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4191158272, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4192206848, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4193255424, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4194304000, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4195352576, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4196401152, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4197449728, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4198498304, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4199546880, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4200595456, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4201644032, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4202692608, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4203741184, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4204789760, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4205838336, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4206886912, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4207935488, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4208984064, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4210032640, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4211081216, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4212129792, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4213178368, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4214226944, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4215275520, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4216324096, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4217372672, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4218421248, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4219469824, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4220518400, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4221566976, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4222615552, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4223664128, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4224712704, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4225761280, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4226809856, SECTION_ATTRS_UNASSIGNED_RESERVED).0, + L1Section::new(4177526784, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4178575360, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4179623936, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4180672512, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4181721088, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4182769664, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4183818240, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4184866816, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4185915392, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4186963968, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4188012544, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4189061120, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4190109696, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4191158272, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4192206848, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4193255424, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4194304000, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4195352576, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4196401152, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4197449728, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4198498304, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4199546880, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4200595456, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4201644032, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4202692608, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4203741184, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4204789760, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4205838336, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4206886912, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4207935488, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4208984064, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4210032640, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4211081216, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4212129792, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4213178368, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4214226944, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4215275520, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4216324096, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4217372672, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4218421248, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4219469824, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4220518400, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4221566976, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4222615552, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4223664128, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4224712704, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4225761280, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4226809856, section_attrs::UNASSIGNED_RESERVED).0, // QSPI XIP (0xFC00_0000 - 0xFE00_0000) - L1Section::new(4227858432, SECTION_ATTRS_QSPI_XIP).0, - L1Section::new(4228907008, SECTION_ATTRS_QSPI_XIP).0, - L1Section::new(4229955584, SECTION_ATTRS_QSPI_XIP).0, - L1Section::new(4231004160, SECTION_ATTRS_QSPI_XIP).0, - L1Section::new(4232052736, SECTION_ATTRS_QSPI_XIP).0, - L1Section::new(4233101312, SECTION_ATTRS_QSPI_XIP).0, - L1Section::new(4234149888, SECTION_ATTRS_QSPI_XIP).0, - L1Section::new(4235198464, SECTION_ATTRS_QSPI_XIP).0, - L1Section::new(4236247040, SECTION_ATTRS_QSPI_XIP).0, - L1Section::new(4237295616, SECTION_ATTRS_QSPI_XIP).0, - L1Section::new(4238344192, SECTION_ATTRS_QSPI_XIP).0, - L1Section::new(4239392768, SECTION_ATTRS_QSPI_XIP).0, - L1Section::new(4240441344, SECTION_ATTRS_QSPI_XIP).0, - L1Section::new(4241489920, SECTION_ATTRS_QSPI_XIP).0, - L1Section::new(4242538496, SECTION_ATTRS_QSPI_XIP).0, - L1Section::new(4243587072, SECTION_ATTRS_QSPI_XIP).0, - L1Section::new(4244635648, SECTION_ATTRS_QSPI_XIP).0, - L1Section::new(4245684224, SECTION_ATTRS_QSPI_XIP).0, - L1Section::new(4246732800, SECTION_ATTRS_QSPI_XIP).0, - L1Section::new(4247781376, SECTION_ATTRS_QSPI_XIP).0, - L1Section::new(4248829952, SECTION_ATTRS_QSPI_XIP).0, - L1Section::new(4249878528, SECTION_ATTRS_QSPI_XIP).0, - L1Section::new(4250927104, SECTION_ATTRS_QSPI_XIP).0, - L1Section::new(4251975680, SECTION_ATTRS_QSPI_XIP).0, - L1Section::new(4253024256, SECTION_ATTRS_QSPI_XIP).0, - L1Section::new(4254072832, SECTION_ATTRS_QSPI_XIP).0, - L1Section::new(4255121408, SECTION_ATTRS_QSPI_XIP).0, - L1Section::new(4256169984, SECTION_ATTRS_QSPI_XIP).0, - L1Section::new(4257218560, SECTION_ATTRS_QSPI_XIP).0, - L1Section::new(4258267136, SECTION_ATTRS_QSPI_XIP).0, - L1Section::new(4259315712, SECTION_ATTRS_QSPI_XIP).0, - L1Section::new(4260364288, SECTION_ATTRS_QSPI_XIP).0, + L1Section::new(4227858432, section_attrs::QSPI_XIP).0, + L1Section::new(4228907008, section_attrs::QSPI_XIP).0, + L1Section::new(4229955584, section_attrs::QSPI_XIP).0, + L1Section::new(4231004160, section_attrs::QSPI_XIP).0, + L1Section::new(4232052736, section_attrs::QSPI_XIP).0, + L1Section::new(4233101312, section_attrs::QSPI_XIP).0, + L1Section::new(4234149888, section_attrs::QSPI_XIP).0, + L1Section::new(4235198464, section_attrs::QSPI_XIP).0, + L1Section::new(4236247040, section_attrs::QSPI_XIP).0, + L1Section::new(4237295616, section_attrs::QSPI_XIP).0, + L1Section::new(4238344192, section_attrs::QSPI_XIP).0, + L1Section::new(4239392768, section_attrs::QSPI_XIP).0, + L1Section::new(4240441344, section_attrs::QSPI_XIP).0, + L1Section::new(4241489920, section_attrs::QSPI_XIP).0, + L1Section::new(4242538496, section_attrs::QSPI_XIP).0, + L1Section::new(4243587072, section_attrs::QSPI_XIP).0, + L1Section::new(4244635648, section_attrs::QSPI_XIP).0, + L1Section::new(4245684224, section_attrs::QSPI_XIP).0, + L1Section::new(4246732800, section_attrs::QSPI_XIP).0, + L1Section::new(4247781376, section_attrs::QSPI_XIP).0, + L1Section::new(4248829952, section_attrs::QSPI_XIP).0, + L1Section::new(4249878528, section_attrs::QSPI_XIP).0, + L1Section::new(4250927104, section_attrs::QSPI_XIP).0, + L1Section::new(4251975680, section_attrs::QSPI_XIP).0, + L1Section::new(4253024256, section_attrs::QSPI_XIP).0, + L1Section::new(4254072832, section_attrs::QSPI_XIP).0, + L1Section::new(4255121408, section_attrs::QSPI_XIP).0, + L1Section::new(4256169984, section_attrs::QSPI_XIP).0, + L1Section::new(4257218560, section_attrs::QSPI_XIP).0, + L1Section::new(4258267136, section_attrs::QSPI_XIP).0, + L1Section::new(4259315712, section_attrs::QSPI_XIP).0, + L1Section::new(4260364288, section_attrs::QSPI_XIP).0, // Unassiged/Reserved (0xFE00_0000 - 0xFFF0_0000) - L1Section::new(4261412864, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4262461440, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4263510016, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4264558592, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4265607168, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4266655744, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4267704320, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4268752896, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4269801472, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4270850048, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4271898624, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4272947200, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4273995776, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4275044352, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4276092928, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4277141504, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4278190080, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4279238656, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4280287232, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4281335808, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4282384384, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4283432960, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4284481536, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4285530112, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4286578688, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4287627264, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4288675840, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4289724416, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4290772992, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4291821568, SECTION_ATTRS_UNASSIGNED_RESERVED).0, - L1Section::new(4292870144, SECTION_ATTRS_UNASSIGNED_RESERVED).0, + L1Section::new(4261412864, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4262461440, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4263510016, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4264558592, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4265607168, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4266655744, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4267704320, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4268752896, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4269801472, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4270850048, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4271898624, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4272947200, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4273995776, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4275044352, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4276092928, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4277141504, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4278190080, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4279238656, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4280287232, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4281335808, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4282384384, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4283432960, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4284481536, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4285530112, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4286578688, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4287627264, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4288675840, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4289724416, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4290772992, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4291821568, section_attrs::UNASSIGNED_RESERVED).0, + L1Section::new(4292870144, section_attrs::UNASSIGNED_RESERVED).0, // OCM High (0xFFF0_0000 - 0xFFFF_FFFF) - L1Section::new(4293918720, SECTION_ATTRS_OCM_MAPPED_HIGH).0, + L1Section::new(4293918720, section_attrs::OCM_MAPPED_HIGH).0, ]); diff --git a/zynq7000-rt/src/rt.rs b/zynq7000-rt/src/rt.rs index 5218a71..94152cf 100644 --- a/zynq7000-rt/src/rt.rs +++ b/zynq7000-rt/src/rt.rs @@ -4,7 +4,7 @@ //! [provided by Xilinx](https://github.com/Xilinx/embeddedsw/blob/master/lib/bsp/standalone/src/arm/cortexa9/gcc/boot.S) //! as possible. The boot routine includes stack, MMU, cache and .bss/.data section initialization. use cortex_a_rt as _; -use cortex_r_a::register::{cpsr::ProcessorMode, Cpsr}; +use cortex_r_a::register::{Cpsr, cpsr::ProcessorMode}; // Start-up code for Armv7-A //