From d2e04af7a1ef341c4c11ebd4f1ae9df379a96305 Mon Sep 17 00:00:00 2001 From: Robin Mueller Date: Fri, 28 Nov 2025 17:38:44 +0100 Subject: [PATCH] remove board select --- zedboard-fpga-design/src/zedboard-bd.tcl | 1 - zedboard-fpga-design/zedboard-rust.tcl | 1 - 2 files changed, 2 deletions(-) diff --git a/zedboard-fpga-design/src/zedboard-bd.tcl b/zedboard-fpga-design/src/zedboard-bd.tcl index fbc97a2..98b854d 100644 --- a/zedboard-fpga-design/src/zedboard-bd.tcl +++ b/zedboard-fpga-design/src/zedboard-bd.tcl @@ -57,7 +57,6 @@ if { [string first $scripts_vivado_version $current_vivado_version] == -1 } { set list_projs [get_projects -quiet] if { $list_projs eq "" } { create_project project_1 myproj -part xc7z020clg484-1 - # set_property BOARD_PART digilentinc.com:zedboard:part0:1.1 [current_project] } diff --git a/zedboard-fpga-design/zedboard-rust.tcl b/zedboard-fpga-design/zedboard-rust.tcl index 00b5b13..b25ddd6 100644 --- a/zedboard-fpga-design/zedboard-rust.tcl +++ b/zedboard-fpga-design/zedboard-rust.tcl @@ -131,7 +131,6 @@ set proj_dir [get_property directory [current_project]] # Set project properties set obj [current_project] -# set_property -name "board_part" -value "digilentinc.com:zedboard:part0:1.1" -objects $obj set_property -name "default_lib" -value "xil_defaultlib" -objects $obj set_property -name "enable_resource_estimation" -value "0" -objects $obj set_property -name "enable_vhdl_2008" -value "1" -objects $obj