first SDIO test
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@@ -13,13 +13,13 @@ use zynq7000_hal::gpio::Input;
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use zynq7000_hal::prelude::*;
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use zynq7000_hal::{
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BootMode, clocks, gic, gpio, gtc,
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sdio::{Sdio, SdioClockConfig, SdioLowLevel},
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sdio::{Sdio, SdioClockConfig},
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uart,
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};
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use zynq7000_rt as _;
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const INIT_STRING: &str = "-- Zynq 7000 Zedboard GPIO blinky example --\n\r";
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const INIT_STRING: &str = "-- Zynq 7000 Zedboard SDIO example --\n\r";
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/// Entry point (not called like a normal main function)
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#[unsafe(no_mangle)]
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@@ -42,7 +42,7 @@ async fn main(_spawner: Spawner) -> ! {
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// Clock was already initialized by PS7 Init TCL script or FSBL, we just read it.
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let clocks = clocks::Clocks::new_from_regs(PS_CLOCK_FREQUENCY).unwrap();
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let mut gpio_pins = gpio::GpioPins::new(periphs.gpio);
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let gpio_pins = gpio::GpioPins::new(periphs.gpio);
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// Set up global timer counter and embassy time driver.
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let gtc = gtc::GlobalTimerCounter::new(periphs.gtc, clocks.arm_clocks());
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@@ -69,7 +69,7 @@ async fn main(_spawner: Spawner) -> ! {
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};
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let sdio_clock_config =
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SdioClockConfig::calculate_for_io_clock(clocks.io_clocks(), 100.MHz(), 10.MHz());
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SdioClockConfig::calculate_for_io_clock(clocks.io_clocks(), 100.MHz(), 10.MHz()).unwrap();
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let sdio = Sdio::new_for_sdio_0(
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periphs.sdio_0,
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sdio_clock_config,
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@@ -85,7 +85,10 @@ async fn main(_spawner: Spawner) -> ! {
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.unwrap();
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let card_detect = Input::new_for_mio(gpio_pins.mio.mio47).unwrap();
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let write_protect = Input::new_for_mio(gpio_pins.mio.mio46).unwrap();
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info!("Card detect state: {:?}", card_detect.is_high());
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// The card detect being active low makes sense according to the Zedboard docs. Not sure
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// about write-protect though.. It seems that write protect on means that the
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// the pin is pulled high.
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info!("Card detect state: {:?}", card_detect.is_low());
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info!("Write protect state: {:?}", write_protect.is_high());
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let capabilities = sdio.ll().capabilities();
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@@ -470,7 +470,7 @@ impl Ethernet {
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});
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});
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}
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ll.configure_peripheral_clock(config.clk_config_1000_mbps, true);
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ll.configure_clock(config.clk_config_1000_mbps, true);
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let mut mdio = mdio::Mdio::new(&ll, true);
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mdio.configure_clock_div(config.mdc_clk_div);
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ll.regs.modify_net_ctrl(|mut val| {
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@@ -491,7 +491,7 @@ impl Ethernet {
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pub fn new(mut ll: EthernetLowLevel, config: EthernetConfig) -> Self {
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Self::common_init(&mut ll, config.mac_address);
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ll.configure_peripheral_clock(config.clk_config_1000_mbps, true);
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ll.configure_clock(config.clk_config_1000_mbps, true);
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let mut mdio = mdio::Mdio::new(&ll, true);
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mdio.configure_clock_div(config.mdc_clk_div);
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Ethernet {
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@@ -10,7 +10,7 @@ use crate::gpio::mio::{
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Mio41, Mio42, Mio43, Mio44, Mio45, Mio46, Mio47, Mio50, Mio51,
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};
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use crate::{
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clocks::{Clocks, IoClocks},
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clocks::IoClocks,
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gpio::{
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IoPeriphPin,
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mio::{
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@@ -22,6 +22,10 @@ use crate::{
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time::Hertz,
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};
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#[derive(Debug, thiserror::Error)]
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#[error("invalid peripheral instance")]
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pub struct InvalidPeripheralError;
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pub const MUX_CONF: MuxConfig = MuxConfig::new_with_l3(u3::new(0b100));
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pub trait Sdio0ClockPin: MioPin {}
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@@ -354,12 +358,12 @@ impl Sdio {
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clock_pin: Sdio0Clock,
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command_pin: Sdio0Command,
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data_pins: (Sdio0Data0, Sdio0Data1, Sdio0Data2, Sdio0Data3),
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) -> Option<Self> {
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let id = regs.id()?;
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if id != SdioId::Sdio1 {
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return None;
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) -> Result<Self, InvalidPeripheralError> {
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let id = regs.id().ok_or(InvalidPeripheralError)?;
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if id != SdioId::Sdio0 {
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return Err(InvalidPeripheralError);
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}
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Some(Self::new(
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Ok(Self::new(
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regs,
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clock_config,
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clock_pin,
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@@ -381,12 +385,12 @@ impl Sdio {
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clock_pin: Sdio1Clock,
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command_pin: Sdio1Command,
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data_pins: (Sdio1Data0, Sdio1Data1, Sdio1Data2, Sdio1Data3),
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) -> Option<Self> {
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let id = regs.id()?;
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) -> Result<Self, InvalidPeripheralError> {
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let id = regs.id().ok_or(InvalidPeripheralError)?;
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if id != SdioId::Sdio1 {
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return None;
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return Err(InvalidPeripheralError);
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}
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Some(Self::new(
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Ok(Self::new(
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regs,
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clock_config,
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clock_pin,
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