diff --git a/.cargo/config.toml b/.cargo/config.toml
index af4177d..985e46a 100644
--- a/.cargo/config.toml
+++ b/.cargo/config.toml
@@ -10,7 +10,7 @@ rustflags = [
 
 # Tier 3 target, so no pre-compiled artifacts included.
 [unstable]
-# build-std = ["core", "alloc"]
+build-std = ["core", "alloc"]
 
 [build]
-# target = "armv7a-none-eabihf"
+target = "armv7a-none-eabihf"
diff --git a/zynq7000/src/slcr.rs b/zynq7000/src/slcr.rs
index ed309e1..3fa7b13 100644
--- a/zynq7000/src/slcr.rs
+++ b/zynq7000/src/slcr.rs
@@ -54,18 +54,8 @@ impl ResetControl {
     ///
     /// If you create multiple instances of this handle at the same time, you are responsible for
     /// ensuring that there are no read-modify-write races on any of the registers.
-    pub fn new_mmio_fixed() -> MmioResetControl<'static> {
-        MmioResetControl {
-            ptr: (SLCR_BASE_ADDR + RESET_BLOCK_OFFSET) as *mut ResetControl,
-            phantom: core::marker::PhantomData,
-        }
-    }
-
-    fn new_mmio(block: *mut ResetControl) -> MmioResetControl<'static> {
-        MmioResetControl {
-            ptr: block,
-            phantom: core::marker::PhantomData,
-        }
+    pub unsafe fn new_mmio() -> MmioResetControl<'static> {
+        unsafe { Self::_new_mmio((SLCR_BASE_ADDR + RESET_BLOCK_OFFSET) as *mut ResetControl) }
     }
 }
 
@@ -125,18 +115,8 @@ impl ClockControl {
     ///
     /// If you create multiple instances of this handle at the same time, you are responsible for
     /// ensuring that there are no read-modify-write races on any of the registers.
-    pub unsafe fn new_mmio_fixed() -> MmioClockControl<'static> {
-        MmioClockControl {
-            ptr: (SLCR_BASE_ADDR + CLOCK_CONTROL_OFFSET) as *mut ClockControl,
-            phantom: core::marker::PhantomData,
-        }
-    }
-
-    fn new_mmio(clk_ctrl: *mut ClockControl) -> MmioClockControl<'static> {
-        MmioClockControl {
-            ptr: clk_ctrl,
-            phantom: core::marker::PhantomData,
-        }
+    pub unsafe fn new_mmio() -> MmioClockControl<'static> {
+        unsafe { Self::_new_mmio((SLCR_BASE_ADDR + CLOCK_CONTROL_OFFSET) as *mut _) }
     }
 }
 
@@ -171,18 +151,8 @@ impl DdrIoB {
     ///
     /// If you create multiple instances of this handle at the same time, you are responsible for
     /// ensuring that there are no read-modify-write races on any of the registers.
-    pub fn new_mmio_fixed() -> MmioDdrIoB<'static> {
-        MmioDdrIoB {
-            ptr: (SLCR_BASE_ADDR + DDRIOB_OFFSET) as *mut _,
-            phantom: core::marker::PhantomData,
-        }
-    }
-
-    fn new_mmio(reg: *mut DdrIoB) -> MmioDdrIoB<'static> {
-        MmioDdrIoB {
-            ptr: reg,
-            phantom: core::marker::PhantomData,
-        }
+    pub unsafe fn new_mmio() -> MmioDdrIoB<'static> {
+        unsafe { Self::_new_mmio((SLCR_BASE_ADDR + DDRIOB_OFFSET) as *mut _) }
     }
 }
 
@@ -210,18 +180,8 @@ impl GpiobCtrl {
     ///
     /// If you create multiple instances of this handle at the same time, you are responsible for
     /// ensuring that there are no read-modify-write races on any of the registers.
-    pub fn new_mmio_fixed() -> MmioGpiobCtrl<'static> {
-        MmioGpiobCtrl {
-            ptr: (SLCR_BASE_ADDR + GPIOB_OFFSET) as *mut _,
-            phantom: core::marker::PhantomData,
-        }
-    }
-
-    fn new_mmio(reg: *mut Self) -> MmioGpiobCtrl<'static> {
-        MmioGpiobCtrl {
-            ptr: reg,
-            phantom: core::marker::PhantomData,
-        }
+    pub unsafe fn new_mmio() -> MmioGpiobCtrl<'static> {
+        unsafe { Self::_new_mmio((SLCR_BASE_ADDR + GPIOB_OFFSET) as *mut _) }
     }
 }
 
diff --git a/zynq7000/src/uart.rs b/zynq7000/src/uart.rs
index c96ece9..743187a 100644
--- a/zynq7000/src/uart.rs
+++ b/zynq7000/src/uart.rs
@@ -53,7 +53,7 @@ impl Uart {
     /// from multiple threads. The user must ensure that concurrent accesses are safe and do not
     /// interfere with each other.
     pub const unsafe fn new_mmio_0() -> MmioUart<'static> {
-        MmioUart { ptr: 0xE000_0000 as *mut Uart, phantom: core::marker::PhantomData }
+        unsafe { Self::_new_mmio(UART0_BASE as *mut _) }
     }
 
     /// Create a new UART MMIO instance for uart1 at address 0xE000_1000.
@@ -63,7 +63,7 @@ impl Uart {
     /// This API can be used to potentially create a driver to the same peripheral structure
     /// from multiple threads. The user must ensure that concurrent accesses are safe and do not
     /// interfere with each other.
-    pub const unsafe  fn new_mmio_1() -> MmioUart<'static> {
-        MmioUart { ptr: 0xE000_1000 as *mut Uart, phantom: core::marker::PhantomData }
+    pub const unsafe fn new_mmio_1() -> MmioUart<'static> {
+        unsafe { Self::_new_mmio(UART1_BASE as *mut _) }
     }
 }