diff --git a/firmware/examples/zedboard/src/bin/qspi.rs b/firmware/examples/zedboard/src/bin/qspi.rs index 7c981dd..34e2fd9 100644 --- a/firmware/examples/zedboard/src/bin/qspi.rs +++ b/firmware/examples/zedboard/src/bin/qspi.rs @@ -15,6 +15,7 @@ use zynq7000_hal::{BootMode, clocks, gic, gpio, gtc, prelude::*, qspi, uart}; use zynq7000_rt as _; +const DISPLAY_CLOCK_CONFIG: bool = false; const INIT_STRING: &str = "-- Zynq 7000 Zedboard QSPI example --\n\r"; const QSPI_DEV_COMBINATION: qspi::QspiDeviceCombination = qspi::QspiDeviceCombination { vendor: qspi::QspiVendor::WinbondAndSpansion, @@ -69,6 +70,9 @@ async fn main(_spawner: Spawner) -> ! { let boot_mode = BootMode::new_from_regs(); info!("Boot mode: {:?}", boot_mode); + if DISPLAY_CLOCK_CONFIG { + log::debug!("clock config: {:?}", clocks); + } let qspi_clock_config = qspi::ClockConfig::calculate_with_loopback(qspi::SrcSelIo::IoPll, &clocks, 100.MHz()) diff --git a/firmware/zedboard-bsp/src/qspi_spansion.rs b/firmware/zedboard-bsp/src/qspi_spansion.rs index 589c65f..f099537 100644 --- a/firmware/zedboard-bsp/src/qspi_spansion.rs +++ b/firmware/zedboard-bsp/src/qspi_spansion.rs @@ -545,12 +545,13 @@ impl QspiSpansionS25Fl256SIoMode { transfer.start(); let mut wait_for_tx_slot = |transfer: &mut QspiIoTransferGuard| loop { - let status = transfer.read_status(); - if status.rx_above_threshold() { + let status_read = transfer.read_status(); + // Double read to avoid RX underflows as specified in TRM. + if status_read.rx_above_threshold() && transfer.read_status().rx_above_threshold() { transfer.read_rx_data(); read_index = read_index.wrapping_add(4); } - if !status.tx_full() { + if !status_read.tx_full() { break; } }; @@ -587,7 +588,9 @@ impl QspiSpansionS25Fl256SIoMode { } while read_index < data.len() as u32 { - if transfer.read_status().rx_above_threshold() { + // Double read to avoid RX underflows as specified in TRM. + let status_read = transfer.read_status(); + if status_read.rx_above_threshold() && transfer.read_status().rx_above_threshold() { transfer.read_rx_data(); read_index = read_index.wrapping_add(4); } diff --git a/firmware/zynq7000-hal/src/clocks/mod.rs b/firmware/zynq7000-hal/src/clocks/mod.rs index ac8e4ea..67c2ff7 100644 --- a/firmware/zynq7000-hal/src/clocks/mod.rs +++ b/firmware/zynq7000-hal/src/clocks/mod.rs @@ -197,6 +197,7 @@ impl IoClocks { } } +// TODO: Display impl for clock config. #[derive(Debug)] #[cfg_attr(feature = "defmt", derive(defmt::Format))] pub struct Clocks { diff --git a/firmware/zynq7000/src/qspi.rs b/firmware/zynq7000/src/qspi.rs index f557fcd..bd335e1 100644 --- a/firmware/zynq7000/src/qspi.rs +++ b/firmware/zynq7000/src/qspi.rs @@ -237,7 +237,7 @@ pub struct Registers { /// Transmits 1-byte command and 3-byte data OR 4-byte data. #[mmio(Write)] tx_data_00: u32, - #[mmio(PureRead)] + #[mmio(Read)] rx_data: u32, slave_idle_count: u32, /// Defines the level at which the TX FIFO not full interrupt is generated. diff --git a/justfile b/justfile index 1b03859..87a94c2 100644 --- a/justfile +++ b/justfile @@ -59,4 +59,5 @@ run binary: gdb-multiarch -q -x {{justfile_directory()}}/firmware/gdb.gdb {{binary}} -tui flash-nor-zedboard boot_binary: + cd {{justfile_directory()}}/firmware/zedboard-qspi-flasher && cargo build --release xsct firmware/zedboard-qspi-flasher/qspi-flasher.tcl scripts/ps7_init.tcl -b {{boot_binary}} diff --git a/scripts/zynq7000-init.py b/scripts/zynq7000-init.py index 0c7736f..0c12ec0 100755 --- a/scripts/zynq7000-init.py +++ b/scripts/zynq7000-init.py @@ -112,8 +112,8 @@ def main(): init_script = sdt_path / "ps7_init.tcl" if not init_script.exists(): sys.exit("Error: ps7_init.tcl file not found in the SDT folder.") - - init_tcl = str(init_script) + if not args.init_tcl: + init_tcl = str(init_script) else: if not args.init_tcl: print("Error: No ps7_init.tcl file specified.")