528 lines
16 KiB
C++
528 lines
16 KiB
C++
/******************************************************************************
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The MIT License(MIT)
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Embedded Template Library.
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https://github.com/ETLCPP/etl
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https://www.etlcpp.com
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Copyright(c) 2014 John Wellbelove
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Permission is hereby granted, free of charge, to any person obtaining a copy
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of this software and associated documentation files(the "Software"), to deal
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in the Software without restriction, including without limitation the rights
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to use, copy, modify, merge, publish, distribute, sublicense, and / or sell
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copies of the Software, and to permit persons to whom the Software is
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furnished to do so, subject to the following conditions :
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The above copyright notice and this permission notice shall be included in all
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copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.IN NO EVENT SHALL THE
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AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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SOFTWARE.
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******************************************************************************/
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#include "unit_test_framework.h"
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#include "etl/io_port.h"
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#include <stdint.h>
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#include <array>
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#include <algorithm>
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uint8_t rw = 0x12U;
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uint8_t ro = 0x34U;
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uint8_t wo = 0x56U;
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uint8_t wos = 0x78U;
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namespace
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{
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template <uintptr_t Address>
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struct serial_port
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{
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etl::io_port_ro<uint8_t, Address> rxdata;
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etl::io_port_wo<uint8_t, Address + 1> txdata;
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etl::io_port_rw<uint16_t, Address + 2> control;
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etl::io_port_ro<uint16_t, Address + 4> status;
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etl::io_port_wos<uint8_t, Address + 6> control2;
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};
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struct dynamic_serial_port
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{
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dynamic_serial_port(uint8_t* rxdata_reg,
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uint8_t* txdata_reg,
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uint16_t* control_reg,
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uint16_t* status_reg,
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uint8_t* control2_reg)
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: rxdata(rxdata_reg)
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, txdata(txdata_reg)
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, control(control_reg)
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, status(status_reg)
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, control2(control2_reg)
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{
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}
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etl::io_port_ro<uint8_t> rxdata;
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etl::io_port_wo<uint8_t> txdata;
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etl::io_port_rw<uint16_t> control;
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etl::io_port_ro<uint16_t> status;
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etl::io_port_wos<uint8_t> control2;
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};
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}
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namespace
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{
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SUITE(test_io_ports)
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{
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//*************************************************************************
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TEST(test_io_port_type_traits)
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{
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using iop_rw_t = etl::io_port_rw<uint8_t>;
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using iop_ro_t = etl::io_port_ro<uint8_t>;
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using iop_wo_t = etl::io_port_wo<uint8_t>;
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using iop_wos_t = etl::io_port_wos<uint8_t>;
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// Check IOP value_type
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CHECK_TRUE((std::is_same<uint8_t, iop_rw_t::value_type>::value));
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CHECK_TRUE((std::is_same<uint8_t, iop_ro_t::value_type>::value));
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CHECK_TRUE((std::is_same<uint8_t, iop_wo_t::value_type>::value));
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CHECK_TRUE((std::is_same<uint8_t, iop_wos_t::value_type>::value));
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// Check IOP::iterator io_port_type
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CHECK_TRUE((std::is_same<iop_rw_t, iop_rw_t::iterator::io_port_type>::value));
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CHECK_TRUE((std::is_same<iop_wo_t, iop_wo_t::iterator::io_port_type>::value));
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CHECK_TRUE((std::is_same<iop_wos_t, iop_wos_t::iterator::io_port_type>::value));
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// Check IOP::const_iterator io_port_type
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CHECK_TRUE((std::is_same<iop_rw_t, iop_rw_t::const_iterator::io_port_type>::value));
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CHECK_TRUE((std::is_same<iop_ro_t, iop_ro_t::const_iterator::io_port_type>::value));
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CHECK_TRUE((std::is_same<iop_wos_t, iop_wos_t::const_iterator::io_port_type>::value));
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// Check IOP::iterator value_type
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CHECK_TRUE((std::is_same<uint8_t, iop_rw_t::iterator::value_type>::value));
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CHECK_TRUE((std::is_same<uint8_t, iop_wo_t::iterator::value_type>::value));
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CHECK_TRUE((std::is_same<uint8_t, iop_wos_t::iterator::value_type>::value));
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// Check IOP::const_iterator value_type
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CHECK_TRUE((std::is_same<const uint8_t, iop_rw_t::const_iterator::value_type>::value));
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CHECK_TRUE((std::is_same<const uint8_t, iop_ro_t::const_iterator::value_type>::value));
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CHECK_TRUE((std::is_same<const uint8_t, iop_wos_t::const_iterator::value_type>::value));
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}
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//*************************************************************************
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TEST(test_static_io_port)
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{
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// Without a compile time address, the static address IO ports cannot be tested.
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serial_port<0x1234U> port;
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}
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//*************************************************************************
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TEST(test_dynamic_io_port_rw_constructors_and_assignment)
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{
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uint8_t data1 = 0x12U;
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uint8_t data2 = 0x34U;
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etl::io_port_rw<uint8_t> data_rw1a(&data1);
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etl::io_port_rw<uint8_t> data_rw1b(data_rw1a);
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etl::io_port_rw<uint8_t> data_rw2a(&data2);
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etl::io_port_rw<uint8_t> data_rw2b(nullptr);
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data_rw2b = data_rw2a;
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CHECK_EQUAL(&data1, data_rw1a.get_address());
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CHECK_EQUAL(&data1, data_rw1b.get_address());
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CHECK_EQUAL(&data2, data_rw2a.get_address());
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CHECK_EQUAL(&data2, data_rw2b.get_address());
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}
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//*************************************************************************
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TEST(test_dynamic_io_port_ro_constructors_and_assignment)
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{
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uint8_t data1 = 0x12U;
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uint8_t data2 = 0x34U;
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etl::io_port_ro<uint8_t> data_ro1a(&data1);
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etl::io_port_ro<uint8_t> data_ro1b(data_ro1a);
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etl::io_port_ro<uint8_t> data_ro2a(&data2);
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etl::io_port_ro<uint8_t> data_ro2b(nullptr);
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data_ro2b = data_ro2a;
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CHECK_EQUAL(&data1, data_ro1a.get_address());
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CHECK_EQUAL(&data1, data_ro1b.get_address());
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CHECK_EQUAL(&data2, data_ro2a.get_address());
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CHECK_EQUAL(&data2, data_ro2b.get_address());
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}
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//*************************************************************************
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TEST(test_dynamic_io_port_wo_constructors_and_assignment)
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{
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uint8_t data1 = 0x12U;
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uint8_t data2 = 0x34U;
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etl::io_port_wo<uint8_t> data_wo1a(&data1);
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etl::io_port_wo<uint8_t> data_wo1b(data_wo1a);
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etl::io_port_wo<uint8_t> data_wo2a(&data2);
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etl::io_port_wo<uint8_t> data_wo2b(nullptr);
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data_wo2b = data_wo2a;
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CHECK_EQUAL(&data1, data_wo1a.get_address());
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CHECK_EQUAL(&data1, data_wo1b.get_address());
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CHECK_EQUAL(&data2, data_wo2a.get_address());
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CHECK_EQUAL(&data2, data_wo2b.get_address());
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}
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//*************************************************************************
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TEST(test_dynamic_io_port_wos_constructors_and_assignment)
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{
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uint8_t data1 = 0x12U;
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uint8_t data2 = 0x34U;
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etl::io_port_wos<uint8_t> data_wos1a(&data1);
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etl::io_port_wos<uint8_t> data_wos1b(data_wos1a);
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etl::io_port_wos<uint8_t> data_wos2a(&data2);
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etl::io_port_wos<uint8_t> data_wos2b(nullptr);
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data_wos2b = data_wos2a;
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CHECK_EQUAL(&data1, data_wos1a.get_address());
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CHECK_EQUAL(&data1, data_wos1b.get_address());
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CHECK_EQUAL(&data2, data_wos2a.get_address());
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CHECK_EQUAL(&data2, data_wos2b.get_address());
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}
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//*************************************************************************
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TEST(test_dynamic_io_port_access)
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{
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const uint8_t RxData = 0x01U;
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const uint8_t TxData = 0x12U;
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const uint16_t ControlData = 0x2345U;
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const uint16_t StatuslData = 0x3456U;
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const uint8_t Control2Data = 0x67U;
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uint8_t rxdata_register = RxData;
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uint8_t txdata_register = 0;
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uint16_t control_register = 0;
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uint16_t status_register = StatuslData;
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uint8_t control2_register = 0;
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dynamic_serial_port port(&rxdata_register,
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&txdata_register,
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&control_register,
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&status_register,
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&control2_register);
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// Check read from the Rx data register
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CHECK_EQUAL(RxData, port.rxdata);
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CHECK_EQUAL(RxData, rxdata_register);
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// Check write to the Tx data register
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port.txdata = TxData;
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CHECK_EQUAL(TxData, txdata_register);
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// Check write to the control register
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port.control = ControlData;
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CHECK_EQUAL(ControlData, control_register);
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// Check read from the status data register
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CHECK_EQUAL(StatuslData, port.status);
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CHECK_EQUAL(StatuslData, status_register);
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// Check write to the control2 register
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port.control2 = Control2Data;
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CHECK_EQUAL(Control2Data, control2_register);
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// Set and get an address
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port.control2.set_address((void*)0x1000U);
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volatile uint8_t* address = port.control2.get_address();
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CHECK_EQUAL(reinterpret_cast<volatile uint8_t*>(0x1000U), address);
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}
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//*************************************************************************
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TEST(test_dynamic_io_port_iterators)
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{
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etl::io_port_rw<uint8_t> iop_rw;
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etl::io_port_ro<uint8_t> iop_ro;
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etl::io_port_wo<uint8_t> iop_wo;
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etl::io_port_wos<uint8_t> iop_wos;
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uint8_t memory_rw = 0x12U;
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uint8_t memory_ro = 0x34U;
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uint8_t memory_wo = 0x56U;
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uint8_t memory_wos = 0x78U;
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iop_rw.set_address(&memory_rw);
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iop_ro.set_address(&memory_ro);
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iop_wo.set_address(&memory_wo);
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iop_wos.set_address(&memory_wos);
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std::array<uint8_t, 10> compare;
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std::array<uint8_t, 10> result;
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// Read from RW IOP.
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std::copy_n(iop_rw.citer(), result.size(), result.begin());
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compare.fill(0x12U);
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for (size_t i = 0UL; i < compare.size(); ++i)
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{
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CHECK_EQUAL(compare[i], result[i]);
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}
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// Write to RW IOP.
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compare.fill(0x34U);
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std::copy_n(compare.begin(), compare.size(), iop_rw.iter());
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CHECK_EQUAL(compare[0], iop_rw);
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// Read from RO IOP.
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std::copy_n(iop_ro.citer(), result.size(), result.begin());
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compare.fill(0x34U);
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for (size_t i = 0UL; i < compare.size(); ++i)
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{
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CHECK_EQUAL(compare[i], result[i]);
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}
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// Write to WO IOP.
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compare.fill(0x56U);
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std::copy_n(compare.begin(), 1, iop_wo.iter());
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CHECK_EQUAL(compare[0], memory_wo);
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// Read from WOS IOP.
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iop_wos = 0x78U;
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std::copy_n(iop_wos.citer(), result.size(), result.begin());
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compare.fill(0x78U);
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for (size_t i = 0UL; i < compare.size(); ++i)
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{
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CHECK_EQUAL(compare[i], result[i]);
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}
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// Write to WOS IOP.
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compare.fill(0x90U);
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std::copy_n(compare.begin(), 1, iop_wos.iter());
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CHECK_EQUAL(compare[0], iop_wos);
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}
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//*************************************************************************
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TEST(test_dynamic_io_port_rw_binary_operators)
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{
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uint8_t value = 0;
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uint8_t compare = 0x5A;
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etl::io_port_rw<uint8_t> iop_rw;
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iop_rw.set_address(&value);
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compare = value;
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iop_rw |= 0xA1;
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CHECK_EQUAL(compare | 0xA1, iop_rw.read());
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compare = value;
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iop_rw ^= 0xA5;
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CHECK_EQUAL(compare ^ 0xA5, iop_rw.read());
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compare = value;
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iop_rw <<= 1;
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CHECK_EQUAL(uint8_t(compare << 1), iop_rw.read());
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compare = value;
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iop_rw >>= 1;
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CHECK_EQUAL(uint8_t(compare >> 1), iop_rw.read());
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compare = value;
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uint8_t not_value = ~iop_rw;
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CHECK_EQUAL(uint8_t(~compare), not_value);
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}
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//*************************************************************************
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TEST(test_dynamic_io_port_wos_binary_operators)
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{
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uint8_t value = 0;
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uint8_t compare = 0x5A;
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etl::io_port_wos<uint8_t> iop_wos;
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iop_wos.set_address(&value);
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iop_wos.write(0x5A);
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iop_wos &= 0x0F;
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CHECK_EQUAL(compare & 0x0F, iop_wos.read());
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compare = value;
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iop_wos |= 0xA1;
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CHECK_EQUAL(compare | 0xA1, iop_wos.read());
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compare = value;
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iop_wos ^= 0xA5;
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CHECK_EQUAL(compare ^ 0xA5, iop_wos.read());
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compare = value;
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iop_wos <<= 1;
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CHECK_EQUAL(uint8_t(compare << 1), iop_wos.read());
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compare = value;
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iop_wos >>= 1;
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CHECK_EQUAL(uint8_t(compare >> 1), iop_wos.read());
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compare = value;
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uint8_t not_value = ~iop_wos;
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CHECK_EQUAL(uint8_t(~compare), not_value);
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}
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//*************************************************************************
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TEST(test_io_port_rw_swap)
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{
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using iop_t = etl::io_port_rw<uint8_t>;
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uint8_t memory1 = 0x12U;
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uint8_t memory2 = 0x34U;
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iop_t iop1;
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iop_t iop2;
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iop1.set_address(&memory1);
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iop2.set_address(&memory2);
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// Swap io_ports
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ETL_OR_STD::swap(iop1, iop2);
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iop1.write(0x56);
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iop2.write(0x78);
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CHECK_EQUAL(memory1, iop2.read());
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CHECK_EQUAL(memory2, iop1.read());
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// Swap iterators
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auto itr1 = iop1.iter();
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auto itr2 = iop2.iter();
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ETL_OR_STD::swap(itr1, itr2);
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CHECK_EQUAL(iop1.read(), *itr2);
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CHECK_EQUAL(iop2.read(), *itr1);
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// Swap const iterators
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auto itr3 = iop1.citer();
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auto itr4 = iop2.citer();
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ETL_OR_STD::swap(itr3, itr4);
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CHECK_EQUAL(iop1.read(), *itr4);
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CHECK_EQUAL(iop2.read(), *itr3);
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}
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//*************************************************************************
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TEST(test_io_port_ro_swap)
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{
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using iop_t = etl::io_port_ro<uint8_t>;
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uint8_t memory1 = 0x12U;
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uint8_t memory2 = 0x34U;
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iop_t iop1;
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iop_t iop2;
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iop1.set_address(&memory1);
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iop2.set_address(&memory2);
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// Swap io_ports
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ETL_OR_STD::swap(iop1, iop2);
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CHECK_EQUAL(memory1, iop2.read());
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CHECK_EQUAL(memory2, iop1.read());
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// Swap const iterators
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auto itr1 = iop1.citer();
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auto itr2 = iop2.citer();
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ETL_OR_STD::swap(itr1, itr2);
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CHECK_EQUAL(iop1.read(), *itr2);
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CHECK_EQUAL(iop2.read(), *itr1);
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}
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//*************************************************************************
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TEST(test_io_port_wo_swap)
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{
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using iop_t = etl::io_port_wo<uint8_t>;
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uint8_t memory1 = 0x12U;
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uint8_t memory2 = 0x34U;
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iop_t iop1;
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iop_t iop2;
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iop1.set_address(&memory1);
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iop2.set_address(&memory2);
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// Swap io_ports
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ETL_OR_STD::swap(iop1, iop2);
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iop1.write(0x56);
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iop2.write(0x78);
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CHECK_EQUAL(memory1, 0x78);
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CHECK_EQUAL(memory2, 0x56);
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// Swap iterators
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auto itr1 = iop1.iter();
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auto itr2 = iop2.iter();
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ETL_OR_STD::swap(itr1, itr2);
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*itr1 = 0x9A;
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*itr2 = 0xBC;
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CHECK_EQUAL(memory1, 0x9A);
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CHECK_EQUAL(memory2, 0xBC);
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}
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//*************************************************************************
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TEST(test_io_port_wos_swap)
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{
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using iop_t = etl::io_port_wos<uint8_t>;
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|
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uint8_t memory1 = 0x12U;
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uint8_t memory2 = 0x34U;
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|
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iop_t iop1;
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|
iop_t iop2;
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|
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iop1.set_address(&memory1);
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iop2.set_address(&memory2);
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|
|
|
// Swap io_ports
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ETL_OR_STD::swap(iop1, iop2);
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|
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iop1.write(0x56);
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|
iop2.write(0x78);
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|
|
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CHECK_EQUAL(memory1, iop2.read());
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|
CHECK_EQUAL(memory2, iop1.read());
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|
|
|
// Swap iterators
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|
auto itr1 = iop1.iter();
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|
auto itr2 = iop2.iter();
|
|
|
|
ETL_OR_STD::swap(itr1, itr2);
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|
|
|
CHECK_EQUAL(iop1.read(), *itr2);
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|
CHECK_EQUAL(iop2.read(), *itr1);
|
|
|
|
// Swap const iterators
|
|
auto itr3 = iop1.citer();
|
|
auto itr4 = iop2.citer();
|
|
|
|
ETL_OR_STD::swap(itr3, itr4);
|
|
|
|
CHECK_EQUAL(iop1.read(), *itr4);
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|
CHECK_EQUAL(iop2.read(), *itr3);
|
|
}
|
|
};
|
|
}
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