eive-obsw/bsp_q7s/spi/Q7sSpiComIF.h

#ifndef BSP_Q7S_SPI_Q7SSPICOMIF_H_
#define BSP_Q7S_SPI_Q7SSPICOMIF_H_

#include <fsfw_hal/linux/spi/SpiComIF.h>


/**
 * @brief   This additional communication interface is required because the SPI busses behind the
 *          devices "/dev/spi2.0" and "dev/spidev3.0" are multiplexed to one SPI interface.
 *          This was necessary because the processing system spi (/dev/spi2.0) does not support
 *          frequencies lower than 650 kHz. To reach lower frequencies also the CPU frequency must
 *          be reduced which leads to other effects compromising kernel drivers.
 *          The nano avionics reaction wheels require a spi frequency between 150 kHz and 300 kHz
 *          why an additional AXI SPI core has been implemented in the programmable logic. However,
 *          the spi frequency of the AXI SPI core is not configurable during runtime. Therefore,
 *          this communication interface multiplexes either the hard-wired SPI or the AXI SPI to
 *          the SPI interface. The multiplexing is performed via a GPIO connected to a VHDL
 *          module responsible for switching between the to SPI peripherals.
 */
class Q7sSpiComIF: public SpiComIF {
public:
    /**
     * @brief   Constructor
     *
     * @param objectId
     * @param gpioComIF
     * @param gpioSwitchId  The gpio ID of the GPIO connected to the SPI mux module in the PL.
     */
    Q7sSpiComIF(object_id_t objectId, GpioIF* gpioComIF, gpioId_t gpioSwitchId);
    virtual ~Q7sSpiComIF();
};

#endif /* BSP_Q7S_SPI_Q7SSPICOMIF_H_ */