2021-01-23 17:22:40 +01:00
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#ifndef FSFWCONFIG_DEVICES_GPIOIDS_H_
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#define FSFWCONFIG_DEVICES_GPIOIDS_H_
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2021-03-23 16:45:07 +01:00
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#include <fsfw_hal/common/gpio/GpioIF.h>
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2021-01-23 17:22:40 +01:00
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namespace gpioIds {
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enum gpioId_t {
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2021-02-12 14:18:34 +01:00
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HEATER_0,
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HEATER_1,
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HEATER_2,
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HEATER_3,
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HEATER_4,
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HEATER_5,
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HEATER_6,
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HEATER_7,
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2021-02-16 15:32:24 +01:00
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DEPLSA1,
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DEPLSA2,
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2021-03-04 18:29:28 +01:00
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MGM_0_LIS3_CS,
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MGM_1_RM3100_CS,
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GYRO_0_ADIS_CS,
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GYRO_1_L3G_CS,
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GYRO_2_L3G_CS,
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MGM_2_LIS3_CS,
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MGM_3_RM3100_CS,
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TEST_ID_0,
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2021-03-13 14:42:30 +01:00
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TEST_ID_1,
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RTD_IC3,
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RTD_IC4,
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RTD_IC5,
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RTD_IC6,
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RTD_IC7,
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RTD_IC8,
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RTD_IC9,
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RTD_IC10,
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RTD_IC11,
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RTD_IC12,
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RTD_IC13,
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RTD_IC14,
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RTD_IC15,
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RTD_IC16,
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RTD_IC17,
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RTD_IC18,
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2021-05-03 11:59:33 +02:00
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CS_SUS_1,
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CS_SUS_2,
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CS_SUS_3,
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CS_SUS_4,
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CS_SUS_5,
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CS_SUS_6,
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CS_SUS_7,
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CS_SUS_8,
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CS_SUS_9,
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CS_SUS_10,
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CS_SUS_11,
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CS_SUS_12,
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CS_SUS_13,
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2021-03-13 14:42:30 +01:00
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SPI_MUX_BIT_1,
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SPI_MUX_BIT_2,
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SPI_MUX_BIT_3,
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SPI_MUX_BIT_4,
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SPI_MUX_BIT_5,
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2021-05-02 13:48:39 +02:00
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SPI_MUX_BIT_6,
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2021-05-16 19:22:04 +02:00
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CS_RAD_SENSOR,
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PAPB_BUSY_N,
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2021-06-21 09:50:26 +02:00
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PAPB_EMPTY,
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2021-06-21 17:15:19 +02:00
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EN_RW1,
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EN_RW2,
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EN_RW3,
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EN_RW4,
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2021-06-24 12:04:36 +02:00
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CS_RW1,
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CS_RW2,
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CS_RW3,
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CS_RW4,
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2021-06-21 17:15:19 +02:00
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EN_RW_CS
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2021-01-23 17:22:40 +01:00
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};
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}
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#endif /* FSFWCONFIG_DEVICES_GPIOIDS_H_ */
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